WO2023020454A1 - Chambre à semi-conducteur et dispositif de traitement de semi-conducteur - Google Patents

Chambre à semi-conducteur et dispositif de traitement de semi-conducteur Download PDF

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Publication number
WO2023020454A1
WO2023020454A1 PCT/CN2022/112665 CN2022112665W WO2023020454A1 WO 2023020454 A1 WO2023020454 A1 WO 2023020454A1 CN 2022112665 W CN2022112665 W CN 2022112665W WO 2023020454 A1 WO2023020454 A1 WO 2023020454A1
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WIPO (PCT)
Prior art keywords
chamber
semiconductor
isolation valve
pipeline
wafer
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PCT/CN2022/112665
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English (en)
Chinese (zh)
Inventor
胡云龙
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北京北方华创微电子装备有限公司
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Publication of WO2023020454A1 publication Critical patent/WO2023020454A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to the technical field of semiconductor chip manufacturing, in particular to a semiconductor chamber and semiconductor process equipment.
  • semiconductor process equipment is provided with process chambers such as a heating chamber, a cooling chamber, and a CVD (Chemical Vapor Deposition, chemical vapor deposition) chamber.
  • process chambers such as a heating chamber, a cooling chamber, and a CVD (Chemical Vapor Deposition, chemical vapor deposition) chamber.
  • CVD Chemical Vapor Deposition, chemical vapor deposition
  • the wafer In the process of wafer processing by semiconductor process equipment, after the wafer is processed in the CVD chamber, it needs to be transferred to the heating chamber for heat treatment. After the heating is completed, it is transferred to the cooling chamber for cooling, so as to perform an annealing process on the wafer. However, when there is no wafer being processed in the heating chamber or the cooling chamber, the wafer can be transferred into the heating chamber or the cooling chamber. When wafers are being processed in the heating chamber or cooling chamber, the wafers in the previous process need to wait for the wafers in the process chamber of the next process to be processed before they can be transported, which will cause the entire processing time of the wafers to be lengthened , significantly affecting the production capacity of semiconductor process equipment.
  • the invention discloses a semiconductor chamber and semiconductor process equipment to solve the problem of insufficient production capacity of the semiconductor process equipment.
  • the present invention adopts the following technical solutions:
  • a semiconductor chamber comprising:
  • the first chamber body and the isolation valve the isolation valve is arranged in the first chamber body, the isolation valve separates the inner cavity of the first chamber body to form at least two process chambers, the first The chamber body is provided with a wafer transfer port, and the wafer transfer port communicates with one of the at least two process chambers;
  • a temperature control component each of the process chambers is provided with the temperature control component, and the temperature control effects of the two temperature control components in two adjacent process chambers are different;
  • the first bearing part and the second bearing part, the first bearing part and the second bearing part are located in two adjacent process chambers respectively, and all the process chambers between the two adjacent process chambers When the isolation valve is opened, the first carrying part can move into the process chamber where the second carrying part is located, and can place the wafer between the first carrying part and the second carrying part. Reprinted between departments.
  • a semiconductor process equipment comprising a first process chamber and a second process chamber
  • the first process chamber is the above-mentioned semiconductor chamber
  • the number of the first process chamber and the second process chamber All are multiple
  • the multiple first process chambers and the multiple second process chambers are distributed at intervals
  • the wafers in each of the first process chambers can be transferred to the idle second process chambers indoor.
  • the inner cavity of the first chamber body is separated into at least two process chambers through an isolation valve, each process chamber is provided with a temperature control component, and the control chambers in the two adjacent process chambers
  • the temperature control effects of the temperature components are different, that is to say, a semiconductor chamber can be compatible with at least two process chambers with different temperature control effects, such as heating or cooling respectively. That is, a semiconductor chamber can be compatible with at least two different processes, so the semiconductor process equipment increases the number of process chambers for different processes without changing the total number of process chambers, thereby improving the semiconductor process equipment. production capacity.
  • FIG. 1 is a schematic structural diagram of semiconductor process equipment
  • FIG. 2 is a schematic structural diagram of a semiconductor chamber disclosed in an embodiment of the present invention.
  • FIG. 3 is a top view of a semiconductor chamber disclosed in an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of the semiconductor chamber disclosed by an embodiment of the present invention when the telescopic portion of the second bearing portion shrinks;
  • FIG. 5 is a schematic structural view of the second carrying portion of the semiconductor chamber disclosed by an embodiment of the present invention when the telescopic portion is extended.
  • semiconductor process equipment includes a plurality of process chambers (including, for example, a CVD chamber, a heating chamber, and a cooling chamber) and a transfer chamber.
  • process chambers including, for example, a CVD chamber, a heating chamber, and a cooling chamber
  • transfer chamber As shown in Figure 1, there are 6 process chambers surrounding the transfer chamber, namely chamber No. 1 to chamber No. 6.
  • chamber No. 1 is a heating chamber
  • chamber No. 2 is a cooling chamber.
  • Chambers, chambers 3 to 6 are all CVD chambers.
  • the wafers processed in chambers 3 to 6 need to be transferred to chamber 1 for heating, and then transferred to chamber 2 for cooling, so as to perform an annealing process on the wafers to improve the performance of the wafers.
  • the number of process chambers that can communicate with the transfer chamber in the semiconductor process equipment has been determined.
  • the number of process chambers will inevitably reduce the number of one or more process chambers.
  • the number of CVD chambers will decrease. Therefore, this increase of one or more
  • the number of process chambers that can communicate with the transmission chamber in the semiconductor process equipment has been determined, so when the total number of process chambers remains unchanged, increasing the number of one or several process chambers will inevitably increase the number of process chambers. The number of other one or several process chambers is reduced. Therefore, the problem of insufficient production capacity of semiconductor process equipment cannot be solved by increasing the number of one or several process chambers.
  • an embodiment of the present invention discloses a semiconductor chamber.
  • the disclosed semiconductor chamber includes a first chamber body 110 , an isolation valve 200 , a temperature control component 300 , a first The bearing part 410 and the second bearing part 420 .
  • the isolation valve 200 is disposed in the first chamber body 110 , and the isolation valve 200 separates the inner cavity of the first chamber body 110 to form at least two process chambers 111 . Specifically, at least two process chambers 111 are distributed at intervals along the height direction of the first chamber body 110 .
  • the first chamber body 110 is provided with a wafer transfer port, and the wafer transfer port communicates with one process chamber 111 of the at least two process chambers 111 .
  • the material of the isolation valve 200 is preferably selected with poor thermal conductivity, for example, a smooth stainless steel valve can be selected.
  • Each process chamber 111 is provided with a temperature control assembly 300 , and the temperature control effects of the two temperature control assemblies 300 in two adjacent process chambers 111 are different.
  • Such a design can realize that a single semiconductor chamber can be compatible with at least two process chambers 111 with different temperatures.
  • the temperature control component 300 in one of the process chambers 111 can realize the heating function, and the temperature control component 300 in the other process chamber 111 can realize the cooling function, that is to say, the One of the two adjacent process chambers 111 may be a heating chamber, and the other may be a cooling chamber.
  • the embodiment of the present invention is not limited thereto.
  • two adjacent process chambers 111 can also be heating chambers, but the heating effects of the two are different to meet different process requirements;
  • the two adjacent process chambers 111 can also be cooling chambers, but the cooling effects of the two are different to meet different process requirements.
  • the first bearing part 410 and the second bearing part 420 are respectively located in two adjacent process chambers 111, and when the isolation valve 200 between the two adjacent process chambers 111 is opened, the first bearing part 410 can move to the process chamber 111 where the second carrier 420 is located, and transfer the wafer 700 between the first carrier 410 and the second carrier 420 .
  • the temperature control assembly 300 in one of the process chambers 111 can be a heater, and the temperature control assembly 300 in the other process chamber 111 can be a cooler, so that Realize cooling and heating functions.
  • the process chamber 111 where the first bearing part 410 is located may be a heating chamber, and the chamber where the second bearing part 420 is located may be a cooling chamber.
  • the wafer 700 is first transferred to the first carrier part 410, and after heating in the process chamber 111 where the first carrier part 410 is located, the isolation valve 200 is opened, and the first carrier part 410 transfers the wafer 700 to the second carrier part 410.
  • the first carrier part 410 returns to the process chamber 111 where it is located, and the isolation valve 200 is closed, and the wafer 700 is placed on the second carrier part 420 Cooling is carried out in the process chamber 111 where it is located. After the cooling is completed, the isolation valve 200 is opened, and the first carrier 410 moves again into the process chamber 111 where the second carrier 420 is located, and the second carrier 420 transfers the wafer 700 to the first carrier 410, and the first carrier 410 The wafer 700 is carried to the process chamber 111 where it is located, and then the wafer 700 is transported out of the semiconductor chamber, thereby completing the annealing process of the wafer 700 .
  • the wafer 700 can also be directly transported out of the semiconductor chamber in the cooling chamber, which is not limited herein.
  • one semiconductor chamber can be compatible with at least two different processes, so the semiconductor process equipment increases the number of process chambers 111 for different processes without changing the total number of process chambers, and can Increased capacity of semiconductor process equipment.
  • the semiconductor chamber disclosed in the present application can replace the No. 1 chamber and the No. 2 chamber in the related art, and the replaced No. 1 chamber and No. 2 chamber can both complete the heating and cooling processes. Therefore, when the No. 1 chamber When processing, the wafer 700 in No. 3 to No. 6 chambers can be transferred to No. 2 chamber without waiting for No. 1 chamber to be free, so without increasing the total number of process chambers of the semiconductor process equipment, it increases The number of process chambers 111 can increase the productivity of semiconductor process equipment.
  • chamber No. 1 and chamber No. 2 in the related art also need to use manipulators for transport, while the semiconductor chamber in this application does not need to Robot transfer, thus simplifying the structure of semiconductor process equipment, while shortening the scheduling time and transfer time during the transfer process.
  • the semiconductor chamber disclosed in the present application may also include at least two first gas extraction pipelines 510, and one end of each first gas extraction pipeline 510 may be in one-to-one correspondence with each process chamber 111
  • the other end of each first pumping pipeline 510 is used to communicate with the vacuum controller.
  • the first pumping pipeline 510 can be provided with a first valve 511, and the first valve 511 controls the connection or disconnection between the vacuum pump and the process chamber 111. open.
  • the first valve 511 can be opened, and the first pumping pipeline 510 is connected with the process chamber 111, so that the corresponding process chamber 111 is evacuated, so that the corresponding process chamber 111 is Vacuum state.
  • the semiconductor chamber is in a vacuum state during the transfer of the wafer 700, so it can be connected to the vacuum controller through the first pumping pipeline 510 and the first valve 511, so as to facilitate the vacuuming process of the process chamber 111.
  • each process chamber 111 corresponds to a first pumping pipeline 510, and the first pumping pipeline 510 is correspondingly provided with a first valve 511, so opening the first valve 511 corresponding to each process chamber 111 can The corresponding process chamber 111 is evacuated.
  • the semiconductor chamber may include a vacuum controller, of course, the vacuum controller may also be included in the semiconductor process equipment for vacuuming the entire semiconductor process equipment.
  • the semiconductor chamber disclosed in the present application may further include at least two process gas pipelines 610 , one end of each process gas pipeline 610 may communicate with each process chamber 111 one by one, and the other end of each process gas pipeline 610 is used to communicate with a process gas source.
  • the process gas pipeline 610 may be provided with a pipeline valve 620 , and the pipeline valve 620 controls the connection or disconnection of the process gas source with the corresponding process chamber 111 .
  • the corresponding pipeline valve 620 can be opened first to ventilate the process chamber 111, so that the process chamber 111 is in an atmospheric state, and then the heating or cooling process is performed, thereby improving the heat conduction of the wafer 700 or cooling rate.
  • the process gas in the above embodiments may be process gases such as nitrogen, argon, and of course other process gases, which are not limited herein.
  • the first chamber body 110 may include at least two chamber parts 112,
  • the inside of the cavity part 112 constitutes the process cavity 111, and the cavity part 112 can be provided with a through hole 1121, the through holes 1121 of the two adjacent cavity parts 112 are arranged oppositely, between the adjacent two cavity parts 112
  • the isolation valve 200 can be located in the assembly gap 1122 and between the two opposite through holes 1121. At this time, the isolation valve 200 is disposed in the assembly gap 1122 , and the two through holes 1121 are communicated or isolated through the isolation valve 200 .
  • the semiconductor chamber disclosed in the present application may also include a second chamber body 120 and a second pumping pipeline 520, the first chamber body 110 may be located in the second chamber body 120, and the first chamber body 110
  • the second chamber body 120 is spaced apart from the second chamber body 120 , and the inner cavity of the second chamber body 120 can be communicated with one end of the second pumping pipeline 520 .
  • the other end of the second exhaust pipeline 520 is used to communicate with the vacuum controller.
  • the second exhaust pipeline 520 can be provided with a second valve 521.
  • the second valve 521 can control the vacuum controller and the inner cavity of the second chamber body 120. cavities connected or disconnected.
  • the second chamber body 120 can surround the first chamber body 110 in its inner cavity, and at the same time, preferably, a plurality of supports (not shown) are arranged between the bottom walls of the two,
  • the support can provide support for the first chamber body 110.
  • the contact area between the support and the first chamber body 110 and the second chamber body 120 is as small as possible, and it is made of a non-thermally conductive material, thereby reducing Temperature conduction between the first chamber body and the second chamber body 120 .
  • the design of the second chamber body can prevent damage to the first chamber body 110 and improve the safety of the semiconductor chamber.
  • the temperature of the two process chambers 111 can be further avoided by adjusting the vacuum degree in the inner cavity of the second chamber body. interference.
  • the inner cavity of the second chamber body 120 can be evacuated through the second pumping pipeline 520, so that the inner cavity of the second chamber body 120 is in a vacuum state, so that the two adjacent cavities can be lowered.
  • the heat transfer performance between the parts 112 is improved, thus further reducing the temperature influence between two adjacent process chambers 111 .
  • the second carrier part 420 may include a plurality of sub-carrier parts, and the plurality of sub-carrier parts may be evenly arranged in the circumferential direction of the inner wall of the corresponding process chamber 111 to form a carrier surface for carrying the wafer 700 .
  • the second carrying portion 420 can be evenly carried in the circumferential direction of the wafer 700, so that the force on the wafer 700 is uniform, and it is not easy to tilt, thereby improving the stability of the carrying of the wafer 700.
  • the second carrying portion 420 when the first carrying portion 410 and the second carrying portion 420 transfer the wafer 700 , the second carrying portion 420 easily interferes with the wafer 700 , so that the wafer 700 falls during the transfer.
  • each sub-carrying part may include a fixed part 421 and a telescopic part 422, wherein the fixed part 421 is detachably connected to the inner wall of the corresponding process chamber 111, and the telescopic part 422 is connected to the fixed
  • the fixed part 421 is connected, and can move telescopically along the fixed part 421, so as to be able to support the edge area of the wafer 700 when extending, and avoid the wafer 700 when retracting.
  • the telescopic part 422 can be extended or shortened.
  • the telescopic part 422 When the first carrier part 410 is required to transfer the wafer 700 to the second carrier part 420, the telescopic part 422 is shortened, and the first carrier part 410 transports the wafer 700 to a position higher than the second carrier part 410.
  • the position of the carrier part 420 after that, stretch the telescopic part 422 again, and a part of the telescopic part 422 stretches into the lower position of the wafer 700, and the first carrier part 410 is in the process of falling, and the wafer 700 is transferred to the telescopic part 422, thereby The transfer of the wafer 700 is completed.
  • the first carrying part 410 When the second carrying part 420 is required to transfer the wafer 700 to the first carrying part 410, the first carrying part 410 lifts up the wafer 700 while the first carrying part 410 is rising, the telescopic part 422 shortens, and the first carrying part 410 falls. Due to the shortening of the telescopic part 422 , the telescopic part 422 will not interfere with the wafer 700 .
  • the telescopic part 422 can be stretched and contracted, so that it is not easy to interfere with the wafer 700 and the first carrying part 410 , thereby improving the reliability and safety of the wafer 700 transport.
  • the telescopic part 422 may be a hydraulic cylinder or a pneumatic cylinder.
  • the telescopic part 422 may also have other structures, which are not limited herein.
  • the fixing part 421 is detachably connected to the inner wall of the process chamber 111, so as to facilitate the replacement of the sub-carrying part, thereby improving the maintainability of the semiconductor chamber.
  • the fixing part 421 and the inner wall of the process chamber 111 can be connected by screw threads, clamping, etc., of course, can also be connected in other ways, which are not limited herein.
  • the first carrier part 410 may include a plurality of ejector pins distributed at intervals along the circumference of the process chamber 111, and the plurality of ejector pins jointly lift up the wafer 700 and make it rise to a position higher than the height of the second carrier part 420. place.
  • the first carrier part 410 can also adopt any other structure, as long as it can move into the process chamber 111 where the second carrier part 420 is located, and the wafer 700 can be placed between the first carrier part 410 and the second carrier part. Reprinted between 420.
  • the semiconductor chamber disclosed in the present application may further include a detection element and a control element, and the detection element and the control element may be connected in a controllable manner.
  • the detection element can be arranged in the process chamber 111 where the first bearing part 410 is located. The detection element is used to detect the distance between the first bearing part 410 and the isolation valve 200.
  • the detection element is used to detect that the first bearing part 410 is in its corresponding The distance between the process chamber 111 and the isolation valve 200 , that is, the distance between the first carrying part 410 in the non-transported state or the transport back to its corresponding process chamber 111 and the isolation valve 200 .
  • the control element controls the isolation valve 200 to open or close.
  • the isolation valve 200 has been opened, thereby Collision between the first carrying part 410 or the wafer 700 and the isolation valve 200 is avoided.
  • the isolation valve 200 can be closed to prevent the first carrier 410 or the wafer from 700 collides with isolation valve 200 .
  • This solution can improve the safety performance of the semiconductor chamber, and prevent the first carrying part 410 or the wafer 700 from colliding with the isolation valve 200.
  • the preset safety switch distance can be the distance between the bearing surface of the first bearing part 410 and the bottom surface of the isolation valve 200, and the distance can be 5mm, and of course, can also be other values, which are not limited herein.
  • the first bearing part 410 moves to the position of the highest point in the adjacent process chamber 111 and may be lower than the top of the process chamber 111 by more than 2 mm, thereby preventing the first bearing part 410 from colliding with the process chamber. The top of the 111 collided.
  • the isolation valve 200 can be a pneumatically controlled valve, and the semiconductor chamber disclosed in the present application can also include a vent line, and the vent line can be connected with the isolation valve 200. By controlling the vent line Vent or cut off to control the opening or closing of the isolation valve 200 .
  • the opening or closing of the isolation valve 200 is controlled by opening or closing the ventilation pipeline, thereby simplifying the opening or closing process of the isolation valve 200 .
  • the ventilation in the ventilation pipeline is stopped, thereby causing the isolation valve 200 to be closed by mistake, and the isolation valve 200 may collide with the first bearing part 410 easily.
  • the gas pipeline may include a first ventilation pipeline and a second ventilation pipeline, and both the first ventilation pipeline and the second ventilation pipeline may communicate with the isolation valve 200 .
  • the isolation valve 200 is opened.
  • the isolation valve 200 is closed.
  • the opening and closing of the valves are controlled by two ventilation lines, and the isolation valve 200 is only opened when the first ventilation line is ventilated and the second ventilation line is cut off.
  • the isolation valve 200 is only closed when the first ventilation pipeline is cut off and the second ventilation pipeline is ventilated. Therefore, when the first ventilation pipeline and the second ventilation pipeline are not ventilated or both are ventilated, the state of the isolation valve 200 is both. Therefore, it is avoided that the isolation valve 200 is accidentally opened or closed due to misoperation, and the isolation valve 200 is prevented from colliding with the first bearing part 410, thereby damaging the isolation valve 200 or the first bearing part 410, so as to improve the performance of the semiconductor chamber. security.
  • the first carrying part 410 transports the wafer 700 to the adjacent process chamber 111
  • the distance between the first carrying part 410 and the isolation valve 200 is greater than or equal to the preset safety In the case of the switch distance, the first ventilation pipeline is ventilated, and the second ventilation pipeline is cut off, so that the isolation valve 200 is opened, and the isolation valve 200 remains open after opening.
  • the first ventilation pipeline is cut off, and the second ventilation pipeline is ventilated, so that The isolation valve 200 is closed, and the isolation valve 200 remains closed after being closed.
  • the embodiment of the present invention also discloses a semiconductor process equipment, and the disclosed semiconductor manufacturing equipment has the semiconductor chamber of any of the above-mentioned embodiments.
  • the semiconductor process equipment includes a first process chamber and a second process chamber, and the first process chamber may be the semiconductor chamber of any one of the above-mentioned embodiments.
  • the number of the first process chamber and the second process chamber is multiple, and the multiple first process chambers and the multiple second process chambers are distributed at intervals, and the wafer 700 in each first process chamber can be transferred to an idle in the second process chamber.
  • the first process chamber is used for annealing the wafer 700
  • the second process chamber may be a CVD chamber, an etching chamber, and other process chambers.
  • the first process chamber and the second process chamber in the semiconductor process equipment disclosed in this application can also adopt the layout shown in Figure 1, and the No. 1 chamber and No. 2 chamber can be replaced by the semiconductor chamber disclosed in this application.
  • Chambers, chambers 3 to 6 are a plurality of second process chambers.
  • the wafer processed in No. 3 chamber can be put into No. 1 chamber
  • the wafer 700 processed in No. 4 chamber can be transferred into No. 2 chamber
  • the wafer 700 in No. 5 chamber and No. 6 chamber waits for 1 After Chamber No. 2 and Chamber No. 2 are free, they can be transferred.
  • the semiconductor chamber can be compatible with at least two different processes, so the semiconductor process equipment can increase the number of process chambers without changing the total number of process chambers, and can improve the production capacity of the semiconductor process equipment .

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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Abstract

La présente invention concerne une chambre à semi-conducteur et un dispositif de traitement de semi-conducteur. La chambre à semi-conducteur comprend un premier corps de chambre, une vanne d'isolement, des ensembles de régulation de température, une première partie de palier, et une deuxième partie de palier, la vanne d'isolement étant disposée dans le premier corps de chambre, la vanne d'isolement sépare une cavité interne du premier corps de chambre pour former au moins deux cavités de traitement, le premier corps de chambre est pourvu d'un orifice de transport de tranche, et l'orifice de transport de tranche est en communication avec l'une des au moins deux cavités de traitement ; chaque cavité de traitement est pourvue en son intérieur de l'ensemble de régulation de température, et les effets de régulation de température des deux ensembles de régulation de température dans deux cavités de traitement adjacentes sont différents ; et la première partie de palier et la deuxième partie de palier sont respectivement situées dans deux cavités de traitement adjacentes, et à condition que la vanne d'isolement entre les deux cavités de traitement adjacentes soit mise en marche, la première partie de palier peut se déplacer dans la cavité de traitement où la deuxième partie de palier est située, et une tranche peut être transférée entre la première partie de palier et la deuxième partie de palier. La solution ci-dessus peut résoudre le problème de la capacité insuffisante d'un dispositif de traitement de semi-conducteur.
PCT/CN2022/112665 2021-08-18 2022-08-16 Chambre à semi-conducteur et dispositif de traitement de semi-conducteur WO2023020454A1 (fr)

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CN202110947384.8A CN115938972A (zh) 2021-08-18 2021-08-18 半导体腔室及半导体工艺设备
CN202110947384.8 2021-08-18

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110253037A1 (en) * 2009-10-09 2011-10-20 Canon Anelva Corporation Vacuum heating and cooling apparatus
CN104616955A (zh) * 2013-11-04 2015-05-13 北京北方微电子基地设备工艺研究中心有限责任公司 一种等离子体加工设备
CN104752275A (zh) * 2013-12-29 2015-07-01 北京北方微电子基地设备工艺研究中心有限责任公司 工艺腔室以及半导体加工设备
CN110828273A (zh) * 2018-08-09 2020-02-21 北京北方华创微电子装备有限公司 等离子体设备和等离子体系统
CN111323076A (zh) * 2018-12-13 2020-06-23 夏泰鑫半导体(青岛)有限公司 检测装置及工艺腔室检测方法
CN111477582A (zh) * 2020-05-28 2020-07-31 深圳市捷佳伟创新能源装备股份有限公司 硅片的工艺腔体、硅片加工设备和硅片加工方法
CN112490149A (zh) * 2020-11-13 2021-03-12 北京北方华创微电子装备有限公司 半导体工艺设备、检测工艺腔室中是否存在晶圆的方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4209357A (en) * 1979-05-18 1980-06-24 Tegal Corporation Plasma reactor apparatus
TW526580B (en) * 2002-01-24 2003-04-01 Taiwan Semiconductor Mfg Semiconductor wafer transmission system combined with temperature control apparatus
US8587331B2 (en) * 2009-12-31 2013-11-19 Tommie E. Berry Test systems and methods for testing electronic devices
CN110416351A (zh) * 2018-04-27 2019-11-05 北京创昱科技有限公司 晶片加工系统

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110253037A1 (en) * 2009-10-09 2011-10-20 Canon Anelva Corporation Vacuum heating and cooling apparatus
CN104616955A (zh) * 2013-11-04 2015-05-13 北京北方微电子基地设备工艺研究中心有限责任公司 一种等离子体加工设备
CN104752275A (zh) * 2013-12-29 2015-07-01 北京北方微电子基地设备工艺研究中心有限责任公司 工艺腔室以及半导体加工设备
CN110828273A (zh) * 2018-08-09 2020-02-21 北京北方华创微电子装备有限公司 等离子体设备和等离子体系统
CN111323076A (zh) * 2018-12-13 2020-06-23 夏泰鑫半导体(青岛)有限公司 检测装置及工艺腔室检测方法
CN111477582A (zh) * 2020-05-28 2020-07-31 深圳市捷佳伟创新能源装备股份有限公司 硅片的工艺腔体、硅片加工设备和硅片加工方法
CN112490149A (zh) * 2020-11-13 2021-03-12 北京北方华创微电子装备有限公司 半导体工艺设备、检测工艺腔室中是否存在晶圆的方法

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