WO2023018043A1 - Micro-bump, interposer for electrical connection having same, semiconductor package having same, multi-stacked semiconductor device having same, and display having same - Google Patents

Micro-bump, interposer for electrical connection having same, semiconductor package having same, multi-stacked semiconductor device having same, and display having same Download PDF

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Publication number
WO2023018043A1
WO2023018043A1 PCT/KR2022/010482 KR2022010482W WO2023018043A1 WO 2023018043 A1 WO2023018043 A1 WO 2023018043A1 KR 2022010482 W KR2022010482 W KR 2022010482W WO 2023018043 A1 WO2023018043 A1 WO 2023018043A1
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Prior art keywords
micro
bump
substrate
interposer
same
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PCT/KR2022/010482
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English (en)
French (fr)
Inventor
Bum Mo Ahn
Seung Ho Park
Sung Hyun Byun
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Point Engineering Co., Ltd.
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Publication of WO2023018043A1 publication Critical patent/WO2023018043A1/en

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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]

Definitions

  • the present disclosure relates to a micro-bump, an interposer for electrical connection having the same, a semiconductor package having the same, a multi-stacked semiconductor device having the same, and a display having the same.
  • a conventional flip-chip bonding method using solder bumps has been generally used because it is advantageous over a wire bonding method in that the electrical performance is excellent due to a minimized connection length between a chip and a substrate, the degree of integration of input/output terminals is high, and the internal heat can be rapidly dissipated by distributing the heat dissipation path.
  • the pitch between the terminals has been decreased, the pitch between solder bumps has also naturally become narrower.
  • the conventional method using the solder bumps there is a high possibility that when the solder bump is melted, a short-circuit occurs between adjacent solder bumps.
  • the size of the solder bump is reduced, the distance between the chip and the substrate becomes too short, thereby increasing the difficulty of an underfill process, and the parasitic capacitance significantly increases in a high frequency band due to the reduced distance between the chip and the substrate.
  • the current density and thermal energy density increase in a bump connection part due to the reduced size of the solder bump.
  • micro-light-emitting diode (micro-LED) displays have emerged as another type of next generation display.
  • Liquid crystal and organic materials are the core materials of liquid-crystal displays (LCDs) and organic light-emitting diodes (OLEDs), respectively, whereas the micro-LED display uses 1 ⁇ m to 100 ⁇ m LED chips themselves as a light emitting material. Since the micro-LED has a terminal size and pitch in micrometer ( ⁇ m) unit, the above-mentioned problems also occur in bonding the micro-LED to a substrate (circuit board) using the conventional method using the solder bumps.
  • Patent Document 1 Korean Patent No. 10-1610326
  • the present disclosure has been made keeping in mind the above problems occurring in the related art, and the present disclosure is intended to propose a micro-bump, an interposer for electrical connection having the same, a semiconductor package having the same, a multi-stacked semiconductor device having the same, and a display having the same that can cope with a narrow pitch between terminals and prevent an increase in current density and thermal energy density in a bump connection part.
  • a method of manufacturing a micro-bump including an electrically conductive material part forming step of forming an electrically conductive material part in a through-hole provided in a body made of an anodic aluminum oxide film.
  • an interposer for electrical connection including: a body made of an anodic aluminum oxide film having a through-hole; and a micro-bump provided in the through-hole, wherein the micro-bump may include an electrically conductive material part.
  • the electrically conductive material part may include at least one selected from among Cu, Al, W, Au, Ag, Mo, Ta, or an alloy thereof.
  • a micro-bump including: an electrically conductive material part; and a plurality of fine trenches provided in a side surface of the electrically conductive material part.
  • the fine trenches may be provided along the entire perimeter of the side surface of the electrically conductive material part.
  • a semiconductor package including: a device; a substrate on which the device is mounted; and a micro-bump provided between the device and the substrate, wherein the micro-bump may have a column shape, and a fine trench may be provided in at least a portion of a side surface of the micro-bump in a circumferential direction.
  • a semiconductor package including: a device; a substrate on which the device is mounted; and a micro-bump provided under the substrate, wherein the micro-bump may have a column shape, and a fine trench may be provided in at least a portion of a side surface of the micro-bump in a circumferential direction.
  • a multi-stacked semiconductor device including: a plurality of devices; and a micro-bump provided between the devices, wherein the micro-bump may have a column shape, and a fine trench may be provided in at least a portion of a side surface of the micro-bump in a circumferential direction.
  • a display including: a device; a substrate on which the device is mounted; and a micro-bump provided between the device and the substrate, wherein the micro-bump may have a column shape, and a fine trench may be provided in at least a portion of a side surface of the micro-bump in a circumferential direction.
  • the present disclosure can provide a micro-bump, an interposer for electrical connection having the same, a semiconductor package having the same, a multi-stacked semiconductor device having the same, and a display having the same that can cope with a narrow pitch between terminals and prevent an increase in current density and thermal energy density in a bump connection part.
  • FIG. 1 is a perspective view illustrating a micro-bump according to an exemplary embodiment of the present disclosure.
  • FIGS. 2a to 2f are views illustrating a method of manufacturing the micro-bump according to the exemplary embodiment of the present disclosure.
  • FIGS. 3a and 3b are views illustrating a semiconductor package according to an exemplary embodiment of the present disclosure.
  • FIGS. 4 to 14 are views illustrating a method of manufacturing the semiconductor package according to the exemplary embodiment of the present disclosure.
  • FIG. 15 is a view illustrating a configuration in which a semiconductor package according to an exemplary embodiment of the present disclosure is mounted on a circuit board.
  • FIG. 16 is a view illustrating a multi-stacked semiconductor device according to an exemplary embodiment of the present disclosure.
  • FIGS. 17a to 23b are views illustrating a method of manufacturing a display according to an exemplary embodiment of the present disclosure.
  • a device 10 which will be described below may be a semiconductor device having fine-pitched chip terminals, a memory chip, a microprocessor chip, a logic chip, a light-emitting device, or a combination thereof.
  • the device 10 is not particularly limited and examples thereof include a logic LSI (such as an ASIC, an FPGA, and an ASSP), a microprocessor (such as a CPU and a GPU), a memory (such as a DRAM and a hybrid memory cube (HMC), a magnetic RAM (MRAM), a phase-change memory (PCM), a resistive RAM (ReRAM), a ferroelectric RAM (FeRAM), a flash memory (such as NAND flash), a semiconductor light-emitting device (such as an LED, a mini LED, and a micro-LED), a power device, an analog IC (such as a DC-AC converter and an insulating gate bipolar transistor (IGBT)), an MEMS (such as an acceleration sensor, a pressure sensor, a vibrator
  • a substrate 20 to be described below includes a circuit board, a wiring board, a package substrate, a temporary substrate, an intermediate substrate, and the like, and also includes all substrates electrically connected to the device 10 directly or indirectly.
  • micro-bump 150 according to an exemplary embodiment of the present disclosure will be described hereinafter.
  • micro-bump 150 according to the exemplary embodiment of the present disclosure will be described with reference to FIGS. 1 to 2f.
  • FIG. 1 is a perspective view illustrating the micro-bump 150 according to the exemplary embodiment of the present disclosure.
  • FIGS. 2a to 2f are views illustrating a method of manufacturing the micro-bump 150 according to the exemplary embodiment of the present disclosure.
  • the micro-bump 150 according to the exemplary embodiment of the present disclosure includes an electrically conductive material part 130.
  • the electrically conductive material part 130 may include at least one selected from among Cu, Al, W, Au, Ag, Mo, Ta, or an alloy thereof.
  • the electrically conductive material part 130 may be made of copper (Cu) or an alloy containing copper (Cu) as a main component.
  • the micro-bump 150 may have a cylindrical shape. However, the shape of the micro-bump 150 is not limited thereto. The micro-bump 150 may have various shapes including a polygonal prism shape.
  • the micro-bump 150 may include a bonding material part (not illustrated) provided on at least a portion of an upper portion and a lower portion of the electrically conductive material part 130.
  • the bonding material part includes at least one selected from among Sn, AgSn, Au, PbSn, SnAgCu, SnAgBi, AuSn, In, InSn, or an alloy containing Sn.
  • the bonding material part includes a first bonding material part provided on the upper portion of the electrically conductive material part 130 and a second bonding material part provided on the lower portion of the electrically conductive material part 130.
  • FIGS. 2a to 2f A method of manufacturing the micro-bump 150 according to the exemplary embodiment of the present disclosure will be described with reference to FIGS. 2a to 2f.
  • the method of manufacturing the micro-bump 150 includes an electrically conductive material part forming step of forming an electrically conductive material part 130 in a through-hole 123 provided in a body 110 made of an anodic aluminum oxide film.
  • a step of preparing the body 110 made of the anodic aluminum oxide film and having a seed layer 200 thereunder is performed.
  • the seed layer 200 is provided under the body 110 made of the anodic aluminum oxide film.
  • the body 110 is manufactured by anodizing a base metal and then removing the base metal.
  • the seed layer 200 is provided on one surface of the body 110 by a deposition method.
  • the seed layer 200 is formed to improve plating characteristics during electroplating.
  • the body 110 made of the anodic aluminum oxide film is manufactured by anodizing a base metal and then removing the base metal.
  • the anodic aluminum oxide film denotes a film formed by anodizing a metal as a base material
  • pores 111 denotes a hole formed in the process of forming the anodic aluminum oxide film by anodizing the metal.
  • the metal as the base material is aluminum (Al) or an aluminum alloy
  • the anodization of the base material forms the anodic aluminum oxide film consisting of anodized aluminum (Al 2 O 3 ) on a surface of the base material.
  • the base metal is not limited thereto, and includes Ta, Nb, Ti, Zr, Hf, Zn, W, Sb, or an alloy thereof.
  • the resulting anodic aluminum oxide film includes a barrier layer in which no pores 111 are formed therein in a vertical direction, and a porous layer in which the pores 111 are formed therein. After removing the base material on which the anodic aluminum oxide film having the barrier layer and the porous layer is formed, only the anodic aluminum oxide film consisting of anodized aluminum (Al 2 O 3 ) remains.
  • the anodic aluminum oxide film may have a structure in which the barrier layer formed during the anodization is removed to expose the top and bottom of the pores 111, or a structure in which the barrier layer formed during the anodization remains to close one of the top and bottom of the pores 111.
  • the anodic aluminum oxide film has a coefficient of thermal expansion of 2 to 3 ppm/°C. With this, the anodic aluminum oxide film is less likely to undergo thermal deformation due to temperature when exposed to a high temperature environment. Thus, even when the micro-bump is manufactured in a high-temperature environment, a precise micro-bump 150 can be manufactured without thermal deformation.
  • a step of forming a plurality of through-holes 123 in the body 110 is performed.
  • the body 110 has the through-hole 123 provided separately from the pores 111 and having a width greater than that of the pores 111.
  • the through-hole 123 may be formed to have a width in the range of several ⁇ m to several hundred ⁇ m.
  • the through-hole 123 may be provided by an etching process.
  • the plurality of through-holes may be simultaneously formed by a single etching process using an etching solution (e.g., alkali solution) that wet-reacts with the anodic aluminum oxide film. This is advantageous in terms of production speed and manufacturing cost compared to the technology of forming one via hole at one time.
  • the through-holes 123 may be formed by forming a photoresist on one surface of the body 110, patterning the photoresist to form opening regions, and then flowing the etching solution through the opening regions.
  • the through-holes 123 have a cross-sectional shape that corresponds to the shape of the patterned opening regions.
  • the cross-sectional shape of the through-holes 123 is not limited, and the through-holes 123 resulting from the reaction of the anodic aluminum oxide film with the etching solution each have a vertical inner wall.
  • the through-holes 123 may have a circular cross-section.
  • a step of forming the electrically conductive material part 130 by electroplating using the seed layer 200 is performed.
  • the electrically conductive material part 130 is formed in each of the through-holes 123 of the body 110.
  • the seed layer 200 provided under the body 110 is removed.
  • the seed layer 200 may be removed using an etchant.
  • the part manufactured up to this process step has the micro-bumps 150 in the body 110 made of the anodic aluminum oxide film, and may serve as an interposer 100 for electrical connection which will be described later.
  • a support film T is attached to an upper or lower surface of the body 110.
  • the body 110 the anodic aluminum oxide film is removed, so that the micro-bumps 150 remain attached to the support film T.
  • the micro-bumps 150 attached to the support film T may be transferred for the next process while maintaining a gap therebetween.
  • the electrically conductive material part 130 fills the inside of each of the through-holes 123 having the vertical inner wall to form the column-shaped micro-bump 150.
  • Thee column-shaped micro-bump 150 has the same cross-sectional area from the lower surface to the upper surface of the body 110, and thus is advantageous in terms of efficient electric flow compared to, for example, a spherical or conical micro-bump that has a non-vertical inner wall.
  • a thermal and electrical bottleneck section is formed in the case of a micro-bump in which the inner wall thereof does not have a vertical shape and the cross-sectional area thereof gradually decreases from the lower surface to the upper surface thereof or gradually decreases from the peripheral portion toward the central portion thereof.
  • the micro-bump 150 according to the exemplary embodiment of the present disclosure has no thermal and electrical bottleneck section because the cross-sectional area thereof is uniform from the lower surface to the upper surface thereof.
  • the micro-bump 150 may be configured in a circular column shape having a circular cross-section. With this, the micro-bump 150 has a larger volume than a conventional ball-shaped solder bump and thus has an effect of reducing current density and thermal energy density.
  • the electrically conductive material part 130 is formed by the plating process, it is possible to limit the height of the micro-bump 150 to the height of the through-hole 123, thereby reducing a height deviation between a plurality of micro-bumps 150.
  • the temperature is raised to a high temperature and pressure is applied to pressurize a metal layer on which the plating process is completed so that the electrically conductive material part 130 is made more dense.
  • a photoresist is used as a mold, the process of raising the temperature to a high temperature and applying pressure cannot be performed because the photoresist exists around the metal layer after the plating process is completed.
  • the body 110 made of the anodic aluminum oxide film is provided around the electrically conductive material part 130 on which the plating process is completed, even when the temperature is raised to a high temperature, it is possible to densify the electrically conductive material part 130 with minimized deformation because of the low coefficient of thermal expansion of the anodic aluminum oxide film.
  • the electrically conductive material part 130 with a higher density compared to the technique using the photoresist as the mold.
  • the micro-bump 150 has a height in the range of 70 ⁇ m to 200 ⁇ m. In addition, the micro-bump 150 has a diameter in the range of 10 ⁇ m to 200 ⁇ m. Of course, these dimensions are only an example, and the micro-bump 150 may be formed with a smaller dimension.
  • a fine trench 155 is provided in a side surface of the micro-bump 150.
  • the fine trench 155 is formed in an outer circumferential surface of the micro-bump 150.
  • the fine trench 155 is formed in the form of a groove extending from the side surface of the micro-bump 150 in a height direction of the micro-bump 150.
  • a plurality of fine trenches 155 are provided in a side surface of the electrically conductive material part 130.
  • the fine trenches 155 are provided along the entire perimeter of the side surface of the electrically conductive material part 130.
  • the fine trenches 155 are provided in the entire side surface of the electrically conductive material part 130.
  • the fine trenches 155 have a depth in the range of 20 nm to 1 ⁇ m and a width in the range of 20 nm to 1 ⁇ m.
  • the width and depth of the fine trenches 155 are less than the diameter of the pores 111 formed in the body 110.
  • portions of the pores 111 of the body 110 may be crushed by the etching solution to at least partially form a fine trench 155 having a depth greater than the diameter of the pores 111 formed during the anodization.
  • the body 110 includes a large number of pores 111, and at least portions of the body 110 are etched to form the through-holes 123, and the electrically conductive material part 130 is formed in each of the through-holes 123, the fine trenches 155 are provided in the side surface of the micro-bump 150 as a result of contact between the micro-bump 150 and the pores 111 of the body 110.
  • the fine trenches 155 have a corrugated shape in which peaks and valleys with a depth in the range of 20 nm to 1 ⁇ m are repeated in a circumferential direction and thus have an effect of increasing the surface area of the side surface of the micro-bump 150.
  • the surface area of the side surface of the micro-bump 150 can be further increased by the configuration of the fine trenches 155.
  • the surface area through which a current flows can be increased by a skin effect, so that the density of the current flowing along the micro-bump 150 can be increased, thereby improving electrical characteristics of the micro-bump 150.
  • heat generated in the micro-bump 150 is rapidly dissipated, thereby suppressing a rise in the temperature of the micro-bump 150.
  • the interposer 100 for electrical connection may include a body 110 made of an anodic aluminum oxide film and the micro-bump 150 provided in a through-hole 123 of the body 110.
  • the micro-bump 150 may maintain a fixed state in the through-hole 123.
  • the micro-bump 150 includes an electrically conductive material part 130.
  • the interposer 100 for electrical connection which will be described below includes both a configuration in which the body 110 made of the anodic aluminum oxide film and the micro-bump 150 are provided together, and a configuration in which only the micro-bump 150 is provided while the body 110 made of the anodic aluminum oxide film is removed.
  • the micro-bump 150 serves as an electrical connection member.
  • the micro-bump may include a bonding material part (not illustrated) provided on at least a portion of an upper portion and a lower portion of the electrically conductive material part 130, and thus the interposer 100 for electrical connection may also include a bonding material part (not illustrated).
  • FIGS. 3a and 3b are views illustrating the semiconductor package 400 according to the exemplary embodiment of the present disclosure.
  • the semiconductor package 400 includes: a device 10; a substrate 20 on which the device 10 is mounted; and an interposer 100 for electrical connection provided between the device 10 and the substrate 20.
  • the interposer 100 for electrical connection includes a body 110 made of an anodic aluminum oxide film having a through-hole 123; and an electrically conductive material part 130 provided in the through-hole 123.
  • the semiconductor package 400 in which the device 10 is electrically connected to the substrate 20 may be configured only with the micro-bump 150.
  • the semiconductor package 400 includes: the device 10; the substrate 20 on which the device 10 is mounted; and the micro-bump 150 provided between the device 10 and the substrate 20.
  • the micro-bump 150 is formed in a column shape, and a plurality of fine trenches 155 in which peaks and valleys are repeated in a circumferential direction are provided in an outer circumferential surface of the micro-bump 150.
  • a terminal 11 of the device 10 and a terminal 21 of the substrate 20 are electrically connected to each other by the electrically conductive material part 130.
  • a first bonding material (not illustrated) may be provided between the terminal 11 of the device 10 and the micro-bump 150, and a second bonding material (not illustrated) may be provided between the terminal 21 of the substrate 20 and the micro-bump 150.
  • Each of the first bonding material and the second bonding material includes at least one at least one selected from among Sn, AgSn, Au, PbSn, SnAgCu, SnAgBi, AuSn, In, InSn, or an alloy containing Sn.
  • the bonding between the first and second bonding materials and the terminals 11 and 21 may be performed through a thermocompression process or a reflow process.
  • the substrate 20 may include a substrate base 23, and an upper wiring layer 22 and a lower wiring layer 24 formed on upper and lower surfaces of the substrate base 23, respectively.
  • the substrate base 23 of the substrate 20 may be made of at least one material selected from among phenol resin, epoxy resin, and polyimide.
  • the substrate base 23 may include at least one material selected from among FR4, tetrafunctional epoxy, polyphenylene ether, epoxy/polyphenylene oxide, bismaleimide triazine (BT), Thermount, cyanate ester, polyimide, and liquid crystalline polymer.
  • An external connection terminal 25 may be provided under the lower wiring layer 24.
  • FIGS. 4 to 14 A method of manufacturing the semiconductor package 400 according to the exemplary embodiment of the present disclosure will be described with reference to FIGS. 4 to 14.
  • the method of manufacturing the semiconductor package 400 in which a device 10 is mounted on a substrate 20 includes providing an interposer 100 for electrical connection between the device 10 and the substrate 20, the interposer 100 being provided with an electrically conductive material part 130 provided in a through-hole 123 of a body 110 made of an anodic aluminum oxide film having the through-hole 123.
  • the body 110 made of the anodic aluminum oxide film is prepared.
  • the body 110 is manufactured by anodization of a base metal.
  • the diameter of pores 111 included in a porous layer may be in the range of several nm to several hundred nm.
  • the body 100 manufactured through the anodization may have a structure in which a barrier layer formed during the anodization is provided on at least one surface thereof, or the barrier layer formed during the anodization is removed from the least one surface thereof to expose the top and bottom of the pores 111.
  • wafer level packaging is possible by providing the interposer 100 for electrical connection between the device 10 and the substrate 20.
  • each micro-bump 150 since it is possible to form the body 110 made of the anodic aluminum oxide film with a thickness of equal to or greater than 100 ⁇ m, it is possible to form each micro-bump 150 with a uniform height of equal to or greater than 100 ⁇ m.
  • a seed layer 200 is provided under the body 110.
  • the seed layer 200 provided under the body 110 is used in a plating process of the electrically conductive material part 130.
  • a through-hole 123 having a width greater than that of the pores 111 is formed in the body 110 separately from the pores 111.
  • the through-hole 123 may be formed to have a width in the range of several ⁇ m to several tens of ⁇ m.
  • a plurality of through-holes 123 are formed simultaneously by a single etching process.
  • the cross-sectional shape of the through-holes 123 is not limited, and the through-holes 123 resulting from the reaction of the anodic aluminum oxide film with an etching solution each have a vertical inner wall.
  • a conductive material fills the inside of each of the through-holes 123 having the vertical inner wall to form a micro-bump 150. This is advantageous in terms of efficient electric flow compared to a via conductor that has a non-vertical inner wall.
  • the through-holes 123 may be formed by forming a photoresist on an upper surface of the body 110, patterning the photoresist to form opening regions, and then flowing the etching solution through the opening regions.
  • the through-holes 123 have a cross-sectional shape that corresponds to the shape of the patterned opening regions.
  • the cross-sectional shape of the through-holes 123 may be polygonal as well as circular.
  • the electrically conductive material part 130 fills each of the through-holes 123 to form the micro-bump 150.
  • the configuration and manufacturing method of the micro-bump 150 and the configuration and manufacturing method of the interposer 100 for electrical connection may include the configurations of the above-described embodiments.
  • the electrically conductive material part 130 may be made of at least one at least one selected from among Cu, Al, W, Au, Ag, Mo, and Ta.
  • micro-bump 150 Since the micro-bump 150 is formed in a cylindrical shape, it has a larger volume than that in the case of a spherical shape, and since the electrically conductive material part 130 is provided in a cylindrical shape, it has an effect of reducing the current density and thermal energy density concentrated on the micro-bump 150.
  • the body 110 having the through-holes 123 serves as a mold for electroplating in manufacturing the micro-bump 150. Since the micro-bump 150 is manufactured in each of the through holes 123 by the plating process, the dense characteristics of the electrically conductive material part 130 can be improved. As a result, it is possible to manufacture a highly reliable micro-bump 150 due to a reduced current resistance. In addition, since the micro-bump 150 is manufactured in each of the through holes 123 by the plating process, shape precision can be improved and various cross-sectional shapes can be implemented. In addition, even when a plurality of micro-bumps 150 are formed in the body 110, a height deviation between the micro-bumps 150 can be minimized.
  • the body 110 made of the anodic aluminum oxide film includes a large number of pores 111, and at least portions of the body 110 are etched to form the through-holes 123, and the electrically conductive material part 130 is formed in each of the through-holes 123, a plurality of fine trenches 155 are provided in a side surface of the micro-bump 150 as a result of contact between the micro-bump 150 and the pores 111 of the body 110. With the configuration of the fine trenches 155, the surface area of the micro-bump 150 can be further increased.
  • the interposer 100 for electrical connection is provided, the interposer 100 including the body 110 made of the anodic aluminum oxide film having the through-holes 123 and the micro-bumps 150 provided in the through-holes 123.
  • a step of providing the interposer 100 for electrical connection between the device 10 and the substrate 20 is performed. This step may be achieved by (i) bonding the device 10 to the interposer 100 for electrical connection first and then bonding the interposer 100 electrical connection to the substrate 20 (FIGS. 8 and 9) or (ii) bonding the interposer 100 for electrical connection to the substrate 20 first and then bonding the device 10 to the interposer 100 for electrical connection (FIGS. 10 and 11).
  • the device 10 is mounted on an upper surface of the interposer 100 for electrical connection.
  • Each terminal 11 of the device 10 is bonded to correspond to each of the micro-bumps 150 of the interposer 100 for electrical connection.
  • FIG. 8 illustrates that two devices 10 are mounted on the upper surface of the interposer 100 for electrical connection, the number of the devices 10 is not limited thereto and the devices 10 may be mounted in a sufficient number to enable wafer level packaging.
  • the interposer 100 for electrical connection on which the devices 10 are mounted may be transferred to the substrate 20 and bonded on an upper surface of the substrate 20.
  • each terminal 21 of the substrate 20 is manufactured and provided in advance at a position corresponding to each of the micro-bumps 150 of the interposer 100 for electrical connection.
  • the respective terminals 21 of the substrate 20 are electrically connected to the micro-bumps 150 of the interposer 100 for electrical connection.
  • the interposer 100 for electrical connection may be provided on the upper surface of the substrate 20 first, and then the devices 10 may be transferred and provided on the upper surface of the interposer 100 for electrical connection.
  • the micro-bumps 150 are electrically connected to the terminals 21 of the substrate 20 and are also electrically connected to the respective terminals 11 of the devices 10.
  • the semiconductor package 400 includes the devices 10, the substrate 20 on which the devices 10 are mounted, and the interposer 100 for electrical connection provided between the devices 10 and the substrate 20.
  • the semiconductor package 400 may be configured such that the body 110 made of the anodic aluminum oxide film is provided as illustrated in FIG. 12, or may be configured such that the body 110 is removed and only the micro-bumps 150 remain as illustrated in FIG. 13.
  • the body 110 may be selectively removed by a solution that selectively reacts only with the anodic aluminum oxide film.
  • the molding layer 300 may include a polymer material.
  • the molding layer 300 may be a molding compound layer.
  • the molding compound layer may include an epoxy-based resin in which a filler is dispersed.
  • the filler may include insulating fibers, insulating particles, other suitable elements, or a combination thereof.
  • CMP chemical mechanical polishing
  • the semiconductor package 400 electrically connects the device 10 and the substrate 20 each other by using the micro-bump 150.
  • the flip-chip process using the micro-bump 150 composed of the electrically conductive material part 130 has an advantage in that a finer connection between the device 10 and the substrate 20 is possible without reducing the distance therebetween.
  • the electrical conductivity and thermal conductivity of the electrically conductive material part 130 are superior to those of a solder alloy, it is possible to improve the electrical and thermal properties of the semiconductor package 400 using the micro-bump 150 composed of the electrically conductive material part 130.
  • the use of a photoresist pattern may be considered.
  • the micro-bump 150 needs to be formed to have a height of equal to or greater than 70 ⁇ m by electroplating using the photoresist pattern as a mold, the photoresist pattern has to also be formed to have a height of equal to or greater than 70.
  • the micro-bump 150 is manufactured using the body 110 made of the anodic aluminum oxide film instead of the photoresist pattern, it is possible to form the micro-bump 110 to have a height of equal to or greater than 70 ⁇ m. With this, it is possible to make the distance between the device 10 and the substrate 20 equal to or greater than the predetermined distance (equal to or greater than 70 ⁇ m), thereby improving the performance of the semiconductor package 400.
  • the fine trenches 155 are formed in the outer circumferential surface of the micro-bump 150 in the form of grooves extending in a height direction of the micro-bump 150, this makes it possible to facilitate transmission of high-frequency signals of the semiconductor package 400 and to improve heat dissipation characteristics.
  • an interposer 100 for electrical connection may be provided under a substrate 20.
  • the semiconductor package 400 according to the exemplary embodiment of the present disclosure may include a device 10; the substrate 20 on which the device 10 is mounted; and the interposer 100 for electrical connection provided under the substrate 20.
  • the interposer 100 for electrical connection may be additionally provided between the device 10 and the substrate 20.
  • the interposer 100 for electrical connection may be provided between the substrate 20 and the circuit board 600 to bond the semiconductor package 400 to the circuit board 600.
  • a method of manufacturing the semiconductor package 400 includes providing an interposer 100 for electrical connection under a substrate 20, the interposer 100 being provided with an electrically conductive material part 130 provided in a through-hole 123 of a body 110 made of an anodic aluminum oxide film having the through-hole 123.
  • FIG. 15 illustrates a state in which the body 110 made of the anodic aluminum oxide film is removed
  • a configuration in which the body 110 made of the anodic aluminum oxide film is provided in FIG. 15 is also included in one embodiment of the present disclosure.
  • the semiconductor package 400 includes the device 10, the substrate 20 on which the device 10 is mounted, and the micro-bump 150 provided under the substrate 20.
  • the micro-bump 150 is formed in a column shape, and a plurality of fine trenches 155 in which peaks and valleys are repeated in a circumferential direction are provided in an outer circumferential surface of the micro-bump 150.
  • the semiconductor package 400 is electrically connected to the circuit board 600 by using the micro-bump 150.
  • the multi-stacked semiconductor device 500 may include the micro-bump 150 provided between upper and lower adjacent devices 10 to electrically connect the upper and lower adjacent devices 10 to each other.
  • the multi-stacked semiconductor device 500 includes a plurality of devices 10 and an interposer 100 for electrical connection provided between the devices 10.
  • the interposer 100 for electrical connection includes a body 110 made of an anodic aluminum oxide film having a through-hole 123; and the micro-bump 150 provided in the through-hole 123.
  • the interposer 100 for electrical connection may be configured such that the body 110 made of the anodic aluminum oxide film is removed and only the micro-bump 150 is provided.
  • a method of manufacturing the multi-stacked semiconductor device 500 includes providing an interposer 100 for electrical connection between a plurality of devices 10, the interposer 100 being provided with a micro-bump 150 provided in a through-hole 123 of a body 110 made of an anodic aluminum oxide film having the through-hole 123.
  • the method may further include removing the body 110 made of the anodic aluminum oxide film after upper and lower adjacent devices 10 are all bonded together through the micro-bump 150.
  • FIG. 16 illustrates a state in which the body 110 made of the anodic aluminum oxide film is removed
  • a configuration in which the body 110 made of the anodic aluminum oxide film is provided in FIG. 16 is also included in one embodiment of the present disclosure.
  • the multi-stacked semiconductor device 500 includes the plurality of devices 10 and the micro-bump 150 provided between the devices 10.
  • the micro-bump 150 is formed in a column shape, and a plurality of fine trenches 155 in which peaks and valleys are repeated in a circumferential direction are provided in an outer circumferential surface of the micro-bump 150.
  • the fine trenches 155 have a corrugated shape in which peaks and valleys with a depth in the range of 20 nm to 1 ⁇ m are repeated in a circumferential direction and thus have an effect of increasing the surface area of a side surface of the micro-bump 150.
  • the multi-stacked semiconductor device 500 electrically connects the upper and lower adjacent devices 10 to each other by using the micro-bump 150.
  • the display includes: a device 10; a substrate 20 on which the device 10 is mounted; and an interposer 100 for electrical connection provided between the device 10 and the substrate 20.
  • the interposer 100 for electrical connection includes a body 110 made of an anodic aluminum oxide film having a through-hole 123; and the micro-bump 150 provided in the through-hole 123.
  • the interposer 100 for electrical connection may be configured such that the body 110 made of the anodic aluminum oxide film is removed and only the micro-bump 150 is provided.
  • the device 10 is a semiconductor LED, and includes a mini LED and a micro-LED.
  • the substrate 20 may be a circuit board having wiring lines.
  • the display according to the exemplary embodiment of the present disclosure may be configured such that the body 110 made of the anodic aluminum oxide film is removed selectively.
  • the method of manufacturing the display includes: providing an interposer 100 for electrical connection between a device 10 and a substrate 20, the interposer 100 being provided with a micro-bump 150 provided in a through-hole 123 of a body 110 made of an anodic aluminum oxide film having the through-hole 123; and bonding a second bonding material 143 to a terminal 21 of the substrate 20 and bonding a first bonding material 141 to a terminal 11 of the device 10.
  • the growth substrate 30 may be configured as a conductive substrate or an insulating substrate.
  • the growth substrate 30 may be made of at least one selected from among sapphire, SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga 2 0 3 .
  • Each of the devices 10 may include a first semiconductor layer, a second semiconductor layer, and an active layer provided between the first semiconductor layer and the second semiconductor layer.
  • the first semiconductor layer, the active layer, and the second semiconductor layer may be formed using metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular-beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or the like.
  • MOCVD metal organic chemical vapor deposition
  • CVD chemical vapor deposition
  • PECVD plasma-enhanced chemical vapor deposition
  • MBE molecular-beam epitaxy
  • HVPE hydride vapor phase epitaxy
  • the first semiconductor layer may be implemented, for example, as a p-type semiconductor layer.
  • a p-type semiconductor layer may be made of a semiconductor material having a composition formula of In x Al y Ga 1-x-y N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1) selected from among, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, and the like, and the layer may be doped with a p-type dopant such as Mg, Zn, Ca, Sr, or Ba.
  • the second semiconductor layer may include, for example, an n-type semiconductor layer.
  • An n-type semiconductor layer may be made of a semiconductor material having a composition formula of In x Al y Ga 1-x-y N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1) selected from among, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, and the like, and the layer may be doped with an n-type dopant such as Si, Ge, or Sn.
  • the active layer is a region where electrons and holes are recombined. As the electrons and the holes are recombined, the active layer transits to a low energy level and generates light having a wavelength corresponding thereto.
  • the active layer may be made of a semiconductor material having a composition formula of In x Al y Ga 1-x-y N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1) and may have a single quantum well structure or a multi-quantum well (MQW) structure.
  • the active layer may have a quantum wire structure or a quantum dot structure.
  • Each of the devices 10 includes at least two terminals 11.
  • the terminals 11 may be all provided on one surface of the device 10 or may be respectively provided on opposite surfaces of the device 10. However, in FIGS. 17a to 17c, it is illustrated that the terminals 11 are all provided on one surface of the device 10.
  • Each of the terminals 21 may include at least one layer and may be made of various conductive materials including a metal, conductive oxide, and conductive polymer.
  • the devices 10 are separated into individual pieces by cutting along a cutting line using a laser or the like or by etching.
  • the devices 10 have been described as being fabricated on the growth substrate 30 and provided on the growth substrate 30, but the devices 10 fabricated on the growth substrate 30 may be provided by being transferred from the growth substrate 30 to a temporary substrate or an intermediate substrate.
  • the exemplary embodiment of the present disclosure includes a case in which the growth substrate 30 illustrated in FIG. 17a is a temporary substrate or an intermediate substrate.
  • micro-bumps 150 are provided on the devices 10.
  • the micro-bumps 150 are positioned to correspond to the respective terminals 11 of the devices 10.
  • the two terminals 11 are provided on one surface of one device 10, and two micro-bumps 150 are provided to correspond to the terminals 11, respectively.
  • the micro-bumps 150 may be positioned on the device 10 by the interposer 100 for electrical connection having the body 110 made of the anodic aluminum oxide film, or the micro-bumps 150 may be positioned on the device 10 by being transferred by a separate picker.
  • the micro-bumps 150 are electrically connected to the terminals 11 of the devices 10.
  • the micro-bumps 150 are transferred together with the body 110 made of the anodic aluminum oxide film, only the body 110 made of the anodic aluminum oxide film may be selectively removed using an etching solution.
  • the devices 10 are inverted and transferred toward the substrate 20.
  • Terminals 21 are provided on an upper surface of the substrate 20 at positions corresponding to the terminals 11 of the devices 10. After aligning the positions of the terminals 11 of the devices 10 and the positions of the terminals 21 of the substrate 20 with each other, the devices 10 and the substrate 20 are moved relative to each other to approach each other.
  • the substrate 20 is a display substrate and may contain various materials.
  • the substrate 20 may be made of a transparent glass material having SiO2 as a main component.
  • the substrate 20 is not limited thereto, and may be made of a transparent plastic material and thus have solubility.
  • the plastic material may be an organic substance selected from among organic insulating substances, including polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide, polycarbonate (PC), cellulose triacetate (TAC), and cellulose acetate propionate (CAP).
  • PES polyethersulfone
  • PAR polyacrylate
  • PEI polyetherimide
  • PEN polyethylene naphthalate
  • PET polyethylene terephthalate
  • PPS polyphenylene sulfide
  • PC polycarbonate
  • TAC cellulose triacetate
  • the substrate 20 In the case of a bottom emission type in which an image is implemented in a direction of the substrate 20, the substrate 20 is required to be made of a transparent material. However, in the case of a top emission type in which an image is implemented in a direction opposite to the substrate 20, the substrate 20 is not necessarily required to be made of a transparent material.
  • the substrate 20 may be made of a metal. In the case of forming the substrate 20 using a metal, the substrate 20 may be made of at least one metal selected from among iron, chromium, manganese, nickel, titanium, molybdenum, stainless steel (SUS), Invar alloy, Inconel alloy, and Kovar alloy, but is not limited thereto.
  • the devices 10 are bonded to the substrate 20.
  • the micro-bumps 150 electrically connect the devices 10 and the substrate 20 to each other.
  • the growth substrate 30 is separated from the devices 10.
  • the growth substrate 30 may be separated from the devices 10 by a laser lift-off process.
  • the devices 10 are bonded to the interposer 100 for electrical connection first and then bonded to the substrate 20.
  • the display may be manufactured with a different process order, i.e., bonding the interposer 100 for electrical connection to the substrate 20 first and then bonding the devices 10 to the interposer 100 for electrical connection.
  • the substrate 20 having the terminals 21 on the upper surface thereof is prepared.
  • the interposer 100 for electrical connection is aligned on the substrate 20, and the micro-bumps 150 are bonded to the terminals 21 of the substrate 20.
  • the devices 10 fabricated on the growth substrate 30 are positioned on the interposer 100 for electrical connection, and then the terminals 11 of the devices 10 are bonded to the micro-bumps 150.
  • the devices 10 may be in a state supported by the growth substrate 30, or may be in a state supported by a temporary substrate or an intermediate substrate after being fabricated on the growth substrate 30 and transferred to the temporary substrate or the intermediate substrate.
  • the first bonding material (refer to the reference numeral 141 in FIGS. 21a to 22c) to the terminal 21 of the substrate 20 in the structure illustrated in FIG. 19b
  • the first bonding material (refer to the reference numeral 141 in FIGS. 21a to 22c) and the second bonding material (refer to the reference numeral 143 in FIGS. 21a to 22c) may be simultaneously bonded to the respective terminals 11 and 21 by a single bonding process.
  • the growth substrate 30 is separated from the devices 10.
  • the growth substrate 30 may be separated from the devices 10 by a laser lift-off process.
  • the body 110 made of the anodic aluminum oxide film is selectively removed from the interposer 100 for electrical connection by using an etching solution.
  • the devices 10 are electrically connected to the substrate 20 by the micro-bumps 150.
  • the micro-bumps 150 are transferred while being provided in the body 110 made of the anodic aluminum oxide film in the display manufacturing process.
  • the micro-bumps 150 are separately transferred without the body 110 made of the anodic aluminum oxide film in the display manufacturing process.
  • devices 10 are fabricated and disposed on a growth substrate 30.
  • the present disclosure is not limited to the growth substrate 30, and the devices 10 may be provided on a temporary substrate, an intermediate substrate, or an invertible pickup device in a stage before being transferred to a substrate 20.
  • the first bonding material 141 includes at least one at least one selected from among Sn, AgSn, Au, PbSn, SnAgCu, SnAgBi, AuSn, In, InSn, or an alloy containing Sn.
  • micro-bumps 150 are provided on the respective first bonding materials 141.
  • the micro-bumps 150 may be transferred onto the first bonding materials 141 by using a separate pickup device.
  • the micro-bumps 150 may be collectively transferred onto the terminals 11 of the devices 10 in a state attached to a support film T, and then the support film T may be removed so that the micro-bumps 150 are provided on the first bonding materials 141.
  • the devices 10 are inverted and transferred toward the substrate 20.
  • Terminals 21 are provided on an upper surface of the substrate 20 at positions corresponding to the terminals 11 of the devices 10. After aligning the positions of the terminals 11 of the devices 10 and the positions of the terminals 21 of the substrate 20 with each other, the devices 10 and the substrate 20 are moved relative to each other to approach each other.
  • a second bonding material 143 is provided on each of the terminals 21 of the substrate 20.
  • the second bonding material 143 includes at least one at least one selected from among Sn, AgSn, Au, PbSn, SnAgCu, SnAgBi, AuSn, In, InSn, or an alloy containing Sn.
  • the devices 10 are bonded to the substrate 20.
  • the micro-bumps 150 electrically connect the devices 10 and the substrate 20 to each other.
  • the growth substrate 30 is separated from the devices 10.
  • the display according to the exemplary embodiment of the present disclosure electrically connects the device 10 and the substrate 20 to each other by using the micro-bump 150.
  • the display including the device 10 such as a mini LED or a micro-LED includes the device 10 such as a mini LED or a micro-LED, the substrate 20 on which the device 10 is mounted, and the micro-bump 150 provided between the device 10 and the substrate 20.
  • the micro-bump 150 is formed in a column shape, and a plurality of fine trenches 155 in which peaks and valleys are repeated in a circumferential direction are provided in an outer circumferential surface of the micro-bump 150.
  • the fine trenches 155 have a corrugated shape in which peaks and valleys with a depth in the range of 20 nm to 1 ⁇ m are repeated in a circumferential direction and thus have an effect of increasing the surface area of a side surface of the micro-bump 150.
  • the micro-bump 150 having the fine trenches 155 on the outer circumferential surface thereof, it is possible to alleviate the phenomenon in which current density and thermal energy are concentrated in the micro-bump 150.
  • the device 10 such as a mini LED or a micro-LED, has a small size (horizontal and vertical lengths) in the range of several to tens of micrometers, and thus the distance between the terminals 11 provided on the device 10 is also very narrow, ranging from several to tens of micrometers. According to the exemplary embodiment of the present disclosure, it is possible to reliably bond the device 10 to the terminal 21 of the substrate 20 even within the above dimensional range of the device 10.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)
PCT/KR2022/010482 2021-08-12 2022-07-19 Micro-bump, interposer for electrical connection having same, semiconductor package having same, multi-stacked semiconductor device having same, and display having same WO2023018043A1 (en)

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KR10-2021-0106664 2021-08-12
KR1020210106664A KR20230024650A (ko) 2021-08-12 2021-08-12 마이크로 범프, 이를 구비하는 전기 연결용 인터포저, 반도체 패키지, 다단 적층형 반도체 소자 및 디스플레이

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100264036A1 (en) * 2007-11-30 2010-10-21 Fujifilm Corporation Microstructure
US20120119359A1 (en) * 2010-11-17 2012-05-17 Samsung Electronics Co., Ltd. Bump structure and semiconductor package having the bump structure
US20170316881A1 (en) * 2016-04-29 2017-11-02 The Regents Of The University Of California Electronic substrates and interposers made from nanoporous films
JP2019153415A (ja) * 2018-03-01 2019-09-12 富士フイルム株式会社 異方導電性部材、異方導電性部材の製造方法、および接合体の製造方法
WO2020096415A1 (en) * 2018-11-09 2020-05-14 Samsung Electronics Co., Ltd. Mounting structure for mounting micro led

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101610326B1 (ko) 2009-05-06 2016-04-07 엘지이노텍 주식회사 플립 칩 마이크로 범프 제조방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100264036A1 (en) * 2007-11-30 2010-10-21 Fujifilm Corporation Microstructure
US20120119359A1 (en) * 2010-11-17 2012-05-17 Samsung Electronics Co., Ltd. Bump structure and semiconductor package having the bump structure
US20170316881A1 (en) * 2016-04-29 2017-11-02 The Regents Of The University Of California Electronic substrates and interposers made from nanoporous films
JP2019153415A (ja) * 2018-03-01 2019-09-12 富士フイルム株式会社 異方導電性部材、異方導電性部材の製造方法、および接合体の製造方法
WO2020096415A1 (en) * 2018-11-09 2020-05-14 Samsung Electronics Co., Ltd. Mounting structure for mounting micro led

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