WO2022267051A1 - 导电过孔的制备方法、导电过孔及无源器件 - Google Patents

导电过孔的制备方法、导电过孔及无源器件 Download PDF

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Publication number
WO2022267051A1
WO2022267051A1 PCT/CN2021/102525 CN2021102525W WO2022267051A1 WO 2022267051 A1 WO2022267051 A1 WO 2022267051A1 CN 2021102525 W CN2021102525 W CN 2021102525W WO 2022267051 A1 WO2022267051 A1 WO 2022267051A1
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Prior art keywords
dielectric layer
via hole
connection via
connection
electrode
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PCT/CN2021/102525
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English (en)
French (fr)
Inventor
王熙元
曲峰
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京东方科技集团股份有限公司
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Priority to CN202180001640.2A priority Critical patent/CN115735434A/zh
Priority to US17/781,013 priority patent/US20240162138A1/en
Priority to PCT/CN2021/102525 priority patent/WO2022267051A1/zh
Publication of WO2022267051A1 publication Critical patent/WO2022267051A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864—Thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
    • H01L27/0676—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type comprising combinations of diodes, or capacitors or resistors
    • H01L27/0682—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type comprising combinations of diodes, or capacitors or resistors comprising combinations of capacitors and resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10—Inductors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators

Definitions

  • the disclosure belongs to the technical field of electronic components, and in particular relates to a preparation method of a conductive via, a conductive via and a passive device.
  • the present invention aims to solve at least one of the technical problems in the prior art, and provides a method for preparing a conductive via, a conductive via and a passive device.
  • an embodiment of the present disclosure provides a method for preparing a conductive via, which includes:
  • a dielectric layer is provided, and a connection via hole penetrating through the thickness direction is formed on the dielectric layer; the dielectric layer includes a first surface and a second surface oppositely arranged in the thickness direction;
  • connection electrode is formed in the connection via hole, a first extraction electrode is formed on the first surface, and a second extraction electrode is formed on the second surface;
  • connection electrode at least covers the inner wall of the connection via hole, and both the first lead-out electrode and the second lead-out electrode are electrically connected to the connection electrode.
  • the step of providing a dielectric layer and forming a connection via hole penetrating through its thickness direction on the dielectric layer includes:
  • a dielectric layer is provided, and mechanical drilling is performed on the dielectric layer to form the connection via hole penetrating through the thickness direction of the dielectric layer.
  • the material of the drill bit adopted by the mechanical drilling includes any one of tungsten carbide, tungsten-cobalt alloy, tungsten-titanium-cobalt alloy, natural diamond, and artificial diamond.
  • the step of providing a dielectric layer and forming a connection via hole penetrating through its thickness direction on the dielectric layer includes:
  • a dielectric layer is provided, and sandblasting drilling is performed on the dielectric layer to form the connection via hole penetrating through the thickness direction of the dielectric layer.
  • the step of performing sandblasting drilling on the dielectric layer to form the connection via hole penetrating through the thickness direction of the dielectric layer includes:
  • the sandblasting process uses compressed air as the driving force to form a high-speed jet stream with solid abrasive particles or a liquid mixed with solid abrasive particles, which is sprayed onto the first surface or second surface of the medium layer at high speed, forming a thickness within the thickness of the medium layer.
  • the connecting vias penetrating in the direction.
  • the solid abrasive particles include at least one of corundum, corundum, calcium carbonate, and quartz sand.
  • the step of providing a dielectric layer and forming a connection via hole penetrating through its thickness direction on the dielectric layer includes:
  • a dielectric layer is provided, and laser drilling is performed on the dielectric layer to form the connection via hole penetrating through the thickness direction of the dielectric layer.
  • the step of performing laser drilling on the dielectric layer to form the connection via hole penetrating in the thickness direction of the dielectric layer includes:
  • a laser is used to strike the first surface or the second surface of the dielectric layer in a manner of vertical incidence of the laser beam, so as to form the connection via hole penetrating through the thickness direction of the dielectric layer.
  • the laser is a continuous laser or a pulsed laser.
  • the step of providing a dielectric layer and forming a connection via hole penetrating through its thickness direction on the dielectric layer includes:
  • a dielectric layer is provided, and the connection via hole penetrating through the thickness direction of the dielectric layer is formed through a patterning process.
  • the step of forming the connection via hole penetrating through the thickness direction of the dielectric layer through a patterning process includes:
  • a mask pattern is formed on the dielectric layer, and the connection via hole penetrating through the thickness direction of the dielectric layer is formed by dry or wet etching.
  • the step of forming a connection electrode in the connection via hole, forming a first extraction electrode on the first surface, and forming a second extraction electrode on the second surface includes:
  • a first extraction electrode on the first surface and a second extraction electrode on the second surface are formed by a patterning process.
  • the step of forming a metal thin film on the first surface and the second surface of the dielectric layer comprises:
  • a metal thin film is formed on the first surface and the second surface of the dielectric layer by using a magnetron sputtering process.
  • the step of forming a connection electrode in the connection via hole, forming a first extraction electrode on the first surface, and forming a second extraction electrode on the second surface includes:
  • An electroless plating medium is formed on the first surface, the second surface of the dielectric layer, and the connection via hole; the dielectric layer forming the electroless plating medium is electroless plated to form a connection electrode located in the connection via hole , and a first extraction electrode located on the first surface and a second extraction electrode located on the second surface.
  • the step of forming a connection electrode in the connection via hole, forming a first extraction electrode on the first surface, and forming a second extraction electrode on the second surface includes:
  • connection electrode located in the connection via hole, and a connection electrode located in the connection via hole.
  • the conductive silver paste includes a low-temperature curing polymer conductive silver paste.
  • the coating method includes any one of screen printing, inkjet printing, and slit coating.
  • the step of forming a connection electrode in the connection via hole, forming a first lead-out electrode on the first surface, and forming a second lead-out electrode on the second surface further includes:
  • the step of cleaning the dielectric layer forming the connection via includes:
  • the step of cleaning the dielectric layer forming the connection via includes:
  • the dielectric layer formed with the connection via holes is put into a water tank for ultrasonic cleaning, and then the dielectric layer is put into a solution containing hydrofluoric acid for chemical corrosion.
  • the shape of the connection via hole includes a cylindrical shape or a rounded frustum shape.
  • an embodiment of the present disclosure provides a conductive via, which includes:
  • the dielectric layer which has a connection via hole penetrating in its thickness direction;
  • the dielectric layer includes a first surface and a second surface oppositely arranged in its thickness direction;
  • connection electrode a connection electrode, a first extraction electrode and a second extraction electrode, the connection electrode is arranged in the connection via hole, the first extraction electrode is located on the first surface, and the second extraction electrode is located on the second surface; of which,
  • connection electrode at least covers the inner wall of the connection via hole, and both the first lead-out electrode and the second lead-out electrode are electrically connected to the connection electrode.
  • the shape of the connection via hole includes a cylindrical shape or a rounded frustum shape.
  • an embodiment of the present disclosure provides a passive device, which includes the above-mentioned conductive via.
  • the passive device at least includes an inductor; the inductor is located on a first substructure on the first surface and a second substructure on the second surface, and the first substructure and the first substructure are The conductive vias are sequentially connected in series with the two substructures.
  • the passive device further includes a capacitor and a resistor; both the capacitor and the resistor are arranged on the second surface.
  • the dielectric layer includes at least one of glass, polyimide, polyethylene terephthalate, and cycloolefin polymer.
  • FIG. 1 is a flow chart of Example 1 of a method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 2 is a flow chart of Example 2 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 3 is a flow chart of Example 3 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 4 is a flow chart of Example 4 of the method for preparing a conductive via according to an embodiment of the present disclosure.
  • FIG. 5 is a flow chart of Example 5 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 6 is a flow chart of Example 6 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 7 is a flow chart of Example 7 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 8 is a flow chart of Example 8 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 9 is a flow chart of Example 9 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 10 is a flow chart of Example 10 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 11 is a flow chart of Example 11 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 12 is a flow chart of Example 12 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 13 is a flow chart of Example 13 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 14 is a flow chart of Example 14 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 15 is a flow chart of Example 15 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 16 is a flow chart of Example 16 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 17 is a flow chart of Example 17 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 18 is a flow chart of Example 18 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • Fig. 19a is a flow chart of Example 19 of the method for preparing a conductive via according to an embodiment of the present disclosure.
  • Fig. 19b is another flow chart of Example 19 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • Fig. 20a is a flow chart of Example 20 of the method for preparing a conductive via according to an embodiment of the present disclosure.
  • Fig. 20b is another flow chart of Example 20 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • Fig. 21a is a flow chart of Example 21 of the method for preparing a conductive via according to an embodiment of the present disclosure.
  • FIG. 21b is another flow chart of Example 21 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • Fig. 22a is a flow chart of Example 22 of the method for preparing a conductive via according to an embodiment of the present disclosure.
  • Fig. 22b is another flow chart of Example 22 of the method for preparing a conductive via according to an embodiment of the present disclosure.
  • Fig. 23a is a flow chart of Example 23 of the method for preparing a conductive via according to an embodiment of the present disclosure.
  • Fig. 23b is another flow chart of Example 23 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • Fig. 24a is a flow chart of Example 24 of the method for preparing a conductive via according to an embodiment of the present disclosure.
  • FIG. 24b is another flow chart of Example 24 of the method for manufacturing a conductive via according to an embodiment of the present disclosure.
  • FIG. 25 is a flowchart of a method for manufacturing a conductive blind via according to an embodiment of the present disclosure.
  • FIG. 26 is a schematic diagram of a conductive via according to an embodiment of the disclosure.
  • 27 is a cross-sectional view of a passive device of an embodiment of the disclosure.
  • FIG. 28 is a top view of the inductor in FIG. 27.
  • an embodiment of the present disclosure provides a method for preparing a conductive via.
  • the dielectric layer selected in the method includes but is not limited to a glass-based substrate, a silicon (Si)-based substrate, SOI, gallium arsenide (GaAs ) substrate, SiC, InP, PCB and Al 2 O 3 etc.
  • the method may include the steps of:
  • the dielectric layer includes a first surface and a second surface oppositely arranged in its thickness direction.
  • connection via hole on the dielectric layer is also different.
  • any method such as mechanical drilling, sandblasting drilling, laser drilling, patterning, etc. is used to form connection via holes penetrating the dielectric layer.
  • step S01 after step S01 is completed, a step of cleaning the dielectric layer is further included, so as to make the surface of the inner wall of the formed connection via hole smooth.
  • the medium layer is filled with pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water is cavitated, accelerated and The direct flow effect makes the pollutant layer dispersed, emulsified, and stripped to achieve the purpose of cleaning.
  • the medium layer is taken out of the water tank after being rinsed with pure deionized water, and dried with an air knife.
  • the dielectric layer into the water tank, first perform ultrasonic cleaning to remove the floating dust on the surface, and then immerse the dielectric layer in a solution containing hydrofluoric acid for chemical corrosion. Defects such as stress concentration areas are completely removed by chemical etching. Finally, after rinsing with pure deionized water, the medium layer was taken out from the sink, and dried with an air knife.
  • connection electrode Form a connection electrode in the connection via hole, and form a first extraction electrode and a second extraction electrode on the first surface and the second surface of the dielectric layer respectively; wherein, the connection electrode at least covers the inner wall of the connection via hole, and the first extraction electrode Both the electrode and the second extraction electrode are electrically connected to the connection electrode.
  • the method of forming the connection electrode, the first lead-out electrode and the second lead-out electrode on the dielectric layer may include: depositing a metal thin film on the first surface and the second surface of the dielectric layer on which the connection via hole is formed, as a seed Afterwards, the electroplating process is used to make the metal film thicker. At this time, the metal film covers the inner wall of the connection via hole, and even fills the connection via hole, and the metal film formed on the first surface and the second surface of the dielectric layer The thin film is patterned to form a first extraction electrode and a second extraction electrode.
  • the method of forming the connection electrode, the first extraction electrode and the second extraction electrode on the dielectric layer may further include: forming an electroless plating medium on the first surface and the second surface of the dielectric layer on which the connection via holes are formed, And carry out electroless plating to form a metal film.
  • the metal film covers the inner wall of the connection via hole, and the metal film formed on the first surface and the second surface of the dielectric layer is patterned to form the first lead-out electrode and the second lead-out electrode. electrode.
  • the method of forming the connection electrode, the first lead-out electrode and the second lead-out electrode on the dielectric layer may further include: extruding the metal paste into the connection via hole of the dielectric layer, and Metal pastes are formed on the two surfaces, and then the metal pastes on the first surface and the second surface are cured to form connection electrodes filled in the connection via holes, and the first lead-out electrodes on the first surface and the first lead-out electrodes on the second surface. the second extraction electrode.
  • the preparation method will be specifically described according to the material of the dielectric layer.
  • the following examples do not limit the protection scope of the embodiments of the present disclosure.
  • FIG. 1 is a flow chart of Example 1 of the method for preparing a conductive via according to an embodiment of the present disclosure; as shown in FIG. 1 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 11 includes but is not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, and Al2O3.
  • the dielectric layer 11 is mechanically drilled to form a connection The dielectric layer 11 of the via hole 11a.
  • the drill bits used in mechanical drilling are made of high-hardness materials such as tungsten carbide, tungsten-cobalt alloy, tungsten-titanium-cobalt alloy and other high-hardness alloys (HRC value greater than 90 degrees), or natural diamond, artificial diamond, etc.
  • the dielectric layer 11 has a thickness of 0.1mm-2mm, and the diameter of the connection via hole 11a ranges from 0.5mm-1.5mm.
  • the inner wall of the connection via hole 11a can be straight up and down, or wide at the top and narrow at the bottom, and the inclination angle of the connection via hole 11a ranges from 0° to 15°, for example: the inclination angle of the connection via hole 11a is 15°.
  • the up and down of the inner wall of the connection via hole 11a in the embodiment of the present disclosure are relative concepts.
  • the side relatively close to the second surface is up, and the side relatively close to the first surface is down.
  • the side relatively close to the second surface is regarded as the upper side
  • the side relatively close to the first surface is regarded as the lower side for illustration;
  • the inclination angle of the connection via hole 11a in the embodiment of the present disclosure refers to The included angle between the extension direction of the inner wall of the connection via hole 11a and the plane where the first surface is located.
  • step S11 the dielectric layer 11 is cleaned to remove residues and debris near the inner wall of the connection via hole 11a and the outer edge of the connection via hole 11a (11b shown in FIG. 1 ).
  • step S12 may specifically include: putting the medium layer 11 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within For about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 11 is taken out from the water tank, and dried with an air knife.
  • step S13 after completing step S12 , forming a metal thin film 120 as a seed layer in the connection via hole 11 a of the dielectric layer 11 , and on the first surface and the second surface.
  • step S13 may specifically include: depositing a metal thin film 120 with good conductivity on the entire surface of the first surface and the second surface of the dielectric layer 11 as a seed layer by means including but not limited to magnetron sputtering.
  • methods for forming the metal thin film 120 may also be electron beam evaporation, thermal evaporation, pulsed laser sputtering, and the like.
  • the metal thin film includes a first sub-metal film layer and a second sub-metal film layer arranged in sequence along a direction away from the dielectric layer 11 .
  • the material of the first sub-metal film layer includes but not limited to titanium (Ti), molybdenum (Mo), nickel (Ni)
  • the material of the second sub-metal film layer includes but not limited to copper (Cu) , silver (Ag) or gold (Au) in any one.
  • the metal thin film includes any one of Ti/Cu, Mo/Cu, Ni/Cu, Ti/Ag, Mo/Ag, and Ni/Ag.
  • the thickness range of the first sub-metal film layer is about 1 nm ⁇ 100 nm; the thickness range of the second sub metal film layer is about 50 nm ⁇ 1000 nm.
  • the thickness of the metal thin film connecting the inner wall of the via hole 11 a is about 1 nm to 200 nm.
  • step S14 After step S13 is completed, fill the connection via hole 11a through an electroplating process, and thicken the metal film 120 formed on the first surface and the second surface, so as to form The first extraction electrode 1201 and the second extraction electrode 1202 on the surface, and the connection electrode 1203 located in the connection via hole 11a are formed.
  • step S14 may specifically include: by reasonably matching different types of electroplating solutions (such as the formula for filling the connection via hole 11a and the formula for thickening the entire surface of the metal film), first perform hole-filling electroplating in the electroplating tank, so that Metal film 120 (for example: the first sub-metal film layer in metal film 120) is deposited on the inner wall of connection via hole 11a, and the electroplating rate is 0.5um/minute ⁇ 5um/minute. Filling (film thickness equal to 0.5 times the pore diameter) or not filling only the inner wall of the hole is metallized (film thickness 500nm-10um), that is, the connection electrode 1203 is formed.
  • electroplating solutions such as the formula for filling the connection via hole 11a and the formula for thickening the entire surface of the metal film
  • the electroplating metal is Cu, Ag or Au, and the electroplating rate is 0.5um. /min ⁇ 5um/min, depending on the electroplating time, the thickness of the thickened metal film 120a is about 500nm ⁇ 500um.
  • the surface of the dielectric layer 11 will generally be uneven, which will affect the subsequent process flow. Therefore, a chemical mechanical polishing process is finally performed to make the surface of the dielectric layer 11 flat and smooth, and form the first lead-out electrode 1201 and the second lead-out electrode. 1202.
  • the thickened metal film 120 a on the first surface and the second surface may also be patterned to form the first extraction electrode 1201 and the second extraction electrode 1202 .
  • FIG. 2 is a flow chart of Example 2 of the method for preparing conductive vias according to an embodiment of the present disclosure; as shown in FIG. 2 , the preparation method specifically includes the following steps: S21, providing a dielectric layer 21, and the material of the dielectric layer 21 includes But not limited to any one of glass, Si, and SOI, the dielectric layer 21 is mechanically drilled to form the dielectric layer 21 with the connection via hole 21a.
  • the drill bits used in mechanical drilling are made of high-hardness materials such as tungsten carbide, tungsten-cobalt alloy, tungsten-titanium-cobalt alloy and other high-hardness alloys (HRC value greater than 90 degrees), or natural diamond, artificial diamond, etc.
  • the dielectric layer 21 has a thickness of 0.1mm-2mm, and the diameter of the connection via hole 21a ranges from 0.5mm-1.5mm.
  • the inner wall of the connecting via hole 21a can be straight up and down, or wide at the top and narrow at the bottom, and the inclination angle of the connecting via hole ranges from 0° to 15°. °, for example: the inclination angle of the connection via hole 11a is 15°.
  • step S21 the dielectric layer 21 is cleaned to remove residues and debris (21b shown in FIG. 2 ) on the inner wall of the connection via hole 21a and near the outer edge of the connection via hole.
  • step S22 may specifically include: placing the dielectric layer 21 in a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 21 in a solution containing hydrofluoric acid for chemical etching, glass, Si, Defects such as the microcrack area Q1 and the stress concentration area Q2 in the hole wall near the connection via hole on the SOI dielectric layer 21 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the medium layer 21 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 21a after chemical corrosion has a smooth inner wall and surface, and does not contain defects such as microcrack area Q1 and stress concentration area Q2, which is conducive to the growth of high-quality seed layer, metal filling and metal thickening.
  • step S23 After step S22 is completed, a metal thin film 220 is formed in the connection via hole 21a of the dielectric layer 21 and on the first surface and the second surface as a seed layer.
  • step S23 may specifically include: depositing a metal film 220 with good conductivity on the entire surface of the first surface and the second surface of the dielectric layer 21 as a seed layer by means including but not limited to magnetron sputtering.
  • magnetron sputtering methods for forming the metal thin film 220 may also be electron beam evaporation, thermal evaporation, pulsed laser sputtering, and the like.
  • laminated metal is generally used to increase the adhesion between the metal film 220 and the dielectric layer 21.
  • the metal thin film 220 includes a first sub-metal film layer and a second sub-metal film layer arranged in sequence along a direction away from the dielectric layer.
  • the material of the first sub-metal film layer includes but not limited to titanium (Ti), molybdenum (Mo), nickel (Ni)
  • the material of the second sub-metal film layer includes but not limited to copper (Cu) , silver (Ag) or gold (Au) in any one.
  • the metal thin film 220 includes any one of Ti/Cu, Mo/Cu, Ni/Cu, Ti/Ag, Mo/Ag, and Ni/Ag.
  • the thickness range of the first sub-metal film layer is about 1 nm ⁇ 100 nm; the thickness range of the second sub metal film layer is about 50 nm ⁇ 1000 nm.
  • the thickness of the metal thin film connecting the inner wall of the via hole 21 a is about 1 nm to 200 nm.
  • step S24 After step S23 is completed, fill the connection via hole 21a through an electroplating process, and thicken the metal film 220 formed on the first surface and the second surface, so as to form The first extraction electrode 2201 and the second extraction electrode 2202 on the surface, and the connection electrode 2203 located in the connection via hole 21a are formed.
  • step S24 may specifically include: by properly matching different types of electroplating solutions (such as the formula for filling the connection via hole 21a of the metal film 220 and the formula for thickening the entire surface), first perform hole-filling electroplating in the electroplating tank, Deposit a metal film (for example: the first sub-metal film layer in the metal film) on the inner wall of the connection via hole 21a, and the electroplating rate is 0.5um/minute to 5um/minute. With the length of electroplating time, the metal material can fill the hole Full (film thickness is equal to 0.5 times the pore diameter) or not filled only the inner wall of the hole is metallized (film thickness 500nm ⁇ 10um).
  • electroplating solutions such as the formula for filling the connection via hole 21a of the metal film 220 and the formula for thickening the entire surface
  • first perform hole-filling electroplating in the electroplating tank Deposit a metal film (for example: the first sub-metal film layer in the metal film) on the inner wall of the connection via
  • the dielectric layer 21 is moved to the electroplating tank of the entire surface thickening formula electroplating solution, and the metal thin film 220 on the first surface and the second surface is thickened and electroplated.
  • the electroplating metal is Cu, Ag or Au, and the electroplating rate is 0.5um/ minutes to 5um/minute, depending on the length of electroplating time, the thickness of the thickened metal film 220a is about 500nm to 500um.
  • the thickened metal film 220a on the first surface and the second surface can also be patterned to form the first extraction electrode 2201 and the second extraction electrode 2202 .
  • FIG. 3 is a flow chart of Example 3 of a method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 3 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 31 includes but not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, Al2O3, mechanically drill the dielectric layer 31 to form a connection The dielectric layer 31 of the via hole 31a.
  • the drill bits used in mechanical drilling are made of high-hardness materials such as tungsten carbide, tungsten-cobalt alloy, tungsten-titanium-cobalt alloy and other high-hardness alloys (HRC value greater than 90 degrees), or natural diamond, artificial diamond, etc.
  • the dielectric layer 31 has a thickness of 0.1mm-2mm, and the diameter of the connection via hole 31a ranges from 0.5mm-1.5mm.
  • the inner wall of the connecting via hole 31a can be straight up and down, or wide at the top and narrow at the bottom, and the inclination angle range of the connecting via hole 31a is 0° ⁇ 15°, for example: the inclination angle of the connection via hole 31a is 15°.
  • step S32 the dielectric layer 31 is cleaned to remove residues and debris near the inner wall of the connection via hole 31a and the outer edge of the connection via hole 31a (31b shown in FIG. 3 ).
  • step S32 may specifically include: putting the medium layer 31 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 31 is taken out from the water tank and dried with an air knife.
  • step S33 after step S32 is completed, squeeze the metal paste into the connection via hole 31a of the dielectric layer 31, and form the metal paste 320 on the first surface and the second surface of the dielectric layer 31, and then make the first surface and the second surface respectively
  • the metal paste 320 on the two surfaces is cured to form the connection electrodes 3203 filled in the connection via holes 31a, the first lead-out electrodes 3201 on the first surface and the second lead-out electrodes 3202 on the second surface.
  • the metal paste 320 can be a conductive paste
  • the material of the conductive paste includes but is not limited to a low-temperature curing polymer conductive paste, and its main components are conductive particles, resin, curing agent, dispersant, diluent, adhesion Strengthening agent and anti-settling agent.
  • the conductive particles can be selected from Cu, Ag, and Au, and the particle size ranges from about 1 nm to 100 um.
  • the resin can choose bisphenol epoxy resin, the curing agent can choose acid anhydride, the dispersant can choose methylimidazole, the diluent can choose butyl acetate, the adhesion enhancer can choose tetraethyl titanate, and the anti-sedimentation agent can choose Polyamides.
  • Step S33 may specifically include: first coating the conductive paste in the connection via hole 31a and around the edge of the hole on the second surface, and then performing solvent drying and thermal curing on the second surface side of the dielectric layer 31 to form a filling in the connection hole.
  • the preferred coating methods of the conductive paste include but are not limited to screen printing, inkjet printing, slit coating, etc., and the use of vacuum adsorption machines during coating can improve the coating efficiency and improve the coating efficiency of the conductive paste on the hole wall. and the distribution profile at the edge of the hole. Solvent drying can be carried out under normal air pressure, N2 normal pressure and vacuum, the temperature range is about 40°C-95°C, and the time is about 1 minute-30 minutes.
  • Thermal curing can be carried out in an oven, the atmosphere is N2, and the heating temperature is about 140 °C ⁇ 200 °C; or it can be cured by laser beam irradiation, the laser wavelength range is about 500nm ⁇ 1510nm, and the laser beam power range is about 50mW ⁇ 50W.
  • the beam diameter ranges from 10um to 2000um, and the laser beam can be a single beam or multiple beams.
  • FIG. 4 is a flow chart of Example 4 of a method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 4 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 41 includes but not limited to any one of glass, Si, and SOI. Mechanically drill holes in the dielectric layer 41 to form the dielectric layer 41 with connection vias 41a.
  • the drill bits used in mechanical drilling are made of high-hardness materials such as tungsten carbide, tungsten-cobalt alloy, tungsten-titanium-cobalt alloy and other high-hardness alloys (HRC value greater than 90 degrees), or natural diamond, artificial diamond, etc.
  • the dielectric layer 41 has a thickness of 0.1 mm to 2 mm, and the diameter of the connection via hole 41a ranges from 0.5 mm to 1.5 mm.
  • the inner wall of the connecting via hole 41a can be straight up and down, or wide at the top and narrow at the bottom, and the inclination angle range of the connecting via hole 41a is 0° ⁇ 15°, for example: the inclination angle of the connection via hole 41a is 15°.
  • step S42 the dielectric layer 41 is cleaned to remove residues and debris (41b shown in FIG. 4 ) on the inner wall of the connection via hole 41a and near the outer edge of the connection via hole 41a.
  • step S42 may specifically include: placing the dielectric layer 41 in a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 41 in a solution containing hydrofluoric acid for chemical etching, glass, Si, Defects such as the microcrack area Q1 and the stress concentration area Q2 in the hole wall near the connection via hole 41a on the SOI dielectric layer 41 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the dielectric layer 41 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 41a after chemical etching has a smooth inner wall and surface, and does not contain defects such as the microcrack area Q1 and the stress concentration area Q2.
  • step S43 after step S42 is completed, squeeze the metal paste 420 into the connection via hole 41a of the dielectric layer 41, and form the metal paste 420 on the first surface and the second surface of the dielectric layer 41, and then make the first surface and the second surface respectively
  • the metal paste 420 on the second surface is cured to form the connection electrode 4203 filled in the connection via hole 41a, the first lead-out electrode 4201 on the first surface, and the second lead-out electrode 4202 on the second surface.
  • the metal paste 420 can be a conductive paste.
  • the material of the conductive paste includes but is not limited to a low-temperature curing polymer conductive paste.
  • the main components are conductive particles, resin, curing agent, dispersant, diluent, adhesion Strengthening agent and anti-settling agent.
  • the conductive particles can be selected from Cu, Ag, and Au, and the particle size ranges from about 1 nm to 100 um.
  • the resin can choose bisphenol epoxy resin, the curing agent can choose acid anhydride, the dispersant can choose methylimidazole, the diluent can choose butyl acetate, the adhesion enhancer can choose tetraethyl titanate, and the anti-sedimentation agent can choose Polyamides.
  • Step S43 may specifically include: first coating the conductive paste in the connection via hole 41a and around the edge of the hole on the second surface, and then performing solvent drying and thermal curing on the second surface side of the dielectric layer 41 to form a filling in the connection hole.
  • the preferred coating methods of the conductive paste include but are not limited to screen printing, inkjet printing, slit coating, etc., and the use of vacuum adsorption machines during coating can improve the coating efficiency and improve the coating efficiency of the conductive paste on the hole wall. and the distribution profile at the edge of the hole. Solvent drying can be carried out under normal air pressure, N2 normal pressure and vacuum, the temperature range is about 40°C-95°C, and the time is about 1 minute-30 minutes.
  • Thermal curing can be carried out in an oven, the atmosphere is N2, and the heating temperature is about 140 °C ⁇ 200 °C; or it can be cured by laser beam irradiation, the laser wavelength range is about 500nm ⁇ 1510nm, and the laser beam power range is about 50mW ⁇ 50W.
  • the beam diameter ranges from 10um to 2000um, and the laser beam can be a single beam or multiple beams.
  • FIG. 5 is a flow chart of Example 5 of a method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 5 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 51 includes but not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, Al2O3, mechanically drill the dielectric layer 51 to form a connection The dielectric layer 51 of the via hole 51a.
  • the drill bits used in mechanical drilling are made of high-hardness materials such as tungsten carbide, tungsten-cobalt alloy, tungsten-titanium-cobalt alloy and other high-hardness alloys (HRC value greater than 90 degrees), or natural diamond, artificial diamond, etc.
  • the thickness of the dielectric layer 51 is 0.1mm-2mm, and the diameter of the connection via hole 51a is in the range of 0.5mm-1.5mm.
  • the inner wall of the connecting via hole 51a can be straight up and down, or wide at the top and narrow at the bottom, and the inclination angle range of the connecting via hole 51a is 0° ⁇ 15°, for example: the inclination angle of the connection via hole 51a is 15°.
  • step S52 the dielectric layer 51 is cleaned to remove residues and debris (51b shown in FIG. 5 ) on the inner wall of the connection via hole 51a and near the outer edge of the connection via hole 51a.
  • step S52 may specifically include: putting the medium layer 51 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 51 is taken out from the water tank, and dried with an air knife.
  • step S53 after step S52 is completed, forming an electroless plating medium 520 on the first surface and the second surface of the dielectric layer 51 on which the connection via hole 51 a is formed.
  • step S53 may specifically include: using a spray method or directly putting the dielectric layer 51 into a water bath containing the electroless plating medium 520 solution, so that a layer of Sn 2+ is adsorbed on the surface of the dielectric layer 51 .
  • the main components of the chemical plating medium 520 solution are SnCl 2 10-30g/L, concentrated hydrochloric acid (38% concentration) 20-60ml/L, deionized water, and a small amount of Sn particles are added to prevent Sn 2+ from being oxidized.
  • the surface of the medium layer 51 reacts with the activation solution (the main components of the activation solution are SnCl 2 80 ⁇ 120g/L, concentrated hydrochloric acid 300 ⁇ 500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water), produce metal palladium particles and closely adhere to the surface of the dielectric layer 51, that is, in the dielectric layer 51 formed with the connection via hole 51a
  • An electroless plating medium 520 is formed on the first surface and the second surface. It should be noted that the electroless plating medium 520 can be formed on the first surface of the dielectric layer 51 , and then the electroless plating medium 520 can be formed on the second surface of the dielectric layer 51 .
  • step S53 after step S52 is completed, perform electroless plating on the dielectric layer 51 formed with the electroless plating medium 520, form the first surface, the second surface of the dielectric layer 51, and the metal film in the connection via hole 51a, and form The metal thin film on the first surface and the second surface of the dielectric layer 51 is patterned to form a first lead-out electrode 5201 and a second lead-out electrode 5202, and a connection electrode 5203 located in the connection via hole 51a.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • only Cu metal thin film (thickness is about 1-100um) is plated alone.
  • only Cu is used as the material for plating a single layer of metal film
  • Ni/Cu is used for laminating the metal film as an example, but this does not constitute a limitation to the protection scope of the embodiment of the present disclosure.
  • the electroless Ni/Cu metal thin film is taken as an example for illustration.
  • step S53 may specifically include: putting the dielectric layer 51 into an electroless plating solution, and sequentially performing electroless plating of metals Ni and Cu. Afterwards, the metal thin film formed on the first surface and the second surface of the dielectric layer 51 is patterned to form the first lead-out electrode 5201 and the second lead-out electrode 5202, and the connection electrode 5203 located in the connection via hole 51a.
  • the general composition of electroless Ni plating solution is NiSO4 ⁇ 6H2O 10 ⁇ 30g/L, NaH2PO4 ⁇ 2H2O 20 ⁇ 40g/L, sodium citrate 5 ⁇ 15g/L, NH4Cl 20 ⁇ 40g/L, the solution is alkaline, pH The range is 8.0 ⁇ 10.0, and the temperature range is 75 ⁇ 90°C.
  • the general composition of electroless Cu plating solution is KNaC4H4O6 30 ⁇ 50g/L, NaOH 8 ⁇ 10g/L, Na2CO3 38 ⁇ 40g/L, CuSO4 10 ⁇ 20g/L, NiCl2 2 ⁇ 6g/L, 35% formaldehyde 40 ⁇ 60ml/L, the solution is alkaline, the pH range is 11.0-14.0, and the temperature range is 55-65°C.
  • FIG. 6 is a flow chart of Example 6 of a method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 6 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 61 includes but not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, Al2O3, mechanically drilling the dielectric layer 61 to form a connection The dielectric layer 61 of the via hole 61a.
  • the drill bits used in mechanical drilling are made of high-hardness materials such as tungsten carbide, tungsten-cobalt alloy, tungsten-titanium-cobalt alloy and other high-hardness alloys (HRC value greater than 90 degrees), or natural diamond, artificial diamond, etc.
  • the thickness of the dielectric layer 61 is 0.1mm-2mm, and the diameter of the connection via hole 61a is in the range of 0.5mm-1.5mm.
  • the inner wall of the connection via hole 61a can be straight up and down, or wide at the top and narrow at the bottom, and the inclination angle of the connection via hole 61a ranges from 0 ° to 15°, for example: the inclination angle of the connection via hole 61a is 15°.
  • step S61 the dielectric layer 61 is cleaned, and the residues and debris near the inner wall of the connection via hole 61a and the outer edge of the connection via hole 61a (61b shown in FIG. 6 ) are removed.
  • step S62 may specifically include: placing the dielectric layer 61 in a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 61 in a solution containing hydrofluoric acid for chemical etching, glass, Si, Defects in the vicinity of the connection via hole 61a on the SOI dielectric layer 61 including the microcrack area Q1 and the stress concentration area Q2 in the hole wall are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the dielectric layer 61 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 61a after chemical etching has a smooth inner wall and surface, and does not contain defects such as the microcrack area Q1 and the stress concentration area Q2.
  • step S63 after step S62 is completed, an electroless plating medium 620 is formed on the first surface and the second surface of the dielectric layer 61 on which the connection via hole 61 a is formed.
  • step S63 may specifically include: using a spray method or directly putting the dielectric layer 61 into a water bath containing the electroless plating medium 620 solution, so that a layer of Sn 2+ is adsorbed on the surface of the dielectric layer 61 .
  • the main components of the chemical plating medium 620 solution are SnCl 2 10-30g/L, concentrated hydrochloric acid (38% concentration) 20-60ml/L, deionized water, and a small amount of Sn particles are added to prevent Sn 2+ from being oxidized.
  • the surface of the medium layer 61 reacts with the activation solution (activation solution main component SnCl 80 ⁇ 120g/L, concentrated hydrochloric acid 300 ⁇ 500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water), metal palladium particles are produced and closely adhered to the surface of the dielectric layer 61, that is, in the dielectric layer 61 where the connection via hole 61a is formed
  • An electroless plating medium 620 is formed on the first surface and the second surface.
  • step S64 after step S63 is completed, perform electroless plating on the dielectric layer 61 formed with the electroless plating medium 620, form the first surface, the second surface of the dielectric layer 61, and the metal film in the connection via hole 61a, and form
  • the metal thin film on the first surface and the second surface of the dielectric layer 61 is patterned to form a first lead-out electrode 6201 and a second lead-out electrode 6202, and a connection electrode 6203 located in the connection via hole 61a.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • only Cu metal thin film (thickness is about 1-100um) is plated alone.
  • only Cu is used as the material for plating a single layer of metal film
  • Ni/Cu is used for laminating the metal film as an example, but this does not constitute a limitation to the protection scope of the embodiment of the present disclosure.
  • the electroless Ni/Cu metal thin film is taken as an example for illustration.
  • step S64 may specifically include: putting the dielectric layer 61 into an electroless plating solution, and sequentially performing electroless plating of metals Ni and Cu. After that, the metal thin film formed on the first surface and the second surface of the dielectric layer 61 is patterned to form the first lead-out electrode 6201 and the second lead-out electrode 6202, and the connection electrode 6203 in the connection via hole 61a.
  • the general composition of electroless Ni plating solution is NiSO4 ⁇ 6H2O 10 ⁇ 30g/L, NaH2PO4 ⁇ 2H2O 20 ⁇ 40g/L, sodium citrate 5 ⁇ 15g/L, NH4Cl 20 ⁇ 40g/L, the solution is alkaline, pH The range is 8.0 ⁇ 10.0, and the temperature range is 75 ⁇ 90°C.
  • the general composition of electroless Cu plating solution is KNaC4H4O6 30 ⁇ 50g/L, NaOH 8 ⁇ 10g/L, Na2CO3 38 ⁇ 40g/L, CuSO4 10 ⁇ 20g/L, NiCl2 2 ⁇ 6g/L, 35% formaldehyde 40 ⁇ 60ml/L, the solution is alkaline, the pH range is 11.0-14.0, and the temperature range is 55-65°C.
  • FIG. 7 is a flow chart of Example 7 of a method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 7 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 71 includes but not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, Al 2 O 3 , sandblasting and drilling the dielectric layer 71 , forming a dielectric layer 71 with connection via holes 71a.
  • step S71 may specifically include: using a sandblasting process, using compressed air as power to match solid abrasive particles or a liquid mixed with solid abrasive particles to form a high-speed jet stream, which is sprayed onto the surface of the medium layer 71 at high speed, and the abrasive particles Continuous cutting and impact are formed on the surface of the dielectric layer 71, and parameters such as air pressure, beam injection angle, beam trajectory, and beam action time can be adjusted to form a through-hole structure with a wide top and a narrow bottom, and the inclination range of the connecting via hole 71a is 15 ° ⁇ 45°, for example, the inclination angle of the connection via hole 71a is 30°.
  • the diameter of the spray gun nozzle is about 10-50um, and the diameter of the abrasive particles is about 1-20um.
  • the abrasives that can be used include corundum, corundum, calcium carbonate, quartz sand, etc.
  • the thickness of the dielectric layer 71 is 0.1mm-2mm, the diameter of the upper part of the connection via hole (on the second surface) is about 0.5mm-1.5mm, and the diameter of the lower part of the connection via hole (on the first surface) is about 0.3-1.2mm.
  • step S71 the dielectric layer 71 is cleaned to remove residues and debris (71b in FIG. 7 ) on the inner wall of the connection via hole and near the outer edge of the connection via hole.
  • step S72 may specifically include: putting the medium layer 71 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 71 is taken out from the water tank, and dried with an air knife.
  • step S73 After step S72 is completed, a metal thin film is formed in the connection via hole of the dielectric layer 71 and on the first surface and the second surface as a seed layer.
  • step S73 may specifically include: depositing a metal film with good conductivity on the entire surface of the first surface and the second surface of the dielectric layer 71 as a seed layer by means including but not limited to magnetron sputtering.
  • magnetron sputtering methods of forming metal thin films can also be electron beam evaporation, thermal evaporation, pulsed laser sputtering, and the like.
  • the metal thin film 720 includes a first sub-metal film layer and a second sub-metal film layer arranged in sequence along a direction away from the dielectric layer.
  • the material of the first sub-metal film layer includes but not limited to titanium (Ti), molybdenum (Mo), nickel (Ni)
  • the material of the second sub-metal film layer includes but not limited to copper (Cu) , silver (Ag) or gold (Au) in any one.
  • the metal thin film 720 includes any one of Ti/Cu, Mo/Cu, Ni/Cu, Ti/Ag, Mo/Ag, and Ni/Ag.
  • the thickness range of the first sub-metal film layer is about 1nm-100nm; the thickness range of the second sub-metal film layer is about 50nm-1000nm.
  • the thickness of the metal thin film connecting the inner wall of the via hole 71 a is about 1 nm to 200 nm.
  • step S74 After step S73 is completed, fill the connection via hole 71a through an electroplating process, and thicken the metal film 720 formed on the first surface and the second surface, so as to form The first extraction electrode 7201 and the second extraction electrode 7202 on the surface, and the connection electrode 7203 located in the connection via hole 71a are formed.
  • step S74 may specifically include: by reasonably matching different types of electroplating solutions (such as the formula for filling the connection via hole 71a and the formula for thickening the entire surface of the metal film), first perform hole-filling electroplating in the electroplating tank, so that Metal film 720 (for example: the first sub-metal film layer in metal film 720) is deposited on the inner wall of connection via hole 71a, and the electroplating rate is 0.5um/minute ⁇ 5um/minute. Filled (film thickness equal to 0.5 times the pore diameter) or not filled, only the inner wall of the hole is metallized (film thickness 500nm-10um), that is, the connection electrode 7203 is formed.
  • electroplating solutions such as the formula for filling the connection via hole 71a and the formula for thickening the entire surface of the metal film
  • the electroplating metal is Cu, Ag or Au, and the electroplating rate is 0.5um. /min ⁇ 5um/min, depending on the electroplating time, the thickness of the thickened metal film 720a is about 500nm ⁇ 500um.
  • the surface of the dielectric layer 71 will generally be uneven, which will affect the subsequent process flow. Therefore, a chemical mechanical polishing process is finally performed to make the surface of the dielectric layer 71 flat and smooth, forming the first lead-out electrode 7201 and the second lead-out electrode. 7202.
  • the thickened metal film 720a on the first surface and the second surface may also be patterned to form the first lead-out electrode 7201 and the second lead-out electrode 7202 .
  • FIG. 8 is a flow chart of Example 8 of a method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 8 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 81 includes but not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, Al 2 O 3 , sandblasting and drilling the dielectric layer 81 , forming a dielectric layer 81 with connection via holes 81a.
  • step S81 may specifically include: using a sandblasting process, using compressed air as a driving force to match solid abrasive particles or a liquid mixed with solid abrasive particles to form a high-speed jet stream, which is sprayed onto the surface of the medium layer 81 at high speed, and the abrasive particles Continuous cutting and impact are formed on the surface of the dielectric layer 81, and parameters such as air pressure, beam injection angle, beam trajectory, and beam action time can be adjusted to form a through-hole structure with a wide top and a narrow bottom, and the inclination range of the connecting via hole 81a is 15 ° ⁇ 45°, for example, the inclination angle of the connection via hole 81a is 30°.
  • the diameter of the spray gun nozzle is about 10-50um, and the diameter of the abrasive particles is about 1-20um.
  • the abrasives that can be used include corundum, corundum, calcium carbonate, quartz sand, etc.
  • the thickness of the dielectric layer 81 is 0.1mm-2mm, the diameter of the upper part of the connection via hole 81a (on the second surface) is about 0.5mm-1.5mm, and the diameter of the lower part of the connection via hole 81a (on the first surface) is about 0.3-1.2mm.
  • step S82 the dielectric layer 81 is cleaned to remove residues and debris (81b shown in FIG. 8 ) on the inner wall of the connection via hole 81a and near the outer edge of the connection via hole 81a.
  • step S82 may specifically include: placing the dielectric layer 81 in a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 81 in a solution containing hydrofluoric acid for chemical etching, glass, Si, Defects such as the microcrack area Q1 and the stress concentration area Q2 in the wall of the hole near the connection via hole 81a on the SOI dielectric layer 81 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the dielectric layer 81 is rinsed thoroughly, and finally dried with an air knife.
  • the connection via hole 81a after chemical corrosion has a smooth inner wall and surface, and does not contain defects such as microcrack area Q1 and stress concentration area Q2, which is conducive to the growth of high-quality seed layer, metal filling and metal thickening.
  • step S83 a metal thin film is formed in the connection via hole of the dielectric layer 81 and on the first surface and the second surface as a seed layer.
  • step S83 may specifically include: depositing a metal film with good conductivity on the entire surface of the first surface and the second surface of the dielectric layer 81 as a seed layer by means including but not limited to magnetron sputtering.
  • the metal thin film can be formed by means of electron beam evaporation, thermal evaporation, pulsed laser sputtering and the like.
  • the metal thin film 820 includes a first sub-metal film layer and a second sub-metal film layer arranged in sequence along a direction away from the dielectric layer.
  • the material of the first sub-metal film layer includes but not limited to titanium (Ti), molybdenum (Mo), nickel (Ni)
  • the material of the second sub-metal film layer includes but not limited to copper (Cu) , silver (Ag) or gold (Au) in any one.
  • the metal thin film 820 includes any one of Ti/Cu, Mo/Cu, Ni/Cu, Ti/Ag, Mo/Ag, and Ni/Ag.
  • the thickness range of the first sub-metal film layer is about 1 nm ⁇ 100 nm; the thickness range of the second sub metal film layer is about 50 nm ⁇ 1000 nm.
  • the thickness of the metal thin film connecting the inner wall of the via hole 81 a is about 1 nm to 200 nm.
  • step S84 After step S83 is completed, fill the connection via hole 81a through the electroplating process, and thicken the metal film 820 formed on the first surface and the second surface, so as to form The first extraction electrode 8201 and the second extraction electrode 8202 on the surface, and the connection electrode 8203 located in the connection via hole 81a are formed.
  • step S84 may specifically include: by rationally matching different types of electroplating solutions (such as the formula for filling the connection via hole 81a and the formula for thickening the entire surface of the metal film), firstly perform hole-filling electroplating in the electroplating tank, so that Metal film 820 (for example: the first sub-metal film layer in metal film 820) is deposited on the inner wall of connection via hole 81a, and the electroplating rate is 0.5um/minute ⁇ 5um/minute, with the length of electroplating time, the metal material can form the hole Filled (film thickness equal to 0.5 times the aperture) or not filled, only the inner wall of the hole is metallized (film thickness 500nm-10um), that is, the connection electrode 8203 is formed.
  • different types of electroplating solutions such as the formula for filling the connection via hole 81a and the formula for thickening the entire surface of the metal film
  • the electroplating metal is Cu, Ag or Au, and the electroplating rate is 0.5um. /min ⁇ 5um/min, depending on the electroplating time, the thickness of the thickened metal film 820a is about 500nm ⁇ 500um.
  • the surface of the dielectric layer 81 will generally be uneven, which will affect the subsequent process flow. Therefore, a chemical mechanical polishing process is finally performed to make the surface of the dielectric layer 81 flat and smooth, and form the first lead-out electrode 8201 and the second lead-out electrode. 8202.
  • the thickened metal film 820a on the first surface and the second surface can also be patterned to form the first extraction electrode 8201 and the second extraction electrode 8202 .
  • FIG. 9 is a flow chart of Example 9 of a method for preparing a conductive via according to an embodiment of the present disclosure; as shown in FIG. 9 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 91 includes but not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, Al2O3, sandblasting and drilling the dielectric layer 91 to form a
  • the dielectric layer 91 is connected to the via hole 91a.
  • step S91 may specifically include: adopting a sandblasting process, using compressed air as power to match solid abrasive particles or a liquid mixed with solid abrasive particles to form a high-speed jet stream, which is sprayed onto the surface of the medium layer 91 at high speed, and the abrasive particles Continuous cutting and impact are formed on the surface of the dielectric layer 91, and parameters such as air pressure, beam injection angle, beam trajectory, and beam action time can be adjusted to form a through-hole structure with a wide top and a narrow bottom, and the inclination range of the connecting via hole 91a is 15 ° ⁇ 45°, for example, the inclination angle of the connection via hole 91a is 30°.
  • the diameter of the spray gun nozzle is about 10-50um, and the diameter of the abrasive particles is about 1-20um.
  • the abrasives that can be used include corundum, corundum, calcium carbonate, quartz sand, etc.
  • the dielectric layer 91 has a thickness of 0.1mm-2mm, the diameter of the upper part of the connection via hole 91a (on the second surface) ranges from 0.5mm to 1.5mm, and the diameter of the lower part of the connection via hole 91a (on the first surface) ranges from 0.3mm to 1.2mm.
  • step S92 the dielectric layer 91 is cleaned to remove residues and debris near the inner wall of the connection via hole 91a and the outer edge of the connection via hole 91a (9b shown in FIG. 9 ).
  • step S92 may specifically include: putting the medium layer 91 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 91 is taken out from the water tank, and dried with an air knife.
  • step S93 after step S92 is completed, squeeze the metal paste 920 into the connection via hole 91a of the dielectric layer 91, and form the metal paste 920 on the first surface and the second surface of the dielectric layer 91, and then make the first surface and the second surface respectively
  • the metal paste 920 on the second surface is cured to form the connection electrode 9203 filled in the connection via hole 91a, the first lead-out electrode 9201 on the first surface, and the second lead-out electrode 9202 on the second surface.
  • the metal paste 920 can be a conductive paste.
  • the material of the conductive paste includes but is not limited to a low-temperature curing polymer conductive paste.
  • the main components are conductive particles, resin, curing agent, dispersant, diluent, adhesion Strengthening agent and anti-settling agent.
  • the conductive particles can be selected from Cu, Ag, and Au, and the particle size ranges from about 1 nm to 100 um.
  • the resin can choose bisphenol epoxy resin, the curing agent can choose acid anhydride, the dispersant can choose methylimidazole, the diluent can choose butyl acetate, the adhesion enhancer can choose tetraethyl titanate, and the anti-sedimentation agent can choose Polyamides.
  • Step S93 may specifically include: first coating the conductive paste in the connection via hole 91a and around the edge of the hole on the second surface, and then performing solvent drying and thermal curing on the second surface side of the dielectric layer 91 to form a filling in the connecting hole.
  • the preferred coating methods of the conductive paste include but are not limited to screen printing, inkjet printing, slit coating, etc., and the use of vacuum adsorption machines during coating can improve the coating efficiency and improve the coating efficiency of the conductive paste on the hole wall. and the distribution profile at the edge of the hole. Solvent drying can be carried out under normal air pressure, N2 normal pressure and vacuum, the temperature range is about 40°C-95°C, and the time is about 1 minute-30 minutes.
  • Thermal curing can be carried out in an oven, the atmosphere is N2, and the heating temperature is about 140 °C ⁇ 200 °C; or it can be cured by laser beam irradiation, the laser wavelength range is about 500nm ⁇ 1510nm, and the laser beam power range is about 50mW ⁇ 50W.
  • the beam diameter ranges from 10um to 2000um, and the laser beam can be a single beam or multiple beams.
  • FIG. 10 is a flow chart of Example 10 of a method for preparing a conductive via according to an embodiment of the present disclosure; as shown in FIG. 10 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 101 includes but not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, Al2O3, sandblasting and drilling the dielectric layer 101 to form a
  • the dielectric layer 101 is connected to the via hole 101a.
  • step S101 may specifically include: using a sandblasting process, using compressed air as a driving force to match solid abrasive particles or a liquid mixed with solid abrasive particles to form a high-speed jet stream, which is sprayed onto the surface of the medium layer 101 at high speed, and the abrasive particles Continuous cutting and impact are formed on the surface of the dielectric layer 101, and parameters such as air pressure, beam injection angle, beam trajectory, and beam action time can be adjusted to form a through-hole structure with a wide top and a narrow bottom, and the inclination range of the connecting via hole 101a is 15 ° ⁇ 45°, for example, the inclination angle of the connection via hole 101a is 30°.
  • the diameter of the spray gun nozzle is about 10-50um, and the diameter of the abrasive particles is about 1-20um.
  • the abrasives that can be used include corundum, corundum, calcium carbonate, quartz sand, etc.
  • the thickness of the dielectric layer 101 is 0.1mm-2mm, the diameter of the upper part of the connection via hole 101a (on the second surface) is about 0.5mm-1.5mm, and the diameter of the lower part of the connection via hole 101a (on the first surface) is about 0.3-1.2mm.
  • step S102 the dielectric layer 101 is cleaned to remove residues and debris near the inner wall of the connection via hole 101a and the outer edge of the connection via hole 101a (101b shown in FIG. 10 ).
  • step S102 may specifically include: placing the dielectric layer 101 in a water tank, first performing ultrasonic cleaning to remove floating dust on the surface, and then immersing the dielectric layer 101 in a solution containing hydrofluoric acid for chemical corrosion, glass, Si, Defects in the vicinity of the connection via hole 101a on the SOI dielectric layer 101 including the microcrack area Q1 and the stress concentration area Q2 in the hole wall are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the medium layer 101 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 101a after chemical corrosion has a smooth inner wall and surface, and does not contain defects such as the microcrack area Q1 and the stress concentration area Q2, which is conducive to the growth of a high-quality seed layer, metal hole filling, and metal thickening.
  • step S103 after completing step S102, squeeze the metal paste into the connection via hole 101a of the dielectric layer 101, and form the metal paste on the first surface and the second surface of the dielectric layer 101, and then make the first surface and the second surface respectively
  • the metal paste on the surface is cured to form the connection electrode 10203 filled in the connection via hole 101a, the first lead-out electrode 10201 on the first surface, and the second lead-out electrode 10202 on the second surface.
  • the metal paste can be a conductive paste
  • the material of the conductive paste includes but is not limited to a low-temperature curing polymer conductive paste
  • the main components are conductive particles, resin, curing agent, dispersant, diluent, adhesion enhancement agent and anti-settling agent.
  • the conductive particles can be selected from Cu, Ag, and Au, and the particle size ranges from about 1 nm to 100 um.
  • the resin can choose bisphenol epoxy resin, the curing agent can choose acid anhydride, the dispersant can choose methylimidazole, the diluent can choose butyl acetate, the adhesion enhancer can choose tetraethyl titanate, and the anti-sedimentation agent can choose Polyamides.
  • Step S103 may specifically include: first coating the conductive paste in the connection via hole 101a and around the edge of the hole on the second surface, and then performing solvent drying and heat curing on the second surface side of the dielectric layer 101 to form a filling in the connection hole 101a.
  • the solvent is dried and thermally cured to form the first extraction electrode 10201 on the first surface.
  • the preferred coating methods of the conductive paste include but are not limited to screen printing, inkjet printing, slit coating, etc., and the use of vacuum adsorption machines during coating can improve the coating efficiency and improve the coating efficiency of the conductive paste on the hole wall. and the distribution profile at the edge of the hole. Solvent drying can be carried out under normal air pressure, N2 normal pressure and vacuum, the temperature range is about 40°C-95°C, and the time is about 1 minute-30 minutes.
  • Thermal curing can be carried out in an oven, the atmosphere is N2, and the heating temperature is about 140 °C ⁇ 200 °C; or it can be cured by laser beam irradiation, the laser wavelength range is about 500nm ⁇ 1510nm, and the laser beam power range is about 50mW ⁇ 50W.
  • the beam diameter ranges from 10um to 2000um, and the laser beam can be a single beam or multiple beams.
  • FIG. 11 is a flow chart of Example 11 of the method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 11 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 111 includes but not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, Al2O3, sandblasting and drilling the dielectric layer 111 to form a
  • the dielectric layer 111 is connected to the via hole 111a.
  • step S111 may specifically include: using a sandblasting process, using compressed air as a driving force to match solid abrasive particles or a liquid mixed with solid abrasive particles to form a high-speed jet stream, and spray it onto the surface of the medium layer 111 at high speed.
  • Continuous cutting and impact are formed on the surface of the dielectric layer 111, and parameters such as air pressure, beam injection angle, beam trajectory, and beam action time can be adjusted to form a through-hole structure with a wide top and a narrow bottom, and the inclination range of the connecting via 111a is 15 ° ⁇ 45°, for example, the inclination angle of the connection via hole 111a is 30°.
  • the diameter of the spray gun nozzle is about 10-50um, and the diameter of the abrasive particles is about 1-20um.
  • the abrasives that can be used include corundum, corundum, calcium carbonate, quartz sand, etc.
  • the thickness of the dielectric layer 111 is 0.1mm-2mm, the diameter of the upper part of the connection via hole 111a (on the second surface) is about 0.5mm-1.5mm, and the diameter of the lower part of the connection via hole 111a (on the first surface) is about 0.3-1.2mm.
  • step S111 the dielectric layer 111 is cleaned, and the residues and debris near the inner wall of the connection via hole 111a and the outer edge of the connection via hole 111a (11b shown in FIG. 11) are removed.
  • step S112 may specifically include: putting the medium layer 111 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, the medium layer 111 is taken out from the water tank after being rinsed with pure deionized water, and dried with an air knife.
  • step S113 after step S112 is completed, an electroless plating medium 1120 is formed on the first surface and the second surface of the dielectric layer 111 on which the connection via hole 111 a is formed.
  • step S113 may specifically include: using a spraying method or directly putting the dielectric layer 111 into a water bath containing the solution of the electroless plating medium 1120 to adsorb a layer of Sn 2+ on the surface of the dielectric layer 111 .
  • the main components of the electroless plating medium 1120 solution are SnCl 2 10-30g/L, concentrated hydrochloric acid (38% concentration) 20-60ml/L, deionized water, and a small amount of Sn grains are added to prevent Sn 2+ from being oxidized.
  • the surface of the medium layer 111 reacts with the activation solution (the main components of the activation solution are SnCl 80-120g/L, concentrated hydrochloric acid 300-500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water), metal palladium particles are produced and tightly adhered to the surface of the dielectric layer 111, that is, in the dielectric layer 111 formed with the connection via hole 111a
  • An electroless plating medium 1120 is formed on the first surface and the second surface.
  • step S114 after completing step S113, perform electroless plating on the dielectric layer 111 formed with the electroless plating medium 1120, form the first surface, the second surface of the dielectric layer 111, and the metal film in the connection via hole 111a, and form
  • the metal thin film on the first surface and the second surface of the dielectric layer 111 is patterned to form the first lead-out electrode 11201 and the second lead-out electrode 11202 , and the connection electrode 11203 located in the connection via hole 111 a.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • only Cu metal thin film (thickness is about 1-100um) is plated alone.
  • only Cu is used as the material for plating a single layer of metal film
  • Ni/Cu is used for laminating the metal film as an example, but this does not constitute a limitation to the protection scope of the embodiment of the present disclosure.
  • the electroless Ni/Cu metal thin film is taken as an example for illustration.
  • step S114 may specifically include: putting the dielectric layer 111 into an electroless plating solution, and sequentially performing electroless plating of metals Ni and Cu. Afterwards, the metal thin film formed on the first surface and the second surface of the dielectric layer 111 is patterned to form the first lead-out electrode 11201 and the second lead-out electrode 11202, and the connection electrode 11203 located in the connection via hole 111a.
  • the general composition of electroless Ni plating solution is NiSO4 ⁇ 6H2O 10 ⁇ 30g/L, NaH2PO4 ⁇ 2H2O 20 ⁇ 40g/L, sodium citrate 5 ⁇ 15g/L, NH4Cl 20 ⁇ 40g/L, the solution is alkaline, pH The range is 8.0 ⁇ 10.0, and the temperature range is 75 ⁇ 90°C.
  • the general composition of electroless Cu plating solution is KNaC4H4O6 30 ⁇ 50g/L, NaOH8 ⁇ 10g/L, Na2CO3 38 ⁇ 40g/L, CuSO4 10 ⁇ 20g/L, NiCl2 2 ⁇ 6g/L, 40 ⁇ 60ml of formaldehyde with a concentration of 35%. /L, the solution is alkaline, the pH range is 11.0-14.0, and the temperature range is 55-65°C.
  • FIG. 12 is a flow chart of Example 12 of a method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 12 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 121 includes but is not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, and Al2O3.
  • the dielectric layer 121 is sandblasted and drilled to form a
  • the dielectric layer 121 is connected to the via hole 121a.
  • step S121 may specifically include: using a sandblasting process, using compressed air as a driving force to match solid abrasive particles or a liquid mixed with solid abrasive particles to form a high-speed jet stream, which is sprayed onto the surface of the medium layer 121 at high speed, and the abrasive particles Continuous cutting and impact are formed on the surface of the dielectric layer 121, and parameters such as air pressure, beam injection angle, beam trajectory, and beam action time can be adjusted to form a through-hole structure with a wide top and a narrow bottom, and the inclination range of the connecting via hole 121a is 15 ° ⁇ 45°, for example, the inclination angle of the connection via hole 121a is 30°.
  • the diameter of the spray gun nozzle is about 10-50um, and the diameter of the abrasive particles is about 1-20um.
  • the abrasives that can be used include corundum, corundum, calcium carbonate, quartz sand, etc.
  • the thickness of the dielectric layer 121 is 0.1mm-2mm, the diameter of the upper part of the connection via hole 121a (on the second surface) is about 0.5mm-1.5mm, and the diameter of the lower part of the connection via hole 121a (on the first surface) is about 0.3-1.2mm.
  • step S122 the dielectric layer 121 is cleaned to remove residues and debris (12b shown in FIG. 12 ) on the inner wall of the connection via hole 121a and near the outer edge of the connection via hole 121a.
  • step S122 may specifically include: placing the dielectric layer 121 in a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 121 in a solution containing hydrofluoric acid for chemical corrosion, glass, Si, Defects in the vicinity of the connection via hole 121a on the SOI dielectric layer 121 including the microcrack area Q1 and the stress concentration area Q2 in the hole wall are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the dielectric layer 121 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 121a after chemical etching has a smooth inner wall and surface, and does not contain defects such as the microcrack area Q1 and the stress concentration area Q2.
  • step S123 After step S122 is completed, an electroless plating medium 1220 is formed on the first surface and the second surface of the dielectric layer 121 on which the connection via hole 121a is formed.
  • step S123 may specifically include: using a spray method or directly putting the dielectric layer 121 into a water bath containing the electroless plating medium 1220 solution, so that a layer of Sn 2+ is adsorbed on the surface of the dielectric layer 121 .
  • the main components of the chemical plating medium 1220 solution are SnCl 2 10-30g/L, concentrated hydrochloric acid (38% concentration) 20-60ml/L, deionized water, and a small amount of Sn grains are added to prevent Sn 2+ from being oxidized.
  • the surface of the medium layer 121 reacts with the activation solution (the main components of the activation solution are SnCl 80-120g/L, concentrated hydrochloric acid 300-500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water), metal palladium particles are produced and closely adhered to the surface of the dielectric layer 121, that is, in the dielectric layer 121 where the connection via hole 121a is formed An electroless plating medium 1220 is formed on the first surface and the second surface.
  • the main components of the activation solution are SnCl 80-120g/L, concentrated hydrochloric acid 300-500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water
  • step S124 after step S123 is completed, perform electroless plating on the dielectric layer 121 formed with the electroless plating medium 1220, form the first surface, the second surface of the dielectric layer 121, and the metal film in the connection via hole 121a, and form
  • the metal thin film on the first surface and the second surface of the dielectric layer 121 is patterned to form the first lead-out electrode 12201 and the second lead-out electrode 12202, as well as the connection electrode 12203 located in the connection via hole 121a.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • only Cu metal thin film (thickness is about 1-100um) is plated alone.
  • only Cu is used as the material for plating a single layer of metal film
  • Ni/Cu is used for laminating the metal film as an example, but this does not constitute a limitation to the protection scope of the embodiment of the present disclosure.
  • the electroless Ni/Cu metal thin film is taken as an example for illustration.
  • step S124 may specifically include: putting the dielectric layer 121 into an electroless plating solution, and sequentially performing electroless plating of metals Ni and Cu. After that, the metal thin film formed on the first surface and the second surface of the dielectric layer 121 is patterned to form the first lead-out electrode 12201 and the second lead-out electrode 12202, as well as the connection electrode 12203 located in the connection via hole 121a.
  • the general composition of electroless Ni plating solution is NiSO4 ⁇ 6H2O 10 ⁇ 30g/L, NaH2PO4 ⁇ 2H2O 20 ⁇ 40g/L, sodium citrate 5 ⁇ 15g/L, NH4Cl 20 ⁇ 40g/L, the solution is alkaline, pH The range is 8.0 ⁇ 10.0, and the temperature range is 75 ⁇ 90°C.
  • the general composition of electroless Cu plating solution is KNaC4H4O6 30 ⁇ 50g/L, NaOH8 ⁇ 10g/L, Na2CO3 38 ⁇ 40g/L, CuSO4 10 ⁇ 20g/L, NiCl2 2 ⁇ 6g/L, 40 ⁇ 60ml of formaldehyde with a concentration of 35%. /L, the solution is alkaline, the pH range is 11.0-14.0, and the temperature range is 55-65°C.
  • FIG. 13 is a flow chart of Example 13 of the method for preparing a conductive via according to an embodiment of the present disclosure; as shown in FIG. 13 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 131 includes but is not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, and Al2O3.
  • the dielectric layer 131 is laser drilled to form a connection The dielectric layer 131 of the via hole 131a.
  • step S131 may specifically include: using a laser to strike the surface of the dielectric layer 131 (the first surface or the second surface) in a manner of perpendicular incidence of the laser beam, when the laser beam interacts with the dielectric layer 131, due to the laser photon energy Higher ionizes the atoms constituting the dielectric layer 131 and throws them out of the surface of the dielectric layer 131 , and the holes drilled gradually deepen as time goes on until the entire dielectric layer 131 is penetrated, that is, the connection via hole 131 a is formed.
  • the inclination angle of the connection via hole 131a ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 131a is 5°.
  • the shape of the connecting via hole 131a is similar to a cylinder or is a truncated cone or a rounded truncated cone.
  • the available laser wavelengths are 532nm, 355nm, 266nm, 248nm, 197nm, etc.
  • the pulse width of the laser can be 1 ⁇ 100fs, 1 ⁇ 100ps, 1 ⁇ 100ns, etc.
  • the type of laser can be continuous laser, pulse laser, etc. There are laser drilling methods. When the spot diameter is large, the relative position of the laser beam and the dielectric layer 131 is fixed, and the dielectric layer 131 is directly pierced by high energy.
  • the shape of the connecting via hole 131a is a rounded platform, and the diameter is from top to bottom. Decrease in turn.
  • the diameter of the connection via hole 131a on the second surface is in the range of 80-120um, and the diameter of the connection via hole 131a on the first surface is in the range of 60-100um.
  • the laser beam scans in a circle on the medium layer 131, the focal point of the spot is constantly changing, and the depth of focus is also constantly changing, from the lower surface of the medium layer 131 to the upper surface of the medium layer 131.
  • the dielectric layer 131 is laser cut into a truncated cone shape, and falls down due to the action of gravity, thereby forming a connecting via hole 131a, which is in the shape of a truncated cone.
  • the diameter of the connection via hole 131a on the second surface is in the range of 100-1000um, and the diameter of the connection via hole 131a on the first surface is in the range of 150-1500um.
  • step S132 after step S131 is completed, the dielectric layer 131 is cleaned to remove residues and debris near the inner wall of the connection via hole 131 a and the outer edge of the connection via hole 131 a.
  • step S132 may specifically include: putting the medium layer 131 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 131 is taken out from the water tank, and dried with an air knife.
  • step S133 after step S132 is completed, form a metal thin film 1320 in the connection via hole 131 a of the dielectric layer 131 and on the first surface and the second surface as a seed layer.
  • step S133 may specifically include: depositing a metal thin film 1320 with good conductivity on the entire surface of the first surface and the second surface of the dielectric layer 131 as a seed layer by means including but not limited to magnetron sputtering.
  • magnetron sputtering methods for forming the metal thin film 120 may also be electron beam evaporation, thermal evaporation, pulsed laser sputtering, and the like.
  • the metal thin film includes a first sub-metal film layer and a second sub-metal film layer arranged in sequence along a direction away from the dielectric layer 131 .
  • the material of the first sub-metal film layer includes but not limited to titanium (Ti), molybdenum (Mo), nickel (Ni)
  • the material of the second sub-metal film layer includes but not limited to copper (Cu) , silver (Ag) or gold (Au) in any one.
  • the metal thin film includes any one of Ti/Cu, Mo/Cu, Ni/Cu, Ti/Ag, Mo/Ag, and Ni/Ag.
  • the thickness range of the first sub-metal film layer is about 1 nm ⁇ 100 nm; the thickness range of the second sub metal film layer is about 50 nm ⁇ 1000 nm.
  • the thickness of the metal thin film connecting the inner wall of the via hole 131a is about 1nm-200nm.
  • step S134 After step S133 is completed, fill the connection via hole 131a through an electroplating process, and thicken the metal film 1320 formed on the first surface and the second surface, so as to form The first extraction electrode 13201 and the second extraction electrode 13202 on the surface, and the connection electrode 13203 located in the connection via hole 131a are formed.
  • step S14 may specifically include: by rationally matching different types of electroplating solutions (such as the formula for filling the connection via hole 131a and the formula for thickening the entire surface of the metal film), first perform hole-filling electroplating in the electroplating tank, so that Metal film 1320 (for example: the first sub-metal film layer in metal film 1320) is deposited on the inner wall of connection via hole 131a, and the electroplating rate is 0.5um/minute ⁇ 5um/minute, with the length of electroplating time, metal material can form hole Filled (thickness equal to 0.5 times the aperture) or not filled, only the inner wall of the hole is metallized (thickness 500nm-10um), that is, the connection electrode 13203 is formed.
  • electroplating solutions such as the formula for filling the connection via hole 131a and the formula for thickening the entire surface of the metal film
  • the electroplating metal is Cu, Ag or Au, and the electroplating rate is 0.5um. /min ⁇ 5um/min, depending on the electroplating time, the thickness of the thickened metal film 1320a is about 500nm ⁇ 500um.
  • the surface of the dielectric layer 11 will generally be uneven, which will affect the subsequent process flow. Therefore, a chemical mechanical polishing process is finally performed to make the surface of the dielectric layer 131 flat and smooth, forming the first lead-out electrode 13201 and the second lead-out electrode. 13202.
  • the thickened metal film 1320a on the first surface and the second surface can also be patterned to form the first extraction electrode 13201 and the second extraction electrode 13202 .
  • FIG. 14 is a flow chart of Example 14 of the method for preparing a conductive via in an embodiment of the present disclosure; as shown in FIG. 14 , the preparation method specifically includes the following steps:
  • S141 provide a dielectric layer 141, the material of the dielectric layer 141 includes but not limited to any one of glass, Si, and SOI, and perform laser drilling on the dielectric layer 141 to form the dielectric layer 141 with connection via holes 141a.
  • step S141 may specifically include: using a laser to hit the surface of the dielectric layer 141 (the first surface or the second surface) in a manner of vertical incidence of the laser beam.
  • the laser beam interacts with the dielectric layer 141, due to the laser photon energy
  • the atoms that make up the dielectric layer 141 are ionized and ejected from the surface of the dielectric layer 141 , and the holes drilled gradually deepen as time goes by until the entire dielectric layer 141 is penetrated, that is, the connection via hole 141a is formed.
  • the inclination angle of the connection via hole 141a ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 141a is 5°.
  • the shape of the connection via hole 141a is similar to a cylinder or is a truncated cone or a rounded truncated cone.
  • the available laser wavelengths are 532nm, 355nm, 266nm, 248nm, 197nm, etc.
  • the pulse width of the laser can be 1 ⁇ 100fs, 1 ⁇ 100ps, 1 ⁇ 100ns, etc.
  • the type of laser can be continuous laser, pulse laser, etc. There are laser drilling methods. When the spot diameter is large, the relative position of the laser beam and the dielectric layer 141 is fixed, and the dielectric layer 141 is directly pierced by high energy.
  • the shape of the connecting via hole 141a is a rounded platform, and the diameter is from top to bottom. Decrease in turn.
  • the diameter of the connection via hole 141a on the second surface is in the range of 80-120um, and the diameter of the connection via hole 141a on the first surface is in the range of 60-100um.
  • the laser beam scans in a circle on the medium layer 141, the focal point of the spot is constantly changing, and the depth of focus is also constantly changing, from the lower surface of the medium layer 141 to the upper surface of the medium layer 141.
  • the dielectric layer 141 is laser cut into a truncated cone shape, and falls down due to the action of gravity, thereby forming a connecting via hole 141a, which is in the shape of a truncated cone.
  • the diameter of the connection via hole 141a on the second surface is in the range of 100-1000um
  • the diameter of the connection via hole 141a on the first surface is in the range of 150-1500um.
  • step S142 after step S141 is completed, the dielectric layer 141 is cleaned to remove residues and debris near the inner wall of the connection via hole 141 a and the outer edge of the connection via hole 141 a.
  • step S142 may specifically include: putting the dielectric layer 141 into a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 141 in a solution containing hydrofluoric acid for chemical corrosion, glass, Si, Defects such as the microcrack area Q1 and the stress concentration area Q2 in the hole wall near the connection via hole 141a on the SOI dielectric layer 141 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the dielectric layer 141 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 141a after chemical etching has a smooth inner wall and surface, and does not contain defects such as microcrack area Q1 and stress concentration area Q2, which is conducive to the growth of high-quality seed layer, metal hole filling and metal thickening.
  • step S143 after step S142 is completed, form a metal thin film 1420 in the connection via hole 141 a of the dielectric layer 141 and on the first surface and the second surface as a seed layer.
  • step S143 may specifically include: depositing a metal thin film 1420 with good conductivity on the entire surface of the first surface and the second surface of the dielectric layer 141 as a seed layer by means including but not limited to magnetron sputtering.
  • the metal thin film 1420 may be formed by electron beam evaporation, thermal evaporation, pulsed laser sputtering, etc. in addition to magnetron sputtering.
  • the metal thin film includes a first sub-metal film layer and a second sub-metal film layer arranged in sequence along a direction away from the dielectric layer 141 .
  • the material of the first sub-metal film layer includes but not limited to titanium (Ti), molybdenum (Mo), nickel (Ni)
  • the material of the second sub-metal film layer includes but not limited to copper (Cu) , silver (Ag) or gold (Au) in any one.
  • the metal thin film includes any one of Ti/Cu, Mo/Cu, Ni/Cu, Ti/Ag, Mo/Ag, and Ni/Ag.
  • the thickness range of the first sub-metal film layer is about 1 nm ⁇ 100 nm; the thickness range of the second sub metal film layer is about 50 nm ⁇ 1000 nm.
  • the thickness of the metal thin film connecting the inner wall of the via hole 141 a is about 1 nm ⁇ 200 nm.
  • step S144 After step S143 is completed, fill the connection via hole 141a through an electroplating process, and thicken the metal film 1420 formed on the first surface and the second surface, so as to form The first extraction electrode 14201 and the second extraction electrode 14202 on the surface, and the connection electrode 14203 located in the connection via hole 141a are formed.
  • step S14 may specifically include: by reasonably matching different types of electroplating solutions (such as the formula for filling the connection via hole 141a and the formula for thickening the entire surface of the metal film), firstly perform hole-filling electroplating in the electroplating tank, so that Metal film 1420 (for example: the first sub-metal film layer in metal film 1420) is deposited on the inner wall of connection via hole 141a, and the electroplating rate is 0.5um/minute ⁇ 5um/minute. Filled (film thickness equal to 0.5 times the pore diameter) or not filled, only the inner wall of the hole is metallized (film thickness 500nm-10um), that is, the connection electrode 14203 is formed.
  • electroplating solutions such as the formula for filling the connection via hole 141a and the formula for thickening the entire surface of the metal film
  • the electroplating metal is Cu, Ag or Au, and the electroplating rate is 0.5um. /min ⁇ 5um/min, depending on the length of electroplating time, the thickness of the thickened metal film 1420a is about 500nm ⁇ 500um.
  • the chemical mechanical polishing process is finally performed to make the surface of the dielectric layer 141 flat and smooth, and form the first lead-out electrode 41201 and the second lead-out electrode. 14202.
  • the thickened metal film 1420a on the first surface and the second surface can also be patterned to form the first extraction electrode 14201 and the second extraction electrode 14202 .
  • FIG. 15 is a flow chart of Example 15 of a method for preparing a conductive via according to an embodiment of the present disclosure; as shown in FIG. 15 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 151 includes but is not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, and Al2O3.
  • the dielectric layer 151 is laser drilled to form a connection The dielectric layer 151 of the via hole 151a.
  • step S151 may specifically include: using a laser to hit the surface of the dielectric layer 151 (the first surface or the second surface) in a manner of perpendicular incidence of the laser beam, when the laser beam interacts with the dielectric layer 151, due to the laser photon energy Higher ionizes the atoms constituting the dielectric layer 151 and throws them out of the surface of the dielectric layer 151, and the holes drilled gradually deepen as time goes by until the entire dielectric layer 151 is penetrated, that is, the connection via hole 151a is formed.
  • the inclination angle of the connection via hole 151a ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 151a is 5°.
  • connection via holes 151a and 141a is similar to a cylinder or a truncated cone or a rounded truncated cone.
  • the available laser wavelengths are 532nm, 355nm, 266nm, 248nm, 197nm, etc.
  • the pulse width of the laser can be 1 ⁇ 100fs, 1 ⁇ 100ps, 1 ⁇ 100ns, etc.
  • the type of laser can be continuous laser, pulse laser, etc. There are laser drilling methods. When the spot diameter is large, the relative position of the laser beam and the dielectric layer 151 is fixed, and the dielectric layer 151 is directly pierced by high energy.
  • the shape of the connecting via hole 151a is a rounded platform, and the diameter is from top to bottom. Decrease in turn.
  • the diameter of the connection via hole 151a on the second surface is in the range of 80-120um, and the diameter of the connection via hole 151a on the first surface is in the range of 60-100um.
  • the laser beam scans in a circle on the medium layer 151, the focal point of the spot is constantly changing, and the depth of focus is also constantly changing, from the lower surface of the medium layer 151 to the upper surface of the medium layer 151.
  • the dielectric layer 151 is laser cut into a truncated cone shape, and falls down due to the action of gravity, thereby forming a connecting via hole 151a, which is in the shape of a truncated cone.
  • the diameter of the connection via hole 151a on the second surface is in the range of 100-1000um
  • the diameter of the connection via hole 151a on the first surface is in the range of 150-1500um.
  • step S152 After step S151 is completed, the dielectric layer 151 is cleaned, and the residues and debris near the inner wall of the connection via hole 151a and the outer edge of the connection via hole 151a (15b shown in FIG. 15) are removed.
  • step S152 may specifically include: putting the medium layer 151 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 151 is taken out from the water tank, and dried with an air knife.
  • step S153 after step S152 is completed, squeeze the metal paste 1520 into the connection via hole 151a of the dielectric layer 151, and form the metal paste 1520 on the first surface and the second surface of the dielectric layer 151, and then make the first surface and the second surface respectively
  • the metal paste 1520 on the second surface is cured to form the connection electrode 15203 filled in the connection via hole 151a, the first lead-out electrode 15201 on the first surface, and the second lead-out electrode 15202 on the second surface.
  • the metal paste 1520 can be a conductive paste.
  • the material of the conductive paste includes but is not limited to a low-temperature curing polymer conductive paste.
  • the main components are conductive particles, resin, curing agent, dispersant, diluent, adhesion Strengthening agent and anti-settling agent.
  • the conductive particles can be selected from Cu, Ag, and Au, and the particle size ranges from about 1 nm to 100 um.
  • the resin can choose bisphenol epoxy resin, the curing agent can choose acid anhydride, the dispersant can choose methylimidazole, the diluent can choose butyl acetate, the adhesion enhancer can choose tetraethyl titanate, and the anti-sedimentation agent can choose Polyamides.
  • Step S153 may specifically include: first coating the conductive paste in the connection via hole 151a and around the edge of the hole on the second surface, and then performing solvent drying and thermal curing on the second surface side of the dielectric layer 151 to form a filling in the connection hole.
  • the preferred coating methods of the conductive paste include but are not limited to screen printing, inkjet printing, slit coating, etc., and the use of vacuum adsorption machines during coating can improve the coating efficiency and improve the coating efficiency of the conductive paste on the hole wall. and the distribution profile at the edge of the hole. Solvent drying can be carried out under normal air pressure, N2 normal pressure, and vacuum, the temperature range is about 40°C to 95°C, and the time is about 1 minute to 30 minutes.
  • Thermal curing can be carried out in an oven, the atmosphere is N2, and the heating temperature is about 140 °C ⁇ 200 °C; or it can be cured by laser beam irradiation, the laser wavelength range is about 500nm ⁇ 1510nm, and the laser beam power range is about 50mW ⁇ 50W.
  • the beam diameter ranges from 10um to 2000um, and the laser beam can be a single beam or multiple beams.
  • FIG. 16 is a flow chart of Example 16 of a method for preparing a conductive via according to an embodiment of the present disclosure; as shown in FIG. 16 , the preparation method specifically includes the following steps:
  • S161 provide a dielectric layer 161, the material of the dielectric layer 161 includes but not limited to any one of glass, Si, and SOI, and perform laser drilling on the dielectric layer 161 to form the dielectric layer 161 with connection via holes 161a.
  • step S161 may specifically include: using a laser to hit the surface of the dielectric layer 161 (the first surface or the second surface) in a manner that the laser beam is perpendicularly incident, and when the laser beam interacts with the dielectric layer 161, due to the laser photon energy
  • the atoms that make up the dielectric layer 161 are ionized and ejected from the surface of the dielectric layer 161 , and the holes drilled gradually deepen as time goes on until the entire dielectric layer 161 is penetrated, that is, the connection via hole 161 a is formed.
  • the inclination angle of the connection via hole 161a ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 161a is 5°. That is to say, the shape of the connection via holes 161a and 141a is similar to a cylinder or a truncated cone shape or a rounded truncated cone shape.
  • the shape of the connection via holes 161a and 141a is similar to a cylinder or a truncated cone shape or a rounded truncated cone shape.
  • the pulse width of the laser can be 1-100fs, 1-100ps, 1-100ns, etc.
  • the type of laser can be continuous laser, pulse laser, etc. There are laser drilling methods.
  • the relative position of the laser beam and the dielectric layer 161 is fixed, and the dielectric layer 161 is directly pierced by high energy.
  • the shape of the connecting via hole 161a is a rounded platform, and the diameter is from top to bottom. Decrease in turn.
  • the diameter of the connection via hole 161a on the second surface is in the range of 80-120um, and the diameter of the connection via hole 161a on the first surface is in the range of 60-100um.
  • the laser beam scans in a circle on the medium layer 161, the focal point of the spot is constantly changing, and the depth of focus is also constantly changing, from the lower surface of the medium layer 161 to the upper surface of the medium layer 161.
  • the dielectric layer 161 is laser cut into a truncated cone shape and falls down due to the action of gravity, thereby forming a connecting via hole 161a, which is in the shape of a truncated cone.
  • the diameter of the connection via hole 161a on the second surface is in the range of 100-1000um, and the diameter of the connection via hole 161a on the first surface is in the range of 150-1500um.
  • step S162 clean the dielectric layer 161, and clean and remove the inner wall of the connection via hole 161a and the residues and debris near the outer edge of the connection via hole 161a (16b shown in FIG. 16).
  • step S162 may specifically include: placing the dielectric layer 161 in a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 161 in a solution containing hydrofluoric acid for chemical etching, glass, Si, Defects such as the microcrack region Q1 and the stress concentration region Q2 in the hole wall near the connection via hole 161a on the SOI dielectric layer 161 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the dielectric layer 161 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 161a after chemical etching has a smooth inner wall and surface, and does not contain defects such as microcrack area Q1 and stress concentration area Q2, which is conducive to the growth of high-quality seed layer, metal filling and metal thickening.
  • step S163 after completing step S162, squeeze the metal paste into the connection via hole 161a of the dielectric layer 161, and form the metal paste on the first surface and the second surface of the dielectric layer 161, and then make the first surface and the second surface respectively
  • the metal paste on the surface is solidified to form the connection electrode 16203 filled in the connection via hole 161a, the first lead-out electrode 16201 on the first surface, and the second lead-out electrode 16202 on the second surface.
  • the metal paste can be a conductive paste
  • the material of the conductive paste includes but is not limited to a low-temperature curing polymer conductive paste
  • the main components are conductive particles, resin, curing agent, dispersant, diluent, adhesion enhancement agent and anti-settling agent.
  • the conductive particles can be selected from Cu, Ag, and Au, and the particle size ranges from about 1 nm to 100 um.
  • the resin can choose bisphenol epoxy resin, the curing agent can choose acid anhydride, the dispersant can choose methylimidazole, the diluent can choose butyl acetate, the adhesion enhancer can choose tetraethyl titanate, and the anti-sedimentation agent can choose Polyamides.
  • Step S163 may specifically include: first coating the conductive paste in the connection via hole 161a and around the edge of the hole on the second surface, and then performing solvent drying and thermal curing on the second surface side of the dielectric layer 161 to form a filling in the connection hole 161a.
  • the preferred coating methods of the conductive paste include but are not limited to screen printing, inkjet printing, slit coating, etc., and the use of vacuum adsorption machines during coating can improve the coating efficiency and improve the coating efficiency of the conductive paste on the hole wall. and the distribution profile at the edge of the hole. Solvent drying can be carried out under normal air pressure, N2 normal pressure and vacuum, the temperature range is about 40°C-95°C, and the time is about 1 minute-30 minutes.
  • Thermal curing can be carried out in an oven, the atmosphere is N2, and the heating temperature is about 140 °C ⁇ 200 °C; or it can be cured by laser beam irradiation, the laser wavelength range is about 500nm ⁇ 1510nm, and the laser beam power range is about 50mW ⁇ 50W.
  • the beam diameter ranges from 10um to 2000um, and the laser beam can be a single beam or multiple beams.
  • FIG. 17 is a flow chart of Example 17 of a method for preparing a conductive via according to an embodiment of the present disclosure; as shown in FIG. 17 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 171 includes but is not limited to any one of glass, Si, SOI, GaAs, SiC, InP, PCB, and Al2O3.
  • the dielectric layer 171 is laser drilled to form a connection The dielectric layer 171 of the via hole 171a.
  • step S171 may specifically include: using a laser to hit the surface of the dielectric layer 171 (the first surface or the second surface) in a manner of vertical incidence of the laser beam.
  • the laser beam interacts with the dielectric layer 171, due to the laser photon energy
  • the atoms that make up the dielectric layer 171 are ionized and ejected from the surface of the dielectric layer 171 , and the holes drilled gradually deepen as time goes by until the entire dielectric layer 171 is penetrated, that is, the connection via hole 171a is formed.
  • the inclination angle of the connection via hole 171a ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 171a is 5°.
  • the available laser wavelengths are 532nm, 355nm, 266nm, 248nm, 197nm, etc.
  • the pulse width of the laser can be 1 ⁇ 100fs, 1 ⁇ 100ps, 1 ⁇ 100ns, etc.
  • the type of laser can be continuous laser, pulse laser, etc. There are laser drilling methods. When the spot diameter is large, the relative position of the laser beam and the dielectric layer 171 is fixed, and the dielectric layer 171 is directly pierced by high energy.
  • the shape of the connecting via hole 171a is a rounded platform, and the diameter is from top to bottom. Decrease in turn.
  • the diameter of the connection via hole 171a on the second surface is in the range of 80-120um, and the diameter of the connection via hole 171a on the first surface is in the range of 60-100um.
  • the laser beam scans in a circle on the medium layer 171, the focal point of the spot is constantly changing, and the depth of focus is also constantly changing, from the lower surface of the medium layer 171 to the upper surface of the medium layer 171.
  • spiral, and the spiral radius decreases sequentially from bottom to top, the dielectric layer 171 is laser cut into a truncated cone shape, and falls down due to the action of gravity, thereby forming a connecting via hole 171a, which is in the shape of a truncated cone.
  • the diameter of the connection via hole 171a on the second surface is in the range of 100-1000um, and the diameter of the connection via hole 171a on the first surface is in the range of 150-1500um.
  • step S172 After step S171 is completed, clean the dielectric layer 171, and clean and remove the residues and debris near the inner wall of the connection via hole 171a and the outer edge of the connection via hole 171a (shown as 17b in FIG. 17).
  • step S172 may specifically include: putting the medium layer 171 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 171 is taken out from the water tank, and dried with an air knife.
  • step S172 After step S172 is completed, an electroless plating medium 1720 is formed on the first surface and the second surface of the dielectric layer 171 on which the connection via hole 171a is formed.
  • step S173 may specifically include: using a spray method or directly putting the dielectric layer 171 into a water bath containing the electroless plating medium 1720 solution, so that a layer of Sn 2+ is adsorbed on the surface of the dielectric layer 171 .
  • the main components of the chemical plating medium 1720 solution are SnCl 2 10-30g/L, concentrated hydrochloric acid (38% concentration) 20-60ml/L, deionized water, and a small amount of Sn grains are added to prevent Sn 2+ from being oxidized.
  • the surface of the medium layer 171 reacts with the activation solution (the main components of the activation solution are SnCl 80-120g/L, concentrated hydrochloric acid 300-500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water), metal palladium particles are produced and closely adhered to the surface of the dielectric layer 171, that is, in the dielectric layer 171 formed with the connection via hole 171a
  • An electroless plating medium 1720 is formed on the first surface and the second surface.
  • step S174 after step S173 is completed, perform electroless plating on the dielectric layer 171 formed with the electroless plating medium 1720, form the first surface, the second surface of the dielectric layer 171, and the metal film in the connection via hole 171a, and form The metal thin film on the first surface and the second surface of the dielectric layer 171 is patterned to form the first lead-out electrode 17201 and the second lead-out electrode 17202 , as well as the connection electrode 17203 located in the connection via hole 171a.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • only Cu metal thin film (thickness is about 1-100um) is plated alone.
  • only Cu is used as the material for plating a single layer of metal film
  • Ni/Cu is used for laminating the metal film as an example, but this does not constitute a limitation to the protection scope of the embodiment of the present disclosure.
  • the electroless Ni/Cu metal thin film is taken as an example for illustration.
  • step S174 may specifically include: putting the dielectric layer 171 into an electroless plating solution, and sequentially performing electroless plating of metals Ni and Cu. Afterwards, the metal thin film formed on the first surface and the second surface of the dielectric layer 171 is patterned to form the first lead-out electrode 17201 and the second lead-out electrode 17202, as well as the connection electrode 17203 located in the connection via hole 171a.
  • the general composition of electroless Ni plating solution is NiSO4 6H2O 10 ⁇ 30g/L, NaH2PO4 2H2O 20 ⁇ 40g/L, sodium citrate 5 ⁇ 15g/L, NH4Cl 20 ⁇ 40g/L, the solution is alkaline, pH The range is 8.0 ⁇ 10.0, and the temperature range is 75 ⁇ 90°C.
  • the general composition of electroless Cu plating solution is KNaC4H4O6 30 ⁇ 50g/L, NaOH8 ⁇ 10g/L, Na2CO3 38 ⁇ 40g/L, CuSO4 10 ⁇ 20g/L, NiCl2 2 ⁇ 6g/L, 40 ⁇ 60ml of formaldehyde with a concentration of 35%. /L, the solution is alkaline, the pH range is 11.0-14.0, and the temperature range is 55-65°C.
  • FIG. 18 is a flow chart of Example 18 of a method for preparing a conductive via according to an embodiment of the present disclosure; as shown in FIG. 18 , the preparation method specifically includes the following steps:
  • the material of the dielectric layer 181 includes but not limited to any one of glass, Si, and SOI, and perform laser drilling on the dielectric layer 181 to form the dielectric layer 181 with connection via holes 181a.
  • step S181 may specifically include: using a laser to hit the surface of the dielectric layer 181 (the first surface or the second surface) in a manner of vertical incidence of the laser beam, when the laser beam interacts with the dielectric layer 181, due to the laser photon energy
  • the atoms that make up the dielectric layer 181 are ionized and ejected from the surface of the dielectric layer 181 , and the holes drilled gradually deepen as time goes by until the entire dielectric layer 181 is penetrated, that is, the connection via hole 181a is formed.
  • the inclination angle of the connection via hole 181a ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 181a is 5°.
  • the available laser wavelengths are 532nm, 355nm, 266nm, 248nm, 197nm, etc.
  • the pulse width of the laser can be 1 ⁇ 100fs, 1 ⁇ 100ps, 1 ⁇ 100ns, etc.
  • the type of laser can be continuous laser, pulse laser, etc. There are laser drilling methods. When the diameter of the spot is large, the relative position of the laser beam and the dielectric layer 181 is fixed, and the dielectric layer 181 is directly pierced by high energy.
  • the shape of the connecting via hole 181a is a rounded platform, and the diameter is from top to bottom. Decrease in turn.
  • the diameter of the connection via hole 181a on the second surface is in the range of 80-120um, and the diameter of the connection via hole 181a on the first surface is in the range of 60-100um.
  • the laser beam scans in a circle on the medium layer 181, the focal point of the spot is constantly changing, and the depth of focus is also constantly changing, from the lower surface of the medium layer 181 to the upper surface of the medium layer 181.
  • spiral, and the spiral radius decreases sequentially from bottom to top, the dielectric layer 181 is laser cut into a truncated cone shape, and falls down due to the action of gravity, thereby forming a connecting via hole 181a, which is in the shape of a truncated cone.
  • the diameter range of the connection via hole 181a on the second surface is about 100-1000um, and the diameter range of the connection via hole 181a on the first surface is about 150-1500um.
  • step S182 the dielectric layer 181 is cleaned to remove the residues and debris near the inner wall of the connection via hole 181a and the outer edge of the connection via hole 181a (shown as 18b in FIG. 18 ).
  • step S182 may specifically include: placing the dielectric layer 181 in a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 181 in a solution containing hydrofluoric acid for chemical corrosion, glass, Si, Defects such as the microcrack area Q1 and the stress concentration area Q2 in the hole wall near the connection via hole 181a on the SOI dielectric layer 181 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the medium layer 181 is rinsed thoroughly, and finally dried with an air knife.
  • the connection via hole 181a after chemical etching has a smooth inner wall and surface, and does not contain defects such as microcrack area Q1 and stress concentration area Q2, which is conducive to the growth of high-quality seed layer, metal filling and metal thickening.
  • step S183 After step S182 is completed, an electroless plating medium is formed on the first surface and the second surface of the dielectric layer 181 on which the connection via hole 181a is formed.
  • step S173 may specifically include: using a spray method or directly putting the dielectric layer 181 into a water tank containing an electroless plating medium solution, so that a layer of Sn 2+ is adsorbed on the surface of the dielectric layer 181 .
  • the main components of the electroless plating medium solution are SnCl 2 10-30g/L, concentrated hydrochloric acid (38% concentration) 20-60ml/L, deionized water, and a small amount of Sn particles are added to prevent Sn 2+ from being oxidized.
  • the surface of the medium layer 181 reacts with the activation solution (activation solution main component SnCl 80 ⁇ 120g/L, concentrated hydrochloric acid 300 ⁇ 500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water), metal palladium particles are produced and closely adhered to the surface of the dielectric layer 181, that is, in the dielectric layer 181 formed with the connection via hole 181a An electroless plating medium is formed on the first surface and the second surface.
  • activation solution activation solution main component SnCl 80 ⁇ 120g/L, concentrated hydrochloric acid 300 ⁇ 500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water
  • metal palladium particles are produced and closely adhered to the surface of the dielectric layer 181, that is, in the dielectric layer 181 formed with the connection via hole 181a
  • An electroless plating medium is formed on the first surface and the second
  • step S184 after step S183 is completed, perform electroless plating on the dielectric layer 181 formed with the electroless plating medium, form the first surface, the second surface of the dielectric layer 181, and the metal film in the connection via hole 181a, and form the metal film on the dielectric layer 181
  • the metal thin film on the first surface and the second surface of the dielectric layer 181 is patterned to form the first lead-out electrode 18201 and the second lead-out electrode 18202, as well as the connection electrode 18203 located in the connection via hole 181a.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • only Cu metal thin film (thickness is about 1-100um) is plated alone.
  • only Cu is used as the material for plating a single layer of metal film
  • Ni/Cu is used for laminating the metal film as an example, but this does not constitute a limitation to the protection scope of the embodiment of the present disclosure.
  • the electroless Ni/Cu metal thin film is taken as an example for illustration.
  • step S184 may specifically include: putting the dielectric layer 181 into an electroless plating solution, and sequentially performing electroless plating of metals Ni and Cu. Afterwards, the metal thin film formed on the first surface and the second surface of the dielectric layer 181 is patterned to form the first lead-out electrode 18201 and the second lead-out electrode 18202, as well as the connection electrode 18203 located in the connection via hole 181a.
  • the general composition of electroless Ni plating solution is NiSO4 ⁇ 6H2O 10 ⁇ 30g/L, NaH2PO4 ⁇ 2H2O 20 ⁇ 40g/L, sodium citrate 5 ⁇ 15g/L, NH4Cl 20 ⁇ 40g/L, the solution is alkaline, pH The range is 8.0 ⁇ 10.0, and the temperature range is 75 ⁇ 90°C.
  • the general composition of electroless Cu plating solution is KNaC4H4O6 30 ⁇ 50g/L, NaOH8 ⁇ 10g/L, Na2CO3 38 ⁇ 40g/L, CuSO4 10 ⁇ 20g/L, NiCl2 2 ⁇ 6g/L, 40 ⁇ 60ml of formaldehyde with a concentration of 35%. /L, the solution is alkaline, the pH range is 11.0-14.0, and the temperature range is 55-65°C.
  • Fig. 19a is a flowchart of Example 19 of the method for preparing a conductive via according to an embodiment of the present disclosure
  • Fig. 19b is another flowchart of Example 19 of a method of preparing a conductive via according to an embodiment of the present disclosure
  • Fig. 19a As shown in and 19b, the preparation method specifically includes the following steps:
  • step S191 may specifically include: using an etching method to prepare the connection via hole 191a on the dielectric layer 191.
  • etching method There are two types of etching: wet etching and dry etching.
  • wet etching wet etching
  • dry etching By reasonably selecting the etching type, The preparation of the connection via hole 191a on the dielectric layer 191 can be realized by the formula of the etching solution or the ratio of the etching gas, the length of the etching time, the temperature, etc.
  • the formation of the connection via hole 191a penetrating through the dielectric layer 191 by wet or dry etching will be described below.
  • the mask layer 100 formed on the first surface of the dielectric layer 191 is prepared by a photolithography process (for example: photoresist or two The mask layer 100 formed by a silicon oxide film), the dielectric layer 191 is etched in a 90° C.
  • the inclination angle of the connection via hole 191 a ranges from about 0° to 45°, for example, the inclination angle of the connection via hole 191 a is 15°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • the mask layer 100 for a silicon substrate with crystal orientation (100) orientation as the dielectric layer 191
  • the mask layer 100 for example: photoresist or The mask layer 100 formed by a silicon dioxide film is dry-etched to place the dielectric layer 191 in a vacuum chamber of a reactive ion etching machine or an inductively coupled plasma etching machine, with an air pressure of 40-60 Pa, Cl2 gas and He
  • the gas ratio is 3-6:10
  • the dielectric layer 191 is heated to 40° C., and the depth of the hole increases with time until the mask layer 100 is cut through, that is, the connection via hole 191 a is formed.
  • the inclination angle of the connection via hole 191a ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 191a is 5°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • step S192 after step S191 is completed, the dielectric layer 191 is cleaned to remove residues and debris near the inner wall of the connection via hole 191 a and the outer edge of the connection via hole 191 a.
  • step S192 may specifically include: putting the medium layer 191 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 191 is taken out from the water tank and dried with an air knife.
  • step S193 after step S192 is completed, form a metal thin film 1920 in the connection via hole 191 a of the dielectric layer 191 and on the first surface and the second surface as a seed layer.
  • step S193 may specifically include: depositing a metal thin film 1920 with good conductivity on the entire surface of the first surface and the second surface of the dielectric layer 191 as a seed layer by means including but not limited to magnetron sputtering.
  • the metal thin film 1920 can be formed by electron beam evaporation, thermal evaporation, pulsed laser sputtering, etc. in addition to magnetron sputtering.
  • the metal thin film includes a first sub-metal film layer and a second sub-metal film layer arranged in sequence along a direction away from the dielectric layer 191 .
  • the material of the first sub-metal film layer includes but not limited to titanium (Ti), molybdenum (Mo), nickel (Ni)
  • the material of the second sub-metal film layer includes but not limited to copper (Cu) , silver (Ag) or gold (Au) in any one.
  • the metal thin film includes any one of Ti/Cu, Mo/Cu, Ni/Cu, Ti/Ag, Mo/Ag, and Ni/Ag.
  • the thickness range of the first sub-metal film layer is about 1 nm ⁇ 100 nm; the thickness range of the second sub metal film layer is about 50 nm ⁇ 1000 nm.
  • the thickness of the metal thin film connecting the inner wall of the via hole 191 a is about 1 nm ⁇ 200 nm.
  • step S193 fill the connection via hole 191a through an electroplating process, and thicken the metal film 1920 formed on the first surface and the second surface, so as to form The first extraction electrode 19201 and the second extraction electrode 19202 on the surface, and the connection electrode 19203 located in the connection via hole 191a are formed.
  • step S194 may specifically include: by rationally matching different types of electroplating solutions (such as the formula for filling the connection via hole 191a and the formula for thickening the entire surface of the metal film), first perform hole-filling electroplating in the electroplating tank, so that Metal film 1920 (for example: the first sub-metal film layer in metal film 1920) is deposited on the inner wall of connection via hole 191a, and the electroplating rate is 0.5um/minute ⁇ 5um/minute. Filling (film thickness equal to 0.5 times the pore diameter) or not filling only the inner wall of the hole is metallized (film thickness 500nm-10um), that is, the connection electrode 1203 is formed.
  • different types of electroplating solutions such as the formula for filling the connection via hole 191a and the formula for thickening the entire surface of the metal film
  • First perform hole-filling electroplating in the electroplating tank so that Metal film 1920 (for example: the first sub-metal film layer in metal film 1920) is deposited on the inner wall of
  • the electroplating metal is Cu, Ag or Au, and the electroplating rate is 0.5um. /min ⁇ 5um/min, depending on the electroplating time, the thickness of the thickened metal film 1920a is about 500nm ⁇ 500um.
  • the surface of the dielectric layer 191 will generally be uneven, which will affect the subsequent process flow. Therefore, the chemical mechanical polishing process is finally performed to make the surface of the dielectric layer 191 flat and smooth, forming the first lead-out electrode 19201 and the second lead-out electrode. 19202.
  • the thickened metal film 1920a on the first surface and the second surface can also be patterned to form the first extraction electrode 1201 and the second extraction electrode 19202 .
  • Figure 20a is a flowchart of Example 20 of the method for preparing a conductive via according to an embodiment of the present disclosure
  • Figure 20b is another flowchart of Example 20 of a method for preparing a conductive via according to an embodiment of the present disclosure; as shown in Figure 20a
  • the preparation method specifically includes the following steps:
  • step S191 may specifically include: using an etching method to prepare the connection via hole 201a on the dielectric layer 201.
  • an etching method to prepare the connection via hole 201a on the dielectric layer 201.
  • etching There are two types of etching: wet etching and dry etching.
  • wet etching wet etching
  • dry etching By reasonably selecting the etching type, The preparation of the connection via hole 201 a on the dielectric layer 201 can be realized by the formula of the etching solution or the ratio of the etching gas, the length of the etching time, and the temperature.
  • the formation of the connection via hole 201a penetrating through the dielectric layer 201 by wet or dry etching will be described below.
  • the mask layer 100 formed on the first surface of the dielectric layer 201 (for example: photoresist or two The mask layer 100 formed by a silicon oxide film), the dielectric layer 201 is etched in a 90° C. tetramethylammonium hydroxide aqueous solution by wet etching, and the depth of the hole increases with time until the dielectric layer 201 is Scribe through to remove the mask layer 100 , that is, to form the connection via hole 201 a , the inclination angle of the connection via hole 201 a ranges from about 0° to 45°, for example, the inclination angle of the connection via hole 201 a is 15°.
  • the mask layer 100 for a silicon substrate with crystal orientation (100) orientation as the dielectric layer 201, the mask layer 100 (for example: photoresist or The mask layer 100 formed by a silicon dioxide film, using dry etching to place the dielectric layer 201 in the vacuum chamber of a reactive ion etching machine or an inductively coupled plasma etching machine, with an air pressure of 40-60Pa, Cl2 gas and He The gas ratio is 3-6:10, the dielectric layer 201 is heated to 40°C, and the depth of the hole increases with time until it is cut through, and the mask layer 100 is removed, that is, the connection via hole 201a is formed, and the connection via hole 201a
  • the inclination angle ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 201a is 5°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • step S202 After step S201 is completed, clean the dielectric layer 201, and clean the inner wall of the connection via hole 201a and the residues and debris near the outer edge of the connection via hole 201a (201b shown in FIG. 20a and FIG. 20b ), etc. remove.
  • step S202 may specifically include: placing the dielectric layer 201 in a water tank, performing ultrasonic cleaning to remove floating dust on the surface, and then immersing the dielectric layer 201 in a solution containing hydrofluoric acid for chemical etching. Glass, Si, Defects such as the microcrack area Q1 and the stress concentration area Q2 in the hole wall near the connection via hole 201a on the SOI dielectric layer 201 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the medium layer 201 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 201a after chemical etching has a smooth inner wall and surface, and does not contain defects such as the microcrack area Q1 and the stress concentration area Q2, which is conducive to the growth of a high-quality seed layer, metal hole filling, and metal thickening.
  • step S203 after completing step S202 , forming a metal thin film 2020 as a seed layer in the connection via hole 201 a of the dielectric layer 201 , and on the first surface and the second surface.
  • step S203 may specifically include: depositing a metal thin film 2020 with good conductivity on the entire surface of the first surface and the second surface of the dielectric layer 11 as a seed layer by means including but not limited to magnetron sputtering.
  • the metal thin film 2020 may be formed in addition to magnetron sputtering, electron beam evaporation, thermal evaporation, pulsed laser sputtering and other methods.
  • the metal thin film includes a first sub-metal film layer and a second sub-metal film layer arranged in sequence along a direction away from the dielectric layer 201 .
  • the material of the first sub-metal film layer includes but not limited to titanium (Ti), molybdenum (Mo), nickel (Ni)
  • the material of the second sub-metal film layer includes but not limited to copper (Cu) , silver (Ag) or gold (Au) in any one.
  • the metal thin film includes any one of Ti/Cu, Mo/Cu, Ni/Cu, Ti/Ag, Mo/Ag, and Ni/Ag.
  • the thickness range of the first sub-metal film layer is about 1 nm ⁇ 100 nm; the thickness range of the second sub metal film layer is about 50 nm ⁇ 1000 nm.
  • the thickness of the metal thin film connecting the inner wall of the via hole 201 a is about 1 nm ⁇ 200 nm.
  • step S204 After step S203 is completed, fill the connection via hole 201a through the electroplating process, and thicken the metal film 2020 formed on the first surface and the second surface, so as to form The first extraction electrode 20201 and the second extraction electrode 20202 on the surface, and the connection electrode 20203 located in the connection via hole 201a are formed.
  • step S14 may specifically include: by rationally matching different types of electroplating solutions (such as the formula for filling the connection via hole 201a and the formula for thickening the entire surface of the metal film), firstly perform hole-filling electroplating in the electroplating tank, so that Metal film 2020 (for example: the first sub-metal film layer in metal film 2020) is deposited on the inner wall of connection via hole 201a, and the electroplating rate is 0.5um/minute ⁇ 5um/minute. Filled (film thickness is equal to 0.5 times the pore diameter) or not filled, only the inner wall of the hole is metallized (film thickness 500nm-10um), that is, the connection electrode 20203 is formed.
  • different types of electroplating solutions such as the formula for filling the connection via hole 201a and the formula for thickening the entire surface of the metal film
  • the electroplating metal is Cu, Ag or Au, and the electroplating rate is 0.5um. /min ⁇ 5um/min, depending on the electroplating time, the thickness of the thickened metal film 2020a is about 500nm ⁇ 500um.
  • the surface of the dielectric layer 201 will generally be uneven, which will affect the subsequent process flow. Therefore, a chemical mechanical polishing process is finally performed to make the surface of the dielectric layer 201 flat and smooth, forming the first lead-out electrode 20201 and the second lead-out electrode. 20202.
  • the thickened metal film 120a on the first surface and the second surface may also be patterned to form the first extraction electrode 20201 and the second extraction electrode 20202 .
  • Fig. 21a is a flowchart of Example 21 of the method for preparing a conductive via according to an embodiment of the present disclosure
  • Fig. 21b is another flowchart of Example 21 of a method of preparing a conductive via according to an embodiment of the present disclosure
  • Fig. 21a As shown in and 21b, the preparation method specifically includes the following steps:
  • step S211 may specifically include: using an etching method to prepare the connection via hole 211a on the dielectric layer 211.
  • an etching method there are two types of etching: wet etching and dry etching.
  • wet etching wet etching
  • dry etching By selecting the etching type reasonably, The preparation of the connection via hole 211 a on the dielectric layer 211 can be realized by the formula of the etching solution or the ratio of the etching gas, the length of the etching time, the temperature, and the like.
  • the formation of the connection via hole 211a penetrating through the dielectric layer 211 by wet or dry etching will be described below.
  • the mask layer 100 formed on the first surface of the dielectric layer 211 is first prepared by a photolithography process (for example: photoresist or two
  • a photolithography process for example: photoresist or two
  • the dielectric layer 211 is etched in a 90° C. tetramethylammonium hydroxide aqueous solution, and the depth of the hole increases with time until the dielectric layer 211 is covered.
  • the inclination angle of the connection via hole 211 a ranges from about 0° to 45°, for example, the inclination angle of the connection via hole 211 a is 15°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • the mask layer 100 for a silicon substrate with a crystal orientation (100) orientation as the dielectric layer 211, the mask layer 100 (for example: photoresist or The mask layer 100 formed by a silicon dioxide film, using dry etching to place the dielectric layer 211 in the vacuum chamber of a reactive ion etching machine or an inductively coupled plasma etching machine, with an air pressure of 40-60Pa, Cl2 gas and He The gas ratio is 3-6:10, the dielectric layer 211 is heated to 40°C, and the depth of the hole increases with time until it is cut through, and the mask layer 100 is removed, that is, the connection via hole 211a is formed, and the connection via hole 211a
  • the inclination angle ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 211a is 5°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • step S212 After step S211 is completed, clean the dielectric layer 211, and clean the inner wall of the connection via hole 211a and the residues and debris near the outer edge of the connection via hole 211a (211b shown in FIG. 21a and FIG. 21b ), etc. remove.
  • step S212 may specifically include: putting the medium layer 211 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 211 is taken out from the water tank, and dried with an air knife.
  • step S213 after step S212 is completed, squeeze the metal paste 2120 into the connection via hole 211a of the dielectric layer 211, and form the metal paste 2120 on the first surface and the second surface of the dielectric layer 211, and then make the first surface and the second surface respectively
  • the metal paste 2120 on the second surface is cured to form the connection electrode 21203 filled in the connection via hole 211a, the first lead-out electrode 21201 on the first surface, and the second lead-out electrode 21202 on the second surface.
  • the metal paste 2120 can be a conductive paste.
  • the material of the conductive paste includes but is not limited to a low-temperature curing polymer conductive paste.
  • the main components are conductive particles, resin, curing agent, dispersant, diluent, adhesion Strengthening agent and anti-settling agent.
  • the conductive particles can be selected from Cu, Ag, and Au, and the particle size ranges from about 1 nm to 100 um.
  • the resin can choose bisphenol epoxy resin, the curing agent can choose acid anhydride, the dispersant can choose methylimidazole, the diluent can choose butyl acetate, the adhesion enhancer can choose tetraethyl titanate, and the anti-sedimentation agent can choose Polyamides.
  • Step S213 may specifically include: first coating the conductive paste in the connection via hole 211a and around the edge of the hole on the second surface, and then performing solvent drying and thermal curing on the second surface side of the dielectric layer 211 to form a filling in the connection hole 211a.
  • the preferred coating methods of the conductive paste include but are not limited to screen printing, inkjet printing, slit coating, etc., and the use of vacuum adsorption machines during coating can improve the coating efficiency and improve the coating efficiency of the conductive paste on the hole wall. and the distribution profile at the edge of the hole. Solvent drying can be carried out under normal air pressure, N2 normal pressure and vacuum, the temperature range is about 40°C-95°C, and the time is about 1 minute-30 minutes.
  • Thermal curing can be carried out in an oven, the atmosphere is N2, and the heating temperature is about 140 °C ⁇ 200 °C; or it can be cured by laser beam irradiation, the laser wavelength range is about 500nm ⁇ 1510nm, and the laser beam power range is about 50mW ⁇ 50W.
  • the beam diameter ranges from 10um to 2000um, and the laser beam can be a single beam or multiple beams.
  • Fig. 22a is a flowchart of Example 22 of the method for preparing a conductive via according to an embodiment of the present disclosure
  • Fig. 22b is another flowchart of Example 22 of a method of preparing a conductive via according to an embodiment of the present disclosure
  • Fig. 22a As shown in and 22b, the preparation method specifically includes the following steps:
  • step S221 may specifically include: using an etching method to prepare the connection via hole 221a on the dielectric layer 221.
  • etching method There are two types of etching: wet etching and dry etching.
  • wet etching wet etching
  • dry etching By reasonably selecting the etching type, The preparation of the connection via hole 221 a on the dielectric layer 221 can be realized by the etchant solution formula or the proportion of the etchant gas, the length of the etching time, and the temperature.
  • the formation of the connection via hole 221a penetrating through the dielectric layer 221 by wet or dry etching will be described below.
  • the mask layer 100 formed on the first surface of the dielectric layer 221 is prepared by a photolithography process (for example: photoresist or two The mask layer 100 formed by a silicon oxide film), the dielectric layer 221 is etched in a 90° C.
  • the inclination angle of the connection via hole 221 a ranges from about 0° to 45°, for example, the inclination angle of the connection via hole 221 a is 15°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • the mask layer 100 for a silicon substrate with crystal orientation (100) orientation as the dielectric layer 221, the mask layer 100 (for example: photoresist or The mask layer 100 formed by a silicon dioxide film is dry-etched to place the dielectric layer 221 in a vacuum chamber of a reactive ion etching machine or an inductively coupled plasma etching machine, with an air pressure of 40-60 Pa, Cl2 gas and He The gas ratio is 3-6:10, the dielectric layer 221 is heated to 40°C, and the depth of the hole increases with time until it is carved through, and the mask layer 100 is removed, that is, the connection via hole 221a is formed, and the connection via hole 221a
  • the inclination angle ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 221a is 5°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • step S222 After step S221 is completed, the dielectric layer 221 is cleaned, and the residues and debris near the inner wall of the connection via hole 221a and the outer edge of the connection via hole 221a (221b shown in FIGS. 22a and 22b) are cleaned. remove.
  • step S222 may specifically include: putting the dielectric layer 221 into a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 221 in a solution containing hydrofluoric acid for chemical corrosion, glass, Si, Defects such as the microcrack area Q1 and the stress concentration area Q2 in the hole wall near the connection via hole 221a on the SOI dielectric layer 221 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the medium layer 221 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 221a after chemical etching has a smooth inner wall and surface, and does not contain defects such as the microcrack area Q1 and the stress concentration area Q2.
  • step S223 after step S222 is completed, squeeze the metal paste 2220 into the connection via hole 221a of the dielectric layer 221, and form the metal paste 2220 on the first surface and the second surface of the dielectric layer 221, and then make the first surface and the second surface respectively
  • the metal paste 2220 on the second surface is cured to form the connection electrode 22203 filled in the connection via hole 221a, the first lead-out electrode 22201 on the first surface, and the second lead-out electrode 22202 on the second surface.
  • the metal paste 2220 can be a conductive paste.
  • the material of the conductive paste includes but is not limited to a low-temperature curing polymer conductive paste.
  • the main components are conductive particles, resin, curing agent, dispersant, diluent, adhesion Strengthening agent and anti-settling agent.
  • the conductive particles can be selected from Cu, Ag, and Au, and the particle size ranges from about 1 nm to 100 um.
  • the resin can choose bisphenol epoxy resin, the curing agent can choose acid anhydride, the dispersant can choose methylimidazole, the diluent can choose butyl acetate, the adhesion enhancer can choose tetraethyl titanate, and the anti-sedimentation agent can choose Polyamides.
  • Step S223 may specifically include: first coating the conductive paste in the connection via hole 221a and around the edge of the hole on the second surface, and then performing solvent drying and thermal curing on the second surface side of the dielectric layer 221 to form a filling in the connection hole 221a.
  • the preferred coating methods of the conductive paste include but are not limited to screen printing, inkjet printing, slit coating, etc., and the use of vacuum adsorption machines during coating can improve the coating efficiency and improve the coating efficiency of the conductive paste on the hole wall. and the distribution profile at the edge of the hole.
  • Solvent drying can be carried out under normal air pressure, N2 normal pressure and vacuum, the temperature range is about 40°C-95°C, and the time is about 1 minute-30 minutes.
  • Thermal curing can be carried out in an oven, the atmosphere is N2, and the heating temperature is about 140 ° C ⁇ 200 ° C; or it can be cured by laser beam irradiation.
  • the laser wavelength range is about 500nm ⁇ 1510nm
  • the laser beam power range is about 50mW ⁇ 50W.
  • the beam diameter ranges from 10um to 2000um, and the laser beam can be a single beam or multiple beams.
  • Figure 23a is a flowchart of Example 23 of the method for preparing a conductive via according to an embodiment of the present disclosure
  • Figure 23b is another flowchart of Example 23 of a method for preparing a conductive via according to an embodiment of the present disclosure; as shown in Figure 23a
  • the preparation method specifically includes the following steps:
  • step S231 may specifically include: using an etching method to prepare the connection via hole 231a on the dielectric layer 231.
  • etching method There are two types of etching: wet etching and dry etching.
  • wet etching wet etching
  • dry etching By reasonably selecting the etching type, The etching solution formula or etching gas ratio, etching time length, temperature, etc., can realize the preparation of the connection via hole 231 a on the dielectric layer 231 .
  • the formation of the connection via hole 231a penetrating through the dielectric layer 231 by wet or dry etching will be described below.
  • the mask layer 100 formed on the first surface of the dielectric layer 231 is prepared by a photolithography process (for example: photoresist or two The mask layer 100 formed by a silicon oxide film), the dielectric layer 231 is etched in a 90° C. tetramethylammonium hydroxide aqueous solution by wet etching, and the depth of the hole increases with time until the dielectric layer 231 is completely covered.
  • the inclination angle of the connection via hole 231 a ranges from about 0° to 45°, for example, the inclination angle of the connection via hole 231 a is 15°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • the mask layer 100 for a silicon substrate with crystal orientation (100) orientation as the dielectric layer 231, the mask layer 100 (for example: photoresist or The mask layer 100) formed by silicon dioxide film, adopts dry etching to place the dielectric layer 231 in the vacuum chamber of a reactive ion etching machine or an inductively coupled plasma etching machine, with an air pressure of 40-60Pa, Cl2 gas and He
  • the gas ratio is 3-6:10
  • the dielectric layer 231 is heated to 40°C, and the depth of the hole increases with time until it is carved through, and the mask layer 100 is removed, that is, the connection via hole 231a is formed, and the connection via hole 231a
  • the inclination angle ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 231a is 5°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • step S232 after step S231 is completed, clean the dielectric layer 231, and clean the inner wall of the connection via hole 231a and the residues and debris near the outer edge of the connection via hole 231a (231b shown in Figure 23a and Figure 23b) remove.
  • step S232 may specifically include: putting the medium layer 231 into a water tank, containing pure deionized water or deionized water with an appropriate amount of cleaning agent (such as oil-based cleaning agent or water-based cleaning agent), and the water temperature is at At about 35°C to 70°C, use ultrasonic waves (frequency range of about 10kHz to 10MHz) to cause cavitation, acceleration, and straight-flow effects in the water to disperse, emulsify, and peel off the pollutant layer to achieve the purpose of cleaning.
  • the cleaning time is within After about 2 minutes to 20 minutes, after rinsing with pure deionized water, the medium layer 231 is taken out from the water tank, and dried with an air knife.
  • step S233 After step S232 is completed, an electroless plating medium 2320 is formed on the first surface and the second surface of the dielectric layer 231 on which the connection via hole 231a is formed.
  • step S233 may specifically include: using a spray method or directly putting the dielectric layer 231 into a water bath containing the electroless plating medium 2320 solution, so that a layer of Sn 2+ is adsorbed on the surface of the dielectric layer 231 .
  • the main components of the chemical plating medium 2320 solution are SnCl 2 10-30g/L, concentrated hydrochloric acid (38% concentration) 20-60ml/L, deionized water, and a small amount of Sn particles are added to prevent Sn 2+ from being oxidized.
  • the surface of the medium layer 231 reacts with the activation solution (activation solution main component SnCl 80 ⁇ 120g/L, concentrated hydrochloric acid 300 ⁇ 500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water), metal palladium particles are produced and closely adhered to the surface of the dielectric layer 231, that is, in the dielectric layer 231 where the connection via hole 231a is formed
  • An electroless plating medium 2320 is formed on the first surface and the second surface.
  • step S234 after step S233 is completed, perform electroless plating on the dielectric layer 231 formed with the electroless plating medium 2320, form the first surface, the second surface of the dielectric layer 231, and the metal film in the connection via hole 231a, and form The metal thin film on the first surface and the second surface of the dielectric layer 231 is patterned to form the first lead-out electrode 23201 and the second lead-out electrode 23202, as well as the connection electrode 23203 located in the connection via hole 231a.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • the electroless metallization film may be a single-layer metal film, or may be a stacked metal film.
  • only Cu metal thin film (thickness is about 1-100um) is plated alone.
  • only Cu is used as the material for plating a single layer of metal film
  • Ni/Cu is used for laminating the metal film as an example, but this does not constitute a limitation to the protection scope of the embodiment of the present disclosure.
  • the electroless Ni/Cu metal thin film is taken as an example for illustration.
  • step S234 may specifically include: putting the dielectric layer 231 into an electroless plating solution, and sequentially performing electroless plating of metals Ni and Cu. After that, the metal thin film formed on the first surface and the second surface of the dielectric layer 231 is patterned to form the first lead-out electrode 23201 and the second lead-out electrode 23202, as well as the connection electrode 23203 in the connection via hole 231a.
  • the general composition of electroless Ni plating solution is NiSO4 ⁇ 6H2O 10 ⁇ 30g/L, NaH2PO4 ⁇ 2H2O 20 ⁇ 40g/L, sodium citrate 5 ⁇ 15g/L, NH4Cl 20 ⁇ 40g/L, the solution is alkaline, pH The range is 8.0 ⁇ 10.0, and the temperature range is 75 ⁇ 90°C.
  • the general composition of electroless Cu plating solution is KNaC4H4O6 30 ⁇ 50g/L, NaOH8 ⁇ 10g/L, Na2CO3 38 ⁇ 40g/L, CuSO4 10 ⁇ 20g/L, NiCl2 2 ⁇ 6g/L, 40 ⁇ 60ml of formaldehyde with a concentration of 35%. /L, the solution is alkaline, the pH range is 11.0-14.0, and the temperature range is 55-65°C.
  • Fig. 24a is a flowchart of Example 24 of the method for preparing a conductive via according to an embodiment of the present disclosure
  • Fig. 24b is another flowchart of Example 24 of a method of preparing a conductive via according to an embodiment of the present disclosure; as shown in Fig. 24a
  • the preparation method specifically includes the following steps:
  • S241. Provide a dielectric layer 241, and form a connection via hole 241a penetrating through the dielectric layer 241 through a patterning process.
  • step S241 may specifically include: using an etching method to prepare the connection via hole 241a on the dielectric layer 241.
  • etching method There are two types of etching: wet etching and dry etching.
  • wet etching wet etching
  • dry etching By reasonably selecting the etching type, The etching solution formula or etching gas ratio, etching time length, temperature, etc., can realize the preparation of the connection via hole 241 a on the dielectric layer 241 .
  • the formation of the connection via hole 241a penetrating through the dielectric layer 241 by wet or dry etching will be described below.
  • the mask layer 100 formed on the first surface of the dielectric layer 241 is prepared by a photolithography process (for example: photoresist or two The mask layer 100 formed by a silicon oxide film), the dielectric layer 241 is etched in a 90° C.
  • the inclination angle of the connection via hole 241 a ranges from about 0° to 45°, for example, the inclination angle of the connection via hole 241 a is 15°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • the mask layer 100 for a silicon substrate with crystal orientation (100) orientation as the dielectric layer 241, the mask layer 100 (for example: photoresist or The mask layer 100 formed by a silicon dioxide film, using dry etching to place the dielectric layer 241 in the vacuum chamber of a reactive ion etching machine or an inductively coupled plasma etching machine, with an air pressure of 40-60Pa, Cl2 gas and He
  • the gas ratio is 3-6:10
  • the dielectric layer 241 is heated to 40°C, and the depth of the hole increases with time until it is carved through, and the mask layer 100 is removed, that is, the connection via hole 241a is formed, and the connection via hole 241a
  • the inclination angle ranges from about 0° to 5°, for example, the inclination angle of the connection via hole 241a is 5°.
  • acetone is used for ultrasonic cleaning to remove the glue
  • silicon dioxide film is used as mask layer 100
  • dilute hydrofluoric acid is used to etch it away.
  • step S242 after step S241 is completed, clean the dielectric layer 241, and clean the inner wall of the connection via hole 241a and the residues and debris near the outer edge of the connection via hole 241a (241b shown in Figure 24a and Figure 24b) remove.
  • step S242 may specifically include: placing the dielectric layer 241 in a water tank, first performing ultrasonic cleaning to remove surface dust, and then immersing the dielectric layer 241 in a solution containing hydrofluoric acid for chemical corrosion, glass, Si, Defects such as the microcrack area Q1 and the stress concentration area Q2 in the hole wall near the connection via hole 241a on the SOI dielectric layer 241 are completely removed by chemical etching.
  • the content of HF in the solution ranges from about 1% to 20%, and the solution may or may not contain NH 4 F.
  • the content of NH 4 F ranges from about 10% to 40%
  • the temperature range of the solution is about 35°C to 60°C
  • the chemical corrosion time is about 30 seconds to 5 minutes
  • the solution is deionized with pure deionized water.
  • the dielectric layer 241 is thoroughly rinsed, and finally dried with an air knife.
  • the connection via hole 241a after chemical etching has a smooth inner wall and surface, and does not contain defects such as the microcrack area Q1 and the stress concentration area Q2.
  • step S243 After step S242 is completed, form an electroless plating medium 2420 on the first surface and the second surface of the dielectric layer 241 formed with the connection via hole 241a.
  • step S233 may specifically include: using a spray method or directly putting the dielectric layer 241 into a water tank containing the electroless plating medium 2420 solution, so that a layer of Sn 2+ is adsorbed on the surface of the dielectric layer 241 .
  • the main components of the chemical plating medium 2420 solution are SnCl 2 10-30g/L, concentrated hydrochloric acid (38% concentration) 20-60ml/L, deionized water, and a small amount of Sn particles are added to prevent Sn 2+ oxidation.
  • the surface of the medium layer 241 reacts with the activation solution (the main components of the activation solution are SnCl 2 80 ⁇ 120g/L, concentrated hydrochloric acid 300 ⁇ 500ml/L, Na 2 SnO 3 10-20g/L, PdCl 2 1-4g/L, deionized water), produce metal palladium particles and closely adhere to the surface of the dielectric layer 241, that is, in the dielectric layer 241 where the connection via hole 241a is formed
  • An electroless plating medium 2420 is formed on the first surface and the second surface.
  • step S244 after step S243 is completed, perform electroless plating on the dielectric layer 241 formed with the electroless plating medium 2420, form the first surface, the second surface of the dielectric layer 241, and the metal film in the connection via hole 241a, and form The metal thin film on the first surface and the second surface of the dielectric layer 241 is patterned to form the first lead-out electrode 24201 and the second lead-out electrode 24202, as well as the connection electrode 24203 located in the connection via hole 241a.
  • the electroless metallization film can be a single-layer metal film, or a metal film with stacked layers.
  • the electroless metallization film can be a single-layer metal film, or a metal film with stacked layers.
  • only Cu metal thin film (thickness is about 1-100um) is plated alone.
  • only Cu is used as the material for plating a single layer of metal film
  • Ni/Cu is used for laminating the metal film as an example, but this does not constitute a limitation to the protection scope of the embodiment of the present disclosure.
  • the electroless Ni/Cu metal thin film is taken as an example for illustration.
  • step S244 may specifically include: putting the dielectric layer 241 into an electroless plating solution, and sequentially performing electroless plating of metals Ni and Cu. Afterwards, the metal thin film formed on the first surface and the second surface of the dielectric layer 241 is patterned to form the first lead-out electrode 24201 and the second lead-out electrode 24202, as well as the connection electrode 24203 located in the connection via hole 241a.
  • the general composition of electroless Ni plating solution is NiSO4 ⁇ 6H2O 10 ⁇ 30g/L, NaH2PO4 ⁇ 2H2O 20 ⁇ 40g/L, sodium citrate 5 ⁇ 15g/L, NH4Cl 20 ⁇ 40g/L, the solution is alkaline, pH The range is 8.0 ⁇ 10.0, and the temperature range is 75 ⁇ 90°C.
  • the general composition of electroless Cu plating solution is KNaC4H4O6 30 ⁇ 50g/L, NaOH8 ⁇ 10g/L, Na2CO3 38 ⁇ 40g/L, CuSO4 10 ⁇ 20g/L, NiCl2 2 ⁇ 6g/L, 40 ⁇ 60ml of formaldehyde with a concentration of 35%. /L, the solution is alkaline, the pH range is 11.0-14.0, and the temperature range is 55-65°C.
  • the preparation method for forming conductive vias in the dielectric layer is provided above, and correspondingly, as shown in FIG. 25 , a similar method may be used to form blind holes 251 a in the dielectric layer.
  • the difference between the blind hole 251a and the above-mentioned via hole is that it does not penetrate the dielectric layer 251, so it is only necessary to form the first lead-out electrode 25201 on the first surface of the dielectric layer 251, and form the connecting electrode 25202 in the blind hole of the dielectric layer.
  • connection electrode 25202 and the first lead-out electrode 25201 can be formed in the same way as above, for example, the connection electrode 25202 and the first lead-out electrode 25201 are formed by forming the metal film 2520 through an electroplating process Etc., will not repeat them here.
  • FIG. 26 is a schematic diagram of a conductive via according to an embodiment of the present disclosure; as shown in FIG. 26 , an embodiment of the present disclosure provides a conductive via, which can be prepared by any of the methods described above.
  • the conductive via formed in Example 1 is taken as an example for illustration.
  • the conductive via hole includes a dielectric layer 11 , a connection electrode 2203 , a first extraction electrode 2201 and a second extraction electrode 2201 .
  • the dielectric layer 11 has a connection via hole penetrating through its thickness direction, and the dielectric layer includes a first surface and a second surface, the first extraction electrode 2201 is located on the first surface, the second extraction electrode 2202 is located on the second surface, and the connection The electrode 2203 is located in the connection via hole, covers at least the inner wall of the connection via hole, and is electrically connected to the first lead-out electrode 2201 and the second lead-out electrode 2202 .
  • the materials of the dielectric layer 11 , the connection electrode 2203 , the first lead-out electrode 2201 and the second lead-out electrode 2202 may be the same as those in the above-mentioned embodiments, so details are not repeated here.
  • the conductive via structure can be applied to storage chips, high-brightness LEDs, inductive devices with high quality factor (Q value) in radio frequency circuits and integrated passive devices, etc., which improves integration and reduces resistance.
  • the conductive vias in the embodiments of the present disclosure can be prepared by any of the above methods, so the materials of the dielectric layer 11, the connecting electrodes 2203, the first lead-out electrodes 2201 and the second lead-out electrodes 2202 of the conductive vias
  • the same material as above can be used for both the size and size.
  • the shape and size of the connection via hole can also be the same as the above structure, so details will not be repeated here.
  • an embodiment of the present disclosure provides a passive device, which includes the above-mentioned conductive via.
  • the passive device includes at least an inductor, and may also include capacitors and resistors.
  • passive components including inductors, capacitors and resistors are used as examples for description.
  • FIG. 27 is a cross-sectional view of a passive device according to an embodiment of the present disclosure
  • FIG. 28 is a top view of the inductor in FIG. 27; as shown in FIGS.
  • the second substructure 2202b located on the second surface, and the conductive via hole 110 connecting the first substructure 2201a and the second substructure 2202a in series.
  • each first substructure 2201a of the inductor extends along the first direction and is arranged side by side along the second direction; each second substructure 2202a of the inductor extends along the third direction and is arranged side by side along the second direction.
  • the first direction, the second direction, and the third direction are all different directions.
  • the first direction and the second direction are perpendicular to each other, and the first direction and the third direction intersect and are non-perpendicularly set as example.
  • the extension directions of the first substructure 2201a and the second substructure 2202a can also be interchanged, all within the protection scope of the embodiments of the present disclosure.
  • the inductor includes N first substructures 2201a and N ⁇ 1 second substructures 2202a as an example for illustration, where N ⁇ 2, and N is an integer.
  • the first end and the second end of the first substructure 2201a are electrically connected to one conductive via 110 respectively, and the first end and the second end of one first substructure 2201a are electrically connected to different conductive vias 110 . That is, one first substructure 2201 a is connected to the first lead-out electrodes of the two conductive vias 110 .
  • the first end and the second end of the second substructure 2202a are respectively electrically connected to one conductive via 110 , and the first end and the second end of one second substructure 2202a are electrically connected to different conductive vias 110 . That is, one second substructure 2202 a is connected to the second lead-out electrodes of the two conductive vias 110 .
  • the first end of the i-th second sub-structure 212 of the inductor is connected to the first end of the i-th first sub-structure 2201a and the second end of the i+1-th first sub-structure 2201a to form an inductance coil 201, Wherein, 1 ⁇ i ⁇ N-1, and i is an integer.
  • the first interlayer dielectric layer 30 is provided on the side of the second substructure 2202a of the inductor 200 away from the dielectric layer 11, and the first pad 501 and the second interlayer dielectric layer 30 are provided on the side of the first interlayer dielectric layer 30 away from the dielectric layer 11. pad.
  • a second connection via hole and a third connection via hole are provided in the first interlayer dielectric layer 30, the first pad 501 is electrically connected to the first signal terminal of the inductor coil 201 through the second connection via hole, and the second The welding pad is electrically connected to the second signal end 202 of the inductance coil 201 through the third connection via hole.
  • the first pad 501 and the second pad are configured such that the inductor 200 is electrically connected to the radio frequency circuit.
  • the inductor 200 is bonded to a PCB (printed circuit board) through the first pad 501 and the second pad, or electrically connected to the PCB by soldering.
  • the resistor 60 can be disposed on the second surface of the dielectric layer 11, and the resistor 60 can be made of a high-resistance material, such as tin oxide (ITO) or nickel-chromium (NiCr) alloy.
  • ITO tin oxide
  • NiCr nickel-chromium
  • the first plate 701 of the capacitor 700 can be set on the same layer as the second substructure 2202a of the inductor 20, and the second plate 702 can be set on the same layer as the first pad 501 and the third pad 503, so that Firstly, it is convenient for preparation without adding process steps.
  • a third pad 503, a fourth pad 504, a fifth pad 505, and a sixth pad 506 may also be provided on the same layer as the first pad 501 and the second pad.
  • the third pad is connected to the first end of the resistor 60 through the fourth connection via hole penetrating the first interlayer dielectric layer 30, and the fourth pad 54 is connected through the fifth connection via hole penetrating the first interlayer dielectric layer 30
  • the hole is connected to the second end of the resistor 60
  • the fifth pad 505 is connected to the first plate 71 of the capacitor 700 through the sixth connection via hole penetrating the first interlayer dielectric layer 30, and the sixth pad 506 can be connected to the capacitor
  • the second pole plate 702 of 70 is an integral structure.
  • the third pad and the fourth pad 504 are configured to connect the resistor 60 to the radio frequency circuit, and the fifth pad 505 and the sixth pad 506 are configured to connect the capacitor 700 to the radio frequency circuit. It should be understood that if the capacitor 700 and the resistor 60 are electrically connected to the devices on the substrate, they may not be connected through pads at this time.
  • the dielectric layer includes, but is not limited to, at least one of glass, polyimide, polyethylene terephthalate, and cycloolefin polymer.
  • a first protection layer 40 is disposed on the side of the first substructure 2201a of the inductor 200 facing away from the dielectric layer 11 to prevent the first substructure 2201a from being oxidized due to exposure.
  • the material of the first protective layer 40 is an inorganic insulating material.
  • the first protective layer 40 is an inorganic insulating layer formed of silicon nitride (SiNx), or an inorganic insulating layer formed of silicon oxide (SiO 2 ), or a combination of SiNx inorganic insulating layer and SiO 2 inorganic insulating layer.
  • SiNx silicon nitride
  • SiO 2 silicon oxide
  • a laminated composite film layer A laminated composite film layer.
  • the passive device in the embodiment of the present disclosure includes the above-mentioned conductive via structure, which can be applied to high quality factor (Q value) inductors in memory chips, high-brightness LEDs, and radio frequency circuits.
  • Q value quality factor
  • the integration level has been improved and the resistance has been reduced.

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Abstract

本公开提供一种导电过孔的制备方法，属于电子元件技术领域。本公开的导电过孔的制备方法，其包括：提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔；所述介质层包括在其厚度方向上相对设置的第一表面和第二表面；在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极；其中，所述连接电极至少覆盖所述连接过孔的内壁，且所述第一引出电极和所述第二引出电极均与所述连接电极电连接。

Description

导电过孔的制备方法、导电过孔及无源器件 技术领域
本公开属于电子元件技术领域，具体涉及一种导电过孔的制备方法、导电过孔及无源器件。
背景技术
随着电子信息行业的发展，各种电子元器件向小型化、低功耗方向发展，集成度越来越高。对于存储芯片、高亮度LED、射频电路中的高品质因数(Q值)电感器件及集成无源器件等而言，单面的集成密度已经很高，面积已经用完，要想进一步提高集成度，需要向三维发展制造各层之间相互电连通的多层堆叠结构。其中起到电连通作用的通孔和盲孔必不可少。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一，提供一种导电过孔的制备方法、导电过孔及无源器件。
第一方面，本公开实施例提供一种导电过孔的制备方法，其包括：
提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔；所述介质层包括在其厚度方向上相对设置的第一表面和第二表面；
在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极；其中，
所述连接电极至少覆盖所述连接过孔的内壁，且所述第一引出电极和所述第二引出电极均与所述连接电极电连接。
其中，所述提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔的步骤包括：
提供一介质层，并在所述介质层上进行机械钻孔，形成在所述介质层厚度方向上贯穿的所述连接过孔。
其中，所述机械钻孔所采用的钻头的材质包括：碳化钨、钨钴合金、钨 钛钴合金、天然金刚石、人造金刚石中的任意一种。
其中，所述提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔的步骤包括：
提供一介质层，并在所述介质层上进行喷砂钻孔，形成在所述介质层的厚度方向上贯穿的所述连接过孔。
其中，所述在所述介质层上进行喷砂钻孔，形成在所述介质层的厚度方向上贯穿的所述连接过孔的步骤包括：
采用喷砂工艺，利用压缩空气为动力搭配固体磨料颗粒或者混合固体磨料颗粒的液体形成高速喷射束流，高速喷射到所述介质层的第一表面或者第二表面，形成在所述介质层厚度方向上贯穿的所述连接过孔。
其中，所述固体磨料颗粒包括金刚砂、刚玉、碳酸钙、石英砂中的至少一种。
其中，所述提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔的步骤包括：
提供一介质层，并在所述介质层上进行激光打孔，形成在所述介质层厚度方向上贯穿的所述连接过孔。
其中，所述在所述介质层上进行激光打孔，形成在所述介质层厚度方向上贯穿的所述连接过孔的步骤包括：
采用激光器以激光束垂直入射的方式打到介质层的第一表面或者第二表面，形成在所述介质层厚度方向上贯穿的所述连接过孔。
其中，所述激光器为连续激光器或者脉冲激光器。
其中，所述提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔的步骤包括：
提供一介质层，并通过构图工艺形成在所述介质层厚度方向上贯穿的所述连接过孔。
其中，所述通过构图工艺形成在所述介质层厚度方向上贯穿的所述连接 过孔的步骤包括：
在所述介质层上形成掩膜图案，采用干法或者湿法刻蚀形成在所述介质层厚度方向上贯穿的所述连接过孔。
其中，所述在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极的步骤包括：
在所述介质层的第一表面和第二表面形成金属薄膜，作为种子层；
对所述种子层进行电镀，形成位于所述第一连接过孔内的连接电极；
通过构图工艺形成位于所述第一表面上的第一引出电极和位于所述第二表面上的第二引出电极。
其中，所述在所述介质层的第一表面和第二表面形成金属薄膜的步骤包括：
采用磁控溅射工艺在所述介质层的第一表面和第二表面形成金属薄膜。
其中，所述在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极的步骤包括：
在所述介质层的第一表面、第二表面和所述连接过孔内形成化学镀媒质；对形成所述化学镀媒质的介质层进行化学镀，形成位于所述连接过孔内的连接电极，以及位于所述第一表面上的第一引出电极和位于所述第二表面上的第二引出电极。
其中，所述在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极的步骤包括：
将导电浆料涂布在所述连接过孔、所述介质层的第一表面和第二表面，并进行溶剂烘干和热固化，形成位于所述连接过孔内的连接电极，以及位于所述第一表面上的第一引出电极和位于所述第二表面上的第二引出电极。
其中，所述导电银浆包括低温固化型的聚合物导电银浆。
其中，所述涂布的方式包括丝网印刷、喷墨打印、slit涂布中的任意一种。
其中，所述在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极的步骤之前，还包括：
对形成所述连接过孔的介质层进行清洗。
其中，所述对形成所述连接过孔的介质层进行清洗的步骤包括：
将形成有连接过孔的介质层放入水槽内，进行超声清洗。
其中，所述对形成所述连接过孔的介质层进行清洗的步骤包括：
将形成有连接过孔的介质层放入水槽内，进行超声清洗，之后将所述介质层放入含有氢氟酸的溶液中进行化学腐蚀。
其中，所述连接过孔的形状包括圆柱形或者倒圆台形。
第二方面，本公开实施例提供一种导电过孔，其包括：
介质层，其具有在其厚度方向上贯穿的连接过孔；所述介质层包括在其厚度方向上相对设置的第一表面和第二表面；
连接电极、第一引出电极和第二引出电极，所述连接电极设置在所述连接过孔内，所述第一引出电极位于所述第一表面，所述第二引出电极位于所述第二表面；其中，
所述连接电极至少覆盖所述连接过孔的内壁，且所述第一引出电极和所述第二引出电极均与所述连接电极电连接。
其中，所述连接过孔的形状包括圆柱形或者倒圆台形。
第三方面，本公开实施例提供一种无源器件，其包括上述的导电过孔。
其中，所述无源器件至少包括电感；所述电感位于所述第一表面的第一子结构和位于所述第二表面的第二子结构，以及将所述第一子结构和所述第二子结构依次串接的所述导电过孔。
其中，所述无源器件还包括电容和电阻；所述电容和所述电阻均设置在所述第二表面上。
其中，所述介质层包括玻璃、聚酰亚胺、聚对苯二甲酸乙二醇酯、环烯烃聚合物中的至少之一。
附图说明
图1为本公开实施例的导电过孔的制备方法的示例1的流程图。
图2为本公开实施例的导电过孔的制备方法的示例2的流程图。
图3为本公开实施例的导电过孔的制备方法的示例3的流程图。
图4为本公开实施例的导电过孔的制备方法的示例4的流程图
图5为本公开实施例的导电过孔的制备方法的示例5的流程图。
图6为本公开实施例的导电过孔的制备方法的示例6的流程图。
图7为本公开实施例的导电过孔的制备方法的示例7的流程图。
图8为本公开实施例的导电过孔的制备方法的示例8的流程图。
图9为本公开实施例的导电过孔的制备方法的示例9的流程图。
图10为本公开实施例的导电过孔的制备方法的示例10的流程图。
图11为本公开实施例的导电过孔的制备方法的示例11的流程图。
图12为本公开实施例的导电过孔的制备方法的示例12的流程图。
图13为本公开实施例的导电过孔的制备方法的示例13的流程图。
图14为本公开实施例的导电过孔的制备方法的示例14的流程图。
图15为本公开实施例的导电过孔的制备方法的示例15的流程图。
图16为本公开实施例的导电过孔的制备方法的示例16的流程图。
图17为本公开实施例的导电过孔的制备方法的示例17的流程图。
图18为本公开实施例的导电过孔的制备方法的示例18的流程图。
图19a为本公开实施例的导电过孔的制备方法的示例19的一种流程图。
图19b为本公开实施例的导电过孔的制备方法的示例19的另一种流程图。
图20a为本公开实施例的导电过孔的制备方法的示例20的一种流程图。
图20b为本公开实施例的导电过孔的制备方法的示例20的另一种流程图。
图21a为本公开实施例的导电过孔的制备方法的示例21的一种流程图。
图21b为本公开实施例的导电过孔的制备方法的示例21的另一种流程图。
图22a为本公开实施例的导电过孔的制备方法的示例22的一种流程图。
图22b为本公开实施例的导电过孔的制备方法的示例22的另一种流程图。
图23a为本公开实施例的导电过孔的制备方法的示例23的一种流程图。
图23b为本公开实施例的导电过孔的制备方法的示例23的另一种流程图。
图24a为本公开实施例的导电过孔的制备方法的示例24的一种流程图。
图24b为本公开实施例的导电过孔的制备方法的示例24的另一种流程图。
图25为本公开实施例的导电盲孔的制备方法的流程图。
图26为本公开实施例的导电过孔的示意图。
图27为本公开实施例的无源器件的截面图。
图28为图27中电感的俯视图。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”、“一”或者“该”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词 前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
第一方面，本公开实施例提供一种导电过孔的制备方法，该方法中所选用的介质层包括但不限于玻璃基衬底、硅(Si)基衬底、SOI、砷化镓(GaAs)衬底、SiC，InP、PCB和Al 2O 3等。该方法可以包括如下步骤：
S01、提供一介质层，并形成在该介质层的厚度方向上贯穿的连接过孔。该介质层包括在其厚度方向上相对设置的第一表面和第二表面。
在一些示例中，根据介质层所选材质不同，在介质层上形成连接过孔的方式也不同。例如：采用机械钻孔、喷砂钻孔、激光打孔、构图工艺等任意一种方式形成贯穿介质层的连接过孔。
在一些示例中，在完成步骤S01之后还包括对介质层进行清洗的步骤，以使形成的连接过孔的内壁的表面平整光滑。
例如：将介质层放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，通过超声波使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，最后纯去离子水冲洗后将介质层从水槽中取出，使用空气风刀吹干。
或者，将介质层放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层浸入含有氢氟酸的溶液中进行化学腐蚀，可将介质层上连接过孔附近包含孔壁内的微裂纹、应力集中区域等缺陷用化学腐蚀彻底去除。最后纯去离子水冲洗后将介质层从水槽中取出，使用空气风刀吹干。
S02、在连接过孔内形成连接电极，以及分别在介质层的第一表面和第二表面形成第一引出电极和第二引出电极；其中，连接电极至少覆盖连接过孔的内壁，第一引出电极和第二引出电极均与连接电极电连接。
在一些示例中，形成介质层上连接电极、第一引出电极和第二引出电极 的方式可以包括：在形成有连接过孔的介质层的第一表面和第二表面上沉积金属薄膜，作为种子层，之后采用电镀工艺，以使金属薄膜长厚，此时金属薄膜覆盖连接过孔的内壁，甚至将连接过孔填满，并对形成在介质层的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极和第二引出电极。
在一些示例中，形成介质层上连接电极、第一引出电极和第二引出电极的方式还可以包括：在形成有连接过孔的介质层的第一表面和第二表面上形成化学镀媒质，并进行化学镀形成金属薄膜，此时金属薄膜覆盖连接过孔的内壁，并对形成在介质层的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极和第二引出电极。
在一些示例中，形成介质层上连接电极、第一引出电极和第二引出电极的方式还可以包括：将金属膏挤入介质层的连接过孔内，并在介质层的第一表面和第二表面上形成金属膏，之后对分别第一表面和第二表面的金属膏进行固化，形成填充在连接过孔内的连接电极，以及位于第一表面的第一引出电极和位于第二表面的第二引出电极。
以下，为了清楚本公开实施例导电过孔的制备方法，根据介质层的材质，对该制备方法进行具体的说明。但以下示例并不构成对本公开实施例保护范围的限制。
示例1：图1为本公开实施例的导电过孔的制备方法的示例1的流程图；如图1所示，该制备方法具体包括如下步骤：
S11、提供一介质层11，该介质层11的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层11进行机械钻孔，形成具有连接过孔11a的介质层11。
在一些示例中，机械钻孔时所采用的钻头材质为高硬度材料如碳化钨、钨钴合金、钨钛钴合金等高硬度合金(HRC值大于90度)，或天然金刚石、人造金刚石等。介质层11厚度0.1mm～2mm，连接过孔11a的直径范围0.5mm～1.5mm。按照不同钻头的形状和钻孔条件(转速、钻入速度等)，连 接过孔11a的内壁可以是上下平直的，也可以是上宽下窄的，连接过孔11a的倾角范围0°～15°左右，例如：连接过孔11a的倾角为15°。
需要说明的是，本公开实施例中连接过孔11a的内壁的上、下为相对概念，图1中以相对靠近第二表面的一侧为上，相对靠近第一表面的一侧为下。当然，在本公开实施例中，均以相对靠近第二表面的一侧为上，相对靠近第一表面的一侧为下为例进行说明；本公开实施例的连接过孔11a的倾角是指连接过孔11a内壁的延伸方向与第一表面的所在平面的夹角。
S12、在完成步骤S11之后，对介质层11进行清洗，将连接过孔11a的内壁以及连接过孔11a外边缘附近的残渣、碎屑(图1中所示的11b)等洗净去除。
在一些示例中，步骤S12具体可以包括：将介质层11放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层11从水槽中取出，使用空气风刀吹干。
S13、在完成步骤S12之后，在介质层11的连接过孔11a内，以及第一表面和第二表面上形成金属薄膜120，作为种子层。
在一些示例中，步骤S13具体可以包括：采用包括但不限于磁控溅射的方式在介质层11的第一表面和第二表面，整面淀积导电良好的金属薄膜120，作为种子层。形成金属薄膜120的方式除了磁控溅射外，还可以采用电子束蒸发、热蒸发、脉冲激光溅射等方式。
在一些示例中，为增加金属薄膜与介质层11的粘附力一般采用叠层金属。也即，金属薄膜包括沿背离介质层11方向依次设置的第一子金属膜层和第二子金属膜层。其中，第一子金属膜层的材料包括但不限于钛(Ti)、钼(Mo)、镍(Ni)中的任意一种，第二子金属膜层的材料包括但不限于铜(Cu)、银(Ag)或者金(Au)中的任意一种。例如：金属薄膜包括：Ti/Cu、 Mo/Cu、Ni/Cu、Ti/Ag、Mo/Ag、Ni/Ag中的任意一种。在本公开实施例中第一子金属膜层的厚度范围在1nm～100nm左右；第二子金属膜层的厚度范围在50nm～1000nm左右。另外，连接过孔11a内壁的金属薄膜的厚度为在1nm～200nm左右。
S14、在完成步骤S13之后，通过电镀工艺，对连接过孔11a进行填孔，以及将形成在第一表面和第二表面上的金属薄膜120增厚，以形成分别位于第一表面和第二表面的第一引出电极1201和第二引出电极1202，以及形成位于连接过孔11a内的连接电极1203。
在一些示例中，步骤S14具体可以包括：通过合理搭配不同类型的电镀液(如金属薄膜填连接过孔11a的配方和整面加厚的配方)，在电镀槽中先进行填孔电镀，使连接过孔11a的内壁上淀积金属薄膜120(例如：金属薄膜120中的第一子金属膜层)，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，金属材料可将孔填满(膜厚等于0.5倍孔径)或者不填满仅孔内壁金属化(膜厚500nm～10um)，也即形成连接电极1203。再将介质层11移动至整面加厚配方电镀液的电镀槽内，分别进行第一表面和第二表面的金属薄膜120加厚电镀，电镀金属为Cu、Ag或Au，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，增厚的金属薄膜120a的厚度在500nm～500um左右。电镀完成后，一般会造成介质层11表面的起伏不平，影响之后的工艺流程，因此最后进行化学机械抛光工艺，使介质层11表面变平坦和光滑，形成第一引出电极1201和第二引出电极1202。
当然，在电镀完成之后，也可以对第一表面和第二表面上的增厚的金属薄膜120a进行图案化，形成第一引出电极1201和第二引出电极1202。
示例2：
图2为本公开实施例的导电过孔的制备方法的示例2的流程图；如图2所示，该制备方法具体包括如下步骤：S21、提供一介质层21，该介质层21的材质包括但不限于glass，Si，SOI中任意一种，对介质层21进行机械钻 孔，形成具有连接过孔21a的介质层21。
在一些示例中，机械钻孔时所采用的钻头材质为高硬度材料如碳化钨、钨钴合金、钨钛钴合金等高硬度合金(HRC值大于90度)，或天然金刚石、人造金刚石等。介质层21厚度0.1mm～2mm，连接过孔21a的直径范围0.5mm～1.5mm。按照不同钻头的形状和钻孔条件(转速、钻入速度等)，连接过孔21a的内壁可以是上下平直的，也可以是上宽下窄的，连接过孔的倾角范围0°～15°左右，例如：连接过孔11a的倾角为15°。
S22、在完成步骤S21之后，对介质层21进行清洗，将连接过孔21a的内壁以及连接过孔外边缘附近的残渣、碎屑(图2中所示的21b)等洗净去除。
在一些示例中，步骤S22具体可以包括：将介质层21放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层21浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层21上连接过孔附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层21彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔21a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷，利于高质量种子层生长和金属填孔及金属加厚。
S23、在完成步骤S22之后，在介质层21的连接过孔21a内，以及第一表面和第二表面上形成金属薄膜220，作为种子层。
在一些示例中，步骤S23具体可以包括：采用包括但不限于磁控溅射的方式在介质层21的第一表面和第二表面，整面淀积导电良好的金属薄膜220，作为种子层。形成金属薄膜220的方式除了磁控溅射外，还可以采用电子束蒸发、热蒸发、脉冲激光溅射等方式。
在一些示例中，为增加金属薄膜220与介质层21的粘附力一般采用叠 层金属。也即，金属薄膜220包括沿背离介质层方向依次设置的第一子金属膜层和第二子金属膜层。其中，第一子金属膜层的材料包括但不限于钛(Ti)、钼(Mo)、镍(Ni)中的任意一种，第二子金属膜层的材料包括但不限于铜(Cu)、银(Ag)或者金(Au)中的任意一种。例如：金属薄膜220包括：Ti/Cu、Mo/Cu、Ni/Cu、Ti/Ag、Mo/Ag、Ni/Ag中的任意一种。在本公开实施例中第一子金属膜层的厚度范围在1nm～100nm左右；第二子金属膜层的厚度范围在50nm～1000nm左右。另外，连接过孔21a内壁的金属薄膜的厚度为在1nm～200nm左右。
S24、在完成步骤S23之后，通过电镀工艺，对连接过孔21a进行填孔，以及将形成在第一表面和第二表面上的金属薄膜220增厚，以形成分别位于第一表面和第二表面的第一引出电极2201和第二引出电极2202，以及形成位于连接过孔21a内的连接电极2203。
在一些示例中，步骤S24具体可以包括：通过合理搭配不同类型的电镀液(如金属薄膜220填连接过孔21a的配方和整面加厚的配方)，在电镀槽中先进行填孔电镀，使连接过孔21a的内壁上淀积金属薄膜(例如：金属薄膜中的第一子金属膜层)，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，金属材料可将孔填满(膜厚等于0.5倍孔径)或者不填满仅孔内壁金属化(膜厚500nm～10um)。再将介质层21移动至整面加厚配方电镀液的电镀槽内，进行第一表面和第二表面的金属薄膜220加厚电镀，电镀金属为Cu、Ag或Au，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，增厚的金属薄膜220a的厚度在500nm～500um左右。电镀完成后，一般会造成介质层21表面的起伏不平，影响之后的工艺流程，因此最后进行化学机械抛光工艺，使介质层21表面变平坦和光滑。
当然，在电镀完成之后，还可以对第一表面和第二表面上的增厚的金属薄膜220a进行图案化，形成第一引出电极2201和第二引出电极2202。
示例3：
图3为本公开实施例的导电过孔的制备方法的示例3的流程图；如图3所示，该制备方法具体包括如下步骤：
S31、提供一介质层31，该介质层31的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层31进行机械钻孔，形成具有连接过孔31a的介质层31。
在一些示例中，机械钻孔时所采用的钻头材质为高硬度材料如碳化钨、钨钴合金、钨钛钴合金等高硬度合金(HRC值大于90度)，或天然金刚石、人造金刚石等。介质层31厚度0.1mm～2mm，连接过孔31a的直径范围0.5mm～1.5mm。按照不同钻头的形状和钻孔条件(转速、钻入速度等)，连接过孔31a的内壁可以是上下平直的，也可以是上宽下窄的，连接过孔31a的倾角范围0°～15°左右，例如：连接过孔31a的倾角为15°。
S32、在完成步骤S31之后，对介质层31进行清洗，将连接过孔31a的内壁以及连接过孔31a外边缘附近的残渣、碎屑(图3中所示的31b)等洗净去除。
在一些示例中，步骤S32具体可以包括：将介质层31放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层31从水槽中取出，使用空气风刀吹干。
S33、在完成步骤S32之后，将金属膏挤入介质层31的连接过孔31a内，并在介质层31的第一表面和第二表面上形成金属膏320，之后对分别第一表面和第二表面的金属膏320进行固化，形成填充在连接过孔31a内的连接电极3203，以及位于第一表面的第一引出电极3201和位于第二表面的第二引出电极3202。
在一些示例中，金属膏320可以为导电浆，导电浆的材料包括但不限于低温固化型的聚合物导电浆料，主要成分为导电颗粒、树脂、固化剂、分散 剂、稀释剂、附着力增强剂和防沉降剂。其中，导电颗粒可选Cu、Ag、Au，粒径范围在1nm～100um左右。树脂可选双酚环氧树脂，固化剂可选酸酐类物质，分散剂可选甲基咪唑，稀释剂可选乙酸丁酯，附着力增强剂可选钛酸四乙脂，防沉降剂可选聚酰胺类物质。
步骤S33具体可以包括：首先将导电浆料涂布在连接过孔31a内和第二表面的孔边缘周围，然后对介质层31的第二表面侧进行溶剂烘干和热固化，形成填充在连接过孔31a内的连接电极3203，以及位于第二表面上的第二引出电极3202；之后在介质层31的第一表面的孔边缘周围涂布导电浆料，然后对介质层31的第一表面侧进行溶剂烘干和热固化，形成位于第一表面上的第一引出电极3202。其中，导电浆料优选涂布方式包括但不限于丝网印刷、喷墨打印、slit涂布等方式，在涂布时配合使用真空吸附机台可提高涂布效率，改善导电浆料在孔壁和孔边缘的分布剖面。溶剂烘干可在空气常压、N2常压、真空下进行，温度范围在40℃～95℃左右，时间在1分钟～30分钟左右。热固化可在烘箱中进行，气氛为N2，加热温度在140℃～200℃左右；或者也可使用激光束照射固化，激光波长范围在500nm～1510nm左右，激光束功率范围在50mW～50W左右，光束直径范围在10um～2000um左右，激光束可以是单光束也可以是多光束。
示例4：
图4为本公开实施例的导电过孔的制备方法的示例4的流程图；如图4所示，该制备方法具体包括如下步骤：
S41、提供一介质层41，该介质层41的材质包括但不限于glass，Si，SOI中任意一种，对介质层41进行机械钻孔，形成具有连接过孔41a的介质层41。
在一些示例中，机械钻孔时所采用的钻头材质为高硬度材料如碳化钨、钨钴合金、钨钛钴合金等高硬度合金(HRC值大于90度)，或天然金刚石、人造金刚石等。介质层41厚度0.1mm～2mm，连接过孔41a的直径范围 0.5mm～1.5mm。按照不同钻头的形状和钻孔条件(转速、钻入速度等)，连接过孔41a的内壁可以是上下平直的，也可以是上宽下窄的，连接过孔41a的倾角范围0°～15°左右，例如：连接过孔41a的倾角为15°。
S42、在完成步骤S41之后，对介质层41进行清洗，将连接过孔41a的内壁以及连接过孔41a外边缘附近的残渣、碎屑(图4中所示的41b)等洗净去除。
在一些示例中，步骤S42具体可以包括：将介质层41放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层41浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层41上连接过孔41a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层41彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔41a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷。
S43、在完成步骤S42之后，将金属膏420挤入介质层41的连接过孔41a内，并在介质层41的第一表面和第二表面上形成金属膏420，之后对分别第一表面和第二表面的金属膏420进行固化，形成填充在连接过孔41a内的连接电极4203，以及位于第一表面的第一引出电极4201和位于第二表面的第二引出电极4202。
在一些示例中，金属膏420可以为导电浆，导电浆的材料包括但不限于低温固化型的聚合物导电浆料，主要成分为导电颗粒、树脂、固化剂、分散剂、稀释剂、附着力增强剂和防沉降剂。其中，导电颗粒可选Cu、Ag、Au，粒径范围在1nm～100um左右。树脂可选双酚环氧树脂，固化剂可选酸酐类物质，分散剂可选甲基咪唑，稀释剂可选乙酸丁酯，附着力增强剂可选钛酸四乙脂，防沉降剂可选聚酰胺类物质。
步骤S43具体可以包括：首先将导电浆料涂布在连接过孔41a内和第二 表面的孔边缘周围，然后对介质层41的第二表面侧进行溶剂烘干和热固化，形成填充在连接过孔41a内的连接电极4203，以及位于第二表面上的第二引出电极4202；之后在介质层41的第一表面的孔边缘周围涂布导电浆料，然后对介质层41的第一表面侧进行溶剂烘干和热固化，形成位于第一表面上的第一引出电极4201。其中，导电浆料优选涂布方式包括但不限于丝网印刷、喷墨打印、slit涂布等方式，在涂布时配合使用真空吸附机台可提高涂布效率，改善导电浆料在孔壁和孔边缘的分布剖面。溶剂烘干可在空气常压、N2常压、真空下进行，温度范围在40℃～95℃左右，时间在1分钟～30分钟左右。热固化可在烘箱中进行，气氛为N2，加热温度在140℃～200℃左右；或者也可使用激光束照射固化，激光波长范围在500nm～1510nm左右，激光束功率范围在50mW～50W左右，光束直径范围在10um～2000um左右，激光束可以是单光束也可以是多光束。
示例:5：
图5为本公开实施例的导电过孔的制备方法的示例5的流程图；如图5所示，该制备方法具体包括如下步骤：
S51、提供一介质层51，该介质层51的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层51进行机械钻孔，形成具有连接过孔51a的介质层51。
在一些示例中，机械钻孔时所采用的钻头材质为高硬度材料如碳化钨、钨钴合金、钨钛钴合金等高硬度合金(HRC值大于90度)，或天然金刚石、人造金刚石等。介质层51厚度0.1mm～2mm，连接过孔51a的直径范围0.5mm～1.5mm。按照不同钻头的形状和钻孔条件(转速、钻入速度等)，连接过孔51a的内壁可以是上下平直的，也可以是上宽下窄的，连接过孔51a的倾角范围0°～15°左右，例如：连接过孔51a的倾角为15°。
S52、在完成步骤S51之后，对介质层51进行清洗，将连接过孔51a的内壁以及连接过孔51a外边缘附近的残渣、碎屑(图5中所示的51b)等洗 净去除。
在一些示例中，步骤S52具体可以包括：将介质层51放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层51从水槽中取出，使用空气风刀吹干。
S53、在完成步骤S52之后，在形成有连接过孔51a的介质层51的第一表面和第二表面上形成化学镀媒质520。
在一些示例中，步骤S53具体可以包括：采用喷淋方式或者直接将介质层51放入含有化学镀媒质520溶液的水槽内，使介质层51表面吸附一层Sn 2+。其中，化学镀媒质520溶液主要成分是SnCl 2 10～30g/L、浓盐酸(38％浓度)20～60ml/L、去离子水，为防止Sn 2+氧化加入少量Sn粒。然后，喷淋或直接将介质层51放入含有活化液的水槽内，介质层51表面的与活化液发生反应(活化液主要成分SnCl 2 80～120g/L、浓盐酸300～500ml/L、Na 2SnO 310～20g/L、PdCl 2 1～4g/L、去离子水)，产生金属钯微粒并紧密附着于介质层51表面，也即在形成有连接过孔51a的介质层51的第一表面和第二表面上形成化学镀媒质520。需要说明的是，可以在介质层51的第一表面形成化学镀媒质520，之后再在介质层51的第二表面形成化学镀媒质520。
S53、在完成步骤S52之后，对形成有化学镀媒质520的介质层51进行化学镀，形成位于介质层51的第一表面、第二表面，以及连接过孔51a内的金属薄膜，并对形成在介质层51的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极5201和第二引出电极5202，以及位于连接过孔51a内的连接电极5203。
在一些示例中，化学镀金属薄膜可以为单层金属薄膜，也可以为叠层设置的金属薄膜。例如：仅单独镀Cu金属薄膜(厚度在1～100um左右)。当然，也可以先镀Ni金属薄膜(厚度在10～100nm左右)，再镀Cu金属薄膜 厚度在1～100um左右)，其中镀Ni金属薄膜作用是为了增加Cu金属薄膜的附着力。在本公开实施例中，仅以镀单层金属薄膜的材料为Cu，叠层金属薄膜时采用Ni/Cu为例，但这并不构成对本公开实施例保护范围的限制。以下以化学镀Ni/Cu金属薄膜为例进行说明。
在一些示例中，步骤S53具体可以包括：将介质层51放入化学镀液中，依次进行金属Ni和Cu的化学镀。之后，并对形成在介质层51的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极5201和第二引出电极5202，以及位于连接过孔51a内的连接电极5203。其中，化学镀Ni溶液的一般成分为NiSO4·6H2O 10～30g/L、NaH2PO4·2H2O 20～40g/L、柠檬酸钠5～15g/L、NH4Cl 20～40g/L，溶液为碱性，PH范围8.0～10.0，温度区间75～90℃。化学镀Cu溶液的一般成分为KNaC4H4O6 30～50g/L、NaOH 8～10g/L、Na2CO3 38～40g/L、CuSO4 10～20g/L、NiCl2 2～6g/L、浓度35％的甲醛40～60ml/L，溶液为碱性，PH范围11.0～14.0，温度区间55～65℃。
示例6：
图6为本公开实施例的导电过孔的制备方法的示例6的流程图；如图6所示，该制备方法具体包括如下步骤：
S61、提供一介质层61，该介质层61的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层61进行机械钻孔，形成具有连接过孔61a的介质层61。
在一些示例中，机械钻孔时所采用的钻头材质为高硬度材料如碳化钨、钨钴合金、钨钛钴合金等高硬度合金(HRC值大于90度)，或天然金刚石、人造金刚石等。介质层61厚度0.1mm～2mm，连接过孔61a的直径范围0.5mm～1.5mm。按照不同钻头的形状和钻孔条件(转速、钻入速度等)，连接过孔61a的内壁可以是上下平直的，也可以是上宽下窄的，连接过孔61a的倾角范围0°～15°左右，例如：连接过孔61a的倾角为15°。
S62、在完成步骤S61之后，对介质层61进行清洗，将连接过孔61a的 内壁以及连接过孔61a外边缘附近的残渣、碎屑(图6中所示的61b)等洗净去除。
在一些示例中，步骤S62具体可以包括：将介质层61放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层61浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层61上连接过孔61a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层61彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔61a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷。
S63、在完成步骤S62之后，在形成有连接过孔61a的介质层61的第一表面和第二表面上形成化学镀媒质620。
在一些示例中，步骤S63具体可以包括：采用喷淋方式或者直接将介质层61放入含有化学镀媒质620溶液的水槽内，使介质层61表面吸附一层Sn 2+。其中，化学镀媒质620溶液主要成分是SnCl 2 10～30g/L、浓盐酸(38％浓度)20～60ml/L、去离子水，为防止Sn 2+氧化加入少量Sn粒。然后，喷淋或直接将介质层61放入含有活化液的水槽内，介质层61表面的与活化液发生反应(活化液主要成分SnCl 2 80～120g/L、浓盐酸300～500ml/L、Na 2SnO 3 10～20g/L、PdCl 2 1～4g/L、去离子水)，产生金属钯微粒并紧密附着于介质层61表面，也即在形成有连接过孔61a的介质层61的第一表面和第二表面上形成化学镀媒质620。
S64、在完成步骤S63之后，对形成有化学镀媒质620的介质层61进行化学镀，形成位于介质层61的第一表面、第二表面，以及连接过孔61a内的金属薄膜，并对形成在介质层61的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极6201和第二引出电极6202，以及位于连接过孔61a内的连接电极6203。
在一些示例中，化学镀金属薄膜可以为单层金属薄膜，也可以为叠层设置的金属薄膜。例如：仅单独镀Cu金属薄膜(厚度在1～100um左右)。当然，也可以先镀Ni金属薄膜(厚度在10～100nm左右)，再镀Cu金属薄膜厚度在1～100um左右)，其中镀Ni金属薄膜作用是为了增加Cu金属薄膜的附着力。在本公开实施例中，仅以镀单层金属薄膜的材料为Cu，叠层金属薄膜时采用Ni/Cu为例，但这并不构成对本公开实施例保护范围的限制。以下以化学镀Ni/Cu金属薄膜为例进行说明。
在一些示例中，步骤S64具体可以包括：将介质层61放入化学镀液中，依次进行金属Ni和Cu的化学镀。之后，并对形成在介质层61的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极6201和第二引出电极6202，以及位于连接过孔61a内的连接电极6203。其中，化学镀Ni溶液的一般成分为NiSO4·6H2O 10～30g/L、NaH2PO4·2H2O 20～40g/L、柠檬酸钠5～15g/L、NH4Cl 20～40g/L，溶液为碱性，PH范围8.0～10.0，温度区间75～90℃。化学镀Cu溶液的一般成分为KNaC4H4O6 30～50g/L、NaOH 8～10g/L、Na2CO3 38～40g/L、CuSO4 10～20g/L、NiCl2 2～6g/L、浓度35％的甲醛40～60ml/L，溶液为碱性，PH范围11.0～14.0，温度区间55～65℃。
示例7：
图7为本公开实施例的导电过孔的制备方法的示例7的流程图；如图7所示，该制备方法具体包括如下步骤：
S71、提供一介质层71，该介质层71的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al 2O 3中任意一种，对介质层71进行喷砂钻孔，形成具有连接过孔71a的介质层71。
在一些示例中，步骤S71具体可以包括：采用喷砂工艺，利用压缩空气为动力搭配固体磨料颗粒或者混合了固体磨料颗粒的液体形成高速喷射束流，高速喷射到介质层71表面，磨料颗粒对介质层71表面形成持续切削和冲击，调节气压、束流射入角度、束流轨迹、束流作用时间等参数，可形成 上宽下窄的通孔状结构，连接过孔71a的倾角范围15°～45°左右，例如：连接过孔71a的倾角为30°。喷枪嘴直径范围在10～50um左右，磨料颗粒直径在1～20um左右，可选用的磨料有金刚砂、刚玉、碳酸钙、石英砂等。介质层71厚度0.1mm～2mm，连接过孔上部(在第二表面上)直径范围0.5mm～1.5mm左右，连接过孔下部(在第一表面上)直径范围0.3～1.2mm左右。
S72、在完成步骤S71之后，对介质层71进行清洗，将连接过孔的内壁以及连接过孔外边缘附近的残渣、碎屑(图7中的71b)等洗净去除。
在一些示例中，步骤S72具体可以包括：将介质层71放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层71从水槽中取出，使用空气风刀吹干。
S73、在完成步骤S72之后，在介质层71的连接过孔内，以及第一表面和第二表面上形成金属薄膜，作为种子层。
在一些示例中，步骤S73具体可以包括：采用包括但不限于磁控溅射的方式在介质层71的第一表面和第二表面，整面淀积导电良好的金属薄膜，作为种子层。形成金属薄膜的方式除了磁控溅射外，还可以采用电子束蒸发、热蒸发、脉冲激光溅射等方式。
在一些示例中，为增加金属薄膜720与介质层71的粘附力一般采用叠层金属。也即，金属薄膜720包括沿背离介质层方向依次设置的第一子金属膜层和第二子金属膜层。其中，第一子金属膜层的材料包括但不限于钛(Ti)、钼(Mo)、镍(Ni)中的任意一种，第二子金属膜层的材料包括但不限于铜(Cu)、银(Ag)或者金(Au)中的任意一种。例如：金属薄膜720包括：Ti/Cu、Mo/Cu、Ni/Cu、Ti/Ag、Mo/Ag、Ni/Ag中的任意一种。在本公开实施例中第一子金属膜层的厚度范围在1nm～100nm左右；第二子金属膜层的 厚度范围在50nm～1000nm左右。另外，连接过孔71a内壁的金属薄膜的厚度为在1nm～200nm左右。
S74、在完成步骤S73之后，通过电镀工艺，对连接过孔71a进行填孔，以及将形成在第一表面和第二表面上的金属薄膜720增厚，以形成分别位于第一表面和第二表面的第一引出电极7201和第二引出电极7202，以及形成位于连接过孔71a内的连接电极7203。
在一些示例中，步骤S74具体可以包括：通过合理搭配不同类型的电镀液(如金属薄膜填连接过孔71a的配方和整面加厚的配方)，在电镀槽中先进行填孔电镀，使连接过孔71a的内壁上淀积金属薄膜720(例如：金属薄膜720中的第一子金属膜层)，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，金属材料可将孔填满(膜厚等于0.5倍孔径)或者不填满仅孔内壁金属化(膜厚500nm～10um)，也即形成连接电极7203。再将介质层71移动至整面加厚配方电镀液的电镀槽内，分别进行第一表面和第二表面的金属薄膜720加厚电镀，电镀金属为Cu、Ag或Au，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，增厚的金属薄膜720a的厚度在500nm～500um左右。电镀完成后，一般会造成介质层71表面的起伏不平，影响之后的工艺流程，因此最后进行化学机械抛光工艺，使介质层71表面变平坦和光滑，形成第一引出电极7201和第二引出电极7202。
当然，在电镀完成之后，也可以对第一表面和第二表面上的增厚的金属薄膜720a进行图案化，形成第一引出电极7201和第二引出电极7202。
示例8：
图8为本公开实施例的导电过孔的制备方法的示例8的流程图；如图8所示，该制备方法具体包括如下步骤：
S81、提供一介质层81，该介质层81的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al 2O 3中任意一种，对介质层81进行喷砂钻孔，形成具有连接过孔81a的介质层81。
在一些示例中，步骤S81具体可以包括：采用喷砂工艺，利用压缩空气为动力搭配固体磨料颗粒或者混合了固体磨料颗粒的液体形成高速喷射束流，高速喷射到介质层81表面，磨料颗粒对介质层81表面形成持续切削和冲击，调节气压、束流射入角度、束流轨迹、束流作用时间等参数，可形成上宽下窄的通孔状结构，连接过孔81a的倾角范围15°～45°左右，例如：连接过孔81a的倾角为30°。喷枪嘴直径范围在10～50um左右，磨料颗粒直径在1～20um左右，可选用的磨料有金刚砂、刚玉、碳酸钙、石英砂等。介质层81厚度0.1mm～2mm，连接过孔81a上部(在第二表面上)直径范围0.5mm～1.5mm左右，连接过孔81a下部(在第一表面上)直径范围0.3～1.2mm左右。
S82、在完成步骤S81之后，对介质层81进行清洗，将连接过孔81a的内壁以及连接过孔81a外边缘附近的残渣、碎屑(图8中所示的81b)等洗净去除。
在一些示例中，步骤S82具体可以包括：将介质层81放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层81浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层81上连接过孔81a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层81彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔81a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷，利于高质量种子层生长和金属填孔及金属加厚。
S83、在完成步骤S82之后，在介质层81的连接过孔内，以及第一表面和第二表面上形成金属薄膜，作为种子层。
在一些示例中，步骤S83具体可以包括：采用包括但不限于磁控溅射的方式在介质层81的第一表面和第二表面，整面淀积导电良好的金属薄膜，作为种子层。形成金属薄膜的方式除了磁控溅射外，还可以采用电子束蒸发、 热蒸发、脉冲激光溅射等方式。
在一些示例中，为增加金属薄膜820与介质层81的粘附力一般采用叠层金属。也即，金属薄膜820包括沿背离介质层方向依次设置的第一子金属膜层和第二子金属膜层。其中，第一子金属膜层的材料包括但不限于钛(Ti)、钼(Mo)、镍(Ni)中的任意一种，第二子金属膜层的材料包括但不限于铜(Cu)、银(Ag)或者金(Au)中的任意一种。例如：金属薄膜820包括：Ti/Cu、Mo/Cu、Ni/Cu、Ti/Ag、Mo/Ag、Ni/Ag中的任意一种。在本公开实施例中第一子金属膜层的厚度范围在1nm～100nm左右；第二子金属膜层的厚度范围在50nm～1000nm左右。另外，连接过孔81a内壁的金属薄膜的厚度为在1nm～200nm左右。
S84、在完成步骤S83之后，通过电镀工艺，对连接过孔81a进行填孔，以及将形成在第一表面和第二表面上的金属薄膜820增厚，以形成分别位于第一表面和第二表面的第一引出电极8201和第二引出电极8202，以及形成位于连接过孔81a内的连接电极8203。
在一些示例中，步骤S84具体可以包括：通过合理搭配不同类型的电镀液(如金属薄膜填连接过孔81a的配方和整面加厚的配方)，在电镀槽中先进行填孔电镀，使连接过孔81a的内壁上淀积金属薄膜820(例如：金属薄膜820中的第一子金属膜层)，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，金属材料可将孔填满(膜厚等于0.5倍孔径)或者不填满仅孔内壁金属化(膜厚500nm～10um)，也即形成连接电极8203。再将介质层81移动至整面加厚配方电镀液的电镀槽内，分别进行第一表面和第二表面的金属薄膜820加厚电镀，电镀金属为Cu、Ag或Au，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，增厚的金属薄膜820a的厚度在500nm～500um左右。电镀完成后，一般会造成介质层81表面的起伏不平，影响之后的工艺流程，因此最后进行化学机械抛光工艺，使介质层81表面变平坦和光滑，形成第一引出电极8201和第二引出电极8202。
当然，在电镀完成之后，也可以对第一表面和第二表面上的增厚的金属薄膜820a进行图案化，形成第一引出电极8201和第二引出电极8202。
示例9：
图9为本公开实施例的导电过孔的制备方法的示例9的流程图；如图9所示，该制备方法具体包括如下步骤：
S91、提供一介质层91，该介质层91的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层91进行喷砂钻孔，形成具有连接过孔91a的介质层91。
在一些示例中，步骤S91具体可以包括：采用喷砂工艺，利用压缩空气为动力搭配固体磨料颗粒或者混合了固体磨料颗粒的液体形成高速喷射束流，高速喷射到介质层91表面，磨料颗粒对介质层91表面形成持续切削和冲击，调节气压、束流射入角度、束流轨迹、束流作用时间等参数，可形成上宽下窄的通孔状结构，连接过孔91a的倾角范围15°～45°左右，例如：连接过孔91a的倾角为30°。喷枪嘴直径范围在10～50um左右，磨料颗粒直径在1～20um左右，可选用的磨料有金刚砂、刚玉、碳酸钙、石英砂等。介质层91厚度0.1mm～2mm，连接过孔91a上部(在第二表面上)直径范围0.5mm～1.5mm左右，连接过孔91a下部(在第一表面上)直径范围0.3～1.2mm左右。
S92、在完成步骤S91之后，对介质层91进行清洗，将连接过孔91a的内壁以及连接过孔91a外边缘附近的残渣、碎屑(图9所示的9b)等洗净去除。
在一些示例中，步骤S92具体可以包括：将介质层91放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层91从水槽中取出，使用空气风刀吹干。
S93、在完成步骤S92之后，将金属膏920挤入介质层91的连接过孔 91a内，并在介质层91的第一表面和第二表面上形成金属膏920，之后对分别第一表面和第二表面的金属膏920进行固化，形成填充在连接过孔91a内的连接电极9203，以及位于第一表面的第一引出电极9201和位于第二表面的第二引出电极9202。
在一些示例中，金属膏920可以为导电浆，导电浆的材料包括但不限于低温固化型的聚合物导电浆料，主要成分为导电颗粒、树脂、固化剂、分散剂、稀释剂、附着力增强剂和防沉降剂。其中，导电颗粒可选Cu、Ag、Au，粒径范围在1nm～100um左右。树脂可选双酚环氧树脂，固化剂可选酸酐类物质，分散剂可选甲基咪唑，稀释剂可选乙酸丁酯，附着力增强剂可选钛酸四乙脂，防沉降剂可选聚酰胺类物质。
步骤S93具体可以包括：首先将导电浆料涂布在连接过孔91a内和第二表面的孔边缘周围，然后对介质层91的第二表面侧进行溶剂烘干和热固化，形成填充在连接过孔91a内的连接电极9203，以及位于第二表面上的第二引出电极9202；之后在介质层91的第一表面的孔边缘周围涂布导电浆料，然后对介质层91的第一表面侧进行溶剂烘干和热固化，形成位于第一表面上的第一引出电极9201。其中，导电浆料优选涂布方式包括但不限于丝网印刷、喷墨打印、slit涂布等方式，在涂布时配合使用真空吸附机台可提高涂布效率，改善导电浆料在孔壁和孔边缘的分布剖面。溶剂烘干可在空气常压、N2常压、真空下进行，温度范围在40℃～95℃左右，时间在1分钟～30分钟左右。热固化可在烘箱中进行，气氛为N2，加热温度在140℃～200℃左右；或者也可使用激光束照射固化，激光波长范围在500nm～1510nm左右，激光束功率范围在50mW～50W左右，光束直径范围在10um～2000um左右，激光束可以是单光束也可以是多光束。
示例10：
图10为本公开实施例的导电过孔的制备方法的示例10的流程图；如图10所示，该制备方法具体包括如下步骤：
S101、提供一介质层101，该介质层101的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层101进行喷砂钻孔，形成具有连接过孔101a的介质层101。
在一些示例中，步骤S101具体可以包括：采用喷砂工艺，利用压缩空气为动力搭配固体磨料颗粒或者混合了固体磨料颗粒的液体形成高速喷射束流，高速喷射到介质层101表面，磨料颗粒对介质层101表面形成持续切削和冲击，调节气压、束流射入角度、束流轨迹、束流作用时间等参数，可形成上宽下窄的通孔状结构，连接过孔101a的倾角范围15°～45°左右，例如：连接过孔101a的倾角为30°。喷枪嘴直径范围在10～50um左右，磨料颗粒直径在1～20um左右，可选用的磨料有金刚砂、刚玉、碳酸钙、石英砂等。介质层101厚度0.1mm～2mm，连接过孔101a上部(在第二表面上)直径范围0.5mm～1.5mm左右，连接过孔101a下部(在第一表面上)直径范围0.3～1.2mm左右。
S102、在完成步骤S101之后，对介质层101进行清洗，将连接过孔101a的内壁以及连接过孔101a外边缘附近的残渣、碎屑(图10中所示的101b)等洗净去除。
在一些示例中，步骤S102具体可以包括：将介质层101放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层101浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层101上连接过孔101a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层101彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔101a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷，利于高质量种子层生长和金属填孔及金属加厚。
S103、在完成步骤S102之后，将金属膏挤入介质层101的连接过孔101a内，并在介质层101的第一表面和第二表面上形成金属膏，之后对分别第一 表面和第二表面的金属膏进行固化，形成填充在连接过孔101a内的连接电极10203，以及位于第一表面的第一引出电极10201和位于第二表面的第二引出电极10202。
在一些示例中，金属膏可以为导电浆，导电浆的材料包括但不限于低温固化型的聚合物导电浆料，主要成分为导电颗粒、树脂、固化剂、分散剂、稀释剂、附着力增强剂和防沉降剂。其中，导电颗粒可选Cu、Ag、Au，粒径范围在1nm～100um左右。树脂可选双酚环氧树脂，固化剂可选酸酐类物质，分散剂可选甲基咪唑，稀释剂可选乙酸丁酯，附着力增强剂可选钛酸四乙脂，防沉降剂可选聚酰胺类物质。
步骤S103具体可以包括：首先将导电浆料涂布在连接过孔101a内和第二表面的孔边缘周围，然后对介质层101的第二表面侧进行溶剂烘干和热固化，形成填充在连接过孔101a内的连接电极10203，以及位于第二表面上的第二引出电极10202；之后在介质的第一表面的孔边缘周围涂布导电浆料，然后对介质层101的第一表面侧进行溶剂烘干和热固化，形成位于第一表面上的第一引出电极10201。其中，导电浆料优选涂布方式包括但不限于丝网印刷、喷墨打印、slit涂布等方式，在涂布时配合使用真空吸附机台可提高涂布效率，改善导电浆料在孔壁和孔边缘的分布剖面。溶剂烘干可在空气常压、N2常压、真空下进行，温度范围在40℃～95℃左右，时间在1分钟～30分钟左右。热固化可在烘箱中进行，气氛为N2，加热温度在140℃～200℃左右；或者也可使用激光束照射固化，激光波长范围在500nm～1510nm左右，激光束功率范围在50mW～50W左右，光束直径范围在10um～2000um左右，激光束可以是单光束也可以是多光束。
示例11：
图11为本公开实施例的导电过孔的制备方法的示例11的流程图；如图11所示，该制备方法具体包括如下步骤：
S111、提供一介质层111，该介质层111的材质包括但不限于glass，Si， SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层111进行喷砂钻孔，形成具有连接过孔111a的介质层111。
在一些示例中，步骤S111具体可以包括：采用喷砂工艺，利用压缩空气为动力搭配固体磨料颗粒或者混合了固体磨料颗粒的液体形成高速喷射束流，高速喷射到介质层111表面，磨料颗粒对介质层111表面形成持续切削和冲击，调节气压、束流射入角度、束流轨迹、束流作用时间等参数，可形成上宽下窄的通孔状结构，连接过孔111a的倾角范围15°～45°左右，例如：连接过孔111a的倾角为30°。喷枪嘴直径范围在10～50um左右，磨料颗粒直径在1～20um左右，可选用的磨料有金刚砂、刚玉、碳酸钙、石英砂等。介质层111厚度0.1mm～2mm，连接过孔111a上部(在第二表面上)直径范围0.5mm～1.5mm左右，连接过孔111a下部(在第一表面上)直径范围0.3～1.2mm左右。
S112、在完成步骤S111之后，对介质层111进行清洗，将连接过孔111a的内壁以及连接过孔111a外边缘附近的残渣、碎屑(图11中所示的11b)等洗净去除。
在一些示例中，步骤S112具体可以包括：将介质层111放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层111从水槽中取出，使用空气风刀吹干。
S113、在完成步骤S112之后，在形成有连接过孔111a的介质层111的第一表面和第二表面上形成化学镀媒质1120。
在一些示例中，步骤S113具体可以包括：采用喷淋方式或者直接将介质层111放入含有化学镀媒质1120溶液的水槽内，使介质层111表面吸附一层Sn 2+。其中，化学镀媒质1120溶液主要成分是SnCl 2 10～30g/L、浓盐酸(38％浓度)20～60ml/L、去离子水，为防止Sn 2+氧化加入少量Sn粒。 然后，喷淋或直接将介质层111放入含有活化液的水槽内，介质层111表面的与活化液发生反应(活化液主要成分SnCl 2 80～120g/L、浓盐酸300～500ml/L、Na 2SnO 3 10～20g/L、PdCl 2 1～4g/L、去离子水)，产生金属钯微粒并紧密附着于介质层111表面，也即在形成有连接过孔111a的介质层111的第一表面和第二表面上形成化学镀媒质1120。
S114、在完成步骤S113之后，对形成有化学镀媒质1120的介质层111进行化学镀，形成位于介质层111的第一表面、第二表面，以及连接过孔111a内的金属薄膜，并对形成在介质层111的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极11201和第二引出电极11202，以及位于连接过孔111a内的连接电极11203。
在一些示例中，化学镀金属薄膜可以为单层金属薄膜，也可以为叠层设置的金属薄膜。例如：仅单独镀Cu金属薄膜(厚度在1～100um左右)。当然，也可以先镀Ni金属薄膜(厚度在10～100nm左右)，再镀Cu金属薄膜厚度在1～100um左右)，其中镀Ni金属薄膜作用是为了增加Cu金属薄膜的附着力。在本公开实施例中，仅以镀单层金属薄膜的材料为Cu，叠层金属薄膜时采用Ni/Cu为例，但这并不构成对本公开实施例保护范围的限制。以下以化学镀Ni/Cu金属薄膜为例进行说明。
在一些示例中，步骤S114具体可以包括：将介质层111放入化学镀液中，依次进行金属Ni和Cu的化学镀。之后，并对形成在介质层111的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极11201和第二引出电极11202，以及位于连接过孔111a内的连接电极11203。其中，化学镀Ni溶液的一般成分为NiSO4·6H2O 10～30g/L、NaH2PO4·2H2O 20～40g/L、柠檬酸钠5～15g/L、NH4Cl 20～40g/L，溶液为碱性，PH范围8.0～10.0，温度区间75～90℃。化学镀Cu溶液的一般成分为KNaC4H4O6 30～50g/L、NaOH8～10g/L、Na2CO3 38～40g/L、CuSO4 10～20g/L、NiCl2 2～6g/L、浓度35％的甲醛40～60ml/L，溶液为碱性，PH范围11.0～14.0，温度区间55～65℃。
示例12：
图12为本公开实施例的导电过孔的制备方法的示例12的流程图；如图12所示，该制备方法具体包括如下步骤：
S121、提供一介质层121，该介质层121的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层121进行喷砂钻孔，形成具有连接过孔121a的介质层121。
在一些示例中，步骤S121具体可以包括：采用喷砂工艺，利用压缩空气为动力搭配固体磨料颗粒或者混合了固体磨料颗粒的液体形成高速喷射束流，高速喷射到介质层121表面，磨料颗粒对介质层121表面形成持续切削和冲击，调节气压、束流射入角度、束流轨迹、束流作用时间等参数，可形成上宽下窄的通孔状结构，连接过孔121a的倾角范围15°～45°左右，例如：连接过孔121a的倾角为30°。喷枪嘴直径范围在10～50um左右，磨料颗粒直径在1～20um左右，可选用的磨料有金刚砂、刚玉、碳酸钙、石英砂等。介质层121厚度0.1mm～2mm，连接过孔121a上部(在第二表面上)直径范围0.5mm～1.5mm左右，连接过孔121a下部(在第一表面上)直径范围0.3～1.2mm左右。
S122、在完成步骤S121之后，对介质层121进行清洗，将连接过孔121a的内壁以及连接过孔121a外边缘附近的残渣、碎屑(图12所示的12b)等洗净去除。
在一些示例中，步骤S122具体可以包括：将介质层121放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层121浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层121上连接过孔121a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层121彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔 121a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷。
S123、在完成步骤S122之后，在形成有连接过孔121a的介质层121的第一表面和第二表面上形成化学镀媒质1220。
在一些示例中，步骤S123具体可以包括：采用喷淋方式或者直接将介质层121放入含有化学镀媒质1220溶液的水槽内，使介质层121表面吸附一层Sn 2+。其中，化学镀媒质1220溶液主要成分是SnCl 2 10～30g/L、浓盐酸(38％浓度)20～60ml/L、去离子水，为防止Sn 2+氧化加入少量Sn粒。然后，喷淋或直接将介质层121放入含有活化液的水槽内，介质层121表面的与活化液发生反应(活化液主要成分SnCl 2 80～120g/L、浓盐酸300～500ml/L、Na 2SnO 3 10～20g/L、PdCl 2 1～4g/L、去离子水)，产生金属钯微粒并紧密附着于介质层121表面，也即在形成有连接过孔121a的介质层121的第一表面和第二表面上形成化学镀媒质1220。
S124、在完成步骤S123之后，对形成有化学镀媒质1220的介质层121进行化学镀，形成位于介质层121的第一表面、第二表面，以及连接过孔121a内的金属薄膜，并对形成在介质层121的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极12201和第二引出电极12202，以及位于连接过孔121a内的连接电极12203。
在一些示例中，化学镀金属薄膜可以为单层金属薄膜，也可以为叠层设置的金属薄膜。例如：仅单独镀Cu金属薄膜(厚度在1～100um左右)。当然，也可以先镀Ni金属薄膜(厚度在10～100nm左右)，再镀Cu金属薄膜厚度在1～100um左右)，其中镀Ni金属薄膜作用是为了增加Cu金属薄膜的附着力。在本公开实施例中，仅以镀单层金属薄膜的材料为Cu，叠层金属薄膜时采用Ni/Cu为例，但这并不构成对本公开实施例保护范围的限制。以下以化学镀Ni/Cu金属薄膜为例进行说明。
在一些示例中，步骤S124具体可以包括：将介质层121放入化学镀液中，依次进行金属Ni和Cu的化学镀。之后，并对形成在介质层121的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极12201和第二 引出电极12202，以及位于连接过孔121a内的连接电极12203。其中，化学镀Ni溶液的一般成分为NiSO4·6H2O 10～30g/L、NaH2PO4·2H2O 20～40g/L、柠檬酸钠5～15g/L、NH4Cl 20～40g/L，溶液为碱性，PH范围8.0～10.0，温度区间75～90℃。化学镀Cu溶液的一般成分为KNaC4H4O6 30～50g/L、NaOH8～10g/L、Na2CO3 38～40g/L、CuSO4 10～20g/L、NiCl2 2～6g/L、浓度35％的甲醛40～60ml/L，溶液为碱性，PH范围11.0～14.0，温度区间55～65℃。
示例13：
图13为本公开实施例的导电过孔的制备方法的示例13的流程图；如图13所示，该制备方法具体包括如下步骤：
S131、提供一介质层131，该介质层131的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层131进行激光打孔，形成具有连接过孔131a的介质层131。
在一些示例中，步骤S131具体可以包括：使用激光器以激光束垂直入射的方式打到介质层131表面(第一表面或者第二表面)，激光束与介质层131相互作用时，因激光光子能量较高将组成介质层131的原子电离化并抛射出介质层131表面，随时间增加打的孔逐渐加深，直至打穿整个介质层131，也即形成连接过孔131a。其中，连接过孔131a的倾角范围0°～5°左右，例如：连接过孔131a的倾角为5°。也就是说，连接过孔131a的形状类似于圆柱形或者为圆台形、倒圆台形。一般可选用的激光波长为532nm、355nm、266nm、248nm、197nm等，激光的脉冲宽度可选1～100fs、1～100ps、1～100ns等，激光器的类型可选连续激光器、脉冲激光器等。激光打孔的方式有，光斑直径较大时，激光束和介质层131的相对位置固定，依靠高能量直接把介质层131打穿，连接过孔131a的形状是倒圆台，直径自上而下依次减小。连接过孔131a在第二表面上的直径范围在80～120um左右，连接过孔131a在第一表面上的直径范围在60～100um左右。另一种方式时，光斑直径较小时，激光束在介质层131上画圈扫描，光斑聚焦点在不断变化， 聚焦焦点深度也在不断变化，自介质层131下表面向介质层131上表面画螺旋线，且螺旋半径自下而上依次减小，介质层131被激光切割成圆台形，因重力作用而掉落下去，连接过孔131a因此形成，该孔的形状为圆台形。连接过孔131a在第二表面上的直径范围在100～1000um左右，连接过孔131a在第一表面上的直径范围在150～1500um左右。
S132、在完成步骤S131之后，对介质层131进行清洗，将连接过孔131a的内壁以及连接过孔131a外边缘附近的残渣、碎屑等洗净去除。
在一些示例中，步骤S132具体可以包括：将介质层131放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层131从水槽中取出，使用空气风刀吹干。
S133、在完成步骤S132之后，在介质层131的连接过孔131a内，以及第一表面和第二表面上形成金属薄膜1320，作为种子层。
在一些示例中，步骤S133具体可以包括：采用包括但不限于磁控溅射的方式在介质层131的第一表面和第二表面，整面淀积导电良好的金属薄膜1320，作为种子层。形成金属薄膜120的方式除了磁控溅射外，还可以采用电子束蒸发、热蒸发、脉冲激光溅射等方式。
在一些示例中，为增加金属薄膜与介质层131的粘附力一般采用叠层金属。也即，金属薄膜包括沿背离介质层131方向依次设置的第一子金属膜层和第二子金属膜层。其中，第一子金属膜层的材料包括但不限于钛(Ti)、钼(Mo)、镍(Ni)中的任意一种，第二子金属膜层的材料包括但不限于铜(Cu)、银(Ag)或者金(Au)中的任意一种。例如：金属薄膜包括：Ti/Cu、Mo/Cu、Ni/Cu、Ti/Ag、Mo/Ag、Ni/Ag中的任意一种。在本公开实施例中第一子金属膜层的厚度范围在1nm～100nm左右；第二子金属膜层的厚度范围在50nm～1000nm左右。另外，连接过孔131a内壁的金属薄膜的厚度为在 1nm～200nm左右。
S134、在完成步骤S133之后，通过电镀工艺，对连接过孔131a进行填孔，以及将形成在第一表面和第二表面上的金属薄膜1320增厚，以形成分别位于第一表面和第二表面的第一引出电极13201和第二引出电极13202，以及形成位于连接过孔131a内的连接电极13203。
在一些示例中，步骤S14具体可以包括：通过合理搭配不同类型的电镀液(如金属薄膜填连接过孔131a的配方和整面加厚的配方)，在电镀槽中先进行填孔电镀，使连接过孔131a的内壁上淀积金属薄膜1320(例如：金属薄膜1320中的第一子金属膜层)，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，金属材料可将孔填满(膜厚等于0.5倍孔径)或者不填满仅孔内壁金属化(膜厚500nm～10um)，也即形成连接电极13203。再将介质层131移动至整面加厚配方电镀液的电镀槽内，分别进行第一表面和第二表面的金属薄膜1320加厚电镀，电镀金属为Cu、Ag或Au，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，增厚的金属薄膜1320a的厚度在500nm～500um左右。电镀完成后，一般会造成介质层11表面的起伏不平，影响之后的工艺流程，因此最后进行化学机械抛光工艺，使介质层131表面变平坦和光滑，形成第一引出电极13201和第二引出电极13202。
当然，在电镀完成之后，也可以对第一表面和第二表面上的增厚的金属薄膜1320a进行图案化，形成第一引出电极13201和第二引出电极13202。
示例14：
图14为本公开实施例的导电过孔的制备方法的示例14的流程图；如图14所示，该制备方法具体包括如下步骤：
S141、提供一介质层141，该介质层141的材质包括但不限于glass，Si，SOI中的任意一种，对介质层141进行激光打孔，形成具有连接过孔141a的介质层141。
在一些示例中，步骤S141具体可以包括：使用激光器以激光束垂直入 射的方式打到介质层141表面(第一表面或者第二表面)，激光束与介质层141相互作用时，因激光光子能量较高将组成介质层141的原子电离化并抛射出介质层141表面，随时间增加打的孔逐渐加深，直至打穿整个介质层141，也即形成连接过孔141a。其中，连接过孔141a的倾角范围0°～5°左右，例如：连接过孔141a的倾角为5°。也就是说，连接过孔141a的形状类似于圆柱形或者为圆台形、倒圆台形。一般可选用的激光波长为532nm、355nm、266nm、248nm、197nm等，激光的脉冲宽度可选1～100fs、1～100ps、1～100ns等，激光器的类型可选连续激光器、脉冲激光器等。激光打孔的方式有，光斑直径较大时，激光束和介质层141的相对位置固定，依靠高能量直接把介质层141打穿，连接过孔141a的形状是倒圆台，直径自上而下依次减小。连接过孔141a在第二表面上的直径范围在80～120um左右，连接过孔141a在第一表面上的直径范围在60～100um左右。另一种方式时，光斑直径较小时，激光束在介质层141上画圈扫描，光斑聚焦点在不断变化，聚焦焦点深度也在不断变化，自介质层141下表面向介质层141上表面画螺旋线，且螺旋半径自下而上依次减小，介质层141被激光切割成圆台形，因重力作用而掉落下去，连接过孔141a因此形成，该孔的形状为圆台形。连接过孔141a在第二表面上的直径范围在100～1000um左右，连接过孔141a在第一表面上的直径范围在150～1500um左右。
S142、在完成步骤S141之后，对介质层141进行清洗，将连接过孔141a的内壁以及连接过孔141a外边缘附近的残渣、碎屑等洗净去除。
在一些示例中，步骤S142具体可以包括：将介质层141放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层141浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层141上连接过孔141a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层141彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔 141a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷，利于高质量种子层生长和金属填孔及金属加厚。
S143、在完成步骤S142之后，在介质层141的连接过孔141a内，以及第一表面和第二表面上形成金属薄膜1420，作为种子层。
在一些示例中，步骤S143具体可以包括：采用包括但不限于磁控溅射的方式在介质层141的第一表面和第二表面，整面淀积导电良好的金属薄膜1420，作为种子层。形成金属薄膜1420的方式除了磁控溅射外，还可以采用电子束蒸发、热蒸发、脉冲激光溅射等方式。
在一些示例中，为增加金属薄膜与介质层141的粘附力一般采用叠层金属。也即，金属薄膜包括沿背离介质层141方向依次设置的第一子金属膜层和第二子金属膜层。其中，第一子金属膜层的材料包括但不限于钛(Ti)、钼(Mo)、镍(Ni)中的任意一种，第二子金属膜层的材料包括但不限于铜(Cu)、银(Ag)或者金(Au)中的任意一种。例如：金属薄膜包括：Ti/Cu、Mo/Cu、Ni/Cu、Ti/Ag、Mo/Ag、Ni/Ag中的任意一种。在本公开实施例中第一子金属膜层的厚度范围在1nm～100nm左右；第二子金属膜层的厚度范围在50nm～1000nm左右。另外，连接过孔141a内壁的金属薄膜的厚度为在1nm～200nm左右。
S144、在完成步骤S143之后，通过电镀工艺，对连接过孔141a进行填孔，以及将形成在第一表面和第二表面上的金属薄膜1420增厚，以形成分别位于第一表面和第二表面的第一引出电极14201和第二引出电极14202，以及形成位于连接过孔141a内的连接电极14203。
在一些示例中，步骤S14具体可以包括：通过合理搭配不同类型的电镀液(如金属薄膜填连接过孔141a的配方和整面加厚的配方)，在电镀槽中先进行填孔电镀，使连接过孔141a的内壁上淀积金属薄膜1420(例如：金属薄膜1420中的第一子金属膜层)，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，金属材料可将孔填满(膜厚等于0.5倍孔径)或者不填满仅孔内壁金属化(膜厚500nm～10um)，也即形成连接电极14203。再将介质层 141移动至整面加厚配方电镀液的电镀槽内，分别进行第一表面和第二表面的金属薄膜1420加厚电镀，电镀金属为Cu、Ag或Au，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，增厚的金属薄膜1420a的厚度在500nm～500um左右。电镀完成后，一般会造成介质层141表面的起伏不平，影响之后的工艺流程，因此最后进行化学机械抛光工艺，使介质层141表面变平坦和光滑，形成第一引出电极41201和第二引出电极14202。
当然，在电镀完成之后，也可以对第一表面和第二表面上的增厚的金属薄膜1420a进行图案化，形成第一引出电极14201和第二引出电极14202。
示例15：
图15为本公开实施例的导电过孔的制备方法的示例15的流程图；如图15所示，该制备方法具体包括如下步骤：
S151、提供一介质层151，该介质层151的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层151进行激光打孔，形成具有连接过孔151a的介质层151。
在一些示例中，步骤S151具体可以包括：使用激光器以激光束垂直入射的方式打到介质层151表面(第一表面或者第二表面)，激光束与介质层151相互作用时，因激光光子能量较高将组成介质层151的原子电离化并抛射出介质层151表面，随时间增加打的孔逐渐加深，直至打穿整个介质层151，也即形成连接过孔151a。其中，连接过孔151a的倾角范围0°～5°左右，例如：连接过孔151a的倾角为5°。也就是说，连接过孔151a141a的形状类似于圆柱形或者为圆台形、倒圆台形。一般可选用的激光波长为532nm、355nm、266nm、248nm、197nm等，激光的脉冲宽度可选1～100fs、1～100ps、1～100ns等，激光器的类型可选连续激光器、脉冲激光器等。激光打孔的方式有，光斑直径较大时，激光束和介质层151的相对位置固定，依靠高能量直接把介质层151打穿，连接过孔151a的形状是倒圆台，直径自上而下依次减小。连接过孔151a在第二表面上的直径范围在80～120um左右， 连接过孔151a在第一表面上的直径范围在60～100um左右。另一种方式时，光斑直径较小时，激光束在介质层151上画圈扫描，光斑聚焦点在不断变化，聚焦焦点深度也在不断变化，自介质层151下表面向介质层151上表面画螺旋线，且螺旋半径自下而上依次减小，介质层151被激光切割成圆台形，因重力作用而掉落下去，连接过孔151a因此形成，该孔的形状为圆台形。连接过孔151a在第二表面上的直径范围在100～1000um左右，连接过孔151a在第一表面上的直径范围在150～1500um左右。
S152、在完成步骤S151之后，对介质层151进行清洗，将连接过孔151a的内壁以及连接过孔151a外边缘附近的残渣、碎屑(图15中所示的15b)等洗净去除。
在一些示例中，步骤S152具体可以包括：将介质层151放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层151从水槽中取出，使用空气风刀吹干。
S153、在完成步骤S152之后，将金属膏1520挤入介质层151的连接过孔151a内，并在介质层151的第一表面和第二表面上形成金属膏1520，之后对分别第一表面和第二表面的金属膏1520进行固化，形成填充在连接过孔151a内的连接电极15203，以及位于第一表面的第一引出电极15201和位于第二表面的第二引出电极15202。
在一些示例中，金属膏1520可以为导电浆，导电浆的材料包括但不限于低温固化型的聚合物导电浆料，主要成分为导电颗粒、树脂、固化剂、分散剂、稀释剂、附着力增强剂和防沉降剂。其中，导电颗粒可选Cu、Ag、Au，粒径范围在1nm～100um左右。树脂可选双酚环氧树脂，固化剂可选酸酐类物质，分散剂可选甲基咪唑，稀释剂可选乙酸丁酯，附着力增强剂可选钛酸四乙脂，防沉降剂可选聚酰胺类物质。
步骤S153具体可以包括：首先将导电浆料涂布在连接过孔151a内和第二表面的孔边缘周围，然后对介质层151的第二表面侧进行溶剂烘干和热固化，形成填充在连接过孔151a内的连接电极15203，以及位于第二表面上的第二引出电极15202；之后在介质层151的第一表面的孔边缘周围涂布导电浆料，然后对介质层151的第一表面侧进行溶剂烘干和热固化，形成位于第一表面上的第一引出电极15201。其中，导电浆料优选涂布方式包括但不限于丝网印刷、喷墨打印、slit涂布等方式，在涂布时配合使用真空吸附机台可提高涂布效率，改善导电浆料在孔壁和孔边缘的分布剖面。溶剂烘干可在空气常压、N2常压、真空下进行，温度范围在40℃～95℃左右，时间在1分钟～30分钟左右。热固化可在烘箱中进行，气氛为N2，加热温度在140℃～200℃左右；或者也可使用激光束照射固化，激光波长范围在500nm～1510nm左右，激光束功率范围在50mW～50W左右，光束直径范围在10um～2000um左右，激光束可以是单光束也可以是多光束。
示例16：
图16为本公开实施例的导电过孔的制备方法的示例16的流程图；如图16所示，该制备方法具体包括如下步骤：
S161、提供一介质层161，该介质层161的材质包括但不限于glass，Si，SOI中的任意一种，对介质层161进行激光打孔，形成具有连接过孔161a的介质层161。
在一些示例中，步骤S161具体可以包括：使用激光器以激光束垂直入射的方式打到介质层161表面(第一表面或者第二表面)，激光束与介质层161相互作用时，因激光光子能量较高将组成介质层161的原子电离化并抛射出介质层161表面，随时间增加打的孔逐渐加深，直至打穿整个介质层161，也即形成连接过孔161a。其中，连接过孔161a的倾角范围0°～5°左右，例如：连接过孔161a的倾角为5°。也就是说，连接过孔161a141a的形状类似于圆柱形或者为圆台形、倒圆台形。一般可选用的激光波长为532nm、 355nm、266nm、248nm、197nm等，激光的脉冲宽度可选1～100fs、1～100ps、1～100ns等，激光器的类型可选连续激光器、脉冲激光器等。激光打孔的方式有，光斑直径较大时，激光束和介质层161的相对位置固定，依靠高能量直接把介质层161打穿，连接过孔161a的形状是倒圆台，直径自上而下依次减小。连接过孔161a在第二表面上的直径范围在80～120um左右，连接过孔161a在第一表面上的直径范围在60～100um左右。另一种方式时，光斑直径较小时，激光束在介质层161上画圈扫描，光斑聚焦点在不断变化，聚焦焦点深度也在不断变化，自介质层161下表面向介质层161上表面画螺旋线，且螺旋半径自下而上依次减小，介质层161被激光切割成圆台形，因重力作用而掉落下去，连接过孔161a因此形成，该孔的形状为圆台形。连接过孔161a在第二表面上的直径范围在100～1000um左右，连接过孔161a在第一表面上的直径范围在150～1500um左右。
S162、在完成步骤S161之后，对介质层161进行清洗，将连接过孔161a的内壁以及连接过孔161a外边缘附近的残渣、碎屑(图16中所示的16b)等洗净去除。
在一些示例中，步骤S162具体可以包括：将介质层161放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层161浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层161上连接过孔161a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层161彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔161a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷，利于高质量种子层生长和金属填孔及金属加厚。
S163、在完成步骤S162之后，将金属膏挤入介质层161的连接过孔161a内，并在介质层161的第一表面和第二表面上形成金属膏，之后对分别第一表面和第二表面的金属膏进行固化，形成填充在连接过孔161a内的连接电 极16203，以及位于第一表面的第一引出电极16201和位于第二表面的第二引出电极16202。
在一些示例中，金属膏可以为导电浆，导电浆的材料包括但不限于低温固化型的聚合物导电浆料，主要成分为导电颗粒、树脂、固化剂、分散剂、稀释剂、附着力增强剂和防沉降剂。其中，导电颗粒可选Cu、Ag、Au，粒径范围在1nm～100um左右。树脂可选双酚环氧树脂，固化剂可选酸酐类物质，分散剂可选甲基咪唑，稀释剂可选乙酸丁酯，附着力增强剂可选钛酸四乙脂，防沉降剂可选聚酰胺类物质。
步骤S163具体可以包括：首先将导电浆料涂布在连接过孔161a内和第二表面的孔边缘周围，然后对介质层161的第二表面侧进行溶剂烘干和热固化，形成填充在连接过孔161a内的连接电极16203，以及位于第二表面上的第二引出电极16202；之后在介质层161的第一表面的孔边缘周围涂布导电浆料，然后对介质层161的第一表面侧进行溶剂烘干和热固化，形成位于第一表面上的第一引出电极16201。其中，导电浆料优选涂布方式包括但不限于丝网印刷、喷墨打印、slit涂布等方式，在涂布时配合使用真空吸附机台可提高涂布效率，改善导电浆料在孔壁和孔边缘的分布剖面。溶剂烘干可在空气常压、N2常压、真空下进行，温度范围在40℃～95℃左右，时间在1分钟～30分钟左右。热固化可在烘箱中进行，气氛为N2，加热温度在140℃～200℃左右；或者也可使用激光束照射固化，激光波长范围在500nm～1510nm左右，激光束功率范围在50mW～50W左右，光束直径范围在10um～2000um左右，激光束可以是单光束也可以是多光束。
示例17：
图17为本公开实施例的导电过孔的制备方法的示例17的流程图；如图17所示，该制备方法具体包括如下步骤：
S171、提供一介质层171，该介质层171的材质包括但不限于glass，Si，SOI，GaAs，SiC，InP，PCB，Al2O3中任意一种，对介质层171进行激光 打孔，形成具有连接过孔171a的介质层171。
在一些示例中，步骤S171具体可以包括：使用激光器以激光束垂直入射的方式打到介质层171表面(第一表面或者第二表面)，激光束与介质层171相互作用时，因激光光子能量较高将组成介质层171的原子电离化并抛射出介质层171表面，随时间增加打的孔逐渐加深，直至打穿整个介质层171，也即形成连接过孔171a。其中，连接过孔171a的倾角范围0°～5°左右，例如：连接过孔171a的倾角为5°。一般可选用的激光波长为532nm、355nm、266nm、248nm、197nm等，激光的脉冲宽度可选1～100fs、1～100ps、1～100ns等，激光器的类型可选连续激光器、脉冲激光器等。激光打孔的方式有，光斑直径较大时，激光束和介质层171的相对位置固定，依靠高能量直接把介质层171打穿，连接过孔171a的形状是倒圆台，直径自上而下依次减小。连接过孔171a在第二表面上的直径范围在80～120um左右，连接过孔171a在第一表面上的直径范围在60～100um左右。另一种方式时，光斑直径较小时，激光束在介质层171上画圈扫描，光斑聚焦点在不断变化，聚焦焦点深度也在不断变化，自介质层171下表面向介质层171上表面画螺旋线，且螺旋半径自下而上依次减小，介质层171被激光切割成圆台形，因重力作用而掉落下去，连接过孔171a因此形成，该孔的形状为圆台形。连接过孔171a在第二表面上的直径范围在100～1000um左右，连接过孔171a在第一表面上的直径范围在150～1500um左右。
S172、在完成步骤S171之后，对介质层171进行清洗，将连接过孔171a的内壁以及连接过孔171a外边缘附近的残渣、碎屑(图17中所示17b)等洗净去除。
在一些示例中，步骤S172具体可以包括：将介质层171放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层171从水槽中取出，使用空气风刀吹干。
S173、在完成步骤S172之后，在形成有连接过孔171a的介质层171的第一表面和第二表面上形成化学镀媒质1720。
在一些示例中，步骤S173具体可以包括：采用喷淋方式或者直接将介质层171放入含有化学镀媒质1720溶液的水槽内，使介质层171表面吸附一层Sn 2+。其中，化学镀媒质1720溶液主要成分是SnCl 2 10～30g/L、浓盐酸(38％浓度)20～60ml/L、去离子水，为防止Sn 2+氧化加入少量Sn粒。然后，喷淋或直接将介质层171放入含有活化液的水槽内，介质层171表面的与活化液发生反应(活化液主要成分SnCl 2 80～120g/L、浓盐酸300～500ml/L、Na 2SnO 3 10～20g/L、PdCl 2 1～4g/L、去离子水)，产生金属钯微粒并紧密附着于介质层171表面，也即在形成有连接过孔171a的介质层171的第一表面和第二表面上形成化学镀媒质1720。
S174、在完成步骤S173之后，对形成有化学镀媒质1720的介质层171进行化学镀，形成位于介质层171的第一表面、第二表面，以及连接过孔171a内的金属薄膜，并对形成在介质层171的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极17201和第二引出电极17202，以及位于连接过孔171a内的连接电极17203。
在一些示例中，化学镀金属薄膜可以为单层金属薄膜，也可以为叠层设置的金属薄膜。例如：仅单独镀Cu金属薄膜(厚度在1～100um左右)。当然，也可以先镀Ni金属薄膜(厚度在10～100nm左右)，再镀Cu金属薄膜厚度在1～100um左右)，其中镀Ni金属薄膜作用是为了增加Cu金属薄膜的附着力。在本公开实施例中，仅以镀单层金属薄膜的材料为Cu，叠层金属薄膜时采用Ni/Cu为例，但这并不构成对本公开实施例保护范围的限制。以下以化学镀Ni/Cu金属薄膜为例进行说明。
在一些示例中，步骤S174具体可以包括：将介质层171放入化学镀液中，依次进行金属Ni和Cu的化学镀。之后，并对形成在介质层171的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极17201和第二引出电极17202，以及位于连接过孔171a内的连接电极17203。其中，化学镀Ni溶液的一般成分为NiSO4·6H2O 10～30g/L、NaH2PO4·2H2O 20～40g/L、 柠檬酸钠5～15g/L、NH4Cl 20～40g/L，溶液为碱性，PH范围8.0～10.0，温度区间75～90℃。化学镀Cu溶液的一般成分为KNaC4H4O6 30～50g/L、NaOH8～10g/L、Na2CO3 38～40g/L、CuSO4 10～20g/L、NiCl2 2～6g/L、浓度35％的甲醛40～60ml/L，溶液为碱性，PH范围11.0～14.0，温度区间55～65℃。
示例18：
图18为本公开实施例的导电过孔的制备方法的示例18的流程图；如图18所示，该制备方法具体包括如下步骤：
S181、提供一介质层181，该介质层181的材质包括但不限于glass，Si，SOI中的任意一种，对介质层181进行激光打孔，形成具有连接过孔181a的介质层181。
在一些示例中，步骤S181具体可以包括：使用激光器以激光束垂直入射的方式打到介质层181表面(第一表面或者第二表面)，激光束与介质层181相互作用时，因激光光子能量较高将组成介质层181的原子电离化并抛射出介质层181表面，随时间增加打的孔逐渐加深，直至打穿整个介质层181，也即形成连接过孔181a。其中，连接过孔181a的倾角范围0°～5°左右，例如：连接过孔181a的倾角为5°。一般可选用的激光波长为532nm、355nm、266nm、248nm、197nm等，激光的脉冲宽度可选1～100fs、1～100ps、1～100ns等，激光器的类型可选连续激光器、脉冲激光器等。激光打孔的方式有，光斑直径较大时，激光束和介质层181的相对位置固定，依靠高能量直接把介质层181打穿，连接过孔181a的形状是倒圆台，直径自上而下依次减小。连接过孔181a在第二表面上的直径范围在80～120um左右，连接过孔181a在第一表面上的直径范围在60～100um左右。另一种方式时，光斑直径较小时，激光束在介质层181上画圈扫描，光斑聚焦点在不断变化，聚焦焦点深度也在不断变化，自介质层181下表面向介质层181上表面画螺旋线，且螺旋半径自下而上依次减小，介质层181被激光切割成圆台形，因重力作用而掉落下去，连接过孔181a因此形成，该孔的形状为圆台形。连 接过孔181a在第二表面上的直径范围在100～1000um左右，连接过孔181a在第一表面上的直径范围在150～1500um左右。
S182、在完成步骤S181之后，对介质层181进行清洗，将连接过孔181a的内壁以及连接过孔181a外边缘附近的残渣、碎屑(图18中所示18b)等洗净去除。
在一些示例中，步骤S182具体可以包括：将介质层181放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层181浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层181上连接过孔181a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层181彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔181a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷，利于高质量种子层生长和金属填孔及金属加厚。
S183、在完成步骤S182之后，在形成有连接过孔181a的介质层181的第一表面和第二表面上形成化学镀媒质。
在一些示例中，步骤S173具体可以包括：采用喷淋方式或者直接将介质层181放入含有化学镀媒质溶液的水槽内，使介质层181表面吸附一层Sn 2+。其中，化学镀媒质溶液主要成分是SnCl 2 10～30g/L、浓盐酸(38％浓度)20～60ml/L、去离子水，为防止Sn 2+氧化加入少量Sn粒。然后，喷淋或直接将介质层181放入含有活化液的水槽内，介质层181表面的与活化液发生反应(活化液主要成分SnCl 2 80～120g/L、浓盐酸300～500ml/L、Na 2SnO 310～20g/L、PdCl 2 1～4g/L、去离子水)，产生金属钯微粒并紧密附着于介质层181表面，也即在形成有连接过孔181a的介质层181的第一表面和第二表面上形成化学镀媒质。
S184、在完成步骤S183之后，对形成有化学镀媒质的介质层181进行 化学镀，形成位于介质层181的第一表面、第二表面，以及连接过孔181a内的金属薄膜，并对形成在介质层181的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极18201和第二引出电极18202，以及位于连接过孔181a内的连接电极18203。
在一些示例中，化学镀金属薄膜可以为单层金属薄膜，也可以为叠层设置的金属薄膜。例如：仅单独镀Cu金属薄膜(厚度在1～100um左右)。当然，也可以先镀Ni金属薄膜(厚度在10～100nm左右)，再镀Cu金属薄膜厚度在1～100um左右)，其中镀Ni金属薄膜作用是为了增加Cu金属薄膜的附着力。在本公开实施例中，仅以镀单层金属薄膜的材料为Cu，叠层金属薄膜时采用Ni/Cu为例，但这并不构成对本公开实施例保护范围的限制。以下以化学镀Ni/Cu金属薄膜为例进行说明。
在一些示例中，步骤S184具体可以包括：将介质层181放入化学镀液中，依次进行金属Ni和Cu的化学镀。之后，并对形成在介质层181的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极18201和第二引出电极18202，以及位于连接过孔181a内的连接电极18203。其中，化学镀Ni溶液的一般成分为NiSO4·6H2O 10～30g/L、NaH2PO4·2H2O 20～40g/L、柠檬酸钠5～15g/L、NH4Cl 20～40g/L，溶液为碱性，PH范围8.0～10.0，温度区间75～90℃。化学镀Cu溶液的一般成分为KNaC4H4O6 30～50g/L、NaOH8～10g/L、Na2CO3 38～40g/L、CuSO4 10～20g/L、NiCl2 2～6g/L、浓度35％的甲醛40～60ml/L，溶液为碱性，PH范围11.0～14.0，温度区间55～65℃。
示例19：
图19a为本公开实施例的导电过孔的制备方法的示例19的一种流程图；图19b为本公开实施例的导电过孔的制备方法的示例19的另一种流程图；如图19a和19b所示，该制备方法具体包括如下步骤：
S191、提供一介质层191，并通过构图工艺形成贯穿介质层191的连接过孔191a。
在一些示例中，步骤S191具体可以包括：采用刻蚀的方法在介质层191上制备连接过孔191a，刻蚀有湿法刻蚀和干法刻蚀2种类型，通过合理选择刻蚀类型、刻蚀液配方或刻蚀气体配比、刻蚀时间长短、温度等，可实现介质层191上的连接过孔191a的制备。以下分别对采用湿法或者干法刻蚀形成贯穿介质层191的连接过孔191a进行说明。
在一个示例中，对于晶体取向(100)取向的硅衬底作为介质层191，先通过光刻工艺制备形成在介质层191的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用湿法刻蚀将介质层191置于90℃的四甲基氢氧化铵水溶液中进行刻蚀，随时间增加孔的深度增加，直至介质层191被刻穿，将掩膜层100去除，也即形成连接过孔191a，该连接过孔191a的倾角范围0°～45°左右，例如：连接过孔191a的倾角为15°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层191，湿法刻蚀条件为25℃，40％NF4F溶液：49％HF溶液＝4.8～5.2:1。
在另一个示例中，对于晶体取向(100)取向的硅衬底作为介质层191，先通过光刻工艺制备形成在介质层191的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用干法刻蚀将介质层191置于反应离子刻蚀机或感应耦合等离子体刻蚀机的真空腔中，气压40～60Pa，Cl2气和He气比例为3～6:10，介质层191加热至40℃，随时间增加孔的深度增加，直至刻穿，将掩膜层100去除，也即形成连接过孔191a。该连接过孔191a的倾角范围0°～5°左右，例如：连接过孔191a的倾角为5°。。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层191，干法刻蚀条件为25℃，气压250～450Pa，CF4：CHF3：He＝80～100:25～35：110～130。
S192、在完成步骤S191之后，对介质层191进行清洗，将连接过孔191a的内壁以及连接过孔191a外边缘附近的残渣、碎屑等洗净去除。
在一些示例中，步骤S192具体可以包括：将介质层191放入水槽内， 水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层191从水槽中取出，使用空气风刀吹干。
S193、在完成步骤S192之后，在介质层191的连接过孔191a内，以及第一表面和第二表面上形成金属薄膜1920，作为种子层。
在一些示例中，步骤S193具体可以包括：采用包括但不限于磁控溅射的方式在介质层191的第一表面和第二表面，整面淀积导电良好的金属薄膜1920，作为种子层。形成金属薄膜1920的方式除了磁控溅射外，还可以采用电子束蒸发、热蒸发、脉冲激光溅射等方式。
在一些示例中，为增加金属薄膜与介质层191的粘附力一般采用叠层金属。也即，金属薄膜包括沿背离介质层191方向依次设置的第一子金属膜层和第二子金属膜层。其中，第一子金属膜层的材料包括但不限于钛(Ti)、钼(Mo)、镍(Ni)中的任意一种，第二子金属膜层的材料包括但不限于铜(Cu)、银(Ag)或者金(Au)中的任意一种。例如：金属薄膜包括：Ti/Cu、Mo/Cu、Ni/Cu、Ti/Ag、Mo/Ag、Ni/Ag中的任意一种。在本公开实施例中第一子金属膜层的厚度范围在1nm～100nm左右；第二子金属膜层的厚度范围在50nm～1000nm左右。另外，连接过孔191a内壁的金属薄膜的厚度为在1nm～200nm左右。
S194、在完成步骤S193之后，通过电镀工艺，对连接过孔191a进行填孔，以及将形成在第一表面和第二表面上的金属薄膜1920增厚，以形成分别位于第一表面和第二表面的第一引出电极19201和第二引出电极19202，以及形成位于连接过孔191a内的连接电极19203。
在一些示例中，步骤S194具体可以包括：通过合理搭配不同类型的电镀液(如金属薄膜填连接过孔191a的配方和整面加厚的配方)，在电镀槽中先进行填孔电镀，使连接过孔191a的内壁上淀积金属薄膜1920(例如：金 属薄膜1920中的第一子金属膜层)，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，金属材料可将孔填满(膜厚等于0.5倍孔径)或者不填满仅孔内壁金属化(膜厚500nm～10um)，也即形成连接电极1203。再将介质层191移动至整面加厚配方电镀液的电镀槽内，分别进行第一表面和第二表面的金属薄膜1920加厚电镀，电镀金属为Cu、Ag或Au，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，增厚的金属薄膜1920a的厚度在500nm～500um左右。电镀完成后，一般会造成介质层191表面的起伏不平，影响之后的工艺流程，因此最后进行化学机械抛光工艺，使介质层191表面变平坦和光滑，形成第一引出电极19201和第二引出电极19202。
当然，在电镀完成之后，也可以对第一表面和第二表面上的增厚的金属薄膜1920a进行图案化，形成第一引出电极1201和第二引出电极19202。
示例20：
图20a为本公开实施例的导电过孔的制备方法的示例20的一种流程图；图20b为本公开实施例的导电过孔的制备方法的示例20的另一种流程图；如图20a和20b所示，该制备方法具体包括如下步骤：
S201、提供一介质层201，并通过构图工艺形成贯穿介质层201的连接过孔201a。
在一些示例中，步骤S191具体可以包括：采用刻蚀的方法在介质层201上制备连接过孔201a，刻蚀有湿法刻蚀和干法刻蚀2种类型，通过合理选择刻蚀类型、刻蚀液配方或刻蚀气体配比、刻蚀时间长短、温度等，可实现介质层201上的连接过孔201a的制备。以下分别对采用湿法或者干法刻蚀形成贯穿介质层201的连接过孔201a进行说明。
在一个示例中，对于晶体取向(100)取向的硅衬底作为介质层201，先通过光刻工艺制备形成在介质层201的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用湿法刻蚀将介质层201置于90℃的四甲基氢氧化铵水溶液中进行刻蚀，随时间增加孔的深度增加， 直至介质层201被刻穿，将掩膜层100去除，也即形成连接过孔201a，该连接过孔201a的倾角范围0°～45°左右，例如：连接过孔201a的倾角为15°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层201，湿法刻蚀条件为25℃，40％NF4F溶液：49％HF溶液＝4.8～5.2:1。
在另一个示例中，对于晶体取向(100)取向的硅衬底作为介质层201，先通过光刻工艺制备形成在介质层201的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用干法刻蚀将介质层201置于反应离子刻蚀机或感应耦合等离子体刻蚀机的真空腔中，气压40～60Pa，Cl2气和He气比例为3～6:10，介质层201加热至40℃，随时间增加孔的深度增加，直至刻穿，将掩膜层100去除，也即形成连接过孔201a，该连接过孔201a的倾角范围0°～5°左右，例如：连接过孔201a的倾角为5°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层201，干法刻蚀条件为25℃，气压250～450Pa，CF4：CHF3：He＝80～100:25～35：110～130。
S202、在完成步骤S201之后，对介质层201进行清洗，将连接过孔201a的内壁以及连接过孔201a外边缘附近的残渣、碎屑(图20a和图20b中所示的201b)等洗净去除。
在一些示例中，步骤S202具体可以包括：将介质层201放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层201浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层201上连接过孔201a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层201彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔201a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷， 利于高质量种子层生长和金属填孔及金属加厚。
S203、在完成步骤S202之后，在介质层201的连接过孔201a内，以及第一表面和第二表面上形成金属薄膜2020，作为种子层。
在一些示例中，步骤S203具体可以包括：采用包括但不限于磁控溅射的方式在介质层11的第一表面和第二表面，整面淀积导电良好的金属薄膜2020，作为种子层。形成金属薄膜2020的方式除了磁控溅射外，还可以采用电子束蒸发、热蒸发、脉冲激光溅射等方式。
在一些示例中，为增加金属薄膜与介质层201的粘附力一般采用叠层金属。也即，金属薄膜包括沿背离介质层201方向依次设置的第一子金属膜层和第二子金属膜层。其中，第一子金属膜层的材料包括但不限于钛(Ti)、钼(Mo)、镍(Ni)中的任意一种，第二子金属膜层的材料包括但不限于铜(Cu)、银(Ag)或者金(Au)中的任意一种。例如：金属薄膜包括：Ti/Cu、Mo/Cu、Ni/Cu、Ti/Ag、Mo/Ag、Ni/Ag中的任意一种。在本公开实施例中第一子金属膜层的厚度范围在1nm～100nm左右；第二子金属膜层的厚度范围在50nm～1000nm左右。另外，连接过孔201a内壁的金属薄膜的厚度为在1nm～200nm左右。
S204、在完成步骤S203之后，通过电镀工艺，对连接过孔201a进行填孔，以及将形成在第一表面和第二表面上的金属薄膜2020增厚，以形成分别位于第一表面和第二表面的第一引出电极20201和第二引出电极20202，以及形成位于连接过孔201a内的连接电极20203。
在一些示例中，步骤S14具体可以包括：通过合理搭配不同类型的电镀液(如金属薄膜填连接过孔201a的配方和整面加厚的配方)，在电镀槽中先进行填孔电镀，使连接过孔201a的内壁上淀积金属薄膜2020(例如：金属薄膜2020中的第一子金属膜层)，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，金属材料可将孔填满(膜厚等于0.5倍孔径)或者不填满仅孔内壁金属化(膜厚500nm～10um)，也即形成连接电极20203。再将介质层11移动至整面加厚配方电镀液的电镀槽内，分别进行第一表面和第二表面的 金属薄膜2020加厚电镀，电镀金属为Cu、Ag或Au，电镀速率为0.5um/分钟～5um/分钟，随电镀时间长短，增厚的金属薄膜2020a的厚度在500nm～500um左右。电镀完成后，一般会造成介质层201表面的起伏不平，影响之后的工艺流程，因此最后进行化学机械抛光工艺，使介质层201表面变平坦和光滑，形成第一引出电极20201和第二引出电极20202。
当然，在电镀完成之后，也可以对第一表面和第二表面上的增厚的金属薄膜120a进行图案化，形成第一引出电极20201和第二引出电极20202。
示例21：
图21a为本公开实施例的导电过孔的制备方法的示例21的一种流程图；图21b为本公开实施例的导电过孔的制备方法的示例21的另一种流程图；如图21a和21b所示，该制备方法具体包括如下步骤：
S211、提供一介质层211，并通过构图工艺形成贯穿介质层211的连接过孔211a。
在一些示例中，步骤S211具体可以包括：采用刻蚀的方法在介质层211上制备连接过孔211a，刻蚀有湿法刻蚀和干法刻蚀2种类型，通过合理选择刻蚀类型、刻蚀液配方或刻蚀气体配比、刻蚀时间长短、温度等，可实现介质层211上的连接过孔211a的制备。以下分别对采用湿法或者干法刻蚀形成贯穿介质层211的连接过孔211a进行说明。
在一个示例中，对于晶体取向(100)取向的硅衬底作为介质层211，先通过光刻工艺制备形成在介质层211的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用湿法刻蚀将介质层211置于90℃的四甲基氢氧化铵水溶液中进行刻蚀，随时间增加孔的深度增加，直至介质层211被刻穿，将掩膜层100去除，也即形成连接过孔211a，该连接过孔211a的倾角范围0°～45°左右，例如：连接过孔211a的倾角为15°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层 211，湿法刻蚀条件为25℃，40％NF4F溶液：49％HF溶液＝4.8～5.2:1。
在另一个示例中，对于晶体取向(100)取向的硅衬底作为介质层211，先通过光刻工艺制备形成在介质层211的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用干法刻蚀将介质层211置于反应离子刻蚀机或感应耦合等离子体刻蚀机的真空腔中，气压40～60Pa，Cl2气和He气比例为3～6:10，介质层211加热至40℃，随时间增加孔的深度增加，直至刻穿，将掩膜层100去除，也即形成连接过孔211a，该连接过孔211a的倾角范围0°～5°左右，例如：连接过孔211a的倾角为5°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层211，干法刻蚀条件为25℃，气压250～450Pa，CF4：CHF3：He＝80～100:25～35：110～130。
S212、在完成步骤S211之后，对介质层211进行清洗，将连接过孔211a的内壁以及连接过孔211a外边缘附近的残渣、碎屑(图21a和图21b中所示的211b)等洗净去除。
在一些示例中，步骤S212具体可以包括：将介质层211放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层211从水槽中取出，使用空气风刀吹干。
S213、在完成步骤S212之后，将金属膏2120挤入介质层211的连接过孔211a内，并在介质层211的第一表面和第二表面上形成金属膏2120，之后对分别第一表面和第二表面的金属膏2120进行固化，形成填充在连接过孔211a内的连接电极21203，以及位于第一表面的第一引出电极21201和位于第二表面的第二引出电极21202。
在一些示例中，金属膏2120可以为导电浆，导电浆的材料包括但不限 于低温固化型的聚合物导电浆料，主要成分为导电颗粒、树脂、固化剂、分散剂、稀释剂、附着力增强剂和防沉降剂。其中，导电颗粒可选Cu、Ag、Au，粒径范围在1nm～100um左右。树脂可选双酚环氧树脂，固化剂可选酸酐类物质，分散剂可选甲基咪唑，稀释剂可选乙酸丁酯，附着力增强剂可选钛酸四乙脂，防沉降剂可选聚酰胺类物质。
步骤S213具体可以包括：首先将导电浆料涂布在连接过孔211a内和第二表面的孔边缘周围，然后对介质层211的第二表面侧进行溶剂烘干和热固化，形成填充在连接过孔211a内的连接电极21203，以及位于第二表面上的第二引出电极21202；之后在介质层211的第一表面的孔边缘周围涂布导电浆料，然后对介质层211的第一表面侧进行溶剂烘干和热固化，形成位于第一表面上的第一引出电极21201。其中，导电浆料优选涂布方式包括但不限于丝网印刷、喷墨打印、slit涂布等方式，在涂布时配合使用真空吸附机台可提高涂布效率，改善导电浆料在孔壁和孔边缘的分布剖面。溶剂烘干可在空气常压、N2常压、真空下进行，温度范围在40℃～95℃左右，时间在1分钟～30分钟左右。热固化可在烘箱中进行，气氛为N2，加热温度在140℃～200℃左右；或者也可使用激光束照射固化，激光波长范围在500nm～1510nm左右，激光束功率范围在50mW～50W左右，光束直径范围在10um～2000um左右，激光束可以是单光束也可以是多光束。
示例22：
图22a为本公开实施例的导电过孔的制备方法的示例22的一种流程图；图22b为本公开实施例的导电过孔的制备方法的示例22的另一种流程图；如图22a和22b所示，该制备方法具体包括如下步骤：
S221、提供一介质层221，并通过构图工艺形成贯穿介质层221的连接过孔221a。
在一些示例中，步骤S221具体可以包括：采用刻蚀的方法在介质层221上制备连接过孔221a，刻蚀有湿法刻蚀和干法刻蚀2种类型，通过合理选择 刻蚀类型、刻蚀液配方或刻蚀气体配比、刻蚀时间长短、温度等，可实现介质层221上的连接过孔221a的制备。以下分别对采用湿法或者干法刻蚀形成贯穿介质层221的连接过孔221a进行说明。
在一个示例中，对于晶体取向(100)取向的硅衬底作为介质层221，先通过光刻工艺制备形成在介质层221的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用湿法刻蚀将介质层221置于90℃的四甲基氢氧化铵水溶液中进行刻蚀，随时间增加孔的深度增加，直至介质层221被刻穿，将掩膜层100去除，也即形成连接过孔221a，该连接过孔221a的倾角范围0°～45°左右，例如：连接过孔221a的倾角为15°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层221，湿法刻蚀条件为25℃，40％NF4F溶液：49％HF溶液＝4.8～5.2:1。
在另一个示例中，对于晶体取向(100)取向的硅衬底作为介质层221，先通过光刻工艺制备形成在介质层221的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用干法刻蚀将介质层221置于反应离子刻蚀机或感应耦合等离子体刻蚀机的真空腔中，气压40～60Pa，Cl2气和He气比例为3～6:10，介质层221加热至40℃，随时间增加孔的深度增加，直至刻穿，将掩膜层100去除，也即形成连接过孔221a，该连接过孔221a的倾角范围0°～5°左右，例如：连接过孔221a的倾角为5°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层221，干法刻蚀条件为25℃，气压250～450Pa，CF4：CHF3：He＝80～100:25～35：110～130。
S222、在完成步骤S221之后，对介质层221进行清洗，将连接过孔221a的内壁以及连接过孔221a外边缘附近的残渣、碎屑(图22a和图22b中所示的221b)等洗净去除。
在一些示例中，步骤S222具体可以包括：将介质层221放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层221浸入含有氢氟酸的溶液中进 行化学腐蚀，可将glass、Si、SOI介质层221上连接过孔221a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层221彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔221a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷。
S223、在完成步骤S222之后，将金属膏2220挤入介质层221的连接过孔221a内，并在介质层221的第一表面和第二表面上形成金属膏2220，之后对分别第一表面和第二表面的金属膏2220进行固化，形成填充在连接过孔221a内的连接电极22203，以及位于第一表面的第一引出电极22201和位于第二表面的第二引出电极22202。
在一些示例中，金属膏2220可以为导电浆，导电浆的材料包括但不限于低温固化型的聚合物导电浆料，主要成分为导电颗粒、树脂、固化剂、分散剂、稀释剂、附着力增强剂和防沉降剂。其中，导电颗粒可选Cu、Ag、Au，粒径范围在1nm～100um左右。树脂可选双酚环氧树脂，固化剂可选酸酐类物质，分散剂可选甲基咪唑，稀释剂可选乙酸丁酯，附着力增强剂可选钛酸四乙脂，防沉降剂可选聚酰胺类物质。
步骤S223具体可以包括：首先将导电浆料涂布在连接过孔221a内和第二表面的孔边缘周围，然后对介质层221的第二表面侧进行溶剂烘干和热固化，形成填充在连接过孔221a内的连接电极22203，以及位于第二表面上的第二引出电极22202；之后在介质层221的第一表面的孔边缘周围涂布导电浆料，然后对介质层221的第一表面侧进行溶剂烘干和热固化，形成位于第一表面上的第一引出电极22201。其中，导电浆料优选涂布方式包括但不限于丝网印刷、喷墨打印、slit涂布等方式，在涂布时配合使用真空吸附机台可提高涂布效率，改善导电浆料在孔壁和孔边缘的分布剖面。溶剂烘干可在空气常压、N2常压、真空下进行，温度范围在40℃～95℃左右，时间在1分钟～30分钟左右。热固化可在烘箱中进行，气氛为N2，加热温度在140℃ ～200℃左右；或者也可使用激光束照射固化，激光波长范围在500nm～1510nm左右，激光束功率范围在50mW～50W左右，光束直径范围在10um～2000um左右，激光束可以是单光束也可以是多光束。
示例23：
图23a为本公开实施例的导电过孔的制备方法的示例23的一种流程图；图23b为本公开实施例的导电过孔的制备方法的示例23的另一种流程图；如图23a和23b所示，该制备方法具体包括如下步骤：
S231、提供一介质层231，并通过构图工艺形成贯穿介质层231的连接过孔231a。
在一些示例中，步骤S231具体可以包括：采用刻蚀的方法在介质层231上制备连接过孔231a，刻蚀有湿法刻蚀和干法刻蚀2种类型，通过合理选择刻蚀类型、刻蚀液配方或刻蚀气体配比、刻蚀时间长短、温度等，可实现介质层231上的连接过孔231a的制备。以下分别对采用湿法或者干法刻蚀形成贯穿介质层231的连接过孔231a进行说明。
在一个示例中，对于晶体取向(100)取向的硅衬底作为介质层231，先通过光刻工艺制备形成在介质层231的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用湿法刻蚀将介质层231置于90℃的四甲基氢氧化铵水溶液中进行刻蚀，随时间增加孔的深度增加，直至介质层231被刻穿，将掩膜层100去除，也即形成连接过孔231a，该连接过孔231a的倾角范围0°～45°左右，例如：连接过孔231a的倾角为15°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层231，湿法刻蚀条件为25℃，40％NF4F溶液：49％HF溶液＝4.8～5.2:1。
在另一个示例中，对于晶体取向(100)取向的硅衬底作为介质层231，先通过光刻工艺制备形成在介质层231的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用干法刻蚀将介质层231置 于反应离子刻蚀机或感应耦合等离子体刻蚀机的真空腔中，气压40～60Pa，Cl2气和He气比例为3～6:10，介质层231加热至40℃，随时间增加孔的深度增加，直至刻穿，将掩膜层100去除，也即形成连接过孔231a，该连接过孔231a的倾角范围0°～5°左右，例如：连接过孔231a的倾角为5°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层231，干法刻蚀条件为25℃，气压250～450Pa，CF4：CHF3：He＝80～100:25～35：110～130。
S232、在完成步骤S231之后，对介质层231进行清洗，将连接过孔231a的内壁以及连接过孔231a外边缘附近的残渣、碎屑(图23a和图23b中所示的231b)等洗净去除。
在一些示例中，步骤S232具体可以包括：将介质层231放入水槽内，水槽内盛纯去离子水或去离子水搭配适量清洗剂(如油基清洗剂或水基清洗剂)，水温在35℃～70℃左右，用超声波(频率范围在10kHz～10MHz左右)使水产生空化作用、加速作用及直进流作用使污染物层被分散、乳化、剥离而达到清洁目的，清洗时间在2分钟～20分钟左右，最后纯去离子水冲洗后将介质层231从水槽中取出，使用空气风刀吹干。
S233、在完成步骤S232之后，在形成有连接过孔231a的介质层231的第一表面和第二表面上形成化学镀媒质2320。
在一些示例中，步骤S233具体可以包括：采用喷淋方式或者直接将介质层231放入含有化学镀媒质2320溶液的水槽内，使介质层231表面吸附一层Sn 2+。其中，化学镀媒质2320溶液主要成分是SnCl 2 10～30g/L、浓盐酸(38％浓度)20～60ml/L、去离子水，为防止Sn 2+氧化加入少量Sn粒。然后，喷淋或直接将介质层231放入含有活化液的水槽内，介质层231表面的与活化液发生反应(活化液主要成分SnCl 2 80～120g/L、浓盐酸300～500ml/L、Na 2SnO 3 10～20g/L、PdCl 2 1～4g/L、去离子水)，产生金属钯微粒并紧密附着于介质层231表面，也即在形成有连接过孔231a的介质层231的第一表面和第二表面上形成化学镀媒质2320。
S234、在完成步骤S233之后，对形成有化学镀媒质2320的介质层231进行化学镀，形成位于介质层231的第一表面、第二表面，以及连接过孔231a内的金属薄膜，并对形成在介质层231的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极23201和第二引出电极23202，以及位于连接过孔231a内的连接电极23203。
在一些示例中，化学镀金属薄膜可以为单层金属薄膜，也可以为叠层设置的金属薄膜。例如：仅单独镀Cu金属薄膜(厚度在1～100um左右)。当然，也可以先镀Ni金属薄膜(厚度在10～100nm左右)，再镀Cu金属薄膜厚度在1～100um左右)，其中镀Ni金属薄膜作用是为了增加Cu金属薄膜的附着力。在本公开实施例中，仅以镀单层金属薄膜的材料为Cu，叠层金属薄膜时采用Ni/Cu为例，但这并不构成对本公开实施例保护范围的限制。以下以化学镀Ni/Cu金属薄膜为例进行说明。
在一些示例中，步骤S234具体可以包括：将介质层231放入化学镀液中，依次进行金属Ni和Cu的化学镀。之后，并对形成在介质层231的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极23201和第二引出电极23202，以及位于连接过孔231a内的连接电极23203。其中，化学镀Ni溶液的一般成分为NiSO4·6H2O 10～30g/L、NaH2PO4·2H2O 20～40g/L、柠檬酸钠5～15g/L、NH4Cl 20～40g/L，溶液为碱性，PH范围8.0～10.0，温度区间75～90℃。化学镀Cu溶液的一般成分为KNaC4H4O6 30～50g/L、NaOH8～10g/L、Na2CO3 38～40g/L、CuSO4 10～20g/L、NiCl2 2～6g/L、浓度35％的甲醛40～60ml/L，溶液为碱性，PH范围11.0～14.0，温度区间55～65℃。
示例24：
图24a为本公开实施例的导电过孔的制备方法的示例24的一种流程图；图24b为本公开实施例的导电过孔的制备方法的示例24的另一种流程图；如图24a和24b所示，该制备方法具体包括如下步骤：
S241、提供一介质层241，并通过构图工艺形成贯穿介质层241的连接 过孔241a。
在一些示例中，步骤S241具体可以包括：采用刻蚀的方法在介质层241上制备连接过孔241a，刻蚀有湿法刻蚀和干法刻蚀2种类型，通过合理选择刻蚀类型、刻蚀液配方或刻蚀气体配比、刻蚀时间长短、温度等，可实现介质层241上的连接过孔241a的制备。以下分别对采用湿法或者干法刻蚀形成贯穿介质层241的连接过孔241a进行说明。
在一个示例中，对于晶体取向(100)取向的硅衬底作为介质层241，先通过光刻工艺制备形成在介质层241的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用湿法刻蚀将介质层241置于90℃的四甲基氢氧化铵水溶液中进行刻蚀，随时间增加孔的深度增加，直至介质层241被刻穿，将掩膜层100去除，也即形成连接过孔241a，该连接过孔241a的倾角范围0°～45°左右，例如：连接过孔241a的倾角为15°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层241，湿法刻蚀条件为25℃，40％NF4F溶液：49％HF溶液＝4.8～5.2:1。
在另一个示例中，对于晶体取向(100)取向的硅衬底作为介质层241，先通过光刻工艺制备形成在介质层241的第一表面上的掩膜层100(例如：光刻胶或二氧化硅薄膜形成的掩膜层100)，采用干法刻蚀将介质层241置于反应离子刻蚀机或感应耦合等离子体刻蚀机的真空腔中，气压40～60Pa，Cl2气和He气比例为3～6:10，介质层241加热至40℃，随时间增加孔的深度增加，直至刻穿，将掩膜层100去除，也即形成连接过孔241a，该连接过孔241a的倾角范围0°～5°左右，例如：连接过孔241a的倾角为5°。其中，采用光刻胶做掩膜层100时，使用丙酮超声清洗去胶；采用二氧化硅薄膜做掩膜层100时，使用稀氢氟酸将其刻蚀掉。另外，若采用玻璃作为介质层241，干法刻蚀条件为25℃，气压250～450Pa，CF4：CHF3：He＝80～100:25～35：110～130。
S242、在完成步骤S241之后，对介质层241进行清洗，将连接过孔241a的内壁以及连接过孔241a外边缘附近的残渣、碎屑(图24a和图24b中所 示的241b)等洗净去除。
在一些示例中，步骤S242具体可以包括：将介质层241放入水槽内，先进行超声清洗去掉表面浮尘，然后介质层241浸入含有氢氟酸的溶液中进行化学腐蚀，可将glass、Si、SOI介质层241上连接过孔241a附近包含孔壁内的微裂纹区Q1、应力集中区Q2域等缺陷用化学腐蚀彻底去除。溶液中HF的含量范围在1％～20％左右，溶液中可以含有NH 4F，也可以不含NH 4F。当含有NH 4F时，NH 4F的含量范围在10％～40％左右，溶液温度范围在35℃～60℃左右，化学腐蚀时间在30秒～5分钟左右，然后用纯去离子水将介质层241彻底冲洗，最后使用空气风刀吹干。经过化学腐蚀过后的连接过孔241a，内壁和表面光滑、且不含有微裂纹区Q1、应力集中区Q2域等缺陷。
S243、在完成步骤S242之后，在形成有连接过孔241a的介质层241的第一表面和第二表面上形成化学镀媒质2420。
在一些示例中，步骤S233具体可以包括：采用喷淋方式或者直接将介质层241放入含有化学镀媒质2420溶液的水槽内，使介质层241表面吸附一层Sn 2+。其中，化学镀媒质2420溶液主要成分是SnCl 2 10～30g/L、浓盐酸(38％浓度)20～60ml/L、去离子水，为防止Sn 2+氧化加入少量Sn粒。然后，喷淋或直接将介质层241放入含有活化液的水槽内，介质层241表面的与活化液发生反应(活化液主要成分SnCl 2 80～120g/L、浓盐酸300～500ml/L、Na 2SnO 3 10～20g/L、PdCl 2 1～4g/L、去离子水)，产生金属钯微粒并紧密附着于介质层241表面，也即在形成有连接过孔241a的介质层241的第一表面和第二表面上形成化学镀媒质2420。
S244、在完成步骤S243之后，对形成有化学镀媒质2420的介质层241进行化学镀，形成位于介质层241的第一表面、第二表面，以及连接过孔241a内的金属薄膜，并对形成在介质层241的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极24201和第二引出电极24202，以及位于连接过孔241a内的连接电极24203。
在一些示例中，化学镀金属薄膜可以为单层金属薄膜，也可以为叠层设 置的金属薄膜。例如：仅单独镀Cu金属薄膜(厚度在1～100um左右)。当然，也可以先镀Ni金属薄膜(厚度在10～100nm左右)，再镀Cu金属薄膜厚度在1～100um左右)，其中镀Ni金属薄膜作用是为了增加Cu金属薄膜的附着力。在本公开实施例中，仅以镀单层金属薄膜的材料为Cu，叠层金属薄膜时采用Ni/Cu为例，但这并不构成对本公开实施例保护范围的限制。以下以化学镀Ni/Cu金属薄膜为例进行说明。
在一些示例中，步骤S244具体可以包括：将介质层241放入化学镀液中，依次进行金属Ni和Cu的化学镀。之后，并对形成在介质层241的第一表面和第二表面上的金属薄膜进行图案化，形成第一引出电极24201和第二引出电极24202，以及位于连接过孔241a内的连接电极24203。其中，化学镀Ni溶液的一般成分为NiSO4·6H2O 10～30g/L、NaH2PO4·2H2O 20～40g/L、柠檬酸钠5～15g/L、NH4Cl 20～40g/L，溶液为碱性，PH范围8.0～10.0，温度区间75～90℃。化学镀Cu溶液的一般成分为KNaC4H4O6 30～50g/L、NaOH8～10g/L、Na2CO3 38～40g/L、CuSO4 10～20g/L、NiCl2 2～6g/L、浓度35％的甲醛40～60ml/L，溶液为碱性，PH范围11.0～14.0，温度区间55～65℃。
以上列举了24种形成导电过孔的制备方法的示例，但应当理解以上仅为示例性的说明，并不构成对本公开实施例保护范围的限制。
需要说明的是，以上提供介质层中形成导电过孔的制备方法，相应的，如图25所示，可以采用类似方法，在介质层中形成盲孔251a。盲孔251a与上述过孔的区别在于其并不贯穿介质层251，故仅需在介质层251的第一表面形成第一引出电极25201，在介质层的盲孔中形成连接电极25202即可。而对于，介质层上的盲孔251a、连接电极25202和第一引出电极25201的形成方法均可以采用上述类似的方法，例如通过形成金属薄膜2520通过电镀工艺形成连接电极25202和第一引出电极25201等，在此不再重复赘述。
第二方面，图26为本公开实施例的一种导电过孔的示意图；如图26所示，本公开实施例提供一种导电过孔，该导电过孔可以采用上述的任一方法制备。图26中以示例1所形成的导电过孔为例进行说明。该导电过孔包括介质层11、连接电极2203、第一引出电极2201和第二引出电极2201。其中， 介质层11具有在其厚度方向贯穿的连接过孔，且该介质层包括第一表面和第二表面，第一引出电极2201位于第一表面，第二引出电极2202位于第二表面，连接电极2203位于连接过孔，且至少覆盖连接过孔的内壁，并与第一引出电极2201和第二引出电极2202电连接。
本公开实施例中，介质层11、连接电极2203、第一引出电极2201和第二引出电极2202的材料均可以与上述实施例中相同，故在此不再赘述。本公开实施例中，导电过孔结构可应用于存储芯片、高亮度LED、射频电路中的高品质因数(Q值)电感器件及集成无源器件等方面，提高了集成度，降低了电阻。
需要说明的是，本公开实施例中的导电过孔可以采用上述的任一方法制备，故该导电过孔的介质层11、连接电极2203、第一引出电极2201和第二引出电极2202的材料和尺寸均可以采用上述相同的材料，另外，连接过孔的形状、尺寸也均可以与上述结构相同，故在此均不再赘述。
第三方面，本公开实施例提供一种无源器件，该无源器件包括上述的导电过孔。在一些示例中，该无源器件至少包括电感，当然还可以包括电容和电阻。在以下介绍中，以无源器件包括电感、电容和电阻为例进行描述。
图27为本公开实施例的无源器件的截面图；图28为图27中电感的俯视图；如图27和28所示，电感包括位于介质层11的第一表面的第一子结构2201a和位于第二表面的第二子结构2202b，以及将所述第一子结构2201a和所述第二子结构2202a依次串接的导电过孔110。参照图28，电感的各第一子结构2201a均沿第一方向延伸，且沿第二方向并排设置；电感的各第二子结构2202a均沿第三方向延伸，且沿第二方向并排设置。其中，第一方向、第二方向、第三方向均为不同的方向，在本公开实施例中，以第一方向和第二方向相互垂直，第一方向和第三方向相交且非垂直设置为例。当然，第一子结构2201a和第二子结构2202a的延伸方向也可以互换，均在本公开实施例的保护范围内。另外，在本公实施例中以电感包括N个第一子结构2201a和N-1个第二子结构2202a为例进行说明，其中，N≥2，且N为整数。第一子结构2201a的第一端和第二端分别与一个导电过孔110电连接，且一个 第一子结构2201a的第一端和第二端电连接不同的导电过孔110。也即一个第一子结构2201a与两个导电过孔110的第一引出电极连接。第二子结构2202a的第一端和第二端分别与一个导电过孔110电连接，且一个第二子结构2202a的第一端和第二端电连接不同的导电过孔110。也即一个第二子结构2202a与两个导电过孔110的第二引出电极连接。此时，电感的第i个第二子结构212第一端连接第i个第一子结构2201a的第一端和第i+1个第一子结构2201a的第二端，形成电感线圈201，其中，1≤i≤N-1，且i为整数。
在电感200的第二子结构2202a背离介质层11一侧设置有第一层间介质层30，在第一层间介质层30背离介质层11的一侧设置有第一焊盘501和第二焊盘。其中，在第一层间介质层30中设置有第二连接过孔和第三连接过孔，第一焊盘501通过第二连接过孔与电感线圈201的第一信号端电连接，第二焊盘通过第三连接过孔与电感线圈201的第二信号端202电连接。其中，第一焊盘501和第二焊盘配置为使得电感200器件与射频电路电连接。例如：电感200通过第一焊盘501和第二焊盘与PCB(印刷电路板)绑定连接，或者是通过焊接的方式与PCB实现电连接。电阻60可以设置在介质层11的第二表面，电阻60可以采用高阻材料，例如，例如氧化锡(ITO)、镍铬(NiCr)合金。在一些示例中，电容700的第一极板701可以与电感20的第二子结构2202a同层设置，第二极板702可以与第一焊盘501和第三焊盘503同层设置，这样一来，便于制备，且不会增加工艺步骤。
另外，在本公开实施例中，与第一焊盘501和第二焊盘同层设置的还可以有第三焊盘503、第四焊盘504、第五焊盘505和第六焊盘506，其中，第三焊盘通过贯穿第一层间介质层30的第四连接过孔与电阻60的第一端连接，第四焊盘54通过贯穿第一层间介质层30的第五连接过孔与电阻60的第二端连接，第五焊盘505通过贯穿第一层间介质层30的第六连接过孔与电容700的第一极板71连接，第六焊盘506则可以与电容70的第二极板702为一体结构。第三焊盘和第四焊盘504被配置为将电阻60与射频电路连接，第五焊盘505和第六焊盘506被配置将电容700与射频电路连接。应当理解是，若电容700、电阻60与基板上的器件进行电连接，此时也可以 无需通过焊盘进行连接。
在一些示例中，介质层包括但不限于玻璃、聚酰亚胺、聚对苯二甲酸乙二醇酯、环烯烃聚合物中的至少之一。
在一些示例中，在电感200的第一子结构2201a背离介质层11的一侧设置有第一保护层40，以防止第一子结构2201a因暴露而被氧化。其中，第一保护层40的材料为无机绝缘材料。例如：第一保护层40为由氮化硅(SiNx)形成的无机绝缘层，或者由氧化硅(SiO 2)形成的无机绝缘层，亦或者由SiNx无机绝缘层和SiO 2无机绝缘层的若干种叠层组合膜层。
本公开实施例中，本公开实施例中无源器件包括上述的导电过孔结构，通过该导电过孔结构可应用于存储芯片、高亮度LED、射频电路中的高品质因数(Q值)电感器件及集成无源器件等方面，提高了集成度，降低了电阻。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (27)

  1. 一种导电过孔的制备方法，其包括：
    提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔；所述介质层包括在其厚度方向上相对设置的第一表面和第二表面；
    在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极；其中，
    所述连接电极至少覆盖所述连接过孔的内壁，且所述第一引出电极和所述第二引出电极均与所述连接电极电连接。
  2. 根据权利要求1所述的导电过孔的制备方法，其中，所述提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔的步骤包括：
    提供一介质层，并在所述介质层上进行机械钻孔，形成在所述介质层厚度方向上贯穿的所述连接过孔。
  3. 根据权利要求2所述的导电过孔的制备方法，其中，所述机械钻孔所采用的钻头的材质包括：碳化钨、钨钴合金、钨钛钴合金、天然金刚石、人造金刚石中的任意一种。
  4. 根据权利要求1所述的导电过孔的制备方法，其中，所述提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔的步骤包括：
    提供一介质层，并在所述介质层上进行喷砂钻孔，形成在所述介质层的厚度方向上贯穿的所述连接过孔。
  5. 根据权利要求4所述的导电过孔的制备方法，其中，所述在所述介质层上进行喷砂钻孔，形成在所述介质层的厚度方向上贯穿的所述连接过孔的步骤包括：
    采用喷砂工艺，利用压缩空气为动力搭配固体磨料颗粒或者混合固体磨料颗粒的液体形成高速喷射束流，高速喷射到所述介质层的第一表面或者第二表面，形成在所述介质层厚度方向上贯穿的所述连接过孔。
  6. 根据权利要求5所述的导电过孔的制备方法，其中，所述固体磨料 颗粒包括金刚砂、刚玉、碳酸钙、石英砂中的至少一种。
  7. 根据权利要求1所述的导电过孔的制备方法，其中，所述提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔的步骤包括：
    提供一介质层，并在所述介质层上进行激光打孔，形成在所述介质层厚度方向上贯穿的所述连接过孔。
  8. 根据权利要求7所述的导电过孔的制备方法，其中，所述在所述介质层上进行激光打孔，形成在所述介质层厚度方向上贯穿的所述连接过孔的步骤包括：
    采用激光器以激光束垂直入射的方式打到介质层的第一表面或者第二表面，形成在所述介质层厚度方向上贯穿的所述连接过孔。
  9. 根据权利要求8所述的导电过孔的制备方法，其中，所述激光器为连续激光器或者脉冲激光器。
  10. 根据权利要求1所述的导电过孔的制备方法，其中，所述提供一介质层，并在所述介质层上形成在其厚度方向上贯穿的连接过孔的步骤包括：
    提供一介质层，并通过构图工艺形成在所述介质层厚度方向上贯穿的所述连接过孔。
  11. 根据权利要求10所述的导电过孔的制备方法，其中，所述通过构图工艺形成在所述介质层厚度方向上贯穿的所述连接过孔的步骤包括：
    在所述介质层上形成掩膜图案，采用干法或者湿法刻蚀形成在所述介质层厚度方向上贯穿的所述连接过孔。
  12. 根据权利要求1-11中任一项所述的导电过孔的制备方法，其中，所述在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极的步骤包括：
    在所述介质层的第一表面和第二表面形成金属薄膜，作为种子层；
    对所述种子层进行电镀，形成位于所述第一连接过孔内的连接电极；
    通过构图工艺形成位于所述第一表面上的第一引出电极和位于所述第 二表面上的第二引出电极。
  13. 根据权利要求12所述的导电过孔的制备方法，其中，所述在所述介质层的第一表面和第二表面形成金属薄膜的步骤包括：
    采用磁控溅射工艺在所述介质层的第一表面和第二表面形成金属薄膜。
  14. 根据权利要求1-11中任一项所述的导电过孔的制备方法，其中，所述在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极的步骤包括：
    在所述介质层的第一表面、第二表面和所述连接过孔内形成化学镀媒质；对形成所述化学镀媒质的介质层进行化学镀，形成位于所述连接过孔内的连接电极，以及位于所述第一表面上的第一引出电极和位于所述第二表面上的第二引出电极。
  15. 根据权利要求1-11中任一项所述的导电过孔的制备方法，其中，所述在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极的步骤包括：
    将导电浆料涂布在所述连接过孔、所述介质层的第一表面和第二表面，并进行溶剂烘干和热固化，形成位于所述连接过孔内的连接电极，以及位于所述第一表面上的第一引出电极和位于所述第二表面上的第二引出电极。
  16. 根据权利要求15所述的导电过孔的制备方法，其中，所述导电银浆包括低温固化型的聚合物导电银浆。
  17. 根据权利要求15所述的导电过孔的制备方法，其中，所述涂布的方式包括丝网印刷、喷墨打印、slit涂布中的任意一种。
  18. 根据权利要求1-17中任一项所述的导电过孔的制备方法，其中，所述在所述连接过孔内形成连接电极，在所述第一表面形成第一引出电极，在所述第二表面形成第二引出电极的步骤之前，还包括：
    对形成所述连接过孔的介质层进行清洗。
  19. 根据权利要求18所述的导电过孔的制备方法，其中，所述对形成 所述连接过孔的介质层进行清洗的步骤包括：
    将形成有连接过孔的介质层放入水槽内，进行超声清洗。
  20. 根据权利要求18所述的导电过孔的制备方法，其中，所述对形成所述连接过孔的介质层进行清洗的步骤包括：
    将形成有连接过孔的介质层放入水槽内，进行超声清洗，之后将所述介质层放入含有氢氟酸的溶液中进行化学腐蚀。
  21. 根据权利要求1所述的导电过孔的制备方法，其中，所述连接过孔的形状包括圆柱形或者倒圆台形。
  22. 一种导电过孔，其包括：
    介质层，其具有在其厚度方向上贯穿的连接过孔；所述介质层包括在其厚度方向上相对设置的第一表面和第二表面；
    连接电极、第一引出电极和第二引出电极，所述连接电极设置在所述连接过孔内，所述第一引出电极位于所述第一表面，所述第二引出电极位于所述第二表面；其中，
    所述连接电极至少覆盖所述连接过孔的内壁，且所述第一引出电极和所述第二引出电极均与所述连接电极电连接。
  23. 根据权利要求22所述导电过孔，其中，所述连接过孔的形状包括圆柱形或者倒圆台形。
  24. 一种无源器件，其包括权利要求22或23所述的导电过孔。
  25. 根据权利要求24所述的无源器件，其中，所述无源器件至少包括电感；所述电感位于所述第一表面的第一子结构和位于所述第二表面的第二子结构，以及将所述第一子结构和所述第二子结构依次串接的所述导电过孔。
  26. 根据权利要求25所述的无源器件，其中，所述无源器件还包括电容和电阻；所述电容和所述电阻均设置在所述第二表面上。
  27. 根据权利要求24-26中任一项所述的无源器件，其中，所述介质层 包括玻璃、聚酰亚胺、聚对苯二甲酸乙二醇酯、环烯烃聚合物中的至少之一。
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Citations (4)

* Cited by examiner, † Cited by third party
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JPH0677711A (ja) * 1992-06-29 1994-03-18 Takeshi Ikeda ノイズ・フィルタ
CN102668734A (zh) * 2009-12-24 2012-09-12 株式会社村田制作所 电路模块
CN103985698A (zh) * 2013-08-08 2014-08-13 珠海越亚封装基板技术股份有限公司 具有嵌入式滤波器的多层电子结构
CN105655316A (zh) * 2014-11-27 2016-06-08 珠海越亚封装基板技术股份有限公司 具有与电容器串联的至少一个通孔的芯片用聚合物框架

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Publication number Priority date Publication date Assignee Title
JPH0677711A (ja) * 1992-06-29 1994-03-18 Takeshi Ikeda ノイズ・フィルタ
CN102668734A (zh) * 2009-12-24 2012-09-12 株式会社村田制作所 电路模块
CN103985698A (zh) * 2013-08-08 2014-08-13 珠海越亚封装基板技术股份有限公司 具有嵌入式滤波器的多层电子结构
CN105655316A (zh) * 2014-11-27 2016-06-08 珠海越亚封装基板技术股份有限公司 具有与电容器串联的至少一个通孔的芯片用聚合物框架

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