WO2022252171A1 - 像素单元及相关图像传感器、指纹检测芯片及电子装置 - Google Patents

像素单元及相关图像传感器、指纹检测芯片及电子装置 Download PDF

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WO2022252171A1
WO2022252171A1 PCT/CN2021/098079 CN2021098079W WO2022252171A1 WO 2022252171 A1 WO2022252171 A1 WO 2022252171A1 CN 2021098079 W CN2021098079 W CN 2021098079W WO 2022252171 A1 WO2022252171 A1 WO 2022252171A1
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transistor
pixel unit
coupled
operational amplifier
terminal
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PCT/CN2021/098079
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English (en)
French (fr)
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梁颖思
杨富强
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迪克创新科技有限公司
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Priority to PCT/CN2021/098079 priority Critical patent/WO2022252171A1/zh
Priority to CN202180001664.8A priority patent/CN113491109A/zh
Publication of WO2022252171A1 publication Critical patent/WO2022252171A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled

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  • the present application relates to a semiconductor structure, in particular to a pixel unit and a related image sensor, a fingerprint detection chip and an electronic device.
  • CMOS complementary Metal Oxide Semiconductor
  • One of the objectives of the present application is to disclose a pixel unit, a related image sensor, a fingerprint detection chip and an electronic device to solve the above problems.
  • An embodiment of the present application discloses a pixel unit, including a photodiode, the first end of which is coupled to a preset voltage; an operational amplifier having a positive terminal, a negative terminal, and an output terminal, and the negative terminal is coupled Connected to the second terminal of the photodiode; a capacitor unit, coupled between the output terminal of the operational amplifier and the negative terminal, wherein in the sampling phase, the photocurrent generated by the photodiode makes the A voltage difference is formed at both ends of the capacitor unit; a first transistor; a leakage suppression unit including: a second transistor connected in series with the first transistor, and the first transistor and the second transistor connected in series are coupled to the Between the output terminal of the operational amplifier and the negative terminal, wherein in the reset phase, the first transistor and the second transistor connected in series are turned on to reset the sampling at both ends of the capacitor unit The voltage difference formed in the stage; in the sampling stage, the first transistor and the second transistor connected in series are not conducting, and one end of the second transistor is coupled to the negative end of
  • An embodiment of the present application discloses an image sensor, including the pixel unit described above.
  • An embodiment of the present application discloses a fingerprint detection chip, including the image sensor.
  • An embodiment of the present application discloses an electronic device, including the fingerprint detection chip.
  • the pixel unit, image sensor and related fingerprint detection chip and electronic device of the present application can improve the signal-to-noise ratio of the pixel unit realized by the thin film semiconductor structure.
  • FIG. 1 is a schematic diagram of a first embodiment of a pixel unit in a pixel array of an image sensor of the present application.
  • FIG. 2 is a schematic diagram of a second embodiment of a pixel unit in a pixel array of an image sensor of the present application.
  • FIG. 3 is a schematic diagram of a third embodiment of a pixel unit in a pixel array of an image sensor of the present application.
  • FIG. 4 is a schematic diagram of a fourth embodiment of a pixel unit in a pixel array of an image sensor of the present application.
  • FIG. 5 is a schematic diagram of a fifth embodiment of a pixel unit in a pixel array of an image sensor of the present application.
  • FIG. 6 is a schematic diagram of a sixth embodiment of a pixel unit in a pixel array of an image sensor of the present application.
  • FIG. 7 is a schematic diagram of a seventh embodiment of a pixel unit in a pixel array of an image sensor of the present application.
  • first and second features are in direct contact with each other; and may also include additional components are formed between the first and second features, such that the first and second features may not be in direct contact.
  • this disclosure may reuse reference symbols and/or labels in various embodiments. Such repetition is for the sake of brevity and clarity, and does not in itself represent a relationship between the different embodiments and/or configurations discussed.
  • the image sensor proposed in this application can solve this problem.
  • the image sensor includes a pixel array, including a plurality of pixel units arranged in multiple rows and columns, wherein the implementation of the pixel unit is shown in FIGS. 1 to 7, and detailed description later.
  • the entire pixel unit 100 in FIG. 1 is implemented with a thin film semiconductor structure, including a photodiode 102 , an operational amplifier 104 , a capacitor unit 106 , a transistor 108 , a source follower transistor 110 and a row selection transistor 112 .
  • the first end (the anode in this embodiment) and the second end (the cathode in this embodiment) of the photodiode 102 of the pixel unit 100 are coupled to the operational amplifier 104.
  • the positive terminal and the negative terminal, and the operational amplifier 104 is set as negative feedback, so the voltage difference between the anode and the cathode of the photodiode 102 is limited to zero by the operational amplifier 104 . In this way, the dark current of the photodiode 102 can be reduced, and the signal-to-noise ratio of the pixel unit 100 can be improved. Since the voltage of the anode and the cathode of the photodiode 102 of the present application remains the same, the coupling mode of the photodiode 102 is not limited to that shown in FIG. 1 . In some embodiments, the coupling mode of the anode and the cathode of the photodiode 102 It can be opposite to that of FIG. 1 and still work, but in this way the direction of the photocurrent generated by the photodiode 102 will be opposite to that of FIG. 1 .
  • the transistor 108 When the pixel unit 100 is operating in the sampling phase, the transistor 108 is turned off by the control signal S1, and the operational amplifier 104 integrates the capacitor unit 106, so that the photocurrent generated by the photodiode 102 forms a voltage difference at both ends of the capacitor unit 106, and passes through the source The output of the following transistor 110 and the row selection transistor 112 is the sensing result VPO.
  • the transistor 108 When the pixel unit 100 is operating in the reset phase, the transistor 108 is turned on by the control signal S1, and the voltage difference formed across the capacitor unit 106 is reset to zero.
  • the anode of the photodiode 102 is coupled to the preset voltage V1.
  • the operational amplifier 104 has a positive terminal, a negative terminal and an output terminal, the positive terminal is coupled to the anode of the photodiode 102 ; the negative terminal is coupled to the cathode of the photodiode 102 .
  • the capacitor unit 106 and the first transistor 108 are arranged in parallel, and both are coupled between the output terminal and the negative terminal of the operational amplifier 104 .
  • the gate of the source follower transistor 110 is coupled to the output terminal of the operational amplifier 110 .
  • the row selection transistor 112 is connected in series with the source follower transistor 110 and selectively outputs the sensing result VPO according to the row selection signal.
  • the dark current of the photodiode 102 of the pixel unit 100 is reduced, when the transistor 108 as a switch is turned off in the sampling phase, due to the characteristics of a thin film semiconductor, it is more stable than a complementary metal oxide semiconductor. It is easy to generate leakage current, especially the leakage current generated through the body of the transistor 108 . Since the photocurrent of the photodiode 102 is generally very small (fA to pA level), the photocurrent of the photodiode 102 is interfered by the leakage current of the transistor 108 , thus reducing the signal-to-noise ratio of the pixel unit 100 .
  • the present application proposes the pixel unit 200 in FIG. 2 to improve the leakage current problem of the transistor 108 .
  • the pixel unit 200 has a leakage suppression unit 202 , which can further reduce the overall leakage of the path where the transistor 108 and the transistor 204 are located in the sampling phase.
  • the leakage suppression unit 202 includes a transistor 204 and a transistor 206 .
  • the transistor 204 is connected in series with the transistor 108 , and the series connected transistor 108 and transistor 204 are connected in parallel to the capacitor unit 106 and coupled between the output terminal and the negative terminal of the operational amplifier 104 .
  • the transistor 206 is turned off by the control signal S3 , and the series-connected transistor 108 and transistor 204 are turned on by the control signals S1 and S2 to reset the voltage difference formed across the capacitor unit 106 in the sampling phase.
  • the serially connected transistor 108 and transistor 204 are both off, and the transistor 206 of the leakage suppression unit 202 is turned on, so that one terminal of the transistor 204 can be coupled to the positive terminal of the operational amplifier 104 through the transistor 206 .
  • the other terminal of the transistor 204 is coupled to the negative terminal of the operational amplifier 104 , so the voltage difference between the two terminals of the transistor 204 is clamped at 0 during the sampling phase, which can reduce the leakage current passing through the two terminals of the transistor 204 . Since the transistor 204 is connected in series with the transistor 108 and the transistor 204 is used as a gatekeeper for the leakage current, the actual leakage current caused by the transistor 108 can be greatly reduced under the condition that the occurrence rate of the leakage current of the transistor 108 remains unchanged.
  • the overall leakage current on the path of the transistor 108 and the transistor 204 is greatly reduced, and the interference degree of the photocurrent of the photodiode 102 by the leakage current of the transistor 108 is reduced, so the signal-to-noise ratio of the pixel unit 200 is better than that of the pixel unit 100 .
  • the polarity of all transistors is not particularly limited, that is, each transistor is not limited to be P-type or N-type, and the connection method of the body of each transistor is not emphasized.
  • FIG. 3 to FIG. 5 an embodiment of the connection of the body of the transistor 204 is proposed.
  • the transistor 204 in FIGS. 3 to 5 is preferably implemented as a P-type transistor.
  • the body of the transistor 204 of the pixel unit 300 is connected to the positive terminal of the operational amplifier 104, the drain of the transistor 204 is connected to the negative terminal of the operational amplifier 104, and the source of the transistor 204 is connected to the terminal of the transistor 206.
  • the voltages of the drain, the source and the body of the transistor 204 are the same, which can further suppress the leakage current generated by the body of the transistor 204 .
  • this application also provides additional connection methods.
  • the body of the transistor 204 of the pixel unit 400 is floating; in FIG. 5, the body of the transistor 204 of the pixel unit 500 is connected to the source of the transistor 204, which can suppress the leakage current generated by the body of the transistor 204. .
  • the operational amplifier 104 has relatively large non-ideal characteristics, during the sampling phase, the voltage difference between the positive terminal and the negative terminal of the operational amplifier 104 may not be 0, so that the voltage difference between the anode and cathode of the photodiode 102 is not 0, causing the dark current to rise. Therefore, in the embodiment of FIG. 6, the anode of the photodiode 102 of the pixel unit 600 is not connected to the positive terminal of the operational amplifier 104, but changes the anode of the photodiode 102 according to the non-ideal characteristics of the operational amplifier 104.
  • the preset voltage V1 makes the voltage difference between the anode and the cathode of the photodiode 102 zero. For example, the value of the preset voltage V1 can be found out and fixed before leaving the factory.
  • the non-ideal characteristics of the operational amplifier 104 may change. To more precisely control the voltage difference between the anode and cathode of the photodiode 102 at 0, the preset voltage V1 can be dynamically optimized as shown in FIG. 7 value.
  • the preset voltage V1 of the pixel unit 700 is provided by the voltage generating unit 702.
  • the voltage generating unit 702 includes a multiplexer 704 , wherein multiple different voltage output options can be preset, and the control unit 706 selects one of the multiple different voltages through the multiplexer 704 as the preset voltage V1 to output.
  • the control unit 706 can select one of the plurality of different voltages as the preset voltage V1 according to the current usage situation. For example, the non-ideal characteristics of the operational amplifier 104 will be affected by the ambient temperature, so the control unit 706 can control the multiplexer 704 to output the preset voltage V1 according to the current ambient temperature.
  • the present application also provides a fingerprint detection chip, including the image sensor, and the image sensor may include a pixel array, including a plurality of pixel units arranged in multiple rows and columns 10/200/300/400/500/600 /700. Since the optical fingerprint detection originally collects relatively weak fingerprint light signals, the use of the fingerprint detection chip in the embodiment of the present application can reduce noise, improve the signal-to-noise ratio, and further improve the performance of fingerprint detection.
  • the present application also provides an electronic device, which includes the fingerprint detection chip.
  • the fingerprint detection chip can be arranged under the display screen of the electronic device to realize fingerprint detection under the screen.
  • the fingerprint detection chip can be arranged inside the display screen, that is, the fingerprint detection chip is integrated inside the display screen to realize in-screen fingerprint detection.

Abstract

本申请公开了一种像素单元及相关图像传感器、指纹检测芯片及电子装置。所述像素单元包括光电二极管；运算放大器，负端耦接至所述光电二极管的第二端；电容单元，耦接于所述运算放大器的输出端与所述负端之间；第一晶体管；漏电抑制单元，包含：第二晶体管，串接所述第一晶体管，且串接的所述第一晶体管和所述第二晶体管耦接于所述运算放大器的所述输出端与所述负端之间，其中在采样阶段，串接的所述第一晶体管和所述第二晶体管不导通，所述第二晶体管的一端耦接至所述运算放大器的所述负端，所述第二晶体管的另一端耦接至所述运算放大器的所述正端，使所述第二晶体管的跨压为零。

Description

像素单元及相关图像传感器、指纹检测芯片及电子装置 技术领域
本申请涉及一种半导体结构，尤其涉及一种像素单元及相关图像传感器、指纹检测芯片及电子装置。
背景技术
使用互补金属氧化物(Complementary Metal Oxide Semiconductor,CMOS)半导体结构实现的图像传感器，其成本远远高于使用薄膜半导体结构实现的图像传感器，但使用薄膜半导体结构实现的图像传感器有许多缺点需要克服，例如使用薄膜半导体结构实现的光电二极管的暗电流较大，也就是有较大的噪声。
因此，使用薄膜半导体结构实现的光电二极管时如何抑制暗电流以降低噪声，已成为本领域亟需解决的问题之一。
发明内容
本申请的目的之一在于公开一种像素单元及相关图像传感器、指纹检测芯片及电子装置，来解决上述问题。
本申请的一实施例公开了一种像素单元，包括光电二极管，所述光电二极管的第一端耦接至预设电压；运算放大器，具有正端、负端与输出端，所述负端耦接至所述光电二极管的第二端；电容单元，耦接于所述运算放大器的所述输出端与所述负端之间，其中在采样阶段，所述光电二极管产生的光电流使所述电容单元两端形成电压差；第一晶体管；漏电抑制单元，包含：第二晶体管，串接所述第一晶体管，且串接的所述第一晶体管和所述第二晶体管耦接于所述运算放大器 的所述输出端与所述负端之间，其中在重置阶段，串接的所述第一晶体管和所述第二晶体管导通以重置所述电容单元两端在所述采样阶段形成的电压差；在所述采样阶段，串接的所述第一晶体管和所述第二晶体管不导通，所述第二晶体管的一端耦接至所述运算放大器的所述负端，所述第二晶体管的另一端耦接至所述运算放大器的所述正端，使所述第二晶体管的跨压为零；源跟随晶体管，耦接至所述运算放大器的所述输出端；以及行选择晶体管，耦接于所述源跟随晶体管。
本申请的一实施例公开了一种图像传感器，包括所述的像素单元。
本申请的一实施例公开了一种指纹检测芯片，包括所述的图像传感器。
本申请的一实施例公开了一种电子装置，包括所述的指纹检测芯片。
本申请的像素单元、图像传感器及相关指纹检测芯片及电子装置，可以提升薄膜半导体结构实现的像素单元的信噪比。
附图说明
图1为本申请的图像传感器的像素阵列中的像素单元的第一实施例的示意图。
图2为本申请的图像传感器的像素阵列中的像素单元的第二实施例的示意图。
图3为本申请的图像传感器的像素阵列中的像素单元的第三实施例的示意图。
图4为本申请的图像传感器的像素阵列中的像素单元的第四实施例的示意图。
图5为本申请的图像传感器的像素阵列中的像素单元的第五实施例的示意图。
图6为本申请的图像传感器的像素阵列中的像素单元的第六实施例的示意图。
图7为本申请的图像传感器的像素阵列中的像素单元的第七实施例的示意图。
具体实施方式
以下揭示内容提供了多种实施方式或例示，其能用以实现本揭示内容的不同特征。下文所述之组件与配置的具体例子系用以简化本揭示内容。当可想见，这些叙述仅为例示，其本意并非用于限制本揭示内容。举例来说，在下文的描述中，将一第一特征形成于一第二特征上或之上，可能包括某些实施例其中所述的第一与第二特征彼此直接接触；且也可能包括某些实施例其中还有额外的组件形成于上述第一与第二特征之间，而使得第一与第二特征可能没有直接接触。此外，本揭示内容可能会在多个实施例中重复使用组件符号和/或标号。此种重复使用乃是基于简洁与清楚的目的，且其本身不代表所讨论的不同实施例和/或组态之间的关系。
虽然用以界定本申请较广范围的数值范围与参数皆是约略的数值，此处已尽可能精确地呈现具体实施例中的相关数值。然而，任何数值本质上不可避免地含有因个别测试方法所致的标准偏差。在此处，「约」通常系指实际数值在一特定数值或范围的正负10％、5％、1％或0.5％之内。或者是，「约」一词代表实际数值落在平均值的可接受标准误差之内，视本申请所属技术领域中具有通常知识者的考虑而定。当可理解，除了实验例之外，或除非另有明确的说明，此处所用的所有范围、数量、数值与百分比(例如用以描述材料用量、时间长短、温度、操作条件、数量比例及其他相似者)均经过「约」的修饰。因此，除非另有相反的说明，本说明书与附随申请专利范围所揭示的数值参数皆为约略的数值，且可视需求而更动。至少应将这些数值参数理解为所指出的有效位数与套用一般进位法所得到的数值。在此处，将数值范围表示成由一端点至另一端点或介于二端点之间；除非另有 说明，此处所述的数值范围皆包括端点。
使用薄膜半导体结构实现的图像传感器造成的问题之一在于，相较于使用互补金属氧化物半导体结构实现的光电二极管，使用薄膜半导体结构实现的光电二极管在其阳极和阴极有偏压的情况下，容易产生更大的暗电流。本申请提出的图像传感器可以解决此问题，所述图像传感器包括像素阵列，包含排列为多行与多列的多个像素单元，其中像素单元的实施方式绘示于图1至图7，细节说明于后。
在图1中的像素单元100的整体是以薄膜半导体结构实现，包含光电二极管102、运算放大器104、电容单元106、晶体管108、源跟随晶体管110以及行选择晶体管112。为了降低光电二极管102的暗电流，像素单元100的光电二极管102的第一端(在本实施例中为阳极)与第二端(在本实施例中为阴极)耦接至运算放大器104的所述正端与所述负端，又运算放大器104被设置为负回授，因此光电二极管102的阳极与阴极之间的电压差被运算放大器104限制在0。这样一来便可降低光电二极管102的暗电流，提高像素单元100的信噪比。由于本申请的光电二极管102的阳极与阴极电压保持相同，因此光电二极管102的耦接方式并不限定于图1的方式，在某些实施例中，光电二极管102的阳极与阴极的耦接方式可以和图1相反也仍然可以工作，只是这样一来光电二极管102产生的光电流的方向会和图1相反。
当像素单元100操作在采样阶段时，晶体管108通过控制信号S1断开，运算放大器104对电容单元106进行积分，使光电二极管102产生的光电流在电容单元106两端形成电压差，并通过源跟随晶体管110及行选择晶体管112输出为感测结果VPO。当像素单元100操作在重置阶段时，晶体管108通过控制信号S1导通，电容单元106两端形成电压差会被重置为0。
具体来说，像素单元100中，光电二极管102的阳极耦接至预设电压V1。运算放大器104具有正端、负端与输出端，所述正端耦接至光电二极管102的阳极；所述负端耦接至光电二极管102的阴极。电容单元106与第一晶体管108并联设置，且皆耦接于运算放大器 104的所述输出端与所述负端之间。源跟随晶体管110的栅极耦接至运算放大器110的所述输出端。行选择晶体管112串接于源跟随晶体管110，并依据行选择信号来选择性地输出感测结果VPO。
虽然像素单元100的光电二极管102的暗电流降低了，但作为开关的晶体管108在所述采样阶段为断开的情况下，因薄膜半导体特性使然，相较于互补金属氧化物半导体来说，更容易有漏电流产生，特别是经晶体管108的本体(body)产生的漏电流。由于光电二极管102的光电流一般都很小(fA至pA等级)，导致光电二极管102的光电流受到晶体管108的漏电流的干扰，因此降低了像素单元100的信噪比。
因此，本申请又提出图2的像素单元200来改善晶体管108的漏电流问题。像素单元200相较于像素单元100增加了漏电抑制单元202，可进一步在所述采样阶段降低晶体管108和晶体管204所在的路径的整体漏电。漏电抑制单元202包含晶体管204和晶体管206。晶体管204串接晶体管108，串接的晶体管108和晶体管204并联于电容单元106，且耦接于运算放大器104的所述输出端与所述负端之间。
在所述重置阶段，晶体管206通过控制信号S3断开，串接的晶体管108和晶体管204通过控制信号S1和S2导通以重置电容单元106两端在所述采样阶段形成的电压差。在所述采样阶段，串接的晶体管108和晶体管204皆不导通，漏电抑制单元202的晶体管206导通，使晶体管204的一端可通过晶体管206耦接至运算放大器104的所述正端。晶体管204的另一端则耦接至运算放大器104的所述负端，因此晶体管204的两端的电压差在所述采样阶段被箝制在0，可降低通过晶体管204两端的漏电流。由于晶体管204串接晶体管108，利用晶体管204做漏电流的把关，在晶体管108漏电流发生率不变的情况下，可以大幅降低晶体管108实际造成的漏电流。也就是使晶体管108和晶体管204的路径上的整体漏电流大幅降低，降低光电二极管102的光电流受到晶体管108的漏电流的干扰程度，因此像素单元200 的信噪比会优于像素单元100。
像素单元100和像素单元200中，并没有特别限制所有晶体管的极性，即没有限制各晶体管为P型或N型，也没有强调各晶体管的本体的连接方式。但为了更进一步优化像素单元200，在图3至图5中，提出了晶体管204的本体的连接的实施方式。由于一般在实现N型晶体管时，全部的N型晶体管的本体都会连接到同一個地电压，所以在不额外增加电路复杂度的情况下，无法作個別N型晶体管的本体的电压控制。P型晶体管则无此限制。因此，在图3至图5中晶体管204较佳地是以P型晶体管来实现。
在图3中，像素单元300的晶体管204的本体连接到运算放大器104的所述正端，晶体管204的漏极连接到运算放大器104的所述负端，晶体管204的源极连接到晶体管206的一端，使像素单元300在所述采样阶段，晶体管204的漏极、源极和本体的电压相同，可进一步抑制经晶体管204的本体产生的漏电流。
除了图3的连接方式外，本申请还提供额外的连接方式。在图4中，像素单元400的晶体管204的本体为浮接；在图5中，像素单元500的晶体管204的本体连接至晶体管204的源极，皆可抑制经晶体管204的本体产生的漏电流。
图1至图5的实施例中，若运算放大器104存在较大的非理想特性，在所述采样阶段时，运算放大器104的所述正端与所述负端之间的电压差可能不为0，使光电二极管102的阳极和阴极之间的电压差不为0，导致暗电流上升。因此，在图6的实施例中，像素单元600的光电二极管102的阳极不和运算放大器104的所述正端连接，而是依据运算放大器104的非理想特性，来改变光电二极管102的阳极的预设电压V1，使光电二极管102的阳极和阴极之间的电压差为0。举例来说，可以在出厂前找出预设电压V1的值并将其固定。
运算放大器104的非理想特性有可能会变化，若要更精细地将光电二极管102的阳极和阴极之间的电压差控制在0，可以如图7的方式来动态地最佳化预设电压V1的值。像素单元700相较于像素单元 600，其预设电压V1是由电压产生单元702提供。电压产生单元702包括复用器704，其中可预设多种不同电压输出选项，控制单元706通过复用器704从多个不同电压中选择一个以作为预设电压V1输出。控制单元706可以依据使用当下的状况来从所述多个不同电压中选择一个以作为预设电压V1。举例来说，运算放大器104的非理想特性会受环境温度的影响，因此控制单元706可以依据当下的环境温度来控制复用器704输出预设电压V1。
本申请还提供了一种指纹检测芯片，包括所述图像传感器，所述图像传感器可包含像素阵列，包含排列为多行与多列的多个像素单元10/200/300/400/500/600/700。由于光学指纹检测本就采集的是较为微弱的指纹光信号，采用本申请实施例中的指纹检测芯片，能够降低噪声，提升信噪比，进一步能够提升指纹检测的性能。本申请还提供了一种电子装置，其包括所述指纹检测芯片，可选的，所述指纹检测芯片可以设置在电子装置的显示屏的下方，以实现屏下指纹检测，在某些实施例中，指纹检测芯片可以设置于显示屏的内部，即将指纹检测芯片集成于显示屏的内部，以实现屏内指纹检测。
上文的叙述简要地提出了本申请某些实施例之特征，而使得本申请所属技术领域具有通常知识者能够更全面地理解本揭示内容的多种态样。本申请所属技术领域具有通常知识者当可明了，其可轻易地利用本揭示内容作为基础，来设计或更动其他工艺与结构，以实现与此处所述之实施方式相同的目的和/或达到相同的优点。本申请所属技术领域具有通常知识者应当明白，这些均等的实施方式仍属于本揭示内容之精神与范围，且其可进行各种变更、替代与更动，而不会悖离本揭示内容之精神与范围。

Claims (16)

  1. 一种像素单元，其特征在于，包括：
    光电二极管，所述光电二极管的第一端耦接至预设电压；
    运算放大器，具有正端、负端与输出端，所述负端耦接至所述光电二极管的第二端；
    电容单元，耦接于所述运算放大器的所述输出端与所述负端之间，其中在采样阶段，所述光电二极管产生的光电流使所述电容单元两端形成电压差；
    第一晶体管；
    漏电抑制单元，包含：
    第二晶体管，串接所述第一晶体管，且串接的所述第一晶体管和所述第二晶体管耦接于所述运算放大器的所述输出端与所述负端之间，其中在重置阶段，串接的所述第一晶体管和所述第二晶体管导通以重置所述电容单元两端在所述采样阶段形成的电压差；在所述采样阶段，串接的所述第一晶体管和所述第二晶体管不导通，所述第二晶体管的一端耦接至所述运算放大器的所述负端，所述第二晶体管的另一端耦接至所述运算放大器的所述正端，使所述第二晶体管的跨压为零；
    源跟随晶体管，耦接至所述运算放大器的所述输出端；以及
    行选择晶体管，耦接于所述源跟随晶体管。
  2. 如权利要求1所述的像素单元，其特征在于，所述漏电抑制单元还包括第三晶体管，所述第三晶体管在所述采样阶段导通，且所述第二晶体管的所述另一端在所述采样阶段通过所述第三晶体管耦接至所述运算放大器的所述正端。
  3. 如权利要求2所述的像素单元，其特征在于，所述第三晶体管在所述重置阶段不导通，且所述第二晶体管的所述另一端在所述重置阶段和所述运算放大器的所述正端断开。
  4. 如权利要求1所述的像素单元，其特征在于，所述第一晶体管和所述第二晶体管为P型晶体管，所述第一晶体管的漏极耦接至所 述第二晶体管的源极。
  5. 如权利要求4所述的像素单元，其特征在于，所述第二晶体管的本体耦接至所述运算放大器的所述正端。
  6. 如权利要求4所述的像素单元，其特征在于，所述第二晶体管的本体浮接。
  7. 如权利要求4所述的像素单元，其特征在于，所述第二晶体管的本体耦接至所述第二晶体管的源极。
  8. 如权利要求1至7中任一项所述的像素单元，其特征在于，所述运算放大器的所述正端耦接至所述光电二极管的所述第一端。
  9. 如权利要求1至7中任一项所述的像素单元，其特征在于，所述运算放大器的所述正端不耦接至所述光电二极管的所述第一端。
  10. 如权利要求9所述的像素单元，其特征在于，还包括电压产生单元，用来供应及调整所述预设电压。
  11. 如权利要求10所述的像素单元，其特征在于，所述电压产生单元包括：
    复用器；以及
    控制单元，用来通过所述复用器从多个不同电压中选择一个以作为所述预设电压。
  12. 如权利要求11所述的像素单元，其特征在于，所述控制单元依据环境温度用来从所述多个不同电压中选择一个以作为所述预设电压。
  13. 如权利要求1至12中任一项所述的像素单元，其特征在于，所述像素单元为薄膜半导体结构。
  14. 一种图像传感器，其特征在于，包括：
    像素阵列，包含排列为多行与多列的多个像素单元，其中各像素单元包含如权利要求1至13中任一项所述的像素单元。
  15. 一种指纹检测芯片，其特征在于，包括：
    如权利要求14所述的图像传感器。
  16. 一种电子装置，其特征在于，包括：
    如权利要求15所述的指纹检测芯片。
PCT/CN2021/098079 2021-06-03 2021-06-03 像素单元及相关图像传感器、指纹检测芯片及电子装置 WO2022252171A1 (zh)

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