WO2022242287A1 - 像素驱动电路、显示面板及其控制方法和显示设备 - Google Patents

像素驱动电路、显示面板及其控制方法和显示设备 Download PDF

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Publication number
WO2022242287A1
WO2022242287A1 PCT/CN2022/081420 CN2022081420W WO2022242287A1 WO 2022242287 A1 WO2022242287 A1 WO 2022242287A1 CN 2022081420 W CN2022081420 W CN 2022081420W WO 2022242287 A1 WO2022242287 A1 WO 2022242287A1
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Prior art keywords
reset
transistor
anode
gate
driving
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PCT/CN2022/081420
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English (en)
French (fr)
Inventor
刘长瑜
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Oppo广东移动通信有限公司
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Publication of WO2022242287A1 publication Critical patent/WO2022242287A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Definitions

  • the embodiments of the present application relate to the field of display technology, and in particular, to a pixel driving circuit, a display panel, a control method thereof, and a display device.
  • the under-screen camera can divide the display screen of the electronic device into a first display area (main screen area) and a second display area (secondary screen area), that is, the area where the under-screen camera is placed. Due to the influence of the layout of the pixel circuits corresponding to the light-emitting devices in the first display area and the second display area, when the light-emitting devices in the first display area and the light-emitting devices in the second display area are simultaneously driven, the first display area and the second display area The display brightness of the second display area is not uniform, which reduces the display effect of the electronic device.
  • a pixel driving circuit a display panel, a control method thereof, and a display device are provided.
  • a pixel driving circuit comprising a plurality of driving modules, each of which is used to drive a light-emitting device connected to the driving module, and each of the driving modules includes: an anode reset unit, a driving transistor, and a connecting the anode reset unit and the target metal wiring of the light emitting device;
  • the control terminal of the anode reset unit is used to receive the first scanning signal, the input terminal of the anode reset unit is used to receive the first reset voltage, and the output terminal of the anode reset unit is respectively connected to the first pole of the drive transistor, the the anode connection of the light-emitting device;
  • the magnitude of the first reset voltage received by the input terminal of each of the anode reset units is positively correlated with the length of the target metal trace, wherein the target metal trace length is the same drive module as the anode reset unit The length of the target metal trace in the
  • a display panel comprising:
  • a plurality of the driving modules are connected to a plurality of the light emitting devices in a one-to-one correspondence.
  • the input terminals of the anode reset units in each of the drive modules are controlled to receive the first reset voltage at the same time.
  • a display device comprising: a photosensitive device and the aforementioned display panel; wherein, the display panel includes a first display area and a second display area, and the photosensitive device is arranged correspondingly to the first display area.
  • FIG. 1 is a schematic structural diagram of a display device according to an embodiment
  • FIG. 2 is a schematic circuit diagram of a pixel driving circuit according to an embodiment
  • FIG. 3 is a schematic distribution diagram of a pixel driving circuit according to an embodiment
  • FIG. 4 is a schematic diagram of a layered structure of a pixel driving circuit according to an embodiment
  • 5a-5e are schematic diagrams of brightness distribution in the first display area of an embodiment
  • FIG. 6 is a schematic circuit diagram of a pixel driving circuit according to an embodiment
  • FIG. 7 is a schematic circuit diagram of a pixel driving circuit in another embodiment
  • Fig. 8 is a schematic diagram of curves between time and brightness during the light emitting process of different color light emitting devices according to an embodiment
  • FIG. 9 is a schematic circuit diagram of a pixel driving circuit in another embodiment.
  • FIG. 10 is a schematic circuit diagram of a pixel driving circuit in another embodiment
  • FIG. 11 is a schematic circuit diagram of a first driving module of an embodiment
  • FIG. 12 is a schematic circuit diagram of a first driving module in another embodiment
  • FIG. 13 is a schematic diagram of a reset wiring of a display panel according to an embodiment
  • FIG. 14 is a schematic flowchart of a method for controlling a display panel according to an embodiment.
  • first, second and the like used in this application may be used to describe various elements herein, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element.
  • a first reset voltage could be termed a second reset voltage
  • a second reset voltage could be termed a first reset voltage, without departing from the scope of the present application.
  • Both the first reset voltage and the second reset voltage are reset voltages, but they are not the same reset voltage.
  • first and second are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features.
  • the features defined as “first” and “second” may explicitly or implicitly include at least one of these features.
  • “plurality” means at least two, such as two, three, etc., unless otherwise specifically defined.
  • an embodiment of the present application provides a display device.
  • the display device may be a smart phone, a tablet computer, a game device, an augmented reality (Augmented Reality, AR) device, a notebook, a desktop computing device, a wearable device, and the like.
  • AR Augmented Reality
  • the display device 10 includes a display panel 100 , and the display panel 100 includes a first display area 101 and a second display area 102 adjacent to each other.
  • the shape of the first display area 101 may be circular, rectangular, elliptical, polygonal, irregular, etc., which is not limited in the present invention.
  • a photosensitive device 103 is disposed inside the display device 10 , wherein the photosensitive device 103 is at least partially disposed opposite to the first display area 101 .
  • the photosensitive device 103 realizes testing and control based on optical parameters by receiving light.
  • the photosensitive device 103 is disposed under the first display area 101 , and the photosensitive device 103 is used to transmit and/or receive optical signals through the first display area 101 of the display panel 20 .
  • the first display area 101 is the area above the photosensitive device 103 , in the embodiment of the present application, the upper refers to the direction from the back shell of the display device to the display screen, and the lower refers to the direction from the display screen to the back shell.
  • the photosensitive device 103 can be a camera, and the photosensitive device 103 can also be an ambient light sensor, an optical distance sensor (for example, an infrared sensor, a laser sensor, a proximity sensor, a distance sensor, an optical distance sensor), a structured light module, a time-of-flight sensor, etc. Time offlight (TOF) lens module, optical fingerprint sensor, etc.
  • an optical distance sensor for example, an infrared sensor, a laser sensor, a proximity sensor, a distance sensor, an optical distance sensor
  • structured light module for example, a time-of-flight sensor, etc. Time offlight (TOF) lens module, optical fingerprint sensor, etc.
  • TOF Time offlight
  • the photosensitive device 103 is used as a camera as an example for description.
  • the display panel includes a plurality of light emitting devices and a pixel driving circuit for driving the plurality of light emitting devices to emit light.
  • the first display area 101 includes m first light emitting devices 110a
  • the second display area 102 includes n second light emitting devices 110b.
  • the pixel driving circuit may include a plurality of driving modules composed of thin film transistor (Thin Film Transistor, TFT) circuits, wherein the plurality of driving modules include m first driving modules for driving the m first light emitting devices 110a to emit light one by one.
  • the first light-emitting device 110a and the second light-emitting device 110b can be, but are not limited to, organic light-emitting diodes (Organic light-emitting diodes, OLEDs), quantum dot light-emitting diodes (Quantum Dot Light Emitting Diodes, QLEDs), and micron-scale light-emitting diodes (Micro LEDs). )Wait. It should be noted that each embodiment of the present application is described by taking the light-emitting device as an example of an organic light-emitting diode.
  • each light-emitting device can be an organic light-emitting diode of a different color, such as a red OLED, a green OLED, and a blue OLED.
  • the driving modules of the light-emitting devices of different colors can be the same, but the materials of the light-emitting layers of the light-emitting devices of different colors are different, so that The display of different colors is realized, so that the display device realizes full-color display.
  • the first display area 101 is an area above the camera.
  • the first driving module 120a for driving the first light emitting device 110a is arranged on the periphery of the first display area 101, and the area where the first driving module 120a is set can be referred to as a transition area 104 or a pixel. Drive circuit external area.
  • the first driving module 120a located in the transition area 104 can be electrically connected to the first light emitting device 110a of the first display area 101 through the target metal wiring L, and correspondingly, the second driving module 120b is also connected to the second light emitting device through the target metal wiring L.
  • the second light emitting devices of the display area 102 are electrically connected. It should be noted that the lengths of the target metal traces L between each second driving module 120b and the second light emitting device correspondingly connected to it are the same, wherein the second light emitting device 120a connected to each second driving module 120b is The target metal wiring L between them is smaller than the target metal wiring L between any first driving module 110b and the first light emitting device 110a connected thereto.
  • the target metal wire L may be a transparent metal wire, for example, an indium tin oxide (Indium Tin Oxide, ITO) metal wire, an aluminum zinc oxide (Alumina zinc, AZO) metal wire, and the like.
  • the pixel driving circuits are all disposed on the same surface of the substrate 170 .
  • the substrate 170 may include a polyimide (PI) substrate 171 and a buffer layer 172 arranged alternately in sequence, and further includes a gate insulating layer 173, an interlayer insulating layer 174, a planarization layer 175, and pixel definition layers arranged on the buffer layer 172. Layer 176. Wherein, each pixel of the first display unit and the second display unit is formed on the pixel definition layer 176 . Further, the first driving module 120 a and the second driving module 120 b are formed in the gate insulating layer 173 , the interlayer insulating layer 174 and the planarization layer 175 .
  • PI polyimide
  • the first driving module 120a includes a gate 1201, a source 1202, a drain 1203, a source contact structure 1204, and a drain contact structure 1205, wherein the anode layer 1207 in the first light emitting device 110a passes through the metal wiring L It is electrically connected with the drain 1203 .
  • the second driving module 120b may include a gate 1201, a source 1202, a drain 1203, a source contact structure 1204, and a drain contact structure 1205.
  • the anode layer 1207 in the second light emitting device 110b is connected to the drain 1203 through the metal wiring L. electrical connection.
  • the lengths of the metal wires L of each first light emitting device 110a will be different, and the RC generated on the metal wires L will be different.
  • the load (RC Loading) is also different, so that the lighting time of each first light emitting device 110a is inconsistent, resulting in uneven display brightness of the first display area 101, as shown in FIGS.
  • the display of 101 and the second display area 102 is uneven, which seriously reduces the display effect of the display device.
  • the embodiment of the present application provides a pixel driving circuit, which can reduce the anode charging time difference between each first light emitting device 110a (or shorten the anode charging time difference between each first light emitting device 110a and second light emitting device 110b), reduce the point
  • the bright threshold voltage can further eliminate the influence of different metal trace lengths on the lighting time of the light emitting device 110, so that the lighting time of the first light emitting device 110a with different luminous colors in the first display area 101 is the same, ensuring that the first display area
  • the display uniformity of 101 can also keep the brightness of the first display area 101 consistent with the brightness of the second display area 102, thereby improving the display effect of the display device.
  • the pixel driving circuit can be used to drive the m first light emitting devices 110 a in the first display area 101 .
  • the pixel driving circuit may include m first driving modules 120a, and each first driving module 120a may be correspondingly connected to a first light emitting device 110a for driving the first light emitting device 110a to emit light.
  • the pixel driving circuit can also be used to drive m first light emitting devices 110 a in the first display area 101 and n second light emitting devices 110 b in the second display area 102 .
  • the pixel driving circuit may include m first driving modules 120a and n second driving modules 120b, and each first driving module 120a may be correspondingly connected to a first light emitting device 110a for driving the first light emitting device 110a To emit light, each second driving module 120b can be correspondingly connected to a second light emitting device 110b for driving the second light emitting device 110b to emit light.
  • each first driving module 120a and each second driving module 120b include an anode reset unit 121, a drive transistor T1, and a connection for connecting the anode reset unit and the light emitting device.
  • the target metal trace L such as an ITO trace.
  • Each anode reset unit 121 can be used to receive the first scan signal Scan(n); the input terminal of the anode reset unit 121 is used to receive the first reset voltage Vinit1.
  • the output terminals of the anode reset unit 121 are respectively connected to the second pole of the driving transistor T1 and the anode of the light emitting device. Specifically, if the driving module 120 is the first driving module 120a, the output end of the anode reset unit 121 is correspondingly connected to the anode of the first light emitting device 110a. If the driving module 120 is the second driving module 120b, the output end of the anode reset unit 121 is correspondingly connected to the anode of the second light emitting device 110b.
  • the driving transistor T1 may be a thin film transistor (Thin Film Transistor, TFT), or a metal oxide semiconductor field effect transistor (Metal Oxide Semiconductor Field-Effect Transistor, MOSFET), which is not limited herein.
  • TFT Thin Film Transistor
  • MOSFET Metal Oxide Semiconductor Field-Effect Transistor
  • the functions of the first pole and the second pole of the driving transistor T1 can be interchanged according to the type of the transistor and the signal at the signal terminal, for example, the first pole can be the source, and correspondingly, the second pole can be The second pole is the drain, the other is the first pole, and the second pole is the source.
  • the driving transistor T1 is used to generate the driving current.
  • the control electrode of the driving transistor T1 is used for receiving the second scanning signal Scan(n-1), and the first electrode of the driving transistor T1 is used for receiving the first power supply voltage VDD.
  • the second pole of the driving transistor T1 is connected to the anode terminal of the light emitting device 110a, and the second pole of the driving transistor T1 can output a driving current correspondingly, and the current value of the driving current directly affects the luminance of the light emitting device 110a.
  • the anode reset unit 121 is used to receive the first reset voltage Vinit1 through the input terminal after the gate of the driving transistor T1 is reset, and pull down the anode voltage of the light emitting device 110a connected thereto to the first reset voltage Vinit1, so as to control the light emitting device
  • the anode of 110a is reset.
  • the first reset voltage Vinit1 can be understood as the initial charging voltage of the anode of the light emitting device 110a.
  • the initial charging voltage of the anode of the light emitting device 110a can be changed.
  • the driving current flows to the anode of the light-emitting device 110a to drive the light-emitting device 110a to emit light. Therefore, the first reset voltage Vinit1 will not affect the driving current, thereby ensuring the reliability of the light-emitting brightness of the light-emitting device 110a.
  • the magnitude of the first reset voltage Vinit1 received by the input terminal of the anode reset unit 121 in each driving module 120 is positively correlated with the target metal trace length.
  • the target metal trace length is the length of the target metal trace L in the same drive module 120 as the anode reset unit 121 . Specifically, if the loaded first reset voltage Vinit1 of each light emitting device 110 is the same, since the longer the target metal wire length is, the greater the RC loading on the target metal wire is, and the threshold for lighting up the light emitting device 110 is reached. The anode charging time of the voltage is also longer.
  • the preset metal wiring can be understood as the shortest target metal wiring among the multiple first light-emitting devices 110a .
  • the influence of the length difference between the wire and the preset metal wiring on the anode charging time so that the anode charging time of each first light-emitting device 110a is consistent, so that the lighting time of each first light-emitting device 110a is the same, thereby ensuring multiple
  • the first light-emitting devices 110a are turned on at the same time, so that the display brightness of each first light-emitting device 110a in the first display area 101 is consistent, and the display effect of the display device is improved.
  • the preset metal wiring can be understood It is the target metal wiring of any second light emitting device 110b. That is to say, in the embodiment of the present application, the first reset voltage Vinit12 received by the input terminal of the anode reset unit 121 in each second driving module 120b is equal and less than the anode reset voltage Vinit12 in each first driving module 120a. The input terminal of the unit 121 receives the first reset voltage Vinit11. The light-up time of different colors of light-emitting devices is different, as shown in Figure 8 below.
  • a is the duration of the light-emitting device from the light-up stage to the stable light-emitting stage
  • b is the entire process of the light-emitting device from the off-light stage to the stable light-emitting stage. total time.
  • the solid line indicates the anode charging time of the R, G, and B pixels in the second light-emitting device 110b in the second display area 102
  • the dotted line indicates the R, G, and B pixels in each of the first light-emitting devices 110a in the first display area 101. anode charging time.
  • the first reset voltage received by the input terminal of the anode reset unit 121 in each first driving module 120a can be correspondingly adjusted according to the target metal trace length of each first light emitting device 110a, for example, the first reset voltage is increased, To increase the anode initial charging voltage of each first light-emitting device 110a, reduce the voltage difference between the threshold voltage and the anode charging initial voltage, thereby shortening the anode charging time from the anode initial charging voltage to the threshold voltage, and at the same time, It is also possible to adjust the first reset voltage to keep the voltage differences of the first light-emitting devices 110a of different colors consistent, so as to shorten or eliminate the anode charging time of different light-emitting colors, such as ⁇ R, ⁇ G, and ⁇ B values, and shorten Or eliminate the impact of RC loading on the anode charging time of each first light emitting device 110a, so that multiple first light emitting devices 110a in the first display area 101 and multiple second light emitting devices 110
  • the pixel driving circuit provided in the embodiment of the present application can adjust the first reset voltage Vinit1 applied to the light emitting device according to the target metal trace length corresponding to each light emitting device, thereby shortening the anode charging time of the light emitting device, and further
  • the effect of the length difference between the target metal trace and the preset metal trace on the anode charging time can be offset, so that the anode charging time of each light-emitting device is consistent, so that the lighting time of each light-emitting device is the same, and thus can ensure that each light-emitting device The light-emitting devices are simultaneously lit, which improves the display effect of the display device.
  • the circuit of the first driving module 120a and the circuit of the second driving module 120b may be the same or different, for the convenience of description, the circuit of the first driving module 120a and the second driving module 120b are the same as an example Be explained. It should be noted that the same circuit means that the first driving module 120 a and the second driving module 120 b include the same devices, and the connection relationship between the included devices is also the same. However, it should be noted that the input signals of the input terminals of the anode reset unit 121 in the first driving module 120a and the second driving module 120b are different.
  • the cathode of the light emitting device in the same driving module 120 is also connected to the second power supply voltage terminal for providing the second power supply voltage VSS.
  • the difference between the first reset voltage Vinit11 and the second power supply voltage VSS is less than the threshold voltage to turn on the voltage of the light-emitting device 110, so that it can ensure that the electroluminescent The device 110 is illuminated to avoid the problem that the light emitting device 110 is black and the screen is bright.
  • the threshold voltage can be understood as the voltage of the light emitting device 110 for turning on the light emitting device 110 , that is, when the voltage difference between the anode and the cathode of the light emitting device 110 reaches the threshold voltage, the light emitting device 110 can emit light.
  • both the first driving module 120 a and the second driving module 120 b further include a gate reset unit 123 .
  • the control end of the gate reset unit 123 is used to receive the second scanning signal Scan (n-1); the input terminal of the gate reset unit 123 is used to receive the second reset voltage Vinit2; the output terminal of the gate reset unit 123 Connected to the gate of the drive transistor T1.
  • the gate reset unit 123 can pull down the gate voltage of the driving transistor T1 to the second reset voltage Vinit2 according to the received second scan signal Scan(n ⁇ 1), so as to reset the gate of the driving transistor T1 .
  • the second reset voltage Vinit2 is a voltage capable of turning on the driving transistor T1.
  • the driving transistor T1 is a P-type MOS transistor, that is, the driving transistor T1 is turned on at a low level, that is, the gate-source voltage of the driving transistor T1
  • the second reset voltage Vinit2 can be set to be a low level voltage, for example -2.5V. It can be understood that, by setting the gate reset unit 123, the gate of the driving transistor T1 can be reset.
  • the pixel driving circuit further includes a second scanning signal line (not shown in the figure) for providing a second scanning signal Scan(n ⁇ 1).
  • the gate reset unit 123 can transmit the second reset voltage Vinit2 to the gate of the driving transistor T1 according to the second scan signal Scan(n ⁇ 1).
  • the gate reset unit 123 may include a gate reset transistor T4.
  • the control electrode of the gate reset transistor T4 is connected to the second scanning signal line
  • the first electrode of the gate reset transistor T4 is used to receive the second reset signal Vinit2
  • the second electrode of the gate reset transistor T4 is connected to the drive transistor T1.
  • the gate is connected, and the gate reset transistor T4 is used to control the on-off of the signal transmission path between the gate of the drive transistor T1 and the first electrode according to the second scanning signal.
  • the first pole and the second pole of the gate reset transistor T4 can be interchanged according to the type of the transistor and the signal at the signal terminal, for example, the first pole can be the source, correspondingly , the second pole is the drain, the other is the first pole the drain, and the second pole is the source.
  • the gate reset transistor T4 is a P-type MOS transistor as an example for description. Wherein, the drain and the source of the P-type MOS transistor serve as the first pole and the second pole of the gate reset transistor T4 respectively.
  • the gate reset phase when the first scan signal Scan(n-1) is at a low level, the conduction of the signal transmission path between the gate of the driving transistor T1 and the first electrode is controlled to control the gate of the driving transistor T1 pole to reset.
  • the light-emitting phase when the first scan signal Scan(n-1) is at a high level, the disconnection of the signal transmission path between the gate of the driving transistor T1 and the first electrode of the driving transistor T1 is controlled, so that the driving transistor T1 The driving current can be output during the light emitting stage to control the light emitting device 110 to emit light.
  • the voltage difference between the second reset voltage Vinit2 and the second scanning signal Scan(n-1) received by the gate of the gate reset transistor T4 is smaller than the preset voltage, so as to avoid the gate reset when the voltage difference at this point is too large.
  • Transistor T4 generates additional leakage current, which affects the signal received by the gate of driving transistor T1 , thereby causing a decrease in display quality and even abnormal display problems.
  • the gate reset transistor can also be a double-gate transistor, specifically a double-gate field effect transistor.
  • the field effect transistor of the double gate field effect transistor is controlled by the signals received by the two gates, so it has better stability and reliability.
  • the gate reset transistor of the double gate transistor structure is adopted, The reliability of the anode reset can be effectively improved, thereby improving the display quality of the display device.
  • the pixel driving circuit further includes a first scanning signal line (not shown in the figure) for providing the first scanning signal Scan(n).
  • the anode reset unit 121 includes an anode reset transistor T7.
  • the gate of the anode reset transistor T7 is connected to the first scanning signal line, the first pole of the anode reset transistor T7 is used to receive the first reset voltage, and the second pole of the anode reset transistor T7 is used to be connected to the anode of the light emitting device,
  • the anode reset transistor T7 can control the on-off of the signal transmission path between the first pole of the anode reset transistor T7 and the anode of the light emitting device 110 according to the second scan signal Scan(n), and when the signal transmission path is turned on, it can The first reset voltage Vinit1 is transmitted to the anode of the light emitting device 110 .
  • the anode reset transistor T7 is a P-type MOS transistor as an example for description. Specifically, in the anode reset phase, when the second scan signal Scan(n) is at a low level, the anode reset transistor T7 is controlled to be turned on, so as to reset the anode of the light emitting device 110; in the light emitting phase, when the second scan signal Scan When (n) is high level, the control anode reset transistor T7 is turned off.
  • the second scan signal Scan(n-1) and the first scan signal Scan(n) are used to distinguish the scan signals input to the drive module 120 at different times, and each scan signal can be used to control Driving multiple transistors in the module 120 . It can be understood that there must be a difference between the second scan signal Scan(n-1) and the first scan signal Scan(n) only at the input time, and the embodiment of the present application does not make a difference between the second scan signal Scan(n-1) and the first scan signal Scan(n). Other characteristics of a scan signal Scan(n) are specifically defined.
  • the scanning signals connected to different light emitting devices can also be specifically set according to the refresh method.
  • the pixel driving circuit further includes a data signal line (not shown in the figure) for transmitting the data signal Data.
  • the first driving module 120 a is taken as an example for description, wherein the first driving module 120 a may further include a data writing unit 124 , a threshold compensation unit 125 and a light emission control unit 126 .
  • the input terminal of data writing unit 124 is used for receiving data signal Data
  • the control terminal of data writing unit 124 is connected with the first scanning signal line, is used for receiving first scanning signal Scan (n)
  • data writing unit 124 The output terminal of is connected to the second pole of the driving transistor T1, and the data writing unit 124 is used for transmitting the data signal Data to the second pole of the driving transistor T1 according to the first scan signal Scan(n).
  • the data writing unit 124 writes the data signal Data into the second electrode of the driving transistor T1 in the data writing phase, so that the driving transistor T1 generates a signal corresponding to the data signal Data in the light emitting phase.
  • the corresponding gate-source voltage difference controls the magnitude of the driving current generated by the driving transistor T1.
  • the threshold compensation unit 125 is respectively connected to the gate and the second electrode of the driving transistor T1, and is used for controlling the on-off of the signal transmission path between the gate and the second electrode of the driving transistor T1 according to the second scan signal Scan(n). Specifically, by setting the threshold compensation unit 125 , the threshold voltage of the driving transistor T1 can be compensated, so as to prevent the threshold voltage of the driving transistor T1 from affecting the brightness of the light emitting device 110 .
  • the light emission control unit 126 is respectively connected to the first pole, the second pole of the driving transistor T1, and the anode of the light emitting device 110, and is also used for receiving the light emission control signal EM and the first power supply voltage signal VDD.
  • the light emission control unit 126 is used for controlling the on-off of the signal transmission path from the first power supply voltage signal VDD to the driving transistor T1 according to the light emission control signal EM.
  • the driving transistor T1 When the signal transmission path of the first power supply voltage signal VDD is turned on, the first pole of the driving transistor T1 is pulled up to the first power supply voltage VDD, while the gate and the second pole of the driving transistor T1 remain in the data writing phase The voltage formed later, therefore, can make the driving transistor T1 have a required gate-source voltage difference and generate a corresponding driving current.
  • the driving current is transmitted to the anode of the light emitting device 110, the light emitting device 110 can emit light under the control of the light emitting control signal EM, and the luminous brightness corresponds to the current value of the driving current.
  • the data writing unit 124 includes a data writing transistor T2, the control electrode of the data writing transistor T2 is connected to the first scanning signal line, and the first electrode of the data writing transistor T2 is connected to the data signal line. connected, the second pole of the data writing transistor T2 is connected to the first pole of the driving transistor T1, and the data writing transistor T2 is used to control the control pole of the data writing transistor T2 and the driving transistor T1 according to the first scan signal Scan(n) On-off of the signal transmission path between the first poles.
  • the functions of the first pole and the second pole of the data writing transistor T2 can be interchanged according to the type of the transistor and the signal at the signal terminal, for example, the first pole can be the source, correspondingly , the second pole is the drain, the other is the first pole the drain, and the second pole is the source.
  • the data writing transistor T2 as a P-type transistor as an example, the drain and the source of the P-type transistor serve as the first pole and the second pole of the data writing transistor T2 respectively.
  • the data writing transistor T2 When the second scan signal Scan(n) is at low level, the data writing transistor T2 is turned on, thereby transmitting the data signal Data to the first pole of the driving transistor T1; when the writing of the data signal Data is completed, the second The scan signal Scan(n) is switched to a high level to disconnect the signal transmission path of the data signal Data.
  • the data writing unit 124 is not limited to the data writing transistor T2 of this embodiment, and may also be other circuit structures capable of realizing the signal transmission function according to the enable control signal.
  • the threshold compensation unit 125 includes a threshold compensation transistor T3 and a storage capacitor C1.
  • One end of the storage capacitor C1 is used to connect to the first power supply voltage end for receiving the first power supply voltage VDD, and the other end of the storage capacitor C1 is connected to the gate of the driving transistor T1.
  • the gate of the threshold compensation transistor T3 is connected to the first scanning signal line, the first electrode of the threshold compensation transistor T3 is connected to the second electrode of the driving transistor T1, and the second electrode of the threshold compensation transistor T3 is connected to the gate of the driving transistor T1.
  • the threshold compensation transistor T3 is used for controlling the on-off of the signal transmission path between the gate and the second electrode of the driving transistor T1 according to the first scan signal Scan(n).
  • the threshold compensation transistor T3 as a P-type transistor as an example, the drain and the source of the gate of the P-type transistor serve as the first pole and the second pole of the gate of the P-type transistor respectively.
  • the threshold compensation transistor T3 is turned on to perform threshold compensation and charge the storage capacitor C1 , thereby storing the compensation result in the storage capacitor C1 .
  • the threshold compensation transistor T3 may also be a double-gate transistor.
  • the threshold compensation transistor T3 with a double-gate transistor structure can effectively improve the reliability of the threshold compensation, thereby improving the display quality of the display device. It can be understood that other transistors in the pixel driving circuit can also be double-gate transistors to further improve display quality.
  • the light emission control unit 126 includes a first control transistor T5 and a second control transistor T6 .
  • the gate of the first control transistor T5 is used to receive the light emission control signal EM
  • the first pole of the first control transistor T5 is connected to the first power supply voltage terminal
  • the second pole of the first control transistor T5 is respectively connected to the data writing transistor
  • the second pole of T2 is connected to the first pole of the driving transistor T1
  • the first control transistor T5 is used to control the on-off of the signal transmission path between the first power supply voltage terminal and the first pole of the driving transistor T1 according to the light emission control signal EM .
  • the gate of the second control transistor T6 is used to receive the light emission control signal EM, the first pole of the second control transistor T6 is connected to the second pole of the driving transistor T1, and the second pole of the second control transistor T6 is connected to the anode of the light emitting device 110
  • the second control transistor T6 is used to control the on-off of the signal transmission path between the second pole of the driving transistor T1 and the anode of the light-emitting device 110 according to the light-emitting control signal EM.
  • the functions of the first pole and the second pole of the first control transistor T5 and the second control transistor T6 can be interchanged according to the type of the transistor and the signal at the signal terminal, for example, it can be the first One pole is the source, correspondingly, the second pole is the drain, the other is the first pole the drain, and the second pole is the source.
  • the first control transistor T5 and the second control transistor T6 are both P-type transistors for illustration, wherein the drains of the P-type transistors serve as the first control transistors of the first control transistor T5 and the second control transistor T6 respectively. poles, and the sources of the P-type transistors serve as the second poles of the first control transistor T5 and the second control transistor T6 respectively.
  • the first control transistor T5 and the second control transistor T6 are turned on, and the voltage of the first electrode of the driving transistor T1 is pulled up to the first power supply voltage VDD, and the gate of the first driving transistor T1
  • the source voltage difference varies to generate a driving current and output the driving current to the light emitting device 110, thereby controlling the light emitting device 110 to emit light.
  • the driving transistor T1 as an example of a P-type MOS transistor
  • the drain and source of the P-type MOS transistor serve as the first pole and the second pole of the driving transistor T1 respectively. Therefore, the drive transistor T1 is turned on at a low level, that is, it is turned on when the gate-source voltage difference of the drive transistor T1 is less than the preset gate-source voltage Vth, then the second reset voltage Vinit2 can be set to a low-level voltage, for example -2.5 V.
  • the second reset voltage Vinit2 is a voltage capable of turning on the driving transistor T1.
  • the control electrode of the drive transistor T1 can be reset, so as to avoid the problem that the drive transistor T1 remains off due to not being reset, thereby avoiding the problem that the data signal Data cannot be written correctly, thereby improving the pixel density. drive circuit reliability.
  • the second reset voltage Vinit2 is greater than the first reset voltage Vinit1 in the same driving module 120 .
  • the second reset voltage Vinit2 is set at about -3V.
  • the first reset voltage Vinit1 received by the input terminal of the anode reset unit 121 in the first drive module 120a is between -1V--3-3V--5V, wherein, the input of the anode reset unit 121 in the second drive module 120b
  • the first reset voltage Vinit1 received by the terminal is between -3V ⁇ -5V.
  • the first reset voltage Vinit1 and the second reset voltage Vinit2 can also be adjusted according to actual conditions.
  • the second reset voltage Vinit2 received by the input terminal of the gate reset unit 123 is greater than the first reset voltage Vinit1, thus reducing the voltage difference between the second reset voltage Vinit2 and the data signal Data, and in the same driving Driven by a high-capacity driving circuit, the charging time can be shortened, and the display efficiency can be improved.
  • the various transistors in this embodiment are not limited to the P-type transistors in the foregoing embodiments, and may also be N-type transistors, other circuit structures capable of realizing signal transmission functions according to the enable control signal, and the like. For different types of transistors, their corresponding driving methods can also be adaptively adjusted.
  • the driving module 120 of this embodiment is not limited to the 7T1C driving circuit in the foregoing embodiments, that is, the driving module 120 may also have other numbers of transistors, so as to realize a lightweight display device with a small number of transistors, Alternatively, more flexible display functions can be realized with a larger number of transistors, for example, other types of driving circuits such as 3T1C, 6T1C, 6T2C, etc. can also be used.
  • the display panel further includes a display area AA and a non-display area NAA arranged around the display area AA.
  • a plurality of light emitting devices and a driving module for correspondingly driving each light emitting device 110 are arranged in the display area AA.
  • the display panel further includes a display driver chip 150 , a plurality of first reset wirings 131 , a plurality of second reset wirings 132 and a plurality of third reset wirings 133 .
  • the display driving chip 150 is disposed in the non-display area NAA and connected to the pixel driving circuit. Specifically, the display driving chip 150 can generate a corresponding first reset signal based on the target metal wire length of each light emitting device 110 . That is, the first reset signals of the first light emitting devices 110a are not completely the same, and the second reset voltages Vinit2 of the second light emitting devices 110b are the same.
  • first reset wires 131 are used to transmit the first reset signal received by the input terminal of the anode reset unit 121 in the first driving module 120a.
  • each first reset wire 131 is respectively connected to the display driver chip 150 and the first driver module 120a. Multiple first reset wires 131 are arranged in parallel.
  • the first reset wiring 131 is used to transmit the first reset signal output by the display driving chip 150 to the first driving module 120a, so as to perform anodic reset on the anode reset unit 121 in the first driving module 120a.
  • Each second reset wire 132 is respectively connected to the display driver chip 150 and the second driver module 120b. Multiple second reset wires 132 are arranged in parallel. The second reset wiring 132 is used to transmit the first reset signal output by the display driving chip 150 to the second driving module 120b, so as to perform anodic reset on the anode reset unit 121 in the second driving module 120b.
  • a plurality of third reset wires 133 are used to transmit the second reset voltage Vinit2. Specifically, each third reset wiring 133 is respectively connected to the display driver chip 150 and the gate reset unit 123, and a plurality of third reset wirings 133 are arranged in parallel, and the third reset wiring 133 is used to apply the second reset voltage Vinit2 is transmitted to the gate reset unit 123 to reset the gate of the gate reset unit 123 .
  • the first reset wiring 131, the second reset wiring 132, and the third reset wiring 133 extends in the first direction in the display area AA, and the rest of the reset wiring runs in the display area AA.
  • the extending direction of the traces is the second direction, wherein the first direction and the second direction are vertically arranged.
  • the first direction can be understood as the width direction of the display panel, and can also be understood as the row direction of the arrangement direction of the light emitting devices 110;
  • the second direction can be understood as the length direction of the display panel, and can also be understood as the direction of the arrangement direction of the light emitting devices 110. column direction.
  • the extension direction of the first reset wiring 131 and the second reset wiring 132 in the display area AA can be the first direction, that is, the left and right outlets are adopted, and the horizontal wiring is connected. to the pixel driver circuit.
  • the first reset signal transmitted by the first reset wiring 131 can reset the anode of the first light emitting device 110a in the first display area 101; the first reset signal transmitted by the second reset wiring 132 can reset the anode of the second display area 101.
  • the anode of the second light-emitting device 110b in the area 102 is reset, and the extension direction of the third reset line 133 in the display area AA can be the second direction, that is, the upper and lower lines are used to connect to the pixel drive circuit.
  • the second reset voltage Vinit2 transmitted by the third reset wire 133 can reset the control electrode of the gate driving transistor T1 in the pixel driving circuit.
  • the third reset wiring 133 used to transmit the gate reset signal adopts vertical wiring
  • the first reset wiring 131 and the second reset wiring 132 used to transmit the anode reset signal adopt horizontal wiring.
  • the first reset wiring 131 , the second reset wiring 132 , and the third reset wiring 133 are arranged on the source-drain (SD) metal wiring layer.
  • the left and right borders can also be reduced to realize a display panel with narrow borders.
  • the extending direction of the first reset wiring 131, the second reset wiring 132, and the third reset wiring 133 in the display area AA can all be the first direction, that is, the way of going out from the left and right can be adopted, Connect to the pixel driving circuit through horizontal wiring.
  • the extension direction of the third reset wiring 133 in the display area AA can be the first direction, that is, it can be connected to the pixel driving circuit through a horizontal wiring in a way of going out from the left and right.
  • the extending direction of the first reset wiring 131 and the second reset wiring 132 in the display area AA can be the second direction, that is, they can be connected to the pixel driving circuit through vertical wiring in the way of upper and lower wiring.
  • the non-display area NAA includes a first area 141 , a second area 142 , a third area 143 and a fourth area 144 connected in sequence.
  • the first region 141 and the third region 143 are arranged in parallel
  • the second region 142 and the fourth region 144 are arranged in parallel
  • the second region 142 is connected to the first region 141 and the third region 143 respectively.
  • the non-display area NAA includes a first area 141 and a third area 143 respectively located on the upper side, lower side, left side, and right side of the display area AA.
  • the fourth area 144 and the second area 142 is a first area 141 and a third area 143 respectively located on the upper side, lower side, left side, and right side of the display area AA.
  • the plurality of third reset routing lines 133 located in the non-display area NAA are uniformly distributed in the first area 141 and the third area 143; the plurality of second reset routing lines 132 located in the non-display area NAA Evenly distributed in the second area 142 and the fourth area 144 ; the plurality of first reset wiring lines 131 located in the non-display area NAA are evenly distributed in the second area 142 and the fourth area 144 .
  • the extending directions of the same reset wiring in the display area AA and the non-display area NAA are perpendicular to each other. Exemplarily, if the extending direction of the first reset wiring 131 in the display area AA is the first direction, then the extending direction of the first reset wiring 131 in the non-display area NAA is the second direction.
  • the arrangement of the first reset wiring 131, the second reset wiring 132, and the third reset wiring 133 in the display area AA and the non-display area NAA is not limited to the above-mentioned examples. It can also be set according to actual needs.
  • the non-display area NAA of the display panel 100 is further provided with a bending area (Bending area) 160 to realize a curved narrow frame.
  • the overall circuit complexity of the display panel can be simplified , which is conducive to the formation of narrow borders.
  • FIG. 14 is a flow chart of the control method in one embodiment.
  • the control method of the display panel can be applied to any of the aforementioned implementations.
  • the control method of this embodiment is applied to the display driving chip 150 , and is described by taking the control method of the pixel driving circuit shown in the embodiment of FIG. 6 as an example.
  • the method for controlling the display panel includes step 1402 to step 1406,
  • Step 1402 acquiring target metal trace lengths of each light emitting device respectively.
  • the target metal trace length of each light emitting device 110 may be obtained for each light emitting device 110 .
  • the target metal wire length can be understood as the wire length of the metal wire L between the light emitting device 110 and the driving module 120 for driving the light emitting device 100 .
  • the obtained target metal trace lengths of each light emitting device 110 can be identified, that is, the target metal traces of each light emitting device 110 have unique identification information, and based on the identification information, the lengths of the target metal traces of each light emitting device 110 can be identified.
  • the target metal trace length is stored.
  • Step 1404 acquiring the first reset voltage of each light emitting device according to the target metal wire length.
  • the target metal trace length is positively correlated with the first reset voltage, that is, the longer the target metal trace length, the greater the first reset voltage applied to the input end of the anode reset unit.
  • the anode reset unit is an anode reset unit in a driving module for driving the light emitting device. Based on a large amount of test data, a mapping relationship between the first reset voltage and the target metal trace length can be constructed.
  • the mapping relationship may be a one-variable linear function relationship, or a one-variable multiple-time functional relationship, and the like. In the embodiment of the present application, no further limitation is made on the mapping relationship. According to the target metal wire length and the mapping relationship of each light emitting device 110, the first reset voltage of each light emitting device can be determined.
  • the display driver chip 150 can correspondingly output a first reset voltage positively related to the target metal wire length of each light-emitting device 110 for each light-emitting device 110, and transmit it to the
  • the anode reset unit 121 of each light emitting device 110 is used to reset the anode of each light emitting device 110 .
  • the driving method of the display panel in this embodiment can correspondingly adjust the magnitude of the first reset voltage Vinit11 received by the input end of each anode reset unit 121 according to the target metal trace length of each light emitting device 110, for example, increase the first reset voltage Vinit11, to increase the anode initial charging voltage of each light-emitting device 110, reduce the voltage difference between the threshold voltage and the anode charging initial voltage, and then shorten the anode charging time from the anode initial charging voltage to the threshold voltage, thereby shortening Or eliminate the impact of RC loading on the anode charging time of the first light emitting device 110a, so that multiple first light emitting devices 110a in the first display area 101 and multiple second light emitting devices 110b in the second display area 102 are simultaneously lit, Furthermore, the uniformity of the brightness of the first display area 101 and the second display area 102 can be ensured.
  • control method of the display panel further includes: adjusting the first reset voltage to keep the voltage difference of each first light emitting device consistent, wherein the voltage difference is the threshold voltage of each light emitting device and the voltage difference between the first reset voltage.
  • the voltage differences of the first light-emitting devices 110a of different colors are kept consistent, for example, the voltage differences of the red light-emitting device, green light-emitting device and blue light-emitting device (for example ⁇ R, ⁇ G, ⁇ B values) are consistent, then the anode charging duration of different luminescent colors can be shortened or eliminated, so as to further shorten or eliminate the influence of RC loading on the anode charging duration of the first light emitting device 110a, so that the first The multiple first light-emitting devices 110 a of the display area 101 and the multiple second light-emitting devices 110 b of the second display area 102 are turned on at the same time, thereby ensuring uniformity of brightness between the first display area 101 and the second display area 102 .
  • the display panel drive method further includes: in the reset phase, controlling the gate reset in each drive module The input terminal of the cell receives a second reset voltage, wherein the second reset voltage is greater than the first reset voltage.
  • the distance between the second reset voltage Vinit2 and the data signal Data is reduced.
  • the voltage difference, driven by a driving circuit with the same driving capability, can shorten the charging time, thereby improving the display efficiency.
  • steps in the flow chart of FIG. 14 are displayed sequentially as indicated by the arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least some of the steps in Figure 14 may include multiple sub-steps or multiple stages, these sub-steps or stages are not necessarily executed at the same moment, but may be executed at different moments, the execution of these sub-steps or stages The order is not necessarily performed sequentially, but may be performed alternately or alternately with at least a part of other steps or sub-steps or stages of other steps.

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Abstract

一种像素驱动电路，其中，像素驱动电路包括多个驱动模块(120a)，每一驱动模块(120a)用于驱动与驱动模块(120a)连接的发光器件(110a)，每一驱动模块(120a)均包括：阳极复位单元(121)、驱动晶体管(T1)，以及用于连接阳极复位单元(121)与发光器件(110a)的目标金属走线(L)；其中，阳极复位单元(121)的控制端用于接收第一扫描信号(Scan(n))，阳极复位单元(121)的输入端用于接收第一复位电压(Vinit1)，阳极复位单元(121)的输出端分别与驱动晶体管(T1)的第一极、发光器件(110a)的阳极连接；各阳极复位单元(121)的输入端接收的第一复位电压(Vinit1)与目标金属走线(L)长度正相关。

Description

像素驱动电路、显示面板及其控制方法和显示设备
相关申请的交叉引用
本申请要求于2021年5月19日提交中国专利局、申请号为2021105453718发明名称为“像素驱动电路、显示面板及其控制方法和显示设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及显示技术领域，特别是涉及一种像素驱动电路、显示面板及其控制方法和显示设备。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有示例性技术。
随着科学技术的不断发展，电子设备层出不穷，为人们的日常生活和娱乐带来了极大便利。目前，电子设备不断向着大屏化方向发展，为提高电子设备的屏占比，真正实现全面屏，屏下摄像头技术备受关注。
由于屏下摄像头的存在，屏下摄像头可以将电子设备的显示屏分为第一显示区(主屏区)和第二显示区(副屏区)，即屏下摄像头放置区域。由于第一显示区和第二显示区中各发光器件对应的像素电路的布局影响，会导致在同时驱动位于第一显示区的发光器件和第二显示区的发光器件时，第一显示区和第二显示区的显示亮度不均一，降低了电子设备的显示效果。
发明内容
根据本申请的各种实施例，提供一种像素驱动电路、显示面板及其控制方法和显示设备。
一种像素驱动电路，包括多个驱动模块，每一所述驱动模块用于驱动与所述驱动模块连接的发光器件，每一所述驱动模块均包括：阳极复位单元、驱动晶体管，以及用于连接所述阳极复位单元与所述发光器件的目标金属走线；其中，
所述阳极复位单元的控制端用于接收第一扫描信号，所述阳极复位单元的输入端用于接收第一复位电压，所述阳极复位单元的输出端分别与驱动晶体管的第一极、所述发光器件的阳极连接；
各所述阳极复位单元的输入端接收的所述第一复位电压的大小与目标金属走线长度正相关，其中，所述目标金属走线长度为与所述阳极复位单元在同一所述驱动模块中的所述目标金属走线的长度。
一种显示面板，包括：
多个发光器件，以及
前述的像素驱动电路，其中，多个所述驱动模块一一对应地与多个所述发光器件连接。
一种显示面板的控制方法，应用于前述的显示面板，其中，所述方法包括：
分别获取各所述发光器件的目标金属走线长度；
根据所述目标金属走线长度获取各所述发光器件的第一复位电压；
在阳极复位阶段，控制每一所述驱动模块中的阳极复位单元的输入端同时接收所述第一复位电压。
一种显示设备，包括：感光器件和前述的显示面板；其中，显示面板包括第一显示区和第二显示区，所述感光器件与所述第一显示区对应设置。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其他特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更清楚地说明本申请实施例或传统技术中的技术方案，下面将对实施例或传统技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为一实施例的显示设备的结构示意图；
图2为一实施例的像素驱动电路的电路示意图；
图3为一实施例的像素驱动电路的分布示意图；
图4为一实施例的像素驱动电路的层状结构示意图；
图5a-5e为一实施例的第一显示区的亮度分布示意图；
图6为一实施例的像素驱动电路的电路示意图；
图7为另一实施例的像素驱动电路的电路示意图；
图8为一实施例的不同颜色发光器件的发光过程中，时间与亮度之间的曲线示意图；
图9为再一实施例的像素驱动电路的电路示意图；
图10为又一实施例的像素驱动电路的电路示意图；
图11为一实施例的第一驱动模块的电路示意图；
图12为另一实施例的第一驱动模块的电路示意图；
图13为一实施例的显示面板的复位走线示意图；
图14为一实施例的显示面板的控制方法的流程示意图。
具体实施方式
为了便于理解本申请实施例，下面将参照相关附图对本申请实施例进行更全面的描述。附图中给出了本申请实施例的首选实施例。但是，本申请实施例可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请实施例的公开内容更加透彻全面。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请实施例的技术领域的技术人员通常理解的含义相同。本文中在本申请实施例的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请实施例。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
可以理解，本申请所使用的术语“第一”、“第二”等可在本文中用于描述各种元件，但这些元件不受这些术语限制。这些术语仅用于将第一个元件与另一个元件区分。举例来说，在不脱离本申请的范围的情况下，可以将第一复位电压称为第二复位电压，且类似地，可将第二复位电压称为第一复位电压。第一复位电压和第二复位电压两者都是复位电压，但其不是同一复位电压。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。
如图1所示，本申请实施例提供一种显示设备，显示设备可以为智能手机、平板电脑、游戏设备、增强现实(Augmented Reality，AR)设备、笔记本、桌面计算设备、可穿戴设备等。为方便理解，下面以显示设备为手机进行举例说明。请继续参阅图1，显示设备10包括显示面板100，显示面板100包括邻接的第一显示区101和第二显示区102。在其中一个实施例中，第一显示区101的形状可以是圆形、矩形、椭圆形、多边形、不规则异形等，本发明对此不作限定。
进一步的，请继续参考图1，显示设备10内设有感光器件103，其中，感光器件103至少部分与第一显示区101相对设置。感光器件103通过接收光线实现基于光学参数的测试和 控制。示例性的，感光器件103设置在第一显示区101的下方，感光器件103用于透过显示面板20的第一显示区101发射和/或接收光学信号。也即，第一显示区101是位于感光器件103上方的区域，在本申请实施例中上方是指由显示设备的背壳指向显示屏的方向，下方是指由显示屏指向背壳的方向。其中，感光器件103可以为摄像头，感光器件103还可以为环境光传感器、光学距离传感器(例如，红外传感器、激光传感器、接近传感器、距离传感器，光学距离传感器)、结构光模组、飞行时间测距(Time offlight，TOF)镜头模组、光学指纹传感器等。需要说明的是，上述多种感光器件103仅用于示例性说明，而不用于具体限定本申请的保护范围。为了便于说明，本申请实施例中以感光器件103为摄像头为例进行说明。
如图2及图3所示，显示面板包括多个发光器件以及用于驱动多个发光器件发光的像素驱动电路。其中，第一显示区101包括m个第一发光器件110a，第二显示区102包括n个第二发光器件110b。像素驱动电路可以包括多个由薄膜晶体管(Thin Film Transistor，TFT)电路构成的驱动模块，其中，多个驱动模块包括用于一一对应驱动m个第一发光器件110a发光的m个第一驱动模块120a和用于一一对应驱动n个第二发光器件110b发光的n个第二驱动模块120b；其中，m、n均为大于或等于2的正整数。
第一发光器件110a和第二发光器件110b可以是但不限于有机发光二极管(Organic light-emitting diode，OLED)、量子点发光二极管(Quantum Dot Light Emitting Diodes，QLED)和微米级发光二极管(Micro LED)等。需要说明的是，本申请各实施例均以发光器件为有机发光二极管为例进行说明。其中，各发光器件可为不同颜色的有机发光二极管，如红色OLED、绿色OLED和蓝色OLED等，不同颜色的发光器件的驱动模块可以相同，但不同颜色的发光器件的发光层材料不同，从而实现不同颜色的显示，使得显示设备实现全彩显示。
在应用中，当显示设备是具有显示面板和屏下摄像头的设备时，第一显示区101是位于摄像头上方的区域。如图3所示，其中，用于驱动第一发光器件110a的第一驱动模块120a是设置在第一显示区101的外围，可将第一驱动模块120a设置区域称之为过渡区104或像素驱动电路外置区。位于过渡区104的第一驱动模块120a可通过目标金属走线L与第一显示区101的第一发光器件110a电连接，相应的，第二驱动模块120b也是通过目标金属走线L与第二显示区102的第二发光器件电连接。需要说明的是，各第二驱动模块120b与之对应连接的第二发光器件之间的目标金属走线L的长度相同，其中，各第二驱动模块120b与之对应连接的第二发光器件120a之间的目标金属走线L小于任一第一驱动模块110b与之对应连接的第一发光器件110a之间的目标金属走线L。具体的，目标金属走线L可以是透明金属线，例如，氧化铟锡(Indium Tin Oxide，ITO)金属线、氧化铝锌(Alumina zinc,AZO)金属线等。
如图4所示，在其中一个实施例中，像素驱动电路均设置在基板170的同一面。基板170可包括依次交替设置的聚酰亚胺(PI)衬底171和缓冲层172，还包括设置在缓冲层172上的栅绝缘层173、层间绝缘层174、平坦化层175和像素定义层176。其中，第一显示单元和第二显示单元的各像素形成在像素定义层176上。进一步的，在栅绝缘层173、层间绝缘层174、平坦化层175中还形成了第一驱动模块120a和第二驱动模块120b。具体的，第一驱动模块120a包括栅极1201、源极1202、漏极1203、源极接触结构1204和漏极接触结构1205，其中，第一发光器件110a中的阳极层1207通过金属走线L与漏极1203电性连通。第二驱动模块120b可包括栅极1201、源极1202、漏极1203、源极接触结构1204和漏极接触结构1205，第二发光器件110b中的阳极层1207通过金属走线L与漏极1203电性连通。
由于驱动不同第一发光器件110a的第一驱动模块120a在显示面板内所处的位置不同，会导致各第一发光器件110a的金属走线L的长度不同，进而金属走线L上产生的RC负载(RC Loading)也即不同，使得各第一发光器件110a的点亮时间不一致，导致第一显示区101的显示亮度不均匀，如图5a-5e所示，同时也会导致第一显示区101和第二显示区102的显示不均匀，严重降低了显示设备的显示效果。
为了解决上述问题，本申请实施例提供一种像素驱动电路，可以缩小各第一发光器件110a(或缩短各第一发光器件110a与第二发光器件110b)之间的阳极充电时间差，减小点亮阈 值电压，进而可以消除不同金属走线长度对发光器件110起亮时间的影响，使第一显示区101内具有不同发光颜色的第一发光器件110a的起亮时间相同，保证第一显示区101的显示均一性，也可以使第一显示区101的亮度与第二显示区102的亮度保持一致，进而可提高显示设备的显示效果。
如图6所示，在其中一个实施例中，像素驱动电路可用于驱动第一显示区101的m个第一发光器件110a。具体的，像素驱动电路可包括m个第一驱动模块120a，每一个第一驱动模块120a可对应与一个第一发光器件110a连接，用于驱动第一发光器件110a发光。
如图7所示，在其中一个实施例中，像素驱动电路也可用于驱动第一显示区101的m个第一发光器件110a和第二显示区102的n个第二发光器件110b。具体的，像素驱动电路可包括m个第一驱动模块120a和n个第二驱动模块120b，每一个第一驱动模块120a可对应与一个第一发光器件110a连接，用于驱动第一发光器件110a发光，每一个第二驱动模块120b可对应与一个第二发光器件110b连接，用于驱动第二发光器件110b发光。
请继续参考图6和图7，每个第一驱动模块120a和每个第二驱动模块120b均包括阳极复位单元121、驱动晶体管T1，以及用于连接所述阳极复位单元与所述发光器件的目标金属走线L，例如ITO走线。
每个阳极复位单元121可用于接收第一扫描信号Scan(n)；阳极复位单元121的输入端用于接收第一复位电压Vinit1。阳极复位单元121的输出端分别与驱动晶体管T1的第二极、发光器件的阳极连接。具体的，若驱动模块120为第一驱动模块120a，其阳极复位单元121的输出端则对应与第一发光器件110a的阳极连接。若驱动模块120为第二驱动模块120b，其阳极复位单元121的输出端则对应与第二发光器件110b的阳极连接。
在本申请实施例中，驱动晶体管T1可以是薄膜晶体管(Thin Film Transistor，TFT)，也可以是金属氧化物半导体场效应管(Metal Oxide Semiconductor Field-Effect Transistor，MOSFET)，在此不作限定。
在本申请实施例中，驱动晶体管T1的第一极和第二极可以根据晶体管的类型及信号端的信号的不同，其功能可以互换，比如，可以是第一极为源极，相应地，第二极为漏极，另一是第一极为漏极，第二极为源极。
请继续参考图6，驱动晶体管T1用于生成驱动电流。其中，驱动晶体管T1的控制极用于接收第二扫描信号Scan(n-1)，驱动晶体管T1的第一极用于接收第一电源电压VDD。驱动晶体管T1的第二极与发光器件110a的阳极端连接，驱动晶体管T1的第二极可对应输出驱动电流，驱动电流的电流值直接影响发光器件110a的发光亮度。
阳极复位单元121用于在驱动晶体管T1的栅极复位后，经输入端接收第一复位电压Vinit1，并拉低与之连接的发光器件110a的阳极电压至第一复位电压Vinit1，以对发光器件110a的阳极进行复位。其中，第一复位电压Vinit1可理解为发光器件110a的阳极起始充电电压。在阳极复位阶段，通过对发光器件110a的阳极进行复位，可以改变发光器件110a的阳极起始充电电压。在发光阶段，其驱动电流流向发光器件110a的阳极，以驱动发光器件110a发光，因此，第一复位电压Vinit1不会对驱动电流造成影响，从而确保发光器件110a的发光亮度的可靠性。
其中，每一驱动模块120中阳极复位单元121的输入端接收的第一复位电压Vinit1的大小与目标金属走线长度正相关。其中，目标金属走线长度为与阳极复位单元121在同一所述驱动模块120中的所述目标金属走线L的长度。具体的，若各发光器件110的加载的第一复位电压Vinit1相同，由于目标金属走线长度越长，其目标金属走线上的RC loading也就越大，则到达点亮发光器件110的阈值电压的阳极充电时长也就越长。
请继续参看图6，若像素驱动电路用于驱动第一显示区101的多个第一发光器件110a，则预设金属走线可以理解为多个第一发光器件110a中最短的目标金属走线。通过根据每一第一发光器件110a的目标金属走线长度来对应调节第一发光器件110a的第一复位电压Vinit1，进而可以缩小各第一发光器件110a的阳极充电时长，进而可以抵消目标金属走线与预设金属 走线的长度差对阳极充电时长的影响，以使各个第一发光器件110a的阳极充电时长一致，以使各个第一发光器件110a的启亮时刻相同，进而可以确保多个第一发光器件110a同时被点亮，以使第一显示区101中各个第一发光器件110a的显示亮度一致，提高了显示设备的显示效果。
请继续参看图7，若像素驱动电路用于驱动第一显示区101的多个第一发光器件110a和第二显示区102的多个第二发光器件110b时，则预设金属走线可以理解为任一第二发光器件110b的目标金属走线。也就是说，在本申请实施例中，每个第二驱动模块120b中的阳极复位单元121的输入端接收的第一复位电压Vinit12均相等，且小于每个第一驱动模块120a中的阳极复位单元121的输入端接收的第一复位电压Vinit11。不同颜色的发光器件的点亮时间不同，如下图8所示，图中a为发光器件从亮起阶段到稳定发光阶段过程的时长，b为发光器件从不亮阶段到稳定发光阶段全过程的总时长。具体的，实线表示第二显示区102中第二发光器件110b中R、G、B像素的阳极充电时长，虚线表示第一显示区101中各第一发光器件110a中R、G、B像素的阳极充电时长。
本申请实施例，可根据各个第一发光器件110a的目标金属走线长度来对应调节各第一驱动模块120a中阳极复位单元121输入端接收到第一复位电压，例如，提高第一复位电压，以提高各第一发光器件110a的阳极起始充电电压，减少阈值电压与阳极充电起始电压之间的电压差，进而可以缩短从阳极起始充电电压充电至阈值电压的阳极充电时长，同时，还可以通过调节第一复位电压，使不同颜色的各第一发光器件110a的电压差保持一致，以缩短或消除不同发光颜色的阳极充电时长，例如△R、△G、△B值，并缩短或消除RC loading对各第一发光器件110a的阳极充电时长的影响，使第一显示区101的多个第一发光器件110a和第二显示区102的多个第二发光器件110b的同时起亮，进而可以保证第一显示区101和第二显示区102亮度的均一性。
本申请实施例提供的像素驱动电路，可以根据每一发光器件对应的目标金属走线长度来对应调节施加在该发光器件上的第一复位电压Vinit1，进而可以缩小发光器件的阳极充电时长，进而可以抵消目标金属走线与预设金属走线之间的长度差对阳极充电时长的影响，以使各个发光器件的阳极充电时长一致，以使各个发光器件的启亮时刻相同，进而可以确保各发光器件同时被点亮，提高了显示设备的显示效果。
在本申请实施例中，以第一驱动模块120a的电路和第二驱动模块120b的电路可以相同，也可以不同，为了便于说明以第一驱动模块120a和第二驱动模块120b的电路相同为例进行说明。需要说明的是，电路相同指的是，第一驱动模块120a和第二驱动模块120b包括的器件相同，所包括的器件与器件之间的连接关系也相同。但是，需要说明的是第一驱动模块120a和第二驱动模块120b中的阳极复位单元121的输入端的输入信号不同。
请继续参考图7，在其中一个实施例中，同一驱动模块120中发光器件的阴极还与用于提供第二电源电压VSS的第二电源电压端连接。其中，第一复位电压Vinit11与第二电源电压VSS的差值小于阈值电压以启亮发光器件110的电压，这样就可以保证在非发光阶段(例如，阳极复位阶段)，不足以使电致发光器件110发亮，以避免发光器件110出现黑屏发亮的问题出现。其中，阈值电压可以理解为发光器件110的用于启亮发光器件110的电压，也即，当发光器件110阳极和阴极之间的电压差达到阈值电压时，发光器件110即可发光。
如图9所示，在其中一个实施例中，第一驱动模块120a和第二驱动模块120b都还包括栅极复位单元123。其中，栅极复位单元123的控制端用于接收第二扫描信号Scan(n-1)；栅极复位单元123的输入端与用于接收第二复位电压Vinit2；栅极复位单元123的输出端与驱动晶体管T1的栅极连接。具体的，栅极复位单元123可根据接收到的第二扫描信号Scan(n-1)拉低驱动晶体管T1的栅极电压至第二复位电压Vinit2，以对驱动晶体管T1的栅极进行复位。
其中，第二复位电压Vinit2为可以使驱动晶体管T1导通的电压.例如，若驱动晶体管T1为P型MOS管，即，驱动晶体管T1为低电平导通，即驱动晶体管T1的栅源电压差小于预设电压Vth时导通，则可以设置第二复位电压Vinit2为低电平电压，例如为-2.5V。可以理 解的是，通过设置栅极复位单元123，可以对驱动晶体管T1的栅极进行复位。如图10所示，在其中一个实施例中，像素驱动电路还包括用于提供第二扫描信号Scan(n-1)的第二扫描信号线(图中未示出)。栅极复位单元123可根据第二扫描信号Scan(n-1)传输第二复位电压Vinit2至驱动晶体管T1的栅极。具体的，栅极复位单元123可包括栅极复位晶体管T4。其中，栅极复位晶体管T4的控制极与第二扫描信号线连接，栅极复位晶体管T4的第一极用于接收第二复位信号Vinit2，栅极复位晶体管T4的第二极与驱动晶体管T1的栅极连接，栅极复位晶体管T4用于根据第二扫描信号控制驱动晶体管T1的栅极、第一极之间的信号传输路径的通断。
在本申请实施例中，栅极复位晶体管T4的第一极和第二极可以根据晶体管的类型及信号端的信号的不同，其功能可以互换，比如，可以是第一极为源极，相应地，第二极为漏极，另一是第一极为漏极，第二极为源极。示例性地，以栅极复位晶体管T4为P型MOS管为例进行说明。其中，P型MOS管的漏极、源极分别作为栅极复位晶体管T4的第一极、第二极。在栅极复位阶段，当第一扫描信号Scan(n-1)为低电平时，控制驱动晶体管T1的栅极和第一极之间的信号传输路径的导通，以对驱动晶体管T1的栅极进行复位。在发光阶段，当第一扫描信号Scan(n-1)为高电平时，控制驱动晶体管T1的栅极和驱动晶体管T1的第一极之间的信号传输路径的断开，以使驱动晶体管T1能够在发光阶段输出驱动电流，以控制发光器件110发光。
进一步的，第二复位电压Vinit2与栅极复位晶体管T4的栅极接收到的第二扫描信号Scan(n-1)的电压差小于预设电压，以避免当该点压差过大使栅极复位晶体管T4产生额外的漏电流，影响驱动晶体管T1的栅极接收到的信号，从而造成显示质量的下降甚至显示异常的问题的情况出现。
在其中一个实施例中，栅极复位晶体管还可以为双栅极晶体管，具体地为双栅极场效应管，双栅极场效应管是指具有一个源极、一个漏极和两个栅极的场效应管，双栅极场效应管受两个栅极接收的信号控制，因此具有更好的稳定性和可靠性，在本实施例中，采用双栅极晶体管结构的栅极复位晶体管，可以有效改善阳极复位的可靠性，从而改善显示设备的显示质量。
请继续参考图10，在其中一个实施例中，像素驱动电路还包括用于提供第一扫描信号Scan(n)的第一扫描信号线(图中未示出)。其中，阳极复位单元121包括阳极复位晶体管T7。其中，阳极复位晶体管T7的栅极与第一扫描信号线连接，阳极复位晶体管T7的第一极用于接收第一复位电压，阳极复位晶体管T7的第二极用于与发光器件的阳极连接，阳极复位晶体管T7可根据第二扫描信号Scan(n)控制阳极复位晶体管T7的第一极和发光器件110的阳极之间的信号传输路径的通断，并当该信号传输路径导通时，可将第一复位电压Vinit1传输至发光器件110的阳极。
示例性的，以阳极复位晶体管T7为P型MOS管为例进行说明。具体的，在阳极复位阶段，当第二扫描信号Scan(n)为低电平时，控制阳极复位晶体管T7导通，以对发光器件110的阳极进行复位；在发光阶段，当第二扫描信号Scan(n)为高电平时，控制阳极复位晶体管T7断开。
在本申请实施例中，第二扫描信号Scan(n-1)和第一扫描信号Scan(n)用于区分在不同时刻输入至驱动模块120的扫描信号，且各扫描信号可以分别用于控制驱动模块120中的多个晶体管。可以理解的是，第二扫描信号Scan(n-1)与第一扫描信号Scan(n)只在输入时刻上必然存在差异，本申请实施例不对第二扫描信号Scan(n-1)和第一扫描信号Scan(n)的其他特性具体进行限定。此外，连接至不同的发光器件的扫描信号也可以根据刷新方式进行具体设置。
如图11所示，在其中一个实施例中，像素驱动电路还包括用于传输数据信号Data的数据信号线(图中未示出)。为了便于说明，以第一驱动模块120a为例进行说明，其中，第一驱动模块120a还可以包括数据写入单元124、阈值补偿单元125和发光控制单元126。
其中，数据写入单元124的输入端用于接收数据信号Data，数据写入单元124的控制端 与第一扫描信号线连接，用于接收第一扫描信号Scan(n)，数据写入单元124的输出端与驱动晶体管T1的第二极连接，数据写入单元124用于根据第一扫描信号Scan(n)传输数据信号Data至驱动晶体管T1的第二极。具体地，当像素驱动电路完成栅极复位后，数据写入单元124在数据写入阶段将数据信号Data写入驱动晶体管T1的第二极，以使驱动晶体管T1在发光阶段产生与数据信号Data相对应的栅源电压差，从而控制驱动晶体管T1生成的驱动电流的大小。阈值补偿单元125分别与驱动晶体管T1的栅极、第二极连接，用于根据第二扫描信号Scan(n)控制驱动晶体管T1的栅极和第二极之间的信号传输路径的通断。具体地，通过设置阈值补偿单元125，可以对驱动晶体管T1的阈值电压进行补偿，从而避免驱动晶体管T1的阈值电压对发光器件110的亮度造成影响。
发光控制单元126分别与驱动晶体管T1的第一极、第二极、发光器件110的阳极连接，还用于接收发光控制信号EM和第一电源电压信号VDD。发光控制单元126用于根据发光控制信号EM控制第一电源电压信号VDD至驱动晶体管T1的信号传输路径的通断。当第一电源电压信号VDD的信号传输路径导通时，驱动晶体管T1的第一极被上拉至第一电源电压VDD，而驱动晶体管T1的栅极和第二极仍保持在数据写入阶段后形成的电压，因此，可以使驱动晶体管T1具有需要的栅源电压差，并产生相应的驱动电流。当驱动电流传输至发光器件110的阳极时，发光器件110即可在发光控制信号EM的控制下发光，且发光亮度与驱动电流的电流值相对应。
如图12所述，进一步的，数据写入单元124包括数据写入晶体管T2，数据写入晶体管T2的控制极与第一扫描信号线连接，数据写入晶体管T2的第一极与数据信号线连接，数据写入晶体管T2的第二极与驱动晶体管T1的第一极连接，数据写入晶体管T2用于根据第一扫描信号Scan(n)控制数据写入晶体管T2的控制极和驱动晶体管T1的第一极之间的信号传输路径的通断。在本申请实施例中，数据写入晶体管T2的第一极和第二极可以根据晶体管的类型及信号端的信号的不同，其功能可以互换，比如，可以是第一极为源极，相应地，第二极为漏极，另一是第一极为漏极，第二极为源极。示例性的，以数据写入晶体管T2为P型晶体管为例，P型晶体管的漏极、源极分别作为数据写入晶体管T2的第一极、第二极。当第二扫描信号Scan(n)为低电平时，数据写入晶体管T2导通，从而将数据信号Data传输至驱动晶体管T1的第一极；当完成数据信号Data的写入后，将第二扫描信号Scan(n)切换为高电平以断开数据信号Data的信号传输路径。可以理解的是，数据写入单元124不局限于本实施例的数据写入晶体管T2，也可以为其他能够根据使能控制信号，并实现信号传输功能的其他电路结构。
阈值补偿单元125包括阈值补偿晶体管T3和存储电容C1。存储电容C1的一端用于与提供接收第一电源电压VDD的第一电源电压端连接，存储电容C1的另一端与驱动晶体管T1的栅极连接。阈值补偿晶体管T3的栅极与第一扫描信号线连接，阈值补偿晶体管T3的第一极与驱动晶体管T1的第二极连接，阈值补偿晶体管T3的第二极与驱动晶体管T1的栅极连接。阈值补偿晶体管T3用于根据第一扫描信号Scan(n)控制驱动晶体管T1的栅极和第二极之间的信号传输路径的通断。具体地，以阈值补偿晶体管T3为P型晶体管为例，其中，P型晶体管的栅极的漏极、源极分别作为P型晶体管的栅极的第一极、第二极。当第一扫描信号Scan(n)为低电平时，阈值补偿晶体管T3导通，进而可进行阈值补偿并对存储电容C1进行充电，从而将补偿结果存储在存储电容C1中。
可选的，阈值补偿晶体管T3还可以为双栅极晶体管。在本实施例中，采用双栅极晶体管结构的阈值补偿晶体管T3，可以有效改善阈值补偿的可靠性，从而改善显示设备的显示质量。可以理解的是，像素驱动电路中的其他晶体管也可以为双栅极晶体管，以进一步提升显示质量。
请继续参考图12，进一步的，发光控制单元126包括第一控制晶体管T5和第二控制晶体管T6。其中，第一控制晶体管T5的栅极用于接收发光控制信号EM，第一控制晶体管T5的第一极与第一电源电压端连接，第一控制晶体管T5的第二极分别与数据写入晶体管T2的第 二极、驱动晶体管T1的第一极连接，第一控制晶体管T5用于根据发光控制信号EM控制第一电源电压端和驱动晶体管T1的第一极之间的信号传输路径的通断。第二控制晶体管T6的栅极用于接收发光控制信号EM，第二控制晶体管T6的第一极与驱动晶体管T1的第二极连接，第二控制晶体管T6的第二极发光器件110的阳极连接，第二控制晶体管T6用于根据发光控制信号EM控制驱动晶体管T1的第二极和发光器件110的阳极之间的信号传输路径的通断。在本申请实施例中，第一控制晶体管T5和第二控制晶体管T6的第一极和第二极可以根据晶体管的类型及信号端的信号的不同，其功能可以互换，比如，可以是第一极为源极，相应地，第二极为漏极，另一是第一极为漏极，第二极为源极。示例性的，以第一控制晶体管T5和第二控制晶体管T6均为P型晶体管为例进行说明，其中，P型晶体管的漏极分别作为第一控制晶体管T5和第二控制晶体管T6的第一极，P型晶体管的源极分别作为第一控制晶体管T5和第二控制晶体管T6的第二极。当发光控制信号EM为低电平时，第一控制晶体管T5和第二控制晶体管T6导通，将驱动晶体管T1的第一极的电压上拉至第一电源电压VDD，第一驱动晶体管T1的栅源电压差变化从而生成驱动电流并将驱动电流输出至发光器件110，从而控制发光器件110发光。
请继续参考图11，以驱动晶体管T1为P型MOS管为例，P型MOS管的漏极、源极分别作为驱动晶体管T1的第一极、第二极。因此，驱动晶体管T1为低电平导通，即驱动晶体管T1的栅源电压差小于栅源预设电压Vth时导通，则可以设置第二复位电压Vinit2为低电平电压，例如为-2.5V。其中，第二复位电压Vinit2为可以使驱动晶体管T1导通的电压。可以理解的是，通过设置栅极复位单元123，可以对驱动晶体管T1的控制极进行复位，避免驱动晶体管T1由于未复位而保持截止，从而避免数据信号Data无法正确写入的问题，从而提高像素驱动电路的可靠性。
具体的，在同一驱动模块120中第二复位电压Vinit2大于第一复位电压Vinit1。一般第二复位电压Vinit2设置在-3V左右。其中，第一驱动模块120a中阳极复位单元121的输入端接收的第一复位电压Vinit1在-1～-3-3V～-5V之间，其中，第二驱动模块120b中阳极复位单元121的输入端接收的第一复位电压Vinit1在-3V～-5V之间。需要说明的是，在本申请实施例中，第一复位电压Vinit1、第二复位电压Vinit2具体还可根据实际调整。
在同一驱动模块120中栅极复位单元123输入端接收的第二复位电压Vinit2大于第一复位电压Vinit1，这样就减小了第二复位电压Vinit2与数据信号Data之间的电压差，在相同驱动能力的驱动电路驱动下，可以使得充电时间较短，进而可以提高显示效率。需要说明的是，本实施例中的各种晶体管不局限于前述实施例中的P型晶体管，还可以为N型晶体管、其他能够根据使能控制信号实现信号传输功能的其他电路结构等。晶体管的类型不同，其对应的驱动方式也可做适应性调整。另外，本实施例的驱动模块120不局限于前述实施例中的7T1C驱动电路，即，驱动模块120中也可以具有其他数量的晶体管，从而以较少数量的晶体管实现轻量级的显示设备，或者以较多数量的晶体管实现更加灵活的显示功能，例如，还是可以为3T1C、6T1C、6T2C等其他类型的驱动电路。
如图13所示，在其中一个实施例中，显示面板还包括显示区AA和环绕显示区AA设置的非显示区NAA。其中，显示区AA中设置有多个发光器件和用于对应驱动各发光器件110的驱动模块。其中，显示面板还包括显示驱动芯片150、多条第一复位走线131、多条第二复位走线132和多条第三复位走线133。
显示驱动芯片150，设置在非显示区NAA，与像素驱动电路连接。具体的，该显示驱动芯片150可基于各个发光器件110的目标金属走线长度，生成对应的第一复位信号。也即，各个第一发光器件110a的第一复位信号不完全相同，各个第二发光器件110b的第二复位电压Vinit2相同。
多条第一复位走线131，用于传输第一驱动模块120a中阳极复位单元121输入端接收的第一复位信号。具体的，每一第一复位走线131分别与显示驱动芯片150和第一驱动模块120a连接。多个第一复位走线131平行设置。第一复位走线131用于将显示驱动芯片150输出的 第一复位信号传输至第一驱动模块120a，以对第一驱动模块120a中的阳极复位单元121进行阳极复位。
多条第二复位走线132，用于传输第二驱动模块120b中阳极复位单元121输入端接收的第一复位信号。具体的，每一第二复位走线132分别与显示驱动芯片150和第二驱动模块120b连接。多个第二复位走线132平行设置。第二复位走线132用于将显示驱动芯片150输出的第一复位信号传输至第二驱动模块120b，以对第二驱动模块120b中的阳极复位单元121进行阳极复位。
多条第三复位走线133，用于传输第二复位电压Vinit2。具体的，每一第三复位走线133分别与显示驱动芯片150和栅极复位单元123连接，且多个第三复位走线133平行设置，第三复位走线133用于将第二复位电压Vinit2传输至栅极复位单元123，以对栅极复位单元123进行栅极复位。
具体的，第一复位走线131、第二复位走线132和第三复位走线133中的至少一种在显示区AA的走线延伸方向为第一方向，剩余复位走线在显示区AA的走线延伸方向为第二方向，其中，第一方向和第二方向垂直设置。其中，第一方向可以理解为显示面板的宽度方向，也可以理解为发光器件110排布方向的行方，第二方向可以理解为显示面板的长度方向，也可以理解为发光器件110排布方向的列方向。
在其中一个实施例中，第一复位走线131和第二复位走线132在显示区AA的走线延伸方向均可以为第一方向，也即，采用左右出线的方式，通过横向走线连接至像素驱动电路。具体的，第一复位走线131传输的第一复位信号可对第一显示区101的第一发光器件110a的阳极进行复位；第二复位走线132传输的第一复位信号可对第二显示区102的第二发光器件110b的阳极进行复位，第三复位走线133在显示区AA的走线延伸方向均可以为第二方向，也即，采用上下出线的方式，通过纵向走线连接至像素驱动电路。具体的，第三复位走线133传输的第二复位电压Vinit2可对像素驱动电路中的栅极驱动晶体管T1的控制极进行复位。
本实施例中，将用于传输栅极复位信号的第三复位走线133采用纵向走线，将用于传输阳极复位信号的第一复位走线131、第二复位走线132采用横向走线，以形成网状结构，降低栅极复位信号和阳极复位信号的负载，可以进一步提高显示面板的均一性。其中，第一复位走线131、第二复位走线132、第三复位走线133设置在源漏(SD)金属走线层。另外，还可以缩减左右边框，以实现窄边框的显示面板。
可选的，第一复位走线131、第二复位走线132和第三复位走线133在显示区AA的走线延伸方向均可以为第一方向，也即，可以采用左右出线的方式，通过横向走线连接至像素驱动电路。
可选的，第三复位走线133在显示区AA的走线延伸方向均可以为第一方向，也即，可以采用左右出线的方式，通过横向走线连接至像素驱动电路。第一复位走线131和第二复位走线132在显示区AA的走线延伸方向均可以为第二方向，也即，可以采用上下出线的方式，通过纵向走线连接至像素驱动电路。
在其中一个实施例中，非显示区NAA包括依次连接的第一区域141、第二区域142、第三区域143和第四区域144。其中，第一区域141、第三区域143平行设置，第二区域142、第四区域144平行设置，且第二区域142分别与第一区域141、第三区域143连接。示例性的，为了便于说明，以显示区AA为矩形区域为例，非显示区NAA域包括分别位于显示区AA上侧、下侧、左侧、右侧的第一区域141、第三区域143、第四区域144和第二区域142。
请继续参考图13，进一步的，位于非显示区NAA的多个第三复位走线133均匀分布在第一区域141和第三区域143；位于非显示区NAA的多个第二复位走线132均匀分布在第二区域142和第四区域144；位于非显示区NAA的多个第一复位走线131均匀分布在第二区域142和第四区域144。具体的，同一复位走线在显示区AA和非显示区NAA的走线延伸方向相互垂直。示例性的，若第一复位走线131在显示区AA的走线延伸方向为第一方向，则该第一复位走线131在非显示区NAA的走线延伸方向为第二方向。
需要说明的是，本申请实施例中，第一复位走线131、第二复位走线132、第三复位走线133在显示区AA和非显示区NAA的排布方式不限于上述举例说明，还可以根据实际需求来进行设置。
在其中一个实施例中，显示面板100的非显示区NAA还设置有弯折区(Bending area)160，以实现曲面窄边框。
本实施例中，通过合理设置第一复位走线131、第二复位走线132和第三复位走线133分布在显示区AA和非显示区NAA的位置，可以简化显示面板的整体电路复杂性，有利于窄边框的形成。
本申请实施例还提供了一种显示面板的控制方法，图14为一实施例的控制方法的流程图，参考图14，在本实施例中，显示面板的控制方法可应用在前述任一实施例中的显示面板中。本实施例的控制方法应用于显示驱动芯片150，并以用于控制图6实施例所示的像素驱动电路为例进行说明。具体的，显示面板的控制方法包括步骤1402至步骤1406，
步骤1402，分别获取各发光器件的目标金属走线长度。
本申请实施例中，显示面板100在制备过程中，可以针对每一发光器件110获取各发光器件110的目标金属走线长度。其中，目标金属走线长度可以理解为该发光器件110与用于驱动该发光器件100的驱动模块120之间的金属走线L的走线长度。示例性的，可以将获取的各发光器件110的目标金属走线长度进行标识，也即，各发光器件110的目标金属走线具有唯一的标识信息，基于该标识信息可以对各发光器件110的目标金属走线长度进行存储。
步骤1404，根据目标金属走线长度获取各发光器件的第一复位电压。
其中，目标金属走线长度与第一复位电压呈正相关的关系，也即，目标金属走线长度越长，其加载在阳极复位单元的输入端的第一复位电压也就越大。其中，阳极复位单元是用于驱动该发光器件的驱动模块中的阳极复位单元。基于大批量的试验数据，可以构建第一复位电压与目标金属走线长度之间的映射关系。该映射关系可以为一元一次函数关系，也可以为一元多次函数关系等。在本申请实施例中，对该映射关系不做进一步的限定。针对每一发光器件110的目标金属走线长度和映射关系，可以确定各发光器件的第一复位电压。
步骤1406，在阳极复位阶段，控制每一驱动模块中的阳极复位单元的输入端同时接收第一复位电压。
在各发光器件110的复位阶段，显示驱动芯片150可以针对每一发光器件110对应输出与各发光器件110的目标金属走线长度正相关的第一复位电压，经过第一复位走线131传输至各发光器件110的阳极复位单元121的输入端，以实现对各发光器件110的阳极复位。
本实施例中的显示面板的驱动方法可根据各个发光器件110的目标金属走线长度来对应调节各阳极复位单元121输入端接收到的第一复位电压Vinit11的大小，例如，提高第一复位电压Vinit11，以提高各发光器件110的阳极起始充电电压，减少阈值电压与阳极充电起始电压之间的电压差，进而可以缩短从阳极起始充电电压充电至阈值电压的阳极充电时长，进而缩短或消除RC loading对第一发光器件110a的阳极充电时长的影响，使第一显示区101的多个第一发光器件110a和第二显示区102的多个第二发光器件110b的同时起亮，进而可以保证第一显示区101和第二显示区102亮度的均一性。
在其中一个实施例中，显示面板的控制方法还包括：调节所述第一复位电压，使各第一发光器件的电压差保持一致，其中，所述电压差为各所述发光器件的阈值电压与第一复位电压之间的电压差。
在本实施例中，通过调节第一复位电压，使不同颜色的各第一发光器件110a的电压差保持一致，例如，可以使得红色发光器件、绿色发光器件和蓝色发光器件的电压差(例如△R、△G、△B值)均保持一致，则可以缩短或消除不同发光颜色的阳极充电时长，以进一步缩短或消除RC loading对第一发光器件110a的阳极充电时长的影响，使第一显示区101的多个第一发光器件110a和第二显示区102的多个第二发光器件110b的同时起亮，进而可以保证第一显示区101和第二显示区102亮度的均一性。
在其中一个实施例中，若显示面板的控制方法应用在如图10所示的像素驱动电路中，则该显示面板的驱动方法还包括：在复位阶段，控制每一驱动模块中的栅极复位单元的输入端接收第二复位电压，其中，第二复位电压大于第一复位电压。
本实施例中，通过控制同一驱动模块120中栅极复位单元123输入端接收的第二复位电压Vinit2大于第一复位电压Vinit1，这样就减小了第二复位电压Vinit2与数据信号Data之间的电压差，在相同驱动能力的驱动电路驱动下，可以使得充电时间较短，进而可以提高显示效率。
应该理解的是，虽然图14的流程图中的各个步骤按照箭头的指示依次显示，但是这些步骤并不是必然按照箭头指示的顺序依次执行。除非本文中有明确的说明，这些步骤的执行并没有严格的顺序限制，这些步骤可以以其它的顺序执行。而且，图14中的至少一部分步骤可以包括多个子步骤或者多个阶段，这些子步骤或者阶段并不必然是在同一时刻执行完成，而是可以在不同的时刻执行，这些子步骤或者阶段的执行顺序也不必然是依次进行，而是可以与其它步骤或者其它步骤的子步骤或者阶段的至少一部分轮流或者交替地执行。
以上实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上实施例仅表达了本申请实施例的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请实施例构思的前提下，还可以做出若干变形和改进，这些都属于本申请实施例的保护范围。因此，本申请实施例专利的保护范围应以所附权利要求为准。

Claims (22)

  1. 一种像素驱动电路，包括多个驱动模块，每一所述驱动模块用于驱动与所述驱动模块连接的发光器件，每一所述驱动模块均包括：阳极复位单元、驱动晶体管，以及用于连接所述阳极复位单元与所述发光器件的目标金属走线；其中，
    所述阳极复位单元的控制端用于接收第一扫描信号，所述阳极复位单元的输入端用于接收第一复位电压，所述阳极复位单元的输出端分别与驱动晶体管的第一极、所述发光器件的阳极连接；
    各所述阳极复位单元的输入端接收的所述第一复位电压的大小与目标金属走线长度正相关，其中，所述目标金属走线长度为与所述阳极复位单元在同一所述驱动模块中的所述目标金属走线的长度。
  2. 根据权利要求1所述的像素驱动电路，其中，所述驱动模块还包括：
    栅极复位单元，所述栅极复位单元的控制端用于接收第二扫描信号，所述栅极复位单元的输入端用于接收第二复位电压，所述栅极复位单元的输出端与所述驱动晶体管的栅极连接；其中，同一所述驱动模块中所述第二复位电压大于所述第一复位电压。
  3. 根据权利要求2所述的像素驱动电路，其中，所述像素驱动电路还包括用于提供所述第二扫描信号的第二扫描信号线，其中，所述栅极复位单元包括栅极复位晶体管；
    所述栅极复位晶体管的栅极与所述第二扫描信号线连接，所述栅极复位晶体管的第一极用于接收所述第二复位信号，所述栅极复位晶体管的第二极与所述驱动晶体管的栅极连接，所述栅极复位晶体管用于根据所述第二扫描信号控制所述驱动晶体管的栅极与所述驱动晶体管的第二极之间的信号传输路径的通断。
  4. 根据权利要求2所述的像素驱动电路，其中，所述第二复位电压与所述栅极复位晶体管的栅极接收到的所述第二扫描信号的电压差小于预设电压。
  5. 根据权利要求1所述的像素驱动电路，其中，所述像素驱动电路还包括用于提供所述第一扫描信号的第一扫描信号线，其中，所述阳极复位单元包括阳极复位晶体管；
    所述阳极复位晶体管的栅极与所述第一扫描信号线连接，所述阳极复位晶体管的第一极用于接收所述第一复位信号，所述阳极复位晶体管的第二极与发光器件的阳极连接，所述阳极复位晶体管用于根据所述第一扫描信号控制所述阳极复位晶体管的第一端和所述发光器件的阳极之间的信号传输路径的通断。
  6. 根据权利要求5所述的像素驱动电路，其中，所述像素驱动电路还包括数据信号线，所述驱动模块还包括：
    数据写入单元，所述数据写入单元的控制端与所述第一扫描信号线连接，所述数据写入单元的第一极与所述数据信号线连接，所述数据写入单元的第二极与所述驱动晶体管的第一极连接；
    阈值补偿单元，分别与所述驱动晶体管的栅极、第二极连接，用于根据所述第一扫描信号控制所述驱动晶体管的栅极和第二极之间的信号传输路径的通断；
    发光控制单元，分别与所述驱动晶体管的第二极、所述发光器件的阳极连接，用于根据发光控制信号传输驱动电流至所述发光器件的阳极。
  7. 根据权利要求6所述的像素驱动电路，其中，所述阈值补偿单元包括：
    阈值补偿晶体管，所述阈值补偿晶体管的栅极与所述第一扫描信号线连接，所述阈值补偿晶体管的第一极与所述驱动晶体管的第二极连接，所述阈值补偿晶体管的第二极与所述驱动晶体管的栅极连接，所述阈值补偿晶体管用于根据所述第一扫描信号控制所述驱动晶体管的栅极和第二极之间的信号传输路径的通断；
    存储电容，所述存储电容的一端与所述驱动晶体管的栅极连接，所述存储电容的另一端用于与提供第一电源电压的第一电源电压端连接。
  8. 根据权利要求6所述的像素驱动电路，其中，所述像素驱动电路经发光控制信号端 接收发光控制信号，所述发光控制单元包括：
    第一控制晶体管，所述第一控制晶体管的栅极用于接收所述发光控制信号，所述第一控制晶体管的第一极用于与第一电源电压端连接，所述第一控制晶体管的第二极与所述驱动晶体管的第一极连接，所述第一控制晶体管用于根据所述发光控制信号控制所述第一电源电压端和所述驱动晶体管的第一极之间的信号传输路径的通断；
    第二控制晶体管，所述第二控制晶体管的栅极用于接收所述发光控制信号，所述第二控制晶体管的第一极与所述驱动晶体管的第二极连接，所述第二控制晶体管的第二极所述发光器件的阳极连接，所述第二控制晶体管用于根据所述发光控制信号控制所述驱动晶体管的第二极和所述发光器件的阳极之间的信号传输路径的通断。
  9. 一种显示面板，包括：
    多个发光器件，以及
    如权利要求1至8任一项所述的像素驱动电路，其中，多个所述驱动模块一一对应地与多个所述发光器件连接。
  10. 根据权利要求8所述的显示面板，其中，所述显示面板包括第一显示区和第二显示区；多个所述驱动模块中，包括有M个第一驱动模块和N个第二驱动模块，多个发光器件中，包括有M个第一发光器件和N个第二发光器件；M个所述第一发光器件位于所述第一显示区，N个所述第二发光器件位于所述第二显示区；M个所述第一驱动模块与M个第一发光器件一一对应连接，N个所述第二驱动模块与N个第二发光器件一一对应连接；
    其中，各个所述第一驱动模块的所述阳极复位单元的输入端接收的第一复位电压不完全相同，各个所述第二驱动模块的阳极复位单元的输入端接收的第一复位电压相同。
  11. 根据权利要求10所述的显示面板，其中，各所述第一驱动模块中的目标金属走线长度不完全相等，且各所述第一驱动模块中的目标金属走线长度大于各所述第二驱动模块中的目标金属走线长度，其中，各所述第二驱动模块中的目标金属走线长度相等。
  12. 根据权利要求10所述的显示面板，其中，栅极所述第一驱动模块和所述第二驱动模块的栅极复位单元的输入端接收的第二复位电压相同。
  13. 根据权利要求10所述的显示面板，其中，所述发光器件的阴极与用于提供第二电源电压的第二电源电压端连接，其中，所述第一复位电压与所述第二电源电压的差值小于阈值电压。
  14. 根据权利要求10所述的显示面板，其中，所述显示面板还包括显示区和环绕所述显示区设置的非显示区；其中，所述显示面板还包括：
    多条第一复位走线，用于传输所述第一驱动模块中阳极复位单元输入端接收的第一复位信号，
    多条第二复位走线，用于传输所述第二驱动模块中阳极复位单元输入端接收的第一复位信号，
    多条第三复位走线，用于传输栅极复位单元输入端接收的第二复位电压；其中，
    其中，所述第一复位走线、所述第二复位走线和所述第三复位走线中的至少一种在所述显示区的走线延伸方向为第一方向，剩余复位走线在所述显示区的走线延伸方向为第二方向，其中，第一方向和第二方向垂直设置。
  15. 根据权利要求14所述的显示面板，其中，所述第一复位走线和所述第二复位走线在所述显示区的走线延伸方向均为所述第一方向，所述第三复位走线在所述显示区的走线延伸方向为所述第二方向。
  16. 根据权利要求14所述的显示面板，其中，所述第一复位走线、所述第二复位走线和所述第三复位走线在所述显示区的走线延伸方向均为所述第一方向。
  17. 根据权利要求14所述的显示面板，其中，所述第一复位走线和所述第二复位走线 在所述显示区的走线延伸方向均为所述第二方向，所述第三复位走线在所述显示区的走线延伸方向为所述第一方向。
  18. 根据权利要求14所述的显示面板，其中，所述非显示区包括依次连接的第一区域、第二区域、第三区域和第四区域；其中，
    位于非显示区的多个所述第一复位走线均匀分布在所述第一区域和所述第三区域；
    位于非显示区的多个所述第二复位走线均匀分布在所述第二区域和所述第四区域；
    位于非显示区的多个所述第二复位走线均匀分布在所述第二区域和所述第四区域。
  19. 一种显示面板的控制方法，应用于如权利要求9-14任一项所述的显示面板，其中，所述方法包括：
    分别获取各所述发光器件的目标金属走线长度；
    根据所述目标金属走线长度获取各所述发光器件的第一复位电压；
    在阳极复位阶段，控制每一所述驱动模块中的阳极复位单元的输入端同时接收所述第一复位电压。
  20. 根据权利要求19所述的方法，其中，所述方法还包括：
    调节所述第一复位电压，使各第一发光器件的电压差保持一致，其中，所述电压差为各所述发光器件的阈值电压与所述第一复位电压之间的电压差。
  21. 一种显示设备，包括：感光器件和如权利要求9-18任一项所述的显示面板；其中，显示面板包括第一显示区和第二显示区，所述感光器件与所述第一显示区对应设置。
  22. 根据权利要求21所述的显示设备，其中，所述感光器件为摄像头。
PCT/CN2022/081420 2021-05-19 2022-03-17 像素驱动电路、显示面板及其控制方法和显示设备 WO2022242287A1 (zh)

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