WO2022227077A1 - 一种驱动电路和驱动系统 - Google Patents

一种驱动电路和驱动系统 Download PDF

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Publication number
WO2022227077A1
WO2022227077A1 PCT/CN2021/091725 CN2021091725W WO2022227077A1 WO 2022227077 A1 WO2022227077 A1 WO 2022227077A1 CN 2021091725 W CN2021091725 W CN 2021091725W WO 2022227077 A1 WO2022227077 A1 WO 2022227077A1
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WIPO (PCT)
Prior art keywords
driving
voltage
unit
threshold
driving unit
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PCT/CN2021/091725
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English (en)
French (fr)
Inventor
彭兴强
肖璟博
陆李源
董少青
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华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN202180096851.9A priority Critical patent/CN117203896A/zh
Priority to EP21938551.5A priority patent/EP4322408A4/en
Priority to PCT/CN2021/091725 priority patent/WO2022227077A1/zh
Publication of WO2022227077A1 publication Critical patent/WO2022227077A1/zh
Priority to US18/495,947 priority patent/US20240063782A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/06—Modifications for ensuring a fully conducting state
    • H03K17/063—Modifications for ensuring a fully conducting state in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/165—Modifications for eliminating interference voltages or currents in field-effect transistor switches by feedback from the output circuit to the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036—Means reducing energy consumption

Definitions

  • the present application relates to the field of electronic technology, and in particular, to a driving circuit and a driving system.
  • Switch mode power supply also known as switching power supply or switching converter
  • switching power supply is a high-frequency power conversion device and a type of power supply.
  • Switching power supplies switch between fully on mode and fully off mode through power devices, converting the required voltage or current.
  • the switching of power devices will generate a voltage slope dv/dt or a current slope di/dt of a large signal, which may cause electromagnetic interference (EMI) to affect the normal operation of other electronic devices. Therefore, the switching speed of power devices needs to be adjusted to reduce EMI.
  • EMI electromagnetic interference
  • the switching of power devices is controlled by gate drives.
  • a gate drive resistor is connected in series between the gate drive output and the gate of the power device, and the switching speed of the power device is adjusted by adjusting the size of the gate drive resistor.
  • this method may lead to a large turn-on loss during the turn-on process of the power device.
  • Embodiments of the present application provide a driving circuit and a driving system, which relate to the field of electronic technology.
  • the driving charging current is controlled in sections by the driving unit.
  • the driving unit outputs the first driving charging current, and when the voltage at the gate terminal reaches the first threshold, the second driving unit outputs a lower second driving charging current, thereby reducing the turn-on speed of the power device to reduce EMI, and the voltage at the gate terminal
  • the third driving unit outputs a relatively large third driving charging current, which reduces the loss of the power device after the Miller platform to the time it is fully turned on.
  • the driving circuit does not use a gate driving resistor, and the package can be packaged without a substrate, and a frame package can be used alone, thereby simplifying the packaging difficulty and reducing the packaging cost.
  • the lower second driving discharge current output by the second driving unit reduces the driving of the power device during the Miller plateau. discharge current, thereby reducing EMI.
  • the third driving unit outputs a larger third driving discharge current, which reduces the oscillation of the power device after the Miller platform, increases the stability of the voltage at the gate terminal of the power device, and further increases the Safety of power devices.
  • an embodiment of the present application provides a drive circuit, the drive circuit includes: a first drive unit, a second drive unit, and a third drive unit; wherein an output end of the first drive unit and an output end of the second drive unit and the output terminal of the third driving unit is used for connecting with the gate terminal of the power device.
  • the first driving unit is used for outputting the first driving charging current to the gate terminal when receiving the first control signal, so that the voltage of the gate terminal reaches the first threshold value; the second driving unit is used for outputting the second driving current to the gate terminal
  • the charging current makes the voltage of the gate terminal reach the second threshold from the first threshold; the third driving unit is used for outputting the third driving charging current to the gate terminal after the voltage of the gate terminal reaches the second threshold; the third driving charging current greater than the first driving charging current and the second driving charging current.
  • the charging current of the second drive is small, which can reduce the turn-on speed of the power device and reduce EMI.
  • the third driving charging current is relatively large, which can reduce the turn-on loss.
  • the driving circuit can be packaged with a frame alone, which simplifies the packaging difficulty and reduces the packaging cost.
  • the difference between the second threshold and the Miller plateau voltage of the power device is smaller than the first value.
  • the second driving unit stops outputting the second driving charging current when the voltage at the gate terminal reaches the second threshold; or, when the voltage at the gate terminal reaches the second threshold, the second driving unit continues to output the second driving current recharging current. In this way, the turn-on time of the power device can be shortened, and the turn-on loss can be further reduced.
  • the first drive unit is further configured to output the first drive discharge current to the gate terminal when receiving the second control signal, so that the voltage at the gate terminal reaches the second threshold;
  • the second drive unit is further configured to send a discharge current to the gate terminal.
  • the gate terminal outputs the second driving discharge current, so that the voltage of the gate terminal reaches the first threshold value from the second threshold value;
  • the third driving unit is also used for outputting the third driving discharge current to the gate terminal after the voltage of the gate terminal reaches the first threshold value current; the third drive discharge current is greater than the first drive discharge current and the second drive discharge current.
  • the second drive unit stops outputting the second drive discharge current when the voltage at the gate terminal reaches the first threshold; or, the second drive unit continues to output the second drive when the voltage at the gate terminal reaches the first threshold Discharge current. Further, the turn-off time is shortened and the safety of the power device is improved.
  • the driving circuit further includes a feedback unit, the input terminal of the feedback unit is connected to the gate terminal; the output of the feedback unit is used to enable the first driving unit, the second driving unit and the third driving unit.
  • the feedback unit is used to enable the first driving unit when the voltage at the gate terminal does not reach the first threshold; when the voltage at the gate terminal reaches the first threshold and does not reach the second threshold, enable the second driving unit, and The first driving unit is turned off; when the voltage at the gate terminal reaches the second threshold value, the third driving unit is enabled, and the second driving unit is turned off or continuously enabled.
  • the feedback unit is configured to enable the first driving unit when the voltage at the gate terminal does not reach the second threshold; and enable the second driving unit when the voltage at the gate terminal reaches the second threshold and does not reach the first threshold , and turn off the first driving unit; when the voltage at the gate terminal reaches the first threshold, enable the third driving unit, and turn off the second driving unit or continue to enable the second driving unit.
  • the feedback unit can realize the self-control of the drive circuit, so that the drive circuit can automatically adjust the turn-on and turn-off of the drive unit according to the voltage of the gate terminal, thereby improving the control accuracy of the drive circuit.
  • the feedback unit includes: a first comparator, a second comparator and a first decoder; the first input terminal of the first comparator is connected to the gate terminal, and the second input terminal of the first comparator is connected to the first comparator voltage, the output terminal of the first comparator is connected to the first decoder; wherein, the value of the first voltage is the first threshold value; the first input terminal of the second comparator is connected to the gate terminal, and the second input terminal of the second comparator The second voltage is connected, and the output end of the second comparator is connected to the first decoder; wherein, the value of the second voltage is the second threshold value; the first output end of the first decoder is connected to the enable of the first drive unit terminal, the second output terminal of the first decoder is connected to the enable terminal of the second drive unit, and the third output terminal of the first decoder is connected to the enable terminal of the third drive unit.
  • a first delay unit is provided between the second output end of the first decoder and the enabling end of the second driving unit; and/or, the third output end of the first decoder and the third A second delay unit is arranged between the enabling terminals of the driving unit; wherein, the first delay unit is used for delaying the enabling of the second driving unit, and the second delay unit is used for delaying the enabling of the third driving unit.
  • the delay unit can adjust the result output by the feedback unit to prevent the inaccuracy of the second threshold, thereby reducing EMI and reducing switching losses.
  • the drive circuit further includes an adjustment signal generation unit, the adjustment signal generation unit is connected to the second drive unit, and the adjustment signal generation unit is used to control the second drive unit to generate the second drive charging current or the second drive discharge current;
  • the adjustment signal The generating unit includes a reference current access terminal, a reference voltage access terminal, a resistor, a comparator array and a second decoder; wherein, the reference current access terminal is connected to one end of the resistor and the reference current, and the reference voltage access terminal is connected to The comparator array is connected, the other end of the resistor is grounded, one end of the resistor is also connected to the input end of the comparator array, the output end of the comparator array is connected to the input end of the second decoder, and the output end of the second decoder is connected to the input end of the second decoder.
  • the second drive unit is connected; a resistor is used to generate a reference current, and a resistor voltage is generated at one end of the resistor; a comparator array is used to generate a comparison signal according to the reference voltage and the resistance voltage; a second decoder is used to generate a comparison signal according to the comparison signal
  • the second driving unit is controlled to output the second driving charging current or the second driving discharging current.
  • the driving circuit can be applied to various situations, and the applicability of the driving circuit can be increased.
  • the adjustment signal generating unit further includes a third decoder; wherein, the output end of the comparator array is also connected to the input end of the third decoder, and the output end of the third decoder is connected to the second delay unit. connection; a third decoder, configured to control the second delay unit to delay the enabling of the third drive unit according to the comparison signal.
  • the first driving unit includes a first charging current control module and a first discharging current control module, the first charging current control module is used to control the value of the first driving charging current, and the first discharge current control module is used to control the first charging current control module.
  • a value of driving discharge current the second driving unit includes a second charging current control module and a second discharging current control module, the second charging current control module is used to control the value of the second driving charging current, and the second discharging current control module is used for is used to control the value of the discharge current of the second drive
  • the third drive unit includes a third charge current control module and a third discharge current control module, the third charge current control module is used to control the value of the third drive charge current, and the third discharge current The control module is used for controlling the value of the third driving discharge current.
  • the first charging current control module, the second charging current control module and the third charging current control module all include a plurality of P-type transistors connected in parallel; the first discharging current control module, the second discharging current control module and the third charging current control module Each of the discharge current control modules includes a plurality of N-type transistors connected in parallel.
  • the first threshold is a threshold voltage of the power device
  • the first control signal is a rising edge or a falling edge of a pulse width modulation signal
  • the second control signal is a falling edge or a rising edge of the pulse width modulation signal.
  • an embodiment of the present application provides a driving system, including a power device and the driving circuit according to any one of the first aspect, where the driving circuit is used to drive the power device to be turned on or off.
  • the drive system may be a drive system applied to various electronic appliances, and the electronic appliances may be program-controlled switches, communication equipment, electronic testing equipment, and control equipment.
  • the beneficial effects of the above-mentioned first aspect and the various possible implementations of the first aspect can refer to the beneficial effects brought by the above-mentioned first aspect, which will not be omitted here. Repeat.
  • an embodiment of the present application provides a driving module, including: the driving circuit described in any one of the first aspect, where the driving circuit is used to drive a power device to be turned on or off.
  • the driving module may be a module including a driving circuit, and may be a module further including a controller and/or a power device and the like.
  • the beneficial effects of the drive modules provided in the possible designs of the third aspect and the fourth aspect can refer to the beneficial effects brought by the possible implementations of the first aspect and the first aspect. Repeat.
  • the present application provides an electronic device, comprising: a power supply system, a power device, and the drive circuit described in any one of the first aspect, the drive circuit is used to drive the power device to be turned on or off, and the power supply system is used to drive the drive circuit. circuit power supply.
  • the electronic device may be a switching power supply of various electronic appliances, including but not limited to an adapter for supplying power to a terminal device, a server power supply, and the like.
  • the terminal device may be a mobile phone, a tablet computer, or the like.
  • Electronic appliances can be program-controlled switches, communication equipment, electronic testing equipment, and control equipment.
  • the electronic device may also be an electronic device including the driving module of the third aspect.
  • the beneficial effects of the electronic device provided in the fourth aspect and the possible designs of the fourth aspect can refer to the beneficial effects brought by the first aspect and the possible implementations of the first aspect. Repeat.
  • FIG. 1 is a schematic diagram of a single-ended gate drive system
  • FIG. 2 is a schematic diagram of an isolated gate drive system
  • FIG. 3 is a schematic diagram of a half-bridge gate drive system
  • FIG. 4 is a schematic diagram of a half-bridge gate drive system
  • FIG. 5 is a schematic circuit diagram of a gate drive output end and a gate of a power device
  • FIG. 6 is a schematic diagram of a combined package of a gate driver, a gate resistor and a power device provided by an embodiment of the present application;
  • FIG. 7 is a schematic circuit diagram of a negative pressure shut-off circuit
  • FIG. 8 is a timing diagram corresponding to a negative pressure shutdown circuit
  • Figure 9 is a schematic diagram of a current proportional control method
  • FIG. 10 is a schematic structural diagram of a driving circuit provided by an embodiment of the present application.
  • FIG. 11 is a sequence diagram provided by an embodiment of the present application.
  • FIG. 12 is a sequence diagram provided by an embodiment of the present application.
  • FIG. 13 is a schematic structural diagram of a driving circuit provided by an embodiment of the application.
  • FIG. 14 is a schematic structural diagram of a feedback unit provided by an embodiment of the present application.
  • FIG. 15 is a sequence diagram provided by an embodiment of the present application.
  • FIG. 16 is a schematic structural diagram of an adjustment signal generating unit according to an embodiment of the present application.
  • FIG. 17 is a schematic structural diagram of a specific driving circuit provided by an embodiment of the present application.
  • FIG. 18 is a schematic structural diagram of a driving system provided by an embodiment of the present application.
  • FIG. 19 is a schematic structural diagram of a drive module provided by an embodiment of the application.
  • FIG. 20 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
  • words such as “first” and “second” are used to distinguish the same or similar items with basically the same function and effect.
  • the first driving unit and the second driving unit are only used to distinguish different driving units, and the sequence of the driving units is not limited.
  • the words “first”, “second” and the like do not limit the quantity and execution order, and the words “first”, “second” and the like are not necessarily different.
  • the driving circuit provided in the embodiment of the present application can be applied to a switching power supply.
  • the switching power supply can be the switching power supply of various electronic appliances, and the electronic appliances can be program-controlled switches, communication equipment, electronic testing equipment, and control equipment.
  • the switching power supply can be used for adapters of electronic devices, and also for server power supplies.
  • the gate driving circuit and device provided by the embodiments of the present application can be applied to various topologies of switching power supplies, for example, a single-ended gate driving system, an isolated gate driving system, and a half-bridge gate driving system.
  • switching power supplies for example, a single-ended gate driving system, an isolated gate driving system, and a half-bridge gate driving system.
  • the various topologies of the switching power supply are described below.
  • FIG. 1 is a schematic diagram of a single-ended gate driving system.
  • the switching power supply includes a controller 101 , a gate driver 102 and a power device 103 .
  • the controller 101 is used for generating a control signal, such as a pulse width modulation (pulse width modulation, PWM) signal.
  • the control signal can control the gate driver 102 to generate a driving charging current or a driving discharging current, thereby controlling the turn-on and turn-off of the power device 103 .
  • a control signal such as a pulse width modulation (pulse width modulation, PWM) signal.
  • the control signal can control the gate driver 102 to generate a driving charging current or a driving discharging current, thereby controlling the turn-on and turn-off of the power device 103 .
  • the gate driver 102 when the square wave displayed by the control signal is on the rising edge, the gate driver 102 generates a driving charging current to charge the power device 103 .
  • the gate driver 102 When the square wave displayed by the control signal is on the falling edge, the gate driver 102 generates a drive discharge current to discharge the power device 103 .
  • the gate driving circuit provided in this embodiment of the present
  • the power device 103 is used to convert the voltage or current required by the user terminal.
  • the power device 103 controls the voltage or current required by the user terminal by turning it on or off.
  • the power device 103 may be a semiconductor device made of first-generation semiconductor materials such as silicon and germanium, or a semiconductor device made of second-generation semiconductor materials such as gallium arsenide and indium phosphide, or may be, for example, gallium nitride ( Semiconductor devices made of third-generation semiconductor materials such as GaN) and silicon carbide (SiC).
  • FIG. 2 is a schematic diagram of an isolated gate driving system.
  • the isolated gate drive system includes a controller 201 , an isolation circuit 202 , a gate drive 203 and a power device 204 .
  • the isolation circuit 202 is added to the isolated gate driving system.
  • the isolation circuit 202 is used for electrical isolation to ensure the physical security of the system. Isolation circuit 202 can break ground loops and protect the system from high voltage transients.
  • the gate driving circuit provided in the embodiment of the present application can be applied to the gate driving 203 in FIG. 2 .
  • FIG. 3 is a schematic diagram of a half-bridge gate driving system.
  • the half-bridge gate drive system includes a controller 301 , an isolation circuit 302 , an upper gate driver 303 , a lower gate driver 304 , an upper power device 305 and a lower power device 306 .
  • the upper gate driving 303 is used to generate a driving charging current or a driving discharging current according to the PWM1 control signal generated by the controller, and control the turn-on and turn-off of the upper power device 305 .
  • the lower gate driving 304 is used for generating a driving charging current or driving a discharging current according to the PWM2 control signal generated by the controller, and controlling the turn-on and turn-off of the lower power device 306 .
  • Both the PWM1 control signal and the PWM2 control signal may be PWM signals, and the PWM1 control signal and the PWM2 control signal may be the same or different.
  • the upper power device 305 and the lower power device 306 are used to convert the voltage or current required by the user terminal.
  • the gate driving circuit provided by the embodiments of the present application may be applied to the upper gate driving 303 and/or the lower gate driving 304 in FIG. 3 .
  • FIG. 4 is a schematic diagram of a half-bridge gate driving system.
  • the half-bridge gate driving system includes a controller 401 , an upper isolation circuit 402 , a lower isolation circuit 403 , an upper gate driver 404 , a lower gate driver 405 , an upper power device 406 and a lower power device 407 .
  • the upper isolation circuit 402 can cut off the ground loop, protecting the upper gate drive 404 and the upper power device 406 from transient high voltage surges.
  • the lower isolation circuit 404 can cut off the ground loop and protect the lower gate drive 405 and the lower power device 407 from transient high voltage surges.
  • the gate driving circuit provided by the embodiments of the present application may be applied to the upper gate driving 404 and/or the lower gate driving 405 in FIG. 4 .
  • a switching power supply is a high-frequency power conversion device.
  • the switching power supply controls the power device to switch between the fully-on mode and the fully-off mode, and converts to obtain the voltage or current required by the user end.
  • the switching of power devices produces a voltage slope dv/dt or a current slope di/dt of a large signal. If the voltage or current switching of the large signal is not processed, it may cause electromagnetic interference (EMI) to affect the normal operation of other electronic devices.
  • EMI electromagnetic interference
  • GaN gallium nitride
  • MOSFET metal-oxide semiconductor field-effect transistor
  • the fast switching speed and high switching frequency of GaN power devices make EMI a serious problem. Therefore, the switching speed of power devices needs to be adjusted to reduce EMI.
  • FIG. 5 is a schematic circuit diagram of a gate driving output terminal and a gate of a power device.
  • the circuit includes a gate driver 501 , a gate driver resistor 502 and a power device 503 .
  • the gate driving resistor 502 is connected in series between the output terminal of the gate driving 501 and the gate of the power device 503 .
  • the gate drive resistor 502 includes a Ron resistor 504 and a Roff resistor 505.
  • the Ron resistor is connected in series in the charging loop of the power device.
  • the resistance value of the Ron resistor is negatively correlated with the driving charging current.
  • the switching power supply can be adjusted by increasing the resistance value of the Ron resistor. Reduce the driving charging current, reduce the turn-on speed of the power device, and reduce the EMI when the power device is turned on.
  • the input voltage VDD charges the power device
  • the driving charging current in the charging loop is large
  • the generated EMI is relatively large.
  • VDD charges the power device through the Ron resistor
  • the resistance in the charging loop increases
  • the driving charging current in the charging loop decreases
  • the generated EMI decreases.
  • the Roff resistor is connected in series in the discharge circuit of the power device, and the resistance value of the Roff resistor is negatively correlated with the drive discharge current.
  • the switching power supply reduces the drive discharge current by increasing the resistance value of the roff resistor, reduces the turn-off speed of the power device, and reduces the EMI when the power device is turned off.
  • the way of gate drive resistance may make the drive charging current of the power device after the Miller voltage plateau small, which in turn leads to large switching losses.
  • the power device is an N-channel metal oxide semiconductor field-effect transistor (negative channel metal oxide semiconductor field-effect transistor, NMOSFET).
  • NMOSFET negative channel metal oxide semiconductor field-effect transistor
  • FIG. 6 shows a schematic structural diagram of a gate drive, a gate drive resistor and a power device packaged together.
  • the black box 601 is an independently packaged gate drive resistor, and the gate drive resistor is connected to the gate drive and power devices by using package interconnection. This packaging method is difficult to package, and the packaging cost is high.
  • the second method is to add a negative voltage turn-off circuit on the basis of increasing the gate resistance.
  • the PSW in the figure represents the charging tube, which is used to generate the charging current.
  • CLMPSW represents a clamp tube, which is used to turn off the GaN power device under negative pressure.
  • NSW represents the discharge tube, which is used to generate the discharge current.
  • the GaN power device is turned off, the NSW generates a discharge current, and the gate voltage of the GaN power device drops.
  • the CLMPSW is turned on, and the gate voltage of the GaN power device drops to the VEE voltage.
  • the GaN power device is turned off at the VEE voltage value. Among them, the VEE voltage is usually negative.
  • the gate voltage when the negative voltage turn-off circuit is not added to the drive circuit, the gate voltage is between 0-6V, and after the negative-voltage turn-off circuit is added, the gate voltage becomes -2V-6V.
  • the power device can be turned off in a negative voltage state, so that the above-mentioned Roff value is too large to prevent the power device from being turned on by mistake.
  • FIG. 8 is a timing diagram of the negative voltage shutdown circuit corresponding to FIG. 7 .
  • Vinp represents the front-end input voltage of the chip.
  • NSW gate represents the gate voltage of NSW.
  • CLMPSW gate represents the gate voltage of CLMPSW.
  • Vinp falls, the NSW gate voltage rises and the NSW turns on, controlling the GaN power device to turn off. Since there are other circuits such as logic circuits in the circuit, a time delay of 30ns is generated when the Vinp signal is transmitted to the gate of the NSW.
  • the NSW is turned on, a discharge current is generated, the GaN power device is discharged, and the gate voltage of the GaN power device drops.
  • the CLMPSW When the gate voltage of the GaN power device drops to 0, that is, time B, the CLMPSW is turned on, and the gate voltage of the GaN power device drops to a negative voltage, so that the power device can be turned off in a negative voltage state. In this way, it can be avoided that the power device is turned on by mistake due to the excessively large value of the gate driving resistor.
  • this method does not solve the problems of large switching loss, difficulty in packaging the gate driving resistor and high packaging cost when encapsulating the gate drive resistor.
  • the driving charging current and the driving discharging current are proportional.
  • the gate drive controller is used to proportionally control the drive charging current and the drive discharge current, so that the drive current exhibits the characteristics of "quick start and slow arrival".
  • FIG. 9 is a schematic diagram of a current proportional control method, as shown in FIG. 9 .
  • the system shown in FIG. 9 includes a gate drive controller 901 , a charging current scaling circuit 902 , a discharging current scaling circuit 903 , a power device 904 and a load 905 .
  • the gate drive controller 901 generates two sets of control signals GDRC and GDRD, the control signal GDRC controls the charging current proportional circuit 902 to charge the gate of the power device 904, and the control signal GDRD controls the discharge current proportional circuit 903 to the gate of the power device 904 Discharge, the gate voltage Gate of the power device 904 is generated through the charging or discharging process.
  • the gate voltage Gate controls the turn-on and turn-off of the power device 904 .
  • the output signal SW of the power device 904 outputs a stable voltage through the load 905 as the working voltage of the subsequent circuit.
  • the control signal GDRC output by the gate drive controller 901 can adjust the charging current output by the charging current proportional circuit 902, so that the charging speed of the gate voltage Gate is faster at startup, and the charging speed is slowed down when it is close to the maximum value, so that the EMI during the charging process is reduced.
  • the control signal GDRD output by the gate drive controller 901 can adjust the discharge current output by the discharge current proportional circuit 903, so that the gate voltage Gate discharge speed is relatively fast at startup, and the discharge speed slows down when it is close to the minimum value, thereby reducing EMI during the discharge process. .
  • the output current controlled by the gate drive controller gradually decreases.
  • the gate drive controller outputs a smaller charging current when the gate voltage is the Miller plateau voltage.
  • the power device will generate a large conduction loss after the Miller platform ends.
  • the gate driving resistors in the first and second modes make the packaging of the switching power supply difficult and the packaging cost high.
  • the proportional control method of the charging current and the discharging current does not consider that the power device should be fully turned on quickly after the Miller voltage, resulting in a large conduction loss of the power device.
  • embodiments of the present application provide a driving circuit and a driving system, which control the driving charging current through circuit segments.
  • the driving circuit When the voltage of the gate terminal of the power device does not reach the first threshold, the driving circuit outputs the first driving charging current.
  • the driving circuit When the voltage of the gate terminal of the power device reaches the first threshold, the driving circuit outputs a smaller second driving charging current, so as to adjust the turn-on speed of the power device after the first threshold to reduce EMI, where the first threshold may be the power The threshold voltage of the device, or the first threshold, may be a voltage close to the threshold voltage of the power device.
  • the driving circuit When the voltage of the gate terminal of the power device reaches the second threshold, the driving circuit outputs a larger third driving charging current, thereby shortening the time from the second threshold to fully turning on the power device, and shortening the switching loss of the power device.
  • the second threshold The Miller voltage difference with the power device is less than the first value.
  • the power device when the voltage at the gate terminal of the power device is greater than the threshold voltage, the power device starts to turn on. After the power device starts to turn on, it will enter the Miller platform for a period of time. During this period, the charging current is small and the EMI is small. When the power device is behind the Miller platform, the charging current is large, which can reduce the switching loss of the power device after the Miller platform.
  • the driving circuit does not use a gate driving resistor and does not need to be packaged separately, thereby reducing packaging difficulty and packaging cost.
  • the power device used to turn on or off according to the control signal.
  • the power device may be an N-type power device or a P-type power device.
  • the power device can be a P-type or N-type MOSFET, or a P-type or N-type insulated gate bipolar transistor (IGBT), or a power device improved according to the above two, etc.
  • IGBT insulated gate bipolar transistor
  • Threshold voltage and Miller voltage are often involved in the characteristics of power devices.
  • Threshold voltage is the gate voltage required to initiate the formation of a conductive channel between the source and drain of a power device. When the power device is at the threshold voltage, the power device starts to turn on.
  • the threshold voltage may also be referred to as the turn-on voltage, or turn-on voltage.
  • the threshold voltage of the germanium power device is about 0.3V
  • the threshold voltage of the silicon power device is about 0.7V
  • the threshold voltage of the GaN device is about 1.4V.
  • the power device when the voltage at the gate terminal of the power device does not reach the threshold voltage, the power device is in an off state, there is no current change inside the power device, and no EMI is generated.
  • the power device starts to turn on, and there are voltage changes and current changes inside the power device, and EMI begins to be generated.
  • the power device is an N-type transistor.
  • the power device When the voltage at the gate terminal of the power device is less than the threshold voltage, the power device is in an off state, and there is no current change inside the power device, and no EMI is generated.
  • the voltage at the gate terminal of the power device is greater than or equal to the threshold voltage, the power device starts to turn on, and there are voltage changes and current changes inside the power device, which may generate EMI.
  • the power device is a P-type transistor.
  • the power device When the voltage at the gate terminal of the power device is greater than the threshold voltage, the power device is in an off state, there is no current change inside the power device, and EMI is not generated.
  • the power device When the voltage at the gate terminal of the power device is less than or equal to the threshold voltage, the power device starts to turn on, and there are voltage changes and current changes inside the power device, which may generate EMI.
  • Miller Voltage It can also be referred to as the Miller plateau voltage of a power device.
  • the capacitance Cgd between the gate and the drain is Miller capacitance.
  • the Miller capacitance varies with the voltage between the gate and drain stages.
  • the platform is a Miller platform, and the voltage value is the Miller voltage.
  • the EMI generated by power devices in the Miller platform period is relatively large.
  • the gate charges Cgs, and when the voltage at the gate terminal reaches the Miller voltage, the gate charges Cgd, so that the voltage between the source and drain stages changes rapidly, resulting in greater EMI.
  • Cgs is discharged through the gate.
  • the discharge current of the gate discharges the Miller capacitor Cgd, the voltage at the gate terminal stops changing, and the source level of the power device And the voltage between the drain stage changes rapidly, resulting in larger EMI.
  • the power device is an N-type transistor whose Miller voltage is greater than its threshold voltage.
  • the voltage at the gate terminal of the power device is less than the Miller plateau voltage, there is no current change or a small current change in the power device, so that no EMI or small EMI is generated.
  • the voltage at the gate terminal of the power device is the Miller voltage, the internal current of the power device changes greatly, the voltage changes greatly, and EMI is generated. Power devices need to reduce the drive charge current or drive discharge current to reduce EMI during the Miller platform period.
  • the power device is a P-type transistor whose Miller voltage is less than its threshold voltage.
  • the voltage at the gate terminal of the power device is greater than the Miller plateau voltage, there is no current change or a small current change inside the power device, so that EMI is not generated or EMI is small.
  • the voltage at the gate terminal of the power device is the Miller voltage, the internal current of the power device changes greatly, the voltage changes greatly, and EMI is generated.
  • power devices need to reduce the driving charging current or driving discharging current to reduce EMI, and then meet the EMI requirements of power devices.
  • the turning on or off of the power device may be controlled by outputting the driving charging current or the driving discharging current by the driving circuit, and the driving circuit will be described below.
  • the driving circuit may include a plurality of driving units.
  • the drive circuit includes three drive units, which are a first drive unit, a second drive unit, and a third drive unit, respectively.
  • the embodiment of the present application does not limit the number of drive units.
  • Each driving unit may include one or more N-type transistors, and/or one or more P-type transistors, etc.
  • the specific structure of the driving unit is not limited in this embodiment of the present application.
  • the plurality of driving units further include a negative pressure shutdown circuit.
  • the negative pressure shutdown circuit is used to control the negative pressure shutdown of the power device to prevent the power device from being turned on by mistake.
  • the driving circuit provided by the embodiment of the present application includes: a first driving unit, a second driving unit and a third driving unit; wherein, the output end of the first driving unit, the output end of the second driving unit and the output end of the third driving unit For connection to the gate terminal of the power device.
  • the driving circuit is used to drive the power device to be turned on, and the first driving unit is used to output the first driving charging current to the gate terminal when receiving the first control signal, so that the voltage of the gate terminal reaches the first threshold; the second driving unit , which is used to output the second driving charging current to the gate terminal, so that the voltage of the gate terminal reaches the second threshold value from the first threshold value; the third driving unit is used to output the second threshold value to the gate terminal after the voltage of the gate terminal reaches the second threshold value.
  • Three driving charging currents the third driving charging current is greater than the first driving charging current and the second driving charging current, and the difference between the second threshold value and the Miller plateau voltage of the power device is smaller than the first value.
  • the first control signal is used to instruct the power device to be turned on, and the first control signal may be the rising edge or the falling edge of a square wave signal.
  • the first control signal may be the rising edge of the PWM signal input by the switching power supply controller. along.
  • the first control signal may also be a rising edge or a falling edge of a pulse signal, such as a rising edge of a pulse frequency modulation (pulse frequency modulation, PFM) signal.
  • PFM pulse frequency modulation
  • the third driving charging current is greater than the first driving charging current and the second driving charging current. It can be understood that the driving charging current of a power device during the Miller voltage plateau is related to EMI, and the greater the driving charging current, the greater the EMI. Taking an N-type transistor as an example, when the gate terminal voltage of the N-type transistor is equal to the Miller voltage, the driving charging current is reduced, and the generated EMI is reduced.
  • the higher the voltage at the gate terminal of the power device the smaller the internal resistance of the power device.
  • the power device continues to charge after the Miller voltage so that the voltage at the gate terminal reaches full power. voltage at turn-on.
  • the gate voltage of the power device when it is fully turned on is higher than its Miller voltage.
  • the driving charging current is increased, the time for the power device to be fully turned on is shortened, and the turn-on loss is reduced.
  • the driving circuit outputs a small driving charging current, so that the driving charging current during the Miller platform of the power device is small, and the EMI is small.
  • the driving circuit outputs a larger third driving charging current, so that the time for the power device to be fully turned on is shortened, thereby reducing the turn-on loss of the power device.
  • the first driving charging current may be greater than the second driving charging current, and may also be smaller than or equal to the second driving charging current.
  • the first threshold may be a threshold voltage, or may be a voltage close to the threshold voltage.
  • the power device starts to turn on after the first threshold, and the driving circuit outputs a slightly smaller driving charging current, so that the current and voltage changes of the power device in the Miller platform device are small, and the EMI generated is small.
  • the power device When the first threshold value is a voltage close to the threshold voltage, the power device outputs a slightly smaller driving charging current during the Miller plateau, and the EMI generated by the power device during the Miller plateau is reduced.
  • the first threshold when the power device is an N-type transistor, the first threshold may be a voltage slightly greater than the threshold voltage.
  • the first threshold may be a voltage slightly smaller than the threshold voltage.
  • the difference between the second threshold value and the Miller plateau voltage of the power device is smaller than the first value.
  • the first value may be any value smaller than the difference between the Miller voltage and the breakdown voltage of the power device and the first value is greater than zero.
  • the power device is an N-type transistor and the first value is 0.5
  • the first value is The second threshold is a voltage greater than the Miller voltage of 0.5V.
  • the first value is an arbitrary value close to 0.
  • the second threshold value is a voltage value slightly higher than the Miller voltage.
  • the second threshold value is a voltage value slightly lower than the Miller voltage. In this way, the power device drives a larger charging current after the Miller platform, which can shorten the time for the voltage at the gate terminal of the power device to change from the Miller voltage to the fully turn-on voltage, thereby reducing the turn-on loss of the power device.
  • the second driving unit stops outputting the second driving charging current when the voltage at the gate terminal reaches the second threshold; or, when the voltage at the gate terminal reaches the second threshold, the second driving unit continues to output the second driving current recharging current.
  • the driving circuit is used for when the power device is turned off, the first driving unit is also used for outputting the first driving discharge current to the gate terminal when receiving the second control signal, so that the voltage of the gate terminal reaches the second threshold; the second driving The unit is also used to output the second driving discharge current to the gate terminal, so that the voltage of the gate terminal reaches the first threshold value from the second threshold value; the third driving unit is also used to output the second driving discharge current to the gate terminal The terminal outputs a third drive discharge current; the third drive discharge current is greater than the first drive discharge current and the second drive discharge current.
  • the second control signal may be the falling edge or the rising edge of the square wave signal, for example, the second control signal may be the falling edge of the PWM signal input by the switching power supply controller.
  • the second control signal may also be a pulse signal, such as a falling edge of a pulse frequency modulation (pulse frequency modulation, PFM) signal.
  • PFM pulse frequency modulation
  • the values of the first threshold and the second threshold are as described above, and details are not described herein again.
  • the third driving discharge current is greater than the first driving discharge current and the second driving discharge current.
  • the first drive discharge current may be greater than the second drive discharge current, and may also be less than or equal to the second drive discharge current.
  • the drive discharge current of the power device during the Miller voltage plateau is related to EMI, and the greater the drive discharge current, the greater the EMI.
  • the driving discharge current is reduced, and the generated EMI is reduced.
  • the driving circuit outputs a small driving discharge current, so that the driving discharge current during the Miller platform of the power device is small, and the EMI is reduced. Small.
  • the driving discharge current increases, so that the power device continues to discharge after the threshold voltage, so that the voltage of the gate terminal reaches the voltage when it is completely turned off, and the larger third driving discharge current can be
  • the time from the power device after the Miller platform to the complete turn-off is shortened, thereby reducing the oscillation of the power device after the Miller platform, increasing the stability of the voltage at the gate terminal of the power device, and further increasing the safety of the power device.
  • the second drive unit stops outputting the second drive discharge current when the voltage at the gate terminal reaches the first threshold; or, the second drive unit continues to output the second drive when the voltage at the gate terminal reaches the first threshold Discharge current.
  • FIG. 10 is a schematic structural diagram of a driving circuit provided by an embodiment of the present application.
  • the driving circuit includes a first driving unit 1001 , a second driving unit 1002 and a third driving unit.
  • the output terminal of the first driving unit 1001 , the output terminal of the second driving unit 1002 and the output terminal of the third driving unit 1004 are all connected to the gate terminal of the power device 1003 .
  • the possible structures of the first driving unit 1001 , the second driving unit 1002 , the third driving unit 1004 , and the power device 1003 refer to the description of the related concepts in the embodiments of the present application, which will not be repeated here.
  • the connection modes among the first driving unit 1001 , the second driving unit 1002 , the third driving unit 1004 and the power device 1003 are for reference only, and are not specifically limited in this embodiment of the present application.
  • the first driving unit 1001 is configured to output the first driving charging current to the gate terminal when receiving the first control signal, so that the voltage of the gate terminal reaches the first threshold.
  • the second driving unit 1002 is configured to output a second driving charging current to the gate terminal, so that the voltage of the gate terminal reaches the first threshold.
  • the third driving unit 1004 is configured to output a third driving charging current to the gate terminal after the voltage at the gate terminal reaches the second threshold; the third driving charging current is greater than the first driving charging current and the second driving charging current.
  • the first control signal is used to control the turn-on of the power device 1003 .
  • the possible implementation manners of the first control signal and the first threshold are as described above, and details are not repeated here.
  • the first driving unit 1001 is configured to output the first driving discharge current to the gate terminal when receiving the second control signal, so that the voltage of the gate terminal reaches the second threshold.
  • the second driving unit 1002 It is used for outputting the second driving discharge current to the gate terminal, so that the voltage of the gate terminal reaches the second threshold value from the first threshold value.
  • the third driving unit 1004 is configured to output a third driving discharge current to the gate terminal after the voltage of the gate terminal reaches the first threshold; the third driving discharge current is greater than the first driving discharge current and the second driving discharge current.
  • the second control signal is used to control the shutdown of the power device.
  • the possible implementation manners of the second control signal and the second threshold are as described above, and details are not repeated here.
  • the power device 1003 in FIG. 10 described above includes N-type transistors and P-type transistors.
  • the turn-on process and turn-off process of the N-type transistor will be described below with the timing chart shown in FIG. 11
  • the turn-on process and turn-off process of the P-type transistor will be described with the timing chart shown in FIG. 12 .
  • FIG. 11 is a sequence diagram corresponding to FIG. 10 provided by an embodiment of the present application.
  • the power device is an N-type transistor
  • the first threshold value is the threshold voltage of the N-type transistor or a voltage value with a difference from the threshold voltage by a
  • the second threshold value is a voltage difference from the Miller voltage of the N-type transistor by b
  • the value, a and b are variables and can be in millivolts or volts.
  • SW11 is the drain signal of the N-type transistor.
  • the first control signal is the rising edge of the square wave.
  • a rising edge of the square wave occurs, a first control signal is generated, and the first driving unit starts to output the first driving charging current to the gate terminal.
  • the N-type transistor is in the off state, and the SW11 signal is high.
  • the voltage at the gate terminal rises until the first threshold value, wherein when the voltage at the gate terminal rises to the threshold voltage, the power device starts to turn on.
  • the internal charging current of the N-type transistor is small, and the SW11 signal does not change.
  • the voltage value of the gate terminal is the first threshold value
  • the first driving unit stops outputting the first driving charging current
  • the second driving unit outputs the second driving charging current to the gate terminal.
  • the voltage at the gate terminal continues to rise, and rises to the second threshold after passing through the Miller plateau.
  • the gate charges Cgd and the SW11 signal drops.
  • the voltage of the gate terminal is the second threshold value
  • the second driving unit stops outputting the second driving charging current
  • the third driving unit outputs the third driving charging current to the gate terminal
  • the third driving charging current is greater than the first driving charging current .
  • the second control signal is the falling edge of the square wave.
  • the falling edge of the square wave occurs, generating the second control signal, and the first driving unit starts to output the first driving discharge current to the gate terminal.
  • the voltage at the gate terminal is the second threshold value
  • the first drive unit stops outputting the first drive discharge current
  • the second drive unit outputs the second drive discharge current to the gate terminal
  • the second drive discharge current is smaller than the first drive discharge current .
  • the voltage at the gate terminal is the first threshold value
  • the second drive unit stops outputting the second drive discharge current
  • the third drive unit outputs the third drive discharge current to the gate terminal
  • the third drive discharge current is greater than the first drive discharge current .
  • the voltage at the gate terminal drops, through the threshold voltage, to the voltage at which it is fully turned off.
  • FIG. 12 is a timing diagram corresponding to FIG. 10 .
  • the power device is a P-type transistor
  • the first threshold value is the threshold voltage of the P-type transistor or a voltage value with a difference of c from the threshold voltage
  • the second threshold value is a voltage value with a difference of d from the Miller voltage of the P-type transistor
  • c and d are variables, which can be in millivolts or volts.
  • SW12 is the drain signal of the P-type transistor.
  • the first control signal is the falling edge of the square wave.
  • a falling edge of the square wave occurs, a first control signal is generated, and the first driving unit starts to output the first driving charging current to the gate terminal.
  • the voltage at the gate terminal drops until the first threshold, wherein when the voltage at the gate terminal reaches the threshold voltage, the power device starts to turn on.
  • the internal charging current of the P-type transistor is small, and the SW12 signal does not change.
  • the voltage of the gate terminal is the first threshold value
  • the first driving unit stops outputting the first driving charging current
  • the second driving unit outputs the second driving charging current to the gate terminal.
  • the voltage at the gate terminal continues to drop, and drops to the second threshold after passing through the Miller plateau.
  • the gate charges Cgd and the SW12 signal rises.
  • the Miller plateau ends, the SW12 signal stops falling and the P-type transistor turns on.
  • the voltage of the gate terminal is the second threshold value
  • the second driving unit stops outputting the second driving charging current
  • the third driving unit outputs the third driving charging current to the gate terminal
  • the third driving charging current is greater than the first driving charging current .
  • the second control signal is the rising edge of the square wave.
  • the rising edge of the square wave occurs, generating the second control signal, and the first drive unit starts to output the first drive discharge current to the gate terminal.
  • the voltage at the gate terminal is the second threshold value
  • the first drive unit stops outputting the first drive discharge current
  • the second drive unit outputs the second drive discharge current to the gate terminal
  • the second drive discharge current is smaller than the first drive discharge current .
  • the voltage at the gate terminal is the first threshold value
  • the second drive unit stops outputting the second drive discharge current
  • the third drive unit outputs the third drive discharge current to the gate terminal
  • the third drive discharge current is greater than the first drive discharge current .
  • the lower second driving charging current output by the second driving unit reduces the driving charging current during the Miller plateau, thereby reducing EMI .
  • the third driving unit outputs a third driving current, which reduces the switching loss of the power device after the Miller platform is fully turned on.
  • the driving circuit does not use a gate driving resistor and does not need to be packaged separately, thereby reducing the difficulty of packaging, simplifying the packaging of the intelligent power module, and reducing packaging costs.
  • the lower second drive discharge current output by the second drive unit reduces the drive discharge current of the power device during the Miller plateau, Thereby reducing EMI.
  • the third driving unit outputs a larger third driving discharge current, which reduces the oscillation of the power device after the Miller platform, increases the stability of the voltage at the gate terminal of the power device, and further increases the Safety of power devices.
  • an additional control unit may exist, and the first control signal may be generated by the control unit.
  • both the first control signal and the second control signal may be generated based on the voltage of the gate terminal of the power device.
  • a feedback unit is provided in the driving circuit for enabling the driving unit according to the voltage of the gate terminal.
  • the input terminal of the feedback unit is connected to the gate terminal; the output of the feedback unit is used to enable the first driving unit, the second driving unit and the third driving unit;
  • the first driving unit is enabled; when the voltage at the gate terminal reaches the first threshold and does not reach the second threshold, the second driving unit is enabled and the first driving unit is turned off; when the voltage at the gate terminal reaches At the second threshold, the third driving unit is enabled, and the second driving unit is turned off or the second driving unit is continuously enabled.
  • the feedback unit is used to enable the first driving unit when the voltage at the gate terminal does not reach the second threshold; when the voltage at the gate terminal reaches the second threshold and does not reach the first threshold, enables the second driving unit.
  • the driving unit is turned off, and the first driving unit is turned off; when the voltage at the gate terminal reaches the first threshold, the third driving unit is enabled, and the second driving unit is turned off or continuously enabled. It can be understood that the driving current output by the second driving unit is relatively small, and when the voltage at the gate terminal is greater than or equal to the second threshold, the second driving unit can continue to output the second driving current.
  • the feedback unit outputs an enable signal by comparing the voltage of the gate terminal with the first threshold value and/or the second threshold value, and then controls the driving unit.
  • the feedback unit can realize the self-control of the driving circuit, so that the driving circuit can automatically adjust the on and off of the driving unit according to the voltage of the gate terminal, and the accuracy of the control of the driving circuit is improved.
  • the driving circuit after adding the feedback unit will be described below with reference to FIG. 13 .
  • the driving circuit includes: a first driving unit 1301 , a second driving unit 1302 , a power device 1303 , a third driving unit 1304 and a feedback unit 1305 .
  • the input terminal of the feedback unit 1305 is connected to the gate terminal of the power device 1303 , and the output terminal of the feedback unit 1305 is connected to the first driving unit 1301 , the second driving unit 1302 and the third driving unit 1304 .
  • the feedback unit 1305 is used to enable the first driving unit 1301, the second driving unit 1302 and the third driving unit 1304.
  • the feedback unit 1305 is used to enable the first driving unit 1301 when the voltage at the gate terminal does not reach the first threshold; the voltage at the gate terminal reaches the first threshold and does not reach the first threshold.
  • the second driving unit 1302 is enabled and the first driving unit is turned off; when the voltage at the gate terminal reaches the second threshold, the third driving unit 1304 is enabled, and the second driving unit 1302 is turned off or continues The second driving unit 1302 is enabled.
  • the feedback unit 1305 is used to enable the first driving unit 1301 when the voltage at the gate terminal does not reach the second threshold; the voltage at the gate terminal reaches the second threshold and does not reach the first threshold
  • the second driving unit 1302 is enabled and the first driving unit 1301 is turned off; when the voltage at the gate terminal reaches the first threshold, the third driving unit 1304 is enabled, and the second driving unit 1302 is turned off or continues to be enabled
  • the second driving unit 1302 can be used.
  • the feedback unit is used to enable the first driving unit 1301 when the voltage at the gate terminal is less than the first threshold value; the voltage at the gate terminal is greater than or equal to the first threshold value, and When the voltage is less than the second threshold, the second driving unit 1302 is enabled and the first driving unit is turned off; when the voltage at the gate terminal is greater than or equal to the second threshold, the third driving unit 1303 is enabled and the second driving unit is turned off 1302 or continue to enable the second driving unit 1302.
  • the feedback unit is used to enable the first driving unit 1301 when the voltage at the gate terminal is greater than the second threshold; the voltage at the gate terminal is less than or equal to the second threshold and greater than the first
  • the second driving unit 1302 is enabled, and the first driving unit is turned off; when the voltage at the gate terminal is less than or equal to the first threshold, the third driving unit 1303 is enabled, and the second driving unit 1302 is turned off or continues The second driving unit 1302 is enabled.
  • the timing sequence corresponding to the driving circuit shown in FIG. 13 can be referred to the timing sequence of FIG. 11 , which will not be repeated here.
  • the feedback unit is used to enable the first driving unit 1301 when the voltage at the gate terminal is greater than the first threshold; the voltage at the gate terminal is less than or equal to the first threshold, and When the voltage is greater than the second threshold, the second driving unit 1302 is enabled and the first driving unit is turned off; when the voltage at the gate terminal is less than or equal to the second threshold, the third driving unit 1303 is enabled and the second driving unit is turned off 1302 or continue to enable the second driving unit 1302.
  • the feedback unit is used to enable the first driving unit 1301 when the voltage at the gate terminal is less than the second threshold; the voltage at the gate terminal is greater than or equal to the second threshold and less than the first threshold
  • the second driving unit 1302 is enabled, and the first driving unit is turned off; when the voltage at the gate terminal is greater than or equal to the first threshold, the third driving unit 1303 is enabled, and the second driving unit 1302 is turned off or continues The second driving unit 1302 is enabled.
  • the timing sequence corresponding to the driving circuit shown in FIG. 13 can be referred to the timing sequence of FIG. 12 , which will not be repeated here.
  • the feedback unit includes: a first comparator, a second comparator and a first decoder; the first input terminal of the first comparator is connected to the gate terminal, and the second input terminal of the first comparator is connected to the first comparator voltage, the output terminal of the first comparator is connected to the first decoder; wherein, the value of the first voltage is the first threshold value; the first input terminal of the second comparator is connected to the gate terminal, and the second input terminal of the second comparator The second voltage is connected, and the output end of the second comparator is connected to the first decoder; wherein, the value of the second voltage is the second threshold value; the first output end of the first decoder is connected to the enable of the first drive unit terminal, the second output terminal of the first decoder is connected to the enable terminal of the second drive unit, and the third output terminal of the first decoder is connected to the enable terminal of the third drive unit.
  • the feedback unit includes a first decoder 1401, a first comparator 1402 and a second comparator 1403.
  • the output terminal of the first comparator 1402 and the output terminal of the second comparator 1403 are respectively connected to the two input terminals of the first decoder 1401 .
  • the first comparator 1402 and the second comparator 1403 are used to determine the interval in which the voltage of the gate terminal is located and output the code value. Both the first comparator 1402 and the second comparator 1403 have two input terminals. The first input terminal of the first comparator 1402 is connected to the gate terminal, the second input terminal of the first comparator 1402 is connected to the first voltage, and the output terminal of the first comparator 1402 is connected to the first decoder; wherein, the first voltage is the first threshold.
  • the first input terminal of the second comparator 1403 is connected to the gate terminal, the second input terminal of the second comparator 1403 is connected to the second voltage, and the output terminal of the second comparator 1403 is connected to the first decoder; wherein the second voltage is the second threshold.
  • the first decoder 1401 is used to convert the code value output by the first comparator 1402 and the second comparator 1403 into an enable signal and enable the above-mentioned driving unit.
  • the first decoder 1401 may have three output terminals, the first output terminal of the first decoder 1401 is connected to the enable terminal of the first driving unit, and the second output terminal of the first decoder 1401 is connected to the second driving unit
  • the enabling terminal of the first decoder 1401 is connected to the enabling terminal of the third driving unit.
  • the first comparator and the second comparator compare the voltage of the gate terminal with the first threshold and/or the second threshold, and output a code value representing the voltage interval in which the voltage of the gate terminal is located.
  • the first decoder 1401 is configured to generate three enable signals according to the code value, and control the first driving unit, the second driving unit and the third driving unit respectively.
  • the voltage intervals output by the two comparators are represented by temperature codes. Specifically, when the voltage at the gate terminal is less than the first threshold, the first comparator outputs 0, and the second comparator outputs 0; when the voltage at the gate terminal is greater than or equal to the first threshold and less than or equal to the second threshold, the first comparator outputs 0 The first comparator outputs 1, and the second comparator outputs 0; when the voltage at the gate terminal is greater than the second threshold, the first comparator outputs 1, and the second comparator outputs 1.
  • the first decoder may convert the temperature code into a one-hot code or other codes.
  • the first decoder can convert 00 to 100, and control the first driving unit to output the first driving charging current; 10 is converted to 010, control the first driving unit to stop outputting the first driving charging current, and the second driving The unit outputs the second driving charging current; 11 is converted to 001 or 011, the second driving unit is controlled to stop outputting the second driving charging current or continue to output the second driving charging current, and the third driving unit outputs the third driving charging current.
  • the enabling of the output of the feedback unit may be inaccurate due to the influence of the manufacturing process and the like.
  • the enabling of the output of the feedback unit may be advanced, thereby causing the second driving unit or the third driving unit to output the driving current in advance or stop outputting the driving current in advance.
  • the driving circuit further includes a delay unit.
  • the delay unit is used to adjust the enable of the output of the first decoder.
  • a first delay unit is provided between the second output end of the first decoder and the enabling end of the second driving unit; and/or, the third output end of the first decoder and the third A second delay unit is arranged between the enabling terminals of the driving unit; wherein, the first delay unit is used for delaying the enabling of the second driving unit, and the second delay unit is used for delaying the enabling of the third driving unit.
  • the driving circuit refers to the actual production, in the above-mentioned first comparator and second comparator, the first threshold and/or the second threshold may deviate, which will lead to inaccurate feedback of the feedback unit, resulting in EMI. increased and/or increased switching losses.
  • the second threshold in the second comparator is set to 2V, and the second threshold in the actual production driving circuit may be 1.9V. If there is no delay unit, the drive circuit outputs the third drive charging current when the gate terminal voltage is 1.9V, and the power device may be in the Miller platform period, resulting in excessive EMI of the power device, making the switching power supply out of compliance with production standards, etc.
  • a delay unit is added to delay the enabling of the drive unit, and the drive circuit is controlled to accurately output the third drive charging current when the gate terminal voltage is 2V, which meets the EMI standard of power devices.
  • the power device is an N-type transistor
  • the first threshold value is greater than the threshold voltage of the N-type transistor
  • the difference from the threshold voltage is a
  • the second threshold value is greater than the Miller voltage
  • the difference from the Miller voltage is b
  • a and b are variables, which can be in millivolts or volts.
  • the timing diagram corresponding to the N-type transistor may be consistent with the timing diagram shown in FIG. 11 .
  • the timing diagram corresponding to the N-type transistor is shown in FIG. 15 .
  • the first control signal is the rising edge of the square wave.
  • a rising edge of the square wave occurs, a first control signal is generated, and the first driving unit starts to output the first driving charging current to the gate terminal.
  • the voltage value of the gate terminal is the first threshold value, the first driving unit stops outputting the first driving charging current, and the second driving unit outputs the second driving charging current to the gate terminal.
  • the voltage at the gate terminal is the Miller voltage
  • the second driving unit stops outputting the second driving charging current
  • the third driving unit outputs the third driving charging current to the gate terminal
  • the third driving charging current is greater than the first driving charging current and the second drive charging current.
  • the SW15 signal began to decline until the end of the Miller plateau period.
  • the driving charging current of the N-type transistor in the Miller platform period is large, the EMI is not reduced, and the EMI standard of the power device is not met.
  • adding a delay unit between the feedback unit and the driving unit can delay the enabling of the driving unit, thereby delaying the time when the third driving unit outputs the third driving current, so that the timing of the driving circuit is consistent with FIG. 11 , Meets EMI standards for power devices.
  • the delay unit can adjust the result output by the feedback unit, and accurately control the driving unit of the driving circuit, thereby reducing EMI and reducing switching loss.
  • the driving circuit may further include an adjustment signal generating unit.
  • the adjustment signal generating unit is connected to the second driving unit, and the adjustment signal generating unit is used for controlling the second driving unit to generate the second driving charging current or the second driving discharging current.
  • the adjustment signal generating unit includes a reference current access terminal, a reference voltage access terminal, a resistor, a comparator array and a second decoder; wherein, the reference current access terminal is connected to one end of the resistor and the reference current, and the reference voltage access terminal is connected One end of the resistor is connected to the comparator array, the other end of the resistor is grounded, one end of the resistor is also connected to the input end of the comparator array, the output end of the comparator array is connected to the input end of the second decoder, and the output of the second decoder The terminal is connected with the second driving unit.
  • a resistor is used to generate a reference current based on a resistor voltage at one end of the resistor; a comparator array is used to generate a comparison signal according to the reference voltage and the resistor voltage; a second decoder is used to control the output of the second drive unit according to the comparison signal The second drive charging current.
  • the adjustment signal generating unit includes: a reference current access terminal 1601 , a reference voltage access terminal 1602 , a resistor 1603 , a comparator array 1604 and a second decoder 1605 .
  • the reference current access terminal 1601 is connected to one end of the resistor 1603 and the reference current
  • the reference voltage access terminal 1602 is connected to the comparator array 1604, the other end of the resistor 1603 is grounded, and one end of the resistor 1603 is also connected to the comparator array 1604.
  • the input end is connected, the output end of the comparator array 1604 is connected with the input end of the second decoder 1605, and the output end of the second decoder 1605 is connected with the second driving unit.
  • the resistor 1603 is used to generate a resistor voltage at one end of the resistor 1603 based on the reference current.
  • the comparator array 1604 is used to generate a comparison signal according to the reference voltage and the resistance voltage;
  • the second decoder 1605 is used to control the second driving unit to output the second driving charging current or the second driving discharging current according to the comparison signal.
  • the reference current and the reference voltage are the current and voltage values in the reference circuit.
  • the reference circuit can be an additional circuit or a part of the circuit in the switching power supply. The manner of obtaining the reference current and the reference voltage is in the prior art, which will not be repeated in this embodiment of the present application.
  • the adjustment signal generating unit changes the resistance value of the resistance, changes the resistance voltage, and changes the adjustment signal, thereby changing the driving current of the second driving unit.
  • the comparator array 1604 compares the resistance voltage generated by the resistor according to the reference current with the reference voltage, outputs a code value, and outputs an adjustment signal (for example, represented by ADJ) through the decoder, and then changes the second driving unit. drive current.
  • ADJ adjustment signal
  • the adjustment signal generating unit is connected to the second driving unit, and the adjustment signal can control the number of PMOS or NMOS turned on in the second driving unit, thereby controlling the second driving charging current or the second driving charging current output by the second driving unit.
  • the magnitude of the drive discharge current is connected to the second driving unit, and the adjustment signal can control the number of PMOS or NMOS turned on in the second driving unit, thereby controlling the second driving charging current or the second driving charging current output by the second driving unit. The magnitude of the drive discharge current.
  • the driving circuit can meet the EMI requirements of power devices with different internal resistances, so that the driving circuit is suitable for various situations, and the applicability of the driving circuit is increased. .
  • the adjustment signal generating unit is further configured to control the delay time of the above-mentioned delay unit.
  • the adjustment signal generating unit further includes a third decoder; wherein, the output end of the comparator array is also connected to the input end of the third decoder, and the output end of the third decoder is connected to the second delay unit. connection; a third decoder, configured to control the second delay unit to delay the enabling of the third drive unit according to the comparison signal.
  • the structure and function of the third decoder are similar to those of the second decoder, which will not be repeated.
  • the above-mentioned adjustment signal generating unit further includes one or more latches for storing the adjustment signal output by the second decoder or the third decoder. In this way, the adjustment signal generating unit can be turned off, thereby reducing the running time of the adjustment signal generating unit and reducing the energy consumption of the circuit.
  • the driving unit includes a charging current control module and a discharging current control module.
  • the charging current control module is used to control the value of the charging current; the user of the discharging current control module controls the value of the discharging current.
  • the first driving unit includes a first charging current control module and a first discharging current control module, the first charging current control module is used to control the value of the first driving charging current, and the first discharge current control module is used to control the first charging current control module.
  • a value of driving discharge current the second driving unit includes a second charging current control module and a second discharging current control module, the second charging current control module is used to control the value of the second driving charging current, and the second discharging current control module is used for is used to control the value of the discharge current of the second drive
  • the third drive unit includes a third charge current control module and a third discharge current control module, the third charge current control module is used to control the value of the third drive charge current, and the third discharge current The control module is used for controlling the value of the third driving discharge current.
  • the drive unit can adjust the size of the drive current to better meet the application requirements of power devices to reduce EMI and increase switching speed.
  • FIG. 17 is a circuit diagram of a specific driving circuit provided by an embodiment of the present application. As shown in the figure, the figure includes a first driving unit 1701, a second driving unit 1702, a third driving unit 1703, a power device 1704, a feedback unit 1705, an adjustment signal generating unit 1706, a first delay unit 1714 and a second delay unit 1706. Time unit 1715.
  • the first driving unit 1701 includes a first charging current control module 1716 and a first discharging current control module 1717 .
  • the first charging current control module 1716 includes a plurality of P-type transistors connected in parallel for controlling the value of the first driving charging current.
  • the first discharge current control module 1717 includes a plurality of N-type transistors connected in parallel for controlling the value of the first driving discharge current.
  • the second driving unit 1702 includes a second charging current control module 1718 and a second discharging current control module 1719.
  • the second charging current control module 1718 includes a plurality of P-type transistors connected in parallel for controlling the value of the second driving charging current.
  • the second charging current control module includes a plurality of N-type transistors connected in parallel for controlling the value of the second driving and discharging current.
  • the third driving unit 1703 includes a third charging current control module 1720 and a third discharging current control module 1721.
  • the third charging current control module 1720 includes a plurality of P-type transistors connected in parallel for controlling the value of the third driving charging current.
  • the third charging current control module 1721 includes a plurality of N-type transistors connected in parallel for controlling the value of the third driving discharge current.
  • the structure of the power device 1704 is as described above and will not be repeated here.
  • the feedback unit 1705 includes a first comparator 1707 , a second comparator 1708 and a first decoder 1709 .
  • the adjustment signal generating unit 1706 includes a resistor 1711 , a comparator array 1702 , and a second decoder 1712 and a third decoder 1713 .
  • the output terminals of the first driving unit 1701 , the second driving unit 1702 and the third driving unit 1703 are connected to the gate terminal of the power device 1704 .
  • the gate terminal of the power device is also connected to one input terminal of the first comparator 1707 and one input terminal of the second comparator 1708 in the feedback unit 1705 .
  • the first decoder 1709 in the feedback unit has three output terminals, the first output terminal is connected to the enable terminal of the first driving unit 1701, the second output terminal is connected to the enable terminal of the second driving unit 1702, and the third output terminal It is connected to the enable terminal of the third driving unit 1703 .
  • the first delay unit 1714 is disposed between the second output terminal of the first decoder 1709 and the enable terminal of the second driving unit 1702 in the feedback unit.
  • the second delay unit 1715 is disposed between the third output terminal of the first decoder 1709 and the enable terminal of the third driving unit 1703 in the feedback unit.
  • the second decoder 2012 in the adjustment signal generating unit 1706 is connected to the second driving unit 1703
  • the third decoder 1713 is connected to the second delay unit 1715 .
  • the adjustment signal is determined according to the resistance value of the resistor 1711 in the adjustment signal generating unit 1706, and then the value of the second driving charging current or the value of the second driving discharging current, and the first delay are determined.
  • the drive circuit receives the square wave signal (PWM) output by the controller in the switching power supply, and generates a first control signal when the square wave signal has a rising edge.
  • the feedback unit 1705 outputs the first enable signal according to the voltage at the gate terminal, controls the first driving unit 1701 to output the first driving charging current, and the voltage at the gate terminal of the power device 1704 changes.
  • the feedback unit 1705 outputs a second enable signal to control the first driving unit 1701 to stop outputting the first driving charging current, and control the second driving unit 1702 to output the second driving charging current.
  • the feedback unit 1705 When the voltage at the gate terminal of the power device 1704 reaches the second threshold, the feedback unit 1705 outputs the third enable signal to control the second drive unit 1702 to stop outputting or continue to output the second drive charging current, and controls the third drive unit 1703 to output the third drive recharging current.
  • the first delay unit 1714 may delay the second enable signal to adjust the time for the second driving unit to output the second driving charging current.
  • the second delay unit 1715 can delay the third enable signal to adjust the time for the third driving unit to output the third driving charging current.
  • the second control signal is generated.
  • the feedback unit 1705 outputs the first enable signal according to the voltage at the gate terminal, controls the first driving unit 1701 to output the first driving discharge current, and the voltage at the gate terminal of the power device 1704 changes.
  • the feedback unit 1705 outputs a second enable signal to control the first drive unit 1701 to stop outputting the first drive discharge current, and control the second drive unit 1702 to output the second drive discharge current.
  • the feedback unit 1705 When the voltage at the gate terminal of the power device 1704 reaches the first threshold, the feedback unit 1705 outputs a third enable signal to control the second drive unit 1702 to stop outputting or continue to output the second drive discharge current, and controls the third drive unit 1703 to output the third drive Discharge current.
  • the first delay unit 1714 can delay the second enable signal to adjust the time for the second drive unit to output the second drive discharge current.
  • the second delay unit 1715 can delay the third enable signal to adjust the time for the third drive unit to output the third drive discharge current.
  • the second driving unit outputs a smaller second driving current, thereby reducing the EMI of the power device and meeting the EMI requirement; by increasing the third driving unit outputting a larger third driving current, reducing The turn-on time or turn-off time of the power device maintains the high efficiency of the power device; the feedback unit realizes driving according to the gate terminal voltage, realizes the self-control of the driving circuit, and increases the stability of the gate voltage.
  • Embodiments of the present application further provide a driving system, including a power device and any one of the above-mentioned driving circuits, where the driving circuit is used to drive the power device to be turned on or off.
  • the drive system may be a drive system applied to various electronic appliances, and the electronic appliances may be program-controlled switches, communication equipment, electronic testing equipment, and control equipment.
  • FIG. 18 is a schematic structural diagram of a driving system provided by an embodiment of the present application.
  • the driving system includes a driving circuit 1801 and a power device 1802 .
  • the driving circuit 1801 is used to drive the power device 1802 to be turned on or off.
  • the drive system may also include a controller 1803 and the like.
  • the controller 1803 is used to generate a control signal, and the control signal is used to instruct the power device 1802 to be turned on or off.
  • An embodiment of the present application further provides a driving module, including: the driving circuit according to any one of the foregoing embodiments, where the driving circuit is used to drive the power device to be turned on or off.
  • FIG. 19 further provides a schematic structural diagram of a driving module according to an embodiment of the present application.
  • the driving module includes a driving circuit 1901 and a substrate 1902 .
  • the driving circuit 1901 may be integrated on the substrate 1902 .
  • the driving module may also include power devices 1903 and the like.
  • the power device 1903 is integrated on the substrate 1902 .
  • Embodiments of the present application further provide an electronic device, including: a power supply system, a power device, and any one of the above-mentioned driving circuits, where the driving circuit is used to drive the power device to be turned on or off.
  • the power system is used to power the drive circuit.
  • the electronic equipment can be switching power supplies of various electronic appliances, including but not limited to adapters and server power supplies.
  • Electronic appliances can be program-controlled switches, communication equipment, electronic testing equipment, and control equipment.
  • the electronic device may also be an electronic appliance including a driving module, a driving system or an integrated circuit.
  • FIG. 20 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • the electronic device includes a power supply system 2001 , a power device 2002 and a driving circuit 2003 .
  • the power supply system 2001 is used for supplying power to the driving circuit 2003
  • the driving circuit 2003 is used for driving the power device 2002 to be turned on or off.
  • the electronic device may also include other systems, such as control systems and the like.
  • beneficial effects of the electronic device provided by the embodiments of the present application reference may be made to the beneficial effects brought by the above-mentioned driving circuit, which will not be repeated here.

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Abstract

本申请实施例提供一种驱动电路和驱动系统，应用于电子技术领域，驱动电路用于驱动功率器件开通或关断，驱动电路包括：第一驱动单元、第二驱动单元和第三驱动单元。第一驱动单元，用于在接收到第一控制信号时，向栅极端输出第一驱动充电电流，使得栅极端的电压达到第一阈值；第二驱动单元，用于在向栅极端输出第二驱动充电电流，使得栅极端的电压从第一阈值达到第二阈值；第三驱动单元，用于在栅极端的电压达到第二阈值后，向栅极端输出第三驱动充电电流；第三驱动充电电流大于第一驱动充电电流和第二驱动充电电流。这样，可以在满足功率器件EMI的需求同时，降低开通损耗。

Description

一种驱动电路和驱动系统 技术领域
本申请涉及电子技术领域，尤其涉及一种驱动电路和驱动系统。
背景技术
开关电源(switch mode power supply，SMPS)，又称交换式电源或开关变换器，是一种高频化电能转换装置，是电源供应器的一种。开关电源通过功率器件在全开模式和全关模式之间切换，转换所需的电压或电流。在开关电源中，功率器件的开关切换会产生大信号的电压斜率dv/dt或者电流斜率di/dt，可能会产生电磁干扰(electromagnetic interference，EMI)影响其他电子设备正常工作。因此，需要调节功率器件的开关切换速度以降低EMI。
在开关电源中，功率器件的开关切换由栅极驱动控制。通常在栅极驱动输出和功率器件栅极之间串联栅极驱动电阻，通过调节栅极驱动电阻的大小调节功率器件的开关切换速度。
但是，此方式在功率器件开通过程中可能会导致较大的开通损耗。
发明内容
本申请实施例提供一种驱动电路和驱动系统，涉及电子技术领域，通过驱动单元分段控制驱动充电电流，在功率器件的开通过程中，当栅极端的电压未达到第一阈值时，第一驱动单元输出第一驱动充电电流，在栅极端的电压达到第一阈值时，第二驱动单元输出较低的第二驱动充电电流，从而降低功率器件的开通速度以降低EMI，在栅极端的电压达到第二阈值时，第三驱动单元输出较大的第三驱动充电电流，降低功率器件在米勒平台后至完全开通时的损耗。并且驱动电路不使用栅极驱动电阻，封装可以不使用基板封装，单独使用框架封装从而简化了封装难度，减少封装成本。
进一步地，在功率器件的关断过程中，当功率器件栅极端的电压达到第二阈值时，第二驱动单元输出的较低的第二驱动放电电流，降低功率器件在米勒平台期间的驱动放电电流，从而降低EMI。当栅极端的电压达到第一阈值时，第三驱动单元输出较大的第三驱动放电电流，降低功率器件在米勒平台后的震荡，增加功率器件的栅极端的电压的稳定性，进而增加功率器件的安全性。
第一方面，本申请实施例提供一种驱动电路，驱动电路包括：第一驱动单元、第二驱动单元和第三驱动单元；其中，第一驱动单元的输出端、第二驱动单元的输出端和第三驱动单元的输出端用于与功率器件的栅极端连接。
第一驱动单元，用于在接收到第一控制信号时，向栅极端输出第一驱动充电电流，使得栅极端的电压达到第一阈值；第二驱动单元，用于向栅极端输出第二驱动充电电流，使得栅极端的电压从第一阈值达到第二阈值；第三驱动单元，用于在栅极端的电压达到第二阈值后，向栅极端输出第三驱动充电电流；第三驱动充电电流大于第一驱动充电电流和第二驱动充电电流。这样，第二驱动充电电流较小，可以降低功率器件 的开通速度降低EMI。并且第三驱动充电电流较大，可以降低开通损耗。以及并且驱动电路可以单独使用框架封装，简化了封装难度，减少封装成本。
可选的，第二阈值与功率器件的米勒平台电压的差值小于第一值。
可选的，第二驱动单元，在栅极端的电压达到第二阈值时，停止输出第二驱动充电电流；或者，第二驱动单元在栅极端的电压达到第二阈值时，持续输出第二驱动充电电流。这样，可以缩短功率器件的开通时间，进一步减小开通损耗。
可选的，第一驱动单元，还用于在接收到第二控制信号时，向栅极端输出第一驱动放电电流，使得栅极端的电压达到第二阈值；第二驱动单元，还用于向栅极端输出第二驱动放电电流，使得栅极端的电压从第二阈值达到第一阈值；第三驱动单元，还用于在栅极端的电压达到第一阈值后，向栅极端输出第三驱动放电电流；第三驱动放电电流大于第一驱动放电电流和第二驱动放电电流。这样，可以在降低功率器件EMI，并且降低功率器件关断时产生的震荡，增加功率器件的栅极端的电压的稳定性，进而提高功率器件的安全性。
可选的，第二驱动单元，在栅极端的电压达到第一阈值时，停止输出第二驱动放电电流；或者，第二驱动单元在栅极端的电压达到第一阈值时，持续输出第二驱动放电电流。进一步，缩短关断时间，提高功率器件的安全性。
可选的，驱动电路还包括反馈单元，反馈单元的输入端与栅极端连接；反馈单元的输出用于使能第一驱动单元、第二驱动单元和第三驱动单元。
反馈单元，用于在栅极端的电压未达到第一阈值时，使能第一驱动单元；在栅极端的电压达到第一阈值，且未达到第二阈值时，使能第二驱动单元，并关断第一驱动单元；在栅极端的电压达到第二阈值时，使能第三驱动单元，并关断第二驱动单元或持续使能第二驱动单元。
或者，反馈单元，用于在栅极端的电压未达到第二阈值时，使能第一驱动单元；在栅极端的电压达到第二阈值，且未达到第一阈值时，使能第二驱动单元，并关断第一驱动单元；在栅极端的电压达到第一阈值时，使能第三驱动单元，并关断第二驱动单元或持续使能第二驱动单元。
这样，反馈单元可以实现驱动电路的自控制，实现驱动电路根据栅极端的电压自动调整驱动单元的开启和关断，提高驱动电路控制的准确性。
可选的，反馈单元包括：第一比较器、第二比较器和第一译码器；第一比较器的第一输入端连接栅极端，第一比较器的第二输入端接入第一电压，第一比较器的输出端连接第一译码器；其中，第一电压的值为第一阈值；第二比较器的第一输入端连接栅极端，第二比较器的第二输入端接入第二电压，第二比较器的输出端连接第一译码器；其中，第二电压的值为第二阈值；第一译码器的第一输出端连接第一驱动单元的使能端，第一译码器的第二输出端连接第二驱动单元的使能端，第一译码器的第三输出端连接第三驱动单元的使能端。
可选的，第一译码器的第二输出端与第二驱动单元的使能端之间设置有第一延时单元；和/或，第一译码器的第三输出端与第三驱动单元的使能端之间设置有第二延时单元；其中，第一延时单元用于延迟第二驱动单元的使能，第二延时单元用于延迟第三驱动单元的使能。
这样，延时单元可以调整反馈单元输出的结果，防止第二阈值的不准确，进而降低EMI和减少开关损耗。
可选的，驱动电路还包括调整信号产生单元，调整信号产生单元与第二驱动单元连接，调整信号产生单元用于控制第二驱动单元产生第二驱动充电电流或第二驱动放电电流；调整信号产生单元包括基准电流接入端、基准电压接入端、电阻、比较器阵列和第二译码器；其中，基准电流接入端与电阻的一端、以及基准电流连接，基准电压接入端与比较器阵列连接，电阻的另一端接地，电阻的一端还与比较器阵列的输入端连接，比较器阵列的输出端与第二译码器的输入端连接，第二译码器的输出端与第二驱动单元连接；电阻，用于产生基于基准电流，在电阻的一端产生电阻电压；比较器阵列，用于根据基准电压和电阻电压产生比较信号；第二译码器，用于根据比较信号控制第二驱动单元输出第二驱动充电电流或第二驱动放电电流。
这样，可以满足不同内阻的功率器件的EMI需求，使驱动电路适用于多种情况，增加驱动电路的应用性。
可选的，调整信号产生单元还包括第三译码器；其中，比较器阵列的输出端还与第三译码器的输入端连接，第三译码器的输出端与第二延时单元连接；第三译码器，用于根据比较信号控制第二延时单元延迟对第三驱动单元的使能。
这样，方便根据实际调整第三驱动单元输出驱动电流的时间，避免驱动电路实际生产使用中的不准确，提高驱动电路的实用性。
可选的，第一驱动单元包括第一充电电流控制模块和第一放电电流控制模块，第一充电电流控制模块用于控制第一驱动充电电流的值，第一放电电流控制模块用于控制第一驱动放电电流的值；第二驱动单元包括第二充电电流控制模块和第二放电电流控制模块，第二充电电流控制模块用于控制第二驱动充电电流的值，第二放电电流控制模块用于控制第二驱动放电电流的值；第三驱动单元包括第三充电电流控制模块和第三放电电流控制模块，第三充电电流控制模块用于控制第三驱动充电电流的值，第三放电电流控制模块用于控制第三驱动放电电流的值。
可选的，第一充电电流控制模块、第二充电电流控制模块和第三充电电流控制模块均包括多个并联的P型晶体管；第一放电电流控制模块、第二放电电流控制模块和第三放电电流控制模块均包括多个并联的N型晶体管。
可选的，第一阈值为功率器件的阈值电压，第一控制信号为脉冲宽度调制信号的上升沿或者下降沿，第二控制信号为脉冲宽度调制信号的下降沿或者上升沿。
第二方面，本申请实施例提供一种驱动系统，包括功率器件和第一方面任一项所述的驱动电路，驱动电路用于驱动功率器件开通或关断。
其中，驱动系统可以是应用于各种电子电器的驱动系统，电子电器可以是程控交换机、通讯设备、电子检测设备和操控设备等。
第二方面以及上述第二方面的各可能的设计中所提供的驱动系统，其有益效果可以参见上述第一方面和第一方面的各可能的实施方式所带来的有益效果，在此不再赘述。
第三方面，本申请实施例提供一种驱动模块，包括：第一方面任一项所述的驱动电路，驱动电路用于驱动功率器件开通或关断。
驱动模块可以为包括驱动电路的模块，可以为还包括控制器和/或功率器件等的模块。
上述第三方面以及上述第四方面的各可能的设计中所提供的驱动模块，其有益效果可以参见上述第一方面和第一方面的各可能的实施方式所带来的有益效果，在此不再赘述。
第四方面，本申请提供一种电子设备，包括：电源系统、功率器件和第一方面任一项所述的驱动电路，驱动电路用于驱动功率器件开通或关断，电源系统用于对驱动电路供能。
其中，电子设备可以是各种电子电器的开关电源，包括但不限于为终端设备供电的适配器和服务器电源等。终端设备可以是手机、平板电脑等设备。电子电器可以是程控交换机、通讯设备、电子检测设备和操控设备等。电子设备还可以是包括上述第三方面驱动模块的电子设备。
上述第四方面以及上述第四方面的各可能的设计中所提供的电子设备，其有益效果可以参见上述第一方面和第一方面的各可能的实施方式所带来的有益效果，在此不再赘述。
附图说明
图1为一种单端栅极驱动系统的示意图；
图2为一种隔离栅极驱动系统示意图；
图3为一种半桥栅极驱动系统示意图；
图4为一种半桥栅极驱动系统示意图；
图5为一种栅极驱动输出端与功率器件栅极的电路示意图；
图6为本申请实施例提供的一种栅极驱动、栅极电阻和功率器件的合封示意图；
图7为一种负压关断电路的电路示意图；
图8为一种负压关断电路对应的时序图；
图9为电流比例化控制方式原理图；
图10为本申请实施例提供的一种驱动电路结构示意图；
图11为本申请实施例提供的一种时序图；
图12为本申请实施例提供的一种时序图；
图13为本申请实施例提供的一种驱动电路结构示意图；
图14为本申请实施例提供的一种反馈单元结构示意图；
图15为本申请实施例提供的一种时序图；
图16为本申请实施例提供的一种调整信号产生单元结构示意图；
图17为本申请实施例提供的一种具体的驱动电路结构示意图；
图18为本申请实施例提供的一种驱动系统结构示意图；
图19为本申请实施例提供的一种驱动模块结构示意图；
图20为本申请实施例提供的一种电子设备结构示意图。
具体实施方式
为了便于清楚描述本申请实施例的技术方案，在本申请的实施例中，采用了“第一”、“第二”等字样对功能和作用基本相同的相同项或相似项进行区分。例如，第一驱动单元和第二驱动单元仅仅是为了区分不同的驱动单元，并不对其先后顺序进行限定。本领域技术人员可以理解“第一”、“第二”等字样并不对数量和执行次序进行限定，并且“第一”、“第二”等字样也并不限定一定不同。
需要说明的是，本申请中，“示例性的”或者“例如”等词用于表示作例子、例证或说明。本申请中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其他实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念。
本申请实施例提供的驱动电路可以应用于开关电源。其中，开关电源可以是各种电子电器的开关电源，电子电器可以是程控交换机、通讯设备、电子检测设备和操控设备等。示例性的，开关电源可以用于电子设备的适配器，也可以用于服务器电源等。
本申请实施例提供的栅极驱动电路和装置可以应用于开关电源的多种拓扑结构中，例如，单端栅极驱动系统、隔离栅极驱动系统和半桥栅极驱动系统等。下面对开关电源的多种拓扑结构进行说明。
示例性的，图1为一种单端栅极驱动系统的示意图。如图1所示，开关电源包括控制器101、栅极驱动102和功率器件103。
其中，控制器101用于产生控制信号，例如脉冲宽度调制(pulse width modulation，PWM)信号。该控制信号可以控制栅极驱动102产生驱动充电电流或驱动放电电流，进而控制功率器件103的开通和关断。示例性的，在控制信号显示的方波处于上升沿时，栅极驱动102产生驱动充电电流，对功率器件103充电。在控制信号显示的方波处于下降沿时，栅极驱动102产生驱动放电电流，对功率器件103放电。本申请实施例提供的栅极驱动电路可应用于图1中的栅极驱动102中。
功率器件103用于转换用户端所需的电压或电流。功率器件103通过其开通或关断控制用户端所需的电压或电流。功率器件103可以是例如硅和锗等第一代半导体材料制备的半导体器件，也可以是例如砷化镓和磷化铟等第二代半导体材料制备的半导体器件，还可以是例如氮化镓(GaN)和碳化硅(SiC)等第三代半导体材料制备的半导体器件。
示例性的，图2为一种隔离栅极驱动系统示意图。隔离栅极驱动系统包括控制器201、隔离电路202、栅极驱动203和功率器件204。相比单端栅极驱动系统，隔离栅极驱动系统中增加隔离电路202。隔离电路202用于电气隔离来确保系统的物理安全。隔离电路202可以切断接地回路，保护系统免受瞬态高电压冲击。本申请实施例提供的栅极驱动电路可应用于图2中的栅极驱动203中。
示例性的，图3为一种半桥栅极驱动系统示意图。半桥栅极驱动系统包括控制器301、隔离电路302、上栅极驱动303、下栅极驱动304、上功率器件305和下功率器件306。上栅极驱动303用于根据控制器产生的PWM1控制信号产生驱动充电电流或驱动放电电流，控制上功率器件305的开通和关断。下栅极驱动304用于根据控制器产生的PWM2控制信号产生驱动充电电流或驱动放电电流，控制下功率器件306的开通和关断。PWM1控制信号和PWM2控制信号均可以是PWM信号PWM1控制信号 和PWM2控制信号可以相同，也可以不同。
上功率器件305和下功率器件306用于转换用户端所需的电压或电流。图3所示的半桥栅极驱动系统中两个功率器件相连，功率器件输出的电压或电流可以自动平衡，增强系统的稳定性。本申请实施例提供的栅极驱动电路可应用于图3中的上栅极驱动303和/或下栅极驱动304中。
示例性的，图4为一种半桥栅极驱动系统示意图。半桥栅极驱动系统包括控制器401、上隔离电路402、下隔离电路403、上栅极驱动404、下栅极驱动405、上功率器件406和下功率器件407。上隔离电路402可以切断接地回路，保护上栅极驱动404和上功率器件406免受瞬态高电压冲击。下隔离电路404可以切断接地回路，保护下栅极驱动405和下功率器件407免受瞬态高电压冲击。本申请实施例提供的栅极驱动电路可应用于图4中的上栅极驱动404和/或下栅极驱动405中。
需要说明的是，开关电源是一种高频化的电能转换装置。开关电源通过控制功率器件在全开模式和全关模式之间切换，转换得到用户端所需的电压或电流。
在开关电源中，功率器件的开关切换会产生大信号的电压斜率dv/dt或者电流斜率di/dt。若大信号的电压或电流切换未加以处理，可能会产生电磁干扰(electromagnetic interference，EMI)影响其他电子设备正常工作。
且随着开关电源高频化的趋势，栅极寄生电容更小、相同面积下导通内阻更小和开关速度更快的氮化镓(GaN)功率器件，逐步代替金属氧化物半导体场效应晶体管(metal-oxide semiconductor field-effect transistor，MOSFET)功率器件，应用于高开关频率的开关电源。GaN功率器件的功率密度输出和能量转换效率高，可以降低模块的体积和重量，从而降低模块制作及生产成本。GaN功率器件在使用中还可以通过多裸片合封替代传统的分离器件模式。将栅极驱动与GaN功率器件合封为一个单器件，进一步减少模块体积，降低生产成本。
但是GaN功率器件的快开关速度和高开关频率，使得EMI的问题严重。因此，需要调节功率器件的开关切换速度以降低EMI。
下面结合图5-图9对可能的降低EMI的方式进行说明。
方式一，在电路中增加栅极驱动电阻。示例性的，图5为一种栅极驱动输出端与功率器件栅极的电路示意图。如图5所示，电路中包括栅极驱动501、栅极驱动电阻502和功率器件503。其中，栅极驱动电阻502串联在栅极驱动501的输出端和功率器件503的栅极之间。
栅极驱动电阻502包括Ron电阻504和Roff电阻505，Ron电阻串联在功率器件的充电回路中，Ron电阻的电阻值与驱动充电电流呈负相关，开关电源可以通过调大Ron电阻的电阻值的减小驱动充电电流，降低功率器件的开通速度，减小功率器件开通时的EMI。
示例性的，当充电回路中无Ron电阻时，输入电压VDD对功率器件充电，充电回路中的驱动充电电流大，产生的EMI较大。当充电回路中有Ron电阻时，VDD经过Ron电阻对功率器件充电，充电回路中的电阻增大，充电回路中的驱动充电电流降低，产生的EMI减小。
Roff电阻串联在功率器件的放电回路中，Roff电阻的电阻值与驱动放电电流呈负 相关。开关电源通过调大roff电阻的电阻值降低驱动放电电流，降低功率器件的关断速度，减小功率器件关断时的EMI。
然而，栅极驱动电阻的方式可能使得功率器件在米勒电压平台后的驱动充电电流小，进而导致较大的开关损耗。并且，在功率器件关断且Roff取值过大时，可能会导致功率器件误开启。示例性的，功率器件为N沟道金属氧化物半导体场效应晶体管(negative channel metal oxide semiconductor field-effect transistor，NMOSFET)，当NMOSFET关断时，NMOSFET的漏端电压上升，如图5中经过NMOSFET中存在Cgd寄生电容产生i2的电流对功率器件的栅极进行充电，功率器件的栅极电压通过i1表示的放电路径对栅极电压进行释放。由于i2也会对Cgs进行充电，当Cgs放电时，产生i3，i3也会经过i1表示的放电路径进行释放。当Roff取值过大时，驱动放电电流i1小，导致栅极电压释放不及时，功率器件误开启。
此外，为减小电路体积，栅极驱动、栅极驱动电阻和功率器件进行合封时，栅极驱动电阻需要采用基板形式或者基板与框架混合形式封装，这样，封装难度大，封装成本高。示例性的，图6示出一种栅极驱动、栅极驱动电阻和功率器件合封的结构示意图。如图6所示，黑色方框601为独立封装的栅极驱动电阻，栅极驱动电阻采用封装互连与栅极驱动和功率器件连接。这种封装方式封装难度大，封装成本高。
方式二，在增加栅极电阻的基础上，增加负压关断电路。如图7所示，图中PSW表示充电管，用于产生充电电流。图7中CLMPSW表示钳位管，用于负压关断GaN功率器件。图中NSW表示放电管，用于产生放电电流。当GaN功率器件关断时，NSW产生放电电流，GaN功率器件栅极电压下降。当GaN功率器件降为某一电压时，CLMPSW打开，GaN功率器件栅极电压降为VEE电压。GaN功率器件以VEE电压值关断。其中，VEE电压通常为负压。
示例性的，当驱动电路中未增加负压关断电路时，栅极电压在0-6V之间，当增加负压关断电路后，栅极电压变为-2V-6V。功率器件可以保持负压状态关断，这样，可以避免上述Roff取值过大导致功率器件误开启的情况发生。
示例性的，图8为图7对应的负压关断电路时序图。Vinp表示芯片的前级输入电压。NSW gate表示NSW的栅极电压。CLMPSW gate表示CLMPSW的栅极电压。如图8中所示，当Vinp下降时，NSW栅极电压上升，NSW打开，控制GaN功率器件关断。由于电路中还存在例如逻辑电路等其他电路，导致Vinp的信号在传递到NSW的栅极时，产生30ns的时间延迟。在A时刻时，NSW打开，产生放电电流，对GaN功率器件进行放电，GaN功率器件的栅极电压下降。当GaN功率器件的栅极电压下降至0时，即B时刻，CLMPSW打开，GaN功率器件的栅极电压降为负压，使得功率器件可以保持负压状态关断。这样，可以避免栅极驱动电阻取值过大导致功率器件误开启的情况发生。
然而，这种方式未解决开关损耗大，以及栅极驱动电阻在合封时封装难度大和封装成本高的问题。
方式三，将驱动充电电流和驱动放电电流比例化。该方式通过栅极驱动控制器对驱动充电电流和驱动放电电流进行比例控制，使驱动电流呈现“启动快，到点慢”的特性。
示例性的，图9为电流比例化控制方式原理图，如图9所示。图9中所示的系统包括门驱动控制器901，充电电流比例化电路902、放电电流比例化电路903、功率器件904和负载905。
门驱动控制器901产生两组控制信号GDRC及GDRD，控制信号GDRC控制充电电流比例化电路902给功率器件904的栅极充电，控制信号GDRD控制放电电流比例化电路903给功率器件904的栅极放电，通过该充电或放电过程产生的功率器件904的门电压Gate。门电压Gate控制功率器件904的开通和截止。功率器件904的输出信号SW通过负载905输出稳定的电压作为后续电路的工作电压。
门驱动控制器901输出的控制信号GDRC可以调整充电电流比例化电路902输出的充电电流，使门电压Gate充电速度在启动时比较快，接近最大值时充电速度减缓，使得充电过程中的EMI降低。门驱动控制器901输出的控制信号GDRD可以调整放电电流比例化电路903输出的放电电流，使门电压Gate放电速度在启动时比较快，接近最小值时放电速度减缓，进而降低放电过程中的EMI。
但是，该方式中门驱动控制器控制输出的电流逐渐减小，当功率器件栅极电压为米勒平台电压时，门驱动控制器在栅极电压为米勒平台电压输出较小的充电电流，使得功率器件在米勒平台结束后产生较大的导通损耗。
综上，方式一和方式二中的栅极驱动电阻使得开关电源的封装难度大，封装成本高。方式三中，充电电流和放电电流比例化控制的方式，未考虑功率器件在米勒电压后，应快速完全开启，导致功率器件的导通损耗大。
有鉴于此，本申请实施例提供一种驱动电路和驱动系统，通过电路分段控制驱动充电电流。在功率器件的栅极端的电压未达到第一阈值时，驱动电路输出第一驱动充电电流。在功率器件的栅极端的电压达到第一阈值时，驱动电路输出较小的第二驱动充电电流，从而调整功率器件在第一阈值后的开通速度以降低EMI，其中，第一阈值可以为功率器件的阈值电压，或者第一阈值可以为与功率器件的阈值电压相近的电压。在功率器件的栅极端的电压达到第二阈值时，驱动电路输出较大的第三驱动充电电流，从而缩短功率器件在第二阈值至完全开通的时间，缩短功率器件的开关损耗，第二阈值与功率器件的米勒电压差值小于第一值。
可以理解的是，功率器件栅极端的电压大于阈值电压后，功率器件开始开通，功率器件开始开通后的一段时间会进入米勒平台，在该段时间内，充电电流较小，EMI较小，功率器件在米勒平台后，充电电流大，这样可以降低功率器件在米勒平台后的开关损耗。并且驱动电路不使用栅极驱动电阻，无需单独封装，从而降低封装难度，减少封装成本。
为了便于理解，示例的给出部分与本申请实施例相关概念的说明以供参考。
功率器件：用于根据控制信号实现开通或关断。功率器件可以是N型功率器件，也可以是P型功率器件。例如功率器件可以是P型或N型的MOSFET，也可以是P型或N型的绝缘栅双极型晶体管(insulated gate bipolar transistor，IGBT)，或者是根据上述两者改进的功率器件，等。
功率器件的特性中通常涉及阈值电压和米勒电压。
阈值电压：是功率器件源极和漏极之间开始形成导电沟道所需的栅极电压。当功 率器件为阈值电压时，功率器件开始开通。阈值电压也可以称为开启电压，或者开通电压。示例性的，锗功率器件阈值电压约为0.3V，硅功率器件阈值电压约为0.7V，GaN器件阈值电压约为1.4V。
需要说明的是，在功率器件的开通过程中，功率器件栅极端的电压未达到阈值电压时，功率器件处于关断状态，功率器件内部没有电流变化，不产生EMI。当功率器件栅极端的电压达到阈值电压时，功率器件开始开通，功率器件内部有电压变化和电流变化，开始产生EMI。
示例性的，功率器件为N型晶体管，当功率器件栅极端的电压小于阈值电压时，功率器件处于关断状态，功率器件内部没有电流变化，不产生EMI。当功率器件栅极端的电压大于或等于阈值电压时，功率器件开始开通，功率器件内部有电压变化和电流变化，可能产生EMI。
示例性的，功率器件为P型晶体管，当功率器件栅极端的电压大于阈值电压时，功率器件处于关断状态，功率器件内部没有电流变化，不产生EMI。当功率器件栅极端的电压小于或等于阈值电压时，功率器件开始开通，功率器件内部有电压变化和电流变化，可能产生EMI。
米勒电压：也可以称为功率器件的米勒平台电压。功率器件的栅极和源级间，源级和漏级间，栅极和漏级间内部都有等效电容。栅极和漏级间的电容Cgd为米勒电容。米勒电容随栅极和漏级间电压变化而变化。在功率器件开通过程中，栅极给栅-源电容Cgs充电达到某一电压值后，栅极的充电电流给米勒电容Cgd充电，导致栅极和源级间电压不再变化，达到一个平台。该平台为米勒平台，该电压值为米勒电压。
需要说明的是，功率器件在米勒平台时期产生的EMI较大。在功率器件开通过程中，栅极给Cgs充电，当栅极端的电压到达米勒电压时，栅极给Cgd充电，从而源级和漏级间电压迅速变化，产生较大的EMI。在功率器件的关断过程中，Cgs经过栅极放电，当栅极端的电压到达米勒电压时，栅极的放电电流给米勒电容Cgd放电，栅极端的电压停止变化，功率器件的源级和漏级间电压迅速变化，产生较大的EMI。
示例性的，功率器件为N型晶体管，其米勒电压大于其阈值电压。当功率器件栅极端的电压小于米勒平台电压时，功率器件内部没有电流变化或电流变化小，从而不产生EMI或EMI小。当功率器件栅极端的电压为米勒电压时，功率器件内部电流变化大，电压变化大，产生EMI大。功率器件在米勒平台时期需要降低驱动充电电流或驱动放电电流以降低EMI。
示例性的，功率器件为P型晶体管，其米勒电压小于其阈值电压。当功率器件栅极端的电压大于米勒平台电压时，功率器件内部没有电流变化或电流变化小，从而不产生EMI或EMI小。当功率器件栅极端的电压为米勒电压时，功率器件内部电流变化大，电压变化大，产生EMI大。功率器件在米勒平台时期需要降低驱动充电电流或驱动放电电流以降低EMI，进而满足功率器件的EMI要求。
本申请实施例中，功率器件的开通或关断可以通过驱动电路输出驱动充电电流或驱动放电电流控制，下面对驱动电路进行说明。
驱动电路可以包括多个驱动单元。例如驱动电路中包括三个驱动单元，分别为第一驱动单元、第二驱动单元和第三驱动单元，本申请实施例对驱动单元的数量不做限 定。
上述多个驱动单元用于，在功率器件的开通过程和关断过程，分阶段驱动功率器件的开通或关断。每个驱动单元均可以包括一个或多个N型晶体管，和/或，一个或多个P型晶体管，等，本申请实施例对驱动单元的具体结构不作限定。可能实现的方式中，多个驱动单元还包括负压关断电路。负压关断电路用于控制功率器件负压关断，避免功率器件误开启。
下面将结合附图对本申请实施例提供的驱动电路做详细说明。
本申请实施例提供的驱动电路包括：第一驱动单元、第二驱动单元和第三驱动单元；其中，第一驱动单元的输出端、第二驱动单元的输出端和第三驱动单元的输出端用于与功率器件的栅极端连接。
本申请实施例中，第一驱动单元、第二驱动单元、第三驱动单元和功率器件可能的结构参照本申请实施例相关概念的说明，此处不再赘述。驱动电路在功率器件的开通过程和关断过程所起的作用不同，后续实施例将分别说明驱动电路在功率器件的开通过程和关断过程的工作原理。
驱动电路用于驱动功率器件开通时，第一驱动单元，用于在接收到第一控制信号时，向栅极端输出第一驱动充电电流，使得栅极端的电压达到第一阈值；第二驱动单元，用于向栅极端输出第二驱动充电电流，使得栅极端的电压从第一阈值达到第二阈值；第三驱动单元，用于在栅极端的电压达到第二阈值后，向栅极端输出第三驱动充电电流；第三驱动充电电流大于第一驱动充电电流和第二驱动充电电流，第二阈值与功率器件的米勒平台电压的差值小于第一值。
本申请实施例中，第一控制信号用于指示开通功率器件，第一控制信号可以是方波信号的上升沿或下降沿，例如第一控制信号可以为开关电源控制器输入的PWM信号的上升沿。第一控制信号也可以是脉冲信号的上升沿或下降沿，例如脉冲频率调制(pulse frequency modulation，PFM)信号的上升沿。
本申请实施例中，第三驱动充电电流大于第一驱动充电电流和第二驱动充电电流。可以理解的是，功率器件在米勒电压平台期间的驱动充电电流与EMI相关，驱动充电电流越大，EMI越大。以N型晶体管为例，当N型晶体管栅极端电压等于米勒电压时，降低驱动充电电流，产生的EMI降低。
需要说明的是，功率器件栅极端的电压越高，功率器件的内阻越小，为降低功率器件在完全开通时的损耗，功率器件在米勒电压后，继续充电使得栅极端的电压达到完全开通时的电压。以N型晶体管为例，为减小功率器件的损耗，功率器件的完全开通时的栅极电压高于其米勒电压。当N型晶体管栅极端电压大于米勒电压时，增大驱动充电电流，缩短功率器件至完全开通的时间，降低开通损耗。
可以理解的是，在功率器件的开通过程中，功率器件栅极端的电压达到第一阈值时，驱动电路输出较小的驱动充电电流，使得功率器件米勒平台期间的驱动充电电流小，EMI小。功率器件栅极端的电压达到第二阈值时，驱动电路输出较大的第三驱动充电电流，使得功率器件至完全开通的时间缩短，进而降低功率器件的开通损耗。
本申请实施例中，第一驱动充电电流可以大于第二驱动充电电流，也可以小于或等于第二驱动充电电流。
本申请实施例中，第一阈值可以是阈值电压，也可以是与阈值电压相近的电压。当第一阈值为阈值电压时，功率器件在第一阈值后开始开通，驱动电路输出稍小的驱动充电电流，使得功率器件在米勒平台器件的电流变化和电压变化小，产生的EMI小。
当第一阈值为与阈值电压相近的电压时，功率器件在米勒平台期间输出稍小驱动充电电流，功率器件在米勒平台产生的EMI降低。
示例性的，当功率器件为N型晶体管时，第一阈值可以为稍大于阈值电压的电压。当功率器件为P型晶体管时，第一阈值可以为稍小于阈值电压的电压。
本申请实施例中，第二阈值与功率器件的米勒平台电压的差值小于第一值。第一值可以为小于功率器件的米勒电压至击穿电压差值的任一值且第一值大于零，示例性的，当功率器件为N型晶体管，且第一值为0.5时，第二阈值为大于米勒电压0.5V的电压。
可能实现的方式中，第一值为接近于0的任意值。示例性的，当功率器件为N型晶体管时，第二阈值为稍高于米勒电压的电压值。当功率器件为P型晶体管时，第二阈值为稍低于米勒电压的电压值。这样，功率器件在米勒平台后驱动充电电流较大，可以缩短功率器件栅极端的电压从米勒电压至完全开通电压的时间，进而减小功率器件的开通损耗。
可选的，第二驱动单元，在栅极端的电压达到第二阈值时，停止输出第二驱动充电电流；或者，第二驱动单元在栅极端的电压达到第二阈值时，持续输出第二驱动充电电流。
驱动电路用于功率器件关断时，第一驱动单元，还用于在接收到第二控制信号时，向栅极端输出第一驱动放电电流，使得栅极端的电压达到第二阈值；第二驱动单元，还用于向栅极端输出第二驱动放电电流，使得栅极端的电压从第二阈值达到第一阈值；第三驱动单元，还用于在栅极端的电压达到第一阈值后，向栅极端输出第三驱动放电电流；第三驱动放电电流大于第一驱动放电电流和第二驱动放电电流。
本申请实施例中，第二控制信号可以是方波信号的下降沿或上升沿，例如第二控制信号可以为开关电源控制器输入的PWM信号的下降沿。第二控制信号也可以是脉冲信号，例如脉冲频率调制(pulse frequency modulation，PFM)信号的下降沿。
本申请实施例中，第一阈值和第二阈值的取值如上所述，此处不再赘述。
本申请实施例中，第三驱动放电电流大于第一驱动放电电流和第二驱动放电电流。第一驱动放电电流可以大于第二驱动放电电流，也可以小于或等于第二驱动放电电流。
可以理解的是，功率器件在米勒电压平台期间的驱动放电电流与EMI相关，驱动放电电流越大，EMI越大。以N型晶体管为例，当N型晶体管栅极端电压等于米勒电压时，降低驱动放电电流，产生的EMI降低。
可以理解的是，在功率器件的关断过程中，功率器件栅极端的电压达到第二阈值时，驱动电路输出较小的驱动放电电流，使得功率器件米勒平台期间的驱动放电电流小，EMI小。功率器件栅极端的电压达到第一阈值时，驱动放电电流增大，使得功率器件在阈值电压后，继续放电使得栅极端的电压达到完全关断时的电压，较大的第三驱动放电电流可以缩短功率器件米勒平台后至完全关断的时间，进而降低功率器件在米勒平台后的震荡，增加功率器件的栅极端的电压的稳定性，进而增加功率器件的安 全性。
可选的，第二驱动单元，在栅极端的电压达到第一阈值时，停止输出第二驱动放电电流；或者，第二驱动单元在栅极端的电压达到第一阈值时，持续输出第二驱动放电电流。
下面结合图10对本申请实施例中的驱动电路进行详细说明。图10为本申请实施例提供的一种驱动电路结构示意图，如图10所示，驱动电路包括第一驱动单元1001、第二驱动单元1002和第三驱动单元。第一驱动单元1001的输出端、第二驱动单元1002的输出端和第三驱动单元1004的输出端均与功率器件1003的栅极端连接。
其中，第一驱动单元1001、第二驱动单元1002、第三驱动单元1004和功率器件1003可能的结构参照本申请实施例相关概念的说明，此处不再赘述。第一驱动单元1001、第二驱动单元1002、第三驱动单元1004和功率器件1003之间的连接方式仅供参考，本申请实施例对此不做具体限定。
在功率器件的开通过程中，第一驱动单元1001，用于在接收到第一控制信号时，向栅极端输出第一驱动充电电流，使得栅极端的电压达到第一阈值。第二驱动单元1002，用于向栅极端输出第二驱动充电电流，使得栅极端的电压达到第一阈值。第三驱动单元1004用于在栅极端的电压达到第二阈值后，向栅极端输出第三驱动充电电流；第三驱动充电电流大于第一驱动充电电流和第二驱动充电电流。
其中，第一控制信号用于控制功率器件1003的开通。第一控制信号和第一阈值可能的实现方式如上所述，此处不再赘述。
在功率器件的关断过程中，第一驱动单元1001，用于在接收第二控制信号时，向栅极端输出第一驱动放电电流，使得栅极端的电压达到第二阈值第二驱动单元1002，用于向栅极端输出第二驱动放电电流，使得栅极端的电压从第一阈值达到第二阈值。第三驱动单元1004，用于在栅极端的电压达到第一阈值后，向栅极端输出第三驱动放电电流；第三驱动放电电流大于第一驱动放电电流和第二驱动放电电流。
其中，第二控制信号用于控制功率器件的关断。第二控制信号和第二阈值可能的实现方式如上所述，此处不再赘述。
本申请实施例中，第一阈值、第二阈值可能的取值参照本申请实施例相关概念的说明，此处不再赘述。
上述图10中的功率器件1003包括N型晶体管和P型晶体管。下面通过图11所示的时序图说明N型晶体管的开通过程和关断过程，以及图12所示的时序图说明P型晶体管的开通过程和关断过程。
示例性的，图11为本申请实施例提供的一种图10对应的时序图。功率器件为N型晶体管，且第一阈值为该N型晶体管的阈值电压或者与阈值电压差值为a的电压值，第二阈值为与该N型晶体管的米勒电压差值为b的电压值，a和b均为变量，可以以毫伏或者伏为单位。如图11所示，SW11为N型晶体管的漏端信号。
在N型晶体管的开通过程中，第一控制信号为方波上升沿。A时刻，方波出现上升沿，产生第一控制信号，第一驱动单元开始向栅极端输出第一驱动充电电流。N型晶体管处于关断状态，SW11信号为高电压。A时刻后，栅极端的电压上升直至第一阈值，其中，当栅极端的电压上升至阈值电压时，功率器件开始开通。此时，N型晶 体管的内部充电电流较小，SW11信号无变化。
B时刻，栅极端的电压值为第一阈值，第一驱动单元停止输出第一驱动充电电流，第二驱动单元向栅极端输出第二驱动充电电流。B时刻后，栅极端的电压继续上升，经过米勒平台后上升至第二阈值。当栅极端的电压达到米勒电压后，栅极给Cgd充电，SW11信号下降。当米勒平台结束时，SW11信号停止下降，N型晶体管开通。
C时刻，栅极端的电压为第二阈值，第二驱动单元停止输出第二驱动充电电流，第三驱动单元向栅极端输出第三驱动充电电流，且第三驱动充电电流大于第一驱动充电电流。C时刻后，栅极端的电压继续上升，直至N型晶体管完全开通的电压。
在N型晶体管的关断过程中，第二控制信号为方波下降沿，D时刻，方波出现下降沿，产生第二控制信号，第一驱动单元开始向栅极端输出第一驱动放电电流。
E时刻，栅极端的电压为第二阈值，第一驱动单元停止输出第一驱动放电电流，第二驱动单元向栅极端输出第二驱动放电电流，且第二驱动放电电流小于第一驱动放电电流。当N型晶体管栅极端的电压达到米勒电压时，Cgd放电，SW11信号开始上升，N型晶体管开始关断。当米勒平台时期结束时，Cgd放电停止，SW11信号停止上升。
F时刻，栅极端的电压为第一阈值，第二驱动单元停止输出第二驱动放电电流，第三驱动单元向栅极端输出第三驱动放电电流，且第三驱动放电电流大于第一驱动放电电流。栅极端的电压下降，经阈值电压下降至完全关断的电压。
示例性的，图12为图10对应的时序图。功率器件为P型晶体管，第一阈值为该P型晶体管的阈值电压或者与阈值电压差值为c的电压值，第二阈值为与该P型晶体管的米勒电压差值为d的电压值，c和d为变量，可以以毫伏或者伏为单位。如图12所示，SW12为P型晶体管的漏端信号。在P型晶体管的开通过程中，第一控制信号为方波下降沿。A时刻，方波出现下降沿，产生第一控制信号，第一驱动单元开始向栅极端输出第一驱动充电电流。A时刻后，栅极端的电压下降直至第一阈值，其中，当栅极端的电压至阈值电压时，功率器件开始开通。此时，P型晶体管的内部充电电流较小，SW12信号无变化。
B时刻，栅极端的电压为第一阈值，第一驱动单元停止输出第一驱动充电电流，第二驱动单元向栅极端输出第二驱动充电电流。B时刻后，栅极端的电压继续下降，经过米勒平台后下降至第二阈值。当栅极端的电压达到米勒电压后，栅极给Cgd充电，SW12信号上升。当米勒平台结束时，SW12信号停止下降，P型晶体管开通。
C时刻，栅极端的电压为第二阈值，第二驱动单元停止输出第二驱动充电电流，第三驱动单元向栅极端输出第三驱动充电电流，且第三驱动充电电流大于第一驱动充电电流。C时刻后，栅极端的电压继续下降，经过米勒平台后下降至完全开通电压，减小功率器件在运行时的损耗。
在P型晶体管的关断过程中，第二控制信号为方波上升沿，D时刻，方波出现上升沿，产生第二控制信号，第一驱动单元开始向栅极端输出第一驱动放电电流。
E时刻，栅极端的电压为第二阈值，第一驱动单元停止输出第一驱动放电电流，第二驱动单元向栅极端输出第二驱动放电电流，且第二驱动放电电流小于第一驱动放电电流。当P型晶体管栅极端的电压达到米勒电压时，Cgd放电，SW12信号开始下 降，P型晶体管开始关断。当米勒平台时期结束时，Cgd放电停止，SW12信号停止下降。
F时刻，栅极端的电压为第一阈值，第二驱动单元停止输出第二驱动放电电流，第三驱动单元向栅极端输出第三驱动放电电流，且第三驱动放电电流大于第一驱动放电电流。
综上，在功率器件的开通过程中，在栅极端的电压达到第一阈值时，第二驱动单元输出的较低的第二驱动充电电流，降低米勒平台期间的驱动充电电流，从而降低EMI。当栅极端的电压达到第二阈值时，第三驱动单元输出第三驱动电流，降低功率器件米勒平台后至完全开通的开关损耗。并且驱动电路不使用栅极驱动电阻，无需单独封装，从而降低了封装难度，简化了智能功率模块的封装，减少封装成本。
在功率器件的关断过程中，当功率器件栅极端的电压达到第二阈值时，第二驱动单元输出的较低的第二驱动放电电流，降低功率器件在米勒平台期间的驱动放电电流，从而降低EMI。当栅极端的电压达到第一阈值时，第三驱动单元输出较大的第三驱动放电电流，降低功率器件在米勒平台后的震荡，增加功率器件的栅极端的电压的稳定性，进而增加功率器件的安全性。
需要说明的是，上述驱动电路中，可以存在额外的控制单元，第一控制信号可以是该控制单元产生的。或者，第一控制信号和第二控制信号均可以是基于功率器件的栅极端的电压产生的，例如，在驱动电路中设置反馈单元，该反馈单元用于根据栅极端的电压使能驱动单元。
可选的，反馈单元的输入端与栅极端连接；反馈单元的输出用于使能第一驱动单元、第二驱动单元和第三驱动单元；反馈单元，用于在栅极端的电压未达到第一阈值时，使能第一驱动单元；在栅极端的电压达到第一阈值，且未达到第二阈值时，使能第二驱动单元，并关断第一驱动单元；在栅极端的电压达到第二阈值时，使能第三驱动单元，并关断第二驱动单元或持续使能第二驱动单元。
可选的，反馈单元，用于在栅极端的电压未达到第二阈值时，使能第一驱动单元；在栅极端的电压达到第二阈值，且未达到第一阈值时，使能第二驱动单元，并关断第一驱动单元；在栅极端的电压达到第一阈值时，使能第三驱动单元，并关断第二驱动单元或持续使能第二驱动单元。可以理解的是，第二驱动单元输出的驱动电流较小，在栅极端的电压大于或等于第二阈值时，第二驱动单元可以持续输出第二驱动电流。
可能的实现方式中，反馈单元通过将栅极端的电压与第一阈值和/或第二阈值进行比较，输出使能信号，进而控制驱动单元。
本申请实施例中，反馈单元可以实现驱动电路的自控制，实现驱动电路根据栅极端的电压自动调整驱动单元的开启和关断，提高驱动电路控制的准确性。
下面结合图13对增加反馈单元后的驱动电路进行说明。
如图13所示，驱动电路包括：第一驱动单元1301、第二驱动单元1302、功率器件1303、第三驱动单元1304和反馈单元1305。
反馈单元1305的输入端与功率器件1303的栅极端连接，反馈单元1305的输出端与第一驱动单元1301、第二驱动单元1302和第三驱动单元1304连接。
反馈单元1305用于使能第一驱动单元1301、第二驱动单元1302和第三驱动单元 1304。
具体的，在功率器件的开通过程中，反馈单元1305，用于在栅极端的电压未达到第一阈值时，使能第一驱动单元1301；在栅极端的电压达到第一阈值，且未达到第二阈值时，使能第二驱动单元1302，并关断第一驱动单元；在栅极端的电压达到第二阈值时，使能第三驱动单元1304，并关断第二驱动单元1302或持续使能第二驱动单元1302。在功率器件的关断过程中，反馈单元1305，用于在栅极端的电压未达到第二阈值时，使能第一驱动单元1301；在栅极端的电压达到第二阈值，且未达到第一阈值时，使能第二驱动单元1302，并关断第一驱动单元1301；在栅极端的电压达到第一阈值时，使能第三驱动单元1304，并关断第二驱动单元1302或持续使能第二驱动单元1302。
示例性的，在N型晶体管的开通过程中，反馈单元，用于在栅极端的电压小于第一阈值时，使能第一驱动单元1301；在栅极端的电压大于或等于第一阈值，且小于第二阈值时，使能第二驱动单元1302，并关断第一驱动单元；在栅极端的电压大于或等于第二阈值时，使能第三驱动单元1303，并关断第二驱动单元1302或持续使能第二驱动单元1302。
在N型晶体管的关断过程中，反馈单元，用于在栅极端的电压大于第二阈值时，使能第一驱动单元1301；在栅极端的电压小于或等于第二阈值，且大于第一阈值时，使能第二驱动单元1302，并关断第一驱动单元；在栅极端的电压小于或等于第一阈值时，使能第三驱动单元1303，并关断第二驱动单元1302或持续使能第二驱动单元1302。
当功率器件为N型晶体管时，图13所示的驱动电路对应的时序，可以参照图11的时序，此处不再赘述。
示例性的，在P型晶体管的开通过程中，反馈单元，用于在栅极端的电压大于第一阈值时，使能第一驱动单元1301；在栅极端的电压小于或等于第一阈值，且大于第二阈值时，使能第二驱动单元1302，并关断第一驱动单元；在栅极端的电压小于或等于第二阈值时，使能第三驱动单元1303，并关断第二驱动单元1302或持续使能第二驱动单元1302。
在P型晶体管的关断过程中，反馈单元，用于在栅极端的电压小于第二阈值时，使能第一驱动单元1301；在栅极端的电压大于或等于第二阈值，且小于第一阈值时，使能第二驱动单元1302，并关断第一驱动单元；在栅极端的电压大于或等于第一阈值时，使能第三驱动单元1303，并关断第二驱动单元1302或持续使能第二驱动单元1302。
当功率器件为P型晶体管时，图13所示的驱动电路对应的时序，可以参照图12的时序，此处不再赘述。
下面对反馈单元的可能的一种结构进行介绍。
可选的，反馈单元包括：第一比较器、第二比较器和第一译码器；第一比较器的第一输入端连接栅极端，第一比较器的第二输入端接入第一电压，第一比较器的输出端连接第一译码器；其中，第一电压的值为第一阈值；第二比较器的第一输入端连接栅极端，第二比较器的第二输入端接入第二电压，第二比较器的输出端连接第一译码器；其中，第二电压的值为第二阈值；第一译码器的第一输出端连接第一驱动单元的使能端，第一译码器的第二输出端连接第二驱动单元的使能端，第一译码器的第三输出端连接第三驱动单元的使能端。示例性的，如图14所示，反馈单元包括第一译码器 1401、第一比较器1402和第二比较器1403。其中，第一比较器1402的输出端和第二比较器1403的输出端分别与第一译码器1401的两个输入端连接。
第一比较器1402和第二比较器1403用于判断栅极端的电压所处的区间并输出码值。第一比较器1402和第二比较器1403均有两个输入端。第一比较器1402的第一输入端连接栅极端，第一比较器1402的第二输入端接入第一电压，第一比较器1402的输出端连接第一译码器；其中，第一电压的值为第一阈值。第二比较器1403的第一输入端连接栅极端，第二比较器1403的第二输入端接入第二电压，第二比较器1403的输出端连接第一译码器；其中，第二电压的值为第二阈值。第一译码器1401用于将第一比较器1402和第二比较器1403输出的码值转换为使能信号并使能上述驱动单元。第一译码器1401可以有3个输出端，第一译码器1401的第一输出端连接第一驱动单元的使能端，第一译码器1401的第二输出端连接第二驱动单元的使能端，第一译码器1401的第三输出端连接第三驱动单元的使能端。可能的实现方式中，第一比较器和第二比较器将栅极端的电压与第一阈值和/或第二阈值进行比较，输出代表栅极端的电压所处的电压区间的码值。第一译码器1401用于根据该码值，产生3个使能信号，分别控制第一驱动单元、第二驱动单元和第三驱动单元。
示例性的，两个比较器输出的电压区间通过温度码表示。具体的，当栅极端的电压小于第一阈值时，第一比较器输出0，第二比较器输出0；当栅极端的电压大于等于第一阈值，且小于等于第二阈值时，第一比较器输出1，第二比较器输出0；当栅极端的电压大于第二阈值时，第一比较器输出1，第二比较器输出1。
示例性的，第一译码器可以将温度码转换为独热码或其他编码。示例性的，第一译码器可以将00转换为100，控制第一驱动单元输出第一驱动充电电流；10转换为010，控制第一驱动单元停止输出第一驱动充电电流，且第二驱动单元输出第二驱动充电电流；11转换为001或者011，控制第二驱动单元停止输出第二驱动充电电流或持续输出第二驱动充电电流，且第三驱动单元输出第三驱动充电电流。
需要说明的是，上述反馈单元在实际的电路中，由于制备工艺等影响，反馈单元输出的使能可能不准确。示例性的，反馈单元输出的使能可能提前，进而导致上述第二驱动单元或第三驱动单元提前输出驱动电流或提前停止输出驱动电流。
为了避免反馈单元输出的使能不准确，在上述实施例提供的驱动电路的基础上，驱动电路还包括延时单元。延时单元用于调整第一译码器输出的使能。
可选的，第一译码器的第二输出端与第二驱动单元的使能端之间设置有第一延时单元；和/或，第一译码器的第三输出端与第三驱动单元的使能端之间设置有第二延时单元；其中，第一延时单元用于延迟第二驱动单元的使能，第二延时单元用于延迟第三驱动单元的使能。
可以理解的是，驱动电路指实际的生产中，上述第一比较器和第二比较器中，第一阈值和/或第二阈值可能会产生偏差，进而导致反馈单元的反馈不准确，使得EMI增大和/或开关损耗增大。
示例性的，第二比较器中的第二阈值设置为2V，实际生产的驱动电路中第二阈值可能为1.9V。若无延时单元，驱动电路在栅极端电压为1.9V时，输出第三驱动充电电流，功率器件可能处于米勒平台时期，导致功率器件的EMI过大，使得开关电源不 符合生产标准等。增加延时单元，延迟驱动单元的使能，控制驱动电路在栅极端电压为2V时，准确输出第三驱动充电电流，满足功率器件的EMI标准。
示例性的，功率器件为N型晶体管，第一阈值大于该N型晶体管阈值电压，与阈值电压的差值为a，第二阈值大于米勒电压，与米勒电压的差值为b，a和b为变量，可以以毫伏或者伏为单位。该N型晶体管对应的时序图可以与图11所示的时序图一致。
若反馈单元中第二比较器的第二阈值出现偏差，变为米勒电压，该N型晶体管对应的时序图如图15所示。在N型晶体管的开通过程中，第一控制信号为方波上升沿。A时刻时，方波出现上升沿，产生第一控制信号，第一驱动单元开始向栅极端输出第一驱动充电电流。B时刻，栅极端的电压值为第一阈值，第一驱动单元停止输出第一驱动充电电流，第二驱动单元向栅极端输出第二驱动充电电流。C时刻，栅极端的电压为米勒电压，第二驱动单元停止输出第二驱动充电电流，第三驱动单元向栅极端输出第三驱动充电电流，且第三驱动充电电流大于第一驱动充电电流和第二驱动充电电流。同时，SW15信号开始下降，直至米勒平台时期结束。该N型晶体管在米勒平台时期的驱动充电电流大，EMI未降低，不满足功率器件的EMI标准。
在此基础上，在反馈单元和驱动单元之间增加延时单元，可以延迟驱动单元的使能，进而延迟第三驱动单元输出第三驱动电流的时间，使得驱动电路的时序与图11一致，满足功率器件的EMI标准。
本申请实施例中，延时单元可以调整反馈单元输出的结果，准确控制驱动电路的驱动单元，进而降低EMI和减少开关损耗。
为了保证不同内阻的功率器件在满足EMI需求的同时，可以快速开通或关断。上述实施例提供的驱动电路的基础上，驱动电路还可以包括调整信号产生单元。调整信号产生单元与第二驱动单元连接，调整信号产生单元用于控制第二驱动单元产生第二驱动充电电流或第二驱动放电电流。
调整信号产生单元包括基准电流接入端、基准电压接入端、电阻、比较器阵列和第二译码器；其中，基准电流接入端与电阻的一端、以及基准电流连接，基准电压接入端与比较器阵列连接，电阻的另一端接地，电阻的一端还与比较器阵列的输入端连接，比较器阵列的输出端与第二译码器的输入端连接，第二译码器的输出端与第二驱动单元连接。
电阻，用于产生基于基准电流，在电阻的一端产生电阻电压；比较器阵列，用于根据基准电压和电阻电压产生比较信号；第二译码器，用于根据比较信号控制第二驱动单元输出第二驱动充电电流。
示例性的，调整信号产生单元可能的结构如图16所示。调整信号产生单元包括：基准电流接入端1601、基准电压接入端1602、电阻1603、比较器阵列1604和第二译码器1605。其中，基准电流接入端1601与电阻1603的一端、以及基准电流连接，基准电压接入端1602与比较器阵列1604连接，电阻1603的另一端接地，电阻1603的一端还与比较器阵列1604的输入端连接，比较器阵列1604的输出端与第二译码器1605的输入端连接，第二译码器1605的输出端与第二驱动单元连接。
电阻1603，用于产生基于基准电流，在电阻1603的一端产生电阻电压。比较器 阵列1604，用于根据基准电压和电阻电压产生比较信号；第二译码器1605，用于根据比较信号控制第二驱动单元输出第二驱动充电电流或第二驱动放电电流。
可以理解的是，基准电流和基准电压为基准电路中的电流和电压值。基准电路可以为额外电路，也可以为开关电源中的某部分电路。基准电流和基准电压获取方式为现有技术，本申请实施例对此不作赘述。
本申请实施例中，调整信号产生单元通过改变电阻阻值，改变电阻电压，改变调整信号，进而改变第二驱动单元的驱动电流。
可能的实现方式中，比较器阵列1604将电阻根据基准电流产生的电阻电压与基准电压进行比较，输出码值，经译码器输出调整信号(例如，用ADJ表示)，进而改变第二驱动单元的驱动电流。
可能实现的方式中，调整信号产生单元与第二驱动单元连接，调整信号可以控制第二驱动单元中的PMOS或NMOS的开启数量，进而控制第二驱动单元输出的第二驱动充电电流或第二驱动放电电流的大小。
本申请实施例中，通过调节电阻的阻值，控制第二驱动电流的大小，使驱动电路满足不同内阻的功率器件的EMI需求，使驱动电路适用于多种情况，增加驱动电路的应用性。
可能的实现方式中，调整信号产生单元还用于控制上述延时单元的延时时间。
可选的，调整信号产生单元还包括第三译码器；其中，比较器阵列的输出端还与第三译码器的输入端连接，第三译码器的输出端与第二延时单元连接；第三译码器，用于根据比较信号控制第二延时单元延迟对第三驱动单元的使能。
本申请实施例中，第三译码器与第二译码器结构和作用类似，对此不作赘述。
这样，通过设置电阻的不同阻值，方便根据实际调整第三驱动单元输出驱动电流的时间，避免驱动电路实际生产使用中的不准确，提高驱动电路的实用性。
可能的实现方式中，上述调整信号产生单元还包括一个或多个锁存器，用于存储第二译码器或第三译码器输出的调整信号。这样，调整信号产生单元可以关断，减少调整信号产生单元运行时间，降低电路的能源损耗。
上述实施例提供的驱动电路的基础上，驱动单元包括充电电流控制模块和放电电流控制模块。充电电流控制模块用于控制充电电流的值；放电电流控制模块用户控制放电电流的值。
可选的，第一驱动单元包括第一充电电流控制模块和第一放电电流控制模块，第一充电电流控制模块用于控制第一驱动充电电流的值，第一放电电流控制模块用于控制第一驱动放电电流的值；第二驱动单元包括第二充电电流控制模块和第二放电电流控制模块，第二充电电流控制模块用于控制第二驱动充电电流的值，第二放电电流控制模块用于控制第二驱动放电电流的值；第三驱动单元包括第三充电电流控制模块和第三放电电流控制模块，第三充电电流控制模块用于控制第三驱动充电电流的值，第三放电电流控制模块用于控制第三驱动放电电流的值。
这样，驱动单元可以调整驱动电流的大小，更好的满足功率器件降低EMI和提高开关速度的应用需求。
可选的，第一充电电流控制模块、第二充电电流控制模块和第三充电电流控制模 块均包括多个并联的P型晶体管；第一放电电流控制模块、第二放电电流控制模块和第三放电电流控制模块均包括多个并联的N型晶体管。示例性的，图17为本申请实施例提供的一种具体的驱动电路的电路图。如图所示，图中包括第一驱动单元1701、第二驱动单元1702、第三驱动单元1703、功率器件1704、反馈单元1705、调整信号产生单元1706、第一延时单元1714和第二延时单元1715。
第一驱动单元1701包括第一充电电流控制模块1716和第一放电电流控制模块1717。其中，第一充电电流控制模块1716包括多个并联的P型晶体管，用于控制第一驱动充电电流的值。第一放电电流控制模块1717包括多个并联的N型晶体管，用于控制第一驱动放电电流的值。
第二驱动单元1702包括第二充电电流控制模块1718和第二放电电流控制模块1719，第二充电电流控制模块1718包括多个并联的P型晶体管，用于控制第二驱动充电电流的值。第二充电电流控制模块包括多个并联的N型晶体管，用于控制第二驱动放电电流的值。
第三驱动单元1703包括第三充电电流控制模块1720和第三放电电流控制模块1721，第三充电电流控制模块1720包括多个并联的P型晶体管，用于控制第三驱动充电电流的值。第三充电电流控制模块1721包括多个并联的N型晶体管，用于控制第三驱动放电电流的值。
功率器件1704的结构如上所述，此处不再赘述。
反馈单元1705包括第一比较器1707、第二比较器1708和第一译码器1709。
调整信号产生单元1706包括电阻1711、比较器阵列1702和第二译码器1712和第三译码器1713。
其中，第一驱动单元1701、第二驱动单元1702和第三驱动单元1703的输出端连接，并与功率器件1704的栅极端连接。功率器件的栅极端还与反馈单元1705中第一比较器1707的一个输入端和第二比较器1708的一个输入端连接。反馈单元中第一译码器1709有三个输出端，第一输出端与第一驱动单元1701的使能端连接，第二输出端与第二驱动单元1702的使能端连接，第三输出端与第三驱动单元1703的使能端连接。第一延时单元1714设置在反馈单元中第一译码器1709第二输出端与第二驱动单元1702的使能端之间。第二延时单元1715设置在反馈单元中第一译码器1709第三输出端与第三驱动单元1703的使能端之间。调整信号产生单元1706中第二译码器2012与第二驱动单元1703连接，第三译码器1713与第二延时单元1715连接。
下面对该驱动电路的工作流程进行说明。
示例性的，在驱动电路上电前，根据调整信号产生单元1706中电阻1711的阻值，确定调整信号，进而确定第二驱动充电电流的值或第二驱动放电电流的值，以及第一延迟单元和第二延迟单元控制的信号的延迟时间等。
驱动电路接收开关电源中控制器输出的方波信号(PWM)，当方波信号出现上升沿时，产生第一控制信号。反馈单元1705根据栅极端的电压输出第一使能信号，控制第一驱动单元1701输出第一驱动充电电流，功率器件1704栅极端的电压改变。当功率器件1704栅极端的电压达到第一阈值时，反馈单元1705输出第二使能信号控制第一驱动单元1701停止输出第一驱动充电电流，控制第二驱动单元1702输出第二驱动 充电电流。当功率器件1704栅极端的电压达到第二阈值时，反馈单元1705输出第三使能信号控制第二驱动单元1702停止输出或持续输出第二驱动充电电流，控制第三驱动单元1703输出第三驱动充电电流。其中，第一延时单元1714可以延迟第二使能信号，调整第二驱动单元输出第二驱动充电电流的时间。第二延时单元1715可以延迟第三使能信号，调整第三驱动单元输出第三驱动充电电流的时间。
当方波信号出现下降沿时，产生第二控制信号。反馈单元1705根据栅极端的电压输出第一使能信号，控制第一驱动单元1701输出第一驱动放电电流，功率器件1704栅极端的电压改变。当功率器件1704栅极端的电压达到第二阈值时，反馈单元1705输出第二使能信号控制第一驱动单元1701停止输出第一驱动放电电流，控制第二驱动单元1702输出第二驱动放电电流。当功率器件1704栅极端的电压达到第一阈值时，反馈单元1705输出第三使能信号控制第二驱动单元1702停止输出或持续输出第二驱动放电电流，控制第三驱动单元1703输出第三驱动放电电流。其中，第一延时单元1714可以延迟第二使能信号，调整第二驱动单元输出第二驱动放电电流的时间。第二延时单元1715可以延迟第三使能信号，调整第三驱动单元输出第三驱动放电电流的时间。
本申请实施例提供的驱动电路，通过第二驱动单元输出较小的第二驱动电流，实现功率器件的EMI降低，满足EMI需求；通过增加第三驱动单元输出较大的第三驱动电流，缩短功率器件的开通时间或关断时间，维持功率器件的高效率；通过反馈单元实现根据栅极端电压进行驱动，实现驱动电路的自控制，增加栅极电压的稳定性。
本申请实施例还提供一种驱动系统，包括功率器件和上述任一种驱动电路，驱动电路用于驱动功率器件开通或关断。其中，驱动系统可以是应用于各种电子电器的驱动系统，电子电器可以是程控交换机、通讯设备、电子检测设备和操控设备等。
示例性的，图18为本申请实施例提供的一种驱动系统结构示意图。如图18所示，驱动系统包括驱动电路1801和功率器件1802。驱动电路1801用于驱动功率器件1802开通或关断。驱动系统中还可以包括控制器1803等。控制器1803用于产生控制信号，控制信号用于指示功率器件1802开通或关断。本申请实施例所提供的驱动系统，其有益效果可以参见上述驱动电路所带来的有益效果，在此不再赘述。
本申请实施例还提供一种驱动模块，包括：上述实施例中任一种的驱动电路，驱动电路用于驱动功率器件开通或关断。
示例性的，图19为本申请实施例还提供一种驱动模块结构示意图。如图19所示，驱动模块包括驱动电路1901和基板1902。驱动电路1901可以集成在基板1902上。驱动模块中还可以包括功率器件1903等。功率器件1903集成在基板1902上。
本申请实施例所提供的驱动模块，其有益效果可以参见上述驱动电路所带来的有益效果，在此不再赘述。
本申请实施例还提供一种电子设备，包括：电源系统、功率器件和上述任一种驱动电路，驱动电路用于驱动功率器件开通或关断。电源系统用于对驱动电路供能。
电子设备可以是各种电子电器的开关电源，包括但不限于适配器和服务器电源等。电子电器可以是程控交换机、通讯设备、电子检测设备和操控设备等。电子设备也可以是包括驱动模块、驱动系统或集成电路的电子电器。
示例性的，图20为本申请实施例提供的一种电子设备结构示意图。如图20所示，电子设备包括电源系统2001、功率器件2002和驱动电路2003。电源系统2001用于对驱动电路2003供能，驱动电路2003用于驱动功率器件2002开通或关断。该电子设备还可以包括其他系统，例如控制系统等。本申请实施例提供的电子设备，其有益效果可以参见上述驱动电路所带来的有益效果，在此不再赘述。
以上的实施方式、结构示意图或仿真示意图仅为示意性说明本申请的技术方案，其中的尺寸比例并不构成对该技术方案保护范围的限定，任何在上述实施方式的精神和原则之内所做的修改、等同替换和改进等，均应包含在该技术方案的保护范围之内。

Claims (11)

  1. 一种驱动电路，其特征在于，所述驱动电路包括：第一驱动单元、第二驱动单元和第三驱动单元；
    其中，所述第一驱动单元的输出端、所述第二驱动单元的输出端和所述第三驱动单元的输出端用于与功率器件的栅极端连接；
    所述第一驱动单元，用于在接收到第一控制信号时，向所述栅极端输出第一驱动充电电流，使得所述栅极端的电压达到第一阈值；
    所述第二驱动单元，用于输出第二驱动充电电流，使得所述栅极端的电压从所述第一阈值达到第二阈值；
    所述第三驱动单元，用于在所述栅极端的电压达到第二阈值后，向所述栅极端输出第三驱动充电电流；所述第三驱动充电电流大于所述第一驱动充电电流和所述第二驱动充电电流。
  2. 根据权利要求1所述的驱动电路，其特征在于，所述第二阈值与所述功率器件的米勒平台电压的差值小于第一值。
  3. 根据权利要求1或2任一项所述的驱动电路，其特征在于，
    所述第一驱动单元，还用于在接收到用于第二控制信号时，向所述栅极端输出第一驱动放电电流，使得所述栅极端的电压达到第二阈值
    所述第二驱动单元，还用于输出第二驱动放电电流，使得所述栅极端的电压从所述第二阈值达到所述第一阈值；
    所述第三驱动单元，用于在所述栅极端的电压达到第一阈值后，向所述栅极端输出第三驱动放电电流；所述第三驱动放电电流大于所述第一驱动放电电流和所述第二驱动放电电流。
  4. 根据权利要求1-3任一项所述的驱动电路，其特征在于，所述驱动电路还包括反馈单元，所述反馈单元的输入端与所述栅极端连接；所述反馈单元的输出用于使能所述第一驱动单元、所述第二驱动单元和所述第三驱动单元；
    所述反馈单元，用于在所述栅极端的电压未达到所述第一阈值时，使能所述第一驱动单元；在所述栅极端的电压达到所述第一阈值，且未达到所述第二阈值时，使能所述第二驱动单元，并关断所述第一驱动单元；在所述栅极端的电压达到所述第二阈值时，使能所述第三驱动单元，并关断所述第二驱动单元或持续使能所述第二驱动单元；
    或者，所述反馈单元，用于在所述栅极端的电压未达到所述第二阈值时，使能所述第一驱动单元；在所述栅极端的电压达到所述第二阈值，且未达到所述第一阈值时，使能所述第二驱动单元，并关断所述第一驱动单元；在所述栅极端的电压达到所述第一阈值时，使能所述第三驱动单元，并关断所述第二驱动单元或持续使能所述第二驱动单元。
  5. 根据权利要求4所述的驱动电路，其特征在于，所述反馈单元包括：第一比较器、第二比较器和第一译码器；
    所述第一比较器的第一输入端连接所述栅极端，所述第一比较器的第二输入端接入第一电压，所述第一比较器的输出端连接所述第一译码器；其中，所述第一电压的值为所述第一阈值；
    所述第二比较器的第一输入端连接所述栅极端，所述第二比较器的第二输入端接入第 二电压，所述第二比较器的输出端连接所述第一译码器；其中，所述第二电压的值为所述第二阈值；
    所述第一译码器的第一输出端连接所述第一驱动单元的使能端，所述第一译码器的第二输出端连接所述第二驱动单元的使能端，所述第一译码器的第三输出端连接所述第三驱动单元的使能端。
  6. 根据权利要求1-5任一项所述的驱动电路，其特征在于，所述驱动电路还包括调整信号产生单元，所述调整信号产生单元与所述第二驱动单元连接，所述调整信号产生单元用于控制所述第二驱动单元产生所述第二驱动充电电流或所述第二驱动放电电流；
    所述调整信号产生单元包括基准电流接入端、基准电压接入端、电阻、比较器阵列和第二译码器；
    其中，所述基准电流接入端与所述电阻的一端、以及基准电流连接，所述基准电压接入端与所述比较器阵列连接，所述电阻的另一端接地，所述电阻的一端还与所述比较器阵列的输入端连接，所述比较器阵列的输出端与所述第二译码器的输入端连接，所述第二译码器的输出端与所述第二驱动单元连接；
    所述电阻，用于产生基于所述基准电流，在所述电阻的一端产生电阻电压；
    所述比较器阵列，用于根据所述基准电压和所述电阻电压产生比较信号；
    所述第二译码器，用于根据所述比较信号控制所述第二驱动单元输出所述第二驱动充电电流或所述第二驱动放电电流。
  7. 根据权利要求6所述的驱动电路，其特征在于，所述调整信号产生单元还包括第三译码器；
    其中，所述比较器阵列的输出端还与所述第三译码器的输入端连接，所述第三译码器的输出端与第二延时单元连接；
    所述第三译码器，用于根据所述比较信号控制所述第二延时单元延迟对第三驱动单元的使能。
  8. 根据权利要求1-7任一项所述的驱动电路，其特征在于，所述第一驱动单元包括第一充电电流控制模块和第一放电电流控制模块，所述第一充电电流控制模块用于控制所述第一驱动充电电流的值，所述第一放电电流控制模块用于控制所述第一驱动放电电流的值；
    所述第二驱动单元包括第二充电电流控制模块和第二放电电流控制模块，所述第二充电电流控制模块用于控制所述第二驱动充电电流的值，所述第二放电电流控制模块用于控制所述第二驱动放电电流的值；
    第三驱动单元包括第三充电电流控制模块和第三放电电流控制模块，所述第三充电电流控制模块用于控制所述第三驱动充电电流的值，所述第三放电电流控制模块用于控制所述第三驱动放电电流的值。
  9. 根据权利要求1-8任一项所述的驱动电路，其特征在于，所述第一阈值为所述功率器件的阈值电压，所述第一控制信号为脉冲宽度调制信号的上升沿或者下降沿，第二控制信号为脉冲宽度调制信号的下降沿或者上升沿。
  10. 一种驱动系统，其特征在于，包括功率器件和权利要求1-9任一项所述的驱动电路，所述驱动电路用于驱动所述功率器件开通或关断。
  11. 一种电子设备，其特征在于，包括电源系统、功率器件和权利要求1-9任一项所述 的驱动电路，所述驱动电路用于驱动所述功率器件开通或关断，所述电源系统用于对所述驱动电路供能。
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