WO2022226939A1 - 显示面板及其制造方法、显示装置 - Google Patents

显示面板及其制造方法、显示装置 Download PDF

Info

Publication number
WO2022226939A1
WO2022226939A1 PCT/CN2021/091175 CN2021091175W WO2022226939A1 WO 2022226939 A1 WO2022226939 A1 WO 2022226939A1 CN 2021091175 W CN2021091175 W CN 2021091175W WO 2022226939 A1 WO2022226939 A1 WO 2022226939A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
base substrate
isolation
orthographic projection
display area
Prior art date
Application number
PCT/CN2021/091175
Other languages
English (en)
French (fr)
Inventor
徐攀
袁志东
李永谦
袁粲
Original Assignee
京东方科技集团股份有限公司
合肥京东方卓印科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 合肥京东方卓印科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2021/091175 priority Critical patent/WO2022226939A1/zh
Priority to US17/640,530 priority patent/US20240049569A1/en
Priority to GB2305014.9A priority patent/GB2614833A/en
Priority to CN202180000990.7A priority patent/CN115669271A/zh
Publication of WO2022226939A1 publication Critical patent/WO2022226939A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80523—Multilayers, e.g. opaque multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8723—Vertical spacers, e.g. arranged between the sealing arrangement and the OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display panel, a manufacturing method thereof, and a display device.
  • OLED Organic Light-Emitting Diode
  • Organic Light Emitting Diode has the characteristics of active light emission, high brightness, high resolution, wide viewing angle, fast response, low energy consumption and flexibility. Therefore, OLED-based display technology may replace Liquid crystal display technology becomes the next generation display technology.
  • a display panel comprising: a base substrate including a display area and a peripheral area surrounding the display area; a spacer located in the peripheral area, the spacer including at least a portion of the spacer At least one isolation portion surrounding the display area, each isolation portion including a first isolation layer and a second isolation layer sequentially stacked on the base substrate, the first isolation layer on the base substrate
  • the first orthographic projection of the second isolation layer is located within the second orthographic projection of the second isolation layer on the base substrate
  • the cathode includes: a first cathode part, located on the side of the isolation member close to the display area, and a second cathode portion, located on the side of the separator away from the display area and spaced apart from the first cathode portion; and an encapsulation layer, located on the side of the cathode away from the base substrate, comprising a first inorganic layer, a second inorganic layer, and an organic layer located between the first inorganic
  • the peripheral area includes a bound area and an unbound area other than the bound area, the bound area surrounds a first edge of an edge of the display area, the unbound area A region surrounds a second edge of the edge other than the first edge; and each spacer includes a first spacer located in the unbound region and surrounding the second edge.
  • each isolation part further comprises: a second isolation part located in the binding area and connected to one end of the first isolation part; and a third isolation part located in the binding area, and connected to the other end of the first isolation part, the third isolation part and the second isolation part both extend in a direction away from the display area.
  • the display panel further includes: a pad located in the bonding area; and at least one dam located in the bonding area and located between the first edge and the pad , the at least one cofferdam extends in a direction from the second isolation portion to the third isolation portion.
  • the encapsulation layer is located on the side away from the base substrate, the orthographic projection of the pad on the base substrate is located outside the orthographic projection of the encapsulation layer on the base substrate, and the The orthographic projection of the at least one dam on the base substrate is within the orthographic projection of the encapsulation layer on the base substrate.
  • the at least one dam is located between the cathode and the pad.
  • the at least one dam includes a plurality of dams arranged in a direction from the first edge to the pad.
  • the display panel further includes: a colloid part located in the binding area and between the at least one dam and the pad; a colloid layer located on the encapsulation layer away from the one side of the base substrate; and a cover plate, located on the side of the colloid layer away from the base substrate.
  • each isolation part further includes: a third isolation layer located between the first isolation layer and the base substrate, the first orthographic projection is located on the third isolation layer on the within the third orthographic projection on the base substrate.
  • each isolation portion further includes: a support layer located between the third isolation layer and the base substrate, the first orthographic projection, the second orthographic projection, and the third The orthographic projection is within the orthographic projection of the support layer on the base substrate.
  • each isolation part further includes: a first conductive part located on a side of the second isolation layer away from the base substrate, the first conductive part being on the positive side of the base substrate The projection is within the second orthographic projection.
  • the display panel further includes: a power line located in the peripheral region, the power line is located between the support layer and the base substrate, and is connected to each isolation portion; and a first Two conductive parts are located between the spacer and the display area, and between the first cathode part and the power supply line, the second conductive part is in contact with the first cathode part, and is in contact with the first cathode part The power cord is connected.
  • the display panel further includes: a first insulating layer including a first insulating portion located in the peripheral region, the first insulating portion being located between the support layer and the power line; a first insulating portion located in the peripheral region.
  • two insulating layers including a second insulating portion located in the peripheral region, the second insulating portion being located between the support layer and the first insulating portion;
  • a third insulating layer including a second insulating portion located in the peripheral region Three insulating parts, the third insulating part is located between the support layer and the third isolation layer; and a fourth insulating layer, including a fourth insulating part located in the peripheral region, the fourth insulating part is located in between the second isolation layer and the first conductive part;
  • each isolation part further includes: a first connection part, penetrating the second insulating part and the first insulating part, and connected to the support The layer is connected to the power line, the second connection part penetrates the third insulating part and is connected to the third isolation
  • the display panel further includes: a connection layer located between the second conductive part and the power line, and between the spacer and the display area, the connection layer including : a first connection layer, located between the second conductive part and the power line, and a second connection layer, located between the second conductive part and the first connection layer; at least one fourth connection part , which penetrates through the second insulating part and the first insulating part, and is connected with the first connection layer and the power line; at least one fifth connection part penetrates through the third insulating part and is connected with the power line.
  • a second connection layer is connected to the first connection layer; and at least one sixth connection portion penetrates the fourth insulating portion and is connected to the second conductive portion and the second connection layer.
  • the orthographic projection of the first connection layer on the base substrate is within the orthographic projection of the second connection layer on the base substrate.
  • the first connection part and the support layer are integrally formed; the second connection part and the third isolation layer are integrally formed; the third connection part and the first conductive part are integrally formed the at least one fourth connection part and the first connection layer are integrally provided; the at least one fifth connection part and the second connection layer are integrally provided; and the at least one sixth connection part and the The second conductive portion is integrally provided.
  • the cathode further includes: a third cathode portion located on a side of each isolation portion away from the base substrate and spaced apart from the first cathode portion and the second cathode portion.
  • the at least one isolation part includes a plurality of isolation parts
  • the cathode further includes: a fourth cathode part located between two adjacent isolation parts of the plurality of isolation parts and connected to the isolation parts.
  • the third cathode portion is spaced apart.
  • the display panel further includes a functional layer between the cathode and the base substrate, the functional layer includes at least one of an electron transport layer and an electron injection layer, the functional layer includes : a first functional part located on the side of the spacer close to the display area; and a second functional part located on the side of the spacer away from the display area and spaced from the first functional part .
  • an edge of the first orthographic projection close to the display area does not overlap an edge of the second orthographic projection close to the display area; and the first orthographic projection is away from an edge of the display area Does not overlap with the edge of the second orthographic projection away from the display area.
  • the minimum distance between the edge of the first orthographic projection and the edge of the second orthographic projection is 1-3 microns.
  • the material of the second isolation layer and the third isolation layer includes titanium, and the material of the first isolation layer includes aluminum.
  • a method for manufacturing a display panel including: providing a base substrate, the base substrate including a display area and a peripheral area surrounding the display area; forming a substrate located in the peripheral area
  • the spacer includes at least one spacer at least partially surrounding the display area, each spacer includes a first spacer layer and a second spacer layer stacked on the base substrate in sequence, the spacer
  • the first orthographic projection of the first isolation layer on the base substrate is located within the second orthographic projection of the second isolation layer on the base substrate;
  • a cathode is formed, and the cathode comprises: a first cathode part , located on the side of the spacer close to the display area, and a second cathode portion, located on the side of the spacer away from the display area, and spaced apart from the first cathode portion; and
  • An encapsulation layer is formed on a side of the cathode away from the base substrate, and the encapsulation layer includes a first
  • each isolation part further includes: a third isolation layer located between the first isolation layer and the base substrate, the first orthographic projection is located on the third isolation layer on the within the third orthographic projection on the base substrate; a support layer, located between the third isolation layer and the base substrate, the first orthographic projection, the second orthographic projection and the third orthographic projection The projection is located within the orthographic projection of the support layer on the base substrate; and a first conductive portion is located on the side of the second isolation layer away from the base substrate, and the first conductive portion is located on the side of the second isolation layer away from the base substrate.
  • the orthographic projection on the base substrate is within the second orthographic projection.
  • forming the spacers includes: forming at least one initial spacer on the base substrate, each initial spacer including the support layer, the support layer, the The third isolation layer, the first initial isolation layer, and the second isolation layer, the orthographic projection of the first initial isolation layer on the base substrate is close to the edge of the display area, the second The orthographic projection of the isolation layer on the base substrate is close to the edge of the display area and the orthographic projection of the third isolation layer on the base substrate is close to the edge of the display area, and the first initial The orthographic projection of the isolation layer on the base substrate is away from the edge of the display area, and the orthographic projection of the second isolation layer on the base substrate is away from the edge of the display area and the third isolation layer
  • the orthographic projection on the base substrate is coincident with the edge of the display area away from the display area; and the first conductive portion is formed, and the first initial isolation layer is close to the first side surface of the display area and away from the display area. At least one of the second sides of the display area is etched to
  • the forming the first conductive portion, and etching at least one of a first side surface of the first preliminary isolation layer close to the display area and a second side surface away from the display area Etching includes: forming a fourth insulating portion on a side of the second isolation layer away from the base substrate, the fourth insulating portion having a part of a side of the second isolation layer away from the base substrate exposed and the fourth insulating portion exposes the first side and the second side; forming a conductive material layer partially located in the opening and covering the first side and the second side; and wet-etching the conductive material layer to obtain the first conductive portion partially located in the opening, wherein the wet-etching causes the first side and the second side At least one of them is etched to obtain the first isolation layer.
  • the forming the first conductive portion, and etching at least one of a first side surface of the first preliminary isolation layer close to the display area and a second side surface away from the display area Etching includes: forming a fourth insulating material layer covering the first side surface and the second side surface, the fourth insulating material layer having a part of a side of the second isolation layer away from the base substrate exposed an opening; forming a conductive material layer partially located in the opening and covering the fourth insulating material layer; and performing a first wet etching on the conductive material layer to obtain the fourth insulating material layer partially located in the opening a conductive portion; dry-etching the fourth insulating material layer to expose the first side and the second side; and at least one of the first and second sides A second wet etching is performed to obtain the first isolation layer.
  • the base substrate further includes a sacrificial region
  • the method further includes: forming an initial colloidal portion on the sacrificial region and the peripheral region, and the display region is located in a region defined by the initial colloidal portion.
  • the orthographic projection of the initial colloid part on the base substrate is a regular pattern; after the encapsulation layer is formed, the initial colloid layer is filled in the space; the initial colloid layer is far from the lining forming a cover plate on one side of the base substrate; and performing a cutting process to remove the sacrificial region, the portion of the initial colloid portion on the sacrificial region, the portion of the initial colloid layer on the sacrificial region, and the The part of the cover plate located on the sacrificial area, the part of the initial colloid part located in the peripheral area is used as the colloid part, and the remaining part of the initial colloid layer is used as the colloid layer.
  • a display device comprising: the display panel described in any of the above embodiments.
  • FIG. 1A is a schematic top view illustrating a display panel according to some embodiments of the present disclosure
  • Figure 1B is a schematic cross-sectional view taken along B-B' shown in Figure 1A;
  • 1C is a schematic diagram illustrating a first orthographic projection and a second orthographic projection according to some embodiments of the present disclosure
  • 1D is a schematic cross-sectional view illustrating an encapsulation layer according to some embodiments of the present disclosure
  • FIG. 2 is a schematic cross-sectional view illustrating a sub-pixel in a display panel according to some embodiments of the present disclosure
  • FIG. 3 is a schematic top view illustrating a display panel according to other embodiments of the present disclosure.
  • Fig. 4A is a partial enlarged schematic view of the binding region shown in Fig. 3;
  • Figure 4B is a schematic cross-sectional view taken along C-C' shown in Figure 4A;
  • FIG. 5 is a schematic flowchart illustrating a method for manufacturing a display panel according to some embodiments of the present disclosure
  • 6A-6C are schematic cross-sectional views illustrating the resulting structures at different stages of forming a spacer in accordance with some implementations of the present disclosure
  • FIGS. 7A-7D are schematic cross-sectional views illustrating structures resulting from different stages of forming spacers according to further implementations of the present disclosure.
  • FIG. 8 is a schematic flowchart illustrating a method for manufacturing a display panel according to other embodiments of the present disclosure.
  • 9A and 9B are schematic top views illustrating display panels according to further embodiments of the present disclosure.
  • first,” “second,” and similar words do not denote any order, quantity, or importance, but are merely used to distinguish the different parts.
  • “Comprising” or “comprising” and similar words mean that the element preceding the word covers the elements listed after the word, and does not exclude the possibility that other elements are also covered.
  • “Up”, “down”, etc. are only used to indicate the relative positional relationship, and when the absolute position of the described object changes, the relative positional relationship may also change accordingly.
  • a specific component when a specific component is described as being between a first component and a second component, there may or may not be an intervening component between the specific component and the first component or the second component.
  • the specific component When it is described that a specific component is connected to other components, the specific component may be directly connected to the other components without intervening components, or may not be directly connected to the other components but have intervening components.
  • FIG. 1A is a schematic top view illustrating a display panel according to some embodiments of the present disclosure.
  • Fig. 1B is a schematic cross-sectional view showing a line B-B' shown in Fig. 1A .
  • 1C is a schematic diagram illustrating a first orthographic projection and a second orthographic projection according to some embodiments of the present disclosure.
  • 1D is a schematic cross-sectional view illustrating an encapsulation layer according to some embodiments of the present disclosure.
  • the display panel includes a base substrate 11 , a spacer 12 , a cathode 13 and an encapsulation layer 16 .
  • the base substrate 11 includes a display area 111 and a peripheral area 112 surrounding the display area 111 .
  • the display area 111 is schematically shown as substantially circular, and the peripheral area 112 is schematically shown as substantially circular.
  • the display area 111 may have an irregular shape such as a heart shape.
  • the display area 111 may be substantially rectangular, and the peripheral area 112 may be substantially rectangular ring.
  • the base substrate 11 may include a flexible substrate such as a polyimide (PI) substrate or the like.
  • a plurality of sub-pixels P of the display panel are located in the display area 111 .
  • the plurality of subpixels P include red subpixels, green subpixels, and blue subpixels.
  • the spacer 12 is located in the peripheral region 112 .
  • the spacer 12 includes at least one spacer 121 at least partially surrounding the display area 111 .
  • FIG. 1A shows the case where the spacer 12 completely surrounds the display area 111 . It should be understood that in the case where the spacer 12 includes the plurality of spacers 121 , the plurality of spacers 121 are spaced apart from each other in the direction from the display area 111 to the peripheral area 112 .
  • each isolation part 121 includes a first isolation layer 1211 and a second isolation layer 1212 sequentially stacked on the base substrate 11 .
  • the first orthographic projection 1211' of the first isolation layer 1211 on the base substrate 11 is located within the second orthographic projection 1212' of the second isolation layer 1212 on the base substrate 11, see FIG. 1C .
  • the material of the first isolation layer 1211 includes aluminum
  • the material of the second isolation layer 1212 includes titanium.
  • the cathode 13 includes a first cathode portion 131 and a second cathode portion 132 spaced apart from the first cathode portion 131 .
  • the first cathode portion 131 is located on the side of the spacer 12 close to the display area 111
  • the second cathode portion 132 is located on the side of the spacer 12 away from the display area 111 .
  • the two parts of the cathode 13 on both sides of the separator 12 are spaced apart.
  • the first cathode portion 131 extends from the display area 111 to the peripheral area 112 , and the plurality of sub-pixels P share the first cathode portion 131 .
  • the encapsulation layer 16 is located on the side of the cathode 13 away from the base substrate 11 .
  • the encapsulation layer 16 includes a first inorganic layer 161 , a second inorganic layer 162 , and an organic layer 163 between the first inorganic layer 161 and the second inorganic layer 162 .
  • the edge of the orthographic projection of the first inorganic layer 161 on the base substrate 11 , the edge of the orthographic projection of the organic layer 163 on the base substrate 11 and the edge of the orthographic projection of the second inorganic layer 162 on the base substrate 11 overlap. It should be understood that overlapping here refers to complete overlapping. In other words, the orthographic projections of the first inorganic layer 161 , the second inorganic layer 162 and the organic layer 163 on the base substrate 11 are the same.
  • the peripheral area 112 is provided with the spacer 12 including at least one spacer 121 , each spacer 121 includes the first spacer 1211 and the second spacer 1212 , and the cathode 13 is located on both sides of the spacer 12 .
  • the first cathode part 131 and the second cathode part 132 are spaced apart.
  • the number of the isolation parts 121 in the isolation member 12 is greater than or equal to 7, for example, 15, 20, 25 and so on. In this way, water vapor and oxygen can be more effectively blocked from entering the display area 111 through the cathode 13, thereby further improving the display effect of the display panel. In some embodiments, the number of the isolation parts 121 in the isolation element 12 is greater than or equal to 30, for example, 35, 40, 50, and the like. In this way, water vapor and oxygen can be more effectively blocked from entering the display area 111 through the cathode 13 , thereby further improving the display effect of the display panel.
  • the minimum distance between two adjacent isolation portions 121 in the isolation member 12 is greater than or equal to 10 microns and less than or equal to 15 microns, for example, 12 microns, 14 microns, and the like. In this way, the cathode 13 can be disconnected into different parts more efficiently.
  • the edges of the first orthographic projection 1211' and the edges of the second orthographic projection 1212' do not overlap.
  • the side of the first isolation layer 1211 close to the display area 111 is further away from the display area 111 than the side of the second isolation layer 1212 close to the display area 111
  • the side of the first isolation layer 1211 away from the display area 111 is further away from the second isolation layer 1212
  • the side surface of the display area 111 is closer to the display area 111 . This is more helpful for blocking the cathode 13 .
  • the minimum distance between the edge of the first orthographic projection 1211 ′ away from the display area 111 and the edge of the second orthographic projection 1212 ′ away from the display area 111 is 1 ⁇ m to 3 ⁇ m, such as 1.5 ⁇ m, 2 ⁇ m, 2.5 ⁇ m microns, etc. Within this range, the part of the second isolation layer 1212 not covered by the first isolation layer 1211 is not easily collapsed, thereby ensuring that the cathode 13 can be partitioned into different parts, which can further improve the display effect of the display panel.
  • the cathode 13 can also be divided into more parts, which will be described below with reference to different embodiments.
  • the cathode 13 in addition to the first cathode part 131 and the second cathode part 132 , the cathode 13 further includes a third cathode part 133 .
  • the third cathode part 133 is located on a side of each separation part 121 away from the base substrate 11 and is spaced apart from the first cathode part 131 and the second cathode part 132 .
  • Such a structure is more helpful to block water vapor and oxygen from entering the display area 111 through the cathode 13 , thereby further reducing the adverse effects of water vapor and oxygen on the display panel, thereby further improving the display effect of the display panel.
  • the spacer 12 includes a plurality of spacers 121 .
  • the cathode 13 in addition to the first cathode part 131 , the second cathode part 132 and the third cathode part 133 , the cathode 13 further includes a fourth cathode part 134 .
  • the fourth cathode part 134 is located between adjacent two isolation parts 121 among the plurality of isolation parts 121 and is spaced apart from the third cathode part 133 .
  • Such a structure is more helpful to block water vapor and oxygen from entering the display area 111 through the cathode 13 , thereby further reducing the adverse effects of water vapor and oxygen on the display panel, thereby further improving the display effect of the display panel.
  • one or some layers between the cathode 13 and the base substrate 11 may also be partitioned into different parts.
  • the display panel further includes a functional layer 23 between the cathode 13 and the base substrate 11 .
  • the functional layer 23 includes at least one of an electron transport layer and an electron injection layer.
  • the functional layer 23 includes a first functional part 231 and a second functional part 232 spaced apart from the first functional part 231 .
  • the first functional part 231 is located on the side of the spacer 12 close to the display area 111
  • the second functional part 232 is located on the side of the spacer 12 away from the display area 111 .
  • the two parts of the functional layer 23 on both sides of the separator 12 are also spaced apart.
  • Such a structure helps to block water vapor and oxygen from entering the display area 111 through the functional layer 23 , thereby reducing the adverse effects of water vapor and oxygen on the display panel and improving the display effect of the display panel.
  • the first functional part 131 and the second functional part 132 each include two layers, one of which is is part of the electron transport layer and the other layer is part of the electron transport layer.
  • the functional layer 23 further includes at least one of a third functional part 233 and a fourth functional part 234 .
  • the third functional part 233 is located between the separator 121 and the third cathode part 133
  • the fourth functional part 234 is located between two adjacent isolation parts 121 and between the fourth cathode part 134 and the base substrate 11 .
  • the display panel further includes other layers (eg, an organic cap layer) located between the cathode 13 and the encapsulation layer 16, the other layers can also be cut off by the spacer 12, so that the display effect of the display panel can be further improved.
  • other layers eg, an organic cap layer
  • each isolation portion 121 may also include other layers, which will be described below with reference to different embodiments.
  • each isolation portion 121 further includes a third isolation layer 1213 between the first isolation layer 1211 and the base substrate 11 .
  • the first orthographic projection 1211' is located within the third orthographic projection of the third isolation layer 1213 on the base substrate 11.
  • the third orthographic projection may, for example, be completely coincident with the second orthographic projection 1212' shown in Figure 1C.
  • the material of the third isolation layer 1213 may include titanium.
  • each isolation portion 121 further includes a support layer 1214 located between the third isolation layer 1213 and the base substrate 11 .
  • the first orthographic projection 1211', the second orthographic projection 1212' and the third orthographic projection are located within the orthographic projection of the support layer 1214 on the base substrate 11. In this way, the possibility of collapse of the first isolation layer 1211 , the second isolation layer 1212 and the third isolation layer 1213 can be reduced, the reliability of the isolation portion 121 can be improved, and the display effect of the display panel can be further improved.
  • each isolation portion 121 further includes a first conductive portion 1215 located on a side of the second isolation layer 1212 away from the base substrate 11 .
  • the orthographic projection of the first conductive portion 1215 on the base substrate 11 is located within the second orthographic projection 1212'.
  • the material of the first conductive part 1215 includes a transparent material, such as indium tin oxide (ITO) and the like. It should be understood that when the isolation part 121 includes the first conductive part 1215 , the third cathode part 133 of the cathode 13 and the third functional part 233 of the functional layer 23 are located on the side of the first conductive part 1215 away from the base substrate 11 .
  • the display panel further includes a power line 20 and a second conductive portion 21 located in the peripheral region 112 .
  • the power supply line 20 is located between the support layer 1214 and the base substrate 11 , and is connected to each isolation portion 121 .
  • the second conductive part 21 is located between the spacer 12 and the display area 111 , and between the first cathode part 131 and the power line 20 .
  • the second conductive portion 21 is in contact with the first cathode portion 131 and is connected to the power supply line 20 .
  • the first cathode part 131 is connected to the power line 20 via the second conductive part 21 .
  • the material of the second conductive portion 21 includes a transparent material such as ITO or the like.
  • each isolation portion 121 is connected to the power line 20 connected to the first cathode portion 131 , which helps to discharge static electricity, thereby reducing the adverse effect of static electricity on the display panel and further improving the display effect of the display panel.
  • connection between the isolation portion 121 and the power line 20 are described below.
  • the display panel further includes a first insulating layer IL1 , a second insulating layer IL2 , a third insulating layer IL3 and a fourth insulating layer IL4 .
  • Each isolation part 121 further includes a first connection part CP1 , a second connection part CP2 and a third connection part CP3 .
  • the first insulating layer IL1 includes a first insulating portion IL11 located in the peripheral region 112
  • the second insulating layer IL2 includes a second insulating portion IL21 located in the peripheral region 112
  • the third insulating layer IL3 includes a third insulating portion IL31 located in the peripheral region 112
  • the fourth insulating layer IL4 includes a fourth edge portion IL41 located in the peripheral region 112 .
  • the first insulating portion IL11 is located between the support layer 1214 and the power line 20
  • the second insulating portion IL21 is located between the support layer 1214 and the first insulating portion IL11
  • the third insulating portion IL31 is located between the support layer 1214 and the third isolation layer 1213 .
  • the fourth edge portion IL41 is located between the second isolation layer 1212 and the first conductive portion 1215 .
  • the first connection portion CP1 penetrates the second insulating portion IL21 and the first insulating portion IL11 and is connected to the support layer 1214 and the power supply line 20 .
  • the first connection portion CP1 and the support layer 1214 are integrally provided.
  • the second connection portion CP2 penetrates through the third insulating portion IL31 and is connected to the third isolation layer 1213 and the support layer 1214 .
  • the second connection portion CP2 and the third isolation layer 1213 are integrally provided.
  • the third connection portion CP3 penetrates through the fourth insulating portion IL41 and is connected to the first conductive portion 1215 and the second isolation layer 1213 .
  • the third connection portion CP3 and the first conductive portion 1215 are integrally provided. It should be understood that when the display panel further includes the third functional part 233 , the third connection part CP3 also penetrates through the third functional part 233 .
  • the isolation part 121 is connected to the power line 20 via the first connection part CP1, and the layers in the isolation part 121 are connected to each other via the second connection part CP2 and the third connection part CP3, so that static electricity can be more effectively conducted to Power cord 20.
  • connection between the second conductive portion 21 and the power line 20 are described below.
  • the display panel further includes a connection layer 22 , at least one fourth connection part CP4 , at least one fifth connection part CP5 and at least one sixth connection part CP6 .
  • the display panel includes a plurality of fourth connection parts CP4, a plurality of fifth connection parts CP5 and a plurality of sixth connection parts CP6.
  • connection layer 22 is located between the second conductive portion 21 and the power line 20 and between the spacer 12 and the display area 111 .
  • the connection layer 22 includes a first connection layer 221 between the second conductive portion 21 and the power line 20, and a second connection layer 222 between the second conductive portion 21 and the first connection layer 221.
  • the first connection layer 221 and the second connection layer 222 each include a stack, eg, Ti/Al/Ti.
  • the fourth connection portion CP4 penetrates the second insulating portion IL21 and the first insulating portion IL11 and is connected to the first connection layer 221 and the power supply line 20 .
  • the fourth connection part CP4 and the first connection layer 221 are integrally provided.
  • the fifth connection portion CP5 penetrates the third insulating portion IL31 and is connected to the second connection layer 222 and the first connection layer 221 .
  • the fifth connection part CP5 and the second connection layer 222 are integrally provided.
  • the sixth connection portion CP6 penetrates through the fourth insulating portion IL41 and is connected to the second conductive portion 21 and the second connection layer 222 .
  • the sixth connection portion CP6 and the second conductive portion 21 are integrally provided. It should be understood that when the display panel further includes the first functional part 231 , the sixth connection part CP6 also penetrates the first functional part 231 .
  • the second conductive portion 21 is connected to the power line 20 via the first connection layer 221 and the second connection layer 222 , which helps to reduce the resistance of the connection layer 22 and improves the uniformity of the power signal applied through the power line 20 . .
  • the power signal applied via the power line 20 can be transmitted to the first cathode portion 131 via the connection layer 22 and the second conductive portion 21 , and then applied to the sub-pixels P in the display area 111 .
  • the orthographic projection of the first connection layer 221 on the base substrate 11 is located within the orthographic projection of the second connection layer 222 on the base substrate 11 . In this way, it can be ensured that the second connection layer 222 can be connected to the first connection layer 221 via the fifth connection part CP5 , thereby ensuring that the second conductive part 21 is connected to the power line 20 .
  • peripheral area 112 may be located on the same layer. It should also be understood that certain layers located in the peripheral area 112 may extend from the display area 111 to the peripheral area 112 . Next, description will be given with reference to FIG. 2 .
  • FIG. 2 is a schematic cross-sectional view illustrating a sub-pixel in a display panel according to some embodiments of the present disclosure.
  • the sub-pixel P includes a pixel driving circuit
  • the pixel driving circuit may include a thin film transistor T and a capacitor C.
  • the pixel driving circuit may also include other thin film transistors.
  • the pixel driving circuit may include 6 thin film transistors and one capacitor C (6T1C); for another example, the pixel driving circuit may include 7 thin film transistors and one capacitor C (7T1C).
  • the thin film transistor T includes an active layer AT on the side of the base substrate 11 , a fifth insulating layer IL5 on the side of the active layer AT away from the base substrate 11 , and a fifth insulating layer IL5 on the side of the fifth insulating layer IL5 away from the base substrate 11 .
  • the gate GT, the first and second electrodes ED1 and ED2 penetrating the first and second insulating layers IL1 and IL2.
  • the first insulating layer IL1 is located on the side of the gate GT away from the base substrate 11
  • the second insulating layer IL2 is located at the side of the first insulating layer IL1 away from the base substrate 11.
  • the capacitor C includes a first electrode plate C1 between the fifth insulating layer IL5 and the first insulating layer IL1, and a second electrode plate C2 between the first insulating layer IL1 and the second insulating layer IL2. It should be understood that the capacitor C further includes a first insulating layer IL1 between the first electrode plate C1 and the second electrode plate C2.
  • the first electrode plate C1 and the gate electrode GT may be located on the same layer, that is, formed by patterning the same material layer.
  • the material of at least one of the first electrode plate C1 and the second electrode plate C2 may include a metal or an alloy.
  • the sub-pixel P also includes an anode AND connected to the second electrode ED2 of the thin film transistor T via a connector CM.
  • the connection piece CM is connected to the second electrode ED2 via a via hole penetrating the third insulating layer IL3 and the first planarization layer PLN1, and the anode AND is connected to the connection piece CM via a via hole penetrating the fourth insulating layer IL4 and the second planarization layer PLN2 connect.
  • the third insulating layer IL3 covers the first electrode ED1 and the second electrode ED2, and is located on the side of the second insulating layer IL2 away from the base substrate 11, and the first planarization layer PLN1 is located at the third insulating layer IL3 away from the base substrate.
  • the fourth insulating layer IL4 is located on the side of the first planarization layer PLN1 away from the base substrate 11, and the connector CM is located between the first planarization layer PLN1 and the fourth insulating layer IL4, and the second planarization layer
  • the PLN2 is located on the side of the fourth insulating layer IL4 away from the base substrate 11
  • the anode AND is located at the side of the second planarization layer PLN2 away from the base substrate 11 .
  • the sub-pixel P further includes a light emitting layer (not shown in FIG. 2 ) located on the side of the anode AND away from the base substrate 11 and the cathode 13 shown in FIG. 1B .
  • a plurality of sub-pixels P may share the cathode 13 .
  • the material of the active layer AT may include amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), One or more of polysilicon (p-Si), hexathiophene, and polythiophene.
  • materials of the first insulating layer IL1 , the second insulating layer IL2 , the third insulating layer IL3 , the fourth insulating layer IL4 , and the fifth insulating layer IL5 may include silicon oxide, silicon nitride, or silicon Inorganic materials such as nitrogen oxides.
  • the materials of the first planarization layer PLN1 and the second planarization layer PLN2 may include organic materials such as polyimide.
  • the material of at least one of the first electrode ED1 and the second electrode ED2 may include a metal or an alloy.
  • the first electrode ED1 and the second electrode ED1 may comprise a stack, which may be Ti/Al/Ti, for example.
  • FIG. 2 also shows the pixel defining layer PDL and the buffer layer BF in the display panel.
  • the pixel defining layer PDL is used to define the sub-pixels P.
  • the buffer layer BF is located between the base substrate 11 and the active layer AT, and is used to block water vapor and oxygen from entering the active layer AT.
  • the power line 20 shown in FIG. 1B may be located on the same layer as the gate GT shown in FIG. 2 .
  • the support layer 1214 and the first connection layer 221 shown in FIG. 1B may be located on the same layer as the first electrode ED1 and the second electrode ED2 shown in FIG. 2 .
  • the second connection layer 221 shown in FIG. 1B may be located at the same layer as the connection member CM shown in FIG. 2 .
  • the first isolation layer 1211 , the second isolation layer 1212 and the third isolation layer 1213 shown in FIG. 1B may be respectively located at the same layer as a certain layer in the stack of the connector CM .
  • first conductive part 1215 and the second conductive part 21 shown in FIG. 1B may be located on the same layer as the anode AND shown in FIG. 2 .
  • FIG. 3 is a schematic top view illustrating a display panel according to other embodiments of the present disclosure. It should be noted that the schematic cross-sectional view taken along B-B' shown in FIG. 3 is still as shown in FIG. 1B .
  • the peripheral area 112 includes a binding area 1121 and a non-binding area 1122 other than the binding area 1121 .
  • the binding area 1121 surrounds the first edge E1 of the edge of the display area 111
  • the non-binding area 1122 surrounds the second edge E2 of the edge of the display area 111 excluding the first edge E1 .
  • Each isolation portion 121 includes a first isolation portion 121A located in the non-binding region 1122 and surrounding the second edge E2. It should be noted that FIG. 3 only schematically shows one isolation portion 121 , and the structures of other isolation portions 121 can be referred to as shown in FIG. 3 .
  • the bonding area 1121 is used to establish an electrical connection with an external circuit (eg, a circuit board, an integrated circuit chip, etc.) by means of bonding.
  • the bonding area 1121 may be provided with the pads 14 and other signal lines.
  • External circuits may provide signals to the display panel via the pads 114 .
  • the boundaries of the bound area 1121 and the unbound area 1122 shown in FIG. 3 are merely illustrative. Those skilled in the art understand that the border size of the bound area 1121 is generally larger than the border size of the unbound area 1122, that is, the minimum distance between the edge of the bound area 1121 away from the display area 111 and the edge of the display area 111 is greater than that of the unbound area 112.
  • the fixed area 1122 is away from the minimum distance between the edge of the display area 111 and the edge of the display area 111 . Therefore, according to the size of the frame, a part of the peripheral area 112 can be determined as the binding area 1121 , and the remaining part is the non-binding area 1122 .
  • the first isolation portion 121A disposed around the second edge E2 can block water vapor and oxygen from entering the display area 111 through the cathode 13, thereby improving the display effect of the display panel.
  • each isolation part 121 further includes a second isolation part 121B and a third isolation part 121C both located in the binding region 1121 .
  • the second spacer 121B is connected to one end of the first spacer 121A
  • the third spacer 121C is connected to the other end of the first spacer 121A.
  • both the third isolation portion 121C and the second isolation portion 121B extend in a direction away from the display area 111 .
  • start and end points of the first isolation portion 121A extending around the second edge E2 are the two ends of the first isolation portion 121A, that is, the positions where the first isolation portion 121A intersects the two dotted lines in FIG. 3 .
  • each isolation portion 121 further includes a second isolation portion 121B and a third isolation portion 121C located in the peripheral region, so that water vapor and oxygen can be more effectively blocked from entering the display region 111 through the cathode 13, so that the display can be further improved.
  • the display effect of the panel is not limited to a second isolation portion 121B and a third isolation portion 121C located in the peripheral region, so that water vapor and oxygen can be more effectively blocked from entering the display region 111 through the cathode 13, so that the display can be further improved. The display effect of the panel.
  • FIG. 4A is a partially enlarged schematic view of the binding region shown in FIG. 3 .
  • Fig. 4B is a schematic cross-sectional view taken along C-C' shown in Fig. 4A.
  • the display panel further includes pads 14 and at least one dam 15 .
  • the display panel includes a plurality of dams 15 , and the plurality of dams 15 are arranged at intervals in a direction from the first edge E1 to the pad 14 .
  • the dam 15 may include a first layer 151 , a second layer 152 and a third layer 153 sequentially located on the third insulating layer IL3 .
  • the first layer 151 may be located at the same layer as the first planarization layer PLN1
  • the second layer 152 may be located at the same layer as the second planarization layer PLN2
  • the third layer 153 may be located at the same layer as the pixel defining layer PDL.
  • Both the pad 14 and the bank 15 are located in the bonding area 1121 .
  • the dam 15 is located between the first edge E1 and the pad 14, and the dam 15 extends in a direction from the second isolation portion 121B to the third isolation portion 121C.
  • the encapsulation layer 16 is located on the side of the cathode 13 and the at least one bank 15 away from the base substrate 11 .
  • the orthographic projection of the pad 14 on the base substrate 11 is located outside the orthographic projection of the encapsulation layer 16 on the base substrate 11
  • the orthographic projection of the dam 15 on the base substrate 11 is located outside the orthographic projection of the encapsulation layer 16 on the substrate within the orthographic projection on the substrate 11 .
  • the pads 14 are not covered by the encapsulation layer 16, while each of the dams 15 is covered by the encapsulation layer.
  • the dam 15 makes the path for the encapsulation layer 16 to extend longer. In this way, water vapor and oxygen can be more effectively blocked from entering the display area 111 through the encapsulation layer 16 , and the encapsulation effect of the encapsulation layer can be improved, thereby further improving the display effect of the display panel.
  • the dam 15 is located between the cathode 13 and the pad 14 , which can further reduce the possibility of water vapor and oxygen entering the cathode 13 , thereby further improving the display effect of the display panel.
  • the display panel further includes a gel part 17 , a gel layer 18 and a cover plate 19 .
  • the gel part 17 is located in the bonding area 1121 and between the dam 15 and the pad 14 .
  • the colloidal layer 18 is located on the side of the encapsulation layer 16 away from the base substrate 11
  • the cover plate 19 is located on the side of the colloidal layer 18 away from the base substrate 11 .
  • the colloidal portion 17 can reduce the impact on the pad 14 when the colloidal material is filled to form the colloidal layer 18 , thereby improving the reliability of the display panel.
  • FIG. 5 is a schematic flowchart illustrating a method of manufacturing a display panel according to an embodiment of the present disclosure.
  • a base substrate is provided, the base substrate including a display area and a peripheral area surrounding the display area.
  • step 504 spacers in the peripheral region are formed.
  • the spacer includes at least one spacer at least partially surrounding the display area, and each spacer includes a first spacer layer and a second spacer layer sequentially stacked on the base substrate.
  • the first orthographic projection of the first isolation layer on the base substrate is located within the second orthographic projection of the second isolation layer on the base substrate.
  • a cathode is formed.
  • the cathode includes a first cathode part on a side of the spacer close to the display area and a second cathode part on a side of the spacer away from the display area, the second cathode part being spaced apart from the first cathode part.
  • an encapsulation layer is formed on the side of the cathode remote from the base substrate.
  • the encapsulation layer includes a first inorganic layer, a second inorganic layer, and an organic layer between the first inorganic layer and the second inorganic layer.
  • the edge of the orthographic projection of the first inorganic layer on the base substrate, the edge of the orthographic projection of the organic layer on the base substrate, and the edge of the orthographic projection of the second inorganic layer on the base substrate overlap.
  • each isolation portion further includes a third isolation layer 1213, a support layer 1214, and a first conductive portion 1215 as described above.
  • each of the preliminary spacers 12A includes a support layer 1214 , a third spacer layer 1213 , a first preliminary spacer layer 1211A, and a second spacer layer 1212 sequentially stacked on the base substrate 11 .
  • the orthographic projection of the first initial isolation layer 1211A on the base substrate 11 is close to the edge of the display area 111
  • the orthographic projection of the second isolation layer 1212 on the base substrate 11 is close to the edge of the display area 111
  • the third isolation layer 1213 is close to the edge of the display area 111 .
  • the orthographic projections on the base substrate 11 are coincident near the edge of the display area 111 .
  • the orthographic projection of the first initial isolation layer 1211A on the base substrate 11 is away from the edge of the display area 111
  • the orthographic projection of the second isolation layer 1212 on the base substrate 11 is away from the edge of the display area 111
  • the third isolation layer 1213 The orthographic projections on the base substrate 11 coincide with the edges away from the display area 111 .
  • a first conductive portion 1215 is formed, and at least one of the first side surface S1 of the first initial isolation layer 1211A close to the display area 111 and the second side surface S2 away from the display area 111 are etched to form a first isolation layer Layer 1211.
  • a fourth insulating portion IL41 is formed on the side of the second isolation layer 1212 away from the base substrate 11 , and the fourth insulating portion IL41 has a part of the side of the second isolation layer 1212 away from the base substrate 11 exposed. Opening V. In addition, the fourth insulating portion IL41 exposes the first side surface S1 and the second side surface S2.
  • a conductive material layer 1215A partially located in the opening V and covering the first side surface S1 and the second side surface S2 is formed, and then wet etching is performed on the conductive material layer 1215A to obtain the first conductive material layer 1215A partially located in the opening V.
  • a conductive portion 1215 the wet etching simultaneously causes at least one of the first side S1 and the second side S2 to be etched to obtain the first isolation layer 1211 .
  • the first conductive portion 1215 is formed by the same wet etching process used to form the first side surface S1 and the second side surface S2.
  • a fourth insulating material layer IL4A covering the first side S1 and the second side S2 is formed, and the fourth insulating material layer IL4A has an opening that exposes a part of the side of the second isolation layer 1212 away from the base substrate 11 V.
  • a conductive material layer 1215A partially located in the opening V and covering the fourth insulating material layer IL4A is formed, and then a first wet etching is performed on the conductive material layer 1215A to obtain a first wet etching process partially located in the opening V Conductive portion 1215.
  • dry etching is performed on the fourth insulating material layer IL4A, so that the first side S1 and the second side S2 are exposed. Then, a second wet etching is performed on at least one of the first side surface S1 and the second side surface S2 to obtain the first isolation layer 1211 .
  • the first conductive portion 1215 is formed by another wet etching process different from the wet etching process used to form the first side surface S1 and the second side surface S2.
  • FIG. 8 is a schematic flowchart illustrating a manufacturing method of a display panel according to other embodiments of the present disclosure.
  • 9A and 9B are schematic top views illustrating display panels according to further embodiments of the present disclosure.
  • the method shown in FIG. 5 further includes steps 802 to 808 shown in FIG. 8 .
  • the base substrate 11 further includes a sacrificial region 113 , as shown in FIGS. 9A and 9B .
  • the manufacturing method of the display panel will be described below with reference to FIG. 8 , FIG. 9A and FIG. 9B .
  • the initial gel portion 17A is formed on the sacrificial region 113 and the peripheral region 112 .
  • the display area 111 is located in the space SPE defined by the initial colloidal portion 17A.
  • the orthographic projection of the initial colloid portion 17A on the base substrate 11 is a regular pattern.
  • the regular pattern may be, for example, a square as shown in FIG. 9A , or may be a rectangle as shown in FIG. 9B .
  • step 804 after the encapsulation layer 16 is formed, the space SPE is filled with an initial colloid layer 18A, see FIG. 9B.
  • a cover plate 19 is formed on the side of the initial colloid layer 18A away from the base substrate 11 .
  • the cover plate 19 can be seen, for example, in FIG. 1B .
  • step 808 a cutting process is performed to remove the sacrificial region 113, the portion of the initial colloidal portion 17A on the sacrificial region 113, the portion of the initial colloidal layer 18A on the sacrificial region 113, and the portion of the cover plate 19 on the sacrificial region 113, thereby
  • the display panel shown in FIGS. 3 and 1B is formed.
  • the portion of the initial colloidal portion 17A located in the peripheral region 112 serves as the colloidal portion 17
  • the remaining portion of the initial colloidal layer 18A serves as the colloidal layer 18 .
  • the filled initial colloidal layer 18 can be more uniform, reducing air bubbles in the colloidal layer 18 and improving the encapsulation effect of the display panel.
  • the present disclosure also provides a display device, which may include the display panel of any of the above-mentioned embodiments.
  • the display device may be, for example, a smart wearable device (such as a smart watch), a mobile terminal, a TV, a monitor, a notebook computer, a digital photo frame, a navigator, an electronic paper, or any other product or component with a display function.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

显示面板，包括：衬底基板（11），包括显示区（111）和围绕显示区（111）的周边区（112）；隔离件（12），位于周边区（112），包括至少部分围绕显示区（111）的至少一个隔离部（121），每个隔离部（121）包括依次叠置在衬底基板（11）上的第一隔离层（1211）和第二隔离层（1212），第一隔离层（1211）在衬底基板（11）上的第一正投影（1211'）位于第二隔离层（1212）在衬底基板（11）上的第二正投影（1212'）之内；阴极（13），包括：第一阴极部（131），位于隔离件（12）靠近显示区（111）的一侧，和第二阴极部（132），位于隔离件（12）远离显示区（111）的一侧且与第一阴极部（131）间隔开；和封装层（16），位于阴极（13）远离衬底基板（11）的一侧，包括第一无机层（161）和第二无机层（162）、以及位于第一无机层（161）和第二无机层（162）之间的有机层（163），第一无机层（161）、有机层（163）和第二无机层（162）在衬底基板（11）上的正投影的边缘重叠。还提供一种显示面板的制造方法和显示装置。

Description

显示面板及其制造方法、显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种显示面板及其制造方法、显示装置。
背景技术
OLED(Organic Light-Emitting Diode，有机发光二极管)具有主动发光、发光亮度高、分辨率高、宽视角、响应速度快、低能耗以及可柔性化等特点，因此，基于OLED的显示技术有可能代替液晶显示技术成为下一代显示技术。
发明内容
根据本公开实施例的一方面，提供一种显示面板，包括：衬底基板，包括显示区和围绕所述显示区的周边区；隔离件，位于所述周边区，所述隔离件包括至少部分围绕所述显示区的至少一个隔离部，每个隔离部包括依次叠置在所述衬底基板上的第一隔离层和第二隔离层，所述第一隔离层在所述衬底基板上的第一正投影位于所述第二隔离层在所述衬底基板上的第二正投影之内；阴极，包括：第一阴极部，位于所述隔离件靠近所述显示区的一侧，和第二阴极部，位于所述隔离件远离所述显示区的一侧，并且与所述第一阴极部间隔开；和封装层，位于所述阴极远离所述衬底基板的一侧，包括第一无机层、第二无机层、以及位于所述第一无机层和所述第二无机层之间的有机层，所述第一无机层在所述衬底基板上的正投影的边缘、所述有机层在所述衬底基板上的正投影的边缘和所述第二无机层在所述衬底基板上的正投影的边缘重叠。
在一些实施例中，所述周边区包括绑定区和除所述绑定区外的非绑定区，所述绑定区围绕所述显示区的边缘的第一边缘，所述非绑定区围绕所述边缘除所述第一边缘外的第二边缘；并且每个隔离部包括位于所述非绑定区且围绕所述第二边缘的第一隔离部。
在一些实施例中，每个隔离部还包括：第二隔离部，位于所述绑定区，并且与所述第一隔离部的一端连接；和第三隔离部，位于所述绑定区，并且与所述第一隔离部的另一端连接，所述第三隔离部和所述第二隔离部均向远离所述显示区的方向延伸。
在一些实施例中，所述显示面板还包括：焊盘，位于所述绑定区；和至少一个围堰，位于所述绑定区，并且位于所述第一边缘和所述焊盘之间，所述至少一个围堰沿 着从所述第二隔离部到所述第三隔离部的方向延伸。所述封装层位于远离所述衬底基板的一侧，所述焊盘在所述衬底基板上的正投影位于所述封装层在所述衬底基板上的正投影之外，并且，所述至少一个围堰在所述衬底基板上的正投影位于所述封装层在所述衬底基板上的正投影之内。
在一些实施例中，所述至少一个围堰位于所述阴极和所述焊盘之间。
在一些实施例中，所述至少一个围堰包括多个围堰，所述多个围堰在从所述第一边缘到所述焊盘的方向上排布。
在一些实施例中，所述显示面板还包括：胶体部，位于所述绑定区，并且位于所述至少一个围堰与所述焊盘之间；胶体层，位于所述封装层远离所述衬底基板的一侧；和盖板，位于所述胶体层远离所述衬底基板的一侧。
在一些实施例中，每个隔离部还包括：第三隔离层，位于所述第一隔离层和所述衬底基板之间，所述第一正投影位于所述第三隔离层在所述衬底基板上的第三正投影之内。
在一些实施例中，每个隔离部还包括：支撑层，位于所述第三隔离层和所述衬底基板之间，所述第一正投影、所述第二正投影和所述第三正投影位于所述支撑层在所述衬底基板上的正投影之内。
在一些实施例中，每个隔离部还包括：第一导电部，位于所述第二隔离层远离所述衬底基板的一侧，所述第一导电部在所述衬底基板上的正投影位于所述第二正投影之内。
在一些实施例中，所述显示面板还包括：位于所述周边区的电源线，所述电源线位于所述支撑层和所述衬底基板之间，并且与每个隔离部连接；和第二导电部，位于所述隔离件与所述显示区之间，并且位于所述第一阴极部与所述电源线之间，所述第二导电部与所述第一阴极部接触，并且与所述电源线连接。
在一些实施例中，所述显示面板还包括：第一绝缘层，包括位于所述周边区的第一绝缘部，所述第一绝缘部位于所述支撑层和所述电源线之间；第二绝缘层，包括位于所述周边区的第二绝缘部，所述第二绝缘部位于所述支撑层和所述第一绝缘部之间；第三绝缘层，包括位于所述周边区的第三绝缘部，所述第三绝缘部位于所述支撑层和所述第三隔离层之间；和第四绝缘层，包括位于所述周边区的第四绝缘部，所述第四绝缘部位于所述第二隔离层与所述第一导电部之间；其中，每个隔离部还包括：第一连接部，贯穿所述第二绝缘部和所述第一绝缘部，并且与所述支撑层和所述电源线连 接，第二连接部，贯穿所述第三绝缘部，并且与所述第三隔离层和所述支撑层连接，和第三连接部，贯穿所述第四绝缘部，并且与所述第一导电部和所述第二隔离层连接。
在一些实施例中，所述显示面板还包括：连接层，位于所述第二导电部与所述电源线之间，并且位于所述隔离件与所述显示区之间，所述连接层包括：第一连接层，位于所述第二导电部与所述电源线之间，和第二连接层，位于所述第二导电部与所述第一连接层之间；至少一个第四连接部，贯穿所述第二绝缘部和所述第一绝缘部，并且与所述第一连接层和所述电源线连接；至少一个第五连接部，贯穿所述第三绝缘部，并且与所述第二连接层和所述第一连接层连接；和至少一个第六连接部，贯穿所述第四绝缘部，并且与所述第二导电部和所述第二连接层连接。
在一些实施例中，所述第一连接层在所述衬底基板上的正投影位于所述第二连接层在所述衬底基板上的正投影之内。
在一些实施例中，所述第一连接部和所述支撑层一体设置；所述第二连接部和所述第三隔离层一体设置；所述第三连接部和所述第一导电部一体设置；所述至少一个第四连接部和所述第一连接层一体设置；所述至少一个第五连接部和所述第二连接层一体设置；并且所述至少一个第六连接部和所述第二导电部一体设置。
在一些实施例中，所述阴极还包括：第三阴极部，位于每个隔离部远离所述衬底基板的一侧，并且与所述第一阴极部和所述第二阴极部间隔开。
在一些实施例中，所述至少一个隔离部包括多个隔离部，所述阴极还包括：第四阴极部，位于所述多个隔离部中相邻的两个隔离部之间，并且与所述第三阴极部间隔开。
在一些实施例中，所述显示面板还包括位于所述阴极与所述衬底基板之间的功能层，所述功能层包括电子传输层和电子注入层中的至少一个，所述功能层包括：第一功能部，位于所述隔离件靠近所述显示区的一侧；和第二功能部，位于所述隔离件远离所述显示区的一侧，并且与所述第一功能部间隔开。
在一些实施例中，所述第一正投影靠近所述显示区的边缘与所述第二正投影靠近所述显示区的边缘不重叠；并且所述第一正投影远离所述显示区的边缘与所述第二正投影远离所述显示区的边缘不重叠。
在一些实施例中，所述第一正投影的边缘与所述第二正投影的边缘之间的最小距离为1微米-3微米。
在一些实施例中，所述第二隔离层和所述第三隔离层的材料包括钛，所述第一隔 离层的材料包括铝。
根据本公开实施例的又一方面，提供一种显示面板的制造方法，包括：提供衬底基板，所述衬底基板包括显示区和围绕所述显示区的周边区；形成位于所述周边区的隔离件，所述隔离件包括至少部分围绕所述显示区的至少一个隔离部，每个隔离部包括依次叠置在所述衬底基板上的第一隔离层和第二隔离层，所述第一隔离层在所述衬底基板上的第一正投影位于所述第二隔离层在所述衬底基板上的第二正投影之内；形成阴极，所述阴极包括：第一阴极部，位于所述隔离件靠近所述显示区的一侧，和第二阴极部，位于所述隔离件远离所述显示区的一侧，并且与所述第一阴极部间隔开；和在所述阴极远离所述衬底基板的一侧形成封装层，所述封装层包括第一无机层、第二无机层、以及位于所述第一无机层和所述第二无机层之间的有机层，所述第一无机层在所述衬底基板上的正投影的边缘、所述有机层在所述衬底基板上的正投影的边缘和所述第二无机层在所述衬底基板上的正投影的边缘重叠。
在一些实施例中，每个隔离部还包括：第三隔离层，位于所述第一隔离层和所述衬底基板之间，所述第一正投影位于所述第三隔离层在所述衬底基板上的第三正投影之内；支撑层，位于所述第三隔离层和所述衬底基板之间，所述第一正投影、所述第二正投影和所述第三正投影位于所述支撑层在所述衬底基板上的正投影之内；和第一导电部，位于所述第二隔离层远离所述衬底基板的一侧，所述第一导电部在所述衬底基板上的正投影位于所述第二正投影之内。
在一些实施例中，形成所述隔离件包括：在所述衬底基板上形成至少一个初始隔离件，每个初始隔离件包括依次叠置在所述衬底基板上的所述支撑层、所述第三隔离层、所述第一初始隔离层、所述第二隔离层，所述第一初始隔离层在所述衬底基板上的正投影靠近所述显示区的边缘、所述第二隔离层在所述衬底基板上的正投影靠近所述显示区的边缘和所述第三隔离层在所述衬底基板上的正投影靠近所述显示区的边缘重合，所述第一初始隔离层在所述衬底基板上的正投影远离所述显示区的边缘、所述第二隔离层在所述衬底基板上的正投影远离所述显示区的边缘和所述第三隔离层在所述衬底基板上的正投影远离所述显示区的边缘重合；和形成所述第一导电部，并对所述第一初始隔离层靠近所述显示区的第一侧面和远离所述显示区的第二侧面中的至少一个进行刻蚀，以形成所述第一隔离层。
在一些实施例中，所述形成所述第一导电部，并对所述第一初始隔离层靠近所述显示区的第一侧面和远离所述显示区的第二侧面中的至少一个进行刻蚀包括：在所述 第二隔离层远离所述衬底基板的一侧形成第四绝缘部，所述第四绝缘部具有使得所述第二隔离层远离所述衬底基板的一面的一部分露出的开口，并且，所述第四绝缘部使得所述第一侧面和所述第二侧面露出；形成部分位于所述开口中且覆盖所述第一侧面和所述第二侧面的导电材料层；和对所述导电材料层进行湿法刻蚀，以得到部分位于所述开口中的所述第一导电部，其中，所述湿法刻蚀使得所述第一侧面和所述第二侧面中的至少一个被刻蚀，以得到所述第一隔离层。
在一些实施例中，所述形成所述第一导电部，并对所述第一初始隔离层靠近所述显示区的第一侧面和远离所述显示区的第二侧面中的至少一个进行刻蚀包括：形成覆盖所述第一侧面和所述第二侧面的第四绝缘材料层，所述第四绝缘材料层具有使得所述第二隔离层远离所述衬底基板的一面的一部分露出的开口；形成部分位于所述开口中且覆盖所述第四绝缘材料层的导电材料层；和对所述导电材料层进行第一湿法刻蚀，以得到部分位于所述开口中的所述第一导电部；对所述第四绝缘材料层进行干法刻蚀，以使得所述第一侧面和所述第二侧面露出；和对所述第一侧面和所述第二侧面中的至少一个进行第二湿法刻蚀，以得到所述第一隔离层。
在一些实施例中，所述衬底基板还包括牺牲区，所述方法还包括：在所述牺牲区和所述周边区上形成初始胶体部，所述显示区位于所述初始胶体部限定的空间内，所述初始胶体部在所述衬底基板上的正投影为规则图形；在形成所述封装层后，在所述空间内填充初始胶体层；在所述初始胶体层远离所述衬底基板的一侧形成盖板；和执行切割工艺，以去除所述牺牲区、所述初始胶体部位于所述牺牲区上的部分、所述初始胶体层位于所述牺牲区上的部分、所述盖板位于所述牺牲区上的部分，所述初始胶体部位于所述周边区的部分作为胶体部，所述初始胶体层的剩余部分作为胶体层。
根据本公开实施例的另一方面，提供一种显示装置，包括：上述任意一些实施例所述的显示面板。
附图说明
构成说明书的一部分的附图描述了本公开的实施例，并且连同说明书一起用于解释本公开的原理。
参照附图，根据下面的详细描述，可以更加清楚地理解本公开，其中：
图1A是示出根据本公开一些实施例的显示面板的俯视示意图；
图1B是示出沿着图1A所示的B-B’截取的截面示意图；
图1C是示出根据本公开一些实施例的第一正投影和第二正投影的示意图；
图1D是示出根据本公开一些实施例的封装层的截面示意图；
图2是示出根据本公开一些实施例的显示面板中子像素的截面示意图；
图3是示出根据本公开另一些实施例的显示面板的俯视示意图；
图4A是图3所示绑定区的局部放大示意图；
图4B是沿着图4A所示的C-C’截取的截面示意图；
图5是示出根据本公开一些实施例的显示面板的制造方法的流程示意图；
图6A-图6C是示出根据本公开一些实现方式的形成隔离件的不同阶段得到的结构的截面示意图；
图7A-图7D是示出根据本公开另一些实现方式的形成隔离件的不同阶段得到的结构的截面示意图；
图8是示出根据本公开另一些实施例的显示面板的制造方法的流程示意图；
图9A和图9B是示出根据本公开又一些实施例的显示面板的俯视示意图。
应当明白，附图中所示出的各个部分的尺寸并不必然是按照实际的比例关系绘制的。此外，相同或类似的参考标号表示相同或类似的构件。
具体实施方式
现在将参照附图来详细描述本公开的各种示例性实施例。对示例性实施例的描述仅仅是说明性的，决不作为对本公开及其应用或使用的任何限制。本公开可以以许多不同的形式实现，不限于这里所述的实施例。提供这些实施例是为了使本公开透彻且完整，并且向本领域技术人员充分表达本公开的范围。应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、材料的组分、数字表达式和数值应被解释为仅仅是示例性的，而不是作为限制。
本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的部分。“包括”或者“包含”等类似的词语意指在该词前的要素涵盖在该词后列举的要素，并不排除也涵盖其他要素的可能。“上”、“下”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
在本公开中，当描述到特定部件位于第一部件和第二部件之间时，在该特定部件与第一部件或第二部件之间可以存在居间部件，也可以不存在居间部件。当描述到特 定部件连接其它部件时，该特定部件可以与所述其它部件直接连接而不具有居间部件，也可以不与所述其它部件直接连接而具有居间部件。
本公开使用的所有术语(包括技术术语或者科学术语)与本公开所属领域的普通技术人员理解的含义相同，除非另外特别定义。还应当理解，在诸如通用字典中定义的术语应当被解释为具有与它们在相关技术的上下文中的含义相一致的含义，而不应用理想化或极度形式化的意义来解释，除非这里明确地这样定义。
对于相关领域普通技术人员已知的技术、方法和设备可能不作详细讨论，但在适当情况下，所述技术、方法和设备应当被视为说明书的一部分。
发明人注意到，相关技术中，阴极等其他层会从显示区延伸到周边区，导致水汽和氧气容易通过这些层进入显示区，从而影响显示面板的显示效果。
有鉴于此，本公开实施例提出了如下技术方案。
图1A是示出根据本公开一些实施例的显示面板的俯视示意图。图1B是示出沿着图1A所示的B-B’截取的截面示意图。图1C是示出根据本公开一些实施例的第一正投影和第二正投影的示意图。图1D是示出根据本公开一些实施例的封装层的截面示意图。
下面结合图1A至图1D对根据本公开一些实施例的显示面板进行介绍。
如图1A和图1B所示，显示面板包括衬底基板11、隔离件12、阴极13和封装层16。
参见图1A，衬底基板11包括显示区111和围绕显示区111的周边区112。这里，显示区111被示意性地示出为大致呈圆形，周边区112被示意性地示出为大致呈圆环形。应理解，本公开实施例并不限于此。例如，显示区111可以大致呈心形等不规则形状。例如，显示区111可以大致呈矩形，而周边区112可以大致呈矩形环。在一些实施例中，衬底基板11可以包括柔性基板，例如聚酰亚胺(PI)基板等。
显示面板的多个子像素P位于显示区111。例如，多个子像素P包括红色子像素、绿色子像素和蓝色子像素。
隔离件12位于周边区112。这里，隔离件12包括至少部分围绕显示区111的至少一个隔离部121。图1A示出的是隔离件12完全地围绕显示区111的情况。应理解，在隔离件12包括多个隔离部121的情况下，多个隔离部121在从显示区111到周边区112的方向上彼此间隔开。
参见图1B，每个隔离部121包括依次叠置在衬底基板11上的第一隔离层1211和 第二隔离层1212。第一隔离层1211在衬底基板11上的第一正投影1211’位于第二隔离层1212在衬底基板11上的第二正投影1212’之内，参见图1C。在一些实施例中，第一隔离层1211的材料包括铝，第二隔离层1212的材料包括钛。
继续参见图1B，阴极13包括第一阴极部131和与第一阴极部131间隔开的第二阴极部132。这里，第一阴极部131位于隔离件12靠近显示区111的一侧，第二阴极部132位于隔离件12远离显示区111的一侧。换言之，阴极13位于隔离件12两侧的两部分是间隔开的。在一些实施例中，第一阴极部131从显示区111延伸到周边区112，多个子像素P共用第一阴极部131。
参见图1B，封装层16位于阴极13远离衬底基板11的一侧。参见图1D，封装层16包括第一无机层161、第二无机层162、以及位于第一无机层161和第二无机层162之间的有机层163。第一无机层161在衬底基板11上的正投影的边缘、有机层163在衬底基板11上的正投影的边缘和第二无机层162在衬底基板11上的正投影的边缘重叠。应理解，这里的重叠是指完全重叠。换言之，第一无机层161、第二无机层162和有机层163在衬底基板11上的正投影是相同的。
上述实施例中，周边区112设置有包括至少一个隔离部121的隔离件12，每个隔离部121包括第一隔离层1211和第二隔离层1212，并且，阴极13位于隔离件12两侧的第一阴极部131和第二阴极部132是间隔开的。这样的结构有助于阻挡水汽和氧气通过阴极13进入显示区111，从而减小水汽和氧气对显示面板的不利影响，提高显示面板的显示效果。
在一些实施例中，隔离件12中隔离部121的数量大于或等于7，例如为15、20、25等。如此，可以更有效地阻挡水汽和氧气通过阴极13进入显示区111，进一步提高显示面板的显示效果。在一些实施例中，隔离件12中隔离部121的数量大于或等于30，例如为35、40、50等。如此，可以更有效地阻挡水汽和氧气通过阴极13进入显示区111，更进一步提高显示面板的显示效果。
在一些实施例中，隔离件12中相邻的两个隔离部121之间的最小距离大于或等于10微米且小于或等于15微米，例如为12微米、14微米等。如此，可以更有效地使得阴极13断开为不同部分。
在一些实施例中，如图1C所示，第一正投影1211’的边缘和第二正投影1212’的边缘不交叠。换言之，第一隔离层1211靠近显示区111的侧面比第二隔离层1212靠近显示区111的侧面更远离显示区111，而第一隔离层1211远离显示区111的侧面比 第二隔离层1212远离显示区111的侧面更靠近显示区111。如此更有助于隔断阴极13。
作为一些实现方式，第一正投影1211’远离显示区111的边缘与第二正投影1212’远离显示区111的边缘之间的最小距离为1微米-3微米，例如1.5微米、2微米、2.5微米等。在此范围内，第二隔离层1212未覆盖第一隔离层1211的部分不容易塌陷，从而可以确保阴极13可以被隔断成不同部分，可以进一步提高显示面板的显示效果。
除了第一阴极部131和第二阴极部132外，阴极13还可以被隔断成更多个部分，下面结合不同实施例进行说明。
在一些实施例中，参见图1B，除了第一阴极部131和第二阴极部132外，阴极13还包括第三阴极部133。第三阴极部133位于每个隔离部121远离衬底基板11的一侧，并且与第一阴极部131和第二阴极部132间隔开。这样的结构更有助于阻挡水汽和氧气通过阴极13进入显示区111，从而进一步减小水汽和氧气对显示面板的不利影响，从而进一步提高显示面板的显示效果。
在另一些实施例中，隔离件12包括多个隔离部121。参见图1B，除了第一阴极部131、第二阴极部132和第三阴极部133外，阴极13还包括第四阴极部134。第四阴极部134位于多个隔离部121中相邻的两个隔离部121之间，并且与第三阴极部133间隔开。这样的结构更有助于阻挡水汽和氧气通过阴极13进入显示区111，从而进一步减小水汽和氧气对显示面板的不利影响，从而进一步提高显示面板的显示效果。
除了阴极13外，阴极13与衬底基板11之间的某个或某些层也可以被隔断成不同部分。
在一些实施例中，参见图1B，显示面板还包括位于阴极13与衬底基板11之间的功能层23。这里，功能层23包括电子传输层和电子注入层中的至少一个。功能层23包括第一功能部231和与第一功能部231间隔开的第二功能部232。第一功能部231位于隔离件12靠近显示区111的一侧，第二功能部232位于隔离件12远离显示区111的一侧。与阴极13类似地，功能层23位于隔离件12两侧的两部分也是间隔开的。这样的结构有助于阻挡水汽和氧气通过功能层23进入显示区111，从而减小水汽和氧气对显示面板的不利影响，提高显示面板的显示效果。
应理解，在功能层23包括电子传输层和位于阴极13与电子传输层之间的电子注入层两者的情况下，第一功能部131和第二功能部132均包括两层，其中一层是电子传输层的一部分，另一层是电子传输层的一部分。
在另一些实施例中，参见图1B，功能层23还包括第三功能部233和第四功能部234中的至少一个。第三功能部233位于隔离件121和第三阴极部133之间，第四功能部234位于相邻的两个隔离部121之间，并且位于第四阴极部134和衬底基板11之间。这样的结构更有助于阻挡水汽和氧气通过功能层23进入显示区111，从而进一步减小水汽和氧气对显示面板的不利影响，从而进一步提高显示面板的显示效果。
另外，在显示面板还包括位于阴极13与封装层16之间的其他层(例如有机盖层)的情况下，其他层同样可以被隔离件12隔断，从而可以进一步提高显示面板的显示效果。
除了第一隔离层1211和第二隔离层1212外，每个隔离部121还可以包括其他层，下面结合不同实施例进行说明。
在一些实施例中，参见图1B，每个隔离部121还包括位于第一隔离层1211和衬底基板11之间的第三隔离层1213。第一正投影1211’位于第三隔离层1213在衬底基板11上的第三正投影之内。第三正投影例如可以与图1C所示的第二正投影1212’完全重合。在一些实施例中，第三隔离层1213的材料可以包括钛。
在另一些实施例中，参见图1B，每个隔离部121还包括位于第三隔离层1213和衬底基板11之间的支撑层1214。这里，第一正投影1211’、第二正投影1212’和第三正投影位于支撑层1214在衬底基板11上的正投影之内。这样的方式下，可以减小第一隔离层1211、第二隔离层1212和第三隔离层1213塌陷的可能性，提高隔离部121的可靠性，从而可以进一步提高显示面板的显示效果。
在又一些实施例中，参见图1B，每个隔离部121还包括位于第二隔离层1212远离衬底基板11的一侧的第一导电部1215。这里，第一导电部1215在衬底基板11上的正投影位于第二正投影1212’之内。例如，第一导电部1215的材料包括透明材料，例如，氧化铟锡(ITO)等。应理解，在隔离部121包括第一导电部1215的情况下，阴极13的第三阴极部133和功能层23的第三功能部233位于第一导电部1215远离衬底基板11的一侧。
在一些实施例中，显示面板还包括位于周边区112的电源线20和第二导电部21。电源线20位于支撑层1214和衬底基板11之间，并且与每个隔离部121连接。第二导电部21位于隔离件12与显示区111之间，并且位于第一阴极部131与电源线20之间。这里，第二导电部21与第一阴极部131接触，并且与电源线20连接。换言之，第一阴极部131经由第二导电部21连接至电源线20。例如，第二导电部21的材料包 括透明材料，例如，ITO等。
这样的结构下，每个隔离部121与连接至第一阴极部131的电源线20连接，有助于释放静电，从而减小静电对显示面板的不利影响，进一步提高显示面板的显示效果。
下面介绍隔离部121与电源线20连接的一些实现方式。
在一些实现方式中，参见图1B，显示面板还包括第一绝缘层IL1、第二绝缘层IL2第三绝缘层IL3和第四绝缘层IL4。每个隔离部121还包括第一连接部CP1、第二连接部CP2和第三连接部CP3。
第一绝缘层IL1包括位于周边区112的第一绝缘部IL11，第二绝缘层IL2包括位于周边区112的第二绝缘部IL21，第三绝缘层IL3包括位于周边区112的第三绝缘部IL31，第四绝缘层IL4包括位于周边区112的第四缘部IL41。
第一绝缘部IL11位于支撑层1214和电源线20之间，第二绝缘部IL21位于支撑层1214和第一绝缘部IL11之间，第三绝缘部IL31位于支撑层1214和第三隔离层1213之间，第四缘部IL41位于第二隔离层1212与第一导电部1215之间。
第一连接部CP1贯穿第二绝缘部IL21和第一绝缘部IL11，并且与支撑层1214和电源线20连接。在一些实施例中，第一连接部CP1和支撑层1214一体设置。
第二连接部CP2贯穿第三绝缘部IL31，并且与第三隔离层1213和支撑层1214连接。在一些实施例中，第二连接部CP2和第三隔离层1213一体设置。
第三连接部CP3贯穿第四绝缘部IL41，并且与第一导电部1215和第二隔离层1213连接。在一些实施例中，第三连接部CP3和第一导电部1215一体设置。应理解，在显示面板还包括第三功能部233的情况下，第三连接部CP3还贯穿第三功能部233。
上述实现方式中，隔离部121经由第一连接部CP1与电源线20连接，隔离部121中的各层经由第二连接部CP2和第三连接部CP3彼此连接，从而可以更有效地传导静电至电源线20。
下面介绍第二导电部21与电源线20连接的一些实现方式。
在一些实现方式中，参见图1B，显示面板还包括连接层22、至少一个第四连接部CP4、至少一个第五连接部CP5和至少一个第六连接部CP6。在一些实施例中，显示面板包括多个第四连接部CP4、多个第五连接部CP5和多个第六连接部CP6。
连接层22位于第二导电部21与电源线20之间，并且位于隔离件12与显示区111之间。连接层22包括位于第二导电部21与电源线20之间的第一连接层221、以 及位于第二导电部21与第一连接层221之间的第二连接层222。在一些实施例中，第一连接层221和第二连接层222均包括叠层，例如Ti/Al/Ti。
第四连接部CP4贯穿第二绝缘部IL21和第一绝缘部IL11，并且与第一连接层221和电源线20连接。在一些实施例中，第四连接部CP4和第一连接层221一体设置。
第五连接部CP5贯穿第三绝缘部IL31，并且与第二连接层222和第一连接层221连接。在一些实施例中，第五连接部CP5和第二连接层222一体设置。
第六连接部CP6贯穿第四绝缘部IL41，并且与第二导电部21和第二连接层222连接。在一些实施例中，第六连接部CP6和第二导电部21一体设置。应理解，在显示面板还包括第一功能部231的情况下，第六连接部CP6还贯穿第一功能部231。
上述实现方式中，第二导电部21经由第一连接层221和第二连接层222与电源线20连接，有助于降低连接层22的电阻，提高经由电源线20施加的电源信号的均一性。
可以理解的是，经由电源线20施加的电源信号可以经由连接层22和第二导电部21传递至第一阴极部131，进而施加至位于显示区111的子像素P。
在一些实施例中，第一连接层221在衬底基板11上的正投影位于第二连接层222在衬底基板11上的正投影之内。如此，可以确保第二连接层222可以经由第五连接部CP5连接至第一连接层221，从而确保第二导电部21与电源线20连接。
应理解，位于周边区112的某些层与位于显示区111中子像素的某些层可以位于同一层。还应理解，位于周边区112的某些层可以是从显示区111延伸到周边区112的。接下来结合图2进行说明。
图2是示出根据本公开一些实施例的显示面板中子像素的截面示意图。
如图2所示，子像素P包括像素驱动电路，像素驱动电路可以包括薄膜晶体管T和电容器C。应理解，像素驱动电路还可以包括其他薄膜晶体管。例如，像素驱动电路可以包括6个薄膜晶体管和一个电容器C(6T1C)；又例如，像素驱动电路可以包括7个薄膜晶体管和一个电容器C(7T1C)。
薄膜晶体管T包括位于衬底基板11一侧的有源层AT、位于有源层AT远离衬底基板11一侧的第五绝缘层IL5、位于第五绝缘层IL5远离衬底基板11一侧的栅极GT、贯穿第一绝缘层IL1和第二绝缘层IL2的第一电极ED1和第二电极ED2。这里，第一绝缘层IL1位于栅极GT远离衬底基板11的一侧，第二绝缘层IL2位于第一绝 缘层IL1远离衬底基板11的一侧。
电容器C包括位于第五绝缘层IL5和第一绝缘层IL1之间的第一电极板C1、位于第一绝缘层IL1和第二绝缘层IL2之间的第二电极板C2。应理解，电容器C还包括位于第一电极板C1和第二电极板C2之间的第一绝缘层IL1。例如，第一电极板C1和栅极GT可以位于同一层，即，通过对同一材料层进行图案化而形成。作为一些实现方式，第一电极板C1和第二电极板C2中的至少一个的材料可以包括金属或合金。
子像素P还包括阳极AND，阳极AND经由连接件CM连接到薄膜晶体管T的第二电极ED2连接。连接件CM经由贯穿第三绝缘层IL3和第一平坦化层PLN1的过孔与第二电极ED2连接，阳极AND经由贯穿第四绝缘层IL4和第二平坦化层PLN2的过孔与连接件CM连接。这里，第三绝缘层IL3覆盖第一电极ED1和第二电极ED2、且位于第二绝缘层IL2远离衬底基板11的一侧，第一平坦化层PLN1位于第三绝缘层IL3远离衬底基板11的一侧，第四绝缘层IL4位于第一平坦化层PLN1远离衬底基板11的一侧，连接件CM位于第一平坦化层PLN1和第四绝缘层IL4之间，第二平坦化层PLN2位于第四绝缘层IL4远离衬底基板11的一侧，阳极AND位于第二平坦化层PLN2远离衬底基板11的一侧。
应理解，子像素P还包括位于阳极AND远离衬底基板11一侧的发光层(图2未示出)和图1B所示的阴极13。例如，多个子像素P可以共用阴极13。
作为一些实现方式，有源层AT的材料可以包括非晶态氧化铟镓锌(a-IGZO)、氮氧化锌(ZnON)、氧化铟锌锡(IZTO)、非晶硅(a-Si)、多晶硅(p-Si)、六噻吩和聚噻吩中的一种或多种。作为一些实现方式，第一绝缘层IL1、第二绝缘层IL2、第三绝缘层IL3、第四绝缘层IL4和第五绝缘层IL5的材料可以包括硅的氧化物、硅的氮化物或硅的氮氧化物等无机材料。作为一些实现方式，第一平坦化层PLN1和第二平坦化层PLN2的材料可以包括聚酰亚胺等有机材料。作为一些实现方式，第一电极ED1和第二电极ED2中的至少一个的材料可以包括金属或合金。例如，第一电极ED1和第二电极ED1可以包括叠层，叠层例如可以为Ti/Al/Ti。
图2还示出了显示面板中的像素界定层PDL和缓冲层BF。像素界定层PDL用于限定子像素P。缓冲层BF位于衬底基板11与有源层AT之间，用于阻挡水汽和氧气进入有源层AT。
在一些实施例中，图1B所示的电源线20可以与图2所示的栅极GT位于同一层。在一些实施例中，图1B所示的支撑层1214和第一连接层221可以与图2所示的 第一电极ED1和第二电极ED2位于同一层。
在一些实施例中，图1B所示的第二连接层221可以与图2所示的连接件CM位于同一层。在连接件CM包括叠层的情况下，图1B所示的第一隔离层1211、第二隔离层1212和第三隔离层1213可以分别与连接件CM的叠层中的某一层位于同一层。
在一些实施例中，图1B所示的第一导电部1215和第二导电部21可以与图2所示的阳极AND位于同一层。
图3是示出根据本公开另一些实施例的显示面板的俯视示意图。需要说明的是，沿着图3所示的B-B’截取的截面示意图仍如图1B所示。
如图3所示，周边区112包括绑定区1121和除绑定区1121外的非绑定区1122。这里，绑定区1121围绕显示区111的边缘的第一边缘E1，非绑定区1122围绕显示区111的边缘除第一边缘E1外的第二边缘E2。每个隔离部121包括位于非绑定区1122、并且围绕第二边缘E2的第一隔离部121A。需要说明的是，图3仅示意性地示出了一个隔离部121，其他隔离部121的结构均可以参照图3所示。
应理解，绑定区1121用于与外部电路(例如电路板、集成电路芯片等)通过绑定的方式建立电连接。绑定区1121可以设置有焊盘14和其他信号线。外部电路经由焊盘114可以向显示面板提供信号。
还应理解，图3所示的绑定区1121和非绑定区1122的界限仅仅是示意性的。本领域技术人员明白，绑定区1121的边框尺寸通常大于非绑定区1122的边框尺寸，即，绑定区1121远离显示区111的边缘与显示区111的边缘之间的最小距离大于非绑定区1122远离显示区111的边缘与显示区111的边缘之间的最小距离。故，根据边框尺寸可以确定周边区112的一部分为绑定区1121，其余部分即为非绑定区1122。
上述实施例中，围绕第二边缘E2设置的第一隔离部121A可以阻挡水汽和氧气经由阴极13进入显示区111，从而可以提高显示面板的显示效果。
在一些实施例中，参见图3，每个隔离部121还包括均位于绑定区1121的第二隔离部121B和第三隔离部121C。第二隔离部121B与第一隔离部121A的一端连接，第三隔离部121C与第一隔离部121A的另一端连接。这里，第三隔离部121C和第二隔离部121B均向远离显示区111的方向延伸。
可以理解的是，第一隔离部121A围绕第二边缘E2延伸的起点和终点即为第一隔离部121A两个端部，即，图3中第一隔离部121A与两条虚线交叉的位置。
另外，虽然图3示出的第二隔离部121B和第三隔离部121C的延伸方向是相同 的，但这并非是限制性的。
上述实施例中，每个隔离部121还包括位于周边区的第二隔离部121B和第三隔离部121C，如此可以更有效地阻挡水汽和氧气经由阴极13进入显示区111，从而可以进一步提高显示面板的显示效果。
图4A是图3所示绑定区的局部放大示意图。图4B是沿着图4A所示的C-C’截取的截面示意图。
在一些实施例中，参见图4A、图3和图1B，显示面板还包括焊盘14和至少一个围堰15。
在一些实施例中，显示面板包括多个围堰15，多个围堰15在从第一边缘E1到焊盘14的方向上间隔排布。如图4B所示，例如，围堰15可以包括依次位于第三绝缘层IL3上的第一层151、第二层152和第三层153。例如，第一层151可以与第一平坦化层PLN1位于同一层，第二层152可以与第二平坦化层PLN2位于同一层，第三层153可以与像素界定层PDL位于同一层。
焊盘14和围堰15均位于绑定区1121。围堰15位于第一边缘E1和焊盘14之间，并且，围堰15沿着从第二隔离部121B到第三隔离部121C的方向延伸。
封装层16位于阴极13和至少一个围堰15远离衬底基板11的一侧。这里，焊盘14在衬底基板11上的正投影位于封装层16在衬底基板11上的正投影之外，而围堰15在衬底基板11上的正投影位于封装层16在衬底基板11上的正投影之内。换言之，焊盘14未被封装层16覆盖，而每个围堰15均被封装层覆盖。
上述实施例中，围堰15使得封装层16延伸的路径更长。如此，可以更有效地阻挡水汽和氧气经由封装层16进入显示区111，提高封装层的封装效果，从而进一步提高显示面板的显示效果。
在一些实施例中，参见图4A，围堰15位于阴极13和焊盘14之间，如此可以进一步减小水汽和氧气进入阴极13的可能性，从而进一步提高显示面板的显示效果。
在一些实施例中，参见图3和图1B，显示面板还包括胶体部17、胶体层18和盖板19。如图3所示，胶体部17位于绑定区1121，并且位于围堰15与焊盘14之间。如图1B所示，胶体层18位于封装层16远离衬底基板11的一侧，盖板19位于胶体层18远离衬底基板11的一侧。胶体部17可以减小填充胶体材料以形成胶体层18时对焊盘14造成的冲击，从而提高显示面板的可靠性。
应理解，本公开不同实施例提供的显示面板可以组合。
图5是示出根据本公开一个实施例的显示面板的制造方法的流程示意图。
在步骤502，提供衬底基板，衬底基板包括显示区和围绕显示区的周边区。
在步骤504，形成位于周边区的隔离件。
这里，隔离件包括至少部分围绕显示区的至少一个隔离部，每个隔离部包括依次叠置在衬底基板上的第一隔离层和第二隔离层。第一隔离层在衬底基板上的第一正投影位于第二隔离层在衬底基板上的第二正投影之内。
在步骤506，形成阴极。
这里，阴极包括位于隔离件靠近显示区的一侧的第一阴极部和位于隔离件远离显示区的一侧的第二阴极部，第二阴极部与第一阴极部间隔开。
在步骤508，在阴极远离衬底基板的一侧形成封装层。
这里，封装层包括第一无机层、第二无机层、以及位于第一无机层和第二无机层之间的有机层。第一无机层在衬底基板上的正投影的边缘、有机层在衬底基板上的正投影的边缘和第二无机层在衬底基板上的正投影的边缘重叠。
下面结合图6A-图6C、以及图7A-图7D介绍形成隔离件的一些实现方式。在这些实现方式中，每个隔离部还包括如上介绍的第三隔离层1213、支撑层1214和第一导电部1215。
如图6A和图7A所示，在衬底基板11上形成至少一个初始隔离件12A。每个初始隔离件12A包括依次叠置在衬底基板11上的支撑层1214、第三隔离层1213、第一初始隔离层1211A和第二隔离层1212。第一初始隔离层1211A在衬底基板11上的正投影靠近显示区111的边缘、第二隔离层1212在衬底基板11上的正投影靠近显示区111的边缘和第三隔离层1213在衬底基板11上的正投影靠近显示区111的边缘重合。第一初始隔离层1211A在衬底基板11上的正投影远离显示区111的边缘、第二隔离层1212在衬底基板11上的正投影远离显示区111的边缘和第三隔离层1213在衬底基板11上的正投影远离显示区111的边缘重合。
接下来，形成第一导电部1215，并对第一初始隔离层1211A靠近显示区111的第一侧面S1和远离显示区111的第二侧面S2中的至少一个进行刻蚀，以形成第一隔离层1211。
首先结合图6B-图6C介绍形成第一导电部1215和形成第一隔离层1211的一些实现方式。
如图6B所示，在第二隔离层1212远离衬底基板11的一侧形成第四绝缘部IL41， 第四绝缘部IL41具有使得第二隔离层1212远离衬底基板11的一面的一部分露出的开口V。另外，第四绝缘部IL41使得第一侧面S1和第二侧面S2露出。
如图6C所示，形成部分位于开口V中且覆盖第一侧面S1和第二侧面S2的导电材料层1215A，然后对导电材料层1215A进行湿法刻蚀，以得到部分位于开口V中的第一导电部1215。这里，该湿法刻蚀同时使得第一侧面S1和第二侧面S2中的至少一个被刻蚀，以得到第一隔离层1211。
也就是说，第一导电部1215通过与形成第一侧面S1和第二侧面S2采用的同一的湿法刻蚀工艺来形成。
下面结合图7B-图7C介绍形成第一导电部1215和形成第一隔离层1211的另一些实现方式。
如图7B所示，形成覆盖第一侧面S1和第二侧面S2的第四绝缘材料层IL4A，第四绝缘材料层IL4A具有使得第二隔离层1212远离衬底基板11的一面的一部分露出的开口V。
如图7C所示，形成部分位于开口V中且覆盖第四绝缘材料层IL4A的导电材料层1215A，然后对导电材料层1215A进行第一湿法刻蚀，以得到部分位于开口V中的第一导电部1215。
如图7D所示，对第四绝缘材料层IL4A进行干法刻蚀，以使得第一侧面S1和第二侧面S2露出。然后，对第一侧面S1和第二侧面S2中的至少一个进行第二湿法刻蚀，以得到第一隔离层1211。
也就是说，第一导电部1215通过与形成第一侧面S1和第二侧面S2采用的湿法刻蚀工艺不同的另一湿法刻蚀工艺来形成。
图8是示出根据本公开另一些实施例的显示面板的制造方法的流程示意图。图9A和图9B是示出根据本公开又一些实施例的显示面板的俯视示意图。
在一些实施例中，图5所示方法还包括图8所示步骤802-步骤808。另外，衬底基板11还包括牺牲区113，如图9A和图9B所示。
下面结合图8、图9A和图9B对显示面板的制造方法进行说明。
在步骤802，在牺牲区113和周边区112上形成初始胶体部17A。显示区111位于初始胶体部17A限定的空间SPE内。初始胶体部17A在衬底基板11上的正投影为规则图形。这里，规则图形例如可以是如图9A所示的正方形，或者可以是如图9B所示的矩形。
在步骤804，在形成封装层16后，在空间SPE内填充初始胶体层18A，参见图9B。
在步骤806，在初始胶体层18A远离衬底基板11的一侧形成盖板19。盖板19例如可以参见图1B。
在步骤808，执行切割工艺，以去除牺牲区113、初始胶体部17A位于牺牲区113上的部分、初始胶体层18A位于牺牲区113上的部分、盖板19位于牺牲区113上的部分，从而形成图3和图1B所示的显示面板。这里，初始胶体部17A位于周边区112的部分作为胶体部17，初始胶体层18A的剩余部分作为胶体层18。
上述实施例中，由于形成了初始胶体部17A，故填充的初始胶体层18可以更均匀，减小了胶体层18中的气泡，提高了显示面板的封装效果。
本公开还提供了一种显示装置，显示装置可以包括上述任意一些实施例的显示面板。在一些实施例中，显示装置例如可以是智能穿戴设备(例如智能手表)、移动终端、电视机、显示器、笔记本电脑、数码相框、导航仪、电子纸等任何具有显示功能的产品或部件。
至此，已经详细描述了本公开的各实施例。为了避免遮蔽本公开的构思，没有描述本领域所公知的一些细节。本领域技术人员根据上面的描述，完全可以明白如何实施这里公开的技术方案。
虽然已经通过示例对本公开的一些特定实施例进行了详细说明，但是本领域的技术人员应该理解，以上示例仅是为了进行说明，而不是为了限制本公开的范围。本领域的技术人员应该理解，可在不脱离本公开的范围和精神的情况下，对以上实施例进行修改或者对部分技术特征进行等同替换。本公开的范围由所附权利要求来限定。

Claims (28)

  1. 一种显示面板，包括：
    衬底基板，包括显示区和围绕所述显示区的周边区；
    隔离件，位于所述周边区，所述隔离件包括至少部分围绕所述显示区的至少一个隔离部，每个隔离部包括依次叠置在所述衬底基板上的第一隔离层和第二隔离层，所述第一隔离层在所述衬底基板上的第一正投影位于所述第二隔离层在所述衬底基板上的第二正投影之内；
    阴极，包括：
    第一阴极部，位于所述隔离件靠近所述显示区的一侧，和
    第二阴极部，位于所述隔离件远离所述显示区的一侧，并且与所述第一阴极部间隔开；和
    封装层，位于所述阴极远离所述衬底基板的一侧，包括第一无机层、第二无机层、以及位于所述第一无机层和所述第二无机层之间的有机层，所述第一无机层在所述衬底基板上的正投影的边缘、所述有机层在所述衬底基板上的正投影的边缘和所述第二无机层在所述衬底基板上的正投影的边缘重叠。
  2. 根据权利要求1所述的显示面板，其中：
    所述周边区包括绑定区和除所述绑定区外的非绑定区，所述绑定区围绕所述显示区的边缘的第一边缘，所述非绑定区围绕所述边缘除所述第一边缘外的第二边缘；并且
    每个隔离部包括位于所述非绑定区且围绕所述第二边缘的第一隔离部。
  3. 根据权利要求2所述的显示面板，其中，每个隔离部还包括：
    第二隔离部，位于所述绑定区，并且与所述第一隔离部的一端连接；和
    第三隔离部，位于所述绑定区，并且与所述第一隔离部的另一端连接，所述第三隔离部和所述第二隔离部均向远离所述显示区的方向延伸。
  4. 根据权利要求3所述的显示面板，还包括：
    焊盘，位于所述绑定区；和
    至少一个围堰，位于所述绑定区，并且位于所述第一边缘和所述焊盘之间，所述至少一个围堰沿着从所述第二隔离部到所述第三隔离部的方向延伸，其中：
    所述封装层位于所述至少一个围堰远离所述衬底基板的一侧，
    所述焊盘在所述衬底基板上的正投影位于所述封装层在所述衬底基板上的正投影之外，并且
    所述至少一个围堰在所述衬底基板上的正投影位于所述封装层在所述衬底基板上的正投影之内。
  5. 根据权利要求4所述的显示面板，其中，所述至少一个围堰位于所述阴极和所述焊盘之间。
  6. 根据权利要求4所述的显示面板，其中，所述至少一个围堰包括多个围堰，所述多个围堰在从所述第一边缘到所述焊盘的方向上间隔排布。
  7. 根据权利要求4-6任意一项所述的显示面板，还包括：
    胶体部，位于所述绑定区，并且位于所述至少一个围堰与所述焊盘之间；
    胶体层，位于所述封装层远离所述衬底基板的一侧；和
    盖板，位于所述胶体层远离所述衬底基板的一侧。
  8. 根据权利要求1-7任意一项所述的显示面板，其中，每个隔离部还包括：
    第三隔离层，位于所述第一隔离层和所述衬底基板之间，所述第一正投影位于所述第三隔离层在所述衬底基板上的第三正投影之内。
  9. 根据权利要求8所述的显示面板，其中，每个隔离部还包括：
    支撑层，位于所述第三隔离层和所述衬底基板之间，所述第一正投影、所述第二正投影和所述第三正投影位于所述支撑层在所述衬底基板上的正投影之内。
  10. 根据权利要求9所述的显示面板，其中，每个隔离部还包括：
    第一导电部，位于所述第二隔离层远离所述衬底基板的一侧，所述第一导电部在所述衬底基板上的正投影位于所述第二正投影之内。
  11. 根据权利要求10所述的显示面板，还包括：
    位于所述周边区的电源线，所述电源线位于所述支撑层和所述衬底基板之间，并且与每个隔离部连接；和
    第二导电部，位于所述隔离件与所述显示区之间，并且位于所述第一阴极部与所述电源线之间，所述第二导电部与所述第一阴极部接触，并且与所述电源线连接。
  12. 根据权利要求11所述的显示面板，还包括：
    第一绝缘层，包括位于所述周边区的第一绝缘部，所述第一绝缘部位于所述支撑层和所述电源线之间；
    第二绝缘层，包括位于所述周边区的第二绝缘部，所述第二绝缘部位于所述支撑层和所述第一绝缘部之间；
    第三绝缘层，包括位于所述周边区的第三绝缘部，所述第三绝缘部位于所述支撑层和所述第三隔离层之间；和
    第四绝缘层，包括位于所述周边区的第四绝缘部，所述第四绝缘部位于所述第二隔离层与所述第一导电部之间；
    其中，每个隔离部还包括：
    第一连接部，贯穿所述第二绝缘部和所述第一绝缘部，并且与所述支撑层和所述电源线连接，
    第二连接部，贯穿所述第三绝缘部，并且与所述第三隔离层和所述支撑层连接，和
    第三连接部，贯穿所述第四绝缘部，并且与所述第一导电部和所述第二隔离层连接。
  13. 根据权利要求12所述的显示面板，还包括：
    连接层，位于所述第二导电部与所述电源线之间，并且位于所述隔离件与所述显示区之间，所述连接层包括：
    第一连接层，位于所述第二导电部与所述电源线之间，和
    第二连接层，位于所述第二导电部与所述第一连接层之间；
    至少一个第四连接部，贯穿所述第二绝缘部和所述第一绝缘部，并且与所述第一 连接层和所述电源线连接；
    至少一个第五连接部，贯穿所述第三绝缘部，并且与所述第二连接层和所述第一连接层连接；和
    至少一个第六连接部，贯穿所述第四绝缘部，并且与所述第二导电部和所述第二连接层连接。
  14. 根据权利要求13所述的显示面板，其中，所述第一连接层在所述衬底基板上的正投影位于所述第二连接层在所述衬底基板上的正投影之内。
  15. 根据权利要求13所述的显示面板，其中：
    所述第一连接部和所述支撑层一体设置；
    所述第二连接部和所述第三隔离层一体设置；
    所述第三连接部和所述第一导电部一体设置；
    所述至少一个第四连接部和所述第一连接层一体设置；
    所述至少一个第五连接部和所述第二连接层一体设置；并且
    所述至少一个第六连接部和所述第二导电部一体设置。
  16. 根据权利要求1-15任意一项所述的显示面板，其中，所述阴极还包括：
    第三阴极部，位于每个隔离部远离所述衬底基板的一侧，并且与所述第一阴极部和所述第二阴极部间隔开。
  17. 根据权利要求16所述的显示面板，其中，所述至少一个隔离部包括多个隔离部，所述阴极还包括：
    第四阴极部，位于所述多个隔离部中相邻的两个隔离部之间，并且与所述第三阴极部间隔开。
  18. 根据权利要求1-17任意一项所述的显示面板，还包括位于所述阴极与所述衬底基板之间的功能层，所述功能层包括电子传输层和电子注入层中的至少一个，所述功能层包括：
    第一功能部，位于所述隔离件靠近所述显示区的一侧；和
    第二功能部，位于所述隔离件远离所述显示区的一侧，并且与所述第一功能部间隔开。
  19. 根据权利要求1-18任意一项所述的显示面板，其中：
    所述第一正投影靠近所述显示区的边缘与所述第二正投影靠近所述显示区的边缘不重叠；并且
    所述第一正投影远离所述显示区的边缘与所述第二正投影远离所述显示区的边缘不重叠。
  20. 根据权利要求19所述的显示面板，其中，所述第一正投影的边缘与所述第二正投影的边缘之间的最小距离为1微米-3微米。
  21. 根据权利要求8所述的显示面板，其中，所述第二隔离层和所述第三隔离层的材料包括钛，所述第一隔离层的材料包括铝。
  22. 一种显示装置，包括：如权利要求1-21任意一项所述的显示面板。
  23. 一种显示面板的制造方法，包括：
    提供衬底基板，所述衬底基板包括显示区和围绕所述显示区的周边区；
    形成位于所述周边区的隔离件，所述隔离件包括至少部分围绕所述显示区的至少一个隔离部，每个隔离部包括依次叠置在所述衬底基板上的第一隔离层和第二隔离层，所述第一隔离层在所述衬底基板上的第一正投影位于所述第二隔离层在所述衬底基板上的第二正投影之内；
    形成阴极，所述阴极包括：
    第一阴极部，位于所述隔离件靠近所述显示区的一侧，和
    第二阴极部，位于所述隔离件远离所述显示区的一侧，并且与所述第一阴
    极部间隔开；和
    在所述阴极远离所述衬底基板的一侧形成封装层，所述封装层包括第一无机层、第二无机层、以及位于所述第一无机层和所述第二无机层之间的有机层，所述第一无机层在所述衬底基板上的正投影的边缘、所述有机层在所述衬底基板上的正投影的边 缘和所述第二无机层在所述衬底基板上的正投影的边缘重叠。
  24. 根据权利要求23所述的方法，其中，每个隔离部还包括：
    第三隔离层，位于所述第一隔离层和所述衬底基板之间，所述第一正投影位于所述第三隔离层在所述衬底基板上的第三正投影之内；
    支撑层，位于所述第三隔离层和所述衬底基板之间，所述第一正投影、所述第二正投影和所述第三正投影位于所述支撑层在所述衬底基板上的正投影之内；和
    第一导电部，位于所述第二隔离层远离所述衬底基板的一侧，所述第一导电部在所述衬底基板上的正投影位于所述第二正投影之内。
  25. 根据权利要求24所述的方法，其中，形成所述隔离件包括：
    在所述衬底基板上形成至少一个初始隔离件，每个初始隔离件包括依次叠置在所述衬底基板上的所述支撑层、所述第三隔离层、所述第一初始隔离层、所述第二隔离层，所述第一初始隔离层在所述衬底基板上的正投影靠近所述显示区的边缘、所述第二隔离层在所述衬底基板上的正投影靠近所述显示区的边缘和所述第三隔离层在所述衬底基板上的正投影靠近所述显示区的边缘重合，所述第一初始隔离层在所述衬底基板上的正投影远离所述显示区的边缘、所述第二隔离层在所述衬底基板上的正投影远离所述显示区的边缘和所述第三隔离层在所述衬底基板上的正投影远离所述显示区的边缘重合；和
    形成所述第一导电部，并对所述第一初始隔离层靠近所述显示区的第一侧面和远离所述显示区的第二侧面中的至少一个进行刻蚀，以形成所述第一隔离层。
  26. 根据权利要求25所述的方法，其中，所述形成所述第一导电部，并对所述第一初始隔离层靠近所述显示区的第一侧面和远离所述显示区的第二侧面中的至少一个进行刻蚀包括：
    在所述第二隔离层远离所述衬底基板的一侧形成第四绝缘部，所述第四绝缘部具有使得所述第二隔离层远离所述衬底基板的一面的一部分露出的开口，并且，所述第四绝缘部使得所述第一侧面和所述第二侧面露出；
    形成部分位于所述开口中且覆盖所述第一侧面和所述第二侧面的导电材料层；和
    对所述导电材料层进行湿法刻蚀，以得到部分位于所述开口中的所述第一导电部， 其中，所述湿法刻蚀使得所述第一侧面和所述第二侧面中的至少一个被刻蚀，以得到所述第一隔离层。
  27. 根据权利要求25所述的方法，其中，所述形成所述第一导电部，并对所述第一初始隔离层靠近所述显示区的第一侧面和远离所述显示区的第二侧面中的至少一个进行刻蚀包括：
    形成覆盖所述第一侧面和所述第二侧面的第四绝缘材料层，所述第四绝缘材料层具有使得所述第二隔离层远离所述衬底基板的一面的一部分露出的开口；
    形成部分位于所述开口中且覆盖所述第四绝缘材料层的导电材料层；和
    对所述导电材料层进行第一湿法刻蚀，以得到部分位于所述开口中的所述第一导电部；
    对所述第四绝缘材料层进行干法刻蚀，以使得所述第一侧面和所述第二侧面露出；和
    对所述第一侧面和所述第二侧面中的至少一个进行第二湿法刻蚀，以得到所述第一隔离层。
  28. 根据权利要求23-27任意一项所述的方法，其中，所述衬底基板还包括牺牲区，所述方法还包括：
    在所述牺牲区和所述周边区上形成初始胶体部，所述显示区位于所述初始胶体部限定的空间内，所述初始胶体部在所述衬底基板上的正投影为规则图形；
    在形成所述封装层后，在所述空间内填充初始胶体层；
    在所述初始胶体层远离所述衬底基板的一侧形成盖板；和
    执行切割工艺，以去除所述牺牲区、所述初始胶体部位于所述牺牲区上的部分、所述初始胶体层位于所述牺牲区上的部分、所述盖板位于所述牺牲区上的部分，所述初始胶体部位于所述周边区的部分作为胶体部，所述初始胶体层的剩余部分作为胶体层。
PCT/CN2021/091175 2021-04-29 2021-04-29 显示面板及其制造方法、显示装置 WO2022226939A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/CN2021/091175 WO2022226939A1 (zh) 2021-04-29 2021-04-29 显示面板及其制造方法、显示装置
US17/640,530 US20240049569A1 (en) 2021-04-29 2021-04-29 Display Panel and Method for Manufacturing the Same, and Display Device
GB2305014.9A GB2614833A (en) 2021-04-29 2021-04-29 Display panel and manufacturing method therefor, and display device
CN202180000990.7A CN115669271A (zh) 2021-04-29 2021-04-29 显示面板及其制造方法、显示装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2021/091175 WO2022226939A1 (zh) 2021-04-29 2021-04-29 显示面板及其制造方法、显示装置

Publications (1)

Publication Number Publication Date
WO2022226939A1 true WO2022226939A1 (zh) 2022-11-03

Family

ID=83846604

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/091175 WO2022226939A1 (zh) 2021-04-29 2021-04-29 显示面板及其制造方法、显示装置

Country Status (4)

Country Link
US (1) US20240049569A1 (zh)
CN (1) CN115669271A (zh)
GB (1) GB2614833A (zh)
WO (1) WO2022226939A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160013441A1 (en) * 2014-07-09 2016-01-14 Samsung Display Co., Ltd. Display device
CN106409869A (zh) * 2015-07-29 2017-02-15 三星显示有限公司 有机发光二极管显示器
CN109802052A (zh) * 2019-01-25 2019-05-24 上海天马微电子有限公司 一种有机发光显示面板及其制作方法
CN109935601A (zh) * 2019-04-04 2019-06-25 京东方科技集团股份有限公司 一种显示面板及其制备方法
CN209071332U (zh) * 2018-10-31 2019-07-05 云谷（固安）科技有限公司 显示面板、显示屏和显示终端
WO2021017011A1 (zh) * 2019-08-01 2021-02-04 京东方科技集团股份有限公司 显示基板及显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160013441A1 (en) * 2014-07-09 2016-01-14 Samsung Display Co., Ltd. Display device
CN106409869A (zh) * 2015-07-29 2017-02-15 三星显示有限公司 有机发光二极管显示器
CN209071332U (zh) * 2018-10-31 2019-07-05 云谷（固安）科技有限公司 显示面板、显示屏和显示终端
CN109802052A (zh) * 2019-01-25 2019-05-24 上海天马微电子有限公司 一种有机发光显示面板及其制作方法
CN109935601A (zh) * 2019-04-04 2019-06-25 京东方科技集团股份有限公司 一种显示面板及其制备方法
WO2021017011A1 (zh) * 2019-08-01 2021-02-04 京东方科技集团股份有限公司 显示基板及显示装置

Also Published As

Publication number Publication date
GB2614833A (en) 2023-07-19
US20240049569A1 (en) 2024-02-08
GB202305014D0 (en) 2023-05-17
CN115669271A (zh) 2023-01-31

Similar Documents

Publication Publication Date Title
CN108962947B (zh) 一种柔性显示面板和显示装置
CN109786421B (zh) 一种显示装置、显示背板及制作方法
WO2019100874A1 (zh) 显示基板及其制造方法以及对应显示面板及其封装方法
US20240179940A1 (en) Display substrate and preparation method thereof, and display device
KR20070072874A (ko) 반도체 디바이스
JP3193995U (ja) 表示装置
CN108091675A (zh) 显示基板及其制作方法
US9450103B2 (en) Thin film transistor, method for manufacturing the same, display device and electronic product
WO2022001405A1 (zh) 显示基板及其制备方法、显示装置
US20240038773A1 (en) Display panel and display device
CN109300956A (zh) 一种有机发光显示面板及显示装置
WO2021047140A1 (zh) 显示面板
US20240164179A1 (en) Light-emitting substrate and manufacturing method thereof, and light-emitting apparatus
TW201415624A (zh) 有機發光二極體顯示器及其製造方法
WO2022246886A1 (zh) 阵列基板及其制备方法
WO2019041954A1 (zh) 显示面板及其制备方法、显示装置
KR102019191B1 (ko) 유기전계발광표시장치 및 그 제조방법
WO2020118952A1 (zh) 一种 oled 显示装置及其制作方法
CN214313208U (zh) 一种拼接屏
US11871626B2 (en) Display panel and display device
WO2022226939A1 (zh) 显示面板及其制造方法、显示装置
CN109671724B (zh) 发光面板及显示装置
US11785808B2 (en) Flexible display device and method of manufacturing the same
WO2022041022A1 (zh) 显示基板及显示装置
WO2023039953A1 (zh) 显示面板及其制备方法

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 17640530

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21938418

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 202305014

Country of ref document: GB

Kind code of ref document: A

Free format text: PCT FILING DATE = 20210429

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21938418

Country of ref document: EP

Kind code of ref document: A1