WO2022215583A1 - 窒化物半導体装置 - Google Patents

窒化物半導体装置 Download PDF

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WO2022215583A1
WO2022215583A1 PCT/JP2022/015092 JP2022015092W WO2022215583A1 WO 2022215583 A1 WO2022215583 A1 WO 2022215583A1 JP 2022015092 W JP2022015092 W JP 2022015092W WO 2022215583 A1 WO2022215583 A1 WO 2022215583A1
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layer
nitride semiconductor
nitride
semiconductor layer
film
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French (fr)
Japanese (ja)
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啓太 四方
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Rohm Co Ltd
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Rohm Co Ltd
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Priority to CN202280026721.2A priority Critical patent/CN117121174A/zh
Priority to JP2023512954A priority patent/JPWO2022215583A1/ja
Priority to DE112022001391.5T priority patent/DE112022001391T5/de
Publication of WO2022215583A1 publication Critical patent/WO2022215583A1/ja
Priority to US18/482,024 priority patent/US20240038884A1/en
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    • H10W20/0245—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising use of blind vias during the manufacture
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Definitions

  • the present disclosure relates to a nitride semiconductor device made of a Group III nitride semiconductor (hereinafter sometimes simply referred to as "nitride semiconductor").
  • a group III nitride semiconductor is a semiconductor in which nitrogen is used as a group V element in a group III-V semiconductor.
  • Aluminum nitride (AlN), gallium nitride (GaN), and indium nitride (InN) are representative examples. In general, it can be expressed as AlxInyGa1 -x-yN ( 0 ⁇ x ⁇ 1 , 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1).
  • Patent Document 1 discloses a HEMT (High Electron Mobility Transistor) using a nitride semiconductor.
  • the HEMT of Patent Document 1 includes a p-type Si substrate, a buffer layer formed on the p-type Si substrate, an electron transit layer made of GaN formed on the buffer layer, and an AlGaN electron transit layer formed on the electron transit layer. and an electron supply layer consisting of A drain electrode and a gate electrode are formed in contact with the electron supply layer.
  • a source electrode is formed so as to penetrate through the electron supply layer, the electron transit layer and the buffer layer and come into contact with the p-type Si substrate.
  • a back surface electrode electrically connected to the source electrode via the p-type Si substrate is formed on the back surface of the p-type Si substrate.
  • a two-dimensional electron gas is formed in the electron transit layer at a position several angstroms inward from the interface between the electron transit layer and the electron supply layer. .
  • this two-dimensional electron gas is connected.
  • the gate electrode By applying a control voltage to the gate electrode to cut off the two-dimensional electron gas, the connection between the source and the drain is cut off.
  • An object of the present disclosure is to provide a nitride semiconductor device having a novel configuration.
  • An embodiment of the present disclosure includes a hexagonal SiC substrate having a first major surface and a second major surface opposite thereto, and a nitride epitaxial layer formed on the first major surface, A nitride semiconductor device is provided in which the first main surface has an off-angle greater than 1° with respect to the hexagonal c-plane.
  • FIG. 1 is a cross-sectional view for explaining the configuration of the nitride semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 2A is a cross-sectional view showing an example of the manufacturing process of the nitride semiconductor device.
  • FIG. 2B is a cross-sectional view showing the next step of FIG. 2A.
  • FIG. 2C is a cross-sectional view showing the next step of FIG. 2B.
  • FIG. 2D is a cross-sectional view showing the next step of FIG. 2C.
  • FIG. 2E is a cross-sectional view showing the next step of FIG. 2D.
  • FIG. 2F is a cross-sectional view showing the next step of FIG. 2E.
  • FIG. 2G is a cross-sectional view showing the next step of FIG.
  • FIG. 2H is a cross-sectional view showing the next step of FIG. 2G.
  • FIG. 2I is a cross-sectional view showing the next step of FIG. 2H.
  • FIG. 2J is a cross-sectional view showing the next step after FIG. 2I.
  • FIG. 3 is a cross-sectional view for explaining the configuration of the nitride semiconductor device according to the second embodiment of the present disclosure.
  • FIG. 4A is a cross-sectional view showing an example of the manufacturing process of the nitride semiconductor device.
  • FIG. 4B is a cross-sectional view showing the next step of FIG. 4A.
  • FIG. 4C is a cross-sectional view showing the next step of FIG. 4B.
  • FIG. 4A is a cross-sectional view showing an example of the manufacturing process of the nitride semiconductor device.
  • FIG. 4B is a cross-sectional view showing the next step of FIG. 4A.
  • FIG. 4C is a cross-sectional view
  • FIG. 4D is a cross-sectional view showing the next step of FIG. 4C.
  • FIG. 4E is a cross-sectional view showing the next step of FIG. 4D.
  • FIG. 4F is a cross-sectional view showing the next step of FIG. 4E.
  • An embodiment of the present disclosure includes a hexagonal SiC substrate having a first major surface and a second major surface opposite thereto, and a nitride epitaxial layer formed on the first major surface, A nitride semiconductor device is provided in which the first main surface has an off-angle greater than 1° with respect to the hexagonal c-plane.
  • the first main surface has an off-angle inclined at an angle of 1° or more and 8° or less in the [11-20] direction with respect to the hexagonal c-plane.
  • the first principal plane has an off-angle inclined at an angle of 2° or more and 6° or less in the [11-20] direction with respect to the hexagonal c-plane.
  • the nitride epitaxial layer is arranged on a first nitride semiconductor layer forming an electron transport layer, and on the first nitride semiconductor layer to form an electron supply layer. and a second nitride semiconductor layer having a bandgap higher than that of the first nitride semiconductor layer.
  • a semi-insulating nitride layer is arranged between the SiC substrate and the first nitride semiconductor layer and has an acceptor concentration higher than a donor concentration.
  • a buffer layer made of a nitride semiconductor is included between the SiC substrate and the semi-insulating nitride layer.
  • a source electrode, a drain electrode and a gate electrode arranged on the second nitride semiconductor layer, a back electrode formed on the second main surface, the nitride epitaxial layer and a conductive member penetrating the SiC substrate and electrically connecting the source electrode to the back electrode.
  • a source electrode, a drain electrode and a gate electrode arranged on the second nitride semiconductor layer, a back electrode formed on the second main surface, and the nitride epitaxial layer are a conductive member penetrating to electrically connect the source electrode to the SiC substrate.
  • the first nitride semiconductor layer is a GaN layer
  • the second nitride semiconductor layer is an AlGaN layer.
  • the first nitride semiconductor layer is a GaN layer
  • the second nitride semiconductor layer is an AlGaN layer
  • the semi-insulating nitride layer is a GaN layer containing carbon
  • the first nitride semiconductor layer is a GaN layer
  • the second nitride semiconductor layer is an AlGaN layer
  • the semi-insulating nitride layer is a GaN layer containing carbon
  • the buffer layer is composed of a laminated film of an AlN layer formed on the first main surface and an AlGaN layer laminated on the AlN layer.
  • the first nitride semiconductor layer is a GaN layer
  • the second nitride semiconductor layer is an AlGaN layer
  • the semi-insulating nitride layer is a GaN layer containing carbon
  • the buffer layer is composed of an AlN layer or an AlGaN layer.
  • FIG. 1 is a cross-sectional view for explaining the configuration of the nitride semiconductor device according to the first embodiment of the present disclosure.
  • a nitride semiconductor device 1 includes a substrate 2 having a first main surface (front surface) 2a and a second main surface (back surface) 2b opposite thereto, and a nitride epitaxial layer formed on the first main surface 2a of the substrate 2. and layer 20 .
  • Nitride epitaxial layer 20 includes buffer layer 3 formed on first main surface 2a of substrate 2, semi-insulating nitride layer 4 formed on buffer layer 3, and semi-insulating nitride layer 4. and a second nitride semiconductor layer 6 formed on the first nitride semiconductor layer 5 .
  • this nitride semiconductor device 1 includes an insulating film 7 formed on the second nitride semiconductor layer 6 . Furthermore, the nitride semiconductor device 1 has a source electrode 10 and a drain electrode 11 which pass through the source contact hole 8 and the drain contact hole 9 respectively formed in the insulating film 7 and are in ohmic contact with the second nitride semiconductor layer 6 . include. The source electrode 10 and the drain electrode 11 are spaced apart.
  • this nitride semiconductor device 1 includes a gate electrode 13 that penetrates through a gate contact hole 12 formed in the insulating film 7 and contacts the second nitride semiconductor layer 6 .
  • the gate electrode 13 is arranged between the source electrode 10 and the drain electrode 11 .
  • the nitride semiconductor device 1 includes a hard mask layer 15 formed on the second main surface 2b of the substrate 2, a back electrode 16 formed on the surface of the hard mask layer 15 opposite to the substrate 2, A contact plug 17 electrically connecting the back electrode 16 and the source electrode 10 is included.
  • the substrate 2 is made of a hexagonal SiC substrate in this embodiment.
  • the substrate 2 is a conductive SiC substrate in this embodiment.
  • the substrate 2 is a 4H-SiC substrate in this embodiment.
  • the first main surface 2a of the substrate 2 has an off-angle greater than 1° with respect to the c-plane of the hexagonal crystal. More specifically, the first main surface 2a of the substrate 2 has an off angle of 1° or more and 8° or less in the [11-20] direction with respect to the hexagonal c-plane.
  • the off angle in the [11-20] direction is more preferably 2° or more and 6° or less, further preferably 3° or more and 5° or less. In this embodiment, the off angle in the [11-20] direction is about 4°.
  • the thickness of the substrate 2 is, for example, approximately 30 ⁇ m to 300 ⁇ m. In this embodiment, the thickness of the substrate 2 is of the order of 150 ⁇ m.
  • the buffer layer 3 is a buffer layer for relaxing strain caused by a difference between the lattice constant of the semi-insulating nitride layer 4 formed on the buffer layer 3 and the lattice constant of the substrate 2 .
  • the buffer layer 3 is composed of a multi-layered buffer layer in which a plurality of nitride semiconductor films are laminated.
  • the buffer layer 3 is composed of a laminated film of an AlN film in contact with the surface of the substrate 2 and an AlGaN film laminated on the surface of this AlN film (the surface opposite to the substrate 2).
  • the buffer layer 3 may be composed of a single AlN film or a single AlGaN film.
  • the thickness of the buffer layer 3 is, for example, about 3 ⁇ m to 15 ⁇ m. In this embodiment, the thickness of the buffer layer 3 is of the order of 5 ⁇ m.
  • the semi-insulating nitride layer 4 is provided to suppress leakage current.
  • the semi-insulating nitride layer 4 is composed of an impurity-doped GaN layer and has a thickness of about 1 ⁇ m to 10 ⁇ m. In this embodiment, the thickness of the semi-insulating nitride layer 4 is of the order of 2 ⁇ m.
  • the impurity is C (carbon), for example, and is doped so that the difference (Na ⁇ Nd) between the acceptor concentration Na and the donor concentration Nd is approximately 1 ⁇ 10 17 cm ⁇ 3 .
  • the first nitride semiconductor layer 5 constitutes an electron transit layer.
  • the first nitride semiconductor layer 5 is an n-type GaN layer doped with donor-type impurities, and has a thickness of, for example, about 0.05 ⁇ m to 1 ⁇ m. In this embodiment, the thickness of the first nitride semiconductor layer 5 is approximately 1 ⁇ m.
  • the first nitride semiconductor layer 5 may be composed of an undoped GaN layer.
  • the second nitride semiconductor layer 6 constitutes an electron supply layer.
  • the second nitride semiconductor layer 6 is made of a nitride semiconductor having a bandgap larger than that of the first nitride semiconductor layer 5 .
  • the second nitride semiconductor layer 6 is made of a nitride semiconductor having a higher Al composition than the first nitride semiconductor layer 5 .
  • the higher the Al composition the larger the bad gap.
  • the first nitride semiconductor layer 5 (electron transit layer) and the second nitride semiconductor layer 6 (electron supply layer) are made of nitride semiconductors having different band gaps (Al compositions). has lattice mismatch. Then, the first nitride semiconductor layer 5 and the second nitride semiconductor layer 6 are polarized by spontaneous polarization of the first nitride semiconductor layer 5 and the second nitride semiconductor layer 6 and piezoelectric polarization caused by lattice mismatch therebetween. The energy level of the conduction band of the first nitride semiconductor layer 5 at the interface with is lower than the Fermi level.
  • the insulating film 7 is formed over substantially the entire surface of the second nitride semiconductor layer 6 .
  • the insulating film 7 is made of SiN in this embodiment.
  • the thickness of the insulating film 7 is, for example, about 10 nm to 200 nm. In this embodiment, the thickness of the insulating film 7 is approximately 100 nm.
  • the insulating film 7 may be composed of SiN, SiO 2 , SiN, SiON, Al 2 O 3 , AlN, AlON, HfO, HfN, HfON, HfSiON, AlON, or the like.
  • the source electrode 10 includes a main electrode portion 10A and an extension portion 10B.
  • the main electrode portion 10A covers the source contact hole 8 and the peripheral portion of the source contact hole 8 on the surface of the insulating film 7 .
  • a portion of the main electrode portion 10A enters the source contact hole 8 and contacts the surface of the second nitride semiconductor layer 6 within the source contact hole 8 .
  • the extension portion 10B extends in the direction opposite to the gate electrode 13 along the surface of the insulating film 7 from the side edge of the main electrode portion 10A opposite to the gate electrode 13 side.
  • the drain electrode 11 covers the drain contact hole 9 and the periphery of the drain contact hole 9 on the surface of the insulating film 7 . A portion of the drain electrode 11 enters the drain contact hole 9 and contacts the surface of the second nitride semiconductor layer 6 within the drain contact hole 9 .
  • the source electrode 10 and the drain electrode 11 are composed of, for example, a Ti/Al laminated film in which a Ti film and an Al film are laminated in that order from the lower layer.
  • the thickness of the Ti film on the lower layer side is, for example, about 20 nm
  • the thickness of the Al film on the upper layer side is, for example, about 300 nm.
  • the source electrode 10 and the drain electrode 11 need only be made of a material that can make ohmic contact with the second nitride semiconductor layer 6 (AlGaN layer).
  • the source electrode 10 and the drain electrode 11 may be composed of a Ti/Al/Ni/Au laminated film in which a Ti film, an Al film, a Ni film and an Au film are laminated in that order from the bottom.
  • the gate electrode 13 covers the gate contact hole 12 and the peripheral portion of the gate contact hole 12 on the surface of the insulating film 7 . A portion of gate electrode 13 enters gate contact hole 12 and contacts the surface of second nitride semiconductor layer 6 within gate contact hole 12 .
  • the gate electrode 13 is composed of, for example, a Ni/Au laminated film in which a Ni film and an Au film are laminated in that order from the lower layer.
  • the thickness of the Ni film on the lower layer side is, for example, about 10 nm
  • the thickness of the Au film on the upper layer side is, for example, about 600 nm.
  • the gate electrode 13 may be made of a material capable of forming a Schottky barrier against the second nitride semiconductor layer 6 (AlGaN layer).
  • the hard mask layer 15 is made of, for example, a Ni layer and has a thickness of, for example, about 3 ⁇ m.
  • the hard mask layer 15 is formed with an opening 15 a penetrating through the hard mask layer 15 in the thickness direction at a position facing a portion of the extension 10 B of the source electrode 10 .
  • the opening 15a of the hard mask layer 15 communicates between the second main surface 2b of the substrate 2 and the extension 10B of the source electrode 10, so that the substrate 2, the nitride epitaxial layer 20 and the insulating film 7 are continuously formed.
  • a penetrating back contact hole 18 is formed.
  • a contact plug (conductor) 17 having an upper end connected to the source electrode 10 on the insulating film 7 is embedded in the opening 15 a and the back contact hole 18 .
  • the contact plug 17 consists of a barrier metal film 17A and a metal plug 17B.
  • the barrier metal film 17A covers the side surface of the opening 15a, the side surface of the back contact hole 18, and the bottom surface of the back contact hole 18 (the region facing the back contact hole 18 on the lower surface of the extension 10B of the source electrode 10). is formed in The metal plug 17B is embedded in the opening 15a and the back contact hole 22 while being surrounded by the barrier metal film 17A.
  • the barrier metal film 17A is made of TiN, for example.
  • the metal plug 17B is made of Au, for example.
  • the metal plug 17B may be made of Cu.
  • the contact plug 17 is an example of "a conductive member that electrically connects the source electrode to the back electrode" in the present disclosure.
  • the back electrode 16 is formed on the surface of the hard mask layer 15 opposite to the substrate 2 so as to cover the surface and the lower end surfaces of the contact plugs 17 .
  • the back electrode 16 is formed on a barrier metal film 16A formed on the surface of the hard mask layer 15 opposite to the substrate 2, and on the surface of the barrier metal film 16A opposite to the hard mask layer 15 and the contact plug. and an electrode metal 16B formed so as to cover the lower end surface of 17 .
  • the barrier metal film 16A is made of TiN, for example.
  • the electrode metal 16B is made of Au, for example.
  • the electrode metal 15B may be made of Cu.
  • the barrier metal film 16A is formed integrally with the barrier metal film 17A, and the electrode metal 16B is formed integrally with the metal plug 17B.
  • the back electrode 16 is electrically connected to the source electrode 10 via a contact plug 17.
  • a second nitride semiconductor layer 6 (electron supply layer) having a different bandgap (Al composition) is formed on a first nitride semiconductor layer 5 (electron transit layer) to form a heterojunction. It is As a result, a two-dimensional electron gas 19 is formed in the first nitride semiconductor layer 5 near the interface between the first nitride semiconductor layer 5 and the second nitride semiconductor layer 6, and the two-dimensional electron gas 19 is used as a channel. A utilized HEMT is formed.
  • this HEMT is a normally-on type.
  • a control voltage is applied to the gate electrode 13 such that the potential of the gate electrode 13 becomes negative with respect to the source electrode 10
  • the two-dimensional electron gas 19 is shut off and the HEMT is turned off.
  • FIGS. 2A to 2J are cross-sectional views for explaining an example of the manufacturing process of the nitride semiconductor device 1 described above, showing cross-sectional structures at a plurality of stages in the manufacturing process.
  • a buffer layer 3 and a semi-insulating nitride layer 4 are epitaxially grown in order on the first main surface 2a of the substrate 2 by, for example, MOCVD (Metal Organic Chemical Vapor Deposition). Further, a first nitride semiconductor layer (electron transit layer) 5 and a second nitride semiconductor layer (electron supply layer) 6 are epitaxially grown in this order on the semi-insulating nitride layer 4 by MOCVD.
  • MOCVD Metal Organic Chemical Vapor Deposition
  • nitride epitaxial layer 20 composed of buffer layer 3 , semi-insulating nitride layer 4 , first nitride semiconductor layer 5 and second nitride semiconductor layer 6 is formed on first main surface 2 a of substrate 2 . be.
  • an insulating material film 31 that is a material film of the insulating film 7 is formed into the second nitride semiconductor layer 6 by plasma CVD, LPCVD (Low Pressure CVD), MOCVD, sputtering, or the like. formed in
  • a resist film (not shown) is formed on the insulating material film 31 except for regions where the source contact hole 8 and the drain contact hole 9 are to be formed.
  • the source contact hole 8 and the drain contact hole 9 are formed in the insulating material film 31 as shown in FIG. 2C.
  • Source contact hole 8 and drain contact hole 9 penetrate insulating material film 31 and reach second nitride semiconductor layer 6 .
  • CF 4 gas for example, is used as the etching gas. After that, the resist film is removed.
  • a material film for the source electrode 10 and the drain electrode 11 is formed on the second nitride semiconductor layer 6 by, for example, an electron beam vapor deposition method, a sputtering method, or the like so as to cover the insulating material film 31 .
  • the electrode film 32 is composed of, for example, a Ti/Al laminated film in which a Ti film and an Al film are laminated in that order from the lower layer.
  • a resist film is formed to cover the source electrode formation scheduled region and the drain electrode formation scheduled region on the surface of the electrode film 32 .
  • the source electrode 10 including the main electrode portion 10A and the extension portion 10B and the drain electrode 11 are obtained as shown in FIG. 2E. be done.
  • a hard mask layer 15 having openings 15a is formed on the second main surface 2b of the substrate 2 after the resist film is removed.
  • the hard mask layer 15 having the openings 15a is formed by forming a Ni film on the second main surface 2b of the substrate 2 by, for example, sputtering, and then patterning the Ni film by, for example, ion milling. .
  • the hard mask layer 15 is used as a mask to dry-etch the substrate 2, the nitride epitaxial layer 20 and the insulating material film 31, thereby removing the substrate 2, the nitride epitaxial layer 20 and the insulating material.
  • a back contact hole 18 is formed through the film 31 .
  • the lower surface of the extension portion 10B of the source electrode 10 functions as an etching stopper layer.
  • SF6 gas is used as the etching gas.
  • the side surfaces and the bottom surface of the back contact hole 18 (part of the lower surface of the extension 10B of the source electrode 10), the side surfaces of the opening 15a, and the substrate in the hard mask layer 15 are removed by, for example, a sputtering method. 2
  • a material film for example, a TiN film
  • a barrier metal film 17A is formed on the side and bottom surfaces of the back contact hole 18 and the side surfaces of the opening 15a, and a barrier metal film 16A is formed on the surface of the hard mask layer 15 opposite to the substrate 2. be done.
  • a gold (Au) film is formed on the barrier metal film 17A and the barrier metal film 16A by plating, for example.
  • a metal plug 17B surrounded by the barrier metal film 17A is formed in the back contact hole 18, and an electrode metal 16B is formed on the barrier metal film 16A.
  • the contact plug 17 made up of the barrier metal film 17A and the metal plug 17B and the back electrode 16 made up of the barrier metal film 16A and the electrode metal 16B are obtained.
  • a resist film (not shown) is formed on the insulating material film 31, the source electrode 10 and the drain electrode 11 except for the region where the gate contact hole 12 is to be formed.
  • a gate contact hole 12 is formed in the insulating material film 31 as shown in FIG. 2J.
  • CF 4 gas for example, is used as the etching gas.
  • the insulating material film 31 is patterned and the insulating film 7 is obtained.
  • Gate contact hole 12 penetrates insulating film 7 and reaches second nitride semiconductor layer 6 .
  • the gate electrode 13 is formed to obtain the nitride semiconductor device 1 as shown in FIG.
  • the gate electrode 13 is made of, for example, a Ni/Au laminated film in which a Ni film and an Au film are laminated in that order from the bottom.
  • FIG. 3 is a cross-sectional view for explaining the configuration of the nitride semiconductor device according to the second embodiment of the present disclosure.
  • a nitride semiconductor device 1A includes a substrate 2 having a first main surface (front surface) 2a and a second main surface (back surface) 2b opposite thereto, and a nitride epitaxial layer formed on the first main surface 2a of the substrate 2. and layer 20 .
  • Nitride epitaxial layer 20 includes buffer layer 3 formed on first main surface 2a of substrate 2, semi-insulating nitride layer 4 formed on buffer layer 3, and semi-insulating nitride layer 4. and a second nitride semiconductor layer 6 formed on the first nitride semiconductor layer 5 .
  • this nitride semiconductor device 1 includes an insulating film 7 formed on the second nitride semiconductor layer 6 . Further, the nitride semiconductor device 1 has a source electrode 40 and a drain electrode 50 which are in ohmic contact with the second nitride semiconductor layer 6 through the source contact hole 8 and the drain contact hole 9 formed in the insulating film 7. including. The source electrode 40 and the drain electrode 50 are spaced apart.
  • this nitride semiconductor device 1 includes a gate electrode 13 that penetrates through a gate contact hole 12 formed in the insulating film 7 and is in contact with the second nitride semiconductor layer 6 .
  • the gate electrode 13 is arranged between the source electrode 40 and the drain electrode 50 .
  • nitride semiconductor device 1 includes a back electrode 61 formed on second main surface 2 b of substrate 2 .
  • the substrate 2 is made of a hexagonal SiC substrate in this embodiment.
  • the substrate 2 is a conductive SiC substrate in this embodiment.
  • the substrate 2 is a 4H-SiC substrate in this embodiment.
  • the first main surface 2a of the substrate 2 has an off-angle greater than 1° with respect to the c-plane of the hexagonal crystal. More specifically, the first main surface 2a of the substrate 2 has an off angle of 1° or more and 8° or less in the [11-20] direction with respect to the hexagonal c-plane.
  • the off angle in the [11-20] direction is more preferably 2° or more and 6° or less, further preferably 3° or more and 5° or less. In this embodiment, the off angle in the [11-20] direction is about 4°.
  • the thickness of the substrate 2 is, for example, approximately 30 ⁇ m to 300 ⁇ m. In this embodiment, the thickness of the substrate 2 is of the order of 150 ⁇ m.
  • the buffer layer 3 is a buffer layer for relaxing strain caused by a difference between the lattice constant of the semi-insulating nitride layer 4 formed on the buffer layer 3 and the lattice constant of the substrate 2 .
  • the buffer layer 3 is composed of a multi-layered buffer layer in which a plurality of nitride semiconductor films are laminated.
  • the buffer layer 3 is composed of a laminated film of an AlN film in contact with the surface of the substrate 2 and an AlGaN film laminated on the surface of this AlN film (the surface opposite to the substrate 2).
  • the buffer layer 3 may be composed of a single AlN film or a single AlGaN film.
  • the thickness of the buffer layer 3 is, for example, about 3 ⁇ m to 15 ⁇ m. In this embodiment, the thickness of the buffer layer 3 is of the order of 5 ⁇ m.
  • the semi-insulating nitride layer 4 is provided to suppress leakage current.
  • the semi-insulating nitride layer 4 is composed of an impurity-doped GaN layer and has a thickness of about 1 ⁇ m to 10 ⁇ m. In this embodiment, the thickness of the semi-insulating nitride layer 4 is of the order of 2 ⁇ m.
  • the impurity is C (carbon), for example, and is doped so that the difference (Na ⁇ Nd) between the acceptor concentration Na and the donor concentration Nd is approximately 1 ⁇ 10 17 cm ⁇ 3 .
  • the first nitride semiconductor layer 5 constitutes an electron transit layer.
  • the first nitride semiconductor layer 5 is an n-type GaN layer doped with donor-type impurities, and has a thickness of, for example, about 0.05 ⁇ m to 1 ⁇ m. In this embodiment, the thickness of the first nitride semiconductor layer 5 is approximately 1 ⁇ m.
  • the first nitride semiconductor layer 5 may be composed of an undoped GaN layer.
  • the second nitride semiconductor layer 6 constitutes an electron supply layer.
  • the second nitride semiconductor layer 6 is made of a nitride semiconductor having a bandgap larger than that of the first nitride semiconductor layer 5 .
  • the second nitride semiconductor layer 6 is made of a nitride semiconductor having a higher Al composition than the first nitride semiconductor layer 5 .
  • the higher the Al composition the larger the bad gap.
  • the first nitride semiconductor layer 5 (electron transit layer) and the second nitride semiconductor layer 6 (electron supply layer) are made of nitride semiconductors having different band gaps (Al compositions). has lattice mismatch. Then, the first nitride semiconductor layer 5 and the second nitride semiconductor layer 6 are polarized by spontaneous polarization of the first nitride semiconductor layer 5 and the second nitride semiconductor layer 6 and piezoelectric polarization caused by lattice mismatch therebetween. The energy level of the conduction band of the first nitride semiconductor layer 5 at the interface with is lower than the Fermi level.
  • the insulating film 7 is formed over substantially the entire surface of the second nitride semiconductor layer 6 .
  • the insulating film 7 is made of SiN in this embodiment.
  • the thickness of the insulating film 7 is, for example, about 10 nm to 200 nm. In this embodiment, the thickness of the insulating film 7 is approximately 100 nm.
  • the insulating film 7 may be composed of SiN, SiO 2 , SiN, SiON, Al 2 O 3 , AlN, AlON, HfO, HfN, HfON, HfSiON, AlON, or the like.
  • the nitride epitaxial layer 20 and the insulating film 7 , the insulating film 7 and the nitride epitaxial layer 20 are continuously formed from the surface of the insulating film 7 on the opposite side of the source contact hole 8 from the gate contact hole 12 .
  • a back contact hole 62 is formed that penetrates through the substrate 2 and extends halfway through the thickness of the substrate 2 .
  • the source electrode 40 includes a main electrode portion 40A and an extension portion 40B.
  • the main electrode portion 40A covers the source contact hole 8 and the peripheral portion of the source contact hole 8 on the surface of the insulating film 7 .
  • a portion of the main electrode portion 40A enters the source contact hole 8 and contacts the surface of the second nitride semiconductor layer 6 within the source contact hole 8 .
  • the extension part 40B covers the back contact hole 62 and the peripheral edge of the back contact hole 62 on the surface of the insulating film 7 .
  • the side edge of the extension portion 40B on the side of the main electrode portion 40A and the side edge of the main electrode portion 40A on the side of the extension portion 10B are connected.
  • a portion of the extension 40B enters the back contact hole 62 and contacts the substrate 2 within the back contact hole 62 .
  • the extension part 40B is an example of "a conductive member that electrically connects the source electrode to the SiC substrate" in the present disclosure.
  • the source electrode 40 is composed of a barrier metal film 41 and an electrode metal 42 formed on the barrier metal film 41 .
  • the barrier metal film 41 is formed on the inner surface (side and bottom surfaces) of the source contact hole 8, the peripheral portion of the back contact hole 62 on the surface of the insulating film 7, the inner surface (side and bottom surface) of the back contact hole 62, and the back contact on the surface of the insulating film 7. It covers the periphery of the hole 62 .
  • the barrier metal film 41 is made of, for example, a TiN film.
  • the electrode metal 42 is made of Au, for example.
  • the electrode metal 42 may be made of Cu.
  • the drain electrode 50 covers the drain contact hole 9 and the peripheral portion of the drain contact hole 9 on the surface of the insulating film 7 . A portion of the drain electrode 50 enters the drain contact hole 9 and contacts the surface of the second nitride semiconductor layer 6 within the drain contact hole 9 .
  • the drain electrode 50 is composed of a barrier metal film 51 covering the drain contact hole 9 and the peripheral portion of the drain contact hole 9 on the surface of the insulating film 7 , and an electrode metal 52 formed on the barrier metal film 51 .
  • the barrier metal film 51 is made of, for example, a TiN film.
  • the electrode metal 52 is made of Au, for example.
  • the electrode metal 52 may be made of Cu.
  • the gate electrode 13 covers the gate contact hole 12 and the peripheral portion of the gate contact hole 12 on the surface of the insulating film 7 . A portion of gate electrode 13 enters gate contact hole 12 and contacts the surface of second nitride semiconductor layer 6 within gate contact hole 12 .
  • the gate electrode 13 is composed of, for example, a Ni/Au laminated film in which a Ni film and an Au film are laminated in that order from the lower layer.
  • the thickness of the Ni film on the lower layer side is, for example, about 10 nm
  • the thickness of the Au film on the upper layer side is, for example, about 600 nm.
  • the gate electrode 13 may be made of a material capable of forming a Schottky barrier against the second nitride semiconductor layer 6 (AlGaN layer).
  • the back electrode 61 is formed so as to cover substantially the entire second main surface 2b of the substrate 2 .
  • the back electrode 61 is made of, for example, a Ni film.
  • the back electrode 61 is electrically connected to the main electrode portion 40A of the source electrode 40 via the substrate 2 and the extension portion 40B of the source electrode 40 .
  • a second nitride semiconductor layer 6 (electron supply layer) having a different bandgap (Al composition) is formed on a first nitride semiconductor layer 5 (electron transit layer) to form a heterojunction. It is As a result, a two-dimensional electron gas 19 is formed in the first nitride semiconductor layer 5 near the interface between the first nitride semiconductor layer 5 and the second nitride semiconductor layer 6, and the two-dimensional electron gas 19 is used as a channel. A utilized HEMT is formed.
  • this HEMT is a normally-on type.
  • a control voltage is applied to the gate electrode 13 such that the potential of the gate electrode 13 becomes negative with respect to the source electrode 10
  • the two-dimensional electron gas 19 is shut off and the HEMT is turned off.
  • 4A to 4J are cross-sectional views for explaining an example of the manufacturing process of the nitride semiconductor device 1A described above, showing cross-sectional structures at a plurality of stages in the manufacturing process.
  • the steps shown in FIGS. 2A and 2B are performed similarly to the case of manufacturing the nitride semiconductor device 1A of FIG. That is, first, as shown in FIG. 2A, the buffer layer 3 and the semi-insulating nitride layer 4 are epitaxially grown in this order on the first main surface 2a of the substrate 2 by MOCVD, for example. Further, a first nitride semiconductor layer (electron transit layer) 5 and a second nitride semiconductor layer (electron supply layer) 6 are epitaxially grown in this order on the semi-insulating nitride layer 4 by MOCVD.
  • MOCVD MOCVD
  • nitride epitaxial layer 20 composed of buffer layer 3 , semi-insulating nitride layer 4 , first nitride semiconductor layer 5 and second nitride semiconductor layer 6 is formed on first main surface 2 a of substrate 2 . be.
  • an insulating material film 31 which is a material film of the insulating film 7, is formed on the second nitride semiconductor layer 6 by plasma CVD, LPCVD, MOCVD, sputtering, or the like.
  • a back electrode 61 is formed on the second main surface 2b of the substrate 2, as shown in FIG. 4A.
  • the back electrode 61 is formed by forming a Ni film on the second main surface 2b of the substrate 2 by sputtering, for example.
  • a resist film (not shown) is formed on the insulating material film 31 except for the region where the back contact hole 62 is to be formed.
  • the insulating material film 31, the nitride epitaxial layer 20 and a part of the substrate 2 are dry-etched through the resist film, thereby making the insulating material film 31 and the nitride epitaxial layer 20 continuous as shown in FIG. 4B.
  • a back contact hole 62 is formed to reach the inside of the substrate 2 through the substrate.
  • CF 4 gas for example, is used for etching the insulating material film 31
  • BCL 3 /CL 2 mixed gas for example, is used for etching the nitride epitaxial layer 20 and the substrate 2 .
  • a resist film (not shown) is formed on the insulating material film 31 except for the regions where the source contact hole 8 and the drain contact hole 9 are to be formed.
  • a resist film (not shown) is formed on the insulating material film 31 except for the regions where the source contact hole 8 and the drain contact hole 9 are to be formed.
  • a source contact hole 8 and a drain contact hole 9 are formed in the insulating material film 31 as shown in FIG. 4C.
  • the source contact hole 8 and the drain contact hole 9 penetrate the insulating material film 31 and reach the second nitride semiconductor layer 6 .
  • CF 4 gas for example, is used as the etching gas.
  • barrier metal films 41 and 51 are formed on the surface of the insulating material film 31, the inner surfaces (side and bottom surfaces) of the back contact hole 62, the inner surfaces of the source contact holes 8, and the inner surfaces of the drain contact holes 9 by, for example, a sputtering method.
  • a barrier metal material film (for example, TiN film) is formed. By patterning the barrier metal material film, barrier metal films 41 and 51 are formed as shown in FIG. 4D.
  • an electrode metal 42 made of Au for example, is formed on the barrier metal film 41 by plating, for example, and an electrode metal 52 made of Au, for example, is formed on the barrier metal film 51 .
  • an electrode metal 42 made of Au for example, is formed on the barrier metal film 41 by plating, for example, and an electrode metal 52 made of Au, for example, is formed on the barrier metal film 51 .
  • the source electrode 40 composed of the barrier metal film 41 and the electrode metal 42 and the drain electrode 50 composed of the barrier metal film 51 and the electrode metal 52 are obtained.
  • Source electrode 40 includes main electrode portion 40A and extension portion 40B.
  • a resist film (not shown) is formed on the insulating material film 31, the source electrode 10 and the drain electrode 11 except for the region where the gate contact hole 12 is to be formed.
  • a gate contact hole 12 is formed in the insulating material film 31 as shown in FIG. 4F.
  • the insulating material film 31 is patterned and the insulating film 7 is obtained.
  • Gate contact hole 12 penetrates insulating film 7 and reaches second nitride semiconductor layer 6 .
  • CF 4 gas for example, is used as the etching gas.
  • the gate electrode 13 is formed to obtain the nitride semiconductor device 1A as shown in FIG.
  • the gate electrode 13 is made of, for example, a Ni/Au laminated film in which a Ni film and an Au film are laminated in that order from the bottom.
  • the semi-insulating nitride layer 4 is formed on the buffer layer 3 in the first and second embodiments described above, the semi-insulating nitride layer 4 may not be formed.
  • the first nitride semiconductor layer (electron transit layer) 5 is made of a GaN layer
  • the second nitride semiconductor layer (electron supply layer) 6 is made of an AlGaN layer.
  • the first nitride semiconductor layer 5 and the second nitride semiconductor layer 6 have different bandgaps (for example, Al composition), and other combinations are also possible.
  • the combination of the first nitride semiconductor layer 5/second nitride semiconductor layer 6 can be GaN/AlN, AlGaN/AlN, or the like.
  • Reference Signs List 1 1A nitride semiconductor device 2 substrate 3 buffer layer 4 semi-insulating nitride layer 5 first nitride semiconductor layer 6 second nitride semiconductor layer 7 insulating film 8 source contact hole 9 drain contact hole 10 source electrode 10A main electrode Part 10B Extension 11 Drain electrode 12 Gate contact hole 13 Gate electrode 15 Hard mask layer 15a Opening 16 Back electrode 16A Barrier metal film 16B Electrode metal 17 Contact plug 17A Barrier metal film 17B Metal plug 18 Back contact hole 19 Two-dimensional electron gas 20 nitride epitaxial layer 31 insulating material film 32 electrode film 40 source electrode 40A main electrode portion 40B extension portion 41 barrier metal film 42 electrode metal 50 drain electrode 51 barrier metal film 52 electrode metal 61 back electrode 62 back contact hole

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JP2006086398A (ja) * 2004-09-17 2006-03-30 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2017228621A (ja) * 2016-06-21 2017-12-28 富士通株式会社 半導体装置及び半導体装置の製造方法
WO2019098193A1 (ja) * 2017-11-20 2019-05-23 ローム株式会社 半導体装置

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JP3848548B2 (ja) * 2001-07-04 2006-11-22 シャープ株式会社 電界効果型トランジスタ

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JPH11135885A (ja) * 1997-10-30 1999-05-21 Matsushita Electric Ind Co Ltd 半導体の製造方法及び半導体レーザ装置
JP2006086398A (ja) * 2004-09-17 2006-03-30 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2017228621A (ja) * 2016-06-21 2017-12-28 富士通株式会社 半導体装置及び半導体装置の製造方法
WO2019098193A1 (ja) * 2017-11-20 2019-05-23 ローム株式会社 半導体装置

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