WO2022181081A1 - 光検出装置および光検出システム - Google Patents
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
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Definitions
- the present disclosure relates to a photodetection device and a photodetection system that detect light.
- the TOF (Time Of Flight) method is often used when measuring the distance to the measurement target.
- this TOF method light is emitted and reflected light reflected by the object to be measured is detected.
- the distance to the measurement object is measured by measuring the time difference between the timing at which the light is emitted and the timing at which the reflected light is detected.
- Some of such distance measuring devices have a BIST (Built-in self test) function.
- Japanese Unexamined Patent Application Publication No. 2002-200002 discloses a technique for detecting a malfunction of a light receiving unit using light reflected inside a housing.
- the photodetector perform self-diagnosis using the BIST function and diagnose the presence or absence of defects.
- a photodetector includes a light receiving section, a control section, a detection section, and an output section.
- the light-receiving unit includes a light-receiving element, a first switch that connects the light-receiving element and a first node when turned on, and a second switch that applies a predetermined voltage to the first node when turned on. and a signal generator for generating a pulse signal based on the voltage of the first node.
- the controller is configured to control operation of the first switch and the second switch.
- the detector is configured to detect the timing at which the pulse signal changes based on the pulse signal.
- the output section is configured to output a detection signal according to the detection result of the detection section when the second switch is turned on.
- a photodetection system includes a light emitter and a photodetector.
- the light emitter is configured to emit light.
- the light detection section is configured to detect light reflected by the measurement target, among the light emitted from the light emission section.
- the light detection section has a light receiving section, a control section, a detection section, and an output section.
- the light-receiving unit includes a light-receiving element, a first switch that connects the light-receiving element and a first node when turned on, and a second switch that applies a predetermined voltage to the first node when turned on. and a signal generator for generating a pulse signal based on the voltage of the first node.
- the controller is configured to control operation of the first switch and the second switch.
- the detector is configured to detect the timing at which the pulse signal changes based on the pulse signal.
- the output section is configured to output a detection signal according to the detection result of the detection section when the second switch is turned on.
- the first switch is turned on in the light receiving unit, thereby connecting the first node to the light receiving element and turning on the second switch.
- a predetermined voltage is applied to the first node.
- a pulse signal is generated based on the voltage of the first node.
- the first switch and the second switch are controlled by the controller.
- the timing at which the pulse signal changes is detected by the detection unit based on this pulse signal.
- the output section outputs a detection signal corresponding to the detection result of the detection section when the second switch is turned on.
- FIG. 1 is a block diagram showing a configuration example of a photodetection system according to an embodiment of the present disclosure
- FIG. 2 is a block diagram showing a configuration example of a photodetector according to the first embodiment
- FIG. 3 is a circuit diagram showing a configuration example of a light receiving unit shown in FIG. 2
- FIG. 3 is a circuit diagram showing a configuration example of a pixel array shown in FIG. 2
- FIG. 3 is a circuit diagram showing a configuration example of a flip-flop unit shown in FIG. 2
- FIG. FIG. 2 is an explanatory diagram showing an operation example of the photodetection system shown in FIG. 1
- FIG. 3 is an explanatory diagram showing an operation example of the pixel array shown in FIG.
- FIG. 2 is a timing waveform diagram showing an example of a ranging operation of the photodetection system shown in FIG. 1;
- FIG. 3 is an explanatory diagram showing an example of a ranging operation of the histogram generation unit shown in FIG. 2;
- FIG. 4 is an explanatory diagram showing an operation state in the self-diagnostic operation of the light receiving unit shown in FIG. 3;
- 4 is a timing waveform diagram showing an example of self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 3 is a timing waveform diagram showing an example of self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 3 is an explanatory diagram showing an example of a self-diagnostic operation of the histogram generator shown in FIG. 2;
- FIG. 4 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 3 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 2;
- FIG. 4 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 3 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 2;
- FIG. 4 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 3 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 3 is another timing waveform diagram showing an example of the self-diagnostic
- FIG. 3 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 2;
- FIG. 4 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 3 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 2;
- FIG. 4 is an explanatory diagram showing another operating state in the self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 4 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 3;
- FIG. 3 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 2;
- FIG. 21 is a circuit diagram showing a configuration example of a TDC section shown in FIG. 20;
- FIG. 21 is an explanatory diagram showing an example of a ranging operation of the histogram generation unit shown in FIG. 20;
- FIG. 21 is an explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 20;
- FIG. 10 is an explanatory diagram showing an operation example of the photodetection system according to another modification of the first embodiment;
- FIG. 10 is an explanatory diagram showing an operating state of a light receiving section according to another modification of the first embodiment;
- FIG. 10 is a timing waveform diagram showing an operation example of the photodetection system according to another modification of the first embodiment;
- FIG. 10 is an explanatory diagram showing an operating state of a light receiving section according to another modification of the first embodiment;
- FIG. 7 is a circuit diagram showing a configuration example of a light receiving section according to another modification of the first embodiment;
- FIG. 11 is an explanatory diagram showing a mounting example of a photodetector according to another modification of the first embodiment;
- FIG. 10 is a block diagram showing a configuration example of a photodetector according to a second embodiment;
- FIG. 31 is a circuit diagram showing a configuration example of a flip-flop unit shown in FIG. 30;
- FIG. 31 is an explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 30;
- FIG. 31 is an explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 30;
- FIG. FIG. 11 is a circuit diagram showing a configuration example of a flip-flop section according to a modification of the second embodiment;
- FIG. 11 is an explanatory diagram showing an example of self-diagnostic operation of a histogram generator according to a modification of the second embodiment;
- FIG. FIG. 11 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator according to the modification of the second embodiment;
- FIG. 11 is a circuit diagram showing a configuration example of a TDC section according to another modification of the second embodiment;
- FIG. 11 is a circuit diagram showing a configuration example of a light receiving section and a flip-flop section according to another modification of the second embodiment;
- FIG. 11 is a circuit diagram showing a configuration example of a light receiving section and a flip-flop section according to another modification of the second embodiment;
- FIG. 11 is a circuit diagram showing a configuration example of a light receiving section and a flip-flop section according to another modification of the second embodiment;
- FIG. 11 is a circuit diagram showing a configuration example of a light receiving section and a flip-flop section according to another modification of the second embodiment;
- FIG. 11 is a circuit diagram showing a configuration example of a light receiving section and a flip-flop section according to another modification of the second embodiment;
- FIG. 11 is a circuit diagram showing a configuration example of a light receiving section and a flip-flop section according to another modification of the second embodiment;
- FIG. 11 is a block diagram showing a configuration example of a photodetector according to a third embodiment
- FIG. 43 is a circuit diagram showing a configuration example of the flip-flop unit shown in FIG. 42
- FIG. 44 is a circuit diagram showing a configuration example of an adder shown in FIG. 43
- FIG. 43 is an explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 42
- FIG. 43 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 42
- FIG. 43 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 42
- FIG. 43 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 42
- FIG. 43 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 42
- FIG. 43 is another explanatory diagram showing
- FIG. 43 is another explanatory diagram showing an example of the self-diagnostic operation of the histogram generator shown in FIG. 42;
- FIG. 11 is a block diagram showing a configuration example of a photodetector according to a fourth embodiment;
- FIG. FIG. 50 is a circuit diagram showing a configuration example of a light receiving unit shown in FIG. 49;
- FIG. 14 is a timing waveform diagram showing an example of a distance measurement operation of the photodetection system according to the fourth embodiment;
- 51 is a timing waveform diagram showing an example of self-diagnostic operation of the light receiving unit shown in FIG. 50;
- FIG. 51 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 50;
- FIG. 50 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 50;
- FIG. 51 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 50;
- FIG. 51 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 50;
- FIG. 51 is another timing waveform diagram showing an example of the self-diagnostic operation of the light receiving unit shown in FIG. 50;
- FIG. 12 is a flow chart showing an example of self-diagnosis operation in the photodetection system according to the fourth embodiment;
- FIG. 1 is a block diagram showing an example of a schematic configuration of a vehicle control system;
- FIG. 4 is an explanatory diagram showing an example of an installation position of an imaging unit
- 1 is a block diagram showing a configuration example of a vehicle according to an application
- FIG. 11 is another block diagram showing a configuration example of a vehicle according to an application
- 7 is a flow chart showing an operation example of a vehicle according to an application example
- FIG. 1 shows a configuration example of a photodetection system (photodetection system 1) according to an embodiment.
- the light detection system 1 is a ToF (Time-of-Flight) sensor, and is configured to emit light and detect reflected light reflected by the object to be measured OBJ.
- the photodetection system 1 includes a light emitter 11 , an optical system 12 , a photodetector 20 and a controller 14 .
- the light emitting unit 11 is configured to emit a light pulse L0 toward the object to be measured OBJ based on an instruction from the control unit 14 .
- the light emitting unit 11 emits light pulses L0 by performing a light emitting operation in which light emission and non-light emission are alternately repeated based on an instruction from the control unit 14 .
- the light emitting unit 11 has a light source that emits infrared light, for example. This light source is configured using, for example, a laser light source or an LED (Light Emitting Diode).
- the optical system 12 includes a lens that forms an image on the light receiving surface of the photodetector 20 .
- a light pulse (reflected light pulse L1) emitted from the light emitting unit 11 and reflected by the object to be measured OBJ is incident on the optical system 12 .
- the photodetector 20 is configured to detect the reflected light pulse L1 based on an instruction from the controller 14 . Then, the photodetector 20 generates a distance image based on the detection result, and outputs image data of the generated distance image as a distance image signal S1. In addition, as will be described later, the photodetector 20 has a function of performing a self-diagnostic operation, and outputs a diagnostic result as a diagnostic result signal S2.
- the control unit 14 is configured to control the operation of the photodetection system 1 by supplying control signals to the light emission unit 11 and the photodetection unit 20 and controlling their operations.
- FIG. 2 shows a configuration example of the photodetector 20.
- the light detection unit 20 includes a pixel array 21, a flip-flop unit 22, a histogram generation unit 23, a distance calculation unit 24, an output unit 25, a diagnosis unit 26, an output unit 27, and a distance measurement control unit 28. have.
- the pixel array 21 has a plurality of light receiving portions P arranged in a matrix.
- the light receiving section P is configured to detect light and generate a pulse signal having pulses corresponding to the detected light. Further, the light receiving section P can generate a pulse signal based on the supplied control signals (control signals ENBIST and XACT, which will be described later) when the photodetection system 1 performs a self-diagnostic operation. .
- FIG. 3 shows a configuration example of the light receiving section P.
- the light receiving portion P has a photodiode PD, transistors MN1, MP1, MP2, MP3, and MN2, an inverter IV1, an AND circuit AND1, and an OR circuit OR1.
- the transistors MN1 and MN2 are N-type MOS (Metal Oxide Semiconductor) transistors, and the transistors MP1 to MP3 are P-type MOS transistors.
- the photodiode PD is a photoelectric conversion element that converts light into charge.
- a negative power supply voltage VNEG is supplied to the anode of the photodiode PD, and the cathode is connected to the drain of the transistor MN1 and the drain of the transistor MP1.
- a single photon avalanche diode (SPAD), for example, can be used as the photodiode PD.
- a control signal ENBIST is supplied to the gate of the transistor MN1, the drain is connected to the cathode of the photodiode PD and the drain of the transistor MP1, and the source is grounded.
- the transistor MP1 has a gate supplied with a control signal ENBIST, a drain connected to the cathode of the photodiode PD and a drain of the transistor MN1, and a source and a back gate connected to the node N1.
- the transistor MN1 When the control signal ENBIST is at a high level, the transistor MN1 is turned on and the transistor MP1 is turned off. Thus, in the light receiving portion P, the cathode of the photodiode PD and the node N1 are separated from each other, and the cathode of the photodiode PD is grounded through the transistor MN1.
- the bias voltage Vbias is supplied to the gate of the transistor MP2, the power supply voltage VDDH is supplied to the source, and the drain is connected to the source of the transistor MP3.
- the transistor MP2 operates as a constant current source (constant current source CUR to be described later) that flows a current from the power supply node of the power supply voltage VDDH toward the node N1.
- a control signal XACT is supplied to the gate of the transistor MP3, the source is connected to the drain of the transistor MP2, and the drain is connected to the node N1.
- the transistor MN2 has a gate supplied with a control signal XACT, a drain connected to the node N1, and a source grounded. With this configuration, when control signal XACT is low, transistor MP3 is turned on and transistor MN2 is turned off.
- the drain of the transistor MP2 operating as a constant current source is connected to the node N1 via the transistor MP3.
- the control signal XACT is at high level
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- the drain of the transistor MP2 operating as a constant current source and the node N1 are separated from each other, and the node N1 is grounded through the transistor MN2.
- the inverter IV1 is configured to generate the pulse signal PLS1 by generating an inverted voltage of the voltage at the node N1.
- the power supply voltage VDDH is supplied to the inverter IV1.
- the logical product circuit AND1 is configured to generate the pulse signal PLS2 by calculating the logical product of the pulse signal PLS1 and the control signal SEL.
- a power supply voltage VDDL lower than the power supply voltage VDDH is supplied to the AND circuit AND1.
- the logical sum circuit OR1 is configured to obtain the logical sum of the pulse signal PLS2 and the pulse signal PLS3 (pulse signal PLS3A) supplied from the other light receiving section P to generate the pulse signal PLS3 (pulse signal PLS3B). be.
- a power supply voltage VDDL is supplied to the OR circuit OR1.
- FIG. 4 shows a configuration example of the pixel array 21.
- the light receiving portion P is simplified for convenience of explanation. Specifically, the illustration of the photodiode PD and the transistors MN1, MP1, MP2, and MP3 is omitted. Also, the transistor MN2 is illustrated using a switch symbol.
- the plurality of light-receiving portions P arranged side by side in the horizontal direction in FIG. 4 are connected at a rate of one out of four.
- the output terminal of the logical sum circuit OR1 of a certain light receiving portion P is connected to the input terminal of the logical sum circuit OR1 of the four right light receiving portions P (light receiving portion P5) of the light receiving portion P1.
- the output terminal of the logical sum circuit OR1 of the light receiving portion P (light receiving portion P2) on the right side of the light receiving portion P1 is connected to the input terminal of the logical sum circuit OR1 of the light receiving portion P (light receiving portion P6) on the right side of the light receiving portion P2.
- the output terminal of the logical sum circuit OR1 of the light receiving portion P (light receiving portion P3) on the right side of the light receiving portion P2 is connected to the input terminal of the logical sum circuit OR1 of the light receiving portion P (light receiving portion P7) on the right side of the light receiving portion P3.
- the output terminal of the logical sum circuit OR1 of the light receiving portion P (light receiving portion P4) on the right side of the light receiving portion P3 is connected to the input terminal of the logical sum circuit OR1 of the light receiving portion P (light receiving portion P8) on the right side of the light receiving portion P4. Connected.
- the flip-flop unit 22 (FIG. 2) is configured to sample a plurality of pulse signals PLS supplied from the pixel array 21 based on the clock signal CLK.
- FIG. 5 shows a configuration example of the flip-flop section 22.
- the flip-flop section 22 has a plurality of flip-flops 29 .
- a plurality of flip-flops 29 are provided corresponding to a plurality of pulse signals PLS supplied from the pixel array 21, respectively.
- Each of the plurality of flip-flops 29 is a D-type flip-flop, and is configured to generate pulse signal PLSA by sampling corresponding pulse signal PLS based on clock signal CLK.
- the histogram generation unit 23 (FIG. 2) is configured to generate a histogram indicating the generation timing of the pulse signal PLS based on each of the plurality of pulse signals PLSA supplied from the flip-flop unit 22. Specifically, in the ranging operation, the light detection unit 20 generates the pulse signal PLS by detecting the reflected light pulse L1, so the histogram generation unit 23 generates a plurality of A histogram indicating the timing of light reception in each of the light receiving portions P is generated. In the self-diagnostic operation, the photodetector 20 generates the pulse signal PLS based on the control signal XACT. , generates a histogram indicating the pulse generation timing of the pulse signal PLS based on the control signal XACT.
- the distance calculation unit 24 generates a distance image by calculating the distance value to the object to be measured OBJ based on the light reception timing data of each of the plurality of light receiving units P supplied from the histogram generation unit 23. configured as
- the output unit 25 is configured to output the image data of the distance image generated by the distance calculation unit 24 as the distance image signal S1.
- the diagnosis unit 26 is configured to perform diagnosis processing of the plurality of light receiving units P in the pixel array 21 based on the data of the pulse generation timing of the pulse signal PLS based on the control signal XACT, which is supplied from the histogram generation unit 23. be done.
- the output unit 27 is configured to output the result of diagnostic processing by the diagnostic unit 26 as a diagnostic result signal S2.
- the diagnosis result signal S2 includes a flag signal indicating whether any one of the plurality of light receiving portions P has a defect.
- the diagnosis result signal S2 includes a signal indicating the content of the defect when any one of the plurality of light receiving portions P has a defect.
- the output unit 27 outputs a diagnostic result signal S2 containing such information.
- the ranging control unit 28 controls the operations of the pixel array 21, the flip-flop unit 22, the histogram generation unit 23, the distance calculation unit 24, and the diagnosis unit 26 based on instructions from the control unit 14 (FIG. 1). to control the operation of the photodetector 20 .
- the photodiode PD corresponds to a specific example of the "light receiving element" in the present disclosure.
- the node N1 corresponds to a specific example of "first node” in the present disclosure.
- the transistor MP1 corresponds to a specific example of "first switch” in the present disclosure.
- the transistor MN2 corresponds to a specific example of "second switch” in the present disclosure.
- the pulse signal PLS1 corresponds to a specific example of "pulse signal” in the present disclosure.
- the inverter IV1 corresponds to a specific example of the "signal generator” in the present disclosure.
- the ranging control unit 28 corresponds to a specific example of the "control unit” in the present disclosure.
- the flip-flop unit 22 and the histogram generation unit 23 correspond to a specific example of the "detection unit” in the present disclosure.
- the output unit 27 corresponds to a specific example of "output unit” in the present disclosure.
- the diagnosis unit 26 corresponds to a specific example of the "diagnosis unit” in the present disclosure.
- the light emitting unit 11 emits a light pulse L0 toward the object to be measured OBJ.
- the optical system 12 forms an image on the light receiving surface of the photodetector 20 .
- the light detection unit 20 detects a light pulse (reflected light pulse L1) reflected by the object to be measured OBJ.
- the control unit 14 supplies control signals to the light emitting unit 11 and the light detecting unit 20 to control the operation of these units, thereby controlling the range finding operation of the light detecting system 1 .
- the pixel array 21 In the photodetection section 20, the pixel array 21 generates a plurality of pulse signals PLS according to the light reception results of the plurality of light receiving sections P.
- the flip-flop unit 22 generates a plurality of pulse signals PLSA by sampling a plurality of pulse signals PLS supplied from the pixel array 21 based on the clock signal CLK.
- the histogram generating section 23 generates a histogram indicating light reception timings of the plurality of light receiving sections P based on each of the plurality of pulse signals PLSA supplied from the flip-flop section 22 .
- the distance calculation unit 24 generates a distance image by calculating the distance value to the object to be measured OBJ based on the light reception timing data of each of the plurality of light receiving units P supplied from the histogram generation unit 23. .
- the output unit 25 outputs the image data of this distance image as the distance image signal S1.
- the pixel array 21 In the self-diagnosis operation, the pixel array 21 generates multiple pulse signals PLS based on the control signal XACT.
- the flip-flop unit 22 generates a plurality of pulse signals PLSA by sampling a plurality of pulse signals PLS supplied from the pixel array 21 based on the clock signal CLK. Based on each of the plurality of pulse signals PLSA supplied from the flip-flop unit 22, the histogram generation unit 23 generates a histogram indicating the pulse generation timing of the pulse signal PLS based on the control signal XACT.
- the diagnosis unit 26 performs diagnosis processing of the plurality of light receiving units P in the pixel array 21 based on the data of the pulse generation timing of the pulse signal PLS based on the control signal XACT, which is supplied from the histogram generation unit 23 .
- the output unit 27 outputs the result of diagnostic processing by the diagnostic unit 26 as a diagnostic result signal S2.
- the distance measurement control unit 28 controls the operations of the pixel array 21, the flip-flop unit 22, the histogram generation unit 23, the distance calculation unit 24, and the diagnosis unit 26, thereby performing light detection. It controls the operation of unit 20 .
- FIG. 6 shows an operation example of the photodetection system 1.
- the ranging period T1 and the blanking period T2 are provided alternately.
- the photodetection system 1 performs ranging operation. Thereby, the photodetection system 1 repeats the ranging operation.
- the photodetection system 1 performs a self-diagnostic operation of the plurality of light receiving portions P in the pixel array 21.
- the ranging period T1 corresponds to a specific example of the "first period” in the present disclosure.
- the blanking period T2 corresponds to a specific example of the "second period" in the present disclosure.
- the photodetector 20 sequentially selects a plurality of light receiving sections P to be detected from among the plurality of light receiving sections P in the pixel array 21 in one ranging period T1. , the distance value is calculated based on the light receiving timing at the light receiving portion P of .
- FIG. 7 shows an example of the operation of selecting a plurality of light receiving sections P to be detected in the light detecting section 20.
- shaded portions schematically indicate the positions of the plurality of selected light receiving portions P in the pixel array 21 .
- a plurality of light receiving portions P are sequentially selected from the left end of the pixel array 21 in one ranging period T1.
- the ranging control section 28 selects a plurality of light receiving sections P to be detected using the control signal SEL.
- the distance measurement control section 28 sets the control signal SEL supplied to the light receiving sections P of four columns including the light receiving sections P1, P2, P3, and P4 to a high level, and supplies it to the light receiving sections P of the other columns.
- the control signal SEL is made low level. As a result, four rows of light receiving portions P including light receiving portions P1, P2, P3, and P4 are selected as detection targets.
- the logical product circuit AND1 obtains the logical product of the pulse signal PLS1 generated by the inverter IV1 and the control signal SEL of high level, thereby obtaining the pulse signal A pulse signal PLS2 corresponding to PLS1 is generated.
- the AND circuit AND1 maintains the pulse signal PLS2 at low level based on the low level control signal SEL.
- the pulse signal PLS2 generated by the selected light receiving section P is supplied to the flip-flop section 22 as the pulse signal PLS.
- FIG. 8 shows the selected light receiving portion P and the flip-flop 29 that operates based on the pulse signal PLS1 generated by the light receiving portion P.
- FIG. 8 the circuit is simplified for convenience of explanation. Specifically, in FIG. 8, the transistor MP2 is shown using a constant current source CUR. The OR circuit OR1 of P is shown using a buffer BUF. Also, the transistors MN1, MN2, MP1, and MP3 are illustrated using switch symbols indicating the on/off states of the transistors.
- FIG. 9 shows an operation example of the light-receiving unit P and the flip-flop 29 in the distance measuring operation.
- A shows the waveform of the control signal ENBIST
- B shows the waveform of the control signal XACT
- C shows the waveform of light emitted from the light emitting section 11
- D shows the waveform of light incident on the photodetector section 20
- E shows the waveform of the voltage VN1 at the node N1
- (F) indicates the waveform of the pulse signal PLS1 (pulse signal PLS)
- (G) indicates the waveform of the clock signal CLK
- H indicates the waveform of the pulse signal PLSA.
- the ranging control section 28 sets the control signals ENBIST and XACT to low level ((A) and (B) in FIG. 9).
- the transistors MP1 and MP3 are turned on, and the transistors MN1 and MN2 are turned off, as shown in FIG.
- the cathode of photodiode PD is connected to node N1
- constant current source CUR is connected to node N1.
- the light emitting unit 11 emits a light pulse L0 based on an instruction from the control unit 14 ((C) in FIG. 9).
- This light pulse L0 is reflected by the object to be measured OBJ.
- the light pulse (reflected light pulse L1) reflected by the object to be measured OBJ is incident on the light receiving section P of the light detecting section 20 at timing t12.
- the time from timing t11 when the light pulse L0 is emitted to timing t12 when the reflected light pulse L1 is incident is the flight time Ttof of the light pulse detected by the light receiving portion P.
- the inverter IV1 changes the pulse signal PLS1 from low level to high level ((F) in FIG. 9).
- the flip-flop 29 samples the pulse signal PLS corresponding to the pulse signal PLS1 based on the rising edge of the clock signal CLK, thereby changing the pulse signal PLSA from low level to high level ( Fig. 9 (G), (H)).
- the pulse signal PLSA including the pulse starting at the timing corresponding to the light receiving timing of the reflected light pulse L1 is generated.
- the pulse width of this pulse is the time length corresponding to four clock pulses in the clock signal CLK, as shown in FIG. 9(H).
- the photodetection system 1 repeats the operation shown in FIG. 9 by repeatedly emitting the light pulse L0 multiple times in one ranging period T1.
- the photodetection system 1 performs such an operation for each of the selected light receiving portions P. As shown in FIG. 9
- FIG. 10 shows an operation example of the histogram generator 23 in the distance measuring operation, and (A) shows a histogram for a certain light receiving part P obtained when the light pulse L0 is emitted once. and (B) shows a histogram for the light receiving portion P obtained when the light pulse L0 is emitted multiple times.
- the light detection system 1 By emitting the light pulse L0 once, the light detection system 1 generates a pulse signal PLSA including a pulse starting at a timing corresponding to the light receiving timing of the reflected light pulse L1, as shown in FIG. 9(H). .
- the pulse width of this pulse is the time length corresponding to four clock pulses in the clock signal CLK in this example.
- the histogram generator 23 In response to this, the histogram generator 23 generates the histogram shown in FIG. 10(A).
- the width W of the bins in the histogram corresponds to the pulse period of the clock signal CLK.
- the frequency is "1" because the light pulse L0 is emitted once.
- the left end of this histogram corresponds to the light reception timing of the reflected light pulse L1, and the width of the distribution of the histogram corresponds to the pulse width of the pulse in the pulse signal PLS.
- the photodetection system 1 repeatedly emits the light pulse L0 multiple times in one ranging period T1. As a result, data as shown in FIG. 10A are accumulated for a plurality of times. Thereby, the histogram generator 23 generates the histogram shown in FIG. 10(B). For example, the light detection system 1 can calculate the light reception timing based on the position of the left end of this histogram, and can calculate the flight time Ttof based on this light reception timing.
- the histogram generation unit 23 generates the histogram shown in FIG. 10B for each of the plurality of light receiving units P, and calculates the light reception timing for each of the plurality of light receiving units P.
- the distance calculation unit 24 generates a distance image by calculating the distance value to the object to be measured OBJ based on the light reception timing data of each of the plurality of light receiving units P supplied from the histogram generation unit 23. . Then, the output unit 25 outputs the image data of this distance image as the distance image signal S1.
- the self-diagnostic operation As in the case of the distance measurement operation (FIG. 7), the photodetector 20 detects a plurality of detection targets among the plurality of light receiving portions P in the pixel array 21 in one blanking period T2. are sequentially selected. Then, the photodetector 20 performs self-diagnosis by changing the control signal XACT in the plurality of selected light receivers P.
- FIG. 7 the photodetector 20 detects a plurality of detection targets among the plurality of light receiving portions P in the pixel array 21 in one blanking period T2. are sequentially selected. Then, the photodetector 20 performs self-diagnosis by changing the control signal XACT in the plurality of selected light receivers P.
- FIG. 11 shows the selected light receiving portion P and the flip-flop 29 that operates based on the pulse signal PLS1 generated by the light receiving portion P.
- FIG. 11 shows the selected light receiving portion P and the flip-flop 29 that operates based on the pulse signal PLS1 generated by the light receiving portion P.
- FIG. 11 as in FIG. 8, the circuit is simplified for convenience of explanation.
- FIG. 12 shows an operation example of the light receiving section P and the flip-flop 29 in the self-diagnostic operation.
- A shows the waveform of the control signal ENBIST
- B shows the waveform of the control signal XACT
- C shows the waveform of voltage VN1 at node N1
- D shows the waveform of pulse signal PLS1 (pulse signal PLS)
- E shows the waveform of clock signal CLK
- F shows the waveform of pulse signal PLSA. shows the waveform.
- the ranging control section 28 sets the control signal ENBIST to high level (Fig. 12(A)).
- the transistor MP1 is turned off and the transistor MN1 is turned on.
- the cathode of photodiode PD is disconnected from node N1 and grounded.
- the ranging control unit 28 sets the control signal XACT to high level in a period before timing t21 ((B) in FIG. 12).
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- constant current source CUR is disconnected from node N1, and node N1 is grounded.
- the ranging control section 28 changes the control signal XACT from high level to low level (FIG. 12(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- the ranging control section 28 changes the control signal XACT from low level to high level ((B) in FIG. 12).
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- the node N1 is disconnected from the constant current source CUR and grounded, so that the voltage VN1 at the node N1 changes from high level to low level (FIG. 12(C)). Since the voltage VN1 at the node N1 becomes lower than the logic threshold TH of the inverter IV1, the inverter IV1 changes the pulse signal PLS1 from low level to high level (FIG. 12(D)).
- the flip-flop 29 samples the pulse signal PLS according to the pulse signal PLS1 based on the rising edge of the clock signal CLK, thereby changing the pulse signal PLSA from low level to high level ( Fig. 12 (E), (F)).
- the ranging control section 28 changes the control signal XACT from high level to low level (FIG. 12(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- FIG. 13 shows an operation example of the histogram generator 23 in self-diagnostic operation.
- the control signal XACT by setting the control signal XACT to a high level at timings t24 to t26, the photodetection system 1 starts at a timing corresponding to the rising timing of this control signal XACT, as shown in FIG. 12(F).
- a pulse signal PLSA containing pulses is generated.
- the pulse width of this pulse is the time length corresponding to four clock pulses in the clock signal CLK in this example.
- the histogram generator 23 generates the histogram shown in FIG. In this example, the frequency is "1" because the control signal XACT is set to high level once.
- the left end of this histogram corresponds to the generation timing of pulses in the pulse signal PLS, and the width of the histogram distribution corresponds to the pulse width of the pulses in the pulse signal PLS.
- the diagnosis unit 26 diagnoses the generation timing and pulse width of the pulse in the pulse signal PLS based on the data in each of the plurality of light receiving units P supplied from the histogram generation unit 23, thereby diagnosing the plurality of pixels in the pixel array 21. Diagnosis processing of the light receiving portion P is performed.
- the constant current source CUR may flow a large amount of current (case C1), or the constant current source CUR may flow a small amount of current (case C2).
- the voltage VN1 at the node N1 may be fixed at a high level (case C3), or the voltage VN1 at the node N1 may be fixed at a low level (case C4).
- the cathode of the photodiode PD may be stuck at a low level, or the anode and cathode of the photodiode PD may be shorted together (Case C5).
- the diagnosis section 26 can diagnose these various defects in the light receiving section P. FIG.
- FIG. 14A shows an operation example of the light receiving section P in case C1, (A) shows the waveform of the control signal ENBIST, (B) shows the waveform of the control signal XACT, and (C) shows the waveform of the node N1. (D) shows the waveform of the pulse signal PLS1.
- the broken line shows the waveform when there is no problem
- the solid line shows the waveform when there is a problem.
- FIGS. 14A(A) to (D) correspond to FIGS. 12(A) to (D), respectively.
- the waveforms of the clock signal CLK and the pulse signal PLSA are omitted in FIG. 14A, as in FIGS. is sampled to generate the pulse signal PLSA.
- the ranging control section 28 changes the control signal XACT from high level to low level (FIG. 14A (B)).
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby increasing the voltage VN1 at the node N1 (FIG. 14A(C)).
- the current supplied by the constant current source CUR is large, so the voltage VN1 rises in a shorter period of time than when there is no problem.
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 14A(D)). Preparations are completed when the voltage VN1 reaches a high level.
- the ranging control section 28 changes the control signal XACT from low level to high level (FIG. 14A(B)).
- the node N1 is disconnected from the constant current source CUR and grounded, so that the voltage VN1 at the node N1 changes from high level to low level (FIG. 14A(C)). Since the voltage VN1 at the node N1 becomes lower than the logic threshold TH of the inverter IV1, the inverter IV1 changes the pulse signal PLS1 from low level to high level (FIG. 14A(D)).
- the ranging control section 28 changes the control signal XACT from high level to low level (FIG. 14A(B)).
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby increasing the voltage VN1 at the node N1 (FIG. 14A(C)).
- the current supplied by the constant current source CUR is large, so the voltage VN1 rises in a shorter period of time than when there is no problem.
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 14A(D)).
- the constant current source CUR flows a large amount of current, so the voltage VN1 rises in a shorter period of time after timing t34 than when there is no problem.
- the pulse end timing of the pulse signal PLS1 is advanced, the pulse width of the pulse signal PLS1 is shortened, and accordingly the pulse width of the pulse signal PLSA generated by the flip-flop 29 is also shortened.
- FIG. 14B shows an example of operation of the histogram generation unit 23 in case C1, where (A) shows the case where there is no problem, and (B) shows the case where there is a problem related to case C1.
- the pulse width of pulse signal PLS1 is shortened.
- the right end of the histogram moves to the left as compared to the case where there is no problem (FIG. 14B(A)), so the width of the distribution of the histogram narrows.
- the diagnosis unit 26 supplies the light-receiving unit P with a large amount of current from the constant current source CUR. Diagnose that there is a problem.
- FIG. 15A shows an operation example of the light receiving unit P in case C2.
- the ranging control unit 28 changes the control signal XACT from high level to low level (FIG. 15A(B)).
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby increasing the voltage VN1 at the node N1 (FIG. 15A(C)).
- the constant current source CUR supplies a small amount of current, the voltage VN1 rises in a longer period of time than when there is no problem.
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 15A(D)). Preparations are completed when the voltage VN1 reaches a high level.
- the ranging control section 28 changes the control signal XACT from low level to high level (FIG. 15A (B)).
- the node N1 is disconnected from the constant current source CUR and grounded, so that the voltage VN1 at the node N1 changes from high level to low level (FIG. 15A(C)). Since the voltage VN1 at the node N1 becomes lower than the logic threshold TH of the inverter IV1, the inverter IV1 changes the pulse signal PLS1 from low level to high level (FIG. 15A(D)).
- the ranging control section 28 changes the control signal XACT from high level to low level (FIG. 15A(B)).
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby increasing the voltage VN1 at the node N1 (FIG. 15A(C)).
- the constant current source CUR supplies a small amount of current, the voltage VN1 rises in a longer period of time than when there is no problem.
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 15A(D)).
- FIG. 15B shows an operation example of the histogram generation unit 23 in case C2, where (A) shows the case where there is no problem, and (B) shows the case where there is a problem related to case C2.
- the pulse width of pulse signal PLS1 is longer, so the pulse width of pulse signal PLSA generated by flip-flop 29 is also longer.
- the right end of the histogram moves to the right compared to the case where there is no problem (FIG. 15B(A)), so the width of the distribution of the histogram widens.
- the diagnosis unit 26 supplies the light-receiving unit P with less current from the constant current source CUR. Diagnose that there is a problem.
- FIG. 16A shows an operation example of the light receiving unit P in case C3.
- the ranging control unit 28 changes the control signal XACT from high level to low level (FIG. 16A(B)). Further, the ranging control unit 28 changes the control signal XACT from low level to high level at timing t52, and changes the control signal XACT from high level to low level at timing t53.
- voltage VN1 at node N1 is stuck at a high level (FIG. 16A(C)). Therefore, the inverter IV1 maintains the pulse signal PLS1 at low level (FIG. 16A(D)).
- pulse signal PLS1 is maintained at a low level, and accordingly pulse signal PLSA generated by flip-flop 29 is also low. maintained at the level.
- FIG. 16B shows an operation example of the histogram generation unit 23 in case C3, where (A) shows the case where there is no problem, and (B) shows the case where there is a problem related to case C3.
- the pulse signal PLS1 is maintained at a low level, so the pulse signal PLSA generated by the flip-flop 29 is also maintained at a low level.
- the frequency in all bins is "0" in the histogram.
- the diagnostic unit 26 diagnoses that the light-receiving unit P has a problem that the voltage VN1 at the node N1 is stuck at a high level. .
- FIG. 17A shows an operation example of the light receiving unit P in case C4.
- the ranging control unit 28 changes the control signal XACT from high level to low level (FIG. 17A(B)). Further, the ranging control unit 28 changes the control signal XACT from low level to high level at timing t62, and changes the control signal XACT from high level to low level at timing t63.
- voltage VN1 at node N1 is fixed at a low level (FIG. 17A(C)). Therefore, inverter IV1 maintains pulse signal PLS1 at a high level (FIG. 17A(D)).
- pulse signal PLS1 is maintained at a high level and, accordingly, pulse signal PLSA generated by flip-flop 29 is also at a high level. maintained at the level.
- FIG. 17B shows an operation example of the histogram generation unit 23 in case C4, where (A) shows the case where there is no problem, and (B) shows the case where there is a problem related to case C4.
- the pulse signal PLS1 is maintained at a high level, so the pulse signal PLSA generated by the flip-flop 29 is also maintained at a high level.
- the frequency in all bins is "1" in the histogram.
- the diagnosis unit 26 diagnoses that the light receiving unit P has a problem that the voltage VN1 at the node N1 is stuck at a low level. .
- FIG. 18 shows the selected light receiving portion P and the flip-flop 29 that operates based on the pulse signal PLS1 generated by the light receiving portion P.
- FIG. 18 as in FIG. 8, the circuit is simplified for convenience of explanation.
- FIG. 19A shows an operation example of the light receiving section P in case C5, (A) shows the waveform of the control signal ENBIST, (B) shows the waveform of the control signal XACT, and (C) shows the waveform of the node N1. (D) shows the waveform of the pulse signal PLS1 (pulse signal PLS).
- the ranging control section 28 sets the control signal ENBIST to low level (FIG. 19A (A)).
- the transistor MP1 is turned on and the transistor MN1 is turned off.
- the cathode of photodiode PD is disconnected from the ground node and connected to node N1.
- the distance measurement control section 28 sets the power supply voltage VNEG applied to the anode of the photodiode PD to "0V".
- the power supply voltage VNEG is set to "0 V", but it is not limited to this, and a voltage that does not operate the photodiode PD (single photon avalanche diode) can be applied.
- the power supply voltage VNEG may be set to "-10V" in this self-diagnostic operation.
- the photodiode PD is turned off, and the anode and cathode of the photodiode PD are electrically insulated. That is, while the transistor MP1 is turned off in the example of FIG.
- the transistor MP1 is turned on and the photodiode PD is turned off in the example of FIG.
- self-diagnosis relating to the cathode of the photodiode PD can be performed as described below. Even in this way, the same operation as the self-diagnostic operation (FIGS. 14A, 14B, 15A, 15B, 16A, 16B, 17A, 17B) of cases C1 to C4 described above can be performed.
- the ranging control section 28 changes the control signal XACT from high level to low level (FIG. 19A (B)). Further, the ranging control unit 28 changes the control signal XACT from low level to high level at timing t72, and changes the control signal XACT from high level to low level at timing t73. If there is no problem, voltage VN1 at node N1 changes according to control signal XACT, and pulse signal PLS1 changes according to voltage VN1, as in the case of FIG. On the other hand, in case C5, the cathode of photodiode PD is stuck at a low level, or the anode and cathode of photodiode PD are shorted together. Therefore, voltage VN1 maintains a low level (FIG. 19A(C)). Therefore, the inverter IV1 maintains the pulse signal PLS1 at a high level (FIG. 19A(D)).
- FIG. 19B shows an operation example of the histogram generation unit 23 in case C5, where (A) shows the case where there is no problem, and (B) shows the case where there is a problem related to case C5.
- the pulse signal PLS1 is maintained at a high level, so the pulse signal PLSA generated by the flip-flop 29 is also maintained at a high level.
- the frequency in all bins is "1" in the histogram.
- the diagnostic unit 26 performs diagnostic processing for malfunctions in the light receiving unit P as shown in cases C1 to C5. Then, the output unit 27 outputs the result of the diagnosis processing of the diagnosis unit 26 as the diagnosis result signal S2.
- the photodiode PD the first switch (transistor MP1) that connects the photodiode PD and the node N1 when turned on, and the node N1 when turned on.
- a light receiving portion P having a second switch (transistor MN2) that applies a predetermined voltage (ground voltage in this example) and a signal generating portion (inverter IV1) that generates a pulse signal PLS1 based on the voltage VN1 at the node N1. was set up.
- a detection section flip-flop section 22 and histogram generation section 23 is provided to detect the timing at which the pulse signal PLS changes based on the pulse signal PLS1.
- An output section 27 is provided for outputting a diagnosis result signal S2 corresponding to the detection result of the detection section when the second switch (transistor MN2) is turned on.
- the distance measurement operation is performed during the distance measurement period T1
- the self-diagnostic operation is performed during the blanking period T2.
- a self-diagnosis of the part P can be performed.
- a predetermined voltage is applied to the photodiode, the first switch that connects the photodiode and the node N1 when turned on, and the node N1 when turned on.
- a light receiving section having a second switch and a signal generating section for generating a pulse signal based on the voltage of the node N1 is provided.
- a detection unit is provided for detecting the timing at which the pulse signal changes based on the pulse signal.
- An output section is provided for outputting a diagnosis result signal corresponding to the detection result of the detection section when the second switch is turned on. This enables self-diagnosis.
- the flip-flop unit 22 samples the pulse signal PLS, and the histogram generation unit 23 generates a histogram based on the sampling result, but the present invention is not limited to this.
- the photodetection system 1A according to this modification will be described in detail below.
- the photodetection system 1A includes a photodetection section 20A, like the photodetection system 1 (FIG. 1) according to the above embodiment.
- FIG. 20 shows a configuration example of the photodetector 20A.
- the photodetector 20A has a TDC (Time to Digital Converter) section 22A, a histogram generator 23A, and a diagnostic section 26A.
- TDC Time to Digital Converter
- the TDC unit 22A is configured to generate a plurality of timing codes TCODE by detecting rising timings of a plurality of pulse signals PLS supplied from the pixel array 21.
- FIG. 21 shows a configuration example of the TDC section 22A.
- the TDC section 22A has a plurality of TDCs 29A.
- a plurality of TDCs 29A are provided corresponding to a plurality of pulse signals PLS supplied from the pixel array 21, respectively.
- Each of the plurality of TDCs 29A is configured to perform a count operation based on the clock signal CLK and latch the count value based on the rising edge of the pulse signal PLS to generate the timing code TCODE.
- the TDC unit 22A supplies the timing code TCODE generated by the plurality of TDCs 29A to the histogram generation unit 23A.
- the histogram generation unit 23A is configured to generate a histogram indicating the pulse generation timing of the pulse signal PLS based on each of the plurality of timing codes TCODE supplied from the TDC unit 22A. Specifically, in the ranging operation, the light detection unit 20 generates the pulse signal PLS by detecting the reflected light pulse L1, so the histogram generation unit 23 generates a plurality of A histogram indicating the timing of light reception in each of the light receiving portions P is generated. In the self-diagnostic operation, the photodetector 20 generates the pulse signal PLS based on the control signal XACT. , generates a histogram indicating the pulse generation timing of the pulse signal PLS based on the control signal XACT.
- the diagnosis unit 26A is configured to perform diagnosis processing of the plurality of light receiving units P in the pixel array 21 based on the data of the pulse generation timing of the pulse signal PLS based on the control signal XACT, which is supplied from the histogram generation unit 23A. be done.
- the TDC unit 22A and the histogram generation unit 23A correspond to a specific example of the "detection unit" in the present disclosure.
- FIG. 22 shows an operation example of the histogram generator 23A in the distance measurement operation, and (A) shows a histogram for a certain light receiving part P obtained when the light pulse L0 is emitted once. and (B) shows a histogram for the light receiving portion P obtained when the light pulse L0 is emitted multiple times.
- the light detection system 1A generates a timing code TCODE corresponding to the light reception timing of the reflected light pulse L1 by emitting the light pulse L0 once.
- the histogram generator 23A generates the histogram shown in FIG. 22(A). In this example, the frequency is "1" because the light pulse L0 is emitted once.
- the photodetection system 1A repeatedly emits the light pulse L0 multiple times in one ranging period T1. As a result, data as shown in FIG. 22A are accumulated for a plurality of times. Thereby, the histogram generator 23A generates the histogram shown in FIG. 22(B). The light detection system 1 can calculate the light reception timing based on the barycentric position of this histogram, for example.
- the histogram generation unit 23A generates the histogram shown in FIG.
- the diagnosis unit 26A can diagnose failures such as cases C3 to C5 described above.
- FIG. 23 shows an operation example of the histogram generation unit 23A, where (A) shows the case where there is no problem, and (B) shows the case where there is a problem related to case C3. If there is no problem, as shown in FIG. 23A, the timing code TCODE corresponding to the rise timing of the pulse signal PLS has a frequency of "1".
- the light receiving section P raises the pulse signal PLS1 to a high level as shown in FIG. 19A. level (Fig. 19A(D)).
- the TDC 29A does not generate the timing code TCODE.
- the histogram has a frequency of "0" in all bins. The diagnosis unit 26A thus diagnoses that the light receiving unit P is malfunctioning when the frequency in all bins is "0".
- a plurality of light receiving portions P to be detected are sequentially selected from the plurality of light receiving portions P in the pixel array 21 in one blanking period T2, but the present invention is not limited to this. .
- the plurality of light receiving portions to be detected P may be selected sequentially.
- the plurality of light receiving sections P to be detected are sequentially selected in the first blanking period T2 of the two blanking periods T2, among the plurality of light receiving sections P in the left half of the pixel array 21, the plurality of light receiving sections P to be detected are sequentially selected.
- the next blanking period T2 among the plurality of light receiving portions P in the right half of the pixel array 21, a plurality of light receiving portions P to be detected are sequentially selected.
- the time length of the blanking period T2 can be shortened, so that the frequency of range finding operations per unit time can be increased, for example.
- the transistor MN2 is kept off as shown in FIG. 8 in the distance measuring operation, but the present invention is not limited to this. Alternatively, for example, as shown in FIG. 25, this transistor MN2 may be turned on and off. As described below, for example, in the range finding operation, the transistor MN2 is turned on during the period in which the light emitting unit 11 emits the light pulse L0, thereby preventing erroneous detection by the light detecting unit 20. be able to.
- FIG. 26 shows an operation example of the photodetection system 1 before and after the transition from the blanking period T2 to the ranging period T1, where (A) shows the waveform of the control signal ENBIST, and (B) shows the waveform. 3 shows the waveform of the control signal XACT, (C) shows the waveform of the light emitted from the light emitting section 11, (D) shows the waveform of the light incident on the photodetector section 20, and (E) shows the voltage at the node N1. The waveform of VN1 is shown, and (F) shows the waveform of pulse signal PLS1.
- the photodetection system 1 performs self-diagnosis.
- the ranging control unit 28 sets the control signal XACT to a high level during the period from timing t81 to t82, and the voltage VN1 at the node N1 and the pulse signal PLS1 change according to this control signal XACT (FIG. 26 ( B), (E), (F)).
- the ranging control section 28 changes the control signal ENBIST from high level to low level ((A) in FIG. 26).
- transistor MP1 is turned on, transistor MN1 is turned off, and the cathode of photodiode PD is disconnected from the ground node and connected to node N1.
- the ranging control section 28 changes the control signal XACT from low level to high level (FIG. 26(B)).
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- the node N1 is disconnected from the constant current source CUR and grounded. Since the voltage VN1 changes from the high level to the low level (FIG. 26(E)), the inverter IV1 changes the pulse signal PLS1 from the low level to the high level (FIG. 26(F)).
- the blanking period T2 ends and the ranging period T1 starts.
- the light emitting section 11 emits the light pulse L0 based on the instruction from the control section 14 (FIG. 26(C)).
- the control signal XACT is at a high level (FIG. 26(B)), so the transistor MN2 is on. Therefore, voltage VN1 at node N1 is maintained at a low level.
- the ranging control section 28 changes the control signal XACT from high level to low level (FIG. 26(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby increasing the voltage VN1 at the node N1 (FIG. 26(E)).
- the inverter IV1 changes the pulse signal PLS1 from high level to low level ((F) in FIG. 26).
- the transistor MN2 is turned on during the period in which the light emitting section 11 emits the light pulse L0.
- the light detection unit 20 detects the light. Based on this, the pulse of the pulse signal PLS1 is not generated. As a result, the photodetector 20 can prevent erroneous detection.
- one transistor MN2 is used, but it is not limited to this.
- a transistor MN3 may be provided.
- the light-receiving portions P are connected in a daisy chain, but the present invention is not limited to this.
- a plurality of flip-flops 29 corresponding to the plurality of light receiving portions P in the pixel array 21 may be provided, and the light receiving portions P and the flip-flops 29 may be connected one-to-one.
- a photodetection system 1D according to this modification includes a photodetector 20D, like the photodetection system 1 (FIG. 1) according to the above-described embodiment.
- the photodetection section 20D has a pixel array 21D and a flip-flop section 22D, similarly to the photodetection section 20 (FIG.
- the pixel array 21D has a plurality of light receiving portions P arranged in a matrix.
- the flip-flop section 22D has a plurality of flip-flops 29 corresponding to the plurality of light receiving sections P. As shown in FIG.
- FIG. 28 shows a configuration example of the light receiving section P and the flip-flop 29 according to this modified example.
- the light receiving portion P has a photodiode PD, transistors MN1, MP1, MP2, MP3, and MN2, and an inverter IV1.
- the light receiving portion P according to this modification is obtained by omitting the logical product circuit AND1 and the logical sum circuit OR1 from the light receiving portion P (FIG. 3) according to the above embodiment.
- the inverter IV1 is configured to generate the pulse signal PLS by generating an inverted voltage of the voltage VN1 at the node N1.
- the flip-flop 29 operates based on the pulse signal PLS output from this inverter IV1.
- FIG. 29 shows an implementation example of the photodetector 20D.
- the photodetector 20D is formed on two semiconductor substrates 101 and 102.
- FIG. The semiconductor substrate 101 is arranged on the light receiving surface side of the photodetecting section 20D, and the semiconductor substrate 102 is arranged on the side opposite to the light receiving surface side of the photodetecting section 20D.
- Semiconductor substrates 101 and 102 are overlaid on each other.
- the wiring of the semiconductor substrate 101 and the wiring of the semiconductor substrate 102 are connected by the wiring 103 .
- metal bonding such as Cu--Cu bonding and bump bonding can be used.
- the photodiode PD of the light receiving portion P, the elements other than the photodiode PD in the light receiving portion P, and the flip-flop 29 connected to the light receiving portion P are arranged in regions corresponding to each other on the semiconductor substrates 101 and 102. .
- a photodetection system 2 according to a second embodiment will be described.
- This embodiment is configured to perform self-diagnosis of a plurality of light receiving portions P collectively.
- the same reference numerals are assigned to substantially the same components as those of the photodetection system 1 according to the first embodiment, and description thereof will be omitted as appropriate.
- the photodetection system 2 includes a photodetection section 30, like the photodetection system 1 (FIG. 1) according to the first embodiment.
- the light detection section 30 shows a configuration example of the photodetector 30.
- the light detection section 30 has a flip-flop section 32 , a histogram generation section 33 and a diagnosis section 36 .
- FIG. 31 shows a configuration example of the flip-flop section 32.
- the flip-flop section 32 has a plurality of flip-flops 29 , a plurality of AND circuits 37 , and a plurality of flip-flops 38 .
- Each of the plurality of AND circuits 37 is configured to obtain the AND of four pulse signals PLS.
- the logical product circuit 37 obtains the logical product of four pulse signals PLS, but is not limited to this.
- the logical product of two or three pulse signals PLS is obtained.
- the AND of five or more pulse signals PLS may be obtained.
- a plurality of flip-flops 38 are provided corresponding to the plurality of AND circuits 37, respectively.
- Each of the plurality of flip-flops 38 is configured to generate the pulse signal PLSB by sampling the output signal of the corresponding AND circuit 37 based on the clock signal CLK.
- This pulse signal PLSB is used in diagnostic processing operations. That is, the photodetection system 2 collectively diagnoses the four light receiving portions P in the diagnostic processing operation.
- the histogram generation unit 33 generates a histogram indicating the light reception timings of the plurality of light receiving units P based on the plurality of pulse signals PLSA in the distance measurement operation. Further, in the self-diagnostic operation, the histogram generation unit 33 generates a histogram indicating the pulse generation timing of the pulse signal PLS based on the control signal XACT in each of the plurality of light receiving units P based on the plurality of pulse signals PLSB. It's like
- the diagnosis unit 36 is configured to perform diagnosis processing of the plurality of light receiving units P in the pixel array 21 based on the data of the pulse generation timing of the pulse signal PLS based on the control signal XACT, which is supplied from the histogram generation unit 33. be done.
- the diagnosis unit 36 performs diagnostic processing for a plurality of light receiving units P by diagnosing the four light receiving units P collectively.
- the flip-flop unit 32 and the histogram generation unit 33 correspond to a specific example of the "detection unit" in the present disclosure.
- the photodetection system 2 performs a ranging operation during the ranging period T1, and during the blanking period T2, a plurality of pixels in the pixel array 21 self-diagnosis of the light-receiving portion P of .
- the distance measurement operation of the photodetection system 2 is the same as that of the photodetection system 1 according to the first embodiment (FIGS. 7 to 10).
- the diagnosis unit 36 can diagnose problems such as the cases C1 and C3 described above.
- FIG. 32 shows an example of the operation of the histogram generation unit 33.
- (A) shows the case where none of the four light receiving units P has a problem
- (B) shows the case where one of the four light receiving units P
- a case where at least one has a problem related to case C1 is shown.
- the logical product circuit 37 of the flip-flop section 32 obtains the logical product of the pulse signals PLS supplied from the four light receiving sections P.
- the output signal of AND circuit 37 has substantially the same waveform as these four pulse signals PLS. Therefore, as shown in FIG.
- a histogram with a frequency of "1" is obtained.
- the left end of this histogram corresponds to the generation timing of pulses in the pulse signal PLS, and the width of the histogram distribution corresponds to the pulse width of the pulses in the pulse signal PLS.
- the pulse end timing of the pulse signal PLS1 is earlier in the light receiving unit P having the defect as shown in FIG. 14A.
- the pulse width becomes shorter (FIG. 14A(D)).
- the logical product circuit 37 of the flip-flop section 32 obtains the logical product of the pulse signals PLS supplied from the four light receiving sections P.
- FIG. The output signal of the AND circuit 37 is a signal with a short pulse width, like the pulse signal PLS1 generated by the defective light receiving portion P.
- FIG. 32(B) the right end of the histogram moves to the left as compared to the case where there is no problem (FIG. 32(A)), so the width of the distribution of the histogram narrows.
- the diagnostic unit 36 supplies the constant current source CUR to at least one of the four light receiving units P. Diagnose that there is a problem that the current flowing through is increasing.
- FIG. 33 shows an example of the operation of the histogram generating section 33.
- (A) shows the case where none of the four light receiving sections P are defective, and (B) shows A case where at least one has a problem related to case C3 is shown.
- the pulse signal PLS1 is maintained at a low level in the light receiving portion P having the defect as shown in FIG. 16A.
- FIG. 16A(D) The logical product circuit 37 of the flip-flop section 32 obtains the logical product of the pulse signals PLS supplied from the four light receiving sections P.
- FIG. 33(B) the histogram has a frequency of "0" in all bins.
- the diagnosis unit 36 detects that at least one of the four photoreceptors P is such that the voltage VN1 at the node N1 is stuck at a high level. Diagnose that there is a problem.
- a composite pulse signal (pulse signal PLSB) is generated based on the pulse signals PLS generated by the plurality (four in this example) of the light receiving units P, and the composite pulse signal changes. Diagnosis processing can be performed because the timing of the detection is detected.
- the composite pulse signal is generated based on the pulse signals respectively generated by the plurality of light receiving units, and the timing at which the composite pulse signal changes is detected. be able to.
- the logical product circuit 37 obtains the logical product of the four pulse signals PLS, so that the self-diagnosis of the four light receiving portions P is collectively performed.
- the self-diagnosis of the four light-receiving portions P may be collectively performed by calculating the logical sum of the four pulse signals PLS.
- the photodetection system 2A according to this modification will be described in detail below.
- a photodetection system 2A includes a photodetection section 30A, like the photodetection system 1 (FIG. 1) according to the first embodiment.
- the photodetector 30A has a flip-flop section 32A and a diagnostic section 36A, like the photodetector 30 (FIG. 30) according to the second embodiment.
- FIG. 34 shows a configuration example of the flip-flop section 32A.
- the flip-flop section 32A has a plurality of OR circuits 37A.
- Each of the plurality of OR circuits 37A is configured to find the OR of the four pulse signals PLS.
- Each of the plurality of flip-flops 38 samples the output signal of the corresponding OR circuit 37A based on the clock signal CLK to generate the pulse signal PLSB.
- the diagnosis unit 36A is configured to perform diagnosis processing of the plurality of light receiving units P in the pixel array 21 based on the data of the pulse generation timing of the pulse signal PLS based on the control signal XACT, which is supplied from the histogram generation unit 33. be done.
- the diagnosis section 36A diagnoses the four light receiving sections P collectively, thereby diagnosing a plurality of the light receiving sections P. As shown in FIG.
- the diagnosis unit 36A can diagnose problems such as the cases C2, C4, and C5 described above.
- FIG. 35 shows an example of operation of the histogram generator 33A, where (A) shows the case where none of the four light receiving parts P are faulty, and (B) shows the case where one of the four light receiving parts P A case where at least one has a problem related to case C2 is shown.
- the end timing of the pulse of the pulse signal PLS1 is delayed in the light receiving unit P having the defect as shown in FIG. 15A.
- the pulse width becomes longer (FIG. 15A(D)).
- the OR circuit 37A of the flip-flop section 32A obtains the logical sum of the pulse signals PLS supplied from the four light receiving sections P.
- the output signal of the OR circuit 37A becomes a signal with a long pulse width, like the pulse signal PLS1 generated by the defective light receiving section P.
- the right end of the histogram moves to the right as compared to the case where there is no problem (FIG. 35(A)), so the width of the distribution of the histogram widens.
- the diagnosis unit 36A connects at least one of the four light receiving units P to the constant current source CUR. Diagnose that there is a problem such that the current that flows is reduced.
- FIG. 36 shows an example of operation of the histogram generating section 33A, where (A) shows a case where none of the four light receiving sections P are faulty, and (B) shows a case where one of the four light receiving sections P A case where at least one has a problem related to case C4 is shown.
- the pulse signal PLS1 is maintained at a high level in the light receiving portion P having the defect as shown in FIG. 17A. (FIG. 17A(D)).
- the OR circuit 37A of the flip-flop section 32A obtains the logical sum of the pulse signals PLS supplied from the four light receiving sections P. As a result, the output signal of the OR circuit 37A is maintained at a high level. As a result, as shown in FIG. 36B, the histogram has a frequency of "1" in all bins.
- the diagnostic unit 36A detects at least one of the four light receiving units P such that the voltage VN1 at the node N1 is stuck at a low level. Diagnose that there is a problem.
- the light receiving section P raises the pulse signal PLS1 to a high level as shown in FIG. 19A. level (Fig. 19A(D)).
- the control signal ENBIST is set to low level and the power supply voltage VNEG applied to the anode of the photodiode PD is set to "0V" as described above. Therefore, when at least one of the four light-receiving units P has a problem related to case C5, the frequency in all bins is "1" in the histogram, as in case C4 (FIG. 36). Become.
- the diagnosis unit 36A determines whether the four light receiving units P At least one of them is diagnosed as having such a problem that the cathode of the photodiode PD is stuck at a low level or the anode and cathode of the photodiode PD are short-circuited to each other.
- the TDC section 32B has a plurality of TDCs 29B, a plurality of AND circuits 37, and a plurality of TDCs 38B.
- Each of the plurality of TDCs 29B is configured to perform a count operation based on the clock signal CLK and latch the count value based on the rising edge of the pulse signal PLS to generate the timing code TCODE.
- Each of the plurality of TDCs 38B is configured to perform a count operation based on the clock signal CLK and latch the count value based on the rising edge of the output signal of the AND circuit 37 to generate the timing code TCODE. .
- the light-receiving portions P are connected in a daisy chain, but the present invention is not limited to this.
- a plurality of flip-flops 29 corresponding to the plurality of light receiving portions P in the pixel array 21 are provided, and the light receiving portions P and the flip-flops 29 are connected one-to-one.
- a photodetection system 2C according to this modification includes a photodetector 30C, like the photodetection system 2 according to the second embodiment.
- the photodetector section 30C has a pixel array 21C and a flip-flop section 32C, like the photodetector section 30 (FIG. 30) according to the second embodiment.
- the pixel array 21C has a plurality of light receiving portions P arranged in a matrix.
- the flip-flop section 32 ⁇ /b>C has a plurality of flip-flops 29 corresponding to a plurality of light receiving sections P, a plurality of AND circuits 37 , and a plurality of flip-flops 38 .
- FIG. 38 shows a configuration example of four light receiving portions P, four flip-flops 29, an AND circuit 37, and a flip-flop 38 according to this modification.
- the light receiving portion P has a photodiode PD, transistors MN1, MP1, MP2, MP3, and MN2, and an inverter IV1.
- the light receiving portion P according to this modification is obtained by omitting the logical product circuit AND1 and the logical sum circuit OR1 from the light receiving portion P (FIG. 3) according to the above embodiment.
- the inverter IV1 is configured to generate the pulse signal PLS by generating an inverted voltage of the voltage VN1 at the node N1.
- Each of the four flip-flops 29 operates based on the pulse signal PLS output from the inverter IV1 of the corresponding light receiving portion P.
- a logical product circuit 37 obtains a logical product of four pulse signals PLS.
- Flip-flop 38 operates based on the output signal of AND circuit 37 .
- the flip-flop section 32C having a plurality of AND circuits 37 is used, but the present invention is not limited to this, and a flip-flop section having a plurality of OR circuits 37A as shown in FIG. 32D may be used.
- the flip-flop section 32E has an OR circuit 37E, an AND circuit 37F, a selector 38E, and a flip-flop 29.
- the OR circuit 37E is configured to OR the four pulse signals PLS.
- the logical product circuit 37F is configured to obtain the logical product of the four pulse signals PLS.
- the selector 38E is configured to select the output signal of the OR circuit 37E in the range finding operation, and to select the output signal of the AND circuit 37F in the self-diagnostic operation.
- Flip-flop 29 is configured to generate pulse signal PLSA by sampling the output signal of selector 38E based on the rising edge of clock signal CLK.
- the logical sum circuit 37E obtains the logical sum of the four pulse signals PLS, and the flip-flop 29 generates the pulse signal PLSA based on the output signal of this logical sum circuit 37E.
- the number of flip-flops 29 can be reduced compared to the example of FIG. 38, so that the circuit area can be reduced and power consumption can be reduced.
- the flip-flop section 32F has an OR circuit 37E and a flip-flop 29.
- the OR circuit 37E is configured to OR the four pulse signals PLS.
- Flip-flop 29 is configured to generate pulse signal PLSA by sampling the output signal of OR circuit 37E based on the rising edge of clock signal CLK.
- the OR circuit 37E is used in both the rangefinding operation and the self-diagnostic operation. As a result, the number of flip-flops 29 can be reduced as compared with the example of FIG. 39, so that the circuit area can be reduced and power consumption can be reduced.
- the photodetector according to this modification can be formed, for example, on two semiconductor substrates, like the photodetector 20D (FIG. 29) according to Modification 1-4.
- a photodetection system 3 according to a third embodiment will be described.
- the present embodiment is configured to collectively perform self-diagnosis of a plurality of light receiving portions P using an adder.
- the same reference numerals are assigned to substantially the same components as those of the photodetection system 1 according to the first embodiment, and description thereof will be omitted as appropriate.
- a photodetection system 3 according to the present embodiment includes a photodetector 40, like the photodetection system 1 (FIG. 1) according to the first embodiment.
- FIG. 42 shows a configuration example of the photodetector 40.
- the light detection section 40 has a flip-flop section 42 , a histogram generation section 43 and a diagnosis section 46 .
- FIG. 43 shows a configuration example of the flip-flop section 42.
- the flip-flop section 42 has a plurality of flip-flops 29 and a plurality of adders 47 .
- Each of the multiple adders 47 is configured to generate the code CODE by performing addition processing based on the four pulse signals PLSA. Specifically, the adder 47 generates a code CODE indicating the number of high-level signals among the four pulse signals PLSA. The number of signals that are high can take values between 0 and 4 inclusive. Therefore, the adder 47 generates a 3-bit code CODE.
- FIG. 44 shows a configuration example of the adder 47.
- FIG. The adder 47 has half adders 51 and 52 and full adders 53 and 54 .
- Two of the four pulse signals PLSA are input to the input terminals A and B of the half adder 51, the output terminal S is connected to the input terminal A of the full adder 54, and the carry output terminal Cout is the full adder. It is connected to the input terminal A of 53 .
- the remaining two of the four pulse signals PLSA are input to the input terminals A and B of the half adder 52, the output terminal S is connected to the input terminal B of the full adder 54, and the carry output terminal Cout is the full adder 54. It is connected to the input terminal B of the adder 53 .
- the input terminal A of the full adder 53 is connected to the carry output terminal Cout of the half adder 51, the input terminal B is connected to the carry output terminal Cout of the half adder 52, and the carry input terminal Cin of the full adder 54. It is connected to the output terminal Cout.
- Full adder 53 outputs a signal indicating bit B2 of code CODE from carry output terminal Cout, and outputs a signal indicating bit B1 of code CODE from output terminal S.
- the input terminal A of the full adder 54 is connected to the output terminal S of the half adder 51, the input terminal B is connected to the output terminal S of the half adder 52, the carry input terminal Cin is grounded, and the carry output terminal Cout is It is connected to the carry input terminal Cin of the full adder 53 .
- Full adder 54 outputs from output terminal S a signal indicating bit B0 of code CODE. Bit B2 is the most significant bit of code CODE and bit B0 is the least significant bit of code CODE.
- the histogram generation unit 43 (FIG. 42) generates a histogram indicating the light reception timings of the plurality of light receiving units P based on the plurality of pulse signals PLSA in the distance measurement operation. Further, in the self-diagnostic operation, the histogram generator 43 generates a histogram indicating the pulse generation timing of the pulse signal PLS based on the control signal XACT in each of the plurality of light receiving units P based on the code CODE. ing.
- the diagnosis unit 46 is configured to perform diagnosis processing of the plurality of light receiving units P in the pixel array 21 based on the data of the pulse generation timing of the pulse signal PLS based on the control signal XACT, which is supplied from the histogram generation unit 43. be done.
- the diagnosis unit 46 performs diagnostic processing for a plurality of light receiving units P by diagnosing the four light receiving units P collectively.
- the flip-flop unit 42 and the histogram generation unit 43 correspond to a specific example of the "detection unit" in the present disclosure.
- the photodetection system 3 performs a rangefinding operation during the rangefinding period T1, and during the blanking period T2, a plurality of pixels in the pixel array 21 self-diagnosis of the light-receiving portion P of .
- the distance measurement operation of the photodetection system 3 is the same as that of the photodetection system 1 according to the first embodiment (FIGS. 7 to 10).
- the diagnostic unit 36 can diagnose problems such as the cases C1 to C5 described above.
- FIG. 45 shows an example of the operation of the histogram generator 43.
- (A) shows the case where none of the four light receiving parts P are defective
- (B) shows the case where one of the four light receiving parts P
- the pulse widths of the four pulse signals PLS are the same, so the value indicated by the code CODE is, for example, "0" near the pulse of the pulse signal PLS. , "4", "4", "4", "4", "0". Therefore, as shown in FIG. 45A, a flat histogram with a frequency of "4" is obtained.
- the left end of this histogram corresponds to the generation timing of pulses in the pulse signal PLS
- the width of the histogram distribution corresponds to the pulse width of the pulses in the pulse signal PLS.
- the diagnostic unit 46 determines that at least one of the four light receiving units P has a defect such that the current supplied by the constant current source CUR increases. Diagnose as occurring.
- FIG. 46 shows an operation example of the histogram generator 43.
- (A) shows the case where none of the four light receiving parts P are defective
- (B) shows the case where one of the four light receiving parts P One is a case where there is a problem related to case C2.
- the end timing of the pulse of the pulse signal PLS1 is delayed in the light receiving portion P having the defect as shown in FIG. 15A.
- the pulse width of the pulse signal PLS1 becomes longer (FIG. 15A(D)). Therefore, the value indicated by the code CODE changes, for example, to "0", "4", "4", "4", "4", "1", "0” near the pulse of the pulse signal PLS. do.
- FIG. 46(B) shows the right end part of the histogram is wider than when there is no problem (FIG. 46(A)).
- the diagnostic unit 46 determines that at least one of the four light receiving units P has a problem such that the current supplied by the constant current source CUR is reduced. Diagnose that there is
- FIG. 47 shows an operation example of the histogram generation unit 43.
- (A) shows a case where none of the four light receiving units P has a problem
- (B) shows a case where one of the four light receiving units P One is a case where there is a problem related to case C3.
- the pulse signal PLS1 of the light receiving portion P having the defect is maintained at a low level as shown in FIG. FIG. 16A(D)). Therefore, the value indicated by the code CODE changes, for example, to "0", "3", “3", “3", “3", “0” near the pulse of the pulse signal PLS.
- FIG. 47B shows the height of the histogram is lower than when there is no problem (FIG. 47A).
- the diagnosis unit 46 determines that at least one of the four light receiving units P has a problem that the voltage VN1 at the node N1 is stuck at a high level. Diagnose that there is
- FIG. 48 shows an example of the operation of the histogram generator 43.
- (A) shows the case where none of the four light receiving parts P is defective
- (B) shows the case where one of the four light receiving parts P A case where there is a problem related to case C4 is shown.
- the pulse signal PLS1 of the light receiving portion P having the defect is maintained at a high level ( FIG. 17A(D)). Therefore, the value indicated by the code CODE changes to, for example, "1", ..., "1", "4", "4", "4", "4", "1", ....
- the frequencies in all bins are "1" or more.
- the diagnosis unit 46 causes at least one of the four light receiving units P to cause the voltage VN1 at the node N1 to become stuck at a low level. Diagnose that a problem has occurred.
- the diagnosis unit 46 detects the four light receiving units P At least one of them is diagnosed as having such a problem that the cathode of the photodiode PD is stuck at a low level or the anode and cathode of the photodiode PD are short-circuited to each other.
- the code CODE is generated by performing addition processing based on the pulse signals PLS respectively generated by the plurality (four in this example) of the light receiving portions P, and the timing at which the code CODE changes is determined. is detected, diagnosis processing can be performed.
- a code is generated by performing addition processing based on the pulse signals respectively generated by the plurality of light receiving units, and the timing at which the code changes is detected. It can be carried out.
- the light-receiving portions P are connected in a daisy chain, but the present invention is not limited to this. Instead of this, for example, the light receiving section P and the flip-flop 29 may be connected one-to-one, as in the modification 2-3.
- a photodetection system 4 according to a fourth embodiment will be described.
- the configuration of the light receiving portion P is different from that of the light receiving portion P (FIG. 3) according to the first embodiment.
- the same reference numerals are assigned to substantially the same components as those of the photodetection system 1 according to the first embodiment, and description thereof will be omitted as appropriate.
- the photodetection system 4 includes a photodetection section 60, like the photodetection system 1 (FIG. 1) according to the first embodiment.
- FIG. 49 shows a configuration example of the photodetector 60.
- the photodetector section 60 has a pixel array 61 and a diagnostic section 66 .
- the pixel array 61 has a plurality of light receiving portions P arranged in a matrix.
- the light receiving section P is configured to detect light and generate a pulse signal having pulses corresponding to the detected light. Further, the light receiving portion P can generate a pulse signal based on the supplied control signals (control signals ENBIST, XACT, and XENAR, which will be described later) when the photodetection system 1 performs self-diagnostic operation. ing.
- the light receiving portion P includes a photodiode PD, transistors MN1, MP1, MP2, MP3, MN2, an inverter IV1, a negative logical sum circuit NOR1, a negative logical product circuit NAND1, a delay circuit DEL1, a transistor MP4, and a logic circuit. It has a product circuit AND1 and an OR circuit OR1.
- the transistor MP4 is a P-type MOS transistor.
- the NOR circuit NOR1 is configured to obtain the NOR of the control signal XACT and the control signal XENAR.
- the power supply voltage VDDH is supplied to the NOR circuit NOR1.
- the NAND circuit NAND1 is configured to obtain the NAND of the output signal of the NAND circuit NOR1 and the pulse signal PLS1.
- the power supply voltage VDDH is supplied to the NAND circuit NAND1.
- the delay circuit DEL1 is configured to delay the output signal of the NAND circuit NAND1.
- a power supply voltage VDDH is supplied to the delay circuit DEL1.
- the output signal of the delay circuit DEL1 is supplied to the gate of the transistor MP4, the power supply voltage VDDH is supplied to the source, and the drain is connected to the node N1.
- the diagnostic unit 66 (FIG. 49) performs diagnostic processing for the plurality of light receiving units P in the pixel array 61 based on the data on the pulse generation timing of the pulse signal PLS based on the control signal XACT, which is supplied from the histogram generator 23. configured to do so.
- the distance measurement control unit 68 controls the operations of the pixel array 61, the flip-flop unit 22, the histogram generation unit 23, the distance calculation unit 24, and the diagnosis unit 66, thereby performing light detection. configured to control the operation of the unit 60;
- 51A and 51B show an operation example of the light-receiving portion P in the distance measuring operation, in which (A) shows the waveform of the control signal ENBIST, (B) shows the waveform of the control signal XACT, and (C) shows the control signal XACT.
- the waveform of the signal XENAR is shown, (D) shows the waveform of the light emitted from the light emitting section 11, (E) shows the waveform of the light incident on the photodetector section 60, and (F) shows the waveform at the gate of the transistor MP4.
- the waveform of voltage AR is shown, (G) shows the waveform of voltage VN1 at node N1, and (H) shows the waveform of pulse signal PLS1 (pulse signal PLS).
- the waveforms of the clock signal CLK and the pulse signal PLSA are not shown in FIG. 51, they are the same as in the first embodiment (FIG. 9).
- the ranging control section 68 sets the control signals ENBIST and XACT to low level ((A) and (B) in FIG. 51).
- the transistors MP1 and MP3 are turned on, and the transistors MN1 and MN2 are turned off.
- the cathode of photodiode PD is connected to node N1
- constant current source CUR transistor MP2
- the ranging control unit 68 sets the control signal XENAR to low level (FIG. 51(C)).
- the output signal of the NOR circuit NOR1 is at a high level.
- the light emitting unit 11 emits the light pulse L0 based on the instruction from the control unit 14 ((D) in FIG. 51).
- This light pulse L0 is reflected by the object to be measured OBJ.
- the light pulse (reflected light pulse L1) reflected by the object to be measured OBJ is incident on the light receiving section P of the light detecting section 60 at timing t92.
- the time from timing t91 when the light pulse L0 is emitted to timing t92 when the reflected light pulse L1 is incident is the flight time Ttof of the light pulse detected by the light receiving portion P.
- the photodiode PD detects light, causing avalanche amplification, and the voltage VN1 at the node N1 drops (FIG. 51(G)).
- the inverter IV1 changes the pulse signal PLS1 from low level to high level (FIG. 51(H)).
- NAND circuit NAND1 changes the output signal from high level to low level.
- the delay circuit DEL1 changes the voltage AR at the gate of the transistor MP4 from high level to low level (FIG. 51(F)).
- the transistor MP4 is turned on, and the voltage VN1 at the node N1 rises (FIG. 51(G)).
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 51(H)).
- the NAND circuit NAND1 changes the output signal from low level to high level.
- the delay circuit DEL1 changes the voltage AR at the gate of the transistor MP4 from low level to high level (FIG. 51(F)).
- FIG. 52 shows an operation example of the light receiving section P in the self-diagnostic operation, in which (A) shows the waveform of the control signal ENBIST, (B) shows the waveform of the control signal XACT, and (C) shows the control signal. (D) shows the waveform of the voltage AR at the gate of the transistor MP4, (E) shows the waveform of the voltage VN1 at the node N1, and (F) shows the waveform of the pulse signal PLS1 (pulse signal PLS). shows the waveform. Although the waveforms of the clock signal CLK and the pulse signal PLSA are omitted in FIG. 52, they are the same as in the first embodiment (FIG. 12, etc.).
- the ranging control section 68 sets the control signal ENBIST to high level ((A) in FIG. 52). As a result, in the light receiving portion P, the transistor MP1 is turned off and the transistor MN1 is turned on. As a result, the cathode of photodiode PD is disconnected from node N1 and grounded. Also, the ranging control section 68 sets the control signal XACT to high level in a period before timing t101 ((B) in FIG. 52). As a result, in the light receiving portion P, the transistor MN2 is turned on and the transistor MP3 is turned off. As a result, constant current source CUR is disconnected from node N1, and node N1 is grounded.
- the ranging control unit 68 sets the control signal XENAR to low level ((C) in FIG. 52).
- the control signal XACT is at high level, so the NOR circuit NOR1 sets the output signal to low level. Therefore, the delay circuit DEL1 brings the voltage AR to a high level ((D) in FIG. 52).
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 52(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby gradually increasing the voltage VN1 at the node N1.
- the delay circuit DEL1 changes the voltage AR at the gate of the transistor MP4 from high level to low level (FIG. 52(D)).
- the transistor MP4 is turned on, and the voltage VN1 at the node N1 rises (FIG. 52(E)).
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 52(F)).
- the delay circuit DEL1 changes the voltage AR from the low level to the high level ((D) in FIG. 52). This completes the preparation.
- the ranging control section 68 changes the control signal XACT from low level to high level (FIG. 52(B)).
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- the voltage VN1 at the node N1 changes from the high level to the low level (FIG. 52(E)). Since voltage VN1 at node N1 becomes lower than logic threshold TH of inverter IV1, inverter IV1 changes pulse signal PLS1 from a low level to a high level (FIG. 52(F)).
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 52(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby gradually increasing the voltage VN1 at the node N1.
- the delay circuit DEL1 changes the voltage AR from high level to low level ((D) in FIG. 52).
- the transistor MP4 is turned on, and the voltage VN1 at the node N1 rises (FIG. 52(E)).
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 52(F)).
- the delay circuit DEL1 changes the voltage AR from the low level to the high level ((D) in FIG. 52).
- FIG. 53 shows an operation example of the light receiving section P in case C11, where (A) shows the waveform of the control signal ENBIST, (B) shows the waveform of the control signal XACT, and (C) shows the control signal. (D) shows the waveform of voltage AR at the gate of transistor MP4, (E) shows the waveform of voltage VN1 at node N1, and (F) shows the waveform of pulse signal PLS1 (pulse signal PLS). indicates In FIGS. 53(E) and 53(F), the dashed lines show the waveforms when there is no problem, and the solid lines show the waveforms when there is a problem. FIGS. 53(A)-(F) correspond to FIGS. 52(A)-(F), respectively.
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 53(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby gradually increasing the voltage VN1 at the node N1 (FIG. 53(E)).
- the delay circuit DEL1 changes the voltage AR at the gate of the transistor MP4 from high level to low level (FIG. 53(D)).
- the transistor MP4 cannot change the voltage VN1 of the node N1, so the voltage VN1 continues to rise based on the current supplied from the constant current source CUR (FIG. 53(E)).
- the delay circuit DEL1 changes the voltage AR from low level to high level (FIG. 53(D)).
- inverter IV1 changes pulse signal PLS1 from a high level to a low level (FIG. 53(F)).
- the ranging control section 68 changes the control signal XACT from low level to high level (FIG. 53(B)).
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- the voltage VN1 at the node N1 changes from the high level to the low level (FIG. 53(E)). Since voltage VN1 at node N1 becomes lower than logic threshold TH of inverter IV1, inverter IV1 changes pulse signal PLS1 from a low level to a high level (FIG. 53(F)).
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 53(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby gradually increasing the voltage VN1 at the node N1 (FIG. 53(E)).
- the delay circuit DEL1 changes the voltage AR from high level to low level (FIG. 53(D)).
- the transistor MP4 cannot change the voltage VN1 of the node N1, so the voltage VN1 continues to rise based on the current supplied from the constant current source CUR (FIG. 53(E)).
- the delay circuit DEL1 changes the voltage AR from low level to high level (FIG. 53(D)).
- inverter IV1 changes pulse signal PLS1 from a high level to a low level (FIG. 53(F)).
- the transistor MP4 cannot change the voltage VN1 of the node N1, so current flows through the node N1 through the path of the transistors MP2 and MP3, and the voltage VN1 of the node N1 rises.
- the end timing of the pulse of the pulse signal PLS1 is delayed and the pulse width of the pulse signal PLS1 is lengthened compared to when there is no problem.
- the histogram generated by the histogram generation unit 23 the right end of the histogram moves to the right, thereby widening the width of the distribution of the histogram.
- the diagnostic unit 66 causes the light receiving unit P to change the voltage of the node N1 through the transistor MP4. Diagnose that there is a problem that cannot be done.
- FIG. 54 shows an operation example of the light receiving unit P in case C13.
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 54(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- transistors MP2 and MP3 cannot supply current to node N1, so voltage VN1 at node N1 remains low (FIG. 54(E)).
- the delay circuit DEL1 changes the voltage AR at the gate of the transistor MP4 from high level to low level (FIG. 54(D)).
- the transistor MP4 cannot change the voltage VN1 of the node N1, so the voltage VN1 remains at a low level (FIG. 54(E)).
- the delay circuit DEL1 changes the voltage AR from low level to high level (FIG. 54(D)).
- the ranging control section 68 changes the control signal XACT from low level to high level (FIG. 54(B)).
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- voltage VN1 at node N1 maintains a low level (FIG. 54(E)).
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 54(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- transistors MP2 and MP3 cannot supply current to node N1, so voltage VN1 at node N1 remains low (FIG. 54(E)).
- the delay circuit DEL1 changes the voltage AR from high level to low level (FIG. 54(D)).
- the transistor MP4 cannot change the voltage VN1 of the node N1, so the voltage VN1 remains at a low level (FIG. 54(E)).
- the delay circuit DEL1 changes the voltage AR from low level to high level (FIG. 54(D)).
- the transistor MP4 cannot change the voltage VN1 at the node N1 and the transistors MP2 and MP3 cannot supply current to the node N1, the voltage VN1 at the node N1 is maintained at a low level. Therefore, inverter IV1 maintains pulse signal PLS1 at a high level. As a result, the histogram generated by the histogram generator 23 has a frequency of "1" in all bins.
- the diagnostic unit 66 instructs the light receiving unit P that the transistor MP4 cannot change the voltage VN1 of the node N1, and that the transistors MP2, MP2, It is diagnosed that there is a problem that the MP3 cannot supply current to the node N1.
- case C12 (Case C12) Next, the case (case C12) in which the transistors MP2 and MP3 cannot supply current to the node N1 will be described.
- the self-diagnostic operation of case C12 is performed by setting the transistor MP4 so as not to change the voltage VN1 of the node N1.
- the case C12 in which no problem occurs will be described, and then the case C12 in which the problem occurs will be described.
- FIG. 55 shows an operation example of the light receiving unit P in the self-diagnostic operation when the problem of case C12 does not occur.
- the ranging control unit 68 sets the control signal XENAR to high level (FIG. 55(C)). This causes NOR circuit NOR1 to keep its output signal low, and delay circuit DEL1 to keep voltage AR at the gate of transistor MP4 high. This self-diagnostic operation thus keeps transistor MP4 off.
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 55(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby gradually increasing the voltage VN1 at the node N1 (FIG. 55(E)).
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 55(F)). This completes the preparation.
- the ranging control section 68 changes the control signal XACT from low level to high level (FIG. 55(B)).
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- the node N1 is disconnected from the constant current source CUR and grounded, so that the voltage VN1 at the node N1 changes from the high level to the low level (FIG. 55(E)). Since voltage VN1 at node N1 becomes lower than logic threshold TH of inverter IV1, inverter IV1 changes pulse signal PLS1 from a low level to a high level (FIG. 55(F)).
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 55(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- node N1 is disconnected from the ground node and connected to constant current source CUR.
- a current flows through the node N1 through the constant current source CUR, thereby gradually increasing the voltage VN1 at the node N1.
- the inverter IV1 changes the pulse signal PLS1 from high level to low level (FIG. 55(F)).
- FIG. 56 shows an operation example of the light receiving section P in the self-diagnostic operation when the malfunction of case C12 occurs.
- the broken line shows the waveform when there is no problem
- the solid line shows the waveform when there is a problem.
- FIGS. 56A to 56F correspond to FIGS. 55A to 55F, respectively.
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 56(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- transistors MP2 and MP3 cannot supply current to node N1, so voltage VN1 at node N1 remains low (FIG. 56(E)).
- the ranging control section 68 changes the control signal XACT from low level to high level (FIG. 56(B)).
- the transistor MN2 is turned on and the transistor MP3 is turned off.
- voltage VN1 at node N1 is maintained at a low level (FIG. 56(E)).
- the ranging control section 68 changes the control signal XACT from high level to low level (FIG. 56(B)).
- the transistor MP3 is turned on and the transistor MN2 is turned off.
- transistors MP2 and MP3 cannot supply current to node N1, so voltage VN1 at node N1 remains low (FIG. 56(E)).
- the transistors MP2 and MP3 cannot supply current to the node N1, the voltage VN1 at the node N1 is maintained at a low level. Therefore, inverter IV1 maintains pulse signal PLS1 at a high level. As a result, the histogram generated by the histogram generator 23 has a frequency of "1" in all bins.
- the diagnosis unit 66 causes the light receiving unit P to receive a current from the transistors MP2 and MP3 to the node N1. Diagnose that there is a problem that can not be supplied.
- FIG. 57 shows an example of self-diagnosis operation in the photodetection system 4.
- the photodetection system 4 sets the control signal XENAR to low level to perform a self-diagnostic operation (step S101). This operation corresponds to FIGS.
- the diagnostic unit 66 checks whether the pulse signal PLS has maintained a high level (step S102). Specifically, diagnosis unit 66 checks whether pulse signal PLS has maintained a high level, as shown in FIG. 54(F). When pulse signal PLS maintains the high level ("Y" in step S102), diagnosis unit 66 diagnoses that case C13 applies (step S103). That is, the diagnostic unit 66 determines that the light receiving unit P has a problem that the transistor MP4 cannot change the voltage VN1 of the node N1 and the transistors MP2 and MP3 cannot supply current to the node N1. Diagnose. The process then ends.
- the diagnostic unit 66 checks whether the pulse width of the pulse signal PLS is wide (step S104). Specifically, diagnosis unit 66 confirms whether or not the pulse width of pulse signal PLS is wide, as shown in FIG. 53(F). When the pulse width of pulse signal PLS is wide ("Y" in step S104), diagnosis unit 66 diagnoses case C11 (step S105). That is, the diagnosis unit 66 diagnoses that the light receiving unit P has a problem that the transistor MP4 cannot change the voltage VN1 of the node N1. The process then ends.
- step S106 the photodetection system 4 sets the control signal XENAR to high level and performs a self-diagnostic operation (step S106). This operation corresponds to FIGS.
- the diagnostic unit 66 confirms whether the pulse signal PLS has maintained a high level (step S107). Specifically, diagnosis unit 66 checks whether pulse signal PLS has maintained a high level, as shown in FIG. 56(F). When pulse signal PLS maintains the high level ("Y" in step S107), diagnosis unit 66 diagnoses that case C12 applies (step S108). That is, the diagnosis unit 66 diagnoses that the light receiving unit P has a problem that the transistors MP2 and MP3 cannot supply current to the node N1. The process then ends.
- the diagnosis unit 66 diagnoses that the light receiving unit P is normal without any trouble (step S109). This completes the processing.
- the photodetection system 4 can perform diagnostic processing for the light receiving section P shown in FIG.
- the technology (the present technology) according to the present disclosure can be applied to various products.
- the technology according to the present disclosure can be realized as a device mounted on any type of moving body such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility, airplanes, drones, ships, and robots. may
- FIG. 58 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology according to the present disclosure can be applied.
- a vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001.
- the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an exterior information detection unit 12030, an interior information detection unit 12040, and an integrated control unit 12050.
- a microcomputer 12051, an audio/image output unit 12052, and an in-vehicle network I/F (interface) 12053 are illustrated.
- the drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs.
- the driving system control unit 12010 includes a driving force generator for generating driving force of the vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism to adjust and a brake device to generate braking force of the vehicle.
- the body system control unit 12020 controls the operation of various devices equipped on the vehicle body according to various programs.
- the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, winkers or fog lamps.
- the body system control unit 12020 can receive radio waves transmitted from a portable device that substitutes for a key or signals from various switches.
- the body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, etc. of the vehicle.
- the vehicle exterior information detection unit 12030 detects information outside the vehicle in which the vehicle control system 12000 is installed.
- the vehicle exterior information detection unit 12030 is connected with an imaging section 12031 .
- the vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image of the exterior of the vehicle, and receives the captured image.
- the vehicle exterior information detection unit 12030 may perform object detection processing or distance detection processing such as people, vehicles, obstacles, signs, or characters on the road surface based on the received image.
- the imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of received light.
- the imaging unit 12031 can output the electric signal as an image, and can also output it as distance measurement information.
- the light received by the imaging unit 12031 may be visible light or non-visible light such as infrared rays.
- the in-vehicle information detection unit 12040 detects in-vehicle information.
- the in-vehicle information detection unit 12040 is connected to, for example, a driver state detection section 12041 that detects the state of the driver.
- the driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 detects the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether the driver is dozing off.
- the microcomputer 12051 calculates control target values for the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and controls the drive system control unit.
- a control command can be output to 12010 .
- the microcomputer 12051 realizes the functions of ADAS (Advanced Driver Assistance System) including collision avoidance or shock mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, or vehicle lane deviation warning. Cooperative control can be performed for the purpose of ADAS (Advanced Driver Assistance System) including collision avoidance or shock mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, or vehicle lane deviation warning. Cooperative control can be performed for the purpose of ADAS (Advanced Driver Assistance System) including collision avoidance or shock mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, or vehicle
- the microcomputer 12051 controls the driving force generator, the steering mechanism, the braking device, etc. based on the information about the vehicle surroundings acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, so that the driver's Cooperative control can be performed for the purpose of autonomous driving, etc., in which vehicles autonomously travel without depending on operation.
- the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the information detection unit 12030 outside the vehicle.
- the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030, and performs cooperative control aimed at anti-glare such as switching from high beam to low beam. It can be carried out.
- the audio/image output unit 12052 transmits at least one of audio and/or image output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle.
- an audio speaker 12061, a display section 12062 and an instrument panel 12063 are illustrated as output devices.
- the display unit 12062 may include at least one of an on-board display and a head-up display, for example.
- FIG. 59 is a diagram showing an example of the installation position of the imaging unit 12031.
- the vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.
- the imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose of the vehicle 12100, the side mirrors, the rear bumper, the back door, and the upper part of the windshield in the vehicle interior, for example.
- An image pickup unit 12101 provided in the front nose and an image pickup unit 12105 provided above the windshield in the passenger compartment mainly acquire images in front of the vehicle 12100 .
- Imaging units 12102 and 12103 provided in the side mirrors mainly acquire side images of the vehicle 12100 .
- An imaging unit 12104 provided in the rear bumper or back door mainly acquires an image behind the vehicle 12100 .
- Forward images acquired by the imaging units 12101 and 12105 are mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, and the like.
- FIG. 59 shows an example of the imaging range of the imaging units 12101 to 12104.
- FIG. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided in the front nose
- the imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided in the side mirrors, respectively
- the imaging range 12114 The imaging range of an imaging unit 12104 provided on the rear bumper or back door is shown. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.
- At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information.
- at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.
- the microcomputer 12051 determines the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and changes in this distance over time (relative velocity with respect to the vehicle 12100). , it is possible to extract, as the preceding vehicle, the closest three-dimensional object on the course of the vehicle 12100, which runs at a predetermined speed (for example, 0 km/h or more) in substantially the same direction as the vehicle 12100. can. Furthermore, the microcomputer 12051 can set the inter-vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including following stop control) and automatic acceleration control (including following start control). In this way, cooperative control can be performed for the purpose of automatic driving in which the vehicle runs autonomously without relying on the operation of the driver.
- automatic brake control including following stop control
- automatic acceleration control including following start control
- the microcomputer 12051 converts three-dimensional object data related to three-dimensional objects to other three-dimensional objects such as motorcycles, ordinary vehicles, large vehicles, pedestrians, and utility poles. It can be classified and extracted and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into those that are visible to the driver of the vehicle 12100 and those that are difficult to see. Then, the microcomputer 12051 judges the collision risk indicating the degree of danger of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, an audio speaker 12061 and a display unit 12062 are displayed. By outputting an alarm to the driver via the drive system control unit 12010 and performing forced deceleration and avoidance steering via the drive system control unit 12010, driving support for collision avoidance can be performed.
- At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays.
- the microcomputer 12051 can recognize a pedestrian by determining whether or not the pedestrian exists in the captured images of the imaging units 12101 to 12104 .
- recognition of a pedestrian is performed by, for example, a procedure for extracting feature points in images captured by the imaging units 12101 to 12104 as infrared cameras, and performing pattern matching processing on a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian.
- the audio image output unit 12052 outputs a rectangular outline for emphasis to the recognized pedestrian. is superimposed on the display unit 12062 . Also, the audio/image output unit 12052 may control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.
- the vehicle control system 12000 can diagnose whether the imaging unit 12031 is operating normally by performing self-diagnosis. As a result, in the vehicle control system 12000, when a problem occurs, for example, it is possible to perform an appropriate process such as calling the driver's attention, so reliability can be enhanced.
- a vehicle 200 includes an ECU (Electronic Control Unit) 208, a front camera module 201, a steering wheel 202, a headlamp 203, an engine 204, a motor 205, a brake 206, and a display operation unit 207.
- ECU 208, front camera module 201, steering wheel 202, headlamp 203, engine 204, motor 205, brake 206, and display operation unit 207 are connected via bus 209 as shown in FIG.
- the ECU 208 is configured to control the vehicle 200 by communicating with each block in the vehicle 200 via the bus 209 .
- the ECU 208 controls the vehicle 200 based on the information supplied from the front camera module 201 in the driving assistance mode.
- ECU 208 is configured using one or more ECUs.
- the front camera module 201 is configured to detect the lane in which the vehicle 200 is traveling, vehicles traveling in front of the vehicle 200, pedestrians walking in front, and the like.
- the front camera module 201 has an image sensor 211, a ranging sensor 212, and a front camera ECU 213, as shown in FIG.
- the image sensor 211 is configured using, for example, a CMOS (Complementary MOS) image sensor, and is configured to capture an image of the front of the vehicle 200 by performing an imaging operation.
- the image sensor 211 also has the function of performing self-diagnostic operations. Note that the image sensor 211 is not limited to this, and the image sensor 211 may not have the function of performing a self-diagnostic operation.
- the distance measurement sensor 212 is configured using the light detection system according to the above embodiment, and is configured to measure the distance to the subject in front of the vehicle 200 by performing a distance measurement operation.
- the distance measuring sensor 212 also has a function of performing self-diagnostic operations.
- the front camera ECU 213 performs various detection processes such as lane detection, vehicle detection, pedestrian detection, and headlamp detection based on the captured image generated by the image sensor 211 and the distance image generated by the distance measurement sensor 212. configured as The front camera ECU 213 notifies the ECU 208 of the result of the detection processing. The front camera ECU 213 also has a function of notifying the ECU 208 of information when a problem is detected in the image sensor 211 or when a problem is detected in the distance measurement sensor 212 .
- the steering 202 is configured to control the running direction of the vehicle 200 .
- Steering wheel 202 is operated by, for example, a driver.
- Steering 202 is controlled by ECU208, for example in driving assistance mode. Specifically, for example, in the driving assistance mode, the ECU 208 steers along the lane based on information supplied from the front camera module 201 so as not to collide with a vehicle or a pedestrian in front of the vehicle 200 . 202 is controlled.
- the headlamp 203 is configured to emit light forward of the vehicle 200 .
- the headlamp 203 is operated by the driver, for example.
- the headlamp 203 is controlled by the ECU 208, for example, in the driving assistance mode.
- the ECU 208 performs control to switch high beams to low beams based on information supplied from the front camera module 201 when an oncoming vehicle is running, and is not running, control is performed to switch the low beam to the high beam.
- the engine 204 and the motor 205 are power sources that make the vehicle 200 run.
- Engine 204 and motor 205 are controlled by ECU 208 .
- the ECU 208 operates the motor 205 when the efficiency of the engine 204 is low, such as when starting the vehicle.
- the ECU 208 operates the engine 204, for example, when the efficiency of the engine 204 is high.
- the ECU 208 controls operations of the engine 204 and the motor 205 based on information supplied from the front camera module 201 .
- the brake 206 is configured to brake the vehicle 200 .
- Brake 206 is operated by, for example, a driver.
- the brake 206 is controlled by, for example, the ECU 208 in the driving assistance mode.
- the ECU 208 controls the brake 206 based on information supplied from the front camera module 201 so as not to collide with a vehicle or a pedestrian in front of the vehicle 200. It has become.
- the display operation unit 207 is configured using, for example, a liquid crystal display or a touch panel, and configured to display the running state of the vehicle 200 .
- the display operation unit 207 also has a function of providing route guidance to a destination based on information from, for example, a GPS (Global Positioning System) device (not shown). For example, when a problem occurs in the front camera module 201 and the ECU 208 terminates the driving assistance mode, the display operation unit 207 displays that effect.
- GPS Global Positioning System
- FIG. 62 shows an example of driving support processing for the vehicle 200.
- the ECU 208 confirms whether, for example, the display operation unit 207 has been operated to set the driving assistance mode (step S201). If the driving assistance mode is not set ("N" in step S201), step S201 is repeated until the driving assistance mode is set.
- step S201 When the driving assistance mode is set ("Y" in step S201), the ECU 208 acquires the result of the self-diagnostic operation in the front camera module 201 (step S202). Then, the ECU 208 checks whether the front camera module 201 has a problem (step S203).
- step S203 if there is no problem with the front camera module 201 ("N" in step S203), the front camera module 201 performs imaging operation and distance measurement operation (step S204). Specifically, image sensor 211 generates a captured image by capturing an image of the front of vehicle 200 . Further, the distance measurement sensor 212 generates a distance image by measuring the distance to the subject in front of the vehicle 200 .
- the front camera ECU 213 analyzes the captured image and the distance image (step S205). Specifically, the front camera ECU 213 performs, for example, lane detection, vehicle detection, pedestrian detection, headlamp detection, etc., based on the captured image generated by the image sensor 211 and the distance image generated by the ranging sensor 212. Perform various detection processes.
- the ECU 208 performs driving support processing based on the analysis result of the front camera ECU 213 (step S206). Specifically, the ECU 208 performs driving support processing by controlling operations of the steering wheel 202 , the headlamp 203 , the engine 204 , the motor 205 , the brake 206 , and the display operation unit 207 .
- step S207 the ECU 208 confirms whether or not the operation has ended. If the operation has not ended ("N” in step S207), the process returns to step S202. If the operation has ended ("Y" in step S207), this process ends.
- step S203 if there is a problem with the front camera module 201 ("Y" in step S203), the ECU 208 terminates the driving assistance mode (step S208). Then, the display operation unit 207 displays that the driving support mode has ended (step S209).
- the light-receiving unit P as shown in FIG. 3 is provided, but the circuit configuration of the light-receiving unit P is not limited to this, and various circuit configurations can be applied. be able to.
- This technology can be configured as follows. According to the present technology having the following configuration, self-diagnosis can be performed.
- a light-receiving element a first switch that connects the light-receiving element and a first node when turned on, and a second switch that applies a predetermined voltage to the first node when turned on.
- a light receiving unit having a signal generation unit that generates a pulse signal based on the voltage of the first node; a control unit that controls operations of the first switch and the second switch; a detection unit that detects timing at which the pulse signal changes based on the pulse signal; and an output section that outputs a detection signal according to the detection result of the detection section when the second switch is turned on.
- the photodetector according to (1) wherein the detection signal is a signal corresponding to a diagnosis result of the diagnosis unit.
- the photodetector according to (2) wherein the detection signal includes a signal indicating whether or not the light receiving section has a problem.
- the control unit turns on the first switch, In a second period between two adjacent first periods among the plurality of first periods, the control unit turns off the first switch and turns off the second switch.
- the control unit turns on the first switch
- the control unit turns on the first switch and turns on the second switch. on off,
- the signal generator In the second period, the signal generator generates the pulse signal according to on/off of the second switch, The photodetector according to (5) or (6), wherein the detector detects a timing at which the pulse signal changes in the second period. (8) The photodetector according to (7), wherein the diagnostic section performs the diagnostic processing based on a timing at which the pulse signal changes. (9) The photodetector according to (7) or (8), wherein the diagnostic section performs the diagnostic processing based on whether or not the pulse signal changes.
- the signal generator In the first period, the signal generator generates the pulse signal according to the light receiving result of the light receiving element, The photodetector according to (5) or (6), wherein the detection unit detects the light receiving timing of the light receiving element by detecting the timing at which the pulse signal changes in the first period.
- (11) comprising a plurality of the light receiving units, The control unit controls operations of the first switch and the second switch of each of the plurality of light receiving units, The detection section generates a composite pulse signal based on the plurality of pulse signals respectively generated by the plurality of the light receiving sections, and detects timing at which the composite pulse signal changes.
- the control unit controls operations of the first switch and the second switch of each of the plurality of light receiving units,
- the detection unit generates a code by performing addition processing based on the plurality of pulse signals respectively generated by the plurality of light receiving units, and detects the timing at which the code changes.
- (1) to (10) The photodetector according to any one of (1) to (12), which is mounted on a vehicle.
- the photodetector is a light-receiving element, a first switch that connects the light-receiving element and a first node when turned on, and a second switch that applies a predetermined voltage to the first node when turned on.
- a light receiving unit having a signal generation unit that generates a pulse signal based on the voltage of the first node; a control unit that controls operations of the first switch and the second switch; a detection unit that detects timing at which the pulse signal changes based on the pulse signal; and an output section that outputs a detection signal according to the detection result of the detection section when the second switch is turned on.
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Abstract
Description
1.第1の実施の形態
2.第2の実施の形態
3.第3の実施の形態
4.第4の実施の形態
5.移動体への応用例
6.車両への具体的な応用例
[構成例]
図1は、一実施の形態に係る光検出システム(光検出システム1)の一構成例を表すものである。光検出システム1は、ToF(Time-of-Flight)センサであり、光を射出するとともに、計測対象物OBJにより反射された反射光を検出するように構成される。光検出システム1は、発光部11と、光学系12と、光検出部20と、制御部14とを備えている。
続いて、本実施の形態の光検出システム1の動作および作用について説明する。
まず、図1,2を参照して、光検出システム1の全体動作概要を説明する。発光部11は、計測対象物OBJに向かって光パルスL0を射出する。光学系12は、光検出部20の受光面において像を結像させる。光検出部20は、計測対象物OBJにより反射された光パルス(反射光パルスL1)を検出する。制御部14は、発光部11および光検出部20に制御信号を供給し、これらの動作を制御することにより、光検出システム1の測距動作を制御する。
次に、光検出システム1の動作について詳細に説明する。
まず、測距動作について説明する。測距動作では、光検出部20は、1つの測距期間T1において、画素アレイ21における複数の受光部Pのうちの、検出対象である複数の受光部Pを順次選択し、選択された複数の受光部Pにおける受光タイミングに基づいて、距離値を算出する。
次に、自己診断動作について説明する。自己診断動作では、測距動作の場合(図7)と同様に、光検出部20は、1つのブランキング期間T2において、画素アレイ21における複数の受光部Pのうちの、検出対象である複数の受光部Pを順次選択する。そして、光検出部20は、選択された複数の受光部Pにおいて制御信号XACTを変化させることにより、自己診断を行う。
まず、定電流源CURが流す電流が多い場合(ケースC1)について説明する。
次に、定電流源CURが流す電流が少ない場合(ケースC2)について説明する。
次に、ノードN1における電圧VN1が高レベルに固着する場合(ケースC3)について説明する。
次に、ノードN1における電圧VN1が低レベルに固着する場合(ケースC4)について説明する。
次に、フォトダイオードPDのカソードが低レベルに固着し、あるいはフォトダイオードPDのアノードおよびカソードが互いにショートする場合(ケースC5)について説明する。
以上のように本実施の形態では、フォトダイオードと、オン状態になることによりフォトダイオードとノードN1とを接続する第1のスイッチと、オン状態になることによりノードN1に所定の電圧を印加する第2のスイッチと、ノードN1の電圧に基づいてパルス信号を生成する信号生成部とを有する受光部を設けるようにした。パルス信号に基づいて、パルス信号が変化するタイミングを検出する検出部を設けるようにした。第2のスイッチをオン状態にしたときの検出部の検出結果に応じた診断結果信号を出力する出力部を設けるようにした。これにより、自己診断を行うことができる。
上記実施の形態では、フリップフロップ部22が、パルス信号PLSをサンプリングし、ヒストグラム生成部23が、そのサンプリング結果に基づいてヒストグラムを生成したが、これに限定されるものではない。以下に、本変形例に係る光検出システム1Aについて詳細に説明する。
上記実施の形態では、1つのブランキング期間T2において、画素アレイ21における複数の受光部Pのうちの、検出対象である複数の受光部Pを順次選択したが、これに限定されるものではない。これに代えて、例えば、図24に示すように、複数(この例では2つ)のブランキング期間T2において、画素アレイ21における複数の受光部Pのうちの、検出対象である複数の受光部Pを順次選択してもよい。この例では、2つのブランキング期間T2のうちの最初のブランキング期間T2において、画素アレイ21の左半分における複数の受光部Pのうちの、検出対象である複数の受光部Pを順次選択し、次のブランキング期間T2において、画素アレイ21の右半分における複数の受光部Pのうちの、検出対象である複数の受光部Pを順次選択する。これにより、ブランキング期間T2の時間長を短くすることができるので、例えば単位時間当たりの測距動作の頻度を高めることができる。
上記実施の形態では、測距動作において、図8に示したように、トランジスタMN2をオフ状態に維持したが、これに限定されるものではない。これに代えて、例えば、図25に示すように、このトランジスタMN2をオンオフしてもよい。これにより、例えば、以下に説明するように、測距動作において、発光部11が光パルスL0を射出する期間において、このトランジスタMN2をオン状態にすることにより、光検出部20の誤検出を防ぐことができる。
上記実施の形態では、受光部Pをデイジーチェーン接続したが、これに限定されるものではない。これに代えて、例えば、画素アレイ21における複数の受光部Pにそれぞれ対応する複数のフリップフロップ29を設け、受光部Pおよびフリップフロップ29を一対一で接続してもよい。本変形例に係る光検出システム1Dは、上記実施の形態に係る光検出システム1(図1)と同様に、光検出部20Dを備えている。光検出部20Dは、上記実施の形態に係る光検出部20(図2)と同様に、画素アレイ21Dと、フリップフロップ部22Dとを有している。画素アレイ21Dは、マトリックス状に配置された複数の受光部Pを有する。フリップフロップ部22Dは、複数の受光部Pに対応する複数のフリップフロップ29を有している。
また、これらの変形例のうちの2以上を組み合わせてもよい。
次に、第2の実施の形態に係る光検出システム2について説明する。本実施の形態は、複数の受光部Pの自己診断をまとめて行うように構成される。なお、上記第1の実施の形態に係る光検出システム1と実質的に同一の構成部分には同一の符号を付し、適宜説明を省略する。
定電流源CURが流す電流が多い場合(ケースC1)には、図14Aに示したように、不具合がない場合に比べて、パルス信号PLS1のパルス幅が短くなる(図14A(D))。
ノードN1における電圧VN1が高レベルに固着する場合(ケースC3)には、受光部Pは、図16Aに示したように、パルス信号PLS1を低レベルに維持する(図16A(D))。
上記実施の形態では、図31に示したように、論理積回路37が4つのパルス信号PLSの論理積を求めることにより、4つの受光部Pの自己診断をまとめて行うようにしたが、これに限定されるものではない。これに代えて、4つのパルス信号PLSの論理和を求めることにより、4つの受光部Pの自己診断をまとめて行うようにしてもよい。以下に、本変形例に係る光検出システム2Aについて、詳細に説明する。
上記実施の形態では、フリップフロップ29,38を設けたが、これに限定されるものではなく、これに代えて、例えば、図37に示すように、変形例1-1と同様に、TDCを設けてもよい。TDC部32Bは、複数のTDC29Bと、複数の論理積回路37と、複数のTDC38Bとを有している。複数のTDC29Bのそれぞれは、クロック信号CLKに基づいてカウント動作を行い、パルス信号PLSの立ち上がりエッジに基づいてカウント値をラッチすることにより、タイミングコードTCODEを生成するように構成される。複数のTDC38Bのそれぞれは、クロック信号CLKに基づいてカウント動作を行い、論理積回路37の出力信号の立ち上がりエッジに基づいてカウント値をラッチすることにより、タイミングコードTCODEを生成するように構成される。
上記実施の形態では、受光部Pをデイジーチェーン接続したが、これに限定されるものではない。これに代えて、例えば、変形例1-4と同様に、画素アレイ21における複数の受光部Pにそれぞれ対応する複数のフリップフロップ29を設け、受光部Pおよびフリップフロップ29を一対一で接続してもよい。本変形例に係る光検出システム2Cは、第2の実施の形態に係る光検出システム2と同様に、光検出部30Cを備えている。光検出部30Cは、第2の実施の形態に係る光検出部30(図30)と同様に、画素アレイ21Cと、フリップフロップ部32Cとを有している。画素アレイ21Cは、マトリックス状に配置された複数の受光部Pを有する。フリップフロップ部32Cは、複数の受光部Pに対応する複数のフリップフロップ29と、複数の論理積回路37と、複数のフリップフロップ38とを有している。
次に、第3の実施の形態に係る光検出システム3について説明する。本実施の形態は、加算器を用いて、複数の受光部Pの自己診断をまとめて行うように構成される。なお、上記第1の実施の形態に係る光検出システム1と実質的に同一の構成部分には同一の符号を付し、適宜説明を省略する。
定電流源CURが流す電流が多い場合(ケースC1)には、図14Aに示したように、不具合がない場合に比べて、パルス信号PLS1のパルス幅が短くなる(図14A(D))。
定電流源CURが流す電流が少ない場合(ケースC2)には、図15Aに示したように、不具合がない場合に比べて、パルス信号PLS1のパルス幅が長くなる(図15A(D))。
ノードN1における電圧VN1が高レベルに固着する場合(ケースC3)には、受光部Pは、図16Aに示したように、パルス信号PLS1を低レベルに維持する(図16A(D))。
ノードN1における電圧VN1が低レベルに固着する場合(ケースC4)には、受光部Pは、図17Aに示したように、パルス信号PLS1を高レベルに維持する(図17A(D))。
フォトダイオードPDのカソードが低レベルに固着し、あるいはフォトダイオードPDのアノードおよびカソードが互いにショートする場合(ケースC5)には、受光部Pは、図19Aに示したように、パルス信号PLS1を高レベルに維持する(図19A(D))。なお、ケースC5に係る自己診断を行う場合には、上述したように、制御信号ENBISTを低レベルにし、フォトダイオードPDのアノードに印加する電源電圧VNEGを例えば“0V”にしている。よって、4つの受光部Pのうちの1つにケースC5に係る不具合がある場合には、ケースC4の場合(図48)と同様に、ヒストグラムでは、全てのビンにおける頻度が“1”以上になる。
上記実施の形態では、フリップフロップ29を設けたが、これに限定されるものではなく、これに代えて、例えば、変形例2-2と同様に、TDCを設けてもよい。
上記実施の形態では、受光部Pをデイジーチェーン接続したが、これに限定されるものではない。これに代えて、例えば、変形例2-3と同様に、受光部Pおよびフリップフロップ29を一対一で接続してもよい。
次に、第4の実施の形態に係る光検出システム4について説明する。本実施の形態は、受光部Pの構成が、第1の実施の形態に係る受光部P(図3)と異なるものである。なお、上記第1の実施の形態に係る光検出システム1と実質的に同一の構成部分には同一の符号を付し、適宜説明を省略する。
まず、トランジスタMP4がノードN1の電圧VN1を変化させることができない場合(ケースC11)について説明する。なお、この例では、トランジスタMP4に不具合が生じている例で説明するが、否定論理積回路NAND1、遅延回路DEL1、およびトランジスタMP4の経路におけるいずれかの箇所に不具合が生じている場合も同様である。
次に、トランジスタMP4がノードN1の電圧VN1を変化させることができず、かつ、トランジスタMP2,MP3がノードN1に電流を供給できない場合(ケースC13)について説明する。
次に、トランジスタMP2,MP3がノードN1に電流を供給できない場合(ケースC12)について説明する。ケースC12の自己診断動作は、トランジスタMP4がノードN1の電圧VN1を変化させることができないように設定して行われる。まず、ケースC12の不具合が生じていない場合を説明し、その後に、ケースC12の不具合が生じている場合を説明する。
上記第4の実施の形態に係る光検出システム4に、上記第1~第3の実施の形態の各変形例を適用してもよい。
本開示に係る技術(本技術)は、様々な製品へ応用することができる。例えば、本開示に係る技術は、自動車、電気自動車、ハイブリッド電気自動車、自動二輪車、自転車、パーソナルモビリティ、飛行機、ドローン、船舶、ロボット等のいずれかの種類の移動体に搭載される装置として実現されてもよい。
次に、本開示に係る光検出システムの、車両への具体的な応用例について、詳細に説明する。
前記第1のスイッチおよび前記第2のスイッチの動作を制御する制御部と、
前記パルス信号に基づいて、前記パルス信号が変化するタイミングを検出する検出部と、
前記第2のスイッチをオン状態にしたときの前記検出部の検出結果に応じた検出信号を出力する出力部と
を備えた光検出装置。
(2)
前記第2のスイッチをオン状態にしたときの前記検出部の検出結果に基づいて診断処理を行う診断部をさらに備え、
前記検出信号は、前記診断部の診断結果に応じた信号である
前記(1)に記載の光検出装置。
(3)
前記検出信号は、前記受光部に不具合があるか否かを示す信号を含む
前記(2)に記載の光検出装置。
(4)
前記検出信号は、前記受光部の不具合内容を示す信号を含む
前記(2)または(3)に記載の光検出装置。
(5)
複数の第1の期間において、前記制御部は、前記第1のスイッチをオン状態にし、
前記複数の第1の期間のうちの隣り合う2つの前記第1の期間の間の第2の期間において、前記制御部は、前記第1のスイッチをオフ状態にするとともに前記第2のスイッチをオンオフし、
前記診断部は、前記第2の期間における前記検出部の検出結果に基づいて、前記診断処理を行う
前記(2)から(4)のいずれかに記載の光検出装置。
(6)
複数の第1の期間において、前記制御部は、前記第1のスイッチをオン状態にし、
前記複数の第1の期間のうちの隣り合う2つの前記第1の期間の間の第2の期間において、前記制御部は、前記第1のスイッチをオン状態にするとともに前記第2のスイッチをオンオフし、
前記診断部は、前記第2の期間における前記検出部の検出結果に基づいて、前記診断処理を行う
前記(2)から(4)のいずれかに記載の光検出装置。
(7)
前記第2の期間において、前記信号生成部は、前記第2のスイッチのオンオフに応じた前記パルス信号を生成し、
前記検出部は、前記第2の期間において、前記パルス信号が変化するタイミングを検出する
前記(5)または(6)に記載の光検出装置。
(8)
前記診断部は、前記パルス信号が変化するタイミングに基づいて前記診断処理を行う
前記(7)に記載の光検出装置。
(9)
前記診断部は、前記パルス信号の変化の有無に基づいて前記診断処理を行う
前記(7)または(8)に記載の光検出装置。
(10)
前記第1の期間において、前記信号生成部は、前記受光素子の受光結果に応じた前記パルス信号を生成し、
前記検出部は、前記第1の期間において、前記パルス信号が変化するタイミングを検出することにより、前記受光素子の受光タイミングを検出する
前記(5)または(6)に記載の光検出装置。
(11)
複数の前記受光部を備え、
前記制御部は、前記複数の前記受光部のそれぞれの前記第1のスイッチおよび前記第2のスイッチの動作を制御し、
前記検出部は、前記複数の前記受光部がそれぞれ生成した複数の前記パルス信号に基づいて合成パルス信号を生成し、前記合成パルス信号が変化するタイミングを検出する
前記(1)から(10)のいずれかに記載の光検出装置。
(12)
複数の前記受光部を備え、
前記制御部は、前記複数の前記受光部のそれぞれの前記第1のスイッチおよび前記第2のスイッチの動作を制御し、
前記検出部は、前記複数の前記受光部がそれぞれ生成した複数の前記パルス信号に基づいて加算処理を行うことによりコードを生成し、前記コードが変化するタイミングを検出する
前記(1)から(10)のいずれかに記載の光検出装置。
(13)
前記光検出装置は、車両に搭載された
前記(1)から(12)のいずれかに記載の光検出装置。
(14)
光を射出する発光部と
前記発光部から射出された光のうちの、計測対象により反射された光を検出する光検出部と
を備え、
前記光検出部は、
受光素子と、オン状態になることにより前記受光素子と第1のノードとを接続する第1のスイッチと、オン状態になることにより前記第1のノードに所定の電圧を印加する第2のスイッチと、前記第1のノードの電圧に基づいてパルス信号を生成する信号生成部とを有する受光部と、
前記第1のスイッチおよび前記第2のスイッチの動作を制御する制御部と、
前記パルス信号に基づいて、前記パルス信号が変化するタイミングを検出する検出部と、
前記第2のスイッチをオン状態にしたときの前記検出部の検出結果に応じた検出信号を出力する出力部と
を有する
光検出システム。
Claims (14)
- 受光素子と、オン状態になることにより前記受光素子と第1のノードとを接続する第1のスイッチと、オン状態になることにより前記第1のノードに所定の電圧を印加する第2のスイッチと、前記第1のノードの電圧に基づいてパルス信号を生成する信号生成部とを有する受光部と、
前記第1のスイッチおよび前記第2のスイッチの動作を制御する制御部と、
前記パルス信号に基づいて、前記パルス信号が変化するタイミングを検出する検出部と、
前記第2のスイッチをオン状態にしたときの前記検出部の検出結果に応じた検出信号を出力する出力部と
を備えた光検出装置。 - 前記第2のスイッチをオン状態にしたときの前記検出部の検出結果に基づいて診断処理を行う診断部をさらに備え、
前記検出信号は、前記診断部の診断結果に応じた信号である
請求項1に記載の光検出装置。 - 前記検出信号は、前記受光部に不具合があるか否かを示す信号を含む
請求項2に記載の光検出装置。 - 前記検出信号は、前記受光部の不具合内容を示す信号を含む
請求項2に記載の光検出装置。 - 複数の第1の期間において、前記制御部は、前記第1のスイッチをオン状態にし、
前記複数の第1の期間のうちの隣り合う2つの前記第1の期間の間の第2の期間において、前記制御部は、前記第1のスイッチをオフ状態にするとともに前記第2のスイッチをオンオフし、
前記診断部は、前記第2の期間における前記検出部の検出結果に基づいて、前記診断処理を行う
請求項2に記載の光検出装置。 - 複数の第1の期間において、前記制御部は、前記第1のスイッチをオン状態にし、
前記複数の第1の期間のうちの隣り合う2つの前記第1の期間の間の第2の期間において、前記制御部は、前記第1のスイッチをオン状態にするとともに前記第2のスイッチをオンオフし、
前記診断部は、前記第2の期間における前記検出部の検出結果に基づいて、前記診断処理を行う
請求項2に記載の光検出装置。 - 前記第2の期間において、前記信号生成部は、前記第2のスイッチのオンオフに応じた前記パルス信号を生成し、
前記検出部は、前記第2の期間において、前記パルス信号が変化するタイミングを検出する
請求項5に記載の光検出装置。 - 前記診断部は、前記パルス信号が変化するタイミングに基づいて前記診断処理を行う
請求項7に記載の光検出装置。 - 前記診断部は、前記パルス信号の変化の有無に基づいて前記診断処理を行う
請求項7に記載の光検出装置。 - 前記第1の期間において、前記信号生成部は、前記受光素子の受光結果に応じた前記パルス信号を生成し、
前記検出部は、前記第1の期間において、前記パルス信号が変化するタイミングを検出することにより、前記受光素子の受光タイミングを検出する
請求項5に記載の光検出装置。 - 複数の前記受光部を備え、
前記制御部は、前記複数の前記受光部のそれぞれの前記第1のスイッチおよび前記第2のスイッチの動作を制御し、
前記検出部は、前記複数の前記受光部がそれぞれ生成した複数の前記パルス信号に基づいて合成パルス信号を生成し、前記合成パルス信号が変化するタイミングを検出する
請求項1に記載の光検出装置。 - 複数の前記受光部を備え、
前記制御部は、前記複数の前記受光部のそれぞれの前記第1のスイッチおよび前記第2のスイッチの動作を制御し、
前記検出部は、前記複数の前記受光部がそれぞれ生成した複数の前記パルス信号に基づいて加算処理を行うことによりコードを生成し、前記コードが変化するタイミングを検出する
請求項1に記載の光検出装置。 - 前記光検出装置は、車両に搭載された
請求項1に記載の光検出装置。 - 光を射出する発光部と
前記発光部から射出された光のうちの、計測対象により反射された光を検出する光検出部と
を備え、
前記光検出部は、
受光素子と、オン状態になることにより前記受光素子と第1のノードとを接続する第1のスイッチと、オン状態になることにより前記第1のノードに所定の電圧を印加する第2のスイッチと、前記第1のノードの電圧に基づいてパルス信号を生成する信号生成部とを有する受光部と、
前記第1のスイッチおよび前記第2のスイッチの動作を制御する制御部と、
前記パルス信号に基づいて、前記パルス信号が変化するタイミングを検出する検出部と、
前記第2のスイッチをオン状態にしたときの前記検出部の検出結果に応じた検出信号を出力する出力部と
を有する
光検出システム。
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