WO2022179619A1 - 双工器、抑制双工器高次谐振的方法以及电子设备 - Google Patents

双工器、抑制双工器高次谐振的方法以及电子设备 Download PDF

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WO2022179619A1
WO2022179619A1 PCT/CN2022/078002 CN2022078002W WO2022179619A1 WO 2022179619 A1 WO2022179619 A1 WO 2022179619A1 CN 2022078002 W CN2022078002 W CN 2022078002W WO 2022179619 A1 WO2022179619 A1 WO 2022179619A1
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end filter
order resonance
frequency
frequency end
low
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PCT/CN2022/078002
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French (fr)
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边子鹏
庞慰
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诺思(天津)微系统有限责任公司
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01—Frequency selective two-port networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/46—Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source

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  • the present invention relates to the technical field of filters, in particular to a duplexer, a method for suppressing high-order resonance of the duplexer, and an electronic device.
  • Patent CN112073018A proposes a method for improving out-of-band suppression of filters and duplexers, but the high-order resonance suppression circuit set at a node of the series path at the low-frequency end in this patent only improves the out-of-band suppression characteristics of the filter at the low-frequency end.
  • the high-order resonance suppression circuit set at a certain node of the high-frequency side series path only improves the out-of-band suppression characteristics of the high-frequency side filter.
  • a high-order resonance suppression circuit is set in each of the filter and the high-frequency filter; in addition, because the high-order resonance position of the low-frequency end filter and the high-order resonance position of the high-frequency end filter are different in conventional design, even in the antenna A high-order resonance suppression circuit is set at the end, and the suppression of the high-order resonance of the low-frequency end filter and the high-order resonance of the high-frequency end filter also needs to be compromised, and the improvement of the out-of-band suppression characteristics is limited.
  • the present invention provides a duplexer, a method for suppressing high-order resonance of a duplexer, and an electronic device, which are helpful for improving device performance, have the advantages of simple structure, and are suitable for miniaturized design.
  • the present invention provides the following technical solutions:
  • a duplexer comprising: a high-frequency end filter, a low-frequency end filter and a high-order resonance suppression circuit, wherein the series resonators in the high-frequency end filter are stacked in an approximately symmetrical structure, and the series resonators in the low-frequency end filter are stacked.
  • the resonators are stacked in an asymmetric structure, wherein the second high-order resonance pseudo-passband of the low-frequency side filter coincides with the second high-order resonance pseudo-passband of the high-frequency side filter, and the low-frequency side filter has a first high-order resonance pseudo passband;
  • the high-order resonance suppression circuit is arranged in parallel between the antenna terminal and the common terminal of the duplexer, and the high-order resonance suppression circuit has a first suppression zero point and a second suppression The zero point, the first suppression zero point is located at the first high-order resonance pseudo passband of the low-frequency end filter, and the second suppression zero point is located between the low-frequency end filter and the high-frequency end filter. at the second high-order resonance pseudo-passband that coincides.
  • the stacking asymmetry parameter of the series resonators in the high frequency end filter is smaller than the stacking asymmetry parameter of the series resonators in the low frequency end filter.
  • the stacking asymmetry parameter of the series resonators in the high-frequency end filter is less than 0.25.
  • the stacking asymmetry parameter of the series resonators in the low-frequency end filter is greater than or equal to 0.15.
  • the high-order resonance suppression circuit is composed of a resonator and an inductor in cascade.
  • the resonator in the high-order resonance suppression circuit is arranged in the same chip as the low-frequency filter or the high-frequency filter.
  • the resonators in the high-order resonance suppression circuit are FBAR, BAW or LWR resonators.
  • the resonators in the high-order resonance suppression circuit are composed of multiple resonators connected in series and/or in parallel.
  • the resonant frequency of at least one resonator in the plurality of resonators is different from the resonant frequency of other resonators.
  • An electronic device includes the duplexer of the present invention.
  • a method for suppressing high-order resonance of a duplexer comprising: setting the stack of first series resonators in a high-frequency end filter to an approximately symmetrical structure, and setting the stack of second series resonators in the low-frequency end filter to be asymmetrical
  • the structure is such that the second high-order resonance pseudo-passband of the low-frequency end filter coincides with the second high-order resonance pseudo-passband of the high-frequency end filter and the low-frequency end filter has the first high-order resonance pseudo-passband A passband;
  • a high-order resonance suppression circuit is arranged in parallel between the antenna terminal and the common terminal CT, wherein the high-order resonance suppression circuit has a first suppression zero point, so that the first suppression zero point is located at the low-frequency end filter at the first high-order resonance pseudo-passband, and the second high-order resonance pseudo-passband where the second suppression zero point is located at the coincidence of the low-frequency end filter and the high-frequency end filter place.
  • the stacking asymmetry parameter of the series resonators in the high frequency end filter is smaller than the stacking asymmetry parameter of the series resonators in the low frequency end filter.
  • the calculation formula of the stacking asymmetry parameter is:
  • D is the density of the passivation layer
  • D is the density of the top electrode
  • D is the density of the bottom electrode
  • T is the thickness of the passivation layer
  • T is the density of the top electrode thickness
  • T bottom is the thickness of the bottom electrode.
  • the asymmetric characteristics of the high-frequency end filter and the low-frequency end filter are designed so that the corresponding second high-order resonance pseudo-passbands of the two overlap, and then only a high-order resonance suppression circuit is added at the antenna end.
  • the simultaneous suppression of high-order resonance of the low-frequency end filter and the high-frequency end filter is realized, which maximizes the out-of-band suppression of the duplexer, which is beneficial to the miniaturization of device design.
  • Figure 1 is a schematic diagram of a thin film bulk acoustic resonator
  • Fig. 2 is the schematic diagram of the impedance real part frequency characteristic curve of the thin film bulk acoustic wave resonator
  • Figure 3 is a comparison diagram of the impedance real part frequency characteristic curves of resonators with different stacked asymmetric coefficients
  • Fig. 4(a) is a circuit architecture diagram of a prior art duplexer
  • Fig. 4(b) is an insertion loss frequency characteristic curve corresponding to Fig. 4(a);
  • FIG. 5(a), FIG. 5(b), FIG. 5(c), FIG. 5(d) and FIG. 5(e) are the circuit structure diagram of the duplexer and the antenna in the duplexer according to the first embodiment of the present invention
  • FIG. 6 is a circuit structure diagram of a duplexer according to a second embodiment of the present invention.
  • Figure 7(a) and Figure 7(b) are respectively the first realization structure and AA' cross-sectional view of the LWR resonator;
  • Fig. 8(a) and Fig. 8(b) are respectively the second realization structure of the LWR resonator and the AA' sectional view.
  • FIG. 1 is a schematic diagram of a thin film bulk acoustic wave resonator, and the area between the two dashed lines is the effective resonance area.
  • the optional material for the substrate 31 is single crystal silicon, gallium arsenide, sapphire, quartz, and the like.
  • the piezoelectric thin film layer 32 can be selected from materials such as single crystal aluminum nitride, polycrystalline aluminum nitride, zinc oxide, PZT, etc., and contains rare earth element doped materials with a certain atomic ratio of the above materials.
  • the bottom electrode 33 can be selected from metals such as molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, and chromium.
  • the top electrode 34 (including a mass loading layer) can be selected from metals such as molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, and chromium, wherein the top electrode includes a mass loading layer.
  • the acoustic mirror 35 is shown as a cavity in this figure. It can also be a Bragg reflector.
  • the passivation layer 36 can be selected from materials such as single crystal aluminum nitride, polycrystalline aluminum nitride, zinc oxide, PZT, etc., and contains rare earth element doped materials with a certain atomic ratio of the above materials.
  • FIG. 2 is a schematic diagram of an impedance frequency characteristic curve of a thin film bulk acoustic wave resonator.
  • the parallel resonance frequency fp of due to the structural characteristics of the BAW resonator itself, the resonator will generate high-order resonance (first high-order resonance, second high-order resonator, etc.) at the high-frequency end while generating the main resonance.
  • Figure 2 only shows The first high-order resonance and the second high-order resonance are discussed, and the frequency position and strength of the high-order resonance are related to the symmetry of the resonator stack.
  • the calculation formula of the resonator stack asymmetry parameter s is as follows:
  • D is the density of the passivation layer
  • D is the density of the top electrode
  • D is the density of the bottom electrode
  • T is the thickness of the passivation layer
  • T is the density of the top electrode thickness
  • T bottom is the thickness of the bottom electrode.
  • Figure 3 is a comparison diagram of the impedance real part frequency characteristic curves of different stacked asymmetric parametric resonators.
  • the solid line in the figure is the corresponding curve of the resonator Res-1, and the resonator is stacked in an approximately symmetrical structure; the dotted line in the figure is the corresponding curve of the resonator Res-2, and the resonator is stacked in an asymmetric structure. It can be seen from the figure that as the stacking asymmetry of the resonator increases, the second high-order resonance of the resonator moves to the high-frequency end, while the first high-order resonance gradually increases.
  • FIG. 4( a ) is a circuit structure diagram of a prior art duplexer.
  • the low-frequency end filter D1 is a ladder-type structure filter composed of series resonators S11 ⁇ S14 and parallel resonators P12 ⁇ P13, L3 and L4 are parallel branch grounding inductances, and the low-frequency end filter D1 passes the input (output) end inductance L1 and the output (input) end inductor L2 and the common end CT and the low frequency end filter signal output (input) port LT respectively.
  • the high-frequency end filter D2 is a ladder structure filter composed of series resonators S21 ⁇ S24 and parallel resonators P21 ⁇ P24, L7 and L8 are parallel branch ground inductances, and the high-frequency end filter D2 passes through the input (output) end
  • the inductor L5 and the output (input) end inductor L6 are respectively connected to the common end CT and the high frequency end filter signal output (input) port HT.
  • the parallel ground inductor LM is connected between the common terminal CT and the antenna ANT.
  • FIG. 4(b) is a frequency characteristic curve of insertion loss of the prior art duplexer shown in FIG. 4(a).
  • the series resonator stacks of the low-frequency end filter and the high-frequency end filter adopt an approximately symmetrical structure.
  • the asymmetry parameters of the series resonators in the low-frequency end filter and the high-frequency end filter are not greater than 0.15.
  • the pseudo passband 50 is formed by the second high-order resonance of the resonator in the low-frequency filter
  • the pseudo-passband 51 is formed by the second high-order resonance of the resonator in the high-frequency filter.
  • the pseudopassband 50 and the pseudopass The belts 51 are spaced away from each other. The existence of the pseudo passband seriously affects the out-of-band rejection characteristics of the filter, resulting in the filter's poor rejection of noise or other interfering signals at this frequency band.
  • FIG. 5( a ) is a circuit structure diagram of a duplexer according to the first embodiment of the present invention.
  • the low-frequency end filter D1 is a ladder-type structure filter composed of series resonators S11 ⁇ S14 and parallel resonators P12 ⁇ P13, L3 and L4 are parallel branch ground inductances, and the signal input (output) end of the low-frequency end filter D1 is connected to the common
  • the terminal CT is connected, and the signal output (input) terminal is connected to the low-frequency filter signal output (input) port LT through the inductor L2.
  • the high-frequency end filter D2 is a ladder structure filter composed of series resonators S21 ⁇ S24 and parallel resonators P21 ⁇ P24, L7 and L8 are parallel branch grounding inductors, and the signal input (output) of the high-frequency end filter D2
  • the port is connected to the common terminal CT through the inductor L5, and the signal output (input) terminal is connected to the signal output (input) port HT of the high-frequency filter D2 through the inductor L6.
  • the antenna terminal high-order resonance suppression circuit is connected in parallel between the common terminal CT and the antenna terminal.
  • the position of the first suppression zero point of the high-order resonance suppression circuit is determined by the series resonance frequency of the resonator and the LS inductance, and the position of the second suppression zero point is jointly determined by the plate capacitance of the resonator R-HSC and the LS inductance.
  • the resonator R-HSC in the high-order resonance suppression circuit at the antenna end can also be set on the same chip as the high-frequency filter D2.
  • the duplexer in the first embodiment of the present invention adds a high-order resonance suppression circuit at the antenna end as shown in FIG. Finely set up so that the duplexer satisfies the following conditions: 1
  • the series resonators in the high-frequency end filter are stacked in an approximately symmetrical structure, and the series resonators in the low-frequency end filter are stacked in an asymmetrical structure.
  • the second high-order resonance pseudo-passband of the high-order resonance pseudo-passband coincides with the second high-order resonance pseudo-passband of the high-frequency end filter, and the low-frequency end filter has the first high-order resonance pseudopassband;
  • the high-order resonance suppression circuit between the antenna end and the common end has a first suppression zero point and a second suppression zero point. It is located at the coincident second high-order resonance pseudo-passband of the low-frequency side filter and the high-frequency side filter.
  • the series resonator stack in the high-frequency filter For example, set the series resonator stack in the high-frequency filter to an approximately symmetrical structure (take B5 (that is, Band 5 duplexer, its transmitting frequency band is 824-849MHz, and its receiving frequency band is 869-894MHz) as an example.
  • the parallel resonator stack structure (stack) sets a mass load layer on the basis of the series resonator stack, and the mass load layer is adjacent to the top electrode (
  • the high-frequency end filter and the low-frequency end filter of the duplexer according to the first embodiment of the present invention satisfy S1 ⁇ S3, and the insertion loss frequency characteristic curve is shown in Figure 5(c).
  • the resonance pseudo-passband coincides with the second high-order resonance pseudo-passband of the high-frequency filter.
  • the first high-order resonance of the resonator in the low-frequency filter is enhanced. , so that the low-frequency end filter generates a first high-order resonance pseudo-passband, as shown by 53 in Fig. 5(c).
  • the insertion loss frequency characteristic curve of the high-order resonance suppression circuit in the duplexer of this embodiment is shown in Fig.
  • the high-order resonance suppression circuit set at the antenna end realizes the simultaneous suppression of the high-order resonance of the low-frequency end filter and the high-frequency end filter.
  • the insertion loss frequency characteristic curve of the duplexer according to the first embodiment of the present invention is shown in FIG. 5(e).
  • the thick solid line is the insertion loss frequency characteristic curve of the high-frequency end filter
  • the dotted line is the insertion loss frequency characteristic curve of the low-frequency end filter
  • the thin solid line is the insertion loss frequency characteristic curve of the high-order resonance suppression circuit at the antenna end.
  • FIG. 6 is a circuit structure diagram of a duplexer according to a second embodiment of the present invention.
  • the difference lies in that the resonator R-HSC in the high-order resonance suppression circuit at the antenna end is realized by using an LWR resonator.
  • the resonator R-HSC in the high-order resonance suppression circuit at the antenna end can also be set on the same chip as the high-frequency filter D2.
  • Figure 7(a) shows the first implementation structure of the resonator R-HSC in the medium and high-order resonance suppression circuit of the present invention using an LWR resonator
  • Figure 7(b) shows the LWR resonator shown in Figure 7(a).
  • the resonance frequency of the LWR resonator is determined by the width and spacing of the interdigital electrodes.
  • Fig. 8(a) shows the second implementation structure of the resonator R-HSC in the medium and high-order resonance suppression circuit of the present invention using an LWR resonator
  • Fig. 8(b) shows the LWR resonator shown in Fig. 8(a).
  • the resonance suppression circuit realizes the simultaneous suppression of the high-order resonance of the low-frequency end filter and the high-frequency end filter, which maximizes the out-of-band suppression of the duplexer and is beneficial to the miniaturization of device design.
  • the technical solution is applied to electronic equipment and also helps to improve its performance.

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Abstract

本发明公开了一种双工器、抑制双工器高次谐振的方法以及电子设备。该双工器包括：高频端滤波器、低频端滤波器和高次谐振抑制电路，其中，高频端滤波器中的串联谐振器层叠为近似对称结构，低频端滤波器中的串联谐振器层叠为非对称结构，其中，低频端滤波器的第二高次谐振伪通带与高频端滤波器的第二高次谐振伪通带重合，并且低频端滤波器具有第一高次谐振伪通带；高次谐振抑制电路并联地设置在双工器的天线端和公共端之间，高次谐振抑制电路具有第一抑制零点和第二抑制零点，第一抑制零点位于低频端滤波器的第一高次谐振伪通带处，第二抑制零点位于低频端滤波器和高频端滤波器的重合的第二高次谐振伪通带处。

Description

双工器、抑制双工器高次谐振的方法以及电子设备 技术领域
本发明涉及滤波器技术领域，特别地涉及一种双工器、抑制双工器高次谐振的方法以及电子设备。
背景技术
近年来的通信设备小型化和高性能趋势的加快，给射频前端提出了更高的挑战。在射频通信前端中，一方面需要通过减小芯片和封装基板的尺寸来实现小型化，另一方面需要有更好的谐振器配合设计来实现更好的性能。
专利CN112073018A提出了一种改善滤波器以及双工器带外抑制的方法，但是该专利设置在低频端串联路径某一节点处的高次谐振抑制电路只改善低频端滤波器的带外抑制特性，设置在高频端串联路径某一节点处的高次谐振抑制电路只改善高频端滤波器的带外抑制特性，若实现低频端滤波器和高频滤波器高次谐振的同时抑制需要在低频滤波器和高频滤波器中各设置一个高次谐振抑制电路；另外，由于常规设计时低频端滤波器的高次谐振位置和高频端滤波器的高次谐振位置是不同的，即使在天线端设置一个高次谐振抑制电路，对低频端滤波器的高次谐振和高频端滤波器的高次谐振的抑制也需要进行折衷考虑，对带外抑制特性的提升有限。
发明内容
有鉴于此，本发明提供了一种双工器、抑制双工器高次谐振的方法以及电子设备，有助于改善器件性能，具有结构简单，适应小型化设计的优点。本发明提供如下技术方案：
一种双工器，包括：高频端滤波器、低频端滤波器和高次谐振抑制电 路，其中，高频端滤波器中的串联谐振器层叠为近似对称结构，低频端滤波器中的串联谐振器层叠为非对称结构，其中，低频端滤波器的第二高次谐振伪通带与所述高频端滤波器的第二高次谐振伪通带重合，并且所述低频端滤波器具有第一高次谐振伪通带；所述高次谐振抑制电路并联地设置在所述双工器的天线端和公共端之间，所述高次谐振抑制电路具有第一抑制零点和第二抑制零点，所述第一抑制零点位于所述低频端滤波器的所述第一高次谐振伪通带处，所述第二抑制零点位于所述低频端滤波器和所述高频端滤波器的重合的所述第二高次谐振伪通带处。
可选地，所述高频端滤波器中的串联谐振器的层叠不对称性参数小于所述低频端滤波器中的所述串联谐振器的层叠不对称性参数。
可选地，所述高频端滤波器中的串联谐振器的层叠不对称性参数小于0.25。
可选地，所述低频端滤波器中的串联谐振器的层叠不对称性参数大于等于0.15。
可选地，所述高次谐振抑制电路由谐振器和电感器级联组成。
可选地，所述高次谐振抑制电路中的谐振器与所述低频端滤波器或者与所述高频端滤波器设置在同一颗芯片内。
可选地，所述高次谐振抑制电路中的谐振器为FBAR、BAW或LWR谐振器。
可选地，所述高次谐振抑制电路中的谐振器由多个谐振器通过串和/或并联方式连接组成。
可选地，所述多个谐振器中至少存在一个谐振器的谐振频率与其他谐 振器的谐振频率不同。
一种电子设备，包含本发明所述的双工器。
一种抑制双工器高次谐振的方法，包括：将高频端滤波器中第一串联谐振器层叠设置为近似对称结构，并且将低频端滤波器中第二串联谐振器层叠设置为非对称结构，使得所述低频端滤波器的第二高次谐振伪通带与所述高频端滤波器的第二高次谐振伪通带重合并且所述低频端滤波器具有第一高次谐振伪通带；在天线端和公共端CT之间并联设置高次谐振抑制电路，其中，所述高次谐振抑制电路具有第一抑制零点，以使所述第一抑制零点位于所述低频端滤波器的所述第一高次谐振伪通带处，并且以使所述第二抑制零点位于所述低频端滤波器和所述高频端滤波器的重合的所述第二高次谐振伪通带处。
可选地，所述高频端滤波器中的串联谐振器的层叠不对称性参数小于所述低频端滤波器中的所述串联谐振器的层叠不对称性参数。
可选地，所述层叠不对称性参数的计算公式为：
Figure PCTCN2022078002-appb-000001
其中，s为层叠不对称性参数，D 钝为钝化层的密度，D 顶为顶电极的密度，D 底为底电极的密度，T 钝为钝化层的厚度，T 顶为顶电极的厚度，T 底为底电极的厚度。
根据本发明的技术方案，通过设计高频端滤波器和低频端滤波器的不对称特性使得二者对应的第二高次谐振伪通带重合，然后在天线端仅增加一个高次谐振抑制电路实现了低频端滤波器和高频端滤波器高次谐振同时抑制，最大程度上的使得双工器带外抑制提升，有利于器件设计小型化。
附图说明
附图用于更好地理解本发明，不构成对本发明的不当限定。其中：
图1为薄膜体声波谐振器示意图
图2为薄膜体声波谐振器的阻抗实部频率特性曲线示意图；
图3为不同层叠不对称系数的谐振器的阻抗实部频率特性曲线对比图；
图4(a)为现有技术双工器的电路架构图，图4(b)为图4(a)对应的插损频率特性曲线；
图5(a)、图5(b)、图5(c)、图5(d)以及图5(e)为本发明第一实施例的双工器的电路架构图、双工器内天线端高次谐振抑制电路示意图、高频端滤波器和低频端滤波器的插损频率特性曲线图、高次谐振抑制电路的插损频率特性曲线以及双工器的插损频率特性曲线图；
图6为本发明第二实施例的双工器的电路架构图；
图7(a)和图7(b)分别为LWR谐振器的第一种实现结构及AA’剖面图；
图8(a)和图8(b)分别为LWR谐振器的第二种实现结构及AA’剖面图。
具体实施方式
以下结合附图对本发明实施方式作具体说明。
图1为薄膜体声波谐振器示意图，图示两条虚线之间区域为谐振有效区。
衬底31，可选材料为单晶硅、砷化镓、蓝宝石、石英等。
压电薄膜层32，可选材料为单晶氮化铝、多晶氮化铝、氧化锌、PZT等材料并包含上述材料的一定原子比的稀土元素掺杂材料。
底电极33，可选材料为钼、钌、金、铝、镁、钨、铜、钛、铱、锇、铬等金属。
顶电极34(包含质量负载层)，可选材料为钼、钌、金、铝、镁、钨、铜，钛、铱、锇、铬等金属，其中顶电极包含质量负载层。
声学镜35，此图示意为一空腔。也可为一布拉格反射层。
钝化层36，可选材料为单晶氮化铝、多晶氮化铝、氧化锌、PZT等材 料并包含上述材料的一定原子比的稀土元素掺杂材料。
图2为薄膜体声波谐振器的阻抗频率特性曲线示意图。薄膜体声波谐振器的主谐振存在两个谐振频点：一个是谐振器主谐振阻抗值达到极小值时的串联谐振频点fs；另一个是当谐振器主谐振阻抗值达到极大值时的并联谐振频点fp。另外，由于体声波谐振器本身结构特点，谐振器在产生主谐振的同时会在高频端产生高次谐振(第一高次谐振、第二高次谐振器等等)，图2只示出了第一高次谐振和第二高次谐振，高次谐振的频率位置以及强弱与谐振器层叠(stack)的对称性有关。谐振器层叠非对称性参数s的计算公式如下：
Figure PCTCN2022078002-appb-000002
其中，s为层叠不对称性参数，D 钝为钝化层的密度，D 顶为顶电极的密度，D 底为底电极的密度，T 钝为钝化层的厚度，T 顶为顶电极的厚度，T 底为底电极的厚度。谐振器的s数值越s越小，其对称性越好，第一高次谐振越弱。
如图3所示为不同层叠不对称性参数谐振器的阻抗实部频率特性曲线对比图。图中实线为谐振器Res-1对应曲线，其谐振器层叠为一近似对称结构；图中虚线为谐振器Res-2对应曲线，其谐振器层叠为一非对称结构。由图可见，随着谐振器层叠不对称性的增加，谐振器第二高次谐振向高频端移动，同时第一高次谐振逐渐增强。
图4(a)为现有技术双工器的电路架构图。低频端滤波器D1为串联谐振器S11～S14和并联谐振器P12～P13组成的梯型结构滤波器，L3和L4为并联支路接地电感，低频端滤波器D1通过输入(输出)端电感L1和输出(输入)端电感L2分别与公共端CT和低频端滤波器信号输出(输入)端口LT之间。高频端滤波器D2为串联谐振器S21～S24和并联谐振器P21～P24组成的梯型结构滤波器，L7和L8为并联支路接地电感，高频端 滤波器D2通过输入(输出)端电感L5和输出(输入)端电感L6分别与公共端CT和高频端滤波器信号输出(输入)端口HT之间。并联接地电感LM连接于公共端CT与天线ANT之间。
图4(b)为图4(a)所示的现有技术双工器插损频率特性曲线。其中低频端滤波器和高频端滤波器的串联谐振器层叠均采用近似对称结构，例如，低频端滤波器和高频端滤波器中的串联谐振器的不对称参数不大于0.15。伪通带50由低频端滤波器中谐振器的第二高次谐振形成，伪通带51由高频端滤波器中谐振器的第二高次谐振形成，此时伪通带50和伪通带51相互远离。伪通带的存在严重影响滤波器的带外抑制特性，导致滤波器在此频带处对噪声或其他干扰信号的抑制特性较差。
图5(a)为本发明第一实施例双工器电路架构图。低频端滤波器D1为串联谐振器S11～S14和并联谐振器P12～P13组成的梯型结构滤波器，L3和L4为并联支路接地电感，低频端滤波器D1信号输入(输出)端与公共端CT相连，信号输出(输入)端通过电感L2与低频端滤波器信号输出(输入)端口LT相连。高频端滤波器D2为串联谐振器S21～S24和并联谐振器P21～P24组成的梯型结构滤波器，L7和L8为并联支路接地电感，高频端滤波器D2的信号输入(输出)端口通过电感L5与公共端CT相连，信号输出(输入)端通过电感L6与高频端滤波器D2信号输出(输入)端口HT相连。公共端CT与天线端之间并联天线端高次谐振抑制电路。高次谐振抑制电路的第一抑制零点的位置由谐振器的串联谐振频点和LS电感量决定，第二抑制零点位置由谐振器R-HSC的平板电容和LS电感量共同决定。天线端高次谐振抑制电路中谐振器R-HSC也可与高频滤波器D2设置在同一颗芯片上。
本发明第一实施例中的双工器比现有技术双工器相比，一方面增加了如图5(b)所示的天线端高次谐振抑制电路，另一方面在器件设计上通过精细设置，以使双工器满足以下条件：①高频端滤波器中的串联谐振器层叠为近似对称结构，低频端滤波器中的串联谐振器层叠为非对称结构，其 中，低频端滤波器的第二高次谐振伪通带与高频端滤波器的第二高次谐振伪通带重合，并且低频端滤波器具有第一高次谐振伪通带；②并联地设置在双工器的天线端和公共端之间的高次谐振抑制电路具有第一抑制零点和第二抑制零点，其第一抑制零点位于低频端滤波器的第一高次谐振伪通带处，其第二抑制零点位于低频端滤波器和高频端滤波器的重合的第二高次谐振伪通带处。
例如，将高频端滤波器中串联谐振器stack设置为一近似对称结构(以B5(即Band 5双工器，其发射频段在824-849MHz，接收频段在869-894MHz)为例，高频端滤波器中串联谐振器的非对称性参数S1例如为S1＝0.015)，并联谐振器层叠结构(stack)在串联谐振器stack基础上设置一质量负载层，质量负载层与顶电极相邻(以B5为例，高频端滤波器中并联谐振器的非对称性参数S2例如为S2＝0.134)。将低频端滤波器中串联谐振器stack设置为一非对称结构(以B5为例，低频端滤波器中串联谐振器的非对称性参数S3例如为S3＝0.25)，并联谐振器stack在串联谐振器stack基础上设置一质量负载层，质量负载层与顶电极相邻(以B5为例，低频端滤波器中并联谐振器的非对称性参数S4例如为S4＝0.35)。本发明第一实施例的双工器的高频端滤波器和低频端滤波器满足S1<S3，其插损频率特性曲线如图5(c)所示，低频端滤波器的第二高次谐振伪通带与高频端滤波器的第二高次谐振伪通带重合，此时由于低频端滤波器中谐振器的不对称性使得低频端滤波器中谐振器的第一高次谐振增强，从而低频端滤波器产生一个第一高次谐振伪通带，如图5(c)中53所示。该实施例的双工器中的高次谐振抑制电路的插损频率特性曲线如图5(d)所示，其中，第一抑制零点位于低频端滤波器的第一高次谐振伪通带处，使第二抑制零点位于低频端滤波器和高频端滤波器的第二高次谐振伪通带处。即天线端设置的高次谐振抑制电路实现低频端滤波器和高频端滤波器高次谐振的同时抑制。
本发明第一实施例所示双工器插损频率特性曲线如图5(e)所示。粗实线为高频端滤波器插损频率特性曲线，虚线为低频端滤波器插损频率特 性曲线，细实线为天线端高次谐振抑制电路插损频率特性曲线。通过对低频端滤波器中谐振器stack的调整和在天线端设置一个高次谐振抑制电路，可以实现对低频端滤波器和高频端滤波器高次谐振的同时抑制，高次谐振抑制可提升15-30dB。
如图6所示为本发明第二实施例双工器电路架构图。与本发明第一实施例双工器相比，区别在于天线端高次谐振抑制电路中谐振器R-HSC采用LWR谐振器实现。天线端高次谐振抑制电路中谐振器R-HSC也可与高频滤波器D2设置在同一颗芯片上。
如图7(a)所示为本发明中高次谐振抑制电路中谐振器R-HSC采用LWR谐振器的第一种实现结构，图7(b)为图7(a)所示的LWR谐振器的第一种实现结构在AA’位置的截面图。LWR谐振器的谐振频点由叉指电极的宽度和间距决定。
如图8(a)所示为本发明中高次谐振抑制电路中谐振器R-HSC采用LWR谐振器的第二种实现结构，图8(b)为图8(a)所示的LWR谐振器的第二种实现结构在AA’位置的截面图。LWR谐振器的谐振频点由叉指电极的宽度和间距决定。
根据本发明实施方式的技术方案，通过精细设计高频端滤波器和低频端滤波器的不对称特性使得二者对应的第二高次谐振伪通带重合，然后在天线端仅增加一个高次谐振抑制电路实现了低频端滤波器和高频端滤波器高次谐振同时抑制，最大程度上的使得双工器带外抑制提升，有利于器件设计小型化。该技术方案应用于电子设备中，同样有助于提高其性能。
上述具体实施方式，并不构成对本发明保护范围的限制。本领域技术人员应该明白的是，取决于设计要求和其他因素，可以发生各种各样的修改、组合、子组合和替代。任何在本发明的精神和原则之内所作的修改、等同替换和改进等，均应包含在本发明保护范围之内。

Claims (13)

  1. 一种双工器，其特征在于，包括：高频端滤波器、低频端滤波器和高次谐振抑制电路，其中，
    高频端滤波器中的串联谐振器层叠为近似对称结构，低频端滤波器中的串联谐振器层叠为非对称结构，其中，低频端滤波器的第二高次谐振伪通带与所述高频端滤波器的第二高次谐振伪通带重合，并且所述低频端滤波器具有第一高次谐振伪通带；
    所述高次谐振抑制电路并联地设置在所述双工器的天线端和公共端之间，所述高次谐振抑制电路具有第一抑制零点和第二抑制零点，所述第一抑制零点位于所述低频端滤波器的所述第一高次谐振伪通带处，所述第二抑制零点位于所述低频端滤波器和所述高频端滤波器的重合的所述第二高次谐振伪通带处。
  2. 根据权利要求1所述的双工器，其特征在于，所述高频端滤波器中的串联谐振器的层叠不对称性参数小于所述低频端滤波器中的所述串联谐振器的层叠不对称性参数。
  3. 根据权利要求2所述的双工器，其特征在于，所述高频端滤波器中的串联谐振器的层叠不对称性参数小于0.25。
  4. 根据权利要求2或3所述的双工器，其特征在于，所述低频端滤波器中的串联谐振器的层叠不对称性参数大于等于0.15。
  5. 根据权利要求1所述的双工器，其特征在于，所述高次谐振抑制电路由谐振器和电感器级联组成。
  6. 根据权利要求5所述的双工器，其特征在于，所述高次谐振抑制电路中的谐振器与所述低频端滤波器或者与所述高频端滤波器设置在同 一颗芯片内。
  7. 根据权利要求5所述的双工器，其特征在于，所述高次谐振抑制电路中的谐振器为FBAR、BAW或LWR谐振器。
  8. 根据权利要求5所述的双工器，其特征在于，所述高次谐振抑制电路中的谐振器由多个谐振器通过串和/或并联方式连接组成。
  9. 根据权利要求8所述的双工器，其特征在于，所述多个谐振器中至少存在一个谐振器的谐振频率与其他谐振器的谐振频率不同。
  10. 一种电子设备，其特征在于，包含权利要求1至9中任一项所述的双工器。
  11. 一种抑制双工器高次谐振的方法，其特征在于，包括：
    将高频端滤波器中第一串联谐振器层叠设置为近似对称结构，并且将低频端滤波器中第二串联谐振器层叠设置为非对称结构，使得所述低频端滤波器的第二高次谐振伪通带与所述高频端滤波器的第二高次谐振伪通带重合并且所述低频端滤波器具有第一高次谐振伪通带；
    在天线端和公共端CT之间并联设置高次谐振抑制电路，其中，所述高次谐振抑制电路具有第一抑制零点，以使所述第一抑制零点位于所述低频端滤波器的所述第一高次谐振伪通带处，并且以使所述第二抑制零点位于所述低频端滤波器和所述高频端滤波器的重合的所述第二高次谐振伪通带处。
  12. 根据权利要求11所述的方法，其特征在于，所述高频端滤波器中的串联谐振器的层叠不对称性参数小于所述低频端滤波器中的所述串联谐振器的层叠不对称性参数。
  13. 根据权利要求12所述的方法，其特征在于，所述层叠不对称性 参数的计算公式为：
    Figure PCTCN2022078002-appb-100001
    其中，s为层叠不对称性参数，D 钝为钝化层的密度，D 顶为顶电极的密度，D 底为底电极的密度，T 钝为钝化层的厚度，T 顶为顶电极的厚度，T 底为底电极的厚度。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090002095A1 (en) * 2007-06-29 2009-01-01 Nihon Dempa Kogyo Co., Ltd. Antenna Branching Filter
CN109391242A (zh) * 2017-08-03 2019-02-26 株式会社村田制作所 复合型滤波器装置、高频前端电路以及通信装置
CN110943711A (zh) * 2019-11-06 2020-03-31 天津大学 一种双工器以及电子设备
CN111478679A (zh) * 2020-06-15 2020-07-31 上海芯波电子科技有限公司 一种基于saw和baw的高性能双工器
CN111600574A (zh) * 2019-08-30 2020-08-28 天津大学 一种体声波滤波器及其带外抑制改善方法
CN112073018A (zh) * 2020-05-28 2020-12-11 诺思(天津)微系统有限责任公司 滤波器、双工器、多工器以及通信设备

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090002095A1 (en) * 2007-06-29 2009-01-01 Nihon Dempa Kogyo Co., Ltd. Antenna Branching Filter
CN109391242A (zh) * 2017-08-03 2019-02-26 株式会社村田制作所 复合型滤波器装置、高频前端电路以及通信装置
CN111600574A (zh) * 2019-08-30 2020-08-28 天津大学 一种体声波滤波器及其带外抑制改善方法
CN110943711A (zh) * 2019-11-06 2020-03-31 天津大学 一种双工器以及电子设备
CN112073018A (zh) * 2020-05-28 2020-12-11 诺思(天津)微系统有限责任公司 滤波器、双工器、多工器以及通信设备
CN111478679A (zh) * 2020-06-15 2020-07-31 上海芯波电子科技有限公司 一种基于saw和baw的高性能双工器

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