WO2022142364A1 - 光罩摆放误差校正方法和装置 - Google Patents

光罩摆放误差校正方法和装置 Download PDF

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Publication number
WO2022142364A1
WO2022142364A1 PCT/CN2021/112416 CN2021112416W WO2022142364A1 WO 2022142364 A1 WO2022142364 A1 WO 2022142364A1 CN 2021112416 W CN2021112416 W CN 2021112416W WO 2022142364 A1 WO2022142364 A1 WO 2022142364A1
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Prior art keywords
exposure
offset
wafer
mask
photomask
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PCT/CN2021/112416
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English (en)
French (fr)
Inventor
张秀璇
孔志能
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长鑫存储技术有限公司
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Priority to US17/628,484 priority Critical patent/US20230375917A1/en
Publication of WO2022142364A1 publication Critical patent/WO2022142364A1/zh

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/72—Repair or correction of mask defects
    • G03F1/74—Repair or correction of mask defects by charged particle beam [CPB], e.g. focused ion beam
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/70—Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/82—Auxiliary processes, e.g. cleaning or inspecting
    • G03F1/84—Inspecting
    • G03F1/86—Inspecting by charged particle beam [CPB]
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/30—Computing systems specially adapted for manufacturing

Definitions

  • the present application relates to semiconductor manufacturing technology, and more particularly, to a method and device for correcting photomask placement errors.
  • the lithography process is a crucial process step.
  • the lithography process includes cleaning and drying on the wafer surface, priming, spin coating photoresist, soft baking, alignment exposure, post-baking, hard baking, etching, etc., so as to form precise circuit patterns on the wafer surface .
  • multiple exposures are required, and one exposure is used to make a photomask, which can also be understood as photomask exposure.
  • the desired pattern is engraved on the quartz wafer with an electron beam.
  • the patterned quartz wafer is the required mask.
  • an ultraviolet beam is used to pass through the mask, and the pattern engraved on the mask is irradiated on the photoresist on the surface of the wafer to form a specific circuit pattern.
  • the present application provides a mask placement error correction method and device, which are used to obtain the exposure offset during wafer exposure and inversely deduce the compensation offset during the next mask fabrication, so that mask fabrication can be offset.
  • the fixed offset itself corrects the placement error of the photomask. By correcting the placement error of the photomask, the stacking error existing in the photolithography process of the semiconductor device is reduced.
  • the present application provides a method for correcting a mask placement error, including:
  • the wafer exposure is a process in which the surface of the wafer is exposed to form a circuit pattern
  • the exposure offset amount determine the compensation offset amount in the next photomask production, so as to correct the placement error of the photomask
  • the compensation offset and the exposure offset are both vector values, and the values are equal in value and opposite in direction.
  • the mask placement error correction method provided in this embodiment can obtain the exposure offset during wafer exposure, and inversely deduce the compensation offset during the next mask fabrication, so as to offset the fixed existence of mask fabrication itself.
  • the offset is corrected to correct the placement error of the mask.
  • the wafer is exposed, and the position of the obtained circuit pattern is consistent with the preset pattern position, which solves the problem that the semiconductor device cannot achieve the expected effect due to the placement error of the photomask.
  • the present application provides a method for making a photomask, which is applied to an exposure machine when producing a photomask, including:
  • the compensation offset during reticle exposure the compensation offset and the exposure offset during wafer exposure are both vector values, and the values are equal and opposite in direction; the wafer exposure is completed after the last reticle fabrication Then, the wafer exposure is a process in which the surface of the wafer is exposed to form a circuit pattern;
  • the mask is produced using the compensation offset amount as an exposure reference.
  • the method provided in this embodiment can be used to correct the placement error of the mask of the circuit pattern of the next layer of the circuit pattern of any layer when the wafer indicates that any layer of circuit patterns is formed, and can be based on compensation during mask fabrication.
  • the offset is set to eliminate the placement error of the photomask, so as to reduce the stacking error existing in the photolithography process of the semiconductor device.
  • a photomask placement error correction device comprising:
  • the acquisition module is used to acquire the exposure offset during the exposure of the wafer after the fabrication of the photomask is completed, and the wafer exposure is a process in which the surface of the wafer is exposed to form a circuit pattern;
  • a determining module configured to determine a compensation offset for the next photomask production according to the exposure offset, so as to correct the placement error of the photomask
  • the compensation offset and the exposure offset are both vector values, and the values are equal in value and opposite in direction.
  • a photomask manufacturing device comprising:
  • the receiving module is used for receiving the compensation offset when the photomask is made, the compensation offset and the exposure offset during wafer exposure are both vector values, and the values are equal and opposite in direction; the wafer is exposed on the top After the first mask is made, the wafer exposure is a process in which the wafer surface is exposed to form a circuit pattern;
  • the exposure module is used for making the photomask with the compensation offset as an exposure reference.
  • the present application provides a terminal device, including a memory, a processor and a transceiver, where the memory is used for storing instructions, the transceiver is used for communicating with other devices, and the processor is used for executing the storage in the memory , so that the terminal device executes the mask placement error correction method according to the first aspect.
  • the present application provides a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and when the instructions are executed, the computer is made to execute the mask pendulum according to the first aspect. error correction method.
  • the present application provides a computer program product, including a computer program, when the computer program is executed by a processor, the method for correcting a mask placement error according to the first aspect is implemented.
  • FIG. 1 is a schematic diagram of an application scenario of a mask placement error correction method provided by the present application.
  • FIG. 2 is a schematic flowchart of a method for correcting a mask placement error provided in Embodiment 1 of the present application.
  • FIG. 3 is a schematic diagram of a method for correcting a mask placement error provided by an embodiment of the present application.
  • FIG. 4 is a schematic flowchart of a method for correcting a mask placement error according to Embodiment 2 of the present application.
  • FIG. 5 is a schematic flowchart of a method for manufacturing a photomask according to Embodiment 3 of the present application.
  • FIG. 6 is a schematic diagram of a mask placement error correction device provided in Embodiment 4 of the present application.
  • FIG. 7 is a schematic diagram of an apparatus for manufacturing a photomask according to Embodiment 5 of the present application.
  • FIG. 8 is a schematic diagram of a terminal device according to Embodiment 6 of the present application.
  • FIG. 9 is a schematic diagram of an exposure machine provided in Embodiment 7 of the present application.
  • a photolithography process is required. Taking an integrated circuit as an example, an integrated circuit is formed by overlapping multiple layers of circuit patterns. During the production process, the surface of the wafer needs to be lithography multiple times. If the alignment accuracy exceeds the required range, the entire semiconductor device may not be able to complete the set function. Among the many factors that affect the alignment accuracy, the placement error of the mask, that is, the stacking error caused by the deviation between the actual pattern position of the mask and the preset pattern position generated during the mask exposure process, especially needs to be caused. Pay attention to.
  • the overlay error is explained here.
  • mask exposure is to obtain the required mask, specifically, engraving the required pattern on the quartz plate with electron beam, and the obtained quartz plate with the pattern is the required mask.
  • Wafer exposure means that after the required mask is obtained, an ultraviolet beam is used to irradiate the surface of the wafer through the mask, and the pattern on the mask is reduced to the surface of the wafer to form a specific pattern on the surface of the wafer.
  • the process of circuit graphics The placement error of the photomask will occur during the exposure of the photomask, and the placement error of the previous photomask will be superimposed during wafer exposure to form a layer of circuit patterns with stacking errors.
  • the present application provides a method and device for correcting mask placement error.
  • the compensation offset during mask fabrication can be reversed.
  • the exposure machine when making the photomask, and then according to the compensation offset to make the photomask, set the offset of the photomask during exposure as the compensation offset, so as to achieve the offset of the mask production process itself.
  • the purpose of the offset that exists is to correct the placement errors inherent in the reticle.
  • the wafer is exposed, and the position of the obtained circuit pattern is consistent with the preset pattern position, which achieves the purpose of eliminating the stacking error by correcting the placement error of the photomask.
  • the mask placement error correction method provided in the present application is applied to terminal equipment, such as a dedicated laboratory computer, or a wafer exposure machine including a processor, or a server.
  • 1 is a schematic diagram of the application of the photomask placement error correction method provided by the present application.
  • the wafer exposure process is shown in the left part of FIG. 1 , wherein the photomask 2 is an already fabricated photomask, and the light source 1 emits an ultraviolet beam , the ultraviolet beam exposes the wafer surface 3 through the mask 2 .
  • a preset circuit pattern has been formed on the mask 2, and the circuit pattern can be reverse-printed on the wafer surface 3 by the ultraviolet beam, and then the circuit pattern can be formed on the wafer surface 3 by etching.
  • the mask 2 is separated from the wafer surface 3 for illustration, but the distance between the mask 2 and the wafer surface 3 is not limited.
  • the right part of Fig. 1 shows the terminal device 4.
  • the terminal device 4 can obtain the exposure offset during wafer exposure and output the offset offset during the next mask fabrication.
  • the offset offset can be displayed in
  • the screen of the terminal device 4 can also be transmitted to the electronic device on the staff side through an available communication method, or the staff member can be informed of the compensation offset in other ways.
  • Embodiment 1 of the present application provides a method for correcting mask placement errors, including:
  • each pattern area includes many position points, that is, there are many position points on the wafer, and the exposure offset refers to each position point on the wafer Offset during actual exposure.
  • the offsets of each position point on the wafer are equal, and the exposure offset refers to the offset of each position point on the wafer.
  • the wafer exposure is performed after the mask is exposed, that is, after the mask is fabricated.
  • the offset of the position point is caused by the mask placement error during mask fabrication. Therefore, the exposure offset can directly reflect the light The offset that is fixed when the mask is exposed.
  • the meaning of the compensation offset is to reversely offset and compensate the offset that is fixed at each position point during the manufacture of the photomask. In this embodiment, other influencing factors are ignored.
  • the offset that exists fixed at each position point is equal to the exposure offset. That is, the compensation offset and the exposure offset are both vector values, with equal values and opposite directions. Since there are many position points on the wafer, the compensation offset refers to a vector for compensating the position offset of each position point on the wafer.
  • the exposure offset of any point A on the wafer surface is Location A, OVL(X)a nm, OVL(Y)b nm
  • the compensation offset determined according to the exposure offset is Location A, OVL(X)-a nm, OVL(Y)-b nm.
  • X and Y respectively represent two direction axes based on a two-dimensional plane, and the two-dimensional plane includes an origin, and the origin is the intersection of the X axis and the Y axis.
  • a represents the offset of point A based on the positive direction of the X axis
  • b represents the offset of point A based on the positive direction of the Y axis
  • nm is the unit of length measurement, nanometers.
  • the staff can set it on the exposure machine used for mask production, so that the offset is offset by the compensation offset when the mask is produced again to offset the mask production.
  • the fixed existing offset that is, the offset of the position point A in the above example can be expressed as Location A, OVL(X)0nm, OVL(Y)0nm. As shown in FIG. 3 , all the position points on the wafer surface obtained after the wafer is exposed again finally have no positional offset.
  • the mask placement error correction method can obtain the exposure offset during wafer exposure, and inversely deduce the compensation offset during the next mask fabrication, so that the mask fabrication itself can be offset. Fixed the existing offset and corrected the placement error of the mask. At this time, after the photomask is fabricated, the wafer is exposed, and the position of the obtained circuit pattern is consistent with the preset pattern position, which solves the problem that the semiconductor device cannot achieve the expected effect due to the placement error of the photomask.
  • the second embodiment of the present application provides a method for correcting a mask placement error, including:
  • the overlay error data can also be understood as a vector value. Taking the position point B on the wafer surface as an example, it can be expressed as Location B, OVL(X) c nm, OVL(Y) d nm. Where c represents the offset of point A based on the positive direction of the X-axis, and d represents the offset of point A based on the positive direction of the Y-axis.
  • the exposure offset is obtained by fitting according to the stacking error data.
  • the stacking error data includes stacking error data of multiple Locations on the wafer surface, that is, stacking error data of multiple location points, and the stacking error data of each location point may be equal or may not be equal.
  • the fitting referred to in step S402 can be understood as a process of minimizing the difference between the overlapping error data of all the position points on the wafer surface, so that the overlapping error data of each position point is approximately equal. After the fitting process, the obtained offset error of each position point is the exposure offset.
  • step S202 for the specific implementation of this step, reference is made to the description of step S202 in the first embodiment shown in FIG. 2 , which will not be explained in detail here.
  • the mask placement error correction method provided in this embodiment fits the position offset of all position points on the wafer, that is, the stacking error data, and approximately considers that the position offset of each position point is equal to the exposure offset . Then, according to the exposure offset, a compensation offset for the next mask production is determined, which offsets the fixed offset existing in the mask production itself, and corrects the placement error of the mask. As in the first embodiment, the photomask placement error correction method provided in this embodiment can solve the problem that the semiconductor device cannot achieve the expected effect due to the placement error of the photomask.
  • the third embodiment of the present application also provides a method for manufacturing a photomask, which is applied to an exposure machine when manufacturing a photomask, and the method for manufacturing a photomask includes:
  • the compensation offset and the exposure offset during wafer exposure are both vector values, and the values are equal and opposite to each other.
  • the wafer exposure is performed after the last photomask is fabricated, and the wafer exposure is a process in which the surface of the wafer is exposed to form circuit patterns.
  • the third embodiment also defaults that the offset of each position point on the wafer is equal, and the exposure offset refers to the offset of any position point on the wafer.
  • the offset of any position point is caused by the placement error of the mask.
  • the meaning of the compensation offset is to reverse the offset of any position point during the production of the mask.
  • the mask production is performed with the compensation offset as the exposure reference, that is, when the mask is produced by the exposure machine controlling the mask, the placement position of the mask is controlled to be offset based on the compensation offset. to avoid any position shift caused by the exposure of the wafer through the mask.
  • the exposure offset of the position point C on the wafer surface is Location C, OVL(X)e nm, OVL(Y)f nm, according to the exposure wafer end Data, that is, the compensation offset determined by the exposure offset determined by the data during wafer exposure is Location C, OVL(X)-e nm, OVL(Y)-f nm, and Location C, OVL(X) -e nm, OVL(Y)-f nm is set as the exposure benchmark when point C is exposed again, and the offset of point C when the circuit pattern is finally formed can be expressed as Location C, OVL(X)0nm, OVL(Y) 0nm.
  • X and Y respectively represent two direction axes based on a two-dimensional plane
  • the two-dimensional plane includes an origin
  • the origin is the intersection of the X axis and the Y axis.
  • e represents the offset of point C based on the positive direction of the X axis
  • f represents the offset of point C based on the positive direction of the Y axis
  • -e represents the offset of point C based on the negative direction of the X axis
  • -f represents The offset of point C based on the negative direction of the Y axis.
  • This embodiment can be understood as obtaining the exposure offset of the first layer of circuit pattern during wafer exposure when the first layer of circuit patterns is formed on the wafer surface, and determining the next layer of circuit pattern lithography according to the exposure offset At the time of production, it is necessary to compensate the offset amount at the time of photomask production, which is set on the exposure machine that produces the photomask.
  • the method provided in this embodiment can be used to correct the placement error of the mask of the circuit pattern of the next layer of the circuit pattern of any layer when the wafer indicates that any layer of circuit patterns is formed, and can be based on compensation during mask fabrication.
  • the offset is set to eliminate the placement error of the photomask, so as to reduce the stacking error existing in the photolithography process of the semiconductor device.
  • the fourth embodiment of the present application further provides a mask placement error correction device 10, including:
  • the acquisition module 11 is used for acquiring the exposure offset of the wafer during exposure after the mask is fabricated, and the wafer exposure is a process in which the surface of the wafer is exposed to form a circuit pattern.
  • the determining module 12 is configured to determine the compensation offset for the next photomask production according to the exposure offset, so as to correct the placement error of the photomask.
  • the compensation offset and the exposure offset are both vector values, with equal values and opposite directions.
  • the acquisition module 11 is specifically configured to acquire the stacking error data of the wafer during exposure.
  • the exposure offset is obtained by fitting according to the overlay error data.
  • the alignment error data includes alignment error data for all position points on the wafer.
  • the mask placement error correction device 10 provided in this embodiment can obtain the exposure offset during wafer exposure and deduce the compensation offset during the next mask fabrication, which can offset the fixed offset of the mask exposure itself.
  • the shift amount is corrected, and the placement error of the mask is corrected.
  • the mask placement error correction device provided in this embodiment fits the position offset of all position points on the wafer, that is, the stacking error data, and it is approximately considered that the position offset of each position point is equal to the exposure Offset.
  • the compensation offset for the next mask exposure is determined, which offsets the fixed offset of the mask exposure itself, and corrects the placement error of the mask.
  • the photomask placement error correction device provided in this embodiment can solve the problem that the semiconductor device cannot achieve the expected effect due to the placement error of the photomask.
  • the fifth embodiment of the present application further provides a photomask manufacturing device 20, including:
  • the receiving module 21 is used for receiving the compensation offset during mask fabrication.
  • the compensation offset and the exposure offset during wafer exposure are both vector values, and the values are equal and opposite to each other.
  • the wafer exposure is performed after the last photomask is fabricated, and the wafer exposure is a process in which the surface of the wafer is exposed to form circuit patterns.
  • the exposure module 22 is used for making the mask with the compensation offset as the exposure reference.
  • Embodiment 6 of the present application provides a terminal device 30 , which includes a memory 31 , a processor 32 , and a transceiver 33 .
  • the memory 31 is used to store instructions
  • the transceiver 33 is used to communicate with other devices
  • the processor 32 is used to execute the instructions stored in the memory 31, so that the terminal device 30 executes the implementation as shown in FIG. 2 or FIG. 4 above.
  • the photomask placement error correction method provided in the example has a similar implementation manner and technical effect, and will not be repeated here.
  • Embodiment 7 of the present application provides an exposure machine 40 , which includes a memory 41 , a processor 42 and a transceiver 43 .
  • the memory 41 is used to store instructions
  • the transceiver 43 is used to communicate with other devices
  • the processor 42 is used to execute the instructions stored in the memory 41, so that the exposure machine 40 can execute the instructions provided in the embodiment shown in FIG. 5 above.
  • the specific implementation manner and technical effect of the mask manufacturing method described above are similar, and will not be repeated here.
  • the present application further provides a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and when the instructions are executed, the computer-executable instructions are used to implement any of the above embodiments when the instructions are executed by a processor.
  • the photomask placement error correction method is provided.
  • the present application further provides a computer program product, including a computer program, when the computer program is executed by a processor, the method for correcting the mask placement error provided in any of the above embodiments is implemented.
  • the above-mentioned computer-readable storage medium may be a read-only memory (Read Only Memory, ROM), a programmable read-only memory (Programmable Read-Only Memory, PROM), an erasable programmable read-only memory (Erasable Programmable read-only memory) Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Magnetic Random Access Memory (FRAM), Flash Memory (Flash Memory) , magnetic surface memory, CD-ROM, or CD-ROM (Compact Disc Read-Only Memory, CD-ROM) and other memory. It can also be various electronic devices including one or any combination of the above memories, such as mobile phones, computers, tablet devices, personal digital assistants, and the like.
  • the method of the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is better implementation.
  • the technical solution of the present application can be embodied in the form of a software product in essence or in a part that contributes to the prior art, and the computer software product is stored in a storage medium (such as ROM/RAM, magnetic disk, CD-ROM), including several instructions to make a terminal device (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in the various embodiments of this application.
  • a storage medium such as ROM/RAM, magnetic disk, CD-ROM
  • These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory result in an article of manufacture comprising instruction means, the instructions
  • the apparatus implements the functions specified in the flow or flow of the flowcharts and/or the block or blocks of the block diagrams.

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Abstract

本申请提供一种光罩摆放误差校正方法和装置，该方法包括获取光罩制作完成后，晶圆曝光时的曝光偏移量，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；根据所述曝光偏移量确定下次光罩制作时的补偿偏移量，以校正所述光罩的摆放误差；所述补偿偏移量与所述曝光偏移量均为向量值，且数值相等方向相反。本申请提供的光罩摆放误差校正方法和装置可以通过校正光罩的摆放误差，减小半导体器件的光刻工艺中存在的叠对误差。

Description

光罩摆放误差校正方法和装置
本申请要求于2021年1月4日提交中国专利局、申请号为202110004432.X、申请名称为“光罩摆放误差校正方法和装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及半导体制造技术，更为具体地，涉及一种光罩摆放误差校正方法和装置。
背景技术
在半导体器件的制造工艺中，光刻工艺是至关重要的一个工艺步骤。光刻工艺包括对晶圆表面清洗烘干、涂底、旋涂光刻胶、软烘、对准曝光、后烘、硬烘、刻蚀等工序，从而在晶圆表面形成尺寸精确的电路图形。在光刻工艺中需要经历多次曝光，其中一次的曝光是用于制作光罩，也可以理解为光罩曝光，具体是用电子束将所需要的图形刻在石英片上，得到的该刻有图形的石英片即为所需要的光罩。另一次的曝光是在得到所需要的光罩后，采用紫外光束透过该光罩，将光罩上刻的图形照射到晶圆表面的光阻上，形成特定的电路图形。
但是由于半导体器件制造过程中需要很多层电路图形重叠形成，因此需要对晶圆表面进行多次光刻。且在进行光刻时，必须保证每一层与前面或后面的层的对准精度，如果对准精度超出要求范围，则可能造成整个半导体器件不能完成设定的功能。但是，在实际操作中，由于曝光机台自身因素、光刻胶的原因或光罩的原因，都会使光刻时产生叠对误差，即上一层曝光成像的电路图形与下一层曝光成像的电路图形之间存在定位误差。其中，由于光罩曝光过程中产生的光罩的摆放误差，即光罩上的实际图形位置与预设的图形位置之间的偏差引起的叠对误差现象更加需要受到重视。
因此，如何通过校正光罩的摆放误差减小半导体器件的光刻工艺中存在的叠对误差，仍然是亟待解决的问题。
发明内容
本申请提供一种光罩摆放误差校正方法和装置，用以通过获取晶圆曝光时的曝光偏移量，反推出下次光罩制作时的补偿偏移量，这样就可以抵消光罩制作本身固定存在的偏移量，校正了光罩的摆放误差。通过校正光罩的摆放误差，以减小半导体器件的光刻工艺中存在的叠对误差。
一方面，本申请提供一种光罩摆放误差校正方法，包括：
获取光罩制作完成后，晶圆曝光时的曝光偏移量，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；
根据所述曝光偏移量确定下次光罩制作时的补偿偏移量，以校正所述光罩的摆放误差；
所述补偿偏移量与所述曝光偏移量均为向量值，且数值相等方向相反。
本实施例提供的该光罩摆放误差校正方法可以通过获取晶圆曝光时的曝光偏移量，反推出下次光罩制作时的补偿偏移量，这样就可以抵消光罩制作本身固定存在的偏移量，校正了光罩的摆放误差。此时光罩制作完成后再进行晶圆曝光，得到的电路图形的位置就和预设的图形位置一致，解决了由于光罩的摆放误差引起的半导体器件使用时无法达到预期效果的问题。
另一方面，本申请提供一种光罩制作方法，应用于制作光罩时的曝光机台，包括：
接收光罩曝光时的补偿偏移量，所述补偿偏移量与晶圆曝光时的曝光偏移量均为向量值，且数值相等方向相反；所述晶圆曝光在上一次光罩制作完成之后进行，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；
以所述补偿偏移量为曝光基准进行光罩制作。
本实施例提供的方法可以在晶圆表明形成任意一层电路图形时，用来校正该任意一层电路图形的下一层电路图形的光罩摆放误差，可以在进行光罩制作时基于补偿偏移量进行设置，消除光罩摆放误差，以减小半导体器件的光刻工艺中存在的叠对误差。
另一方面，本申请提供一种光罩摆放误差校正装置，包括：
获取模块，用于获取光罩制作完成后，晶圆曝光时的曝光偏移量，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；
确定模块，用于根据所述曝光偏移量确定下次光罩制作时的补偿偏移量，以校正所述光罩的摆放误差；
所述补偿偏移量与所述曝光偏移量均为向量值，且数值相等方向相反。
另一方面，本申请提供一种光罩制作装置，包括：
接收模块，用于接收光罩制作时的补偿偏移量，所述补偿偏移量与晶圆曝光时的曝光偏移量均为向量值，且数值相等方向相反；所述晶圆曝光在上一次光罩制作完成之后进行，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；
曝光模块，用于以所述补偿偏移量为曝光基准进行光罩制作。
另一方面，本申请提供一种终端设备，包括存储器，处理器和收发器，所述存储器用于存储指令，所述收发器用于和其他设备通信，所述处理器用于执行所述存储器中存储的指令，以使所述终端设备执行如第一方面所述的光罩摆放误差校正方法。
另一方面，本申请提供一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机执行指令，当所述指令被执行时，使得计算机执行如第一方面所述的光罩摆放误差校正方法。
另一方面，本申请提供一种计算机程序产品，包括计算机程序，该计算机程序被处理器执行时实现如第一方面所述的光罩摆放误差校正方法。
附图说明
图1为本申请提供的一种光罩摆放误差校正方法的应用场景示意图。
图2为本申请实施例一提供的光罩摆放误差校正方法的流程示意图。
图3为本申请实施例一种提供的光罩摆放误差校正方法的示意图。
图4为本申请实施例二提供的光罩摆放误差校正方法的流程示意图。
图5为本申请实施例三提供的光罩制作方法的流程示意图。
图6为本申请实施例四提供的光罩摆放误差校正装置的示意图。
图7为本申请实施例五提供的光罩制作装置的示意图。
图8为本申请实施例六提供的终端设备的示意图。
图9为本申请实施例七提供的曝光机台的示意图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。
在半导体器件的制造过程中，如集成电路、芯片的制造，都需要经过光刻工艺。以集成电路为例，集成电路是由多层电路图形重叠形成，在制作过程中需要对晶圆表面进行多次光刻，且在进行光刻时，必须保证每一层与前面层或后面层的对准精度，如果对准精度超出要求范围，则可能造成整个半导体器件不能完成设定的功能。而在诸多影响对准精度的因素里，光罩的摆放误差，即光罩曝光过程中产生的光罩的实际图形位置与预设的图形位置之间存在偏差引起的叠对误差尤其需要引起重视。
在此对该叠对误差进行解释，在晶圆表面形成一层电路图形时，需要经历多次曝光。其中，光罩曝光的目的是得到所需要的光罩，具体是用电子束将所需要的图形刻在石英片上，得到的该刻有图形的石英片即为所需要的光罩。晶圆曝光指的是在得到所需要的光罩后，采用紫外光束透过该光罩照射到晶圆表面，将该光罩上的图形缩小至晶圆表面，以在晶圆表面形成特定的电路图形的过程。该光罩曝光中会产生光罩的摆放误差，再经历晶圆曝光时就会叠加之前的光罩的摆放误差，形成一层有叠对误差的电路图形。再次光刻下一层电路图形时，还是会由于光罩的摆放误差形成再一次的叠对误差。多层电路图形光刻时产生的叠对误差再次叠加就会对多层电路图形的对准精度产生影响，从而影响半导体器件的性能。
基于此，本申请提供一种光罩摆放误差校正方法和装置，通过获取晶圆曝光时的曝光偏移量，反推出制作光罩时的补偿偏移量。制作光罩时的曝光机台再依据该补偿偏移量进行光罩的制作时，设定光罩曝光时偏移的量为该补偿偏移量，这样就达到了抵消光罩制作过程本身固定存在的偏移量的目的，校正了光罩固有的摆放误差。此时光罩制作完成后再去晶圆曝光，得到的电路图形的位置就和预设的图形位置一致，达到了通过校正光罩摆放误差消除叠对误差的目的。
本申请提供的光罩摆放误差校正方法应用于终端设备，该终端设备例如专用的实验室计算机，或包含处理器的晶圆曝光机台，或服务器等。图1为本申请提供的光罩摆放误差校正方法的应用示意图，该晶圆曝光的过程如图1左部分所示，其中光罩2是已经制作好的光罩，光源1发射出紫外光束，该紫外光束透过该光罩2曝光该晶圆表面3。该光罩2上已经形成有预设的电路图形，通过该紫外光束将该电路图形可以反印在该晶圆表面3，再通过刻蚀可以在该晶圆表面3形成该电路图形。关于图1需要说明的是，图1中将该光 罩2与该晶圆表面3分离开进行示意，但并不对该光罩2和该晶圆表面3之间的距离进行限制。
图1中右部分所示为该终端设备4，该终端设备4可以获取晶圆曝光时的曝光偏移量，输出下次光罩制作时的补偿偏移量，该补偿偏移量可以显示于该终端设备4的屏幕上，也可以通过可用的通信方式传输至工作人员端的电子设备上，或者以其他方式使工作人员获知该补偿偏移量。
请参见图2，本申请实施例一提供一种光罩摆放误差校正方法，包括：
S201，获取光罩制作完成后，晶圆曝光时的曝光偏移量，该晶圆曝光为晶圆表面被曝光形成电路图形的过程。
如图3所示，晶圆上存在很多图形区域，每个图形区域都包括很多位置点，即该晶圆上存在很多位置点，该曝光偏移量指的是该晶圆上的各个位置点在实际曝光过程中的偏移量。本实施例中默认该晶圆上各个位置点的偏移量相等，该曝光偏移量就指的是该晶圆上每个位置点的偏移量。而该晶圆曝光在光罩曝光，即该光罩制作完成之后执行，该位置点的偏移量由于光罩制作时的光罩摆放误差引起，因此，该曝光偏移量可以直接反映光罩曝光时固定存在的偏移量。
S202，根据该曝光偏移量确定下次光罩制作时的补偿偏移量，以校正该光罩的摆放误差。
再请参考图3，该补偿偏移量的含义是对光罩制作时每个位置点固定存在的偏移量进行反向的抵消补偿，本实施例在忽略其他影响因素的情况下，认为该每个位置点固定存在的偏移量等于该曝光偏移量。即该补偿偏移量和该曝光偏移量均为向量值，且数值相等方向相反。由于该晶圆上存在很多位置点，该补偿偏移量指的是对晶圆上每个位置点的位置偏移进行补偿的向量。
举例说明，晶圆经过光罩曝光后再进行晶圆曝光时，该晶圆表面上任意一个位置点A的曝光偏移量为Location A，OVL(X)a nm，OVL(Y)b nm，则根据该曝光偏移量确定的该补偿偏移量为Location A，OVL(X)-a nm，OVL(Y)-b nm。其中X和Y分别表示基于二维平面上的两个方向轴，该二维平面包括一原点，该原点为X轴和Y轴的交点。则a表示A点基于X轴的正方向的偏移量，b表示A点基于Y轴的正方向的偏移量，nm为长度度量单位，纳米。
工作人员在获知该补偿偏移量后，可以在用于进行光罩制作的曝光机台上进行设置，使再次进行光罩制作时以该补偿偏移量进行偏移，以抵消光罩制作时固定存在的偏移量，即上例中位置点A的偏移可以表达为Location A，OVL(X)0nm，OVL(Y)0nm。如图3所示，最终再次晶圆曝光后得到的晶圆表面所有的位置点均不存在位置上的偏移。
因此，本实施例提供的该光罩摆放误差校正方法可以通过获取晶圆曝光时的曝光偏移量，反推出下次光罩制作时的补偿偏移量，这样就可以抵消光罩制作本身固定存在的偏移量，校正了光罩的摆放误差。此时光罩制作完成后再进行晶圆曝光，得到的电路图形的位置就和预设的图形位置一致，解决了由于光罩的摆放误差引起的半导体器件使用时无法达到预期效果的问题。
请参见图4，本申请实施例二提供一种光罩摆放误差校正方法，包括：
S401，获取该晶圆曝光时的叠对误差数据。
如实施例一中关于该曝光偏移量和该补偿偏移量的描述，该叠对误差数据也可以理解为一个向量值，以该晶圆表面上的位置点B为例，可以表达为Location B，OVL(X)c nm，OVL(Y)d nm。其中c表示A点基于X轴的正方向的偏移量，d表示A点基于Y轴的正方向的偏移量。
S402，根据该叠对误差数据拟合得到该曝光偏移量。
该叠对误差数据包括晶圆表面的多个Location的叠对误差数据，即多个位置点的叠对误差数据，每个位置点的叠对误差数据可能相等也可能不相等。步骤S402所指的该拟合可以理解为对晶圆表面所有位置点的叠对误差数据之间的差最小化处理，使得每个位置点的叠对误差数据近似相等。经过拟合处理后，得到的每个位置点的偏移误差即为该曝光偏移量。
S403，根据该曝光偏移量确定下次光罩制作时的补偿偏移量，以校正该光罩的摆放误差。
本步骤的具体实现方式参照图2所示的实施例一中步骤S202的描述，此处不再进行详细解释。
本实施例提供的光罩摆放误差校正方法对晶圆上所有位置点的位置偏移，即叠对误差数据进行拟合，近似认为每个位置点的位置偏移均等于该曝光偏移量。再依据该曝光偏移量确定出下次光罩制作时的补偿偏移量，抵消光罩制作本身固定存在的偏移量，校正光罩的摆放误差。如实施例一，本实施例提供的光罩摆放误差校正方法可以解决由于光罩的摆放误差引起的半导体器件使用时无法达到预期效果的问题。
请参见图5，本申请实施例三还提供一种光罩制作方法，应用于制作光罩时的曝光机台，该光罩制作方法包括：
S501，接收光罩制作时的补偿偏移量。
其中，该补偿偏移量与晶圆曝光时的曝光偏移量均为向量值，且数值相等方向相反。该晶圆曝光在上一次光罩制作完成之后进行，该晶圆曝光为晶圆表面被曝光形成电路图形的过程。如实施例一步骤S201中的描述，实施例三中也是默认该晶圆上每个位置点的偏移量相等，该曝光偏移量就指的是该晶圆上任意一个位置点的偏移量，该任意一个位置点的偏移量由光罩的摆放误差引起，该补偿偏移量的含义就是对光罩制作时任意一个位置点的偏移量进行反向的抵消补偿。
S502，以该补偿偏移量为曝光基准进行光罩制作。
该以该补偿偏移量为曝光基准进行光罩制作，即指的是制作光罩时的曝光机台控制进行光罩制作时，控制该光罩的摆放位置以该补偿偏移量进行偏移，以避免通过该光罩再进行晶圆曝光时造成的任意一个位置点的位置偏移。
假设晶圆在光罩制作完成后进行晶圆曝光时，该晶圆表面位置点C的曝光偏移量为Location C，OVL(X)e nm，OVL(Y)f nm，则根据曝光wafer端数据，即晶圆曝光时的数据确定的曝光偏移量确定的该补偿偏移量为Location C，OVL(X)-e nm，OVL(Y)-f nm，将Location C，OVL(X)-e nm，OVL(Y)-f nm设置为C点再次曝光时的曝光基准，最终形成电路图形时C点的偏移量就可以表达为Location C，OVL(X)0nm，OVL(Y)0nm。如实施例一中的描述，X和Y分别表示基于二维平面上的两个方向轴，该二维平面包括一原点，该原点为X轴和Y轴的交点。则e表示C点基于X轴的正方向的偏移量，f表示C点基于Y 轴的正方向的偏移量，-e表示C点基于X轴的负方向的偏移量，-f表示C点基于Y轴的负方向的偏移量。
在半导体器件的制作过程中，晶圆表面需要叠加多层的电路图形，每层电路图形的制作都要依次经历多次晶圆曝光过程。本实施例可以理解为在晶圆表面形成第一层电路图形时，获取该第一层电路图形晶圆曝光时的曝光偏移量，根据该曝光偏移量确定出下一层电路图形光刻制作时，需要在制作光罩的曝光机台上设置的光罩制作时的补偿偏移量。本实施例提供的方法可以在晶圆表明形成任意一层电路图形时，用来校正该任意一层电路图形的下一层电路图形的光罩摆放误差，可以在进行光罩制作时基于补偿偏移量进行设置，消除光罩摆放误差，以减小半导体器件的光刻工艺中存在的叠对误差。
请参见图6，本申请实施例四还提供一种光罩摆放误差校正装置10，包括：
获取模块11，用于获取光罩制作完成后，晶圆曝光时的曝光偏移量，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程。
确定模块12，用于根据该曝光偏移量确定下次光罩制作时的补偿偏移量，以校正该光罩的摆放误差。该补偿偏移量与该曝光偏移量均为向量值，且数值相等方向相反。
该获取模块11具体用于获取该晶圆曝光时的叠对误差数据。根据该叠对误差数据拟合得到该曝光偏移量。该叠对误差数据包括该晶圆上所有位置点的叠对误差数据。
本实施例提供的该光罩摆放误差校正装置10可以通过获取晶圆曝光时的曝光偏移量，推出下次光罩制作时的补偿偏移量，可以抵消光罩曝光本身固定存在的偏移量，校正了光罩的摆放误差。具体的，本实施例提供的光罩摆放误差校正装置对晶圆上所有位置点的位置偏移，即叠对误差数据进行拟合，近似认为每个位置点的位置偏移均等于该曝光偏移量。再依据该曝光偏移量确定出下次光罩曝光时的补偿偏移量，抵消光罩曝光本身固定存在的偏移量，校正光罩的摆放误差。如实施例一，本实施例提供的光罩摆放误差校正装置可以解决由于光罩的摆放误差引起的半导体器件使用时无法达到预期效果的问题。
请参见图7，本申请实施例五还提供一种光罩制作装置20，包括：
接收模块21，用于接收光罩制作时的补偿偏移量，该补偿偏移量与晶圆曝光时的曝光偏移量均为向量值，且数值相等方向相反。该晶圆曝光在上一次光罩制作完成后进行，该晶圆曝光为晶圆表面被曝光形成电路图形的过程。
曝光模块22，用于以该补偿偏移量为为曝光基准进行光罩制作。
请参见图8，本申请实施例六提供一种终端设备30，包括存储器31、处理器32和收发器33。该存储器31用于存储指令，该收发器33用于和其他设备通信，该处理器32用于执行该存储器31中存储的指令，以使该终端设备30执行如上图2或图4所示实施例提供的该光罩摆放误差校正方法，具体实现方式和技术效果类似，这里不再赘述。
请参见图9，本申请实施例七提供一种曝光机台40，包括存储器41、处理器42和收发器43。该存储器41用于存储指令，该收发器43用于和其他设备通信，该处理器42用于执行该存储器41中存储的指令，以使该曝光机台40执行如上图5所示实施例提供的该光罩制作方法，具体实现方式和技术效果类似，这里不再赘述。
本申请还提供一种计算机可读存储介质，该计算机可读存储介质中存储有计算机执行指令，当该指令被执行时，使得计算机执行指令被处理器执行时用于实现如上任一项实施例提供的该光罩摆放误差校正方法。本申请还提供一种计算机程序产品，包括计算机程序， 该计算机程序被处理器执行时实现如上任一项实施例提供的该光罩摆放误差校正方法。
需要说明的是，上述计算机可读存储介质可以是只读存储器(Read Only Memory，ROM)、可编程只读存储器(Programmable Read-Only Memory，PROM)、可擦除可编程只读存储器(Erasable Programmable Read-Only Memory，EPROM)、电可擦除可编程只读存储器(Electrically Erasable Programmable Read-Only Memory，EEPROM)、磁性随机存取存储器(Ferromagnetic Random Access Memory，FRAM)、快闪存储器(Flash Memory)、磁表面存储器、光盘、或只读光盘(Compact Disc Read-Only Memory，CD-ROM)等存储器。也可以是包括上述存储器之一或任意组合的各种电子设备，如移动电话、计算机、平板设备、个人数字助理等。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。
上述本申请实施例序号仅仅为了描述，不代表实施例的优劣。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，空调器，或者网络设备等)执行本申请各个实施例所描述的方法。
本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
以上仅为本申请的优选实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (11)

  1. 一种光罩摆放误差校正方法，其特征在于，包括：
    获取光罩制作完成后，晶圆曝光时的曝光偏移量，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；
    根据所述曝光偏移量确定下次光罩制作时的补偿偏移量，以校正所述光罩的摆放误差；
    所述补偿偏移量与所述曝光偏移量均为向量值，且数值相等方向相反。
  2. 根据权利要求1所述的方法，其特征在于，所述获取晶圆曝光时的曝光偏移量包括：
    获取所述晶圆曝光时的叠对误差数据；
    根据所述叠对误差数据拟合得到所述曝光偏移量。
  3. 根据权利要求2所述的方法，其特征在于，所述叠对误差数据包括所述晶圆上所有位置点的叠对误差数据。
  4. 一种光罩制作方法，应用于制作光罩时的曝光机台，其特征在于，包括：
    接收光罩制作时的补偿偏移量，所述补偿偏移量与晶圆曝光时的曝光偏移量均为向量值，且数值相等方向相反；所述晶圆曝光在上一次光罩制作完成之后进行，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；
    以所述补偿偏移量为曝光基准进行光罩制作。
  5. 一种光罩摆放误差校正装置，其特征在于，包括：
    获取模块，用于获取光罩制作完成后，晶圆曝光时的曝光偏移量，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；
    确定模块，用于根据所述曝光偏移量确定下次光罩制作时的补偿偏移量，以校正所述光罩的摆放误差；
    所述补偿偏移量与所述曝光偏移量均为向量值，且数值相等方向相反。
  6. 根据权利要求5所述的装置，其特征在于，所述获取模块具体用于获取所述晶圆曝光时的叠对误差数据；根据所述叠对误差数据拟合得到所述曝光偏移量。
  7. 根据权利要求6所述的装置，其特征在于，所述叠对误差数据包括所述晶圆上所有位置点的叠对误差数据。
  8. 一种光罩制作装置，其特征在于，包括：
    接收模块，用于接收光罩制作时的补偿偏移量，所述补偿偏移量与晶圆曝光时的曝光偏移量均为向量值，且数值相等方向相反；所述晶圆曝光在上一次光罩制作完成之后进行，所述晶圆曝光为晶圆表面被曝光形成电路图形的过程；
    曝光模块，用于以所述补偿偏移量为曝光基准进行光罩制作。
  9. 一种终端设备，其特征在于，包括存储器，处理器和收发器，所述存储器用于存储指令，所述收发器用于和其他设备通信，所述处理器用于执行所述存储器中存储的指令，以使所述终端设备执行如权利要求1-4中任一项所述的光罩摆放误差校正方法。
  10. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质中存储有计算机执行指令，当所述指令被执行时，使得计算机执行如权利要求1-4中任一项所述的光罩摆放误差校正方法。
  11. 一种计算机程序产品，包括计算机程序，其特征在于，该计算机程序被处理器执行时实现如权利要求1-4任一项所述的光罩摆放误差校正方法。
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