WO2022134925A1 - Spread spectrum clock generator and electronic device - Google Patents

Abstract

Disclosed in the present invention are a spread spectrum clock generator and an electronic device. The spread spectrum clock generator comprises a modulation period module circuit, a spread spectrum depth module circuit, and a clock circuit. The modulation period module circuit divides a fundamental frequency output by the clock circuit to obtain a spread spectrum period signal, a spread spectrum direction switching signal, and a charging pulse period signal, and processes the charging pulse period signal to obtain a charging pulse signal; the spread spectrum depth module circuit generates a bias current on the basis of the spread spectrum period signal, the spread spectrum direction switching signal, and the charging pulse signal, and inputs the bias current to the clock circuit, so that the clock circuit generates a spread spectrum on the basis of the bias current. Since the modulation period module circuit, the spread spectrum depth module circuit, and the clock circuit are all integrated inside a spread spectrum clock generator chip circuit, a peripheral device does not need to be added outside the spread spectrum clock generator chip circuit while the spread spectrum is generated, thereby increasing the layout area of the entire circuit, and reducing the hardware cost brought by the peripheral device.

Description

A spread spectrum clock generator and electronic equipment

This application claims the priority of the Chinese patent application filed on December 26, 2020 with the application number 202011570141.9 and the invention titled "A Spread Spectrum Clock Generator and Electronic Equipment", the entire contents of which are incorporated by reference in in this application.

technical field

The invention relates to the technical field of clock generators, and more particularly, to a spread spectrum clock generator and electronic equipment.

Background technique

Electromagnetic Interference (EMI) is electronic noise that interferes with cable signals and reduces signal integrity. EMI is typically generated by sources of electromagnetic radiation, such as motors and machines. At present, due to the pursuit of faster switching speed and smaller chip package, the system power density is high, and the problem of electromagnetic interference is becoming more and more prominent.

Among the existing methods for suppressing electromagnetic interference, adding decoupling capacitors is a common technique. The entire high-frequency path area is reduced by increasing the path through the decoupling capacitor, thereby reducing the magnetic flux and reducing the electromagnetic interference energy.

However, the method of increasing the decoupling capacitor needs to add peripheral devices at specific positions of the clock generator chip circuit, which not only results in a large layout area of the entire circuit, but also increases the hardware cost caused by the peripheral devices.

SUMMARY OF THE INVENTION

In view of this, the present invention discloses a spread spectrum clock generator, so as to realize the generation of spread spectrum to suppress electromagnetic interference, without adding peripheral devices outside the chip circuit of the spread spectrum clock generator, thereby greatly reducing the layout area of the entire circuit , and effectively reduce the hardware cost caused by adding peripheral devices.

A spread spectrum clock generator, comprising: a modulation period module circuit, a spread spectrum depth module circuit and a clock circuit;

The modulation cycle module circuit is used to divide the frequency of the fundamental frequency output by the clock circuit to obtain a frequency-spreading period signal, a frequency-spreading direction switching signal and a charging pulse period signal, and process the charging pulse period signal to obtain charging pulse signal;

The spread spectrum depth module circuit is connected to the modulation period module circuit, and the spread spectrum depth module circuit is configured to be based on the spread spectrum period signal, the spread spectrum direction switching signal and all the output frequency spectrum output by the modulation period module circuit. generating the charging pulse signal, generating a bias current, and outputting the bias current to the clock circuit;

The clock circuit is configured to generate a spread spectrum based on the bias current.

Optionally, the spread spectrum depth module circuit includes: a first switch tube NM1, a charge-discharge ladder current generation module and a clock current mirror module;

The control end of the first switch tube is connected to the output end of the modulation cycle module circuit, the output end of the first switch tube is grounded, and the first switch tube is used for the spread spectrum sent by the modulation cycle module circuit Periodic signal turns on and off periodically;

The input end of the charge and discharge ladder current generation module is connected to the input end of the first switch tube, the output end of the charge and discharge ladder current generation module is connected to the input end of the clock current mirror module, and the charge and discharge ladder current is connected to the input end of the clock current mirror module. The generation module control terminal is connected to the output terminal of the modulation cycle module circuit, and the charge and discharge ladder current generation module is configured to generate a charge and discharge ladder current according to the charging pulse signal sent by the modulation cycle module circuit;

The output terminal of the clock current mirror module is connected to the clock circuit, the control terminal of the clock current mirror module is connected to the output terminal of the modulation period module circuit, and the clock current mirror module is used for according to the modulation period module circuit. The transmitted spread-spectrum direction switching signal changes the spread-spectrum direction, and mirrors the charge-discharge ladder current to the bias current and outputs it to the clock circuit.

Optionally, the charge-discharge ladder current generation module includes: a second switch tube, a first current source, a second current source, a first switch, a second switch, a first capacitor, an operational amplifier, a first mirror circuit, and an expansion circuit. frequency resistance;

The input end of the first switch tube is respectively connected to one end of the second switch and the first end of the first capacitor, the other end of the second switch is grounded through the second current source, and the first The second end of the capacitor is grounded;

The input end of the first current source is connected to a power supply, and the output end of the first current source is connected to the first end of the first capacitor through the first switch;

The forward input end of the operational amplifier is connected to the common end of the first switch and the first end of the first capacitor, and the reverse input end of the operational amplifier is connected to the output end of the second switch tube and the first end of the first capacitor. the common end of the spread spectrum resistor, the other end of the spread spectrum resistor is grounded, and the output end of the operational amplifier is connected to the control end of the second switch tube;

The input end of the second switch tube is connected to the first output end of the first mirror circuit, the input end of the first mirror circuit is connected to the power supply, and the second output end and the control end of the first mirror circuit are both connected the clock current mirror module;

The first switch and the second switch are configured to perform corresponding closing and opening operations according to the charging pulse signal sent by the modulation period module circuit.

Optionally, the first mirror circuit includes: a fourth switch tube and a fifth switch tube;

The input end of the fourth switch tube and the input end of the fifth switch tube are both connected to the power supply, the control end of the fourth switch tube is connected to the control end of the fifth switch tube, and the fourth switch tube The common end of the control end of the fifth switch tube and the control end of the fifth switch tube are respectively connected with the output end of the fourth switch tube and the control end of the third switch tube, and the output end of the fourth switch tube is used as the The first output end of the first mirror circuit is connected to the input end of the second switch tube, and the output end of the fifth switch tube serves as the second output end of the first mirror circuit and the second output end of the second mirror circuit. The first input terminal is connected.

Optionally, the clock current mirror module includes: a third switch tube, a third current source, a third switch, a fourth switch and a second mirror circuit;

The control end of the third switch tube is connected to the charge-discharge ladder current generation module, the input end of the third switch tube is connected to the power supply, and the output end of the third switch tube passes through the third switch and the the fourth switch is connected to the second input terminal of the second mirror circuit, the first input terminal of the second mirror circuit is connected to the charging and discharging ladder current generating module, and the output terminal of the second mirror circuit is grounded;

The input end of the third current source is connected to a power supply, the output end of the third current source is connected to the common end of the third switch and the fourth switch, and the third current source, the third The common terminal of the switch and the fourth switch is used as the output terminal of the spread spectrum depth module circuit, and is used to output the bias current IB_CHG;

The third switch and the fourth switch are used to change the spread spectrum direction according to the spread spectrum direction switching signal sent by the modulation period module circuit.

Optionally, the second mirror circuit includes: a sixth switch tube and a seventh switch tube;

The input end of the sixth switch tube is connected to the output end of the fifth switch tube as the first input end of the second mirror circuit, the output end of the sixth switch tube is grounded, and the output end of the sixth switch tube is grounded. The control end and the input end are both connected to the control end of the seventh switch tube;

The input end of the seventh switch tube is connected to the fourth switch as the second input end of the second mirror circuit, and the output end of the seventh switch tube is grounded.

Optionally, the modulation cycle module circuit includes: a spread spectrum timing signal generation module, a signal acceleration module and a charging pulse signal generation module;

The spread spectrum timing signal generation module is configured to divide the frequency of the fundamental frequency signal output by the clock circuit to obtain the spread spectrum period signal, the spread spectrum direction switching signal and the charging pulse period signal;

The input end of the signal acceleration module is connected to the output end of the spread spectrum timing signal generation module, the output end of the signal acceleration module is connected to the first input end of the charging pulse signal generation module, and the signal acceleration module for converting the charging pulse period signal output by the spread spectrum timing signal generating module into a pulse signal;

The second input end of the charging pulse signal generation module is connected to the output end of the spread spectrum timing signal generation module, the output end of the charging pulse signal generation module is used as the output end of the modulation cycle module circuit, the charging The pulse signal generation module is configured to obtain the charging pulse signal based on the pulse signal output by the signal acceleration module and the charging pulse period signal output by the spread spectrum timing signal generation module.

Optionally, the spread spectrum timing signal generation module includes: a first frequency divider, a second frequency divider and a third frequency divider;

The first frequency divider is used for dividing the frequency of the fundamental frequency signal output by the clock circuit to obtain the spread spectrum period signal;

The second frequency divider is used for dividing the frequency of the fundamental frequency signal output by the clock circuit to obtain the frequency-spreading direction switching signal;

The third frequency divider is used for dividing the frequency of the fundamental frequency signal output by the clock circuit to obtain the charging pulse period signal.

Optionally, the signal acceleration module includes: a first adjustable current source, a second adjustable current source, an eighth switch tube, a ninth switch tube, and a second capacitor;

The control end of the eighth switch tube is connected to the output end of the spread spectrum timing signal generating module;

The input end of the first adjustable current source is connected to a power supply, the output end of the first adjustable current source is connected to the input end of the eighth switch tube, and the output end of the eighth switch tube is grounded;

The input end of the second adjustable current source is connected to the power supply, the output end of the second adjustable current source is connected to the input end of the ninth switch tube, and the output end of the ninth switch tube is grounded;

The first end of the second capacitor is respectively connected to the input end of the eighth switch tube and the control end of the ninth switch tube, and the second end of the second capacitor is grounded.

Optionally, the charging pulse signal generating module includes: an inverter and an NOR comparator;

The input end of the inverter is connected to the common end of the second adjustable current source and the ninth switch tube, and the output end of the inverter is connected to the first input end of the NOR comparator, so the The second input terminal of the NOR comparator is connected to the common terminal of the spread spectrum timing signal generation module and the eighth switch tube, and the output terminal of the NOR comparator is used as the output terminal of the modulation cycle module circuit , for outputting the charging pulse signal.

Optionally, the charging pulse signal generating module further includes: a third adjustable current source and a tenth switch;

The input end of the third adjustable current source is connected to the power supply, the output end of the third adjustable current source is connected to the input end of the tenth switch tube, and the output end of the tenth switch tube is connected to the ninth switch tube the input end of the switch tube and the common end of the input end of the inverter, and the control end of the tenth switch tube is connected to the common end of the output end of the inverter and the second input end of the NOR comparator;

The tenth switch tube is used for quickly inverting the level of the common terminal of the tenth switch tube, the inverter and the NOR comparator when turned on.

An electronic device includes the above-mentioned spread spectrum clock generator.

As can be seen from the above technical solutions, the spread spectrum clock generator and electronic equipment disclosed in the present invention include a modulation period module circuit, a spread spectrum depth module circuit and a clock circuit, and the modulation period module circuit divides the fundamental frequency output by the clock circuit, The frequency-spreading period signal, the frequency-spreading direction switching signal and the charging pulse period signal are obtained. The modulation period module circuit processes the charging pulse period signal to obtain the charging pulse signal. The frequency-spreading depth module circuit is based on the frequency-spreading period signal output by the modulation period module circuit. , a spread spectrum direction switching signal and a charging pulse signal to generate a bias current, and the bias current is input to the clock circuit, so that the clock circuit generates a spread spectrum based on the bias current. Since the modulation period module circuit, the spread spectrum depth module circuit and the clock circuit are all integrated inside the spread spectrum clock generator chip circuit, it is possible to generate the spread spectrum to suppress electromagnetic interference without requiring the spread spectrum clock generator chip circuit. The external peripheral devices are added, thereby greatly reducing the layout area of the entire circuit, and effectively reducing the hardware cost caused by adding peripheral devices.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to the disclosed drawings without creative efforts.

1 is a schematic diagram of a frequency spectrum before and after modulation disclosed in an embodiment of the present invention;

2 is a functional block diagram of a spread spectrum clock generator disclosed in an embodiment of the present invention;

3 is a circuit diagram of a spread spectrum depth module circuit disclosed in an embodiment of the present invention;

4 is a schematic diagram of a control sequence of a spread spectrum depth module circuit disclosed in an embodiment of the present invention;

5 is a circuit diagram of a modulation period module circuit disclosed in an embodiment of the present invention;

FIG. 6 is a schematic diagram of a charging pulse generation sequence circuit disclosed in an embodiment of the present invention;

FIG. 7 is a circuit diagram of another modulation period module circuit disclosed in an embodiment of the present invention.

Detailed ways

In order to suppress electromagnetic interference, the present invention adopts a spread spectrum clock generator to generate spread spectrum to reduce the peak power of high-order harmonics, thereby effectively reducing electromagnetic interference.

In order to facilitate the understanding of the process of using spread spectrum to reduce electromagnetic interference, the present invention is described from two angles of modulation and frequency modulation, as follows:

(1) modulation

Frequency modulation technology is used when reducing the EMI of the clock circuit through the SSCG (Spread Spectrum Clock Generator) circuit. EMI is pulsed energy generated by a precise clock frequency that can interfere with electronic equipment and cause it to malfunction. Currently, the US Federal Communications Commission has established some standards to ensure that electronic equipment can work normally in an EMI environment.

Modulation is the process of making changes to one or more properties of a high frequency periodic waveform called the carrier signal _fc by modulating the signal _fm . A periodic waveform has three key factors that can be embedded by the low-frequency signal to obtain the modulated signal. The three key factors are amplitude, phase and frequency.

The carrier signal f _c is usually generated by an oscillator circuit, and the frequency is often much higher than the modulating signal. It is a periodic waveform with fixed frequency and fixed amplitude. The modulating signal Vm( _t ) can be generated from any signal generating circuit, is very low frequency compared to the carrier signal _fc , and is responsible for changing the initial characteristics of the carrier signal. The modulated signal can be periodic, or aperiodic.

The modulated signal F(t) is the result of the modulation process of the carrier signals fc and _Vm ( _t ). Its expression can be written as:

where A(t) is the time-varying amplitude, ω _c =2πf _c is the carrier frequency, θ(t) is the time-varying phase angle,

is the angle of the modulated signal. The modulation signal Vm( _t ) can optionally control amplitude, angle, or both. In FM modulation, A( _t ) remains constant, and fc is constantly changing, which is consistent with the instantaneous amplitude of the modulating signal Vm( _t ).

(2) Frequency modulation

The classic definition of FM modulation is that the instantaneous output frequency of the transmitter is consistent with changes in the modulating signal. The amount of change δω of the instantaneous frequency ω(t) relative to the fixed-value carrier frequency _ωc is proportional to the instantaneous amplitude of the modulation signal Vm( _t ). The instantaneous frequency of the FM modulation waveform result can be represented by:

In FM modulation, δω(t) is proportional to V _m (t), which gives:

δω(t)=k _ω ·V _m (t) (3);

In the formula, k _ω is a parameter for calculating the degree of modulation, and the unit is Hz/V, from which the initial phase θ(0) can be obtained:

The initial phase θ(0) is usually regarded as 0.

The expression of the modulated sinusoidal waveform F(t) can be derived from Equation 1 and Equation 4:

Refer to the schematic diagram of the frequency spectrum before and after modulation shown in Figure 1, where A is the original EMI energy, Ae is the EMI energy after modulation, Δf _c shows the spectrum spread width, B is the spread spectrum width, Amplitude is the signal amplitude.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

The embodiment of the present invention discloses a spread spectrum clock generator and electronic equipment, comprising a modulation period module circuit, a spread spectrum depth module circuit and a clock circuit. The modulation period module circuit divides the fundamental frequency output by the clock circuit to obtain the spread spectrum Periodic signal, spread spectrum direction switching signal and charging pulse period signal, the modulation period module circuit processes the charging pulse period signal to obtain the charging pulse signal, the spread spectrum depth module circuit is based on the spread spectrum period signal, spread spectrum output by the modulation period module circuit The direction switching signal and the charging pulse signal generate a bias current, and the bias current is input to the clock circuit, so that the clock circuit generates a spread spectrum based on the bias current. Since the modulation period module circuit, the spread spectrum depth module circuit and the clock circuit are all integrated inside the spread spectrum clock generator chip circuit, it is possible to generate the spread spectrum to suppress electromagnetic interference without requiring the spread spectrum clock generator chip circuit. The external peripheral devices are added, thereby greatly reducing the layout area of the entire circuit, and effectively reducing the hardware cost caused by adding peripheral devices.

Referring to FIG. 2, a functional block diagram of a spread spectrum clock generator disclosed in an embodiment of the present invention, the spread spectrum clock generator includes: a modulation period (Circle Time, CLT) module circuit 11, a spread spectrum depth (Spread Spectrum Rate, SSR) A module circuit 12 and a clock circuit (oscillator, OSC) 13 .

in:

The modulation cycle module circuit 11 is used to divide the frequency of the fundamental frequency output by the clock circuit 13 to obtain the frequency spread period signal CLK_RESET, the frequency spread direction switching signal CLK_SW and the charging pulse period signal CLK_500k, and process the charging pulse period signal CLK_500k , get the charging pulse signal CLK_CHG.

The spread spectrum depth module circuit 12 is connected to the modulation cycle module circuit 11, and the spread spectrum depth module circuit 12 is used to generate a bias based on the spread spectrum period signal CLK_RESET, the spread spectrum direction switching signal CLK_SW and the charging pulse signal CLK_CHG output by the modulation period module circuit 11. Set the current IB_CHG, and output the bias current IB_CHG to the clock circuit 13 .

The clock circuit 13 is used to generate a spread spectrum based on the bias current IB_CHG.

It should be noted that, for the specific circuit structure of the clock circuit 13, reference may be made to existing mature solutions, and details are not described herein again.

In FIG. 2, VDD represents the power supply of the spread spectrum clock generator, GND represents the grounding of the spread spectrum clock generator, and oscclk represents the output terminal of the clock circuit 13 for outputting the spread spectrum.

It should also be noted that (1) when the spread spectrum function of the spread spectrum clock generator is not turned on, the following formula will be used to obtain the fundamental frequency as the spread spectrum for output. The formula is as follows:

In the formula, f _OSC is the fundamental frequency, IB _CHG is the bias current, C _IN is the content capacitance value of the clock circuit 13 , and V _REF is the reference voltage.

Among them, C _IN · V _REF remains unchanged, and the fundamental frequency is controlled by modulating IB _CHG .

In practical applications, the clock circuit 13 can be OSC_16M.

(2) When the spread spectrum function of the spread spectrum clock generator is turned on, the modulation cycle module circuit 11, the spread spectrum depth module circuit 12 and the clock circuit 13 perform the operations in this embodiment, and the clock circuit 13 outputs an output based on the spread spectrum depth module circuit 12 The spread spectrum generated by the bias current IB_CHG of the output.

To sum up, the spread spectrum clock generator disclosed in the present invention includes a modulation period module circuit 11, a spread spectrum depth module circuit 12 and a clock circuit 13. The modulation period module circuit 11 divides the fundamental frequency output by the clock circuit 13 to obtain Spread spectrum period signal, spread spectrum direction switching signal and charging pulse period signal, modulation period module circuit 11 processes the charging pulse period signal to obtain charging pulse signal, spread spectrum depth module circuit 12 is based on the spread spectrum output by modulation period module circuit 11 The period signal, the switching signal of the spreading direction, and the charging pulse signal generate a bias current, and the bias current is input to the clock circuit 13, so that the clock circuit 13 generates a spread based on the bias current. Since the modulation period module circuit 11, the spread spectrum depth module circuit 12 and the clock circuit 13 are all integrated inside the spread spectrum clock generator chip circuit, it is possible to generate spread spectrum and suppress electromagnetic interference without generating a spread spectrum clock. By adding peripheral devices outside the device chip circuit, the layout area of the entire circuit is greatly reduced, and the hardware cost caused by the addition of peripheral devices is effectively reduced.

Referring to FIG. 3 , a circuit diagram of a spread spectrum depth module circuit disclosed in an embodiment of the present invention, the spread spectrum depth module circuit 12 includes: a first switch tube NM1 , a charge and discharge ladder current generation module 21 and a clock current mirror module 22 ;

The control end of the first switch tube NM1 is connected to the output end of the modulation cycle module circuit 11 , the output end of the first switch tube NM1 is grounded, and the first switch tube NM1 is used for the frequency spread cycle signal CLK_RESET cycle sent by the modulation cycle module circuit 11 . turn-on and turn-off;

The input terminal of the charging and discharging ladder current generation module 21 is connected to the input terminal of the first switch tube NM1, the output terminal of the charging and discharging ladder current generation module 21 is connected to the input terminal of the clock current mirror module 22, and the control terminal of the charging and discharging ladder current generation module 21 is connected to the input terminal of the clock current mirror module 22. The output end of the modulation cycle module circuit 11 is connected, and the charge and discharge ladder current generation module 21 is configured to generate the charge and discharge ladder current according to the charging pulse signal CLK_CHG sent by the modulation cycle module circuit 11;

The output end of the clock current mirror module 22 is connected to the clock circuit 13 , the control end of the clock current mirror module 22 is connected to the output end of the modulation cycle module circuit 11 , and the clock current mirror module 22 is used for switching according to the spread spectrum direction sent by the modulation cycle module circuit 11 . The signal CLK_SW changes the spreading direction, and mirrors the charge-discharge ladder current to the bias current IB_CHG and outputs it to the clock circuit 13 .

In order to further optimize the above embodiment, the charging and discharging ladder current generation module 21 may specifically include:

The second switch NM2, the first current source IB_SSRU, the second current source IB_SSRD, the first switch SWU, the second switch SWD, the first capacitor C _SSR , the operational amplifier U, the first mirror circuit 211 and the spread spectrum resistor R _SSR .

The input end of the first switch tube NM1 is respectively connected to one end of the second switch SWD and the first end of the first capacitor C _SSR , the other end of the second switch SWD is grounded through the second current source IB_SSRD, and the second end of the first capacitor C _SSR is grounded. terminal to ground.

The input terminal of the first current source IB_SSRU is connected to the power supply VDD, and the output terminal of the first current source _{IB_SSRU} is connected to the first terminal of the first capacitor CSSR through the first switch SWU.

The forward input end of the operational amplifier U is connected to the common end of the first switch SWU and the first end of the first capacitor C _SSR , and the reverse input end of the operational amplifier U is connected to the output end of the second switch tube NM2 and the spread spectrum resistor R _SSR The common terminal of , the other terminal of the spread spectrum resistor R _SSR is grounded, and the output terminal of the operational amplifier U is connected to the control terminal of the second switch tube NM2.

The input end of the second switch NM2 is connected to the first output end of the first mirror circuit 211 , the input end of the first mirror circuit 211 is connected to the power supply VDD, the second output end and the control end of the first mirror circuit 211 are both connected to the clock current mirror module 22.

The first switch SWU and the second switch SWD are used to perform corresponding closing and opening operations according to the charging pulse signal CLK_CHG sent by the modulation cycle module circuit 11 .

To further optimize the above embodiments, the clock current mirror module 22 may specifically include:

The third switch tube MP3 , the third current source IB_INI, the third switch CLK_SW, the fourth switch CLK_SWN and the second mirror circuit 221 .

The control terminal of the third switch tube MP3 is connected to the charge-discharge ladder current generation module 21, the input terminal of the third switch tube MP3 is connected to the power supply VDD, and the output terminal of the third switch tube MP3 is connected to the third switch CLK_SW and the fourth switch CLK_SWN in turn with the third switch CLK_SW and the fourth switch CLK_SWN. The second input terminals of the two mirror circuits 221 are connected, the first input terminals of the second mirror circuits 221 are connected to the charging and discharging ladder current generating module 21 , and the output terminals of the second mirror circuits 221 are grounded.

The input terminal of the third current source IB_INI is connected to the power supply VDD, the output terminal of the third current source IB_INI is connected to the common terminal of the third switch CLK_SW and the fourth switch CLK_SWN, and the third current source IB_INI, the third switch CLK_SW and the fourth switch The common terminal of CLK_SWN is used as the output terminal of the spread spectrum depth module circuit to output the bias current IB_CHG.

The third switch CLK_SW and the fourth switch CLK_SWN are used to change the spreading direction according to the spreading direction switching signal CLK_SW sent by the modulation period module circuit 11 .

It should be noted that, in practical applications, as shown in FIG. 3 , the first input end of the second mirror circuit 221 is specifically connected to the second output end of the first mirror circuit 211 , and the control end of the first mirror circuit 211 is connected to the third The control terminal of the switch tube MP3.

Combined with the control timing diagram of the spread spectrum depth module circuit shown in Figure 4, the working principle of the spread spectrum depth module circuit is as follows:

First of all, it should be noted that the first switch SWU and the second switch SWD are charge and discharge switches in the spread spectrum depth module circuit, and connect the forward input terminal of the operational amplifier U with the first switch SWU and the first capacitor C _SSR The common terminal of the terminal is defined as point A, and the common terminal of the reverse input terminal of the operational amplifier U, the second switch tube NM2 and the spread spectrum resistor R _SSR is defined as point B.

When the second switch SWD is closed and the first switch SWU is open, the first capacitor C _SSR is discharged through the second current source IB_SSRD, and the voltage at point A decreases uniformly; when the first switch SWU is closed and the second switch SWD is open, The first current source IB_SSRU charges point A, and the voltage of point A increases uniformly.

When the spread spectrum depth module circuit is in the initial state, the first switch SWU and the second switch SWD are both disconnected, and the spread spectrum period signal CLK_RESET is pulled high, that is, the spread spectrum period signal CLK_RESET is a high level signal, and the positive signal of the operational amplifier U Ground to the input, at this time, no step change current is generated. The bias current IB_CHG output by the spread spectrum depth module circuit is a constant current, and the clock circuit 13 maintains a normal frequency at this time.

When the spread spectrum depth module circuit receives the spread spectrum period signal CLK_RESET sent by the modulation period module circuit 13, the spread spectrum function of the spread spectrum depth module circuit is turned on, and when the spread spectrum period starts, the spread spectrum period signal CLK_RESET is set low (ie frequency cycle signal CLK_RESET is low level), the control terminal signal of the first switch tube NM1 is pulled low, the first switch tube NM1 is turned off, the initialization is completed, and the first current source IB_SSRU charges the first capacitor C _SSR , therefore, Every time a spread spectrum period (CLT_TIME) passes, the first current source IB_SSRU charges the first capacitor C _SSR , so as to realize the stepwise charging of the first capacitor C _SSR by the first current source IB_SSRU, wherein the first capacitor C The charging pulse width and charging cycle of the _SSR can be adjusted. During the step-wise charging of the first capacitor C _SSR by the first current source IB_SSRU, the voltage at point A will rise stepwise, and clamped to point B by the operational amplifier U, the current generated on the spread spectrum resistor R _SSR (V _B /RSSR ) is mirrored to the bias current _{IB_CHG} by the first mirror circuit 211 and output to the clock circuit 13 .

Wherein, the spread spectrum period may be a 16M frequency division signal. In this embodiment, the spread spectrum period may be 1980us, that is, 1.98ms.

The third switch CLK_SW is used to determine the spread spectrum direction according to the spread spectrum direction switching signal CLK_SW output by the modulation period module circuit 11 . In each spread spectrum period, the OSC frequency uniformly changes from the preset minimum value to the preset maximum value, preferably 16M as the center frequency.

When the spread spectrum period starts, point A starts to charge and reaches the maximum value, the third switch CLK_SW is set high, that is, the third switch CLK_SW is closed, the fourth switch CLK_SWN is set low, that is, the fourth switch CLK_SWN is open, and the spread spectrum depth module circuit The output bias current IB_CHG is the smallest, and the OSC frequency is the smallest.

When the second switch SWD is closed and the first switch SWU is open, the first capacitor C _SSR is discharged through the second current source IB_SSRD, the voltage at point A decreases stepwise, and the bias current IB_CHG output by the spread spectrum depth module circuit is V _STEP / R _SSR rises in steps, V _STEP is the voltage at point A, and the OSC frequency gradually increases; after half a spread spectrum period (for example, the spread spectrum period is: 1980us, and the half spread spectrum period is 990us), the third switch CLK_SW turns from closed to In order to open, the fourth switch CLK_SWN is turned from open to closed, and the bias current IB_CHG output by the spread spectrum depth module circuit still rises according to the preset fixed increment, thus ensuring the monotonicity of the OSC frequency change, the so-called monotonicity of the OSC frequency change. , that is, within a spread spectrum period, the OSC frequency is fixed to increase upward and there is no situation where the OSC frequency will fall.

In this embodiment, the first switch transistor NM1, the second switch transistor NM2 and the third switch transistor MP3 are all MOS transistors.

In order to further optimize the above embodiment, as shown in FIG. 3 , the first mirror circuit 211 includes: a fourth switch tube MP1 and a fifth switch tube MP2;

The input terminal of the fourth switch tube MP1 and the input terminal of the fifth switch tube MP2 are both connected to the power supply VDD, the control terminal of the fourth switch tube MP1 and the control terminal of the fifth switch tube MP2 are connected, and the control terminal of the fourth switch tube MP1 and The common terminal of the control terminal of the fifth switch tube MP2 is respectively connected to the output terminal of the fourth switch tube MP1 and the control terminal of the third switch tube MP3, and the output terminal of the fourth switch tube MP1 serves as the first output terminal of the first mirror circuit 211. Connected to the input end of the second switch tube NM2 , and the output end of the fifth switch tube MP2 is connected to the first input end of the second mirror circuit 221 as the second output end of the first mirror circuit 211 .

In this embodiment, the spread spectrum resistor R _SSR is used to convert the voltage at point A into a branch circuit change of the fourth switch tube MP1 and mirror it to the bias current IB_CHG.

Optionally, the fourth switch MP1 and the fifth switch MP2 are both MOS transistors.

To further optimize the above embodiment, as shown in FIG. 3 , the second mirror circuit 221 includes: a sixth switch MN1 and a seventh switch MN2.

The input end of the sixth switch tube MN1 is connected to the output end of the fifth switch tube MP2 as the first input end of the second mirror circuit 221, the output end of the sixth switch tube MN1 is grounded, and the control end and the input end of the sixth switch tube MN1 Both are connected to the control terminal of the seventh switch tube MN2.

The input terminal of the seventh switch MN2 is connected to the fourth switch CLK_SWN as the second input terminal of the second mirror circuit 221 , and the output terminal of the seventh switch MN2 is grounded.

Preferably, the sixth switch MN1 and the seventh switch MN2 are both MOS transistors.

Referring to FIG. 5 , a circuit diagram of a modulation period module circuit disclosed in an embodiment of the present invention, the modulation period module circuit 11 includes: a spread spectrum timing signal generation module 31 , a signal acceleration module 32 and a charging pulse signal generation module 33 ;

The spread spectrum timing signal generation module 31 is used for dividing the frequency of the fundamental frequency signal output by the clock circuit 13 to obtain the spread spectrum period signal CLK_RESET, the spread spectrum direction switching signal CLK_SW and the charging pulse period signal CLK_500k.

The input end of the signal acceleration module 32 is connected with the output end of the spread spectrum timing signal generation module 31, the output end of the signal acceleration module 32 is connected with the first input end of the charging pulse signal generation module 33, and the signal acceleration module 32 is used to The charging pulse period signal CLK_500k output by the spread spectrum timing signal generation module 31 is converted into a pulse signal;

The second input terminal of the charging pulse signal generation module 33 is connected to the output terminal of the spread spectrum timing signal generation module 31. The output terminal of the charging pulse signal generation module 33 is used as the output terminal of the modulation cycle module circuit 11. The charging pulse signal generation module 33 uses The charging pulse signal CLK_CHG is obtained based on the pulse signal output by the signal acceleration module 32 and the charging pulse period signal CLK_500k output by the spread spectrum timing signal generating module 31 .

To further optimize the above embodiment, the spread spectrum timing signal generation module 31 may include: a first frequency divider DIVIDER1, a second frequency divider DIVIDER2 and a third frequency divider DIVIDER3;

The first frequency divider DIVIDER1 is used to divide the base frequency signal output by the clock circuit 13 to obtain the spread spectrum period signal CLK_RESET; the second frequency divider DIVIDER2 is used to divide the frequency of the base frequency signal output by the clock circuit 13 to obtain the spread spectrum The direction switching signal CLK_SW; the third frequency divider DIVIDER3 is used to divide the base frequency signal output by the clock circuit 13 to obtain the charging pulse period signal CLK_500k.

To further optimize the above embodiment, the signal acceleration module 32 may include: a first adjustable current source IB1, a second adjustable current source IB2, an eighth switch M1, a ninth switch M2, and a second capacitor _CC ;

The control end of the eighth switch tube M1 is connected to the output end of the spread spectrum timing signal generation module 31;

The input end of the first adjustable current source IB1 is connected to the power supply VDD, the output end of the first adjustable current source IB1 is connected to the input end of the eighth switch M1, and the output end of the eighth switch M1 is grounded.

The input terminal of the second adjustable current source IB2 is connected to the power supply VDD, the output terminal of the second adjustable current source IB2 is connected to the input terminal of the ninth switch M2, and the output terminal of the ninth switch M2 is grounded.

The first end of the second capacitor C _C is respectively connected to the input end of the eighth switch M1 and the control end of the ninth switch M2, and the second end of the second capacitor C _C is grounded.

Preferably, the eighth switch M1 and the ninth switch M2 are both MOS transistors.

To further optimize the above embodiment, the charging pulse signal generating module 33 may include: an inverter INV1 and a NOR comparator NOR.

The input terminal of the inverter INV1 is connected to the common terminal of the second adjustable current source IB2 and the ninth switch tube M2, and the output terminal of the inverter INV1 is connected to the first input terminal of the NOR comparator or the non-comparator NOR. The second input terminal is connected to the common terminal of the spread spectrum timing signal generating module 31 and the eighth switch tube M1, or the output terminal of the non-comparator NOR is used as the output terminal of the modulation period module circuit for outputting the charging pulse signal.

Combined with the narrow pulse generation sequential circuit diagram shown in Figure 6, the working principle of the modulation period module circuit is as follows:

The common terminal of the first adjustable current source IB1, the eighth switch M1, the second capacitor C _C and the ninth switch M2 is defined as point A1, and the common terminal of the ninth switch M2 and the inverter INV1 is defined as Point A2, define the common terminal of the inverter INV1 and the NOR comparator NOR as point A3.

In order to make the charging step of the first capacitor C _SSR in FIG. 3 controllable, the modulation period module circuit shown in FIG. 5 can be used as a pulse generating circuit. When the CLK_500K signal output by the spread spectrum timing signal generating module 31 is high When the CLK_500K signal is turned from high level to low level, the eighth switch The tube M1 is turned off, the first adjustable current source IB1 charges the second capacitor C _C , the voltage of the A1 point slowly rises to the vicinity of the conduction threshold VT2 of the ninth switch tube M2, and the A2 point changes from high voltage to low voltage to generate a preset delay window T _DLY , where T _DLY =C _C V _T2 /IB1.

The pulse signal output by the inverter INV1 and the CLK_500K signal output by the spread spectrum timing signal generating module 31 are logically ORed to obtain the final charging pulse signal, specifically the charging pulse signal CLK_CHG.

It should be noted that the modulation period module circuit is used to provide the spread spectrum period signal and the charging pulse signal to the spread spectrum depth block circuit. Wherein, the spread spectrum period and the spread spectrum direction switching signal CLK_SW are obtained according to the frequency division signal output by the clock circuit.

In order to further optimize the above embodiment, referring to FIG. 7 , which is a circuit diagram of another modulation period module circuit disclosed in the embodiment of the present invention, on the basis of the embodiment shown in FIG. 5 , the charging pulse signal generating module 33 may further include: a third Adjustable current source IB3 and tenth switch tube M3;

The input terminal of the third adjustable current source IB3 is connected to the power supply VDD, the output terminal of the third adjustable current source IB3 is connected to the input terminal of the tenth switch M3, and the output terminal of the tenth switch M3 is connected to the input of the ninth switch M2 terminal and the common terminal of the input terminal of the inverter INV1, and the control terminal of the tenth switch tube M3 is connected to the common terminal of the output terminal of the inverter INV1 and the second input terminal of the NOR comparator NOR.

In this embodiment, the common terminal of the tenth switch tube M3, the inverter INV1 and the NOR comparator NOR is defined as point A3, and the tenth switch tube M3 is used to quickly invert the level of point A3.

Initially, point A2 is low level, and point A3 is high level. When point A2 changes from low level to high level, point A3 changes from high level to low level. At this time, the tenth switch tube M3 conducts On, the voltage of point A2 is quickly pulled up to the power supply voltage to ensure that the charging pulse signal CLK_CHG does not appear additional glitches and interference.

Preferably, the tenth switch transistor M3 is a MOS transistor.

The present invention also discloses an electronic device, the electronic device includes the spread spectrum clock generator described in the above embodiments, wherein, for the specific process of generating the spread spectrum by the electronic device, please refer to the corresponding part of the embodiment of the spread spectrum clock generator, It will not be repeated here.

Finally, it should also be noted that in this document, relational terms such as first and second are used only to distinguish one entity or operation from another, and do not necessarily require or imply these entities or there is any such actual relationship or sequence between operations. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device comprising a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the various embodiments can be referred to each other.

The above description of the disclosed embodiments enables any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (12)

1. A spread spectrum clock generator, characterized in that it comprises: a modulation period module circuit, a spread spectrum depth module circuit and a clock circuit;

   The modulation cycle module circuit is used to divide the frequency of the fundamental frequency output by the clock circuit to obtain a frequency-spreading period signal, a frequency-spreading direction switching signal and a charging pulse period signal, and process the charging pulse period signal to obtain charging pulse signal;

   The spread spectrum depth module circuit is connected to the modulation period module circuit, and the spread spectrum depth module circuit is configured to be based on the spread spectrum period signal, the spread spectrum direction switching signal and all the output frequency spectrum output by the modulation period module circuit. the charging pulse signal to generate a bias current, and output the bias current to the clock circuit;

   The clock circuit is configured to generate a spread spectrum based on the bias current.
2. The spread spectrum clock generator according to claim 1, wherein the spread spectrum depth module circuit comprises: a first switch tube NM1, a charge and discharge ladder current generation module and a clock current mirror module;

   The control end of the first switch tube is connected to the output end of the modulation cycle module circuit, the output end of the first switch tube is grounded, and the first switch tube is used for the spread spectrum sent by the modulation cycle module circuit Periodic signal turns on and off periodically;

   The input end of the charge and discharge ladder current generation module is connected to the input end of the first switch tube, the output end of the charge and discharge ladder current generation module is connected to the input end of the clock current mirror module, and the charge and discharge ladder current is connected to the input end of the clock current mirror module. The generation module control terminal is connected to the output terminal of the modulation cycle module circuit, and the charge and discharge ladder current generation module is configured to generate a charge and discharge ladder current according to the charging pulse signal sent by the modulation cycle module circuit;

   The output end of the clock current mirror module is connected to the clock circuit, the control end of the clock current mirror module is connected to the output end of the modulation cycle module circuit, and the clock current mirror module is used for the modulation cycle module circuit according to the modulation cycle module circuit. The transmitted spread-spectrum direction switching signal changes the spread-spectrum direction, and mirrors the charge-discharge ladder current to the bias current and outputs it to the clock circuit.
3. The spread spectrum clock generator according to claim 2, wherein the charging and discharging ladder current generating module comprises: a second switch tube, a first current source, a second current source, a first switch, a second switch, a first capacitor, an operational amplifier, a first mirror circuit and a spread spectrum resistor;

   The input end of the first switch tube is respectively connected to one end of the second switch and the first end of the first capacitor, the other end of the second switch is grounded through the second current source, and the first The second end of the capacitor is grounded;

   The input end of the first current source is connected to a power supply, and the output end of the first current source is connected to the first end of the first capacitor through the first switch;

   The forward input end of the operational amplifier is connected to the common end of the first switch and the first end of the first capacitor, and the reverse input end of the operational amplifier is connected to the output end of the second switch tube and the first end of the first capacitor. the common end of the spread spectrum resistor, the other end of the spread spectrum resistor is grounded, and the output end of the operational amplifier is connected to the control end of the second switch tube;

   The input end of the second switch tube is connected to the first output end of the first mirror circuit, the input end of the first mirror circuit is connected to the power supply, and the second output end and the control end of the first mirror circuit are both connected the clock current mirror module;

   The first switch and the second switch are configured to perform corresponding closing and opening operations according to the charging pulse signal sent by the modulation period module circuit.
4. The spread spectrum clock generator according to claim 3, wherein the first mirror circuit comprises: a fourth switch tube and a fifth switch tube;

   The input end of the fourth switch tube and the input end of the fifth switch tube are both connected to the power supply, the control end of the fourth switch tube is connected to the control end of the fifth switch tube, and the fourth switch tube The common end of the control end of the fifth switch tube and the control end of the fifth switch tube are respectively connected with the output end of the fourth switch tube and the control end of the third switch tube, and the output end of the fourth switch tube is used as the The first output end of the first mirror circuit is connected to the input end of the second switch tube, and the output end of the fifth switch tube serves as the second output end of the first mirror circuit and the second output end of the second mirror circuit. The first input terminal is connected.
5. The spread spectrum clock generator according to claim 2, wherein the clock current mirror module comprises: a third switch tube, a third current source, a third switch, a fourth switch and a second mirror circuit;

   The control end of the third switch tube is connected to the charge-discharge ladder current generation module, the input end of the third switch tube is connected to the power supply, and the output end of the third switch tube passes through the third switch and the the fourth switch is connected to the second input terminal of the second mirror circuit, the first input terminal of the second mirror circuit is connected to the charging and discharging ladder current generating module, and the output terminal of the second mirror circuit is grounded;

   The input end of the third current source is connected to a power supply, the output end of the third current source is connected to the common end of the third switch and the fourth switch, and the third current source, the third The common terminal of the switch and the fourth switch is used as the output terminal of the spread spectrum depth module circuit, and is used to output the bias current IB_CHG;

   The third switch and the fourth switch are used to change the spread spectrum direction according to the spread spectrum direction switching signal sent by the modulation period module circuit.
6. The spread spectrum clock generator according to claim 5, wherein the second mirror circuit comprises: a sixth switch tube and a seventh switch tube;

   The input end of the sixth switch tube is connected to the output end of the fifth switch tube as the first input end of the second mirror circuit, the output end of the sixth switch tube is grounded, and the output end of the sixth switch tube is grounded. The control end and the input end are both connected to the control end of the seventh switch tube;

   The input end of the seventh switch tube is connected to the fourth switch as the second input end of the second mirror circuit, and the output end of the seventh switch tube is grounded.
7. The spread spectrum clock generator according to claim 1, wherein the modulation cycle module circuit comprises: a spread spectrum timing signal generation module, a signal acceleration module and a charging pulse signal generation module;

   The spread spectrum timing signal generation module is configured to divide the frequency of the fundamental frequency signal output by the clock circuit to obtain the spread spectrum period signal, the spread spectrum direction switching signal and the charging pulse period signal;

   The input end of the signal acceleration module is connected to the output end of the spread spectrum timing signal generation module, the output end of the signal acceleration module is connected to the first input end of the charging pulse signal generation module, and the signal acceleration module for converting the charging pulse period signal output by the spread spectrum timing signal generating module into a pulse signal;

   The second input end of the charging pulse signal generation module is connected to the output end of the spread spectrum timing signal generation module, the output end of the charging pulse signal generation module is used as the output end of the modulation cycle module circuit, the charging The pulse signal generation module is configured to obtain the charging pulse signal based on the pulse signal output by the signal acceleration module and the charging pulse period signal output by the spread spectrum timing signal generation module.
8. The spread spectrum clock generator according to claim 7, wherein the spread spectrum timing signal generation module comprises: a first frequency divider, a second frequency divider and a third frequency divider;

   The first frequency divider is used for dividing the frequency of the fundamental frequency signal output by the clock circuit to obtain the spread spectrum period signal;

   The second frequency divider is used for dividing the frequency of the fundamental frequency signal output by the clock circuit to obtain the frequency-spreading direction switching signal;

   The third frequency divider is used for dividing the frequency of the fundamental frequency signal output by the clock circuit to obtain the charging pulse period signal.
9. The spread spectrum clock generator according to claim 7, wherein the signal acceleration module comprises: a first adjustable current source, a second adjustable current source, an eighth switch tube, a ninth switch tube, a second capacitor;

   The control end of the eighth switch tube is connected to the output end of the spread spectrum timing signal generation module;

   The input end of the first adjustable current source is connected to a power supply, the output end of the first adjustable current source is connected to the input end of the eighth switch tube, and the output end of the eighth switch tube is grounded;

   The input end of the second adjustable current source is connected to a power supply, the output end of the second adjustable current source is connected to the input end of the ninth switch tube, and the output end of the ninth switch tube is grounded;

   The first end of the second capacitor is respectively connected to the input end of the eighth switch tube and the control end of the ninth switch tube, and the second end of the second capacitor is grounded.
10. The spread spectrum clock generator according to claim 9, wherein the charging pulse signal generating module comprises: an inverter and an NOR comparator;

    The input end of the inverter is connected to the common end of the second adjustable current source and the ninth switch tube, and the output end of the inverter is connected to the first input end of the NOR comparator, so the The second input terminal of the NOR comparator is connected to the common terminal of the spread spectrum timing signal generation module and the eighth switch tube, and the output terminal of the NOR comparator is used as the output terminal of the modulation cycle module circuit , for outputting the charging pulse signal.
11. The spread spectrum clock generator according to claim 5, wherein the charging pulse signal generating module further comprises: a third adjustable current source and a tenth switch;

    The input end of the third adjustable current source is connected to the power supply, the output end of the third adjustable current source is connected to the input end of the tenth switch tube, and the output end of the tenth switch tube is connected to the ninth switch tube the input end of the switch tube and the common end of the input end of the inverter, and the control end of the tenth switch tube is connected to the common end of the output end of the inverter and the second input end of the NOR comparator;

    The tenth switch tube is used for quickly inverting the level of the common terminal of the tenth switch tube, the inverter and the NOR comparator when turned on.
12. An electronic device, characterized by comprising the spread spectrum clock generator according to any one of claims 1 to 11.

Images