KR101780369B1 - Buck converter with spectrum spread clocking oscillator - Google Patents

Buck converter with spectrum spread clocking oscillator Download PDF

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Publication number
KR101780369B1
KR101780369B1 KR1020150177314A KR20150177314A KR101780369B1 KR 101780369 B1 KR101780369 B1 KR 101780369B1 KR 1020150177314 A KR1020150177314 A KR 1020150177314A KR 20150177314 A KR20150177314 A KR 20150177314A KR 101780369 B1 KR101780369 B1 KR 101780369B1
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South Korea
Prior art keywords
frequency
clock signal
voltage value
oscillator
capacitor
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KR1020150177314A
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Korean (ko)
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KR20170069732A (en
Inventor
박형민
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현대오트론 주식회사
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/081—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters wherein the phase of the control voltage is adjustable with reference to the AC source
    • H02M1/082—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters wherein the phase of the control voltage is adjustable with reference to the AC source with digital control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K7/00—Modulating pulses with a continuously-variable modulating signal
    • H03K7/06—Frequency or rate modulation, i.e. PFM or PRM
    • H02M2001/0006—

Abstract

A buck converter that reduces electromagnetic emission of the present invention includes a spread spectrum clock generator that receives an input signal and generates a modulated frequency clock signal. The spread spectrum clock generator includes an oscillator that outputs a clock signal, an oscillator A frequency modulation controller for performing clock frequency modulation on the output clock signal, and a capacitor for determining a voltage value charged according to the frequency of the frequency divider.

Description

[0001] The present invention relates to a buck converter using a spread spectrum clock generator,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a buck converter using a spread spectrum clock generator, and more particularly, to a buck converter for reducing electromagnetic interference using a frequency-modulatable spread spectrum clock generator.

The present invention relates to a buck converter using a spread spectrum clock generator. Generally, the oscillator of the switching regulator generates an oscillating signal having a fixed frequency. Recently, as the power IC is highly integrated, the frequency of the clock signal required for the system is also increasing.

If the frequency of the clock signal becomes high, electromagnetic interference (EMI) may be generated, which may cause the system to malfunction. That is, a high-frequency signal having a high energy (i.e., a clock signal) affects the surrounding system and causes malfunction. In order to reduce such electromagnetic interference, a spread spectrum clock generator is used. Spread-spectrum clock generators regulate the oscillating signal so that energy is distributed over a wide bandwidth of frequency to reduce electromagnetic interference.

Recently, a switching regulator using a Sigma Delta modulator (SDM) is used. However, when the Sigma Delta modulator (SDM) is used, a complicated configuration such as a digital analog converter (DAC), an integrator, an accumulator, and an oversampling clock is further added.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and a random frequency can be implemented by a simple method using a frequency divider and a current control transistor.

In addition, a frequency modulation circuit is configured by using a frequency divider and a current control transistor to reduce power consumption, increase the power efficiency of the power semiconductor, and reduce chip area.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

According to an aspect of the present invention, a buck converter circuit for reducing electromagnetic wave emission includes a clock generator for receiving an input signal and generating a frequency clock signal. The clock generator is a spread spectrum clock generator that receives an input signal and generates a modulated frequency clock signal. These spread spectrum clock generators can change the frequency randomly by determining the capacitor charge current.

The spread spectrum clock generator of the present invention includes an oscillator for outputting a clock signal, a frequency modulation controller for performing clock frequency modulation on the clock signal output from the oscillator, and a voltage controller Lt; / RTI >

In this case, the frequency modulation controller includes a plurality of current control transistors operated in accordance with a frequency divider for dividing a clock signal of the oscillator, and a clock signal for which the frequency divider is divided.

The frequency divider may be divided into at least two phase signals.

In addition, the plurality of current control transistors may control the flow of the current value corresponding to the frequency-divided phase signal.

In addition, the charge voltage value of the capacitor may vary according to the current value determined by the switching of the plurality of current control transistors.

The method of generating the spread spectrum clock signal by the spread spectrum clock generator of the present invention includes the steps of (1) determining a charge current flowing through a capacitor to raise a voltage applied to the capacitor, (2) (3) when the capacitor voltage is higher, the oscillator outputs the rising clock signal; and (4) when the rising clock is outputted in the step (3), the plurality of And turning on the switch of the transistor.

Meanwhile, in the step (1), the charge current value may be changed according to the divided clock signal.

Also, the step (4) may reduce the capacitor voltage and reset the reference voltage value.

In addition, after the step (4), the process returns to step (1) to continuously generate the spread spectrum clock.

According to the present invention, a frequency modulation circuit can be formed by a simple method using a frequency divider and a current control transistor, thereby improving the convenience of the implementation method.

In addition, a frequency modulation circuit is configured by using a frequency divider and a current control transistor to reduce power consumption, increase the power efficiency of the power semiconductor, and reduce chip area.

The effects of the present invention are not limited to the above-mentioned effects, and various effects can be included within the scope of what is well known to a person skilled in the art from the following description.

1 is a circuit diagram of a buck converter to which a spread spectrum oscillator according to an embodiment is applied.
2 is a circuit diagram of a spread spectrum oscillator according to one embodiment.
3 is a circuit diagram of a frequency divider according to an embodiment.
4 is a graph of the clock phase of the frequency divider according to one embodiment.
5 is a graph of an oscillator output according to a change in capacitor voltage according to an embodiment.
6 is a flow diagram of a method for generating a spread spectrum clock in accordance with one embodiment.

Hereinafter, a buck converter circuit to which a spread spectrum according to the present invention is applied will be described in detail with reference to the accompanying drawings. The embodiments are provided so that those skilled in the art can easily understand the technical spirit of the present invention, and thus the present invention is not limited thereto. In addition, the matters described in the attached drawings may be different from those actually implemented by the schematic drawings to easily describe the embodiments of the present invention.

In the meantime, each constituent unit described below is only an example for implementing the present invention. Thus, in other implementations of the invention, other components may be used without departing from the spirit and scope of the invention.

In addition, each component may be implemented solely by hardware or software configuration, but may be implemented by a combination of various hardware and software configurations performing the same function. Also, two or more components may be implemented together by one hardware or software.

Also, the expression " comprising " is intended to merely denote that such elements are present as an expression of " open ", and should not be understood to exclude additional elements.

Description of the Related Art [0002] As a method of randomly shaking a clock frequency of a switching regulator using a Sigma Delta Modulator (SDM), an SDM implementation method is complicated and has a large area. In addition, there is a disadvantage that a separate over sampling clock is required to operate the SDM. However, the present invention can be applied to a case where a random frequency generating clock generator is constructed by a simple structure of spread spectrum clocks (hereinafter referred to as " spread spectrum clocks " Generator 100 (Spread spectrum clocking oscillator). The frequency of oscillation output is controlled by finely adjusting the amount of capacitor charging current by dividing clock, so that the implementation method, power consumption and area are smaller than SDM.

Before describing the present invention in detail, the spread spectrum clocking oscillator 100 generates the maximum electromagnetic interference (EMI) generated by the periodic clock signal. A clock generator such as a crystal, a VCO, and a PLL generates a clock having a spread spectrum by applying deliberately random jitter to an existing clock signal in order to reduce a clock ). Spread spectrum clocking oscillator (SSC) 100 may be used in place of conventional methods such as electromagnetic interference (EMI) filters, ferrite beads, choke coils, power and ground plane design of printed circuit boards It is applied to the PCI express bus in a manner that reduces electromagnetic interference (EMI) by lowering the maximum power density of the clock. Hereinafter, the present invention will be described in detail with reference to the drawings.

1 is a circuit diagram of a buck converter to which a spread spectrum clock generator 100 according to an embodiment of the present invention is applied.

1, a buck converter circuit according to the present invention includes an input power supply Vin, a transistor Tr, a diode D, a low pass filter LPF, a resistor R, a capacitor C, a clock generator Oscillator ).

More specifically, the buck converter circuit receives input power Vin, a transistor Tr for switching, a resistor R for current or voltage control, a capacitor C, an inductor L and an input signal, And a clock generator (Oscillator) for generating a clock signal.

The input power supply Vin is connected in series with the transistor Tr and the transistor Tr includes a diode D, an inductor L, two resistors R, a capacitor C and a low-pass filter LPF Respectively. At this time, the transistor Tr is switched by a control circuit, and the control circuit is composed of a spread spectrum clocking oscillator 100 and a low-pass filter (LPF). That is, the output signal of the low-pass filter LPF can be compared with the output signal of the spread-spectrum clock generator 100 to control the turn-on and turn-off operations of the transistor Tr.

A spread spectrum clocking oscillator 100 receives an input signal and generates a modulated frequency clock signal. On the other hand, the spread spectrum clocking oscillator 100 can change the frequency randomly by changing the charging current of the capacitor C1.

2 is a circuit diagram of a spread spectrum clocking oscillator 100 according to an embodiment of the present invention.

The spread spectrum clocking oscillator (100) of the present invention includes an oscillator, a frequency modulation controller (110), and a capacitor (C1).

A frequency modulation controller 110 for performing clock frequency modulation on a clock signal output from the oscillator; a current controller 110 for dividing the frequency of the current Lt; RTI ID = 0.0 > C1. ≪ / RTI >

The oscillator outputs a clock signal. And outputs a clock signal according to the input signal value. The frequency modulation controller 110 performs clock frequency modulation on the clock signal output by the oscillator. At this time, the frequency modulation controller 110 includes a divider 111 and current control transistors Tr1, Tr2 and Tr3.

Specifically, the divider 111 divides the clock signal of the oscillator. Referring to FIG. 2, the clock signal of the oscillator can be divided into three phases (? 1,? 2,? 3). However, the number of phases to be divided is not limited to this, and it is possible to change the design of the circuit so that it can be divided into at least two or more phase signals.

Thereafter, the current control transistors Tr1, Tr2, and Tr3 operate in accordance with the clock signal divided by the divider 111 (divider). For example, referring to FIG. 4, three phase signals turn on or off each of the current control transistors Tr1, Tr2, and Tr3 to provide a total of eight divider clocks A phase signal can be generated.

However, this is only an example corresponding to the above-described number of divided phases, and it is possible to control the flow of the set current value by operating the current control transistors Tr1, Tr2, ... corresponding to the divided signals in two or more phase signals .

Thereafter, the amount of current flowing through the capacitor C1 is determined by the current control transistors Tr1, Tr2, and Tr3, thereby determining the voltage value Vcap to be charged in the capacitor C1.

3 is a circuit diagram of a divider 111 according to an embodiment of the present invention. Referring to FIG. 3, the divider 111 is composed of three flip-flops, which are called D-flip-flops, which are usually used for data delay.

Three D flip flops are used to generate three phases in sequence. A first delay signal is generated for the first clock signal, a second delay signal is generated using the first delay signal as an input signal, And a second-order delay signal is used as an input signal to generate a third-order delay signal. The primary, secondary and tertiary delay signals referred to herein are three phase signals divided by a divider 111 with respect to the clock signal of the oscillator. On the other hand, each D flip-flop can use a rising edge or a falling edge.

FIG. 5 is a graph of an oscillator output according to a change of a capacitor voltage (Vcap) according to an embodiment of the present invention, and FIG. 6 is a flowchart of a method of generating a spread spectrum clock according to an embodiment of the present invention.

5 and 6, a method of generating a spread spectrum clock according to the present invention includes the steps of (1) increasing a capacitor voltage (Vcap) (S1), (2) comparing voltage values (S2) A clock output step S3, and (4) a transistor switching step S4.

In step (1), the charging current value flowing through the capacitor C1 is determined to raise the voltage Vcap applied to the capacitor (S1). At this time, referring to FIG. 2, the charge current value can be represented by 1 μA + α. This means the sum of the current (100nA, 10nA, 1nA) provided by the turn-on operation to the 1μA current source connected in parallel with the capacitor C1 and the plurality of current control transistors Tr1, Tr2 and Tr3. That is, in step (1), the charge current value can be changed according to the divided clock signal. As described above, eight kinds of current values can be determined according to the turn-on and turn-off of the current control transistors Tr1, Tr2 and Tr3.

In step (2), the capacitor voltage (Vcap) of step (1) is compared with a predetermined reference voltage value (Vref) (S2).

In step (3), when the capacitor voltage (Vcap) is larger, the oscillator outputs the rising clock (S3).

In step (4), when the rising clock is output in step (3), the switches of the plurality of transistors connected to the oscillator are turned on (S4). At this time, the capacitor voltage Vcap can be reduced and the reference voltage value Vref can be reset.

On the other hand, after step (4), the process returns to step (1) to continuously generate the spread spectrum clock.

It should also be understood that although the flowcharts depict the operations in the drawings in a particular order, they are shown for the sake of obtaining the most desirable results, and such operations must necessarily be performed in the specific order or sequential order shown, Should not be construed as being.

As such, the specification is not intended to limit the invention to the precise form disclosed. While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. .

The scope of the present invention is defined by the appended claims rather than the foregoing description, and all changes or modifications derived from the meaning and scope of the claims and equivalents thereof are deemed to be included in the scope of the present invention. .

100: SSC OSC (Spread Spectrum Clock Generator)
110: Frequency modulation controller
111: Divider (divider)

Claims (12)

1. A buck converter circuit for reducing electromagnetic emission,
Wherein the buck converter circuit includes a spread spectrum clock generator for receiving an input signal and generating a frequency clock signal,
Wherein the spread spectrum clock generator comprises:
An oscillator for outputting a clock signal;
A frequency modulation controller for modulating the frequency of the clock signal output by the oscillator; And
And a capacitor whose charge voltage value is determined according to a clock signal modulated by the frequency modulation controller,
Wherein the frequency modulation controller comprises: a frequency divider for frequency-dividing a clock signal of the oscillator; And a plurality of current control transistors that operate in accordance with a clock signal that the divider divides,
Wherein the oscillator compares a charging voltage value of the capacitor with a predetermined reference voltage value and outputs a high level clock signal for decreasing the charging voltage value of the capacitor when the comparison result indicates that the charging voltage value is larger, And the reference voltage value is reset.

delete The method according to claim 1,
Wherein the spread spectrum clock generator changes the capacitor charge current to randomly change the frequency.
An oscillator for outputting a clock signal;
A frequency modulation controller for modulating the frequency of the clock signal output by the oscillator; And
And a capacitor whose charge voltage value is determined according to a clock signal modulated by the frequency modulation controller,
Wherein the frequency modulation controller comprises: a frequency divider for frequency-dividing a clock signal of the oscillator; And a plurality of current control transistors that operate in accordance with a clock signal that the divider divides,
The charge voltage value varies according to a current value determined by the switching of the plurality of current control transistors,
Wherein the oscillator compares a charging voltage value of the capacitor with a predetermined reference voltage value and outputs a high level clock signal for decreasing the charging voltage value of the capacitor when the comparison result indicates that the charging voltage value is larger, And to reset the reference voltage value. ≪ Desc / Clms Page number 24 >

delete The method of claim 4,
Wherein the frequency divider is divided into at least two or more phase signals.
The method of claim 6,
Wherein the plurality of current control transistors control the flow of current values corresponding to the frequency-divided phase signals.
delete delete delete delete delete
KR1020150177314A 2015-12-11 2015-12-11 Buck converter with spectrum spread clocking oscillator KR101780369B1 (en)

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KR101780369B1 true KR101780369B1 (en) 2017-09-21

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111641404B (en) * 2020-05-12 2022-06-03 成都华微电子科技股份有限公司 Clock frequency spreading method and clock frequency spreading circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
David Gonzalez et al., Conducted EMI Reduction in Power Converters by Means of Periodic Switching Frequency Modulation, IEEE Trans. on Power Electronics, vo.22, no.6, pp.2271-2281. (2007.11.)*

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