WO2022116891A1 - 一种焊点电迁移的测量方法及装置 - Google Patents

一种焊点电迁移的测量方法及装置 Download PDF

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Publication number
WO2022116891A1
WO2022116891A1 PCT/CN2021/133197 CN2021133197W WO2022116891A1 WO 2022116891 A1 WO2022116891 A1 WO 2022116891A1 CN 2021133197 W CN2021133197 W CN 2021133197W WO 2022116891 A1 WO2022116891 A1 WO 2022116891A1
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Prior art keywords
voltage
solder joint
resistance
chain
solder
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PCT/CN2021/133197
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English (en)
French (fr)
Inventor
孙钮一
杨丹
梅娜
孙拓北
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中兴通讯股份有限公司
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Priority to JP2023531569A priority Critical patent/JP2023550192A/ja
Priority to US18/265,358 priority patent/US20240036123A1/en
Publication of WO2022116891A1 publication Critical patent/WO2022116891A1/zh

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/14Measuring resistance by measuring current or voltage obtained from a reference source
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/2856Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
    • G01R31/2858Measuring of material aspects, e.g. electro-migration [EM], hot carrier injection
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/66Testing of connections, e.g. of plugs or non-disconnectable joints
    • G01R31/70Testing of connections between components and printed circuit boards
    • G01R31/71Testing of solder joints
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Definitions

  • Embodiments of the present application relate to the technical field of semiconductor metal electromigration testing, and in particular, to a method and device for measuring electromigration of solder joints.
  • Electromigration life of solder joints is one of the important indicators for evaluating package and board-level reliability. There are many options for effective test structures for electromigration accelerated life testing of solder joints, and the daisy chain of series solder joints is one of the more common test structures. .
  • Figure 1 is a schematic diagram of a daisy chain in the related art. As shown in Figure 1, the package and board-level solder joint daisy-chain design belongs to a single chain that simply connects solder joints in series, and has the following defects:
  • the traditional daisy chain has only two endpoints, in order to meet the requirements of the resistance measurement accuracy (R min ) of the test system, it is necessary to design a daisy chain with a certain length. Since the traditional daisy chain adopts the two-terminal method to measure the resistance, only the total resistance of the entire daisy chain can be measured, not the resistance of a single solder joint.
  • the embodiments of the present application provide a method and device for measuring the electromigration of a solder joint, so as to at least solve the problem in the related art that the resistance of a solder joint cannot be measured by detecting the resistance of a solder joint by the two-terminal method.
  • a device for measuring electromigration of solder joints comprising: a power supply, a controller, and a voltage measurement structure, wherein the power supply is connected in parallel with the controller and the voltage measurement structure, respectively,
  • the voltage measurement structure includes an upper-layer substrate and a lower-layer substrate, the metal wires on the upper-layer substrate and the lower-layer substrate are connected in series through a plurality of solder joints to form a daisy chain, and voltages are drawn out at both ends of the plurality of solder joints measurement nodes, the voltage measurement nodes are respectively disposed on the outer sides of the upper substrate and the lower substrate,
  • the voltage measurement structure is used to measure the voltage of the daisy chain between one or more solder joints through the voltage measurement node under the control of the controller;
  • the controller is configured to determine the resistance of the one or more solder joints according to the voltage.
  • a method for measuring electromigration of solder joints including:
  • the resistance of the one or more solder joints is determined based on the voltage.
  • a device for measuring electromigration of solder joints including:
  • a first determination module configured to determine the voltage of the daisy chain between the one or more solder joints according to the voltage measurement nodes drawn from both ends of one or more solder joints;
  • the second determination module is configured to determine the resistance of the one or more solder joints according to the voltage.
  • an electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute any one of the above Steps in Method Examples.
  • the voltage of the daisy chain between the one or more solder joints is determined according to the voltage measurement nodes drawn from both ends of the one or more solder joints; the voltage of the one or more solder joints is determined according to the voltage.
  • the resistance can solve the problem that the resistance of a single solder joint cannot be measured by detecting the resistance of a solder joint by the two-terminal method in the related art.
  • FIG. 1 is a schematic diagram of a daisy chain in the related art
  • FIG. 2 is a schematic diagram of a measurement structure of solder joint electromigration according to the present embodiment
  • FIG. 3 is a schematic diagram of a daisy chain for monitoring electromigration accelerated life tests of solder joints according to the present embodiment
  • FIG. 4 is a schematic diagram of a solder joint current mode according to the present embodiment.
  • FIG. 5 is a flowchart of a data transmission method according to an embodiment of the present application.
  • FIG. 6 is a schematic diagram of selecting the shortest sub-chain according to the present embodiment.
  • FIG. 7 is a block diagram of an apparatus for measuring electromigration of solder joints according to the present embodiment.
  • FIG. 2 is a schematic diagram of the device for measuring electromigration of solder joints according to this embodiment. As shown in FIG. 2 , it includes: a power supply, a controller, and a voltage measurement structure , wherein the power supply is connected in parallel with the controller and the voltage measurement structure, respectively, the voltage measurement structure includes an upper-layer substrate and a lower-layer substrate, and the metal connections on the upper-layer substrate and the lower-layer substrate are connected by a plurality of welding The points are connected in series to form a daisy chain, and voltage measurement nodes are drawn at both ends of the plurality of solder joints, and the voltage measurement nodes are respectively arranged on the outer sides of the upper substrate and the lower substrate, wherein,
  • the voltage measurement structure is used to measure the voltage of the daisy chain between one or more solder joints through the voltage measurement node under the control of the controller;
  • the controller is configured to determine the resistance of the one or more solder joints according to the voltage.
  • the controller is further configured to select the first daisy sub-chain and the second daisy sub-chain that satisfy the minimum test accuracy, wherein the two ends of the first daisy sub-chain and the second daisy sub-chain are The solder joints are both the first solder joint and the second solder joint, and the first daisy chain has one more target solder joint in the second daisy chain, and the target solder joint is the first solder joint, and the The number of solder joints included in the first daisy sub-chain is greater than or equal to the number of solder joints on the predetermined shortest daisy sub-chain;
  • the first voltage and the second voltage of the first solder joint are measured according to the voltage measurement node corresponding to the first solder joint, and the first voltage of the second solder joint is measured according to the voltage measurement node corresponding to the second solder joint a voltage and a second voltage;
  • the resistance of the target solder joint is determined according to the first voltage and the second voltage of the first solder joint, and the first voltage and the second voltage of the second solder joint.
  • the controller is further configured to obtain the current input to the daisy chain
  • the difference between the resistance of the first daisy sub-chain and the resistance of the second daisy sub-chain is determined as the resistance of the target solder joint.
  • the controller is further configured to compare the first difference between the second voltage of the second solder joint and the first voltage of the first solder joint to the first difference The ratio of the current is determined as the resistance of the first daisy chain;
  • the controller is further configured to obtain the lower limit value of the resistance measurement, and obtain the initial value of the resistance of the solder joint, wherein the initial value of the resistance is the measured resistance value or the theoretical resistance value of the solder joint ;
  • the number of solder joints on the shortest daisy chain that satisfies the lower limit value of resistance measurement is determined according to the lower limit value of resistance measurement and the initial value of resistance.
  • the controller is further configured to determine the minimum number of solder joints of the daisy chain according to the number of solder joints on the shortest daisy chain.
  • the voltage measurement nodes are drawn out through through holes at both ends of the plurality of solder joints.
  • the size and length of the metal connection lines between the plurality of solder joints are the same.
  • FIG. 3 is a schematic diagram of a daisy chain for monitoring the electromigration accelerated life test of solder joints according to this embodiment.
  • the cross-section of the daisy chain parent chain is as follows: As shown in Fig. 3(a), the three-dimensional structure of the mth solder joint in Fig. 3(a) is shown in Fig. 3(b), and the top-view structure of Fig. 3(b) is shown in Fig. 3(c), wherein , the current flows from the port I in to the port I out , Vm_(a) and Vm_(b) represent the voltage test nodes at the left and right ends of the solder joint, respectively, where,
  • Solder joints including C4 bump connecting Die and IC substrate and BGA ball connecting IC substrate and PCB.
  • the resistance value of a single solder joint is defined as R solder .
  • Interconnect lines including the upper metal wires of PCB, IC substrate and Die, including solder joint-to-pad interconnection, solder joint-to-Pad interconnection.
  • the resistance of the pad-to-pad interconnect is defined as R line .
  • Embedded Kevin test structure also known as four-terminal test structure, the basic structure is shown in Figure 3.
  • a voltage test node is drawn at both ends of each solder joint, and any two voltage test nodes on the parent chain and the end points of the parent chain together form an embedded Kevin structure, which can meet the requirements of the parent chain.
  • FIG. 4 is a schematic diagram of a solder joint current mode according to the present embodiment. As shown in FIG. 4 , two different solder joint current modes are distinguished according to the current (or electron flow) direction, wherein the current direction is determined by the upper-layer board (PCB or electron flow). IC Sub) flows to the lower board (IC Sub or Die) for the upstream (upstream) mode, and vice versa is defined as the downstream (downstream) mode. It is important to note that the direction of electron flow is opposite to the direction of current flow.
  • PCB upper-layer board
  • FIG. 5 is a flowchart of a data transmission method according to an embodiment of the present application. Figure, as shown in Figure 5, the process includes the following steps:
  • Step S502 determining the voltage of the daisy chain between the one or more solder joints according to the voltage measurement nodes drawn from both ends of the one or more solder joints;
  • Step S504 determining the resistance of the one or more solder joints according to the voltage.
  • the voltage of the daisy chain between the one or more solder joints is determined according to the voltage measurement nodes drawn from both ends of the one or more solder joints; the one or more solder joints are determined according to the voltage. It can solve the problem that the resistance of a single solder joint cannot be measured by detecting the resistance of a solder joint by the two-terminal method in the related art. It can strategy the resistance of a single solder joint, and can realize an effective reliability evaluation of the electromigration failure of the solder joint.
  • step S502 may specifically include:
  • S5021 select the first daisy sub-chain and the second daisy sub-chain that meet the minimum test accuracy, wherein the solder joints at both ends of the first daisy sub-chain and the second daisy sub-chain are the first solder joint and the second solder joint
  • the first daisy sub-chain has one more target solder joint than the second daisy sub-chain, the target solder joint is the first solder joint, and the number of solder joints included in the first daisy sub-chain is greater than or equal to A predetermined number of solder joints on the shortest daisy chain;
  • step S5023 may specifically include:
  • the resistance of the first daisy chain is determined according to the second voltage of the second solder joint and the first voltage of the first solder joint.
  • the first difference of the first voltage of the first solder joint, and the ratio of the first difference to the current is determined as the resistance of the first daisy chain;
  • the resistance of the second daisy chain is determined according to the second voltage of the second solder joint and the second voltage of the first solder joint. the second difference of the second voltage of the first solder joint, and the ratio of the second difference to the current is determined as the resistance of the second daisy chain;
  • the difference between the resistance of the first daisy sub-chain and the resistance of the second daisy sub-chain is determined as the resistance of the target solder joint.
  • the lower limit value of the resistance measurement is obtained, and the initial value of the resistance of the solder joint is obtained, wherein the resistance
  • the initial value is the measured resistance value or theoretical resistance value of the solder joint; the number of solder joints on the shortest daisy chain that meets the lower limit value of resistance measurement is determined according to the lower limit value of resistance measurement and the initial value of resistance .
  • the number of solder joints on the shortest daisy chain determines the minimum number of solder joints for that daisy chain.
  • the layout design of solder balls and inter-ball metal interconnection lines on all daisy chains is required to be uniform. If the lower limit of resistance measurement by the measurement system is R min , the minimum number N of solder balls required in series can be expressed as:
  • N 0 int[R min /(R line +R solder )]
  • N 2 ⁇ (N 0 +1);
  • N 0 is the minimum number of balls on the chain that meets the R min test requirements (regardless of the test single ball), which is a function of rounding up the values in the square brackets.
  • the resistance of a single solder joint needs to be extracted indirectly by selecting two specific sub-chains on the daisy chain.
  • the resistance of the mth solder ball on the daisy chain can be measured separately by [m_(a), m+N 0 +2_(a)] sub-chain and [m_(b), m+N 0 +2_(a)]
  • the difference between the sub-chain or the [mN 0 -2_(b),m_(b)] sub-chain and the [[mN 0 -2_(b),m_(a)]] sub-chain is obtained as follows:
  • N 0 is the number of solder joints on the smallest sub-chain
  • the subscripts m_(a) and m_(b) represent the voltage test nodes on the left and right sides of the mth solder joint, and so on. and are the smallest sub-chains satisfying R min , respectively.
  • R (m) [ Vm_ (b) -Vm_ (a)]/I.
  • the daisy-chain mother chain in this embodiment includes upper and lower substrates (including PCB, IC substrate, and Die), solder joints (including C4 bump and BGA ball), and interconnect lines between solder joints.
  • the number of solder joints included in the daisy chain is any natural number not less than N.
  • determining the resistance value of the solder joint may specifically include: determining the geometric dimensions of the solder joint (R solder ) and the interconnection line (R line ), and further obtaining the measured value or theoretically calculated value of the resistance. According to the resistance values of the above different components, calculate the length of the shortest daisy chain sub-chain (N 0 ) and the total number of solder joints in series on the daisy chain (N). Concatenate accordingly. A voltage test node is drawn across the N solder joints to record the voltage values of different daisy-chain circuit nodes.
  • FIG. 6 is a schematic diagram of selecting the shortest sub-chain according to the present embodiment. As shown in FIG. 6 , two specific shortest sub-chains satisfying the minimum test accuracy (R min ) are selected.
  • the resistance of a single solder joint can be tested, the parasitic resistance of the daisy chain and the external test system can be excluded, and the distinction of solder joints in different current modes can be realized.
  • the test cost is saved, and the test accuracy of solder joint resistance is improved.
  • FIG. 7 is a block diagram of the device for measuring electromigration of solder joints according to this embodiment, as shown in FIG. 7 , including:
  • the first determination module 72 is configured to determine the voltage of the daisy chain between the one or more solder joints according to the voltage measurement nodes drawn from both ends of the one or more solder joints;
  • the second determination module 74 is configured to determine the resistance of the one or more solder joints according to the voltage.
  • the first determining module 82 includes:
  • the selection sub-module is set to select the first daisy sub-chain and the second daisy sub-chain that meet the minimum test accuracy, wherein the solder joints at both ends of the first daisy sub-chain and the second daisy sub-chain are the first solder joints With the second solder joint, the first daisy sub-chain has one more target solder joint in the second daisy sub-chain, the target solder joint is the first solder joint, and the first daisy sub-chain includes solder joints.
  • the number of points is greater than or equal to the number of solder points on the predetermined shortest daisy chain;
  • a measurement sub-module configured to measure the first voltage and the second voltage of the first solder joint according to the voltage measurement node corresponding to the first solder joint, and to measure the voltage measurement node corresponding to the second solder joint the first voltage and the second voltage of the second solder joint;
  • the first determination sub-module is configured to determine the resistance of the target solder joint according to the first voltage and the second voltage of the first solder joint, and the first voltage and the second voltage of the second solder joint.
  • the second determining module 74 includes:
  • a second determination submodule configured to determine the resistance of the first daisy chain according to the second voltage of the second solder joint and the first voltage of the first solder joint;
  • a third determining submodule configured to determine the resistance of the second daisy chain according to the second voltage of the second solder joint and the second voltage of the first solder joint;
  • the fourth determination sub-module is configured to determine the difference between the resistance of the first daisy sub-chain and the resistance of the second daisy sub-chain as the resistance of the target solder joint.
  • the second determination sub-module is further configured as
  • the third determination sub-module is also set to
  • the device before selecting the first daisy sub-chain and the second daisy sub-chain meeting the minimum test accuracy, the device further includes:
  • an acquisition module configured to acquire the lower limit value of resistance measurement, and to acquire the initial value of the resistance of the solder joint, wherein the initial value of the resistance is the measured resistance value or the theoretical value of the resistance of the solder joint;
  • the third determination module is configured to determine the number of solder joints on the shortest daisy chain that meets the lower limit value of resistance measurement according to the lower limit value of resistance measurement and the initial value of resistance.
  • the apparatus further includes:
  • the fourth determination module is configured to determine the minimum number of solder joints of the daisy chain according to the number of solder joints on the shortest daisy chain.
  • Embodiments of the present application further provide a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, wherein the computer program is configured to execute the steps in any of the above method embodiments when running.
  • the above-mentioned computer-readable storage medium may include, but is not limited to, a USB flash drive, a read-only memory (Read-Only Memory, referred to as ROM for short), and a random access memory (Random Access Memory, referred to as RAM for short) , mobile hard disks, magnetic disks or CD-ROMs and other media that can store computer programs.
  • ROM Read-Only Memory
  • RAM Random Access Memory
  • Embodiments of the present application further provide an electronic device, including a memory and a processor, where a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
  • the above-mentioned electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the above-mentioned processor, and the input-output device is connected to the above-mentioned processor.
  • modules or steps of the present application can be implemented by a general-purpose computing device, and they can be centralized on a single computing device or distributed in a network composed of multiple computing devices
  • they can be implemented in program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, can be performed in a different order than shown here.
  • the described steps, or they are respectively made into individual integrated circuit modules, or a plurality of modules or steps in them are made into a single integrated circuit module to realize.
  • the present application is not limited to any particular combination of hardware and software.

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Abstract

一种焊点电迁移的测量方法及装置,测量方法包括:根据一个或多个焊点两端引出的电压测量节点确定该一个或多个焊点间的菊花子链的电压(S502);根据该电压确定该一个或多个焊点的电阻(S504)。可以解决通过两端法检测焊点电阻无法实现单个焊点电阻测量的问题,实现对焊点电迁移失效有效的可靠性评估。

Description

一种焊点电迁移的测量方法及装置 技术领域
本申请实施例涉及半导体金属电迁移测试技术领域,具体而言,涉及一种焊点电迁移的测量方法及装置。
背景技术
焊点电迁移寿命是评估封装及板级可靠性的重要指标之一,焊点电迁移加速寿命测试的有效测试结构存在多种选择,而串联焊点的菊花链是较常见的测试结构之一。
图1是相关技术中的菊花链的示意图,如图1所示,封装及板级焊点菊花链设计属于单纯将焊点串接的单链,存在以下几个方面的缺陷:
由于传统菊花链只有两个端点,为了满足测试系统电阻量测精度的要求(R min),需要设计一定长度的菊花链。由于传统菊花链采取两端法测量电阻,只能测量整条菊花链的总电阻,而非单个焊点电阻。
针对相关技术中通过两端法检测焊点电阻无法实现单个焊点电阻测量的问题,尚未提出解决方案。
发明内容
本申请实施例提供了一种焊点电迁移的测量方法及装置,以至少解决相关技术中通过两端法检测焊点电阻无法实现单个焊点电阻测量的问题。
根据本申请的一个实施例,提供了一种焊点电迁移的测量装置,包括:电源、控制器,电压测量结构、其中,所述电源分别与所述控制器、所述电压测量结构并联,所述电压测量结构包括上层基板、下层基板,所述上层基板与所述下层基板上的金属连线通过多个焊点串接形成菊花链,在所述多个焊点的两端均引出电压测量节点,所述电压测量节点分别设置于所述上层基板与所述下层基板的外侧,
所述电压测量结构,用于在所述控制器的控制下,通过所述电压测量节点测量一个或多个焊点间的菊花子链的电压;
所述控制器,用于根据所述电压确定所述一个或多个焊点的电阻。
根据本申请的另一个实施例,还提供了一种焊点电迁移的测量方法,包括:
根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压;
根据所述电压确定所述一个或多个焊点的电阻。
根据本申请的又一个实施例,还提供了一种焊点电迁移的测量装置,包括:
第一确定模块,设置为根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压;
第二确定模块,设置为根据所述电压确定所述一个或多个焊点的电阻。
根据本申请的又一个实施例,还提供了一种电子装置,包括存储器和处理器,所述存储 器中存储有计算机程序,所述处理器被设置为运行所述计算机程序以执行上述任一项方法实施例中的步骤。
本申请实施例,根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压;根据所述电压确定所述一个或多个焊点的电阻,可以解决相关技术中通过两端法检测焊点电阻无法实现单个焊点电阻测量的问题,可以策略单个焊点的电阻,可以实现对焊点电迁移失效展开有效的可靠性评估。
附图说明
图1是相关技术中的菊花链的示意图;
图2是根据本实施例的焊点电迁移的测量结构的示意图;
图3是根据本实施例的用于监控焊点电迁移加速寿命试验的菊花链的示意图;
图4是根据本实施例的焊点电流模式的示意图;
图5是根据本申请实施例的数据传输方法的流程图;
图6是根据本实施例的选择最短子链的示意图;
图7是根据本实施例的焊点电迁移的测量装置的框图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本申请的实施例。
需要说明的是,本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。
本申请实施例提供了一种焊点电迁移的测量装置,图2是根据本实施例的焊点电迁移的测量装置的示意图,如图2所示,包括:电源、控制器,电压测量结构、其中,所述电源分别与所述控制器、所述电压测量结构并联,所述电压测量结构包括上层基板、下层基板,所述上层基板与所述下层基板上的金属连线通过多个焊点串接形成菊花链,在所述多个焊点的两端均引出电压测量节点,所述电压测量节点分别设置于所述上层基板与所述下层基板的外侧,其中,
所述电压测量结构,用于在所述控制器的控制下,通过所述电压测量节点测量一个或多个焊点间的菊花子链的电压;
所述控制器,用于根据所述电压确定所述一个或多个焊点的电阻。
在一实施例中,所述控制器,还用于选择满足最小测试精度的第一菊花子链与第二菊花子链,其中,所述第一菊花子链与第二菊花子链的两端焊点均为第一焊点与第二焊点,所述第一菊花子链多所述第二菊花子链多一个目标焊点,所述目标焊点为所述第一焊点,所述第一菊花子链包括的焊点数大于或等于预先确定的最短菊花子链上的焊点数;
根据所述第一焊点对应的电压测量节点测量所述第一焊点的第一电压与第二电压,并根据所述第二焊点对应的电压测量节点测量所述第二焊点的第一电压与第二电压;
根据所述第一焊点的第一电压与第二电压、所述第二焊点的第一电压与第二电压确定所述目标焊点的电阻。
在一实施例中,所述控制器,还用于获取输入所述菊花链的电流;
根据所述第二焊点的第二电压与所述第一焊点的第一电压确定所述第一菊花子链的电阻;
根据所述第二焊点的第二电压与所述第一焊点的第二电压确定所述第二菊花子链的电阻;
将所述第一菊花子链的电阻与所述第二菊花子链的电阻的差值确定为所述目标焊点的电阻。
在一实施例中,所述控制器,还用于将所述第二焊点的第二电压与所述第一焊点的第一电压的第一差值,将所述第一差值与所述电流的比值确定为所述第一菊花子链的电阻;
将所述第二焊点的第二电压与所述第一焊点的第二电压的第二差值,将所述第二差值与所述电流的比值确定为所述第二菊花子链的电阻。
在一实施例中,所述控制器,还用于获取电阻测量下限值,并获取焊点的电阻初始值,其中,所述电阻初始值为所述焊点的电阻实测值或电阻理论值;
根据所述电阻测量下限值与所述电阻初始值确定满足所述电阻测量下限值的所述最短菊花子链上的焊点数。
在一实施例中,所述控制器,还用于根据所述最短菊花子链上的焊点数确定所述菊花链的最小焊点数。
在一实施例中,在所述多个焊点的两端均通过通孔引出所述电压测量节点。
在一实施例中,所述多个焊点之间的所述金属连线的大小和长度相同。
本实施例可以实现电流模式分辨、内嵌开尔文测试结构、寄生电阻免疫,图3是根据本实施例的用于监控焊点电迁移加速寿命试验的菊花链的示意图,菊花链母链的截面如图3(a)所示,为图3(a)中第m个焊点的三维结构如图3(b)所示,图3(b)的俯视结构如图3(c)所示,其中,电流由端口I in流向端口I out,Vm_(a)和Vm_(b)分别代表为焊点左右两端的电压测试节点,其中,
焊点,包括连接Die和IC substrate的C4 bump和连接IC substrate和PCB的BGA ball。单个焊点阻值定义为R solder
互连线,包括PCB、IC substrate和Die的上金属导线,包括焊点-焊点间互连,焊点-Pad间互连。焊点-焊点间互连的电阻定义为R line
内嵌Kevin测试结构:又称为四端法测试结构,基本结构如图3图所示。相比于传统菊花链,本实施例在每一个焊点两端引出电压测试节点,母链上的任意两个电压测试节点和母链端点共同组成内嵌的Kevin结构,可以实现母链上满足测量系统的可测量最小电阻量(R min)的任意子链的四端法测量。
图4是根据本实施例的焊点电流模式的示意图,如图4所示,根据电流(或电子流)方向区分的两种不同的焊点电流模式,其中,电流方向由上层版(PCB或IC Sub)流向下层板(IC Sub或Die)的为上行(upstream)模式,反之则定义为下行(downstream)模式。需要注意的是,电子流的方向与电流方向相反。
根据本申请的另一个实施例,还提供了一种焊点电迁移的测量方法,应用于上述任一项的测量装置中的控制器,图5是根据本申请实施例的数据传输方法的流程图,如图5所示,该流程包括如下步骤:
步骤S502,根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压;
步骤S504,根据所述电压确定所述一个或多个焊点的电阻。
通过上述步骤S502至S504,根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压;根据所述电压确定所述一个或多个焊点的电阻,可以解决相关技术中通过两端法检测焊点电阻无法实现单个焊点电阻测量的问题,可以策略单个焊点的电阻,可以实现对焊点电迁移失效展开有效的可靠性评估。
在一实施例中,上述步骤S502具体可以包括:
S5021,选择满足最小测试精度的第一菊花子链与第二菊花子链,其中,所述第一菊花子链与第二菊花子链的两端焊点均为第一焊点与第二焊点,所述第一菊花子链多所述第二菊花子链多一个目标焊点,所述目标焊点为所述第一焊点,所述第一菊花子链包括的焊点数大于或等于预先确定的最短菊花子链上的焊点数;
S5022,根据所述第一焊点对应的电压测量节点测量所述第一焊点的第一电压与第二电压,并根据所述第二焊点对应的电压测量节点测量所述第二焊点的第一电压与第二电压;
S5023,根据所述第一焊点的第一电压与第二电压、所述第二焊点的第一电压与第二电压确定所述目标焊点的电阻。
在一可选的实施例中,上述步骤S5023具体可以包括:
获取输入所述菊花链的电流;
根据所述第二焊点的第二电压与所述第一焊点的第一电压确定所述第一菊花子链的电阻,具体的,将所述第二焊点的第二电压与所述第一焊点的第一电压的第一差值,将所述第一差值与所述电流的比值确定为所述第一菊花子链的电阻;
根据所述第二焊点的第二电压与所述第一焊点的第二电压确定所述第二菊花子链的电阻,具体的,将所述第二焊点的第二电压与所述第一焊点的第二电压的第二差值,将所述第二差值与所述电流的比值确定为所述第二菊花子链的电阻;
将所述第一菊花子链的电阻与所述第二菊花子链的电阻的差值确定为所述目标焊点的电阻。
在一可选的实施例中,在选择满足最小测试精度的第一菊花子链与第二菊花子链之前,获取电阻测量下限值,并获取焊点的电阻初始值,其中,所述电阻初始值为所述焊点的电阻实测值或电阻理论值;根据所述电阻测量下限值与所述电阻初始值确定满足所述电阻测量下限值的所述最短菊花子链上的焊点数。
在另一可选的实施例中,在根据所述电阻测量下限值与所述电阻初始值确定满足所述电阻测量下限值的所述最短菊花子链上的焊点数之后,根据所述最短菊花子链上的焊点数确定所述菊花链的最小焊点数。
本实施例中,要求所有菊花链上的焊球和球间金属互连线的版图设计均一。若测量系统对电阻测量下限为R min,则所需要串联焊球的最小个数N可表示为:
N 0=int[R min/(R line+R solder)];
N=2×(N 0+1);
其中,N 0为满足R min测试要求的最小链上的球数(不考虑测试单球)为对中括号中的数值进行向上取整的函数。
如果N 0≠1,则需要通过选择菊花链上两条特定子链间接提取单一焊点的电阻。菊花链上第m个焊球的电阻可以通过分别量测[m_(a),m+N 0+2_(a)]子链和[m_(b),m+N 0+2_(a)] 子链或[m-N 0-2_(b),m_(b)]子链和[[m-N 0-2_(b),m_(a)]]子链的差值得到,分别如下所示:
Figure PCTCN2021133197-appb-000001
Figure PCTCN2021133197-appb-000002
其中,N 0为最小子链上的焊点数量,下标m_(a)和m_(b)分别代表第m个焊点左右两边的电压测试节点,以此类推。
Figure PCTCN2021133197-appb-000003
Figure PCTCN2021133197-appb-000004
分别为满足R min的最小子链。
如果N 0=1,则直接通过图3(c)中焊点两端电压差[Vm_(b)-Vm_(a)]与电流I获得,满足以下公式:
R (m)=[V m_(b)-V m_(a)]/I。
本实施例中的菊花链母链:包括上下基板(包括PCB、IC substrate、Die)、焊点(包括C4 bump和BGA ball)以及焊点间的互连线。菊花链包含的焊点数目为不小于N的任意自然数。
内嵌Kevin测试结构:在焊点两端引出电压测量节点,任意两个电压测试节点均和电流输入端口构成Kevin测试结构。
菊花链子链:满足测量系统最小电阻精度(R min)的链条,包含焊点数量不小于N 0的整数。
本实施例中,确定焊点的阻值具体可以包括:确定焊点(R solder)和互连线(R line)的几何尺寸,进一步获取电阻的实测值或理论计算值。根据上述不同成分的电阻值,计算最短菊花链子链的长度(N 0)和菊花链上串联焊点总数目(N);按照计算得到的焊点总数,设计菊花链母链,使得各个焊点依此串联。在N个焊点两端引出电压测试节点,用于记录不同菊花链电路节点的电压值。
图6是根据本实施例的选择最短子链的示意图,如图6所示,选择满足最小测试精度(R min)的两条特定最短子链。
测量子链两端电压节点的电压值;
如果N 0≠1,利用公式2a或2b提取单个、电流模式可分辨且寄生电阻免疫的焊点电阻;如果N 0=1,则上述公式得到焊点电阻。
确定焊点和互连线的几何尺寸,并获得对应电阻的实测值或理论值。计算最短菊花链子链的长度(N 0)和菊花链上串联焊点总数目(N)。
串联所有的焊点,实现菊花链母链和电流通路,每个焊点两端均引出电压测试节点;
选择满足最小测试精度(R min)的两条特定最短子链;测量子链两端电压节点的电压值,提取焊点电阻。
本实施例中可以测试单个焊点的电阻,可以排除菊花链和外部测试系统的寄生电阻,可实现对不同电流模式焊点的区分。节省了测试成本,提高了焊点电阻测试精度。
根据本申请的又一个实施例,还提供了一种焊点电迁移的测量装置,图7是根据本实施例的焊点电迁移的测量装置的框图,如图7所示,包括:
第一确定模块72,设置为根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压;
第二确定模块74,设置为根据所述电压确定所述一个或多个焊点的电阻。
在一实施例中,所述第一确定模块82包括:
选择子模块,设置为选择满足最小测试精度的第一菊花子链与第二菊花子链,其中,所述第一菊花子链与第二菊花子链的两端焊点均为第一焊点与第二焊点,所述第一菊花子链多所述第二菊花子链多一个目标焊点,所述目标焊点为所述第一焊点,所述第一菊花子链包括的焊点数大于或等于预先确定的最短菊花子链上的焊点数;
测量子模块,设置为根据所述第一焊点对应的电压测量节点测量所述第一焊点的第一电压与第二电压,并根据所述第二焊点对应的电压测量节点测量所述第二焊点的第一电压与第二电压;
第一确定子模块,设置为根据所述第一焊点的第一电压与第二电压、所述第二焊点的第一电压与第二电压确定所述目标焊点的电阻。
在一实施例中,所述第二确定模块74包括:
获取子模块,设置为获取输入所述菊花链的电流;
第二确定子模块,设置为根据所述第二焊点的第二电压与所述第一焊点的第一电压确定所述第一菊花子链的电阻;
第三确定子模块,设置为根据所述第二焊点的第二电压与所述第一焊点的第二电压确定所述第二菊花子链的电阻;
第四确定子模块,设置为将所述第一菊花子链的电阻与所述第二菊花子链的电阻的差值确定为所述目标焊点的电阻。
在一实施例中,所述第二确定子模块,还设置为
将所述第二焊点的第二电压与所述第一焊点的第一电压的第一差值,将所述第一差值与所述电流的比值确定为所述第一菊花子链的电阻。
所述第三确定子模块,还设置为
将所述第二焊点的第二电压与所述第一焊点的第二电压的第二差值,将所述第二差值与所述电流的比值确定为所述第二菊花子链的电阻;
在一实施例中,在选择满足最小测试精度的第一菊花子链与第二菊花子链之前,所述装置还包括:
获取模块,设置为获取电阻测量下限值,并获取焊点的电阻初始值,其中,所述电阻初始值为所述焊点的电阻实测值或电阻理论值;
第三确定模块,设置为根据所述电阻测量下限值与所述电阻初始值确定满足所述电阻测量下限值的所述最短菊花子链上的焊点数。
在一实施例中,所述装置还包括:
第四确定模块,设置为根据所述最短菊花子链上的焊点数确定所述菊花链的最小焊点数。
本申请的实施例还提供了一种计算机可读存储介质,该计算机可读存储介质中存储有计算机程序,其中,该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
在一个示例性实施例中,上述计算机可读存储介质可以包括但不限于:U盘、只读存储器(Read-Only Memory,简称为ROM)、随机存取存储器(Random Access Memory,简称为RAM)、移动硬盘、磁碟或者光盘等各种可以存储计算机程序的介质。
本申请的实施例还提供了一种电子装置,包括存储器和处理器,该存储器中存储有计算 机程序,该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
在一个示例性实施例中,上述电子装置还可以包括传输设备以及输入输出设备,其中,该传输设备和上述处理器连接,该输入输出设备和上述处理器连接。
本实施例中的具体示例可以参考上述实施例及示例性实施方式中所描述的示例,本实施例在此不再赘述。
显然,本领域的技术人员应该明白,上述的本申请的各模块或各步骤可以用通用的计算装置来实现,它们可以集中在单个的计算装置上,或者分布在多个计算装置所组成的网络上,它们可以用计算装置可执行的程序代码来实现,从而,可以将它们存储在存储装置中由计算装置来执行,并且在某些情况下,可以以不同于此处的顺序执行所示出或描述的步骤,或者将它们分别制作成各个集成电路模块,或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样,本申请不限制于任何特定的硬件和软件结合。
以上所述仅为本申请的优选实施例而已,并不用于限制本申请,对于本领域的技术人员来说,本申请可以有各种更改和变化。凡在本申请的原则之内,所作的任何修改、等同替换、改进等,均应包含在本申请的保护范围之内。

Claims (17)

  1. 一种焊点电迁移的测量装置,包括:电源、控制器,电压测量结构、其中,所述电源分别与所述控制器、所述电压测量结构并联,所述电压测量结构包括上层基板、下层基板,所述上层基板与所述下层基板上的金属连线通过多个焊点串接形成菊花链,在所述多个焊点的两端均引出电压测量节点,所述电压测量节点分别设置于所述上层基板与所述下层基板的外侧,
    所述电压测量结构,用于在所述控制器的控制下,通过所述电压测量节点测量一个或多个焊点间的菊花子链的电压;
    所述控制器,用于根据所述电压确定所述一个或多个焊点的电阻。
  2. 根据权利要求1所述的装置,其中,
    所述控制器,还用于选择满足最小测试精度的第一菊花子链与第二菊花子链,其中,所述第一菊花子链与第二菊花子链的两端焊点均为第一焊点与第二焊点,所述第一菊花子链多所述第二菊花子链多一个目标焊点,所述目标焊点为所述第一焊点,所述第一菊花子链包括的焊点数大于或等于预先确定的最短菊花子链上的焊点数;
    根据所述第一焊点对应的电压测量节点测量所述第一焊点的第一电压与第二电压,并根据所述第二焊点对应的电压测量节点测量所述第二焊点的第一电压与第二电压;
    根据所述第一焊点的第一电压与第二电压、所述第二焊点的第一电压与第二电压确定所述目标焊点的电阻。
  3. 根据权利要求2所述的装置,其中,
    所述控制器,还用于获取输入所述菊花链的电流;
    根据所述第二焊点的第二电压与所述第一焊点的第一电压确定所述第一菊花子链的电阻;
    根据所述第二焊点的第二电压与所述第一焊点的第二电压确定所述第二菊花子链的电阻;
    将所述第一菊花子链的电阻与所述第二菊花子链的电阻的差值确定为所述目标焊点的电阻。
  4. 根据权利要求3所述的装置,其中,
    所述控制器,还用于将所述第二焊点的第二电压与所述第一焊点的第一电压的第一差值,将所述第一差值与所述电流的比值确定为所述第一菊花子链的电阻;
    将所述第二焊点的第二电压与所述第一焊点的第二电压的第二差值,将所述第二差值与所述电流的比值确定为所述第二菊花子链的电阻。
  5. 根据权利要求2所述的装置,其中,
    所述控制器,还用于获取电阻测量下限值,并获取焊点的电阻初始值,其中,所述电阻初始值为所述焊点的电阻实测值或电阻理论值;
    根据所述电阻测量下限值与所述电阻初始值确定满足所述电阻测量下限值的所述最短菊花子链上的焊点数。
  6. 根据权利要求5所述的装置,其中,
    所述控制器,还用于根据所述最短菊花子链上的焊点数确定所述菊花链的最小焊点数。
  7. 根据权利要求1至6中任一项所述的测量装置,其中,
    在所述多个焊点的两端均通过通孔引出所述电压测量节点。
  8. 根据权利要求1至6中任一项所述的测量装置,其中,
    所述多个焊点之间的所述金属连线的大小和长度相同。
  9. 一种焊点电迁移的测量方法,包括:
    根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压;
    根据所述电压确定所述一个或多个焊点的电阻。
  10. 根据权利要求9所述的方法,其中,根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压包括:
    选择满足最小测试精度的第一菊花子链与第二菊花子链,其中,所述第一菊花子链与第二菊花子链的两端焊点均为第一焊点与第二焊点,所述第一菊花子链多所述第二菊花子链多一个目标焊点,所述目标焊点为所述第一焊点,所述第一菊花子链包括的焊点数大于或等于预先确定的最短菊花子链上的焊点数;
    根据所述第一焊点对应的电压测量节点测量所述第一焊点的第一电压与第二电压,并根据所述第二焊点对应的电压测量节点测量所述第二焊点的第一电压与第二电压;
    根据所述第一焊点的第一电压与第二电压、所述第二焊点的第一电压与第二电压确定所述目标焊点的电阻。
  11. 根据权利要求10所述的方法,其中,根据所述第一焊点的第一电压与第二电压、所述第二焊点的第一电压与第二电压确定所述目标焊点的电阻包括:
    获取输入所述菊花链的电流;
    根据所述第二焊点的第二电压与所述第一焊点的第一电压确定所述第一菊花子链的电阻;
    根据所述第二焊点的第二电压与所述第一焊点的第二电压确定所述第二菊花子链的电阻;
    将所述第一菊花子链的电阻与所述第二菊花子链的电阻的差值确定为所述目标焊点的电阻。
  12. 根据权利要求11所述的方法,其中,
    根据所述第二焊点的第二电压与所述第一焊点的第一电压确定所述第一菊花子链的电阻包括:
    将所述第二焊点的第二电压与所述第一焊点的第一电压的第一差值,将所述第一差值与所述电流的比值确定为所述第一菊花子链的电阻;
    根据所述第二焊点的第二电压与所述第一焊点的第二电压确定所述第二菊花子链的电阻包括:
    将所述第二焊点的第二电压与所述第一焊点的第二电压的第二差值,将所述第二差值与所述电流的比值确定为所述第二菊花子链的电阻。
  13. 根据权利要求10所述的方法,其中,在选择满足最小测试精度的第一菊花子链与第二菊花子链之前,所述方法还包括:
    获取电阻测量下限值,并获取焊点的电阻初始值,其中,所述电阻初始值为所述焊点的电阻实测值或电阻理论值;
    根据所述电阻测量下限值与所述电阻初始值确定满足所述电阻测量下限值的所述最短菊花子链上的焊点数。
  14. 根据权利要求13所述的方法,其中,在根据所述电阻测量下限值与所述电阻初始值 确定满足所述电阻测量下限值的所述最短菊花子链上的焊点数之后,所述方法还包括:
    根据所述最短菊花子链上的焊点数确定所述菊花链的最小焊点数。
  15. 一种焊点电迁移的测量装置,包括:
    第一确定模块,设置为根据一个或多个焊点两端引出的电压测量节点确定所述一个或多个焊点间的菊花子链的电压;
    第二确定模块,设置为根据所述电压确定所述一个或多个焊点的电阻。
  16. 一种计算机可读的存储介质,所述存储介质中存储有计算机程序,其中,所述计算机程序被设置为运行时执行所述权利要求9至14任一项中所述的方法。
  17. 一种电子装置,包括存储器和处理器,所述存储器中存储有计算机程序,所述处理器被设置为运行所述计算机程序以执行所述权利要求9至14任一项中所述的方法。
PCT/CN2021/133197 2020-12-04 2021-11-25 一种焊点电迁移的测量方法及装置 WO2022116891A1 (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117054857A (zh) * 2023-10-11 2023-11-14 江苏祥和电子科技有限公司 车规级封装电路焊点电迁移可靠性测试方法及系统

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040021232A1 (en) * 2002-08-05 2004-02-05 Senol Pekin Flip-chip ball grid array package for electromigration testing
US20040100293A1 (en) * 2002-11-27 2004-05-27 Mathias Bottcher Test structure for determining the stability of electronic devices comprising connected substrates
US20060194353A1 (en) * 2005-02-28 2006-08-31 Ridgetop Group, Inc. Method and circuit for the detection of solder-joint failures in a digital electronic package
CN102183548A (zh) * 2011-03-16 2011-09-14 复旦大学 一种基于菊花链回路设计的定位失效凸点的方法
CN102749518A (zh) * 2011-04-22 2012-10-24 财团法人交大思源基金会 凸块接点的电阻测量结构及包含其的封装基板
US20130248859A1 (en) * 2012-03-21 2013-09-26 Stats Chippac, Ltd. Semiconductor Device and Method of Simultaneous Testing of Multiple Interconnects for Electro-Migration
CN105445328A (zh) * 2015-12-11 2016-03-30 工业和信息化部电子第五研究所 综合应力下微互连焊点的疲劳寿命评价方法、装置和系统
CN111725152A (zh) * 2020-06-12 2020-09-29 北京时代民芯科技有限公司 一种基于倒装焊的塑封菊花链电路结构及测试方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040021232A1 (en) * 2002-08-05 2004-02-05 Senol Pekin Flip-chip ball grid array package for electromigration testing
US20040100293A1 (en) * 2002-11-27 2004-05-27 Mathias Bottcher Test structure for determining the stability of electronic devices comprising connected substrates
US20060194353A1 (en) * 2005-02-28 2006-08-31 Ridgetop Group, Inc. Method and circuit for the detection of solder-joint failures in a digital electronic package
CN102183548A (zh) * 2011-03-16 2011-09-14 复旦大学 一种基于菊花链回路设计的定位失效凸点的方法
CN102749518A (zh) * 2011-04-22 2012-10-24 财团法人交大思源基金会 凸块接点的电阻测量结构及包含其的封装基板
US20130248859A1 (en) * 2012-03-21 2013-09-26 Stats Chippac, Ltd. Semiconductor Device and Method of Simultaneous Testing of Multiple Interconnects for Electro-Migration
CN105445328A (zh) * 2015-12-11 2016-03-30 工业和信息化部电子第五研究所 综合应力下微互连焊点的疲劳寿命评价方法、装置和系统
CN111725152A (zh) * 2020-06-12 2020-09-29 北京时代民芯科技有限公司 一种基于倒装焊的塑封菊花链电路结构及测试方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117054857A (zh) * 2023-10-11 2023-11-14 江苏祥和电子科技有限公司 车规级封装电路焊点电迁移可靠性测试方法及系统
CN117054857B (zh) * 2023-10-11 2023-12-22 江苏祥和电子科技有限公司 车规级封装电路焊点电迁移可靠性测试方法及系统

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