WO2022116586A1 - 光学临近效应修正方法及系统和掩膜版 - Google Patents

光学临近效应修正方法及系统和掩膜版 Download PDF

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WO2022116586A1
WO2022116586A1 PCT/CN2021/111863 CN2021111863W WO2022116586A1 WO 2022116586 A1 WO2022116586 A1 WO 2022116586A1 CN 2021111863 W CN2021111863 W CN 2021111863W WO 2022116586 A1 WO2022116586 A1 WO 2022116586A1
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optical proximity
pattern
graphic
proximity effect
original design
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PCT/CN2021/111863
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English (en)
French (fr)
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孙鹏飞
王谨恒
陈洁
朱斌
张剑
曹楠
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无锡华润上华科技有限公司
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Publication of WO2022116586A1 publication Critical patent/WO2022116586A1/zh

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

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  • the present invention relates to the technical field of photolithography, and more particularly to a method and system for correcting optical proximity effect and a mask.
  • optical Proximity Correction Optical Proximity Correction
  • the present application proposes a new optical proximity effect correction method, system and mask.
  • An embodiment of the present invention provides an optical proximity effect correction method, and the optical proximity effect correction method includes:
  • the graphics of the previous layer of the current layer and classify the area of the current layer in the original design graphics of lithography according to the graphics of the previous layer, so as to obtain the category to which the areas in the original design graphics belong, wherein , the category to which the area belongs includes an overlapping area and a non-overlapping non-overlapping area in the current layer that overlaps with the previous layer in the original design graphic;
  • a plurality of target points are set at the edge of the original design graphic, and the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area;
  • the correction graph is adjusted to obtain an adjusted correction graph, the adjusted correction graph is simulated to obtain a graph simulation result, and the position of each target point is calculated. the difference between the graphical simulation result and the corrected graph;
  • Iterative step repeatedly performing the weighting according to the difference and the target point, adjusting the correction graph to obtain an adjusted correction graph, and simulating the adjusted correction graph to obtain a graph simulation result, The step of calculating the difference between the graphic simulation result and the corrected graphic at each of the target points is iterated until a final corrected graphic is obtained.
  • optical proximity effect correction system includes:
  • a processor configured to execute the program instructions stored in the memory, so that the processor executes the aforementioned optical proximity effect correction method.
  • a mask comprising:
  • a mask pattern disposed on the body is a correction pattern obtained based on the aforementioned optical proximity effect correction method.
  • 1 is a flow chart of a conventional optical proximity effect correction method
  • Fig. 2 is a kind of schematic diagram that the design image is 'U' shape figure
  • Fig. 3 shows the schematic diagram of the correction simulation result with rounded corner effect obtained based on the conventional optical proximity effect correction method
  • FIG. 4 shows a flowchart of a method for correcting optical proximity effect according to an embodiment of the present invention
  • FIG. 5 shows a schematic diagram of a GATE area obtained after introducing a previous layer on the basis of the current layer according to an embodiment of the present invention
  • Fig. 6 shows the comparison schematic diagram of the target point placement position of the conventional correction method and the correction method of the present application
  • FIG. 8 is a schematic block diagram of an optical proximity effect correction system according to an embodiment of the present invention.
  • CD critical dimensions
  • TO active area layer
  • GT gate oxide layer
  • An metal interconnection layer
  • the conventional OPC correction principle is: as shown in Figure 1, first analyze and divide the outside of the design graphic (Dissection), then place target points at the end of the line and adjacent segments, and then simulate the graphic according to the OPC model, and calculate the simulation results and The edge placement error (EPE) of the design graph at the target position point is adjusted, and then the segment position is adjusted according to the EPE to obtain the desired result.
  • EPE edge placement error
  • the 'U'-shaped graphics due to the small space and the limitation of MRC rules, such graphics are difficult to handle, which will cause a more serious 'Corner rounding' effect , which in turn affects the CDU of the line width, as shown in Figure 3.
  • an embodiment of the present application provides a method for correcting optical proximity effect.
  • the method includes: acquiring a pattern of a previous layer of the current layer, and, according to the pattern of the previous layer, correcting the original design pattern of lithography Classify the area of the current layer in the original design graphic to obtain the category to which the area in the original design graphic belongs, wherein the category to which the area belongs includes the overlapping area in the current layer in the original design graphic that overlaps with the previous layer and Non-overlapping non-overlapping areas; setting priorities for each category of areas, wherein the overlapping areas have a higher priority than the non-overlapping areas; setting multiple target points on the edge of the original design graphic , the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area; obtain the modified graphics of the original design graphics according to the OPC model, and simulate the modified graphics to obtain Graphical simulation result; calculation step: calculating the difference between the graphic simulation result at each target point and the original design graphic
  • the region of the current layer in the original design pattern of lithography is classified according to the pattern of the previous layer, so as to obtain the category to which the region in the original design pattern belongs, wherein,
  • the category to which the area belongs includes the overlapping area and the non-overlapping non-overlapping area in the current layer that overlaps with the previous layer in the original design graphic; then the priority is set for the area of each category, and then OPC correction is performed, Therefore, it can improve the accuracy of OPC correction, improve the corner effect, increase the line width CDU, increase the process window, and improve the imaging accuracy of the lithography layout on the wafer, thereby reducing the pattern and mask pattern obtained on the actual silicon wafer. Deformation and deviation between to improve circuit performance and product yield.
  • the optical proximity effect correction method in the embodiment of the present application includes the following steps: first, in step S1, a graph of a previous layer of the current layer is acquired, and according to the graph of the previous layer , classify the area of the current layer in the original design graphic of lithography to obtain the category to which the area in the original design graphic belongs, wherein the category to which the area belongs includes the current layer and the previous layer in the original design graphic. Overlapping regions and non-overlapping regions that do not overlap one layer above and below.
  • the original design pattern is a layout pattern designed according to the requirements of the semiconductor manufacturing process, which is generally consistent with the pattern obtained by transferring the pattern on the mask to the semiconductor substrate. For example, it can be expected to be formed on the semiconductor substrate.
  • the pattern of the gate, or the pattern of a metal layer of the metal interconnection line, and due to the optical proximity effect, when the original design pattern is directly transferred to the semiconductor substrate, the pattern formed is different from the actual desired pattern. There are differences, therefore, the original design graphic needs to be corrected, and since the layout pattern is large, the original design graphic can also be a selection of part of the layout pattern.
  • the current layer may be the gate dielectric layer (GT layer), and the layer preceding the current layer may be the active region layer (TO layer).
  • the current layer may also be, for example, a metal interconnect layer (An), and the previous layer may be a gate dielectric layer (GT layer).
  • GT layer gate dielectric layer
  • the case where the current layer is the gate dielectric layer (GT layer) is mainly used as an example.
  • the previous layer is introduced, so as to obtain an overlapping area where the two overlap, such as a gate area (eg, the GATE area in FIG. 5 ).
  • a gate area eg, the GATE area in FIG. 5 .
  • the other regions do not overlap with the TO layer, that is, non-overlapping regions.
  • the original design graphics include one or more of U-shaped graphics, T-shaped graphics, H-shaped graphics, L-shaped graphics, and square ring graphics.
  • the original design graphics including U-shaped graphics are mainly used as examples.
  • step S2 priorities are set for the regions of each category, wherein the priorities of the overlapping regions are higher than the priorities of the non-overlapping regions.
  • priority is set for each category of regions, for example, due to overlapping regions such as gate regions, if there is pattern distortion or critical dimension difference during lithography, the negative impact on the product is higher than that of non-overlapping regions, so
  • the priority of the overlapping area may be set higher than the priority of the non-overlapping area, so that in the subsequent processing, the overlapping area is preferentially processed.
  • step S3 a plurality of target points are set on the edge of the original design graphic.
  • the edge includes line ends and adjacent edge segments.
  • the step of setting the target further includes: analysing and dividing the edge of the original design graphic to obtain a plurality of adjacent edge segments and line ends; the target point. This step is based on the settings of the OPC program.
  • the method for analyzing and dividing the boundary can be based on any suitable method known to those skilled in the art, which is not limited here.
  • the placement position of the target point also changes, for example, when the target point is placed, according to the priority setting, in the overlapping area
  • the density of target points set at the edge of the area is different from the density of target points set at the non-overlapping area.
  • the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area, as shown in FIG. 6 , where the left figure is a schematic diagram of the placement position of the target points in the existing OPC correction method , the figure on the right is a schematic diagram of the placement position of the target points in the OPC correction method of the application.
  • step S4 a modified graphic of the original design graphic is obtained according to the OPC model, and the modified graphic is simulated to obtain a graphic simulation result.
  • the lithography process parameters are determined according to the feature size of the current layer of the original design pattern, eg, the gate.
  • the photolithography process performed under different gate processes uses different process specifications. Therefore, it is necessary to determine the specific parameters of the photolithography process after the gate process specifications.
  • the specific parameters of the photolithography process include optical parameters of the exposure optical path, material parameters of the photoresist and chemical parameters of the etching process.
  • the optical parameters of the exposure optical path mainly refer to specific parameters such as the numerical aperture of the optical path, the zoom ratio, and the exposure light source.
  • the material parameters of the photoresist mainly refer to specific parameters such as resolution, exposure rate, and photosensitivity of the photoresist material.
  • the chemical parameters of the etching process mainly refer to specific parameters such as acidity, alkalinity and chemical properties of the etchant. Due to the different photolithography processes used to fabricate feature sizes of different grades, it is necessary to have a clear positioning of the photolithography process parameters.
  • An optical proximity correction model is determined according to the photolithography process parameters, and an operation program of the optical proximity correction is established.
  • OPC modeling can be performed.
  • the basic flow of modeling is as follows: First, a pre-designed test pattern is placed on the target wafer, and a set of real lithographic wafer data is collected. Then use the same test pattern to simulate with the OPC modeling tool. If the size of the pattern obtained by the simulation is in good agreement with the corresponding real wafer data, then it can be considered that in such a limited sample space (sampling space) , the model obtained from the simulation can well describe the entire exposure system and chemical effects, so it can be used to quantify the OPE effect under predicted conditions, which can be used for OPC.
  • the modeling process can also be simplified to the process of retrieving data. Just enter the corresponding data model to retrieve the data. to the desired OPC model. After the OPC model is built, an OPC processing program needs to be written to perform OPC processing on the applicable graphics. Finally, a modified graphic of the original design graphic is obtained according to the OPC model, and the modified graphic is simulated to obtain a graphic simulation result, such as a simulation contour (Simulation Contour).
  • a simulation contour Simulation Contour
  • step S4 the difference between the graphic simulation result and the original design graphic at each of the target points is calculated.
  • the discrepancy may be an edge placement error based on which the control brings the graphical simulation results (eg, the simulated contour) to specification.
  • the calculation method of the difference may adopt any suitable method known to those skilled in the art, which is not specifically limited herein.
  • step S5 according to the difference and the weight of the target point, the correction graph is adjusted to obtain an adjusted correction graph, and the adjusted correction graph is simulated to obtain a A graphical simulation result is obtained, and the difference between the graphical simulation result and the corrected figure at each of the target points is calculated.
  • Step S5 also includes: step S51 adjusting the correction graph according to the difference and the weight of the target point to obtain an adjusted correction graph; step S52 simulating the adjusted correction graph to obtain a graph simulation result; and step S53 calculates the difference between the graphic simulation result and the corrected graphic at each of the target points.
  • EPE difference
  • the correction requirements are allocated according to the weight.
  • the weight of the target point of the overlapping area is greater than the weight of the target point of the lower priority non-overlapping area.
  • the adjusted correction pattern is simulated to obtain a pattern simulation result, and the simulation process can refer to the simulation process of the original design pattern in the preceding paragraph, which simulates the adjusted correction pattern formed on the photoresist by photolithography. graphics.
  • step S6 the weighting according to the difference and the target point is repeatedly performed, and the correction graph is adjusted to obtain an adjusted correction graph.
  • the steps of performing a simulation to obtain a graphic simulation result, and calculating the difference between the graphic simulation result and the corrected graphic at each of the target points are iterated until a final corrected graphic is obtained.
  • the difference between the graphic simulation result and the corrected graphic at each of the target points is calculated, and the iteration is stopped according to whether the difference is within a preset threshold range. If it is within the preset threshold range, the relevant steps in step S5 are performed again, and if it is not within the preset threshold value range, the current graph simulation result is used as the final corrected graph.
  • the region of the current layer in the original design pattern of lithography is classified according to the pattern of the previous layer, so as to obtain the region to which the region in the original design pattern belongs.
  • the category to which the area belongs includes the overlapping area and the non-overlapping non-overlapping area in the current layer and the previous layer in the original design graphic; Then perform OPC correction. Therefore, it can improve the accuracy of OPC correction, improve the corner effect, increase the line width CDU, improve the process window, and improve the imaging accuracy of the lithography layout on the wafer, thereby reducing the pattern obtained on the actual silicon wafer. Deformation and deviation from reticle pattern to improve circuit performance and product yield.
  • the present application also provides a reticle, the reticle includes a body, and a reticle pattern disposed on the body, the reticle pattern is based on the optical proximity effect correction method described above
  • the obtained correction pattern therefore, the mask of the present application also has the advantages of the aforementioned optical proximity effect correction method.
  • FIG. 8 is a schematic block diagram of an optical proximity correction system according to an embodiment of the present invention, and the optical proximity correction system is used to perform the optical proximity correction described above. Proximity effect correction method.
  • the optical proximity correction system of the embodiment of the present application may be a single-chip microcomputer, and the single-chip microcomputer may include a central processing unit CPU with data processing capability, a random access memory RAM, a read-only memory ROM, various I/O ports, an interrupt system, a timer/counter Wait.
  • the optical proximity correction system may be an electronic device such as a notebook computer or a desktop computer.
  • the optical proximity correction system 800 of the present application includes one or more memories 801, one or more processors 802, etc., and these components are connected through a bus system and/or other forms of connection mechanisms (not shown). out) interconnection. It should be noted that the components and structures of the optical proximity correction system 800 shown in FIG. 8 are only exemplary and not limiting, and the optical proximity correction system 800 may also have other components and structures as required.
  • the memory 801 is used for storing various data information and executable program instructions generated during the related optical proximity correction process, for example, for storing various application programs or algorithms for realizing various specific functions.
  • One or more computer program products may be included, which may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory.
  • the volatile memory may include, for example, random access memory (RAM) and/or cache memory, or the like.
  • the non-volatile memory may include, for example, read only memory (ROM), hard disk, flash memory, and the like.
  • Processor 802 may be a central processing unit (CPU), graphics processing unit (GPU), application specific integrated circuit (ASIC), field programmable gate array (FPGA), or other form of processing with data processing capabilities and/or instruction execution capabilities unit, and may control other components in optical proximity correction system 800 to perform desired functions.
  • a processor can include one or more embedded processors, processor cores, microprocessors, logic circuits, hardware finite state machines (FSMs), digital signal processors (DSPs), graphics processing units (GPUs), or the like The combination.
  • the processor 802 is configured to execute the program instructions stored in the memory 801, so that the processor 802 executes the optical proximity effect correction method in the foregoing embodiment, and the description of the optical proximity effect correction method refers to the above, which is not described here. Repeat the description.
  • the optical proximity correction system 800 further includes a communication interface (not shown) for use between the various components in the optical proximity correction system 800 and between the various components of the optical proximity correction system 800 and other devices outside the system communicate between.
  • the communication interface is an interface that can be any currently known communication protocol, such as a wired interface or a wireless interface, wherein the communication interface can include one or more serial ports, USB interfaces, Ethernet ports, WiFi, wired networks, DVI interfaces, device Integrated interconnect modules or other suitable various ports, interfaces, or connections.
  • Optical proximity correction system 800 may also access wireless networks based on communication standards, such as WiFi, 2G, 8G, 4G, 5G, or a combination thereof.
  • the communication interface receives broadcast signals or broadcast related information from an external broadcast management system via a broadcast channel.
  • the communication interface further includes a Near Field Communication (NFC) module to facilitate short-range communication.
  • the NFC module may be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.
  • RFID radio frequency identification
  • IrDA infrared data association
  • UWB ultra-wideband
  • Bluetooth Bluetooth
  • the optical proximity correction system 800 also includes an input device (not shown) that may be a device used by a user to input instructions, and may include one or more of a keyboard, trackball, mouse, microphone, touch screen, and the like , or other input devices consisting of control buttons.
  • an input device may be a device used by a user to input instructions, and may include one or more of a keyboard, trackball, mouse, microphone, touch screen, and the like , or other input devices consisting of control buttons.
  • the optical proximity correction system 800 further includes an output device (not shown) that can output various information (eg, images or sounds) to the outside (eg, a user), and may include one of a display, a speaker, and the like or more.
  • the embodiments of the present application further provide a computer storage medium, such as a computer-readable storage medium, on which a computer program is stored.
  • a computer storage medium such as a computer-readable storage medium
  • One or more computer program instructions may be stored on the computer storage medium, and the processor may execute the program instructions stored in the memory to implement the functions (implemented by the processor) in the embodiments of the present application described herein and/or or other desired functions, for example, to execute the corresponding steps of the optical proximity effect correction method according to the embodiment of the present application
  • various application programs and various data may also be stored in the computer-readable storage medium, for example, the application program uses and/or various data generated, etc.
  • the computer-readable storage medium may include, for example, a memory card of a smartphone, a storage component of a tablet computer, a hard disk of a personal computer, a read only memory (ROM), an erasable programmable read only memory (EPROM), a portable compact disk read only memory (CD-ROM), USB memory, or any combination of the above storage media.
  • the computer-readable storage medium can be any combination of one or more computer-readable storage media.
  • optical proximity correction system and the computer storage medium of the embodiments of the present application can perform the corresponding steps of the aforementioned optical proximity effect correction method, they also have the advantages of the aforementioned optical proximity effect correction method.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or May be integrated into another device, or some features may be omitted, or not implemented.

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Abstract

一种光学临近效应修正方法及系统（800）和掩膜版，该方法包括：获取当前层的前一层的图形，并根据前一层的图形，对光刻的原始设计图形中当前层的区域进行分类以获得原始设计图形中的区域所属的类别（S1），区域所属的类别包括原始设计图形中当前层中与前一层上下重叠的重叠区域和不重叠的非重叠区域；对各个类别的区域设定优先级（S2），其中，重叠区域的优先级高于非重叠区域的优先级；在原始设计图形的边缘设置多个目标点（S3），重叠区域的边缘设置的目标点的密度大于非重叠区域设置的目标点的密度；根据OPC模型获得原始设计图形的修正图形，并对修正图形进行模拟，以获得图形模拟结果（S4）；计算各个目标点处图形模拟结果和原始设计图形之间的差异（S5）；根据差异以及目标点的权重，对修正图形进行调整，以获得调整后的修正图形，对调整后的修正图形进行模拟，以获得图形模拟结果，计算各个目标点处图形模拟结果和修正图形之间的差异的步骤进行迭代，直到获得最终的修正图形（S6）。

Description

光学临近效应修正方法及系统和掩膜版 技术领域
本发明涉及光刻技术领域，更具体地涉及光学临近效应修正方法及系统和掩膜版。
背景技术
随着超大规模集成电路(Ultra Large Scale Integration，简称ULSI)的飞速发展，集成电路制造工艺变得越来越复杂和精细。其中光刻技术是集成电路制造工艺发展的驱动力，也是最为复杂的技术之一。相对于其他单个制造技术来说，光刻技术的提高对集成电路的发展具有重要意义。在光刻工艺开始之前，首先需要将图案通过特定设备复制到掩膜版上，然后通过光刻机将掩膜版上的图案结构复制到生产芯片的硅片上。但是由于半导体器件尺寸的缩小，曝光所用的波长大于物理版图设计的理想图形的尺寸和图形之间的间距，光波的干涉和衍射效应使得实际光刻产生的物理图形和物理版图设计的理想图形之间存在很大的差异，实际图形的形状和间距发生很大的变化，甚至影响电路的性能。
产生这种差异的一个重要原因是光刻所用光束波长大于物理版图设计的理想图形的尺寸和图形之间的间距时，光学波长大于物理版图设计的理想图形的尺寸和图形之间的间距时产生光学临近效应(Optical Proximity Effect，OPE)的作用。因此，为了解决所述问题可以对所述掩膜版进行光学临近修正(Optical Proximity Correction，简称OPC)，所述OPC方法即为对光刻掩膜版进行光刻前预处理，进行预先修改，使得修改补偿的量正好能够补偿曝光系统造成的光学临近效应。
在0.11/0.13um技术节点，通常会存在“U”状图形，在传统的OPC修正过程中，由于线之间的间隔(space)太小，以及在掩膜规则(mask rule check，简称MRC)的限制下，这类图形比较难处理，会引起较严重的圆角效应(Corner rounding)，影响线宽均匀性(critcaldimension uniformity，简称CDU)，导致工艺窗口(process window，简称PW)降低，严重时甚至会导致电路失效。
鉴于上述问题的存在，本申请提出一种新的光学临近效应修正方法及系统和掩膜版。
发明内容
本发明实施例提供一种光学临近效应修正方法，光学临近效应修正方法包括：
获取当前层的前一层的图形，并根据所述前一层的图形，对光刻的原始设计图形中当 前层的区域进行分类，以获得所述原始设计图形中的区域所属的类别，其中，所述区域所属的类别包括所述原始设计图形中当前层中与前一层上下重叠的重叠区域和不重叠的非重叠区域；
对各个类别的区域设定优先级，其中，所述重叠区域的优先级高于所述非重叠区域的优先级；
在所述原始设计图形的边缘设置多个目标点，所述重叠区域的边缘设置的目标点的密度大于所述非重叠区域设置的目标点的密度；
根据OPC模型获得所述原始设计图形的修正图形，并对所述修正图形进行模拟，以获得图形模拟结果；
计算各个所述目标点处所述图形模拟结果和所述原始设计图形之间的差异；
根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形，对所述调整后的修正图形进行模拟，以获得图形模拟结果，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异；
迭代步骤：反复执行所述根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形，对所述调整后的修正图形进行模拟，以获得图形模拟结果，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异的步骤进行迭代，直到获得最终的修正图形。
本申请再一方面提供一种光学临近效应修正系统，所述光学临近效应修正系统包括：
存储器，用于存储可执行的程序指令；
处理器，用于执行所述存储器中存储的所述程序指令，使得所述处理器执行前述的光学临近效应修正方法。
本申请又一方面提供一种掩膜版，所述掩膜版包括：
本体；
设置于所述本体上的掩膜版图形，所述掩膜版图形为基于前述的光学临近效应修正方法所获得的修正图形。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其他特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
通过结合附图对本发明实施例进行更详细的描述，本发明的上述以及其它目的、特征和优势将变得更加明显。附图用来提供对本发明实施例的进一步理解，并且构成说明书的 一部分，与本发明实施例一起用于解释本发明，并不构成对本发明的限制。在附图中，相同的参考标号通常代表相同部件或步骤。
图1是根据常规的一种光学临近效应修正方法的流程图；
图2是一种设计图像为‘U’状图形的示意图；
图3示出了基于常规的光学临近效应修正方法获得的存在圆角效应的修正模拟结果的示意图；
图4示出了根据本发明一个实施例的一种光学临近效应修正方法的流程图；
图5示出了根据本发明一个实施例的在当前层次的基础上引入前层后获得的GATE区域的示意图；
图6示出了常规修正方法和本申请的修正方法的目标点放置位置的对比示意图；
图7示出了常规修正方法和本申请的修正方法获得的OPC修正模拟结果的对比示意图；
图8是根据本发明实施例的光学临近效应修正系统的示意性框图。
具体实施方式
为了使得本发明的目的、技术方案和优点更为明显，下面将参照附图详细描述根据本发明的示例实施例。显然，所描述的实施例仅仅是本发明的一部分实施例，而不是本发明的全部实施例，应理解，本发明不受这里描述的示例实施例的限制。基于本发明中描述的本发明实施例，本领域技术人员在没有付出创造性劳动的情况下所得到的所有其它实施例都应落入本发明的保护范围之内。
在0.18μm及以下技术节点的关键层次比如有源区层次(TO)，栅氧层次(GT)，An(金属连线层次)的关键尺寸(critcal dimension，简称CD)越来越小，CD已经接近甚至小于光刻工艺中所使用的光波波长，因此光刻过程中，由于光的衍射和干涉现象，实际硅片上得到的光刻图形与掩膜版图形之间存在一定的变形和偏差，为了消除这种偏差，一种有效的方法是光学邻近效应修正(OPC)方法。
常规的OPC修正原理是：如图1所示，先对设计图形外边进行解析分割(Dissection)，然后在线条端以及邻边片段放置目标点，然后根据OPC模型对图形进行模拟，计算模拟结果和设计图形在目标位置点的差异(edge placement error，简称EPE)，再根据EPE对片段(Segment)位置进行调整，以得到所需的结果。在‘U’状图形中(如图2所示)，由于间距(space)太小以及MRC规则的限制下，这类图形较难处理，会引起较为严重的‘圆角(Corner rounding)’效应，进而影响线宽的CDU，如图3所示。
鉴于上述问题的存在，本申请实施例提供一种光学临近效应修正方法，该方法包括：获取当前层的前一层的图形，并根据所述前一层的图形，对光刻的原始设计图形中当前层的区域进行分类，以获得所述原始设计图形中的区域所属的类别，其中，所述区域所属的类别包括所述原始设计图形中当前层中与前一层上下重叠的重叠区域和不重叠的非重叠区域；对各个类别的区域设定优先级，其中，所述重叠区域的优先级高于所述非重叠区域的优先级；在所述原始设计图形的边缘设置多个目标点，所述重叠区域的边缘设置的目标点的密度大于所述非重叠区域设置的目标点的密度；根据OPC模型获得所述原始设计图形的修正图形，并对所述修正图形进行模拟，以获得图形模拟结果；计算步骤：计算各个所述目标点处所述图形模拟结果和所述原始设计图形之间的差异；根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形，对所述调整后的修正图形进行模拟，以获得图形模拟结果，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异；反复执行所述根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形，对所述调整后的修正图形进行模拟，以获得图形模拟结果，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异的步骤进行迭代，直到获得最终的修正图形。
根据本申请的光学临近效应修正方法，根据所述前一层的图形，对光刻的原始设计图形中当前层的区域进行分类，以获得所述原始设计图形中的区域所属的类别，其中，所述区域所属的类别包括所述原始设计图形中当前层中与前一层上下重叠的重叠区域和不重叠的非重叠区域；再对各个类别的区域设定优先级，进行再进行OPC修正，因此，可以提高OPC修正精度，改善圆角效应，提高线宽CDU，提高工艺窗口，提高光刻版图在晶圆上成像的准确度，从而减小实际硅片上得到的图形与掩膜版图形之间的变形与偏差，以提高电路性能与产品良率。
下面，参考附图4至图7对本申请实施例中的光学临近效应修正方法进行描述。
作为示例，如图4所示，本申请实施例中的光学临近效应修正方法包括以下步骤：首先，在步骤S1中，获取当前层的前一层的图形，并根据所述前一层的图形，对光刻的原始设计图形中当前层的区域进行分类，以获得所述原始设计图形中的区域所属的类别，其中，所述区域所属的类别包括所述原始设计图形中当前层中与前一层上下重叠的重叠区域和不重叠的非重叠区域。
原始设计图形是根据半导体制造工艺要求设计出的版图图案，其与由掩膜版上的图案转印至半导体衬底上所获得的图案大体上一致，例如其可以是预期形成在半导体衬底上的栅极的图案、或者，金属互连线的一层金属层的图案，而由于光学邻近效应，直接将该原 始设计图形转印至半导体衬底上时，形成的图案与实际想要的图案存在差异，因此，需要对该原始设计图形进行修正，而由于版图图案很大，该原始设计图形还可以是对版图图案中的部分图案的截选。
在本申请实施例中，当前层可以为所述当前层为栅极介电层(GT层)，那么当前层的前一层则为有源区层(TO层)。在其他示例中，当前层还可以例如为金属连线层(An)，则其前一层则可以为栅极介电层(GT层)。本申请中主要以当前层为栅极介电层(GT层)的情形为例。
如图5所示，在当前层(GT层)下，引入前一层(TO层)，从而获得两者上下重叠的重叠区域，该重叠区域例如为栅极区(例如图5中的GATE区域)。而其他的区域则和TO层没有重叠，也即为非重叠区。
原始设计图形包括U状图形，T状图形、H状图形、L状图形，方环状图形中的一种或几种。本文中，主要以原始设计图形包括U状图形为例。
接着，继续参考图4，在步骤S2中，对各个类别的区域设定优先级，其中，所述重叠区域的优先级高于所述非重叠区域的优先级。
例如在OPC模型中对各个类别的区域设定优先级，例如，由于重叠区域例如栅极区，如果在光刻时出现图形变形或者关键尺寸差异对产品造成的负面影响高于非重叠区域，因此可以设定重叠区域的优先级高于所述非重叠区域的优先级，从而使得在后续处理时，优先处理重叠区域。
接着，继续参考图4，在步骤S3中，在所述原始设计图形的边缘设置多个目标点。
可选地，所述边缘包括线条端和邻边片段。在一个示例中，所述设置目标步骤，还包括：对所述原始设计图形的边缘进行解析分割，以获得多个邻边片段及线条端；在所述线条端和所述邻边片段设置所述目标点。该步骤是基于OPC程序的设定进行的。
对边界进行解析分割的方法可以基于本领域技术人员公知的任意适合的方法，在此不做限定。
由于设定了优先级，其中重叠区域的优先级大于非重叠区域的优先级，目标点的放置位置也发生了变化，例如，在目标点的放置时，根据优先级的设置，在所述重叠区域的边缘设置的目标点的密度和所述非重叠区域设置的目标点的密度不同。例如，所述重叠区域的边缘设置的目标点的密度大于所述非重叠区域设置的目标点的密度，如图6所示，其中，左图为现有OPC修正方法中目标点的放置位置示意图，右图为本申请的OPC修正方法中目标点点的放置位置示意图。
接着，继续参考图4，在步骤S4中，根据OPC模型获得所述原始设计图形的修正图 形，并对所述修正图形进行模拟，以获得图形模拟结果。
根据所述原始设计图形的当前层例如栅极的特征尺寸确定光刻工艺参数。不同栅极工艺下进行的光刻工艺，所使用到的工艺规格都不相同，因此先要根据栅极工艺规格之后，还需要确定光刻工艺的具体参数。所述光刻工艺具体参数包括曝光光路的光学参数、光刻胶的材料参数以及刻蚀工艺的化学参数。所述曝光光路的光学参数主要指光路的数值孔径、缩放倍率以及曝光光源等具体参数。所述光刻胶的材料参数主要是指光刻胶材料的分辨率、曝光速率、光敏度等具体参数。所述刻蚀工艺的化学参数主要是指刻蚀剂的酸碱性以及化学性质等具体参数。由于制作不同等级特征尺寸所采用到的光刻工艺不同，因此需要对光刻工艺参数有个明确的定位。
根据所述光刻工艺参数确定光学邻近修正模型，建立光学邻近修正的运算程序。在确定完光刻工艺参数后，可以进行OPC建模。建模的基本流程如下：首先是在标片上放置预先设计的测试图形，收集到一组真实光刻晶片的数据。然后使用同样的测试图形，利用OPC建模工具进行模拟，如果模拟得到的图形尺寸与相对应的真实晶片数据能够很好的符合，那么就可以认为在这样一个有限的样品空间(sampling space)中，模拟得到的模型能够很好的描述整个曝光系统和化学效应，因此就能用来定量在预知情况下的OPE效应，从而可以用来进行OPC。在工厂端，由于厂家在多数情况下会对自家生产的产品工艺建有相应的数据库，因此建模过程也可简化为调取数据的过程，只需输入相对应的数据模型，就能调取到所需的OPC模型。在建完OPC模型后，还需要编写OPC处理的程序，以用于将适用的图形进行OPC处理。最后，根据OPC模型获得所述原始设计图形的修正图形，并对所述修正图形进行模拟，以获得图形模拟结果，该图形模拟结果例如为模拟轮廓(Simulation Contour)。
接着，继续参考图4，在步骤S4中，计算各个所述目标点处所述图形模拟结果和所述原始设计图形之间的差异。
该差异可以为边缘放置误差，基于该边缘放置误差控制使图形模拟结果(例如模拟轮廓)符合规格要求。该差异的计算方法可以采用本领域技术人员熟知的任意适合的方法，在此不做具体限定。
接着，继续参考图4，在步骤S5中，根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形，对所述调整后的修正图形进行模拟，以获得图形模拟结果，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异。
步骤S5也即包括：步骤S51根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形；步骤S52对所述调整后的修正图形进行模拟，以获得图 形模拟结果；以及步骤S53计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异。
根据各目标点的差异(EPE)和相应目标点所属区域的权重，对OPC修正图形进行调整。OPC修正过程中，当不同区域的修正需求产生冲突时，按权重高低分配修正需求，相应目标点所属区域的所述权重越高，越优先满足该目标点的修正需求，例如对于优先级高的重叠区域的目标点的权重大于优先级较低的非重叠区域的目标点的权重。
对所述调整后的修正图形进行模拟，以获得图形模拟结果，该模拟过程可以参考前文中原始设计图形的模拟过程，其模拟的为调整后的修正图形通过光刻在光刻胶上形成的图形。
最后，继续参考图4，在步骤S6中，反复执行所述根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形，对所述调整后的修正图形进行模拟，以获得图形模拟结果，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异的步骤进行迭代，直到获得最终的修正图形。
每次迭代时，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异，根据该差异是否在预设阈值范围内，是否停止迭代。若在预设阈值范围内，则再次执行步骤S5中的相关步骤，若不在预设阈值范围内，则将本次图形模拟结果作为最终的修正图形。
综上所述，根据本申请的光学临近效应修正方法，根据所述前一层的图形，对光刻的原始设计图形中当前层的区域进行分类，以获得所述原始设计图形中的区域所属的类别，其中，所述区域所属的类别包括所述原始设计图形中当前层中与前一层上下重叠的重叠区域和不重叠的非重叠区域；再对各个类别的区域设定优先级，进行再进行OPC修正，因此，可以提高OPC修正精度，改善圆角效应，提高线宽CDU，提高工艺窗口，提高光刻版图在晶圆上成像的准确度，从而减小实际硅片上得到的图形与掩膜版图形之间的变形与偏差，以提高电路性能与产品良率。
另外，本申请还提供一种掩膜版，所述掩膜版包括本体，以及设置于所述本体上的掩膜版图形，所述掩膜版图形为基于前文所述的光学临近效应修正方法所获得的修正图形，因此，本申请的掩膜版也具有前述光学临近效应修正方法的优点。
下面，参考附图8对本发明实施例的光学临近修正系统进行描述，其中，图8是根据本发明实施例的光学临近修正系统的示意性框图，该光学临近修正系统用于执行前文描述的光学临近效应修正方法。
本申请实施例的光学临近修正系统可以是单片机，该单片机可以包括具有数据处理能 力的中央处理器CPU、随机存储器RAM、只读存储器ROM、多种I/O口和中断系统、定时器/计数器等。又例如该光学临近修正系统可以是笔记本电脑、台式电脑等电子装置。
作为示例，如图8所示，本申请的光学临近修正系统800包括一个或多个存储器801、一个或多个处理器802等，这些组件通过总线系统和/或其它形式的连接机构(未示出)互连。应当注意，图8所示的光学临近修正系统800的组件和结构只是示例性的，而非限制性的，根据需要，光学临近修正系统800也可以具有其他组件和结构。
存储器801用于存储相关光学临近修正过程中产生的各种数据信息和可执行程序指令，例如用于存储各种应用程序或实现各种具体功能的算法。可以包括一个或多个计算机程序产品，所述计算机程序产品可以包括各种形式的计算机可读存储介质，例如易失性存储器和/或非易失性存储器。所述易失性存储器例如可以包括随机存取存储器(RAM)和/或高速缓冲存储器(cache)等。所述非易失性存储器例如可以包括只读存储器(ROM)、硬盘、闪存等。
处理器802可以是中央处理单元(CPU)、图像处理单元(GPU)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或者具有数据处理能力和/或指令执行能力的其它形式的处理单元，并且可以控制光学临近修正系统800中的其它组件以执行期望的功能。例如，处理器能够包括一个或多个嵌入式处理器、处理器核心、微型处理器、逻辑电路、硬件有限状态机(FSM)、数字信号处理器(DSP)、图像处理单元(GPU)或它们的组合。
处理器802用于执行所述存储器801中存储的所述程序指令，使得所述处理器802执行前述实施例中的光学邻近效应修正方法，有关光学邻近效应修正方法的描述参考前文，在此不在重复描述。
在一个示例中，光学临近修正系统800还包括通信接口(未示出)，用于光学临近修正系统800中各个组件之间以及光学临近修正系统800的各个组件和该系统之外的其他装置之间进行通信。
通信接口是可以是目前已知的任意通信协议的接口，例如有线接口或无线接口，其中，通信接口可以包括一个或者多个串口、USB接口、以太网端口、WiFi、有线网络、DVI接口，设备集成互联模块或其他适合的各种端口、接口，或者连接。光学临近修正系统800还可以接入基于通信标准的无线网络，如WiFi、2G、8G、4G、5G或它们的组合。在一个示例性实施例中，通信接口经由广播信道接收来自外部广播管理系统的广播信号或广播相关信息。在一个示例性实施例中，所述通信接口还包括近场通信(NFC)模块，以促进短程通信。例如，在NFC模块可基于射频识别(RFID)技术，红外数据协会(IrDA)技术，超宽带(UWB)技术，蓝牙(BT)技术和其他技术来实现。
在一个示例中，所述光学临近修正系统800还包括输入装置(未示出)可以是用户用来输入指令的装置，并且可以包括键盘、轨迹球、鼠标、麦克风和触摸屏等中的一个或多个，或其它控制按钮构成的输入装置。
在一个示例中，所述光学临近修正系统800还包括输出装置(未示出)，可以向外部(例如用户)输出各种信息(例如图像或声音)，并且可以包括显示器、扬声器等中的一个或多个。
另外，本申请实施例还提供了一种计算机存储介质，例如计算机可读存储介质，其上存储有计算机程序。在所述计算机存储介质上可以存储一个或多个计算机程序指令，处理器可以运行存储器存储的所述程序指令，以实现本文所述的本申请实施例中(由处理器实现)的功能以及/或者其它期望的功能，例如以执行根据本申请实施例的光学邻近效应修正方法相应步骤，在所述计算机可读存储介质中还可以存储各种应用程序和各种数据，例如所述应用程序使用和/或产生的各种数据等。
例如，所述计算机可读存储介质例如可以包括智能电话的存储卡、平板电脑的存储部件、个人计算机的硬盘、只读存储器(ROM)、可擦除可编程只读存储器(EPROM)、便携式紧致盘只读存储器(CD-ROM)、USB存储器、或者上述存储介质的任意组合。所述计算机可读存储介质可以是一个或多个计算机可读存储介质的任意组合。
由于本申请实施例的光学临近修正系统和计算机存储介质可以执行前述的光学邻近效应修正方法相应步骤，因此，其也具有前述光学邻近效应修正方法的优点。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
在本申请所提供的几个实施例中，应该理解到，所揭露的设备和方法，可以通过其它的方式实现。例如，以上所描述的设备实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个设备，或一些特征可以忽略，或不执行。
在此处所提供的说明书中，说明了大量具体细节。然而，能够理解，本发明的实施例可以在没有这些具体细节的情况下实践。在一些实例中，并未详细示出公知的方法、结构和技术，以便不模糊对本说明书的理解。
类似地，应当理解，为了精简本发明并帮助理解各个发明方面中的一个或多个，在对 本发明的示例性实施例的描述中，本发明的各个特征有时被一起分组到单个实施例、图、或者对其的描述中。然而，并不应将该本发明的方法解释成反映如下意图：即所要求保护的本发明要求比在每个权利要求中所明确记载的特征更多的特征。更确切地说，如相应的权利要求书所反映的那样，其发明点在于可以用少于某个公开的单个实施例的所有特征的特征来解决相应的技术问题。因此，遵循具体实施方式的权利要求书由此明确地并入该具体实施方式，其中每个权利要求本身都作为本发明的单独实施例。
本领域的技术人员可以理解，除了特征之间相互排斥之外，可以采用任何组合对本说明书(包括伴随的权利要求、摘要和附图)中公开的所有特征以及如此公开的任何方法或者设备的所有过程或单元进行组合。除非另外明确陈述，本说明书(包括伴随的权利要求、摘要和附图)中公开的每个特征可以由提供相同、等同或相似目的的替代特征来代替。
此外，本领域的技术人员能够理解，尽管在此所述的一些实施例包括其它实施例中所包括的某些特征而不是其它特征，但是不同实施例的特征的组合意味着处于本发明的范围之内并且形成不同的实施例。例如，在权利要求书中，所要求保护的实施例的任意之一都可以以任意的组合方式来使用。
应该注意的是上述实施例对本发明进行说明而不是对本发明进行限制，并且本领域技术人员在不脱离所附权利要求的范围的情况下可设计出替换实施例。在权利要求中，不应将位于括号之间的任何参考符号构造成对权利要求的限制。单词“包含”不排除存在未列在权利要求中的元件或步骤。位于元件之前的单词“一”或“一个”不排除存在多个这样的元件。本发明可以借助于包括有若干不同元件的硬件以及借助于适当编程的计算机来实现。在列举了若干装置的单元权利要求中，这些装置中的若干个可以是通过同一个硬件项来具体体现。单词第一、第二、以及第三等的使用不表示任何顺序。可将这些单词解释为名称。
以上所述，仅为本发明的具体实施方式或对具体实施方式的说明，本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。本发明的保护范围应以权利要求的保护范围为准。

Claims (15)

  1. 一种光学临近效应修正方法，包括：
    获取当前层的前一层的图形，并根据所述前一层的图形，对光刻的原始设计图形中当前层的区域进行分类，以获得所述原始设计图形中的区域所属的类别，其中，所述区域所属的类别包括所述原始设计图形中当前层中与前一层上下重叠的重叠区域和不重叠的非重叠区域；
    对各个类别的区域设定优先级，其中，所述重叠区域的优先级高于所述非重叠区域的优先级；
    在所述原始设计图形的边缘设置多个目标点，其中，所述重叠区域的边缘设置的目标点的密度大于所述非重叠区域设置的目标点的密度；
    根据OPC模型获得所述原始设计图形的修正图形，并对所述修正图形进行模拟，以获得图形模拟结果；
    计算各个所述目标点处所述图形模拟结果和所述原始设计图形之间的差异；
    根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形；
    对所述调整后的修正图形进行模拟，以获得图形模拟结果，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异；以及
    反复执行所述根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形，对所述调整后的修正图形进行模拟，以获得图形模拟结果，计算各个所述目标点处所述图形模拟结果和所述修正图形之间的差异的步骤进行迭代，直到获得最终的修正图形。
  2. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述当前层为栅极介电层，所述前一层为有源区层。
  3. 如权利要求2所述的光学临近效应修正方法，其特征在于，所述重叠区域为栅极区。
  4. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述原始设计图形包括U状图形、T状图形、H状图形、L状图形、方环状图形中的一种或几种。
  5. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述差异为边缘放置误差。
  6. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述边缘包括线条端和邻边片段，所述设置目标步骤，还包括：
    对所述原始设计图形的边缘进行解析分割，以获得多个邻边片段及线条端；
    在所述线条端和所述邻边片段设置所述目标点。
  7. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述原始设计图形是对版图图案中的部分图案的截选。
  8. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述根据OPC模型获得所述原始设计图形的修正图形，并对所述修正图形进行模拟，以获得图形模拟结果，还包括：
    根据所述原始设计图形的当前层的特征尺寸确定光刻工艺参数，根据所述光刻工艺参数确定所述OPC模型。
  9. 如权利要求8所述的光学临近效应修正方法，其特征在于，所述根据所述光刻工艺参数确定所述OPC模型，还包括：
    在标片上放置预先设计的测试图形，收集到真实光刻晶片的数据；
    借助所述测试图形和所述真实光刻晶片的数据，利用OPC建模工具进行模拟，获得所述OPC模型。
  10. 如权利要求8所述的光学临近效应修正方法，其特征在于，所述根据所述光刻工艺参数确定所述OPC模型，还包括：
    从OPC模型库中调取所述OPC模型。
  11. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述图形模拟结果为模拟轮廓。
  12. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述根据所述差异以及目标点的权重，对所述修正图形进行调整，以获得调整后的修正图形，还包括：
    按所述权重的高低分配修正需求，优先修正权重高的所述目标点。
  13. 如权利要求1所述的光学临近效应修正方法，其特征在于，所述重叠区域的目标点的权重大于所述非重叠区域的目标点的权重。
  14. 一种光学临近效应修正系统，其特征在于，所述光学临近效应修正系统包括：
    存储器，用于存储可执行的程序指令；
    处理器，用于执行所述存储器中存储的所述程序指令，使得所述处理器执行如权利要求1所述的光学临近效应修正方法。
  15. 一种掩膜版，其特征在于，所述掩膜版包括：
    本体；
    设置于所述本体上的掩膜版图形，所述掩膜版图形为基于如权利要求1所述的光学临近效应修正方法所获得的修正图形。
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CN116050337A (zh) * 2022-12-30 2023-05-02 合肥本源量子计算科技有限责任公司 版图结构的设计方法和装置、存储介质和电子设备
CN116224707A (zh) * 2022-12-30 2023-06-06 全芯智造技术有限公司 光学临近效应修正方法及装置、存储介质、终端
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CN116224708B (zh) * 2023-05-05 2023-09-12 合肥晶合集成电路股份有限公司 一种掩模版图形的校正方法及装置
CN117111399A (zh) * 2023-10-25 2023-11-24 合肥晶合集成电路股份有限公司 光学邻近修正方法、系统、计算机设备及介质
CN117111399B (zh) * 2023-10-25 2024-02-20 合肥晶合集成电路股份有限公司 光学邻近修正方法、系统、计算机设备及介质
CN117170175A (zh) * 2023-11-03 2023-12-05 合肥晶合集成电路股份有限公司 光学临近效应修正建模方法及装置
CN117170175B (zh) * 2023-11-03 2024-01-30 合肥晶合集成电路股份有限公司 光学临近效应修正建模方法及装置
CN117219495A (zh) * 2023-11-07 2023-12-12 北京晨晶电子有限公司 一种解决光学临近效应的方法
CN117219495B (zh) * 2023-11-07 2024-02-23 北京晨晶电子有限公司 一种解决光学临近效应的方法

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