WO2022116586A1

WO2022116586A1 - Optical proximity effect correction method and system and mask

Info

Publication number: WO2022116586A1
Application number: PCT/CN2021/111863
Authority: WO
Inventors: 孙鹏飞; 王谨恒; 陈洁; 朱斌; 张剑; 曹楠
Original assignee: 无锡华润上华科技有限公司
Priority date: 2020-12-03
Filing date: 2021-08-10
Publication date: 2022-06-09
Also published as: CN114609857A

Abstract

Provided are an optical proximity effect correction method and system (800) and mask, said method comprising: obtaining a pattern of a layer preceding a current layer, and, according to pattern of the previous layer, classifying a region of the current layer in the original design pattern of the photolithography to obtain a category to which the region in the original design pattern belongs (S1), the category to which the region belongs comprising an overlapping region in the current layer of the original design patten which overlaps above and below the previous layer and a non-overlapping region which does not overlap; setting a priority for each category of region (S2), the priority of an overlapping region being higher than the priority of a non-overlapping region; arranging a plurality of target points at the edge of the original design pattern (S3), the density of the target points arranged at the edge of the overlapping region being greater than the density of the target points arranged in the non-overlapping region; according to an optical proximity correction (OPC) model, obtaining a corrected pattern of the original design pattern, and simulating the corrected pattern to obtain a pattern simulated result (S4); calculating the difference between the pattern simulated result and the original design pattern at each target point (S5); a step of according to the differences and the weights of the target points, adjusting the corrected pattern to obtain an adjusted corrected pattern, and simulating the adjusted corrected pattern to obtain a pattern simulated result, and calculating the pattern simulated result at each target point and correcting the differences between the patterns and iterating until a final corrected pattern is obtained (S6).

Description

Optical proximity effect correction method and system and mask

technical field

The present invention relates to the technical field of photolithography, and more particularly to a method and system for correcting optical proximity effect and a mask.

Background technique

With the rapid development of Ultra Large Scale Integration (ULSI), the manufacturing process of integrated circuits has become more and more complex and sophisticated. Among them, lithography technology is the driving force for the development of integrated circuit manufacturing process, and it is also one of the most complex technologies. Compared with other single manufacturing technologies, the improvement of lithography technology is of great significance to the development of integrated circuits. Before the photolithography process starts, the pattern needs to be copied to the mask by a specific device, and then the pattern structure on the mask is copied to the silicon wafer for producing the chip by a photolithography machine. However, due to the shrinking of the size of semiconductor devices, the wavelength used for exposure is larger than the size of the ideal pattern of the physical layout design and the spacing between the patterns. The interference and diffraction effects of light waves make the physical pattern produced by actual lithography and the ideal pattern of the physical layout design. There is a big difference between the actual graphics, the shape and spacing of the actual graphics change greatly, and even affect the performance of the circuit.

An important reason for this difference is that when the wavelength of the light beam used in lithography is larger than the size and spacing between the ideal patterns of the physical layout design, the optical wavelength is larger than the size of the ideal pattern and the spacing between the patterns in the physical layout design. The role of Optical Proximity Effect (OPE). Therefore, in order to solve the problem, optical proximity correction (Optical Proximity Correction, OPC for short) can be performed on the mask. The amount of modification compensation is made to compensate for the optical proximity effect caused by the exposure system.

In the 0.11/0.13um technology node, there is usually a "U" shape pattern. In the traditional OPC correction process, due to the too small space between lines and the mask rule check (MRC for short) Under the limitation of , this kind of graphics is more difficult to handle, which will cause more serious corner rounding (Corner rounding), affect the line width uniformity (critcaldimension uniformity, referred to as CDU), lead to process window (process window, referred to as PW) reduction, serious may even lead to circuit failure.

In view of the existence of the above problems, the present application proposes a new optical proximity effect correction method, system and mask.

SUMMARY OF THE INVENTION

An embodiment of the present invention provides an optical proximity effect correction method, and the optical proximity effect correction method includes:

Obtain the graphics of the previous layer of the current layer, and classify the area of the current layer in the original design graphics of lithography according to the graphics of the previous layer, so as to obtain the category to which the areas in the original design graphics belong, wherein , the category to which the area belongs includes an overlapping area and a non-overlapping non-overlapping area in the current layer that overlaps with the previous layer in the original design graphic;

Setting priorities for the regions of each category, wherein the priority of the overlapping regions is higher than the priority of the non-overlapping regions;

A plurality of target points are set at the edge of the original design graphic, and the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area;

Obtain a modified graphic of the original design graphic according to the OPC model, and simulate the modified graphic to obtain a graphic simulation result;

Calculate the difference between the graphic simulation result and the original design graphic at each of the target points;

According to the difference and the weight of the target point, the correction graph is adjusted to obtain an adjusted correction graph, the adjusted correction graph is simulated to obtain a graph simulation result, and the position of each target point is calculated. the difference between the graphical simulation result and the corrected graph;

Iterative step: repeatedly performing the weighting according to the difference and the target point, adjusting the correction graph to obtain an adjusted correction graph, and simulating the adjusted correction graph to obtain a graph simulation result, The step of calculating the difference between the graphic simulation result and the corrected graphic at each of the target points is iterated until a final corrected graphic is obtained.

Another aspect of the present application provides an optical proximity effect correction system, the optical proximity effect correction system includes:

memory for storing executable program instructions;

A processor, configured to execute the program instructions stored in the memory, so that the processor executes the aforementioned optical proximity effect correction method.

Yet another aspect of the present application provides a mask, the mask comprising:

ontology;

A mask pattern disposed on the body, the mask pattern is a correction pattern obtained based on the aforementioned optical proximity effect correction method.

The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below. Other features, objects and advantages of the present application will become apparent from the description, drawings and claims.

Description of drawings

The above and other objects, features and advantages of the present invention will become more apparent from the detailed description of the embodiments of the present invention in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of the present invention, and constitute a part of the specification, and together with the embodiments of the present invention, they are used to explain the present invention, and do not limit the present invention. In the drawings, the same reference numbers generally refer to the same components or steps.

1 is a flow chart of a conventional optical proximity effect correction method;

Fig. 2 is a kind of schematic diagram that the design image is 'U' shape figure;

Fig. 3 shows the schematic diagram of the correction simulation result with rounded corner effect obtained based on the conventional optical proximity effect correction method;

4 shows a flowchart of a method for correcting optical proximity effect according to an embodiment of the present invention;

5 shows a schematic diagram of a GATE area obtained after introducing a previous layer on the basis of the current layer according to an embodiment of the present invention;

Fig. 6 shows the comparison schematic diagram of the target point placement position of the conventional correction method and the correction method of the present application;

7 shows a schematic diagram of the comparison of the OPC correction simulation results obtained by the conventional correction method and the correction method of the present application;

8 is a schematic block diagram of an optical proximity effect correction system according to an embodiment of the present invention.

Detailed ways

In order to make the objects, technical solutions and advantages of the present invention more apparent, exemplary embodiments according to the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of the embodiments of the present invention, and it should be understood that the present invention is not limited by the example embodiments described herein. Based on the embodiments of the present invention described in the present invention, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present invention.

The critical dimensions (CD for short) of the key layers of technology nodes of 0.18μm and below, such as active area layer (TO), gate oxide layer (GT), and An (metal interconnection layer), are getting smaller and smaller. It is close to or even smaller than the wavelength of light waves used in the lithography process. Therefore, during the lithography process, due to the diffraction and interference of light, there are certain deformations and deviations between the lithography pattern obtained on the actual silicon wafer and the mask pattern. To eliminate this bias, an effective method is the Optical Proximity Correction (OPC) method.

The conventional OPC correction principle is: as shown in Figure 1, first analyze and divide the outside of the design graphic (Dissection), then place target points at the end of the line and adjacent segments, and then simulate the graphic according to the OPC model, and calculate the simulation results and The edge placement error (EPE) of the design graph at the target position point is adjusted, and then the segment position is adjusted according to the EPE to obtain the desired result. In the 'U'-shaped graphics (as shown in Figure 2), due to the small space and the limitation of MRC rules, such graphics are difficult to handle, which will cause a more serious 'Corner rounding' effect , which in turn affects the CDU of the line width, as shown in Figure 3.

In view of the existence of the above problems, an embodiment of the present application provides a method for correcting optical proximity effect. The method includes: acquiring a pattern of a previous layer of the current layer, and, according to the pattern of the previous layer, correcting the original design pattern of lithography Classify the area of the current layer in the original design graphic to obtain the category to which the area in the original design graphic belongs, wherein the category to which the area belongs includes the overlapping area in the current layer in the original design graphic that overlaps with the previous layer and Non-overlapping non-overlapping areas; setting priorities for each category of areas, wherein the overlapping areas have a higher priority than the non-overlapping areas; setting multiple target points on the edge of the original design graphic , the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area; obtain the modified graphics of the original design graphics according to the OPC model, and simulate the modified graphics to obtain Graphical simulation result; calculation step: calculating the difference between the graphic simulation result at each target point and the original design graphic; according to the difference and the weight of the target point, adjust the correction graphic to obtain The adjusted correction graph is simulated to obtain a graph simulation result, and the difference between the graph simulation result and the corrected graph at each of the target points is calculated; The difference and the weight of the target point, adjust the correction graph to obtain an adjusted correction graph, simulate the adjusted correction graph to obtain a graph simulation result, and calculate the location of each target point. The steps of the difference between the graphical simulation result and the corrected graph are iterated until the final corrected graph is obtained.

According to the optical proximity effect correction method of the present application, the region of the current layer in the original design pattern of lithography is classified according to the pattern of the previous layer, so as to obtain the category to which the region in the original design pattern belongs, wherein, The category to which the area belongs includes the overlapping area and the non-overlapping non-overlapping area in the current layer that overlaps with the previous layer in the original design graphic; then the priority is set for the area of each category, and then OPC correction is performed, Therefore, it can improve the accuracy of OPC correction, improve the corner effect, increase the line width CDU, increase the process window, and improve the imaging accuracy of the lithography layout on the wafer, thereby reducing the pattern and mask pattern obtained on the actual silicon wafer. Deformation and deviation between to improve circuit performance and product yield.

Next, the optical proximity effect correction method in the embodiment of the present application will be described with reference to FIG. 4 to FIG. 7 .

As an example, as shown in FIG. 4 , the optical proximity effect correction method in the embodiment of the present application includes the following steps: first, in step S1, a graph of a previous layer of the current layer is acquired, and according to the graph of the previous layer , classify the area of the current layer in the original design graphic of lithography to obtain the category to which the area in the original design graphic belongs, wherein the category to which the area belongs includes the current layer and the previous layer in the original design graphic. Overlapping regions and non-overlapping regions that do not overlap one layer above and below.

The original design pattern is a layout pattern designed according to the requirements of the semiconductor manufacturing process, which is generally consistent with the pattern obtained by transferring the pattern on the mask to the semiconductor substrate. For example, it can be expected to be formed on the semiconductor substrate. The pattern of the gate, or the pattern of a metal layer of the metal interconnection line, and due to the optical proximity effect, when the original design pattern is directly transferred to the semiconductor substrate, the pattern formed is different from the actual desired pattern. There are differences, therefore, the original design graphic needs to be corrected, and since the layout pattern is large, the original design graphic can also be a selection of part of the layout pattern.

In this embodiment of the present application, the current layer may be the gate dielectric layer (GT layer), and the layer preceding the current layer may be the active region layer (TO layer). In other examples, the current layer may also be, for example, a metal interconnect layer (An), and the previous layer may be a gate dielectric layer (GT layer). In this application, the case where the current layer is the gate dielectric layer (GT layer) is mainly used as an example.

As shown in FIG. 5 , under the current layer (GT layer), the previous layer (TO layer) is introduced, so as to obtain an overlapping area where the two overlap, such as a gate area (eg, the GATE area in FIG. 5 ). ). The other regions do not overlap with the TO layer, that is, non-overlapping regions.

The original design graphics include one or more of U-shaped graphics, T-shaped graphics, H-shaped graphics, L-shaped graphics, and square ring graphics. In this paper, the original design graphics including U-shaped graphics are mainly used as examples.

Next, with continued reference to FIG. 4 , in step S2 , priorities are set for the regions of each category, wherein the priorities of the overlapping regions are higher than the priorities of the non-overlapping regions.

For example, in the OPC model, priority is set for each category of regions, for example, due to overlapping regions such as gate regions, if there is pattern distortion or critical dimension difference during lithography, the negative impact on the product is higher than that of non-overlapping regions, so The priority of the overlapping area may be set higher than the priority of the non-overlapping area, so that in the subsequent processing, the overlapping area is preferentially processed.

Next, continuing to refer to FIG. 4 , in step S3 , a plurality of target points are set on the edge of the original design graphic.

Optionally, the edge includes line ends and adjacent edge segments. In one example, the step of setting the target further includes: analysing and dividing the edge of the original design graphic to obtain a plurality of adjacent edge segments and line ends; the target point. This step is based on the settings of the OPC program.

The method for analyzing and dividing the boundary can be based on any suitable method known to those skilled in the art, which is not limited here.

Since the priority is set, in which the priority of the overlapping area is greater than that of the non-overlapping area, the placement position of the target point also changes, for example, when the target point is placed, according to the priority setting, in the overlapping area The density of target points set at the edge of the area is different from the density of target points set at the non-overlapping area. For example, the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area, as shown in FIG. 6 , where the left figure is a schematic diagram of the placement position of the target points in the existing OPC correction method , the figure on the right is a schematic diagram of the placement position of the target points in the OPC correction method of the application.

Next, continuing to refer to Fig. 4, in step S4, a modified graphic of the original design graphic is obtained according to the OPC model, and the modified graphic is simulated to obtain a graphic simulation result.

The lithography process parameters are determined according to the feature size of the current layer of the original design pattern, eg, the gate. The photolithography process performed under different gate processes uses different process specifications. Therefore, it is necessary to determine the specific parameters of the photolithography process after the gate process specifications. The specific parameters of the photolithography process include optical parameters of the exposure optical path, material parameters of the photoresist and chemical parameters of the etching process. The optical parameters of the exposure optical path mainly refer to specific parameters such as the numerical aperture of the optical path, the zoom ratio, and the exposure light source. The material parameters of the photoresist mainly refer to specific parameters such as resolution, exposure rate, and photosensitivity of the photoresist material. The chemical parameters of the etching process mainly refer to specific parameters such as acidity, alkalinity and chemical properties of the etchant. Due to the different photolithography processes used to fabricate feature sizes of different grades, it is necessary to have a clear positioning of the photolithography process parameters.

An optical proximity correction model is determined according to the photolithography process parameters, and an operation program of the optical proximity correction is established. After the lithography process parameters are determined, OPC modeling can be performed. The basic flow of modeling is as follows: First, a pre-designed test pattern is placed on the target wafer, and a set of real lithographic wafer data is collected. Then use the same test pattern to simulate with the OPC modeling tool. If the size of the pattern obtained by the simulation is in good agreement with the corresponding real wafer data, then it can be considered that in such a limited sample space (sampling space) , the model obtained from the simulation can well describe the entire exposure system and chemical effects, so it can be used to quantify the OPE effect under predicted conditions, which can be used for OPC. On the factory side, since the manufacturer in most cases will build a corresponding database for the product process produced by itself, the modeling process can also be simplified to the process of retrieving data. Just enter the corresponding data model to retrieve the data. to the desired OPC model. After the OPC model is built, an OPC processing program needs to be written to perform OPC processing on the applicable graphics. Finally, a modified graphic of the original design graphic is obtained according to the OPC model, and the modified graphic is simulated to obtain a graphic simulation result, such as a simulation contour (Simulation Contour).

Next, with continued reference to FIG. 4 , in step S4, the difference between the graphic simulation result and the original design graphic at each of the target points is calculated.

The discrepancy may be an edge placement error based on which the control brings the graphical simulation results (eg, the simulated contour) to specification. The calculation method of the difference may adopt any suitable method known to those skilled in the art, which is not specifically limited herein.

Next, continue referring to FIG. 4, in step S5, according to the difference and the weight of the target point, the correction graph is adjusted to obtain an adjusted correction graph, and the adjusted correction graph is simulated to obtain a A graphical simulation result is obtained, and the difference between the graphical simulation result and the corrected figure at each of the target points is calculated.

Step S5 also includes: step S51 adjusting the correction graph according to the difference and the weight of the target point to obtain an adjusted correction graph; step S52 simulating the adjusted correction graph to obtain a graph simulation result; and step S53 calculates the difference between the graphic simulation result and the corrected graphic at each of the target points.

Adjust the OPC correction graph according to the difference (EPE) of each target point and the weight of the area to which the corresponding target point belongs. During the OPC correction process, when the correction requirements of different areas conflict, the correction requirements are allocated according to the weight. The weight of the target point of the overlapping area is greater than the weight of the target point of the lower priority non-overlapping area.

The adjusted correction pattern is simulated to obtain a pattern simulation result, and the simulation process can refer to the simulation process of the original design pattern in the preceding paragraph, which simulates the adjusted correction pattern formed on the photoresist by photolithography. graphics.

Finally, continuing to refer to FIG. 4 , in step S6, the weighting according to the difference and the target point is repeatedly performed, and the correction graph is adjusted to obtain an adjusted correction graph. The steps of performing a simulation to obtain a graphic simulation result, and calculating the difference between the graphic simulation result and the corrected graphic at each of the target points are iterated until a final corrected graphic is obtained.

At each iteration, the difference between the graphic simulation result and the corrected graphic at each of the target points is calculated, and the iteration is stopped according to whether the difference is within a preset threshold range. If it is within the preset threshold range, the relevant steps in step S5 are performed again, and if it is not within the preset threshold value range, the current graph simulation result is used as the final corrected graph.

To sum up, according to the optical proximity effect correction method of the present application, the region of the current layer in the original design pattern of lithography is classified according to the pattern of the previous layer, so as to obtain the region to which the region in the original design pattern belongs. , wherein the category to which the area belongs includes the overlapping area and the non-overlapping non-overlapping area in the current layer and the previous layer in the original design graphic; Then perform OPC correction. Therefore, it can improve the accuracy of OPC correction, improve the corner effect, increase the line width CDU, improve the process window, and improve the imaging accuracy of the lithography layout on the wafer, thereby reducing the pattern obtained on the actual silicon wafer. Deformation and deviation from reticle pattern to improve circuit performance and product yield.

In addition, the present application also provides a reticle, the reticle includes a body, and a reticle pattern disposed on the body, the reticle pattern is based on the optical proximity effect correction method described above The obtained correction pattern, therefore, the mask of the present application also has the advantages of the aforementioned optical proximity effect correction method.

Below, an optical proximity correction system according to an embodiment of the present invention will be described with reference to FIG. 8 , wherein FIG. 8 is a schematic block diagram of an optical proximity correction system according to an embodiment of the present invention, and the optical proximity correction system is used to perform the optical proximity correction described above. Proximity effect correction method.

The optical proximity correction system of the embodiment of the present application may be a single-chip microcomputer, and the single-chip microcomputer may include a central processing unit CPU with data processing capability, a random access memory RAM, a read-only memory ROM, various I/O ports, an interrupt system, a timer/counter Wait. For another example, the optical proximity correction system may be an electronic device such as a notebook computer or a desktop computer.

As an example, as shown in FIG. 8, the optical proximity correction system 800 of the present application includes one or more memories 801, one or more processors 802, etc., and these components are connected through a bus system and/or other forms of connection mechanisms (not shown). out) interconnection. It should be noted that the components and structures of the optical proximity correction system 800 shown in FIG. 8 are only exemplary and not limiting, and the optical proximity correction system 800 may also have other components and structures as required.

The memory 801 is used for storing various data information and executable program instructions generated during the related optical proximity correction process, for example, for storing various application programs or algorithms for realizing various specific functions. One or more computer program products may be included, which may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and/or cache memory, or the like. The non-volatile memory may include, for example, read only memory (ROM), hard disk, flash memory, and the like.

Processor 802 may be a central processing unit (CPU), graphics processing unit (GPU), application specific integrated circuit (ASIC), field programmable gate array (FPGA), or other form of processing with data processing capabilities and/or instruction execution capabilities unit, and may control other components in optical proximity correction system 800 to perform desired functions. For example, a processor can include one or more embedded processors, processor cores, microprocessors, logic circuits, hardware finite state machines (FSMs), digital signal processors (DSPs), graphics processing units (GPUs), or the like The combination.

The processor 802 is configured to execute the program instructions stored in the memory 801, so that the processor 802 executes the optical proximity effect correction method in the foregoing embodiment, and the description of the optical proximity effect correction method refers to the above, which is not described here. Repeat the description.

In one example, the optical proximity correction system 800 further includes a communication interface (not shown) for use between the various components in the optical proximity correction system 800 and between the various components of the optical proximity correction system 800 and other devices outside the system communicate between.

The communication interface is an interface that can be any currently known communication protocol, such as a wired interface or a wireless interface, wherein the communication interface can include one or more serial ports, USB interfaces, Ethernet ports, WiFi, wired networks, DVI interfaces, device Integrated interconnect modules or other suitable various ports, interfaces, or connections. Optical proximity correction system 800 may also access wireless networks based on communication standards, such as WiFi, 2G, 8G, 4G, 5G, or a combination thereof. In one exemplary embodiment, the communication interface receives broadcast signals or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication interface further includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

In one example, the optical proximity correction system 800 also includes an input device (not shown) that may be a device used by a user to input instructions, and may include one or more of a keyboard, trackball, mouse, microphone, touch screen, and the like , or other input devices consisting of control buttons.

In one example, the optical proximity correction system 800 further includes an output device (not shown) that can output various information (eg, images or sounds) to the outside (eg, a user), and may include one of a display, a speaker, and the like or more.

In addition, the embodiments of the present application further provide a computer storage medium, such as a computer-readable storage medium, on which a computer program is stored. One or more computer program instructions may be stored on the computer storage medium, and the processor may execute the program instructions stored in the memory to implement the functions (implemented by the processor) in the embodiments of the present application described herein and/or or other desired functions, for example, to execute the corresponding steps of the optical proximity effect correction method according to the embodiment of the present application, various application programs and various data may also be stored in the computer-readable storage medium, for example, the application program uses and/or various data generated, etc.

For example, the computer-readable storage medium may include, for example, a memory card of a smartphone, a storage component of a tablet computer, a hard disk of a personal computer, a read only memory (ROM), an erasable programmable read only memory (EPROM), a portable compact disk read only memory (CD-ROM), USB memory, or any combination of the above storage media. The computer-readable storage medium can be any combination of one or more computer-readable storage media.

Since the optical proximity correction system and the computer storage medium of the embodiments of the present application can perform the corresponding steps of the aforementioned optical proximity effect correction method, they also have the advantages of the aforementioned optical proximity effect correction method.

Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of the present invention.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or May be integrated into another device, or some features may be omitted, or not implemented.

In the description provided herein, numerous specific details are set forth. It will be understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

Similarly, it is to be understood that in the description of the exemplary embodiments of the invention, various features of the invention are sometimes grouped together , or in its description. However, this method of the invention should not be interpreted as reflecting the intention that the invention as claimed requires more features than are expressly recited in each claim. Rather, as the corresponding claims reflect, the invention lies in the fact that the corresponding technical problem may be solved with less than all features of a single disclosed embodiment. Thus, the claims following the Detailed Description are hereby expressly incorporated into this Detailed Description, with each claim standing on its own as a separate embodiment of this invention.

It will be understood by those skilled in the art that all features disclosed in this specification (including the accompanying claims, abstract and drawings) and any method or apparatus so disclosed may be used in any combination, except that the features are mutually exclusive. Processes or units are combined. Each feature disclosed in this specification (including accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.

Furthermore, those skilled in the art will appreciate that although some of the embodiments described herein include certain features, but not others, included in other embodiments, that combinations of features of different embodiments are intended to be within the scope of the invention within and form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.

It should be noted that the above-described embodiments illustrate rather than limit the invention, and that alternative embodiments may be devised by those skilled in the art without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In a unit claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, and third, etc. do not denote any order. These words can be interpreted as names.

The above is only the specific embodiment of the present invention or the description of the specific embodiment, and the protection scope of the present invention is not limited thereto. Any changes or substitutions should be included within the protection scope of the present invention. The protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

An optical proximity effect correction method, comprising:

Obtain the graphics of the previous layer of the current layer, and classify the area of the current layer in the original design graphics of lithography according to the graphics of the previous layer, so as to obtain the category to which the areas in the original design graphics belong, wherein , the category to which the area belongs includes an overlapping area and a non-overlapping non-overlapping area in the current layer that overlaps with the previous layer in the original design graphic;

Setting priorities for the regions of each category, wherein the priority of the overlapping regions is higher than the priority of the non-overlapping regions;

A plurality of target points are set at the edge of the original design graphic, wherein the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area;

Obtain a modified graphic of the original design graphic according to the OPC model, and simulate the modified graphic to obtain a graphic simulation result;

Calculate the difference between the graphic simulation result and the original design graphic at each of the target points;

According to the difference and the weight of the target point, the correction graph is adjusted to obtain the adjusted correction graph;

Simulating the adjusted correction graph to obtain a graph simulation result, and calculating the difference between the graph simulation result and the corrected graph at each of the target points; and

Repeatedly performing the adjustment according to the difference and the weight of the target point, adjusting the correction graph to obtain an adjusted correction graph, simulating the adjusted correction graph to obtain a graph simulation result, calculating each The step of the difference between the graphic simulation result and the corrected graphic at the target point is iterated until a final corrected graphic is obtained.
The optical proximity effect correction method of claim 1, wherein the current layer is a gate dielectric layer, and the previous layer is an active region layer.
The optical proximity effect correction method according to claim 2, wherein the overlapping region is a gate region.
The optical proximity effect correction method according to claim 1, wherein the original design graphics include one or more of U-shaped graphics, T-shaped graphics, H-shaped graphics, L-shaped graphics, and square ring graphics .
The optical proximity effect correction method of claim 1, wherein the difference is an edge placement error.
The optical proximity effect correction method according to claim 1, wherein the edge includes a line end and an adjacent edge segment, and the step of setting the target further comprises:

Analyzing and dividing the edge of the original design graphic to obtain a plurality of adjacent edge segments and line ends;

The target point is set at the line end and the adjacent edge segment.
The optical proximity effect correction method according to claim 1, wherein the original design graphic is a selection of part of the layout pattern.
The optical proximity effect correction method according to claim 1, wherein the obtaining a correction graphic of the original design graphic according to the OPC model, and simulating the correction graphic to obtain a graphic simulation result, further comprising:

Photolithography process parameters are determined according to the feature size of the current layer of the original design pattern, and the OPC model is determined according to the photolithography process parameters.
The optical proximity effect correction method according to claim 8, wherein the determining the OPC model according to the lithography process parameter further comprises:

Place the pre-designed test pattern on the target, and collect the data of the real lithography wafer;

By means of the test pattern and the data of the real lithography wafer, the OPC model is obtained by simulating with an OPC modeling tool.
The optical proximity effect correction method according to claim 8, wherein the determining the OPC model according to the lithography process parameter further comprises:

The OPC model is retrieved from the OPC model library.
The optical proximity effect correction method according to claim 1, wherein the graphical simulation result is a simulated contour.
The optical proximity effect correction method according to claim 1, wherein the adjusting the correction graph according to the difference and the weight of the target point to obtain the adjusted correction graph, further comprising:

The correction requirements are allocated according to the level of the weight, and the target point with a high weight is corrected first.
The optical proximity effect correction method according to claim 1, wherein the weight of the target point in the overlapping area is greater than the weight of the target point in the non-overlapping area.
An optical proximity effect correction system, characterized in that the optical proximity effect correction system comprises:

memory for storing executable program instructions;

a processor, configured to execute the program instructions stored in the memory, so that the processor executes the optical proximity effect correction method according to claim 1 .
A mask, characterized in that the mask comprises:

ontology;

A mask pattern disposed on the body, the mask pattern is a correction pattern obtained based on the optical proximity effect correction method as claimed in claim 1 .