CN104749899A - Optical proximity correction method - Google Patents
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- CN104749899A CN104749899A CN201310745648.7A CN201310745648A CN104749899A CN 104749899 A CN104749899 A CN 104749899A CN 201310745648 A CN201310745648 A CN 201310745648A CN 104749899 A CN104749899 A CN 104749899A
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Abstract
The invention discloses an optical proximity correction method which is as follows: a photolithographic resolution limit table is established, and the photolithographic resolution limit table includes an exposable area and a non-exposable area; current layer and adjacent layer graphs are provided, and the current layer and adjacent layer graphs are overlapped to form an overlapping graph; a bad edge of the current layer graph is determined; cut-off points are added into the bad edge, the cut-off points are respectively located below or above a first adjacent layer sub graph, the bad edge part between the cut-off points is used as a first line segment, other bad edge part is used as a second line segment, and the second line segment is moved, so that a second width is formed between a second line segment relative edge in a first to-be-detected sub graph and the second line segment, a second distance is formed between the second line segment and an adjacent current layer sub graph, and the second width and the second distance are located in the exposable area in the photolithographic resolution limit table; and according to the length of the first line segment, the first line segment can be moved a corresponding distance. The influence on semiconductor device performances can be avoided.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly a kind of optical adjacent correction method.
Background technology
Photoetching technique is a vital technology in semiconductor fabrication techniques, and it can realize figure to transfer to silicon chip surface from mask, forms the semiconductor product meeting designing requirement.In photo-etching technological process, first, by step of exposure, light by the area illumination of printing opacity in mask on the silicon chip being coated with photoresist, and with photoresist generation photochemical reaction; Then, by development step, utilize photosensitive and not photosensitive photoresist to the dissolution degree of developer, form photoengraving pattern, realize the transfer of mask pattern; Then, by etch step, the pattern formed based on photoresist layer etches silicon chip, is transferred to further on silicon chip by mask pattern.
In the process forming mask plate patterns, be generally according to the final etched features formed, design the exposure targeted graphical on photoresist layer; And then according to described exposure targeted graphical, calculated the figure finally needing to be formed on mask plate by OPC model.
But owing to there is optical proximity effect, the exposure capability of photoetching equipment is subject to the restriction of photoetching resolution, size is less than to the exposure targeted graphical of photoetching resolution, in the exposure process of reality, be have no idea to form the exposure figure measure-alike with this exposure targeted graphical on photoresist layer.
So need in the design phase, according to the resolution of photoetching equipment, carry out suitable compensation to exposure targeted graphical, formation can expose targeted graphical, then forms suitable mask plate patterns according to the described targeted graphical that exposes.Prior art usually can by the photoetching resolution restriction table of contrast board, and by reducing the width of exposure targeted graphical, and then the spacing increased between adjacent exposure targeted graphical makes the targeted graphical that can not expose convert to can to expose targeted graphical.
Described photoetching resolution restriction table is to different in width, different spacing figure, after exposing, according to the form that the exposure effect of figure obtains, the transverse and longitudinal coordinate of form is respectively the spacing between the width of the exposure figure formed on a photoresist and adjacent exposure figure.Described photoetching resolution restriction table comprises can exposure area and can not exposure area, describedly can refer to the range of size of the exposure figure that can be formed on a photoresist in exposure area; Can not the range of size of figure in exposure area then can not be formed on a photoresist.Prior art can by reducing the width of exposure targeted graphical, can not the exposure targeted graphical in exposure area move to can exposure area.
But the change of exposure targeted graphical size can cause there is certain deviation between the follow-up etched features size that formed for mask carries out etching with described graphical photoresist layer and design size, and the performance of the semiconductor devices that may finally be formed impacts.
Summary of the invention
The problem that the present invention solves is to provide a kind of method of optical proximity correction, avoids impacting the performance of semiconductor devices.
For solving the problem, the invention provides a kind of method of optical proximity correction, comprise: according to the spacing between graphic length, width and adjacent pattern, set up photoetching resolution restriction table, described photoetching resolution restriction table comprises can exposure area and can not exposure area; There is provided current layer figure and adjacent layer figure, described current layer figure comprises some current layer spirtes, and described adjacent layer figure comprises some adjacent layer spirtes, and by described current layer figure and adjacent layer graphics overlay, forms overlapping figure; Determine the bad selvedge in described current layer figure, the current layer spirte at described bad selvedge place is as the first positive spirte to be repaired, described first positive spirte to be repaired has the first width, between described bad selvedge and adjacent current layer spirte, there is the first spacing, what described first width and the first spacing were arranged in photoetching resolution restriction table can not exposure area, and, in overlapping figure, described bad selvedge or spacing crossing with part adjacent layer spirte is less than preset value, and described part adjacent layer spirte is as first-phase adjacent bed spirte; Described bad selvedge adds cut-off, and described cut-off lays respectively at above and below first-phase adjacent bed spirte, and the part bad selvedge between described cut-off is as the first line segment, and the remainder of bad selvedge is as the second line segment; Mobile described second line segment, make, between the relative edge of the second line segment in the first positive spirte to be repaired and the second line segment, there is the second width, have the second spacing between second line segment and adjacent current layer spirte, what described second width and the second spacing were arranged in photoetching resolution restriction table can exposure area; According to the length of described first line segment, contrast photoetching resolution restriction table, first line segment is moved corresponding distance, make, between the relative edge of the first line segment in the first positive spirte to be repaired and the first line segment, there is the 3rd width, have the 3rd spacing between first line segment and adjacent current layer spirte, what described 3rd width and the 3rd spacing were arranged in the photoetching resolution restriction table corresponding to length of the first line segment can exposure area.
Optionally, described second width is less than the first width, and the 3rd width is greater than the second width.
Optionally, the vertical range between described cut-off and first-phase adjacent bed spirte is 0 ~ 100nm.
Optionally, described preset value is 30nm ~ 50nm.
Optionally, the spacing between described first line segment and adjacent layer spirte is 0 ~ 30nm.
Optionally, the method for building up of described photoetching resolution restriction table comprises: provide mask pattern, described mask pattern has the spirte of some different in width and spacing, and described spirte is the lightproof area of mask pattern; Expose described mask pattern, obtain exposure figure, described exposure figure comprises some exposure spirtes; Using the spacing between the width of described exposure spirte and adjacent exposure spirte as horizontal ordinate and ordinate, set up photoetching resolution restriction table, what the width of described exposure spirte, the spacing between described exposure spirte and adjacent spirte were arranged in described photoetching resolution restriction table can exposure area, and the size area of all the other inchoate exposure figures be in photoetching resolution restriction table can not exposure area.
Optionally, according to the exposure spirte of different length, set up different photoetching resolution restriction tables respectively.
Optionally, the width range of the exposure spirte of described photoetching resolution restriction table is 50nm ~ 6000nm, and the spacing between adjacent exposure spirte is 40nm ~ 300nm.
Optionally, the length range setting up the exposure spirte of described photoetching resolution restriction table is 50nm ~ 6000nm.
Optionally, the quantity of described photoetching resolution restriction table is four, comprise: the first photoetching resolution restriction table, set up the first exposure spirte that described first photoetching resolution restriction table adopts and have the first length, described first length range is 1000nm ~ 6000nm; Second photoetching resolution restriction table, set up the second exposure spirte that described second photoetching resolution restriction table adopts and have the second length, described second length range is 500nm ~ 1000nm; 3rd photoetching resolution restriction table, set up the 3rd exposure spirte that described 3rd photoetching resolution restriction table adopts and have the 3rd length, described 3rd length range is 150nm ~ 500nm; Resolution restriction at 4th quarter table, set up the 4th exposure spirte that described resolution restriction at 4th quarter table adopts and have the 4th length, described 4th length range is 50nm ~ 150nm.
Optionally, the method of mobile described second line segment comprises: contrast the first photoetching resolution restriction table, second line segment is moved minor increment, make the second width between the relative edge of the second line segment in the first positive spirte to be repaired and the second line segment, the second spacing between second line segment and adjacent current layer spirte, what be arranged in the first photoetching resolution restriction table can exposure area.
Optionally, the method of mobile described first line segment comprises: according to the length of the first line segment, select corresponding photoetching resolution restriction table, the length of the exposure spirte that the photoetching resolution restriction table of described correspondence adopts is closest or identical with the length of described first line segment; What judge whether the length of described first line segment and the first width are arranged in described corresponding photoetching resolution restriction table can exposure area; Can exposure area if be positioned at, then keep described first line segment motionless; Can not exposure area if be positioned at, then contrast the photoetching resolution restriction table of described correspondence, the first line segment is moved minimum distance, the distance between the first line segment and adjacent current layer spirte is decreased to can in exposure area.
Optionally, also comprise: determine that treating in described figure revises limit, described waiting revises the current layer spirte at place, limit as the second positive spirte to be repaired, the width of described second positive spirte to be repaired and described in wait that the spacing revised between limit and adjacent current layer spirte is arranged in photoetching resolution restriction table can not exposure area.
Optionally, also comprise: wait described in mobile to revise limit, make the width of described second positive spirte to be repaired, described in wait to revise the spacing between limit and adjacent current layer spirte, what be arranged in photoetching resolution restriction table can exposure area.
Compared with prior art, technical scheme of the present invention has the following advantages:
In technical scheme of the present invention, first set up photoetching resolution restriction table, described photoetching resolution restriction table comprises can exposure area and can not exposure area; Then the bad selvedge in current layer figure is found out, the current layer spirte at described bad selvedge place is first treat correction pattern, what described first positive spirte to be repaired was arranged in photoetching resolution limiting surface can not exposure area, further, described bad selvedge or spacing crossing with part adjacent layer spirte is less than preset value.In technical scheme of the present invention, by adding the cut-off be positioned at above and below adjacent layer spirte on described bad selvedge, bad selvedge is split as first line segment close or crossing with adjacent layer spirte, and away from the second line segment of described adjacent layer spirte, different photoetching resolution restriction tables is contrasted respectively for the first line segment and the second line segment, move, thus make the first positive spirte to be repaired enter in photoetching resolution restriction table can exposure area.Because the length of the first line segment is less, in the photoetching resolution restriction table corresponding with the length of the first line segment can exposure area be greater than in the first photoetching resolution restriction table can exposure area, so the minor increment that the distance of the first line segment movement is less than the second line segment movement described first positive spirte to be repaired just can be made to enter can in exposure area, thus can avoid or reduce as far as possible the change of the overlapping area between adjacent layer spirte and the first positive spirte to be repaired, thus the performance of semiconductor device that formed can not be affected or affect not quite as exposure targeted graphical to make to adopt said method to carry out revised figure.
Further, described cut-off lays respectively at above and below adjacent layer spirte, make the length of the nearest length of side of adjacent layer spirte middle distance first line segment or be all less than the length of the first line segment with the length of the first line segment intersection, can avoid in photoetching process because alignment error causes overlapping area between adjacent layer spirte and current layer spirte to change.
Accompanying drawing explanation
Fig. 1 is the schematic diagram setting up the first exposure spirte that the first photoetching resolution restriction table adopts in embodiments of the invention;
Fig. 2 to Fig. 3 is the schematic diagram setting up the second exposure spirte that the second photoetching resolution restriction table adopts in embodiments of the invention;
Fig. 4 is the schematic diagram setting up the 3rd exposure spirte that the 3rd photoetching resolution restriction table adopts in embodiments of the invention;
Fig. 5 is the schematic diagram setting up the 4th exposure spirte that the 4th photoetching resolution restriction table adopts in embodiments of the invention;
Fig. 6 to Fig. 8 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention;
Fig. 9 to Figure 12 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention;
Figure 13 to Figure 14 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention;
Figure 15 to Figure 16 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention;
Figure 17 to Figure 18 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention.
Embodiment
As described in the background art, by changing the width of exposure targeted graphical, make described exposure targeted graphical from can not exposure figure become can exposure figure, there is certain deviation between size after causing the material layer to be etched corresponding with this exposure targeted graphical to be etched and design size, may impact the performance of semiconductor devices in chip.
Research finds, using polysilicon layer as etachable material layer, formed in the process of polysilicon gate, reduce the width of the exposure target of etches polycrystalline silicon layer, the width of the final polysilicon gate formed can be made to decline, thus cause the channel width of the transistor at described polysilicon gate place to decline, thus affect the electrical parameters such as the saturation current of transistor, affect the performance of transistor; And originally should form the metal plug surrounded completely by polysilicon gate surface, due to the reduction of polysilicon gate width, also partly can only be positioned at the surface of described polysilicon gate, cause the problems such as contact resistance rising, electric leakage.
Further, along with the continuous decline of semiconductor technology node, also the scatter graph that can expose can be added in described exposure targeted graphical, to improve process window.This just causes the spacing between adjacent exposure target spirte further to decline, cause needs to carry out optical proximity correction to more exposure target spirte and carry out graph compensation, to make described exposure target spirte to be formed on a photoresist, this impact on performance of semiconductor device that will make is more remarkable.So need to find one exposure targeted graphical can either be allowed to become can exposure figure, can try one's best again and not affect the optical adjacent correction method of performance of semiconductor device.
In embodiments of the invention, by carrying out staging treating to the bad selvedge of current layer figure, the current layer spirte that can not expose can either be become can exposure figure, can not affect again the performance of the semiconductor devices formed as exposure targeted graphical using described current layer figure.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
First, according to the spacing between graphic length, width and adjacent pattern, set up photoetching resolution restriction table, described photoetching resolution restriction table comprises can exposure area and can not exposure area.
Concrete, the method for building up of described photoetching resolution restriction table comprises: provide mask pattern, described mask pattern has the spirte of some different in width and spacing, and described spirte is the lightproof area of mask pattern; Expose described mask pattern, obtain exposure figure, described exposure figure comprises some exposure spirtes; Using the spacing between the width of described exposure spirte and adjacent exposure spirte as horizontal ordinate and ordinate, set up photoetching resolution restriction table, what the width of described exposure spirte, the spacing between described exposure spirte and adjacent spirte were arranged in described photoetching resolution restriction table can exposure area, and the size area of all the other inchoate exposure figures be in photoetching resolution restriction table can not exposure area.
The width range of the exposure spirte of described photoetching resolution restriction table is 50nm ~ 6000nm, and the spacing between adjacent exposure spirte is 40nm ~ 300nm.
Further, according to the exposure spirte of different length, set up different photoetching resolution restriction tables respectively, the length range setting up the exposure spirte of described photoetching resolution restriction table is 50nm ~ 6000nm.
In the present embodiment, to carry out the exposure targeted graphical of polysilicon layer etching, the exposure spirte set up in photoetching resolution restriction table is all strip figure.In the present embodiment, the different length according to exposure spirte sets up altogether 4 different photoetching resolution restriction tables.
Please refer to Fig. 1, Fig. 1 is the schematic diagram of the first exposure spirte in the first exposure figure of setting up the first photoetching resolution restriction table and adopting.
Described first exposure spirte 101 has width L1, and the spacing between adjacent first exposure spirte 101 is S1, and described first exposure spirte 101 has the first height H 1.The scope of described width L1 is 50 ~ 6000nm, and the scope of described interval S 1 is 40nm ~ 300nm, and the scope of described first height H 1 is 1000nm ~ 6000nm.Difference first in described first exposure figure exposes spirte can have different width L1 and interval S 1.
According to described first exposure figure, using the interval S 1 between the width L1 of described first exposure spirte and adjacent first exposure spirte as horizontal ordinate and ordinate, set up the first photoetching resolution restriction table according to exposure results, please refer to table 1.
Table 1 first photoetching resolution restriction table
In the present embodiment, the length of the first exposure spirte in the first exposure figure adopted in described first photoetching resolution restriction table is 2000nm, width L1 scope is 40nm ~ 100nm, and interval S 1 scope between adjacent first exposure spirte is 50nm ~ 200nm.In other embodiments of the invention, data area can also be set up wider, the first meticulousr photoetching resolution restriction table.
In table 1, numeral " 1 " representative " can expose ", digital " 0 " representative " can not expose ".As can be seen from Table 1, along with interval S 1 becomes greatly gradually, and width L1 diminishes gradually, can not gradually become can exposure area in exposure area.
Please refer to Fig. 2, Fig. 2 is the schematic diagram of the second exposure spirte in the second exposure figure of setting up the second photoetching resolution restriction table and adopting.
Described second exposure spirte 201 has width L2, and the spacing between adjacent second exposure spirte 201 is S2, and described second exposure spirte 201 has the second height H 2.In other embodiments of the invention, described second exposure spirte can also as shown in institute in Fig. 3.The breadth extreme of described second exposure spirte is L2, and it is H2 that the part second with breadth extreme part exposes spirte 201a length, and breadth extreme part and adjacent second spacing exposed between spirte is S2.
The scope of described width L2 is 50 ~ 6000nm, and the scope of described interval S 2 is 40nm ~ 300nm, and the scope of described second height H 2 is 500nm ~ 1000nm.There is in described second exposure figure the second exposure spirte of some different in width, different spacing.
According to described second exposure figure, using the interval S 2 between the width L2 of described second exposure spirte and adjacent second exposure spirte as horizontal ordinate and ordinate, set up the second photoetching resolution restriction table according to exposure results, please refer to table 2.
Table 2 second photoetching resolution restriction table
In the present embodiment, the length of the second exposure spirte in the second exposure figure adopted in described second photoetching resolution restriction table is 600nm, width L2 scope is 40nm ~ 100nm, and interval S 2 scope between adjacent second exposure spirte is 50nm ~ 200nm.In other embodiments of the invention, data area can also be set up wider, the second meticulousr photoetching resolution restriction table.
In table 2, numeral " 1 " representative " can expose ", digital " 0 " representative " can not expose ".Set up the first exposure spirte 101(that table 1 adopts please refer to Fig. 1 because the length H2 setting up the described second exposure spirte 201 that described table 2 adopts be less than) length H1, as can be seen from Table 2, in described second photoetching resolution restriction table can exposure area scope be greater than in the first photoetching resolution restriction table can exposure area.
Please refer to Fig. 4, Fig. 4 is the schematic diagram of the 3rd exposure spirte in the 3rd exposure figure setting up the 3rd photoetching resolution restriction table and adopt.
The 3rd exposure spirte 301 in described 3rd exposure figure has width L3, and the spacing between adjacent 3rd exposure spirte 301 is S3, and described 3rd exposure spirte 301 has third high degree H3.
The scope of described width L3 is 50 ~ 6000nm, and the scope of described interval S 3 is 40nm ~ 300nm, and the scope of described third high degree H3 is 150nm ~ 500nm.There is in described 3rd exposure figure the 3rd exposure spirte of some different in width, different spacing.
According to the 3rd exposure figure, using the interval S 3 between the width L3 of described 3rd exposure spirte 301 and adjacent 3rd exposure spirte 301 as horizontal ordinate and ordinate, set up the 3rd photoetching resolution restriction table according to exposure results, please refer to table 3.
Table 3 the 3rd photoetching resolution restriction table
In the present embodiment, the length of the 3rd exposure spirte in the 3rd exposure figure adopted in described 3rd photoetching resolution restriction table is 300nm, the width L3 scope of the 3rd exposure spirte is 40nm ~ 100nm, and interval S 3 scope between adjacent 3rd exposure spirte is 50nm ~ 200nm.In other embodiments of the invention, data area can also be set up wider, the 3rd meticulousr photoetching resolution restriction table.
In table 3, numeral " 1 " representative " can expose ", digital " 0 " representative " can not expose ".Set up the second exposure spirte 201(that table 2 adopts please refer to Fig. 2 because the length H3 setting up the described 3rd exposure spirte 301 that table 3 adopts be less than) length H2, as can be seen from Table 3, in described 3rd photoetching resolution restriction table can exposure area scope be greater than in the second photoetching resolution restriction table can exposure area.
Please refer to Fig. 5, Fig. 5 is the schematic diagram of the spirte in the 4th exposure figure setting up the 4th photoetching resolution restriction table and adopt.
The 4th exposure spirte 401 in described 4th exposure figure has width L4, and the spacing between adjacent 4th exposure spirte 401 is S4, and described 4th exposure spirte 401 has the 4th height H 4.The scope of described width L4 is 50 ~ 6000nm, and the scope of described interval S 4 is 40nm ~ 300nm, and the scope of described 4th height H 4 is 50nm ~ 150nm.There is in described 4th exposure figure the 4th exposure spirte of some different in width, different spacing.According to described 4th exposure figure, using the interval S 4 between the width L4 of described 4th exposure spirte and adjacent 4th exposure spirte as horizontal ordinate and ordinate, set up the 4th photoetching resolution restriction table according to exposure results, please refer to table 4.
Table 4 the 4th photoetching resolution restriction table
In the present embodiment, the length H4 of the 4th exposure spirte in the 4th exposure figure adopted in described 4th photoetching resolution restriction table is 100nm, the width L4 scope of the 4th exposure spirte is 40nm ~ 100nm, and interval S 4 scope between adjacent 4th exposure spirte is 50nm ~ 200nm.In other embodiments of the invention, data area can also be set up wider, the 4th meticulousr photoetching resolution restriction table.
In table 4, numeral " 1 " representative " can expose ", digital " 0 " representative " can not expose ".Set up the 3rd exposure spirte 301(that table 3 adopts please refer to Fig. 4 because the length H4 setting up the described 4th exposure spirte 401 adopted described in table 4 be less than) length H3, as can be seen from Table 4, in described 4th photoetching resolution restriction table can exposure area scope be greater than in the 3rd photoetching resolution restriction table can exposure area.
In embodiments of the invention, establish altogether above-mentioned four photoetching resolution restriction tables, in other embodiments of the invention, can also be different according to the length of exposure figure, set up the photoetching resolution restriction table of greater number, make the better effects if of follow-up optical proximity correction.
Please refer to Fig. 6, there is provided current layer figure and adjacent layer figure, described current layer figure comprises some current layer spirtes, and described adjacent layer figure comprises some adjacent layer spirtes, and by described current layer figure and adjacent layer graphics overlay, form overlapping figure.
In the present embodiment, described current layer figure comprises current layer spirte 110 and current layer spirte 120, described current layer figure is the exposure targeted graphical that etches polycrystalline silicon layer is corresponding, and described current layer spirte 110 and current layer spirte 120 are the figure of polysilicon gate.So the length of the current layer spirte in described current layer figure is longer, can be 2000nm ~ 6000nm.
In the present embodiment, described adjacent layer figure comprises adjacent layer spirte 200, and described adjacent layer figure is the exposure targeted graphical forming metal plug, and described metal plug is formed in the surface of polysilicon gate.
To form figure as shown in Figure 6 after described current layer figure and adjacent layer graphics overlay, described adjacent layer spirte 200 is positioned at the surface of current layer spirte 110.
Determine the bad selvedge in described current layer figure, the current layer spirte at described bad selvedge place is as the first positive spirte to be repaired, described first positive spirte to be repaired has the first width, between described bad selvedge and adjacent current layer spirte, there is the first spacing, what described first width and the first spacing were arranged in photoetching resolution restriction table can not exposure area, and, in overlapping figure, described bad selvedge or spacing crossing with part adjacent layer spirte is less than preset value, and described part adjacent layer spirte is as first-phase adjacent bed spirte.In the present embodiment, described preset value is 50nm.
In the present embodiment, in described current layer figure, first width L11 of current layer spirte 110 is 80nm, the first interval S 11 between described current layer spirte 110 and adjacent current layer spirte 120 is 120nm, the first photoetching resolution restriction table shown in the table of comparisons 1, what described current layer spirte 110 was positioned at described first photoetching resolution can not exposure area, needs to revise described current layer spirte 110.And, the length of side 111 of described current layer spirte 110 apart from the space D 1 between described adjacent layer spirte 200 for 10nm is less than preset value 50nm, so the described length of side 111 is the bad selvedge 111 of described current layer spirte 110, described current layer spirte 110 is the first positive spirte to be repaired, and described adjacent layer spirte 200 is first-phase adjacent bed spirte.The size of described preset value determines according to the exposure resolution ratio of photoetching equipment, and resolution is higher, and described preset value is less; Resolution is lower, and described preset value is higher.In other embodiments of the invention, the size of described preset value can be 30nm ~ 50nm.In embodiments of the invention, the spacing between described bad selvedge 111 and adjacent layer spirte is 0 ~ 30nm, is less than described preset value.
Please refer to Fig. 7, described bad selvedge 111 adds cut-off a and cut-off b, described cut-off a and cut-off b lays respectively at above and below adjacent layer spirte 200, part bad selvedge 111 between described cut-off a and cut-off b is as the first line segment A, and the remainder of bad selvedge 111 is as the second line segment B.
Consider the alignment error in photoetching process, and the dimensional homogeneity of the first line segment A in raising exposure figure, vertical range between described cut-off a, cut-off b and first-phase adjacent bed spirte 200 is 0 ~ 100nm, guarantee that the length of the length of side that described adjacent layer spirte 200 middle distance first line segment A is nearest is less than or equal to the length of the first line segment A, preferably, the length of the length of side that described adjacent layer spirte 200 middle distance first line segment A is nearest is less than the length of the first line segment A.In the present embodiment, the vertical range between described point of contact a, point of contact c distance and adjacent layer spirte 200 is 30nm, and the length of described first line segment A is 100nm.In other embodiments of the invention, the vertical interval between described first line segment A and first-phase adjacent bed spirte is 0 ~ 30nm.
Please refer to Fig. 8, mobile described second line segment B, make, between the relative edge 112 of the second line segment in described current layer spirte 110 and the second line segment B, there is the second width L12, have the second interval S 12 between second line segment B and adjacent current layer spirte 120, what described second width L12 and the second interval S 12 were arranged in photoetching resolution restriction table can exposure area.Described second width L12 is less than the first width L11, and the second spacing is greater than the first spacing.
Concrete, in the present embodiment, the method of mobile described second line segment B comprises: contrast the first photoetching resolution restriction table (table 1), second line segment B is moved minor increment C1, makes the second width L12 between the relative edge 112 of the second line segment B in described current layer spirte 110 and the second line segment B, the second interval S 12 between the second line segment B and adjacent current layer spirte 120 is positioned at can exposure area; And the distance between described first line segment A and relative edge 112 is still the first width L11, the distance between the first line segment A and current layer spirte 120 is the first interval S 11.Described minor increment C1 is greater than 0.
Because described current layer spirte 110(please refer to Fig. 7) the first width L11 be 80nm, first interval S 11 is 120nm, what be arranged in the first photoetching resolution restriction table (table 1) can not exposure area, immediate with this position can the width of exposure area be 60nm, spacing is 120nm or width 70nm, spacing is 140nm, so, the minor increment C1 of mobile described second line segment B is 20nm, the the second width L12 had between the relative edge 112 of described second line segment B and the second line segment B is made to be 60nm, and the second interval S 12 between described second line segment B and current layer spirte 120 is 140nm, what described second width L12 and the second interval S 12 were arranged in described first photoetching resolution restriction table (table 1) can exposure area.
Please refer to Fig. 8, according to the length of described first line segment A, contrast photoetching resolution restriction table, mobile corresponding distance, make, between the relative edge 112 of the first line segment A in described current layer spirte and the first line segment A, there is the 3rd width, between first line segment A and adjacent current layer spirte, 120 have the 3rd spacing, and what described 3rd width and the 3rd spacing were arranged in the photoetching resolution restriction table corresponding to length of the first line segment can exposure area, and formation can expose current layer spirte 110a.Described 3rd width is less than the first width, and is greater than the second width; Described 3rd spacing is greater than the first spacing, and is less than the second spacing.
Concrete, the method of mobile described first line segment A comprises: according to the length of the first line segment A, select corresponding photoetching resolution restriction table, the length of the exposure spirte that the photoetching resolution restriction table of described correspondence adopts is closest or identical with the length of described first line segment A; What judge whether the length of described first line segment A and the first width are arranged in described corresponding photoetching resolution restriction table can exposure area; If be positioned at described can exposure area, then keep described first line segment motionless; Can not exposure area if be positioned at, then contrast the photoetching resolution restriction table of described correspondence, the first line segment A is moved minimum distance, the distance between the relative edge of the first line segment in current layer spirte and the first line segment is decreased to can in exposure area.
In the present embodiment, the length of described first line segment A is 100nm, so the photoetching resolution restriction table selecting the 4th photoetching resolution restriction table (table 4) the most corresponding, the length of the 4th exposure spirte that described 4th photoetching resolution restriction table adopts is that 100nm is identical with the length of described first line segment A, so can reflect preferably, the exposure status of the part current layer spirte at described first line segment A place.
First width L11 of the part current layer spirte at described first line segment A place is 80nm, the first interval S 11 between described first line segment A and adjacent current layer spirte 120 is 120nm, what be just in time arranged in described 4th photoetching resolution restriction table (table 4) can exposure area, so described first line segment A can be kept motionless, make described adjacent layer spirte 200 still be positioned at the described revised surface exposing current layer spirte 110a completely, the performance of the semiconductor devices adopting above-mentioned figure to be formed as exposure targeted graphical can not be had influence on.
In other embodiments of the invention, the first width L11 of described first line segment A corresponding thereto between limit 112, and first the first interval S 11 between line segment A and adjacent current layer spirte 120 may be arranged in photoetching resolution restriction table can not exposure area, described first line segment A can be moved, described first width L11 is reduced, and the part current layer spirte at described first line segment A place can be positioned at can exposure area.Because the length of the first line segment A is less, in the photoetching resolution restriction table corresponding with the length of the first line segment A can exposure area be greater than in the first photoetching resolution restriction table can exposure area, so the minor increment C1 that the distance of the first line segment A movement is less than the second line segment B movement just can enter can in exposure area.
Prior art generally adopts the moving method of the second line segment B, first line segment A and the second line segment B is moved integrally, thus first of adjacent layer spirte and described bad selvedge place can be caused to treat that larger change occurs the overlapping area between correction pattern, cause the follow-up degradation treating the semiconductor devices that correction pattern is formed as exposure target using described revised first.And in the present embodiment, staging treating is carried out to described bad selvedge, make the distance of the first line segment movement close or crossing with first-phase adjacent bed spirte less, thus avoid or reduce the change that first-phase adjacent bed spirte and described first treats the overlapping area between correction pattern as far as possible, thus reduce the impact on the performance of semiconductor device of follow-up formation.
In other embodiments of the invention, in described current layer figure, also have and wait to revise limit, described in wait the current layer spirte revising place, limit width, wait that the spacing revised between limit and adjacent current layer spirte is arranged in the first photoetching resolution restriction table can not exposure area.Described waiting revises the current layer spirte at place, limit as the second positive spirte to be repaired.
Adopt with above-described embodiment, the method of mobile second line segment, wait that revising limit moves to described, the width making revised second to treat correction pattern, described in wait to revise the spacing between limit and adjacent current layer spirte, what be arranged in photoetching resolution restriction table can exposure area.
In another embodiment of the invention, the optical adjacent correction method in another kind of situation is given.
Please refer to Fig. 9, there is provided current layer figure and adjacent layer figure, described current layer figure comprises some current layer spirtes, and described adjacent layer figure comprises some adjacent layer spirtes, and by described current layer figure and adjacent layer graphics overlay, form overlapping figure.
In the present embodiment, described current layer figure comprises current layer spirte 210 and current layer spirte 220, described current layer figure is the exposure targeted graphical that etches polycrystalline silicon layer is corresponding, and described current layer spirte 210 and current layer spirte 220 are the figure of polysilicon gate.So the length of the spirte in described current layer figure is longer, can be 2000nm ~ 6000nm.
In the present embodiment, described adjacent layer figure comprises adjacent layer spirte 300, and described adjacent layer figure is the exposure targeted graphical being formed with source region, and described active area is formed in the below of polysilicon gate.
To form overlapping figure as shown in Figure 10 after described current layer figure and adjacent layer graphics overlay, described adjacent layer spirte 300 is positioned at the below of current layer spirte 210, and described current layer spirte 210 intersects vertically with adjacent layer spirte 300.
Determine the bad selvedge in described current layer figure, the current layer spirte at described bad selvedge place is as the first positive spirte to be repaired, described first positive spirte to be repaired has the first width, between described bad selvedge and adjacent current layer spirte, there is the first spacing, what described first width and the first spacing were arranged in photoetching resolution restriction table can not exposure area, and, in overlapping figure, described bad selvedge or spacing crossing with part adjacent layer spirte is less than preset value, and described part adjacent layer spirte is as first-phase adjacent bed spirte.
In the present embodiment, in described current layer figure, first width L21 of described current layer spirte 210 is 90nm, the first interval S 21 between described current layer spirte 210 and adjacent current layer spirte 220 is 120nm, the first photoetching resolution restriction table shown in the table of comparisons 1, what described current layer spirte 210 was positioned at described first photoetching resolution can not exposure area, need to revise described current layer spirte, and the length of side 211 near current layer spirte 220 in described current layer spirte 210 is crossing with described adjacent layer spirte 300, so the described length of side 211 is the bad selvedge 211 of described current layer spirte 110, described current layer spirte 110 is the first positive spirte to be repaired, described adjacent layer spirte 300 is first-phase adjacent bed spirte.
Please refer to Figure 10, described bad selvedge 211 adds cut-off d and cut-off e, described cut-off d and cut-off e lays respectively at above and below adjacent layer spirte 300, part bad selvedge 211 between described cut-off d and cut-off e is as the first line segment C, and the remainder of bad selvedge 211 is as the second line segment D.
Consider the alignment error in photoetching process, and the dimensional homogeneity of the first line segment C in raising exposure figure, described cut-off d, vertical range between cut-off e and adjacent layer spirte 300 are 0 ~ 100nm, guarantee that in described adjacent layer spirte 300, the length crossing with bad selvedge is less than or equal to the length of the first line segment C, preferably, in described adjacent layer spirte 300, the length crossing with bad selvedge is less than the length of the first line segment C.In the present embodiment, the vertical range between described point of contact d, point of contact e distance and adjacent layer spirte 300 is 60nm, and the width of described adjacent layer spirte 300 is 150nm, so the length of described first line segment C is 270nm.
Please refer to Figure 11, mobile described second line segment D, described current layer spirte 210(is made to please refer to Figure 10) become current layer spirte 210a, between the relative edge 212 of the second line segment D and the second line segment D, there is the second width L22 in current layer spirte 210a, have the second interval S 22 between second line segment D and adjacent current layer spirte 220, what described second width L22 and the second interval S 22 were arranged in the first photoetching resolution restriction table can exposure area.Second width is little of the first width, and the second spacing is greater than the first spacing.
Concrete, in the present embodiment, the method of mobile described second line segment D comprises: contrast the first photoetching resolution restriction table (table 1), second line segment D is moved minor increment C2, and the second width L22 between the relative edge 212 of the second line segment D in described current layer spirte 210 and the second line segment D is positioned at can exposure area; And the distance between described first line segment C and relative edge 212 is still the first width L21, the distance between the first line segment C and adjacent current layer spirte 220 is the first interval S 21.Described minor increment C2 is greater than 0.
Because described current layer spirte 210(please refer to Figure 10) the first width L21 be 90nm, first interval S 21 is 120nm, what be arranged in the first photoetching resolution restriction table (table 1) can not exposure area, and immediate with this position can the width of exposure area be 60nm, and spacing is 120nm; Or width 70nm, spacing are 140nm; Or width is 80nm, spacing is 160nm.So, the minor increment C2 of mobile described second line segment D is 20nm, form current layer spirte 210a, the the second width L22 had between the relative edge 212 of the second line segment D in described current layer spirte 210a and the second line segment D is 70nm, and the second interval S 22 between described second line segment D and current layer spirte 220 is 140nm, what described second width L22 and the second interval S 22 were arranged in described first photoetching resolution restriction table (table 1) can exposure area.
Please refer to Figure 12, according to the length of described first line segment C, contrast photoetching resolution restriction table, mobile corresponding distance, form current layer spirte 210b, make, between the relative edge 212 of the first line segment C in described current layer spirte 210b and the first line segment C, there is the 3rd width L23, have the 3rd interval S 23 between first line segment C and adjacent current layer spirte 220, what described 3rd width L23 and the 3rd interval S 23 were arranged in the photoetching resolution restriction table corresponding to length of the first line segment C can exposure area.
In the present embodiment, the length of described first line segment C is 270nm, so the photoetching resolution restriction table selecting the 3rd photoetching resolution restriction table (table 3) the most corresponding, the length of the 3rd exposure spirte that described 3rd photoetching resolution restriction table adopts is 300nm, closest with the length of described first line segment C, so the exposure status of the part current layer spirte at described first line segment C place can be reflected preferably.
The part current layer spirte 210(at described first line segment C place please refer to Figure 11) the first width L21(please refer to Figure 11) be 90nm, the first interval S 21(between described first line segment C and adjacent current layer spirte 220 please refer to Figure 11) be 120nm, what be arranged in described 3rd photoetching resolution restriction table (table 3) can not exposure area, so need mobile described first line segment C, the distance between the relative edge 212 of the first line segment C and the first line segment C is decreased to can in exposure area.
In described 3rd photoetching resolution restriction table, apart from described width be 90nm, spacing be 120nm can not exposure area nearest can the width of exposure area be 80nm, spacing is 120nm, or width 90nm, spacing 140nm.So, the minor increment D1 of mobile described first line segment C is 10nm, make, between described first line segment C and relative edge 212, there is the 3rd width L23, L23=80nm, and between described first line segment C and adjacent current layer spirte 220, there is the 3rd interval S 23, S23=130nm, be described current layer spirte 210b be arranged in described 3rd photoetching resolution restriction table can exposure area.3rd width is less than the first width, and is greater than the second width; 3rd spacing is greater than the first spacing, and is less than the second spacing.
The distance D1=10nm of described first line segment C movement, and the distance C2=20nm of the second line segment D movement, the distance of the first line segment C movement is less than the distance of the second line segment D movement.This be due to, the length of the first line segment C is shorter, in mobile the 3rd photoetching resolution restriction table (table 3) referenced by first line segment C can in the first photoetching resolution restriction table (table 1) of exposure area scope reference when being greater than mobile second line segment D can exposure area scope, can exposure area so the first line segment D to be moved less distance just can enter, the overlapping area between described current layer spirte 210b and adjacent layer spirte 300 is made to change less, less on the impact of the performance of the semiconductor devices that follow-up employing above-mentioned current layer spirte 210b is formed as exposure targeted graphical.
And in prior art, it is generally the method adopting mobile second line segment D, whole bad selvedge 211 is moved larger distance C2, overlapping area between revised current layer spirte and adjacent layer spirte is changed greatly, and larger impact can be produced on the performance of the semiconductor devices of follow-up formation.
In other embodiments of the present invention, described current layer figure can also be the exposure targeted graphical of other materials layer, such as: metal level, active region layer or dielectric layer etc.
Please refer to Figure 13 and Figure 14, Figure 13 is in another embodiment of the present invention, said method is adopted to carry out the overlapping figure of revised current layer figure and adjacent layer figure, Figure 14 is, mask pattern is formed after carrying out OPC simulation according to the revised current layer figure in Figure 13, and then the overlapping figure of the analogue exposure figure obtained after analogue exposure is carried out to described mask pattern and adjacent layer figure.
Described current layer figure is the exposure targeted graphical forming polysilicon gate, and adjacent layer figure is the exposure targeted graphical being formed with source region.
Wherein, current layer spirte 310 both sides in described current layer figure all have current layer spirte 320, and, described current layer spirte 310 is can not exposure figure, so, described current layer spirte 210 has relative bad selvedge 311 and bad selvedge 312, adopt the method in above-described embodiment, all segmentation correction is carried out to described bad selvedge 311 and bad selvedge 312, described revised current layer spirte 310 is become can exposure figure, further, the overlapping area between described current layer spirte 310 and adjacent layer spirte 400 is made to change less.
Obtain mask pattern to revised current layer figure by OPC simulation, then carry out analogue exposure to described mask pattern, in the analogue exposure figure of acquisition, the pattern edge of described mimic diagram 310a is comparatively level and smooth, and the dimensional homogeneity of figure is higher.And the width at described analogue exposure figure 310a and adjacent layer spirte 400 lap position place does not change substantially.
Please refer to Figure 15 and Figure 16, Figure 15 is in another embodiment of the present invention, said method is adopted to carry out the overlapping figure of revised current layer figure and adjacent layer figure, Figure 16 is, mask pattern is formed after carrying out OPC simulation according to the revised current layer figure in Figure 15, and then the overlapping figure of the analogue exposure figure obtained after analogue exposure is carried out to described mask pattern and adjacent layer figure.
Wherein, revised current layer figure is the exposure targeted graphical forming polysilicon gate, and adjacent layer figure is the exposure mimic diagram forming metal plug.
Revised current layer spirte 410 side has another current layer spirte 420, and the overlapping area between revised current layer spirte 410 and adjacent layer spirte 500 does not change.
Analogue exposure figure 410a dimensional homogeneity is higher, edge is comparatively level and smooth, and described analogue exposure figure 410a surrounds described adjacent layer spirte 500, can guarantee that the polysilicon gate surface adopting above-mentioned revised current layer figure to be formed as exposure targeted graphical can surround metal plug completely.
Please refer to Figure 17 and Figure 18, Figure 17 is in another embodiment of the present invention, said method is adopted to carry out the overlapping figure of revised current layer figure and adjacent layer figure, Tu18Wei, the described analogue exposure figure of revised current layer figure and the overlapping figure of adjacent layer figure.
Described revised current layer figure is the exposure targeted graphical forming polysilicon gate, and adjacent layer figure is the mask pattern forming metal plug.
Wherein, the middle part width of the current layer spirte 510 in described revised current layer figure is greater than the width at two ends, and described adjacent layer spirte 601 and adjacent layer spirte 602 are positioned on described current layer spirte 510 completely.
The part length of side between adjacent layer spirte 601 and adjacent layer spirte 602 moved, described revised current layer spirte 510 is in can exposure area, and makes described metal plug be positioned at described current layer spirte 510 surface completely.
With reference to Figure 17, the analogue exposure figure 510a of described current layer spirte 510, higher with the dimensional homogeneity of the analogue exposure figure 520a of current layer spirte 520, edge is comparatively level and smooth, and described analogue exposure figure 520a surrounds described adjacent layer spirte 601 and 602, can guarantee that the polysilicon gate surface adopting above-mentioned revised current layer figure to be formed as exposure targeted graphical can surround metal plug completely.
In sum, in embodiments of the invention, first according to the spacing between graphic length, width and adjacent pattern, set up photoetching resolution restriction table, described photoetching resolution restriction table comprises can exposure area and can not exposure area; Then the bad selvedge in current layer figure is found out, the current layer spirte at described bad selvedge place is can not exposure figure, the current layer spirte at described bad selvedge place has the first width, between described bad selvedge and adjacent current layer spirte, there is the first spacing, what described first width and the first spacing were arranged in photoetching resolution restriction table can not exposure area, further, described bad selvedge or spacing crossing with adjacent layer spirte is less than preset value.
Then, by adding the cut-off be positioned at above and below adjacent layer spirte on described bad selvedge, bad selvedge is split as first line segment close or crossing with adjacent layer spirte, and away from the second line segment of described adjacent layer spirte, different photoetching resolution restriction tables is contrasted respectively for the first line segment and the second line segment, move, thus make revised current layer spirte enter in photoetching resolution restriction table can exposure area.Because the length of the first line segment is less, in the photoetching resolution restriction table corresponding with the length of the first line segment can exposure area be greater than in the first photoetching resolution restriction table can exposure area, so the minor increment that the distance of the first line segment movement is less than the second line segment movement just can enter can in exposure area, thus can to avoid or as far as possible the overlapping area reduced between adjacent layer spirte and current layer spirte changes, make the performance of semiconductor device adopting above-mentioned revised current layer figure to be formed as exposure targeted graphical can not be affected or affect not quite.
And, described cut-off lays respectively at above and below adjacent layer spirte, make the length of the nearest length of side of adjacent layer spirte middle distance first line segment or be less than the length of the first line segment with the length of the first line segment intersection, can avoid because alignment error causes overlapping area between adjacent layer spirte and current layer spirte to change in photoetching process, and the homogeneity of size of exposure figure corresponding to the first line segment can be improved.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (14)
1. an optical adjacent correction method, is characterized in that, comprising:
According to the spacing between graphic length, width and adjacent pattern, set up photoetching resolution restriction table, described photoetching resolution restriction table comprises can exposure area and can not exposure area;
There is provided current layer figure and adjacent layer figure, described current layer figure comprises some current layer spirtes, and described adjacent layer figure comprises some adjacent layer spirtes, and by described current layer figure and adjacent layer graphics overlay, forms overlapping figure;
Determine the bad selvedge in described current layer figure, the current layer spirte at described bad selvedge place is as the first positive spirte to be repaired, described first positive spirte to be repaired has the first width, between described bad selvedge and adjacent current layer spirte, there is the first spacing, what described first width and the first spacing were arranged in photoetching resolution restriction table can not exposure area, and, in overlapping figure, described bad selvedge or spacing crossing with part adjacent layer spirte is less than preset value, and described part adjacent layer spirte is as first-phase adjacent bed spirte;
Described bad selvedge adds cut-off, and described cut-off lays respectively at above and below first-phase adjacent bed spirte, and the part bad selvedge between described cut-off is as the first line segment, and the remainder of bad selvedge is as the second line segment;
Mobile described second line segment, make, between the relative edge of the second line segment in the first positive spirte to be repaired and the second line segment, there is the second width, have the second spacing between second line segment and adjacent current layer spirte, what described second width and the second spacing were arranged in photoetching resolution restriction table can exposure area;
According to the length of described first line segment, contrast photoetching resolution restriction table, first line segment is moved corresponding distance, make, between the relative edge of the first line segment in the first positive spirte to be repaired and the first line segment, there is the 3rd width, have the 3rd spacing between first line segment and adjacent current layer spirte, what described 3rd width and the 3rd spacing were arranged in the photoetching resolution restriction table corresponding to length of the first line segment can exposure area.
2. optical adjacent correction method according to claim 1, is characterized in that, described second width is less than the first width, and the 3rd width is greater than the second width.
3. optical adjacent correction method according to claim 1, is characterized in that, the vertical range between described cut-off and first-phase adjacent bed spirte is 0 ~ 100nm.
4. optical adjacent correction method according to claim 1, is characterized in that, described preset value is 30nm ~ 50nm.
5. optical adjacent correction method according to claim 1, is characterized in that, the spacing between described first line segment and adjacent layer spirte is 0 ~ 30nm.
6. optical adjacent correction method according to claim 1, it is characterized in that, the method for building up of described photoetching resolution restriction table comprises: provide mask pattern, described mask pattern has the spirte of some different in width and spacing, and described spirte is the lightproof area of mask pattern; Expose described mask pattern, obtain exposure figure, described exposure figure comprises some exposure spirtes; Using the spacing between the width of described exposure spirte and adjacent exposure spirte as horizontal ordinate and ordinate, set up photoetching resolution restriction table, what the width of described exposure spirte, the spacing between described exposure spirte and adjacent spirte were arranged in described photoetching resolution restriction table can exposure area, and the size area of all the other inchoate exposure figures be in photoetching resolution restriction table can not exposure area.
7. optical adjacent correction method according to claim 6, is characterized in that, according to the exposure spirte of different length, sets up different photoetching resolution restriction tables respectively.
8. optical adjacent correction method according to claim 6, is characterized in that, the width range of the exposure spirte of described photoetching resolution restriction table is 50nm ~ 6000nm, and the spacing between adjacent exposure spirte is 40nm ~ 300nm.
9. optical adjacent correction method according to claim 7, is characterized in that, the length range setting up the exposure spirte of described photoetching resolution restriction table is 50nm ~ 6000nm.
10. optical adjacent correction method according to claim 9, it is characterized in that, the quantity of described photoetching resolution restriction table is four, comprise: the first photoetching resolution restriction table, set up the first exposure spirte that described first photoetching resolution restriction table adopts and have the first length, described first length range is 1000nm ~ 6000nm; Second photoetching resolution restriction table, set up the second exposure spirte that described second photoetching resolution restriction table adopts and have the second length, described second length range is 500nm ~ 1000nm; 3rd photoetching resolution restriction table, set up the 3rd exposure spirte that described 3rd photoetching resolution restriction table adopts and have the 3rd length, described 3rd length range is 150nm ~ 500nm; Resolution restriction at 4th quarter table, set up the 4th exposure spirte that described resolution restriction at 4th quarter table adopts and have the 4th length, described 4th length range is 50nm ~ 150nm.
11. optical adjacent correction methods according to claim 10, it is characterized in that, the method of mobile described second line segment comprises: contrast the first photoetching resolution restriction table, second line segment is moved minor increment, make the second width between the relative edge of the second line segment in the first positive spirte to be repaired and the second line segment, the second spacing between second line segment and adjacent current layer spirte, what be arranged in the first photoetching resolution restriction table can exposure area.
12. optical adjacent correction methods according to claim 10, it is characterized in that, the method of mobile described first line segment comprises: according to the length of the first line segment, select corresponding photoetching resolution restriction table, the length of the exposure spirte that the photoetching resolution restriction table of described correspondence adopts is closest or identical with the length of described first line segment; What judge whether the length of described first line segment and the first width are arranged in described corresponding photoetching resolution restriction table can exposure area; Can exposure area if be positioned at, then keep described first line segment motionless; Can not exposure area if be positioned at, then contrast the photoetching resolution restriction table of described correspondence, the first line segment is moved minimum distance, the distance between the first line segment and adjacent current layer spirte is decreased to can in exposure area.
13. optical adjacent correction methods according to claim 1, it is characterized in that, also comprise: determine that treating in described figure revises limit, described waiting revises the current layer spirte at place, limit as the second positive spirte to be repaired, the width of described second positive spirte to be repaired and described in wait that the spacing revised between limit and adjacent current layer spirte is arranged in photoetching resolution restriction table can not exposure area.
14. optical adjacent correction methods according to claim 13, it is characterized in that, also comprise: wait described in mobile to revise limit, make the width of described second positive spirte to be repaired, described in wait to revise the spacing between limit and adjacent current layer spirte, what be arranged in photoetching resolution restriction table can exposure area.
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| CN112445059A (en) * | 2019-09-05 | 2021-03-05 | 中芯国际集成电路制造(上海)有限公司 | Optical proximity correction, photomask manufacturing and graphical method |
| CN110376843A (en) * | 2019-09-10 | 2019-10-25 | 墨研计算科学（南京）有限公司 | The modified method, apparatus of lithography mask optical and computer readable storage medium |
| CN112650020A (en) * | 2019-10-11 | 2021-04-13 | 中芯国际集成电路制造(上海)有限公司 | Method for correcting mask pattern |
| WO2022116586A1 (en) * | 2020-12-03 | 2022-06-09 | 无锡华润上华科技有限公司 | Optical proximity effect correction method and system and mask |
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