CN104749899B - Optical proximity correction method - Google Patents
Optical proximity correction method Download PDFInfo
- Publication number
- CN104749899B CN104749899B CN201310745648.7A CN201310745648A CN104749899B CN 104749899 B CN104749899 B CN 104749899B CN 201310745648 A CN201310745648 A CN 201310745648A CN 104749899 B CN104749899 B CN 104749899B
- Authority
- CN
- China
- Prior art keywords
- spirte
- exposure
- line segment
- adjacent
- width
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
The invention discloses an optical proximity correction method which is as follows: a photolithographic resolution limit table is established, and the photolithographic resolution limit table includes an exposable area and a non-exposable area; current layer and adjacent layer graphs are provided, and the current layer and adjacent layer graphs are overlapped to form an overlapping graph; a bad edge of the current layer graph is determined; cut-off points are added into the bad edge, the cut-off points are respectively located below or above a first adjacent layer sub graph, the bad edge part between the cut-off points is used as a first line segment, other bad edge part is used as a second line segment, and the second line segment is moved, so that a second width is formed between a second line segment relative edge in a first to-be-detected sub graph and the second line segment, a second distance is formed between the second line segment and an adjacent current layer sub graph, and the second width and the second distance are located in the exposable area in the photolithographic resolution limit table; and according to the length of the first line segment, the first line segment can be moved a corresponding distance. The influence on semiconductor device performances can be avoided.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly to a kind of optical adjacent correction method.
Background technology
Photoetching technique is a vital technology in semiconductor fabrication techniques, and it is capable of figure from mask
In transfer to silicon chip surface, form the semiconductor product meeting design requirement.In photo-etching technological process, first, by exposure
Step, light passes through the area illumination of printing opacity in mask to the silicon chip being coated with photoresist, and photochemical with photoresist generation
Learn reaction；Then, by development step, using the dissolution degree to developing agent for the photosensitive and not photosensitive photoresist, form photoetching
Pattern, realizes the transfer of mask pattern；Then, by etch step, based on the pattern that photoresist layer is formed, silicon chip is entered
Row etching, mask pattern is further transferred on silicon chip.
During forming mask plate patterns, usually according to the etched features ultimately forming, design photoresist layer
On exposure targeted graphical；Then further according to described exposure targeted graphical, being calculated by opc model is finally needed in mask
The figure being formed in version.
But due to there is optical proximity effect, the exposure capability of photoetching equipment is limited by photoetching resolution, for
It is smaller in size than the exposure targeted graphical of photoetching resolution, in actual exposure process, be shape on photoresist layer of having no idea
The one-tenth exposure figure equivalently-sized with this exposure targeted graphical.
So needing in the design phase, according to the resolution of photoetching equipment, exposure targeted graphical is suitably compensated,
Formation can expose targeted graphical, then forms suitable mask plate patterns according to the described targeted graphical that exposes.Prior art is led to
Often table can be limited by compareing the photoetching resolution of board, by reducing the width of exposure targeted graphical, and then increase adjacent exposure
Spacing between optical target figure makes the targeted graphical that can not expose be converted into exposing targeted graphical.
Described photoetching resolution restriction table is that different spacing figure, after being exposed, according to the exposure of figure to different in width
The form that light effect obtains, the width of exposure figure and adjacent exposure that the transverse and longitudinal coordinate of form is respectively formed on a photoresist
Spacing between light figure.Described photoetching resolution restriction table include can exposure area and can not exposure area, described expose
Region refers to the size range of exposure figure that can be formed on a photoresist；And can not figure in exposure area size model
Enclose, can not be formed on a photoresist.Prior art can be by reducing the width of exposure targeted graphical, can not exposure area
Interior exposure targeted graphical moves to can exposure area.
But, the change of exposure targeted graphical size can lead to subsequently be carved with described graphical photoresist layer for mask
There is certain deviation, the property of the semiconductor device that may ultimately form between the etched features size of erosion formation and design size
Can impact.
Content of the invention
The problem that the present invention solves is to provide a kind of method of optical proximity correction, it is to avoid the performance of semiconductor device is made
Become impact.
For solving the above problems, the present invention provides a kind of method of optical proximity correction, comprising: according to graphic length, width
Spacing between degree and adjacent pattern, sets up photoetching resolution restriction table, described photoetching resolution restriction table includes exposing
Region and can not exposure area；There is provided current layer pattern and adjacent layer pattern, described current layer pattern includes some current layers
Spirte, described adjacent layer figure includes some adjacent layer spirtes, and by described current layer pattern and adjacent layer pattern weight
Folded, form overlapping figure；Determine the bad selvedge in described current layer pattern, the current layer spirte that described bad selvedge is located is as first
Spirte to be modified, described first spirte to be modified has the first width, between described bad selvedge and adjacent current layer spirte
There is the first spacing, described first width and the first spacing be located at photoetching resolution limit in table can not exposure area, and,
In overlapping figure, described bad selvedge is intersected with part adjacent layer spirte or is smaller than preset value, described partly adjacent straton
Figure is as the first adjacent layer spirte；Cut-off is added on described bad selvedge, described cut-off is located at the first adjacent layer respectively
Above and below spirte, as the first line segment, the remainder of bad selvedge is as part bad selvedge between described cut-off
Two line segments；Mobile described second line segment, makes to have between the relative edge of second line segment and second line segment in the first spirte to be modified
There is the second width, there is between second line segment and adjacent current layer spirte the second spacing, described second width and the second spacing
Positioned at photoetching resolution limit table in can exposure area；According to the length of described first line segment, compare photoetching resolution and limit
Table, the distance that the first line segment mobile phase is answered, make in the first spirte to be modified the relative edge of the first line segment and the first line segment it
Between there is the 3rd width, there is between the first line segment and adjacent current layer spirte the 3rd spacing, described 3rd width and the 3rd
What spacing was located in the photoetching resolution restriction table corresponding to length of the first line segment can exposure area.
Optionally, described second width is less than the first width, and the 3rd width is more than the second width.
Optionally, the vertical dimension between described cut-off and the first adjacent layer spirte is 0～100nm.
Optionally, described preset value is 30nm～50nm.
Optionally, the spacing between described first line segment and adjacent layer spirte is 0～30nm.
Optionally, the method for building up of described photoetching resolution restriction table includes: provides mask pattern, on described mask pattern
There is the spirte of some different in width and spacing, described spirte is the lightproof area of mask pattern；To described mask pattern
It is exposed, obtains exposure figure, described exposure figure includes some exposure spirtes；With described exposure spirte width and
Spacing between adjacent exposure spirte, respectively as abscissa and vertical coordinate, sets up photoetching resolution restriction table, described exposure
Spacing between the width of spirte, described exposure spirte and adjacent spirte is located at described photoetching resolution and limits in table
Can exposure area, and the size area of the exposure figure that remaining does not form be photoetching resolution restriction table in can not exposure region
Domain.
Optionally, the exposure spirte according to different length, sets up different photoetching resolution restriction tables respectively.
Optionally, the width range that described photoetching resolution limits the exposure spirte of table is 50nm～6000nm, adjacent
Spacing between exposure spirte is 40nm～300nm.
Optionally, the length range setting up the exposure spirte of described photoetching resolution restriction table is 50nm～6000nm.
Optionally, the quantity of described photoetching resolution restriction table is four, comprising: the first photoetching resolution limits table, builds
The first exposure spirte that vertical described first photoetching resolution restriction table is adopted has the first length, described first length range
For 1000nm～6000nm；Second photoetching resolution limits table, set up that described second photoetching resolution restriction table adopted the
Two exposure spirtes have the second length, and described second length range is 500nm～1000nm；3rd photoetching resolution limits
Table, sets up the 3rd exposure spirte that described 3rd photoetching resolution restriction table adopted and has the 3rd length, the described 3rd is long
Degree scope is 150nm～500nm；4th quarter resolution limit table, set up that described 4th quarter resolution restriction table adopted the
Four exposure spirtes have the 4th length, and described 4th length range is 50nm～150nm.
Optionally, the method for mobile described second line segment includes: comparison first photoetching resolution limits table, by second line segment
Mobile minimum range, makes the second width between the relative edge of second line segment and second line segment in the first spirte to be modified, the
The second spacing between two line segments and adjacent current layer spirte, positioned at first photoetching resolution limit table in can exposure region
Domain.
Optionally, the method for mobile described first line segment includes: according to the length of the first line segment, selects corresponding photoetching to divide
Resolution limits table, the length of exposure spirte and described first line segment that described corresponding photoetching resolution restriction table is adopted
Length is closest or identical；Judge whether the length of described first line segment is located at described corresponding photoetching resolution with the first width
Limit table in can exposure area；If be located at described first line segment can be kept motionless in exposure area；If be located to expose
In region, then compare described corresponding photoetching resolution restriction table, by the first line segment minimum distance of movement, make the first line segment with
The distance between adjacent current layer spirte is decreased to can be in exposure area.
Optionally, the side to be modified in described figure, the current layer spirte that described side to be modified is located also are comprised determining that
As the second spirte to be modified, the width of described second spirte to be modified and described side to be modified and adjacent current straton
What the spacing between figure was located in photoetching resolution restriction table can not exposure area.
Optionally, also include: mobile described side to be modified, make the width of the described second spirte to be modified, described to be repaired
Positive spacing between side and adjacent current layer spirte, positioned at photoetching resolution limit in table can exposure area.
Compared with prior art, technical scheme has the advantage that
In technical scheme, initially set up photoetching resolution restriction table, described photoetching resolution restriction table includes
Can exposure area and can not exposure area；Then the bad selvedge in current layer pattern, the current layer subgraph that described bad selvedge is located are found out
Shape is the first figure to be modified, and what described first spirte to be modified was located in photoetching resolution limiting surface can not exposure region
Domain, and, described bad selvedge intersected with part adjacent layer spirte or is smaller than preset value.In technical scheme, lead to
Cross and add, on described bad selvedge, the cut-off being located above and below adjacent layer spirte, bad selvedge is split as and adjacent layer subgraph
The first close or intersecting line segment of shape, and the second line segment away from described adjacent layer spirte, for the first line segment and second
Line segment compares different photoetching resolution restriction tables respectively, moves, so that the first spirte to be modified enters photoetching dividing
Resolution limit table in can exposure area.Because the length of the first line segment is less, the photoetching corresponding with the length of the first line segment
Resolution limit in table can exposure area be more than the first photoetching resolution limit in table can exposure area, so the first line segment
The minimum range that the distance of movement is less than second line segment movement can be so that described first spirte entrance to be modified can exposure region
In domain, such that it is able to avoiding or reducing the change of the overlapping area between adjacent layer spirte and the first spirte to be modified as far as possible
Change, so that the performance of semiconductor device that the figure after being modified using said method is formed as exposure targeted graphical
It is unaffected or affects less.
Further, described cut-off is located above and below adjacent layer spirte respectively, makes adjacent layer spirte middle-range
From length or the length with length both less than first line segment of the first line segment intersection of the nearest length of side of the first line segment,
Can avoid in photoetching process because alignment error causes overlapping area between adjacent layer spirte and current layer spirte to occur
Change.
Brief description
Fig. 1 is to set up showing of the first exposure spirte that the first photoetching resolution restriction table adopts in embodiments of the invention
It is intended to；
Fig. 2 to Fig. 3 is to set up the second exposure subgraph that the second photoetching resolution restriction table adopts in embodiments of the invention
The schematic diagram of shape；
Fig. 4 is to set up showing of the 3rd exposure spirte that the 3rd photoetching resolution restriction table adopts in embodiments of the invention
It is intended to；
Fig. 5 is to set up showing of the 4th exposure spirte that the 4th photoetching resolution restriction table adopts in embodiments of the invention
It is intended to；
Fig. 6 to Fig. 8 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention；
Fig. 9 to Figure 12 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention；
Figure 13 to Figure 14 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention；
Figure 15 to Figure 16 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention；
Figure 17 to Figure 18 is the schematic diagram carrying out optical proximity correction of one embodiment of the present of invention.
Specific embodiment
As described in the background art, by changing the width of exposure targeted graphical, make described exposure targeted graphical from can not
Exposure figure become can exposure figure, the size after leading to material layer to be etched corresponding with this exposure targeted graphical to be etched with
There is certain deviation between design size, the performance of semiconductor device in chip may be impacted.
Research finds, using polysilicon layer as etachable material layer, during forming polysilicon gate, reduces etches polycrystalline
The width of the exposure target of silicon layer, can make the width of the polysilicon gate ultimately forming decline, thus leading to described polysilicon
The channel width of the transistor that grid is located declines, thus affecting the electrical parameters such as the saturation current of transistor, affects transistor
Performance；And originally should be formed by the metal plug of polysilicon gate surface encirclement completely, due to polysilicon gate width
Reduce, also can only partly be located at the surface of described polysilicon gate, the problems such as causing contact resistance to raise, leak electricity.
And, the continuous decline with semiconductor technology node, also can add and can expose in described exposure targeted graphical
Scatter graph, to improve process window.The spacing that this results between adjacent exposure target spirte further declines, and makes
Become needs to carry out optical proximity correction to more exposure target spirtes and carry out graph compensation, so that described exposure target
Figure can be formed on a photoresist, and the impact to performance of semiconductor device that this will make is more notable.So needing to find
One kind can either allow exposure targeted graphical become can exposure figure, can try one's best does not affect the optical adjacent of performance of semiconductor device again
Modification method.
In embodiments of the invention, by segment processing is carried out to the bad selvedge of current layer pattern, can either will can not expose
Current layer spirte be changed into can exposure figure, can not affect using described current layer pattern as exposure targeted graphical institute shape again
The performance of the semiconductor device becoming.
Understandable for enabling the above objects, features and advantages of the present invention to become apparent from, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
First, according to the spacing between graphic length, width and adjacent pattern, photoetching resolution restriction table, institute are set up
Stating that photoetching resolution restriction table includes can exposure area and can not exposure area.
Specifically, the method for building up of described photoetching resolution restriction table includes: provides mask pattern, on described mask pattern
There is the spirte of some different in width and spacing, described spirte is the lightproof area of mask pattern；To described mask pattern
It is exposed, obtains exposure figure, described exposure figure includes some exposure spirtes；With described exposure spirte width and
Spacing between adjacent exposure spirte, respectively as abscissa and vertical coordinate, sets up photoetching resolution restriction table, described exposure
Spacing between the width of spirte, described exposure spirte and adjacent spirte is located at described photoetching resolution and limits in table
Can exposure area, and the size area of the exposure figure that remaining does not form be photoetching resolution restriction table in can not exposure region
Domain.
The width range that described photoetching resolution limits the exposure spirte of table is 50nm～6000nm, adjacent exposure subgraph
Spacing between shape is 40nm～300nm.
And, the exposure spirte according to different length, sets up different photoetching resolution restriction tables respectively, set up described
The length range that photoetching resolution limits the exposure spirte of table is 50nm～6000nm.
In the present embodiment, set up photoetching resolution restriction table taking the exposure targeted graphical carrying out polysilicon layer etching as a example
In exposure spirte be all strip figure.In the present embodiment, set up altogether 4 not according to the different length of exposure spirte
Same photoetching resolution limits table.
Refer to Fig. 1, Fig. 1 is the first exposure set up in the first exposure figure that the first photoetching resolution restriction table is adopted
The schematic diagram of light spirte.
Described first exposure spirte 101 has width l1, and the spacing between adjacent first exposure spirte 101 is s1,
Described first exposure spirte 101 has the first height h1.The scope of described width l1 is 50～6000nm, described distance s 1
Scope is 40nm～300nm, and the scope of described first height h1 is 1000nm～6000nm.In described first exposure figure not
Can have different width l1 and distance s 1 with the first exposure spirte.
According to described first exposure figure, with the width l1 of the described first exposure spirte and adjacent first exposure spirte
Between distance s 1 respectively as abscissa and vertical coordinate, set up the first photoetching resolution restriction table according to exposure results, please join
Examine table 1.
Table 1 first photoetching resolution limits table
In the present embodiment, described first photoetching resolution limits the first exposure in the first exposure figure adopting in table
The length of figure is 2000nm, and width l1 scope is 40nm～100nm, distance s 1 scope between adjacent first exposure spirte
For 50nm～200nm.In other embodiments of the invention, can also set up that scope of data is wider, finer the first photoetching
Resolution limits table.
In table 1, digital " 1 " representative " can expose ", digital " 0 " represents " can not expose ".As can be seen from Table 1, with
Become larger away from s1, and width l1 tapers into, can not gradually become can exposure area for exposure area.
Refer to Fig. 2, Fig. 2 is the second exposure set up in the second exposure figure that the second photoetching resolution restriction table is adopted
The schematic diagram of light spirte.
Described second exposure spirte 201 has width l2, and the spacing between adjacent second exposure spirte 201 is s2,
Described second exposure spirte 201 has the second height h2.In other embodiments of the invention, described second exposure spirte
Can also be as shown in institute in Fig. 3.The Breadth Maximum of described second exposure spirte is l2, has the part the of Breadth Maximum part
Two exposure spirte 201a length are h2, and the spacing between Breadth Maximum part and the adjacent second exposure spirte is s2.
The scope of described width l2 is 50～6000nm, and the scope of described distance s 2 is 40nm～300nm, and described second is high
The scope of degree h2 is 500nm～1000nm.There is in described second exposure figure the second exposure of some different in width, different spacing
Light spirte.
According to described second exposure figure, with the width l2 of the described second exposure spirte and adjacent second exposure spirte
Between distance s 2 respectively as abscissa and vertical coordinate, set up the second photoetching resolution restriction table according to exposure results, please join
Examine table 2.
Table 2 second photoetching resolution limits table
In the present embodiment, described second photoetching resolution limits the second exposure in the second exposure figure adopting in table
The length of figure is 600nm, and width l2 scope is 40nm～100nm, distance s 2 scope between adjacent second exposure spirte
For 50nm～200nm.In other embodiments of the invention, can also set up that scope of data is wider, finer the second photoetching
Resolution limits table.
In table 2, digital " 1 " representative " can expose ", digital " 0 " represents " can not expose ".Due to setting up what described table 2 adopted
Length h2 of described second exposure spirte 201 is less than to be set up the first exposure spirte 101(that table 1 adopted and refer to Fig. 1)
Length h1, as can be seen from Table 2, described second photoetching resolution limit table in can exposure area scope be more than the first photoetching
Resolution limit table in can exposure area.
Refer to Fig. 4, Fig. 4 is the 3rd exposure set up in the 3rd exposure figure that the 3rd photoetching resolution restriction table is adopted
The schematic diagram of light spirte.
The 3rd exposure spirte 301 in described 3rd exposure figure has width l3, adjacent 3rd exposure spirte 301
Between spacing be s3, described 3rd exposure spirte 301 there is third height h3.
The scope of described width l3 is 50～6000nm, and the scope of described distance s 3 is 40nm～300nm, described three-hypers
The scope of degree h3 is 150nm～500nm.There is in described 3rd exposure figure the 3rd exposure of some different in width, different spacing
Light spirte.
According to the 3rd exposure figure, with the width l3 of the described 3rd exposure spirte 301 and adjacent 3rd exposure spirte
Distance s 3 between 301, respectively as abscissa and vertical coordinate, set up the 3rd photoetching resolution restriction table according to exposure results, please
Reference table 3.
Table 3 the 3rd photoetching resolution limits table
In the present embodiment, described 3rd photoetching resolution limits the 3rd exposure in the 3rd exposure figure adopting in table
The length of figure is 300nm, and the width l3 scope of the 3rd exposure spirte is 40nm～100nm, adjacent 3rd exposure spirte
Between distance s 3 scope be 50nm～200nm.In other embodiments of the invention, scope of data can also be set up wider,
The 3rd finer photoetching resolution limits table.
In table 3, digital " 1 " representative " can expose ", digital " 0 " represents " can not expose ".By setting up the institute that table 3 is adopted
State the 3rd exposure spirte 301 length h3 be less than set up the second exposure spirte 201(that table 2 adopted and refer to Fig. 2)
Length h2, as can be seen from Table 3, can exposure area scope divide more than the second photoetching in described 3rd photoetching resolution restriction table
Resolution limit table in can exposure area.
Refer to Fig. 5, Fig. 5 is the spirte set up in the 4th exposure figure that the 4th photoetching resolution restriction table is adopted
Schematic diagram.
The 4th exposure spirte 401 in described 4th exposure figure has width l4, adjacent 4th exposure spirte 401
Between spacing be s4, described 4th exposure spirte 401 there is the 4th height h4.The scope of described width l4 be 50～
6000nm, the scope of described distance s 4 is 40nm～300nm, and the scope of described 4th height h4 is 50nm～150nm.Described
There is in four exposure figures the 4th exposure spirte of some different in width, different spacing.According to described 4th exposure figure, with
Distance s 4 between the width l4 of described 4th exposure spirte and adjacent 4th exposure spirte respectively as abscissa and are indulged
Coordinate, sets up the 4th photoetching resolution restriction table according to exposure results, refer to table 4.
Table 4 the 4th photoetching resolution limits table
In the present embodiment, described 4th photoetching resolution limits the 4th exposure in the 4th exposure figure adopting in table
Length h4 of figure is 100nm, and the width l4 scope of the 4th exposure spirte is 40nm～100nm, adjacent 4th exposure subgraph
Distance s 4 scope between shape is 50nm～200nm.In other embodiments of the invention, scope of data can also be set up more
Extensively, the 4th finer photoetching resolution limits table.
In table 4, digital " 1 " representative " can expose ", digital " 0 " represents " can not expose ".Due to setting up employing described in table 4
Length h4 of described 4th exposure spirte 401 is less than to be set up the 3rd exposure spirte 301(that table 3 adopted and refer to Fig. 4)
Length h3, as can be seen from Table 4, described 4th photoetching resolution limit table in can exposure area scope be more than the 3rd photoetching
Resolution limit table in can exposure area.
In embodiments of the invention, establish altogether aforementioned four photoetching resolution restriction table, other in the present invention are real
Apply in example, can also be different according to the length of exposure figure, set up greater number of photoetching resolution restriction table, make follow-up light
Learn the neighbouring effect revised more preferable.
Refer to Fig. 6, current layer pattern and adjacent layer pattern are provided, described current layer pattern includes some current stratons
Figure, described adjacent layer figure includes some adjacent layer spirtes, and by described current layer pattern and adjacent layer graphics overlay,
Form overlapping figure.
In the present embodiment, described current layer pattern includes current layer spirte 110 and current layer spirte 120, described
Current layer pattern is etches polycrystalline silicon layer corresponding exposure targeted graphical, described current layer spirte 110 and current layer spirte
120 is the figure of polysilicon gate.So, the length of the current layer spirte in described current layer pattern is longer, Ke Yishi
2000nm～6000nm.
In the present embodiment, described adjacent layer pattern includes adjacent layer spirte 200, and described adjacent layer pattern is to form gold
Belong to the exposure targeted graphical of connector, described metal plug is formed at the surface of polysilicon gate.
Figure as shown in Figure 6, described adjacent layer subgraph will be formed after described current layer pattern and adjacent layer graphics overlay
Shape 200 is located at the surface of current layer spirte 110.
Determine the bad selvedge in described current layer pattern, the current layer spirte that described bad selvedge is located is as the first positron to be repaired
Figure, described first spirte to be modified has the first width, has first between described bad selvedge and adjacent current layer spirte
Spacing, described first width and the first spacing be located at photoetching resolution limit in table can not exposure area, and, in overlay chart
In shape, described bad selvedge is intersected with part adjacent layer spirte or is smaller than preset value, described part adjacent layer spirte conduct
First adjacent layer spirte.In the present embodiment, described preset value is 50nm.
In the present embodiment, in described current layer pattern, the first width l11 of current layer spirte 110 is 80nm, described works as
The first distance s 11 between front layer spirte 110 and adjacent current layer spirte 120 are 120nm, the shown in synopsis 1
One photoetching resolution limit table, described current layer spirte 110 be located at described first photoetching resolution can not exposure area, need
Described current layer spirte 110 is modified.And, the length of side 111 of described current layer spirte 110 is apart from described adjacent
Spacing d1 between straton figure 200 is less than preset value 50nm for 10nm, so the described length of side 111 is described current layer spirte
110 bad selvedge 111, described current layer spirte 110 is the first spirte to be modified, and described adjacent layer spirte 200 is first
Adjacent layer spirte.The size of described preset value determines, resolution is higher according to the exposure resolution ratio of photoetching equipment, described default
Value is less；Resolution is lower, and described preset value is higher.In other embodiments of the invention, the size of described preset value is permissible
For 30nm～50nm.In embodiments of the invention, the spacing between described bad selvedge 111 and adjacent layer spirte is 0～30nm, little
In described preset value.
Refer to Fig. 7, described bad selvedge 111 adds cut-off a and cut-off b, described cut-off a and cut-off b divide
Wei Yu not be above and below adjacent layer spirte 200, part bad selvedge 111 between described cut-off a and cut-off b is as
One line segment a, the remainder of bad selvedge 111 is as second line segment b.
In view of the dimensional homogeneity of the first line segment a in the alignment error in photoetching process, and raising exposure figure, institute
Stating vertical dimension between cut-off a, cut-off b and the first adjacent layer spirte 200 is 0～100nm it is ensured that described adjacent layer
In spirte 200, the length apart from the nearest length of side of First Line section a is less than or equal to the length of the first line segment a, preferably, described
In adjacent layer spirte 200, the length apart from the nearest length of side of First Line section a is less than the length of the first line segment a.In the present embodiment,
Vertical dimension between described point of contact a, point of contact c distance and adjacent layer spirte 200 is 30nm, the length of described first line segment a
For 100nm.In other embodiments of the invention, the vertical interval between described first line segment a and the first adjacent layer spirte
For 0～30nm.
Refer to Fig. 8, mobile described second line segment b, make the relative edge of second line segment in described current layer spirte 110
There is between 112 and second line segment b the second width l12, between second line segment b and adjacent current layer spirte 120, have second
What distance s 12, described second width l12 and the second distance s 12 were located in photoetching resolution restriction table can exposure area.Described
Two width l12 are less than the first width l11, and the second spacing is more than the first spacing.
Specifically, in the present embodiment, the method for mobile described second line segment b includes: comparison first photoetching resolution limits
Table (table 1), second line segment b is moved minimum range c1, makes the relative edge 112 of second line segment b in described current layer spirte 110
The second distance s 12 between the second width l12 between second line segment b, second line segment b and adjacent current layer spirte 120
Being located at can be in exposure area；And the distance between described first line segment a and relative edge 112 are still the first width l11, the first line segment
The distance between a and current layer spirte 120 are the first distance s 11.Described minimum range c1 is more than 0.
Because described current layer spirte 110(refer to Fig. 7) the first width l11 be 80nm, the first distance s 11 are
120nm, positioned at the first photoetching resolution limit in table (table 1) can not exposure area, immediate with this position can exposure region
The width in domain is 60nm, and spacing is 120nm or width 70nm, spacing are 140nm, so, mobile described second line segment b is
Small distance c1 is 20nm, makes the second width l12 having between the relative edge 112 of described second line segment b and second line segment b be
60nm, and the second distance s 12 between described second line segment b and current layer spirte 120 are 140nm, described second width l12
With the second distance s 12 be located at described first photoetching resolution limit in table (table 1) can exposure area.
Refer to Fig. 8, according to the length of described first line segment a, compare photoetching resolution and limit table, mobile accordingly away from
From, make to have the 3rd width between the relative edge 112 of the first line segment a in described current layer spirte and the first line segment a, first
Between line segment a and adjacent current layer spirte, 120 have the 3rd spacing, and described 3rd width and the 3rd spacing are located at the first line segment
Photoetching resolution corresponding to length limit in table can exposure area, formation can expose current layer spirte 110a.Described
3rd width is less than the first width, and is more than the second width；Described 3rd spacing is more than the first spacing, and is less than between second
Away from.
Specifically, the method for mobile described first line segment a includes: according to the length of the first line segment a, selects corresponding photoetching
Resolution limits table, the length of exposure spirte and described first line segment that described corresponding photoetching resolution restriction table is adopted
The length of a is closest or identical；Judge whether the length of described first line segment a is divided positioned at described corresponding photoetching with the first width
Resolution limit table in can exposure area；Described described first line segment can be kept motionless in exposure area if being located at；If being located at
Described corresponding photoetching resolution restriction table can not then be compareed in exposure area, distance minimum for the first line segment a movement makes
In current layer spirte, be decreased to can be in exposure area for the distance between the relative edge of the first line segment and first line segment.
In the present embodiment, the length of described first line segment a is 100nm, so selecting the 4th photoetching resolution to limit table (table
4) the most corresponding photoetching resolution limits table, and described 4th photoetching resolution limits the length of the 4th exposure spirte that table adopts
Spend for 100nm identical with the length of described first line segment a it is possible to preferably reflect, described first line segment a be located portion
Divide the exposure status of current layer spirte.
First width l11 of the part current layer spirte that described first line segment a is located is 80nm, described first line segment a
The first distance s 11 between adjacent current layer spirte 120 are 120nm, are placed exactly in described 4th photoetching resolution and limit
In table (table 4) can exposure area it is possible to keep described first line segment a motionless so that described adjacent layer spirte 200 according to
Old be fully located at the described revised surface exposing current layer spirte 110a, do not interfere with using above-mentioned figure conduct
The performance of the semiconductor device that exposure targeted graphical is formed.
In other embodiments of the invention, described first line segment a the first width l11 between side 112 corresponding thereto, with
And first the first distance s 11 between line segment a and adjacent current layer spirte 120 may be located at photoetching resolution and limit in table
Can not exposure area, described first line segment a can be moved, make described first width l11 reduce, make described first line segment a institute
Part current layer spirte may be located at can be in exposure area.Because the length of the first line segment a is less, with the first line segment a
The corresponding photoetching resolution restriction table of length in can be more than exposing in the first photoetching resolution restriction table in exposure area
Light region, so the distance of the first line segment a movement is less than minimum range c1 of second line segment b movement, and just can enter can exposure region
In domain.
Prior art typically adopts the moving method of second line segment b, carries out overall shifting to the first line segment a and second line segment b
Dynamic, thus it is larger that the overlapping area between the first figure to be modified that adjacent layer spirte and described bad selvedge are located can be led to occur
Change, leads to the performance of the follow-up semiconductor device being formed as exposure target using described revised first figure to be modified to become
Difference.And in the present embodiment, described bad selvedge is carried out with segment processing, make First Line that is close with the first adjacent layer spirte or intersecting
The distance of Duan Yidong is less, thus avoid or reduce between the first adjacent layer spirte and described first figure to be modified as far as possible
The change of overlapping area, thus reduce the impact to the performance of semiconductor device being subsequently formed.
In other embodiments of the invention, in described current layer pattern, also there is side to be modified, described side institute to be modified
The width of current layer spirte, the spacing between side to be modified and adjacent current layer spirte be located at the first photoetching resolution
Limit table in can not exposure area.The current layer spirte that described side to be modified is located is as the second spirte to be modified.
Using with above-described embodiment in, the method for mobile second line segment, described side to be modified is moved, after making correction
The width of the second figure to be modified, the spacing between described side to be modified and adjacent current layer spirte, differentiate positioned at photoetching
Rate limit table in can exposure area.
In another embodiment of the invention, give the optical adjacent correction method in the case of another kind.
Refer to Fig. 9, current layer pattern and adjacent layer pattern are provided, described current layer pattern includes some current stratons
Figure, described adjacent layer figure includes some adjacent layer spirtes, and by described current layer pattern and adjacent layer graphics overlay,
Form overlapping figure.
In the present embodiment, described current layer pattern includes current layer spirte 210 and current layer spirte 220, described
Current layer pattern is etches polycrystalline silicon layer corresponding exposure targeted graphical, described current layer spirte 210 and current layer spirte
220 is the figure of polysilicon gate.So, the length of the spirte in described current layer pattern is longer, can be 2000nm～
6000nm.
In the present embodiment, described adjacent layer pattern includes adjacent layer spirte 300, and described adjacent layer pattern is to be formed with
The exposure targeted graphical of source region, described active area is formed at the lower section of polysilicon gate.
Form overlapping figure as shown in Figure 10, described adjacent layer by after described current layer pattern and adjacent layer graphics overlay
Spirte 300 is located at the lower section of current layer spirte 210, described current layer spirte 210 phase vertical with adjacent layer spirte 300
Hand over.
Determine the bad selvedge in described current layer pattern, the current layer spirte that described bad selvedge is located is as the first positron to be repaired
Figure, described first spirte to be modified has the first width, has first between described bad selvedge and adjacent current layer spirte
Spacing, described first width and the first spacing be located at photoetching resolution limit in table can not exposure area, and, in overlay chart
In shape, described bad selvedge is intersected with part adjacent layer spirte or is smaller than preset value, described part adjacent layer spirte conduct
First adjacent layer spirte.
In the present embodiment, in described current layer pattern, the first width l21 of described current layer spirte 210 is 90nm, institute
The first distance s 21 stated between current layer spirte 210 and adjacent current layer spirte 220 are 120nm, shown in synopsis 1
First photoetching resolution limit table, described current layer spirte 210 be located at described first photoetching resolution can not exposure region
Domain, needs described current layer spirte is modified, and near current layer spirte in described current layer spirte 210
220 length of side 211 is intersected with described adjacent layer spirte 300, so the described length of side 211 is described current layer spirte 110
Bad selvedge 211, described current layer spirte 110 is the first spirte to be modified, and described adjacent layer spirte 300 is the first adjacent layer
Spirte.
Refer to Figure 10, described bad selvedge 211 adds cut-off d and cut-off e, described cut-off d and cut-off e divide
Wei Yu not be above and below adjacent layer spirte 300, part bad selvedge 211 between described cut-off d and cut-off e is as
One line segment c, the remainder of bad selvedge 211 is as second line segment d.
In view of the dimensional homogeneity of the first line segment c in the alignment error in photoetching process, and raising exposure figure, institute
Stating vertical dimension between cut-off d, cut-off e and adjacent layer spirte 300 is 0～100nm it is ensured that described adjacent layer subgraph
The length intersecting with bad selvedge in shape 300 is less than or equal to the length of the first line segment c, preferably, in described adjacent layer spirte 300
The length intersecting with bad selvedge is less than the length of the first line segment c.In the present embodiment, described point of contact d, point of contact e distance and adjacent straton
Vertical dimension between figure 300 is 60nm, and the width of described adjacent layer spirte 300 is 150nm, so described first line segment
The length of c is 270nm.
Refer to Figure 11, mobile described second line segment d, make described current layer spirte 210(refer to Figure 10) become and work as
Front layer spirte 210a, has second between the relative edge 212 of second line segment d and second line segment d in current layer spirte 210a
Width l22, has the second distance s 22, described second width l22 and between second line segment d and adjacent current layer spirte 220
What two distance s 22 were located in the first photoetching resolution restriction table can exposure area.Second width little with the first width, the second spacing
More than the first spacing.
Specifically, in the present embodiment, the method for mobile described second line segment d includes: comparison first photoetching resolution limits
Table (table 1), second line segment d is moved minimum range c2, makes the relative edge 212 of second line segment d in described current layer spirte 210
The second width l22 and second line segment d between is located at can be in exposure area；And between described first line segment c and relative edge 212
Distance is still the first width l21, and the distance between the first line segment c and adjacent current layer spirte 220 are the first distance s 21.Institute
State minimum range c2 and be more than 0.
Because described current layer spirte 210(refer to Figure 10) the first width l21 be 90nm, the first distance s 21 are
120nm, positioned at the first photoetching resolution limit in table (table 1) can not exposure area, immediate with this position can exposure region
The width in domain is 60nm, and spacing is 120nm；Or width 70nm, spacing are 140nm；Or width is 80nm, spacing is
160nm.So, minimum range c2 of mobile described second line segment d is 20nm, forms current layer spirte 210a, described current
The second width l22 having between the relative edge 212 of second line segment d in straton figure 210a and second line segment d is 70nm, and
The second distance s 22 between described second line segment d and current layer spirte 220 are 140nm, described second width l22 and second
What distance s 22 were located in described first photoetching resolution restriction table (table 1) can exposure area.
Refer to Figure 12, according to the length of described first line segment c, compare photoetching resolution and limit table, mobile accordingly away from
From, formation current layer spirte 210b, make the relative edge 212 and first of the first line segment c in described current layer spirte 210b
There is between line segment c the 3rd width l23, there is between the first line segment c and adjacent current layer spirte 220 the 3rd distance s 23, institute
State the 3rd width l23 and the 3rd distance s 23 exposing in the photoetching resolution restriction table corresponding to length of the first line segment c
Light region.
In the present embodiment, the length of described first line segment c is 270nm, so selecting the 3rd photoetching resolution to limit table (table
3) the most corresponding photoetching resolution limits table, and described 3rd photoetching resolution limits the length of the 3rd exposure spirte that table adopts
Spend for 300nm, with the length of described first line segment c closest to it is possible to preferably reflect what described first line segment c was located
The exposure status of part current layer spirte.
Described first line segment c be located part current layer spirte 210(refer to Figure 11) the first width l21(please join
Examine Figure 11) it is 90nm, described first line segment c refer to Figure 11 with the first distance s 21(between adjacent current layer spirte 220)
For 120nm, positioned at described 3rd photoetching resolution limit in table (table 3) can not exposure area, so needing movement described the
One line segment c, so that the distance between relative edge 212 and first line segment c of the first line segment c is decreased to can be in exposure area.
Described 3rd photoetching resolution limit table in, apart from described width be 90nm, spacing be 120nm can not exposure region
What domain was nearest can the width of exposure area be 80nm, and spacing is 120nm, or width 90nm, spacing 140nm.So, mobile institute
Minimum range d1 stating the first line segment c is 10nm so that having the 3rd width between described first line segment c and relative edge 212
Between l23, l23=80nm, and described first line segment c and adjacent current layer spirte 220, there are the 3rd distance s 23, s23=
130nm, be described current layer spirte 210b be located at described 3rd photoetching resolution restriction table in can exposure area.3rd is wide
Degree is less than the first width, and is more than the second width；3rd spacing is more than the first spacing, and is less than the second spacing.
Described first line segment c movement apart from d1=10nm, and the movement of second line segment d apart from c2=20nm, the first line segment c
The distance of movement is less than the distance of second line segment d movement.This is because, the length of the first line segment c is shorter, mobile first line segment c
Referenced 3rd photoetching resolution limit in table (table 3) can reference when being more than mobile second line segment d of exposure area scope
First photoetching resolution limit in table (table 1) can exposure area scope, so can by mobile for the first line segment d less distance
With enter can exposure area so that between described current layer spirte 210b and adjacent layer spirte 300 overlapping area change
Less, to the performance of the semiconductor device subsequently adopting above-mentioned current layer spirte 210b to be formed as exposure targeted graphical shadow
Sound is less.
And in prior art, usually using the method for mobile second line segment d, by larger for the movement of whole bad selvedge 211 away from
From c2 so that the overlapping area between revised current layer spirte and adjacent layer spirte changes greatly, and to follow-up shape
The performance of the semiconductor device becoming can produce large effect.
In the other embodiment of the present invention, described current layer pattern can also be the exposure targeted graphical of other materials layer,
For example: metal level, active region layer or dielectric layer etc..
Refer to Figure 13 and Figure 14, Figure 13 is in another embodiment of the present invention, after being modified using said method
Current layer pattern and the overlapping figure of adjacent layer pattern, Tu14Wei, carry out opc according to the revised current layer pattern in Figure 13
Form mask pattern after simulation, then more described mask pattern is simulated after exposure the analogue exposure figure that obtains with adjacent
The overlapping figure of layer pattern.
Described current layer pattern is the exposure targeted graphical forming polysilicon gate, and adjacent layer pattern is to form active area
Exposure targeted graphical.
Wherein, current layer spirte 310 both sides in described current layer pattern are respectively provided with current layer spirte 320, and,
Described current layer spirte 310 be can not exposure figure, so, described current layer spirte 210 has relative bad selvedge 311 He
Bad selvedge 312, using the method in above-described embodiment, all carries out segmentation correction to described bad selvedge 311 and bad selvedge 312, make described in repair
Current layer spirte 310 after just become can exposure figure, and, make described current layer spirte 310 and adjacent layer spirte
Overlapping area between 400 changes less.
Revised current layer pattern is simulated by opc and obtains mask pattern, then mould is carried out to described mask pattern
Intend exposure, in the analogue exposure figure of acquisition, the pattern edge of described simulation figure 310a is smoother, and the size uniform of figure
Property is higher.And described analogue exposure figure 310a and the width at adjacent layer spirte 400 lap position do not change substantially.
Refer to Figure 15 and Figure 16, Figure 15 is in another embodiment of the present invention, after being modified using said method
Current layer pattern and the overlapping figure of adjacent layer pattern, Tu16Wei, carry out opc according to the revised current layer pattern in Figure 15
Form mask pattern after simulation, then more described mask pattern is simulated after exposure the analogue exposure figure that obtains with adjacent
The overlapping figure of layer pattern.
Wherein, revised current layer pattern is the exposure targeted graphical forming polysilicon gate, and adjacent layer pattern is shape
Become the exposure simulation figure of metal plug.
Revised current layer spirte 410 side has another current layer spirte 420, and revised current layer
Overlapping area between spirte 410 and adjacent layer spirte 500 does not change.
Analogue exposure figure 410a dimensional homogeneity is higher, and edge is more smooth, and described analogue exposure figure 410a
Surround described adjacent layer spirte 500 it can be ensured that adopting above-mentioned revised current layer pattern as exposure targeted graphical shape
The polysilicon gate surface becoming can surround metal plug completely.
Refer to Figure 17 and Figure 18, Figure 17 is in another embodiment of the present invention, after being modified using said method
Current layer pattern and the overlapping figure of adjacent layer pattern, Tu18Wei, the analogue exposure figure of described revised current layer pattern
Overlapping figure with adjacent layer pattern.
Described revised current layer pattern is the exposure targeted graphical forming polysilicon gate, and adjacent layer pattern is to be formed
The mask pattern of metal plug.
Wherein, the middle part width of the current layer spirte 510 in described revised current layer pattern is more than the width at two ends
Spend, and described adjacent layer spirte 601 and adjacent layer spirte 602 are fully located on described current layer spirte 510.
The part length of side between adjacent layer spirte 601 and adjacent layer spirte 602 is moved, after making described correction
Current layer spirte 510 be in can exposure area, and also make described metal plug be fully located at described current layer subgraph
Shape 510 surface.
With reference to Figure 17, the analogue exposure figure 510a of described current layer spirte 510, the mould with current layer spirte 520
The dimensional homogeneity intending exposure figure 520a is higher, and edge is more smooth, and described analogue exposure figure 520a encirclement is described
Adjacent layer spirte 601 and 602 is it can be ensured that adopt above-mentioned revised current layer pattern to be formed as exposure targeted graphical
Polysilicon gate surface can surround metal plug completely.
In sum, in embodiments of the invention, first according between graphic length, width and adjacent pattern
Away from setting up photoetching resolution restriction table, described photoetching resolution restriction table includes can exposure area and can not exposure area；Then
Find out the bad selvedge in current layer pattern, the current layer spirte that described bad selvedge is located be can not exposure figure, described bad selvedge is located
Current layer spirte there is the first width, there is between described bad selvedge and adjacent current layer spirte the first spacing, described
One width and the first spacing be located at photoetching resolution limit in table can not exposure area, and, described bad selvedge and adjacent straton
Figure intersects or is smaller than preset value.
Then, by adding, on described bad selvedge, the cut-off being located above and below adjacent layer spirte, bad selvedge is torn open
It is divided into the first line segment that is close with adjacent layer spirte or intersecting, and the second line segment away from described adjacent layer spirte, right
Compare different photoetching resolution restriction tables respectively in the first line segment and second line segment, move, so that revised work as
Front layer spirte enter photoetching resolution limit table in can exposure area.Because the length of the first line segment is less, with First Line
The corresponding photoetching resolution of length of section limit in table can exposure area be more than the first photoetching resolution limit in table can
Exposure area, so the distance of the first line segment movement is less than the minimum range of second line segment movement, and just can enter can exposure area
Interior, produce change such that it is able to avoiding or reducing the overlapping area between adjacent layer spirte and current layer spirte as far as possible, make
Shadow must will not be subject to using the performance of semiconductor device that above-mentioned revised current layer pattern is formed as exposure targeted graphical
Ring or impact is little.
And, described cut-off is located above and below adjacent layer spirte respectively, makes distance in adjacent layer spirte
The length of the nearest length of side of the first line segment or the length being less than the first line segment with the length of the first line segment intersection are permissible
Avoid because alignment error causes overlapping area between adjacent layer spirte and current layer spirte to change in photoetching process,
And also the uniformity of the size of the corresponding exposure figure of the first line segment can be improved.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, without departing from this
In the spirit and scope of invention, all can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope limiting is defined.
Claims (14)
1. a kind of optical adjacent correction method is it is characterised in that include:
According to the spacing between graphic length, width and adjacent pattern, set up photoetching resolution restriction table, described photoetching is differentiated
Rate restriction table includes can exposure area and can not exposure area；
There is provided current layer pattern and adjacent layer pattern, described current layer pattern includes some current layer spirtes, described adjacent
Layer pattern includes some adjacent layer spirtes, and by described current layer pattern and adjacent layer graphics overlay, forms overlapping figure；
Determine the bad selvedge in described current layer pattern, the current layer spirte that described bad selvedge is located is as the first subgraph to be modified
Shape, described first spirte to be modified has the first width, has between first between described bad selvedge and adjacent current layer spirte
Away from, described first width and the first spacing be located at photoetching resolution limit in table can not exposure area, and, in overlapping figure
In, described bad selvedge is intersected with part adjacent layer spirte or is smaller than preset value, and described part adjacent layer spirte is as
One adjacent layer spirte；
Cut-off is added on described bad selvedge, described cut-off is located above and below the first adjacent layer spirte respectively, institute
State part bad selvedge between cut-off as the first line segment, the remainder of bad selvedge is as second line segment；
Mobile described second line segment, makes to have between the relative edge of second line segment and second line segment the in the first spirte to be modified
Two width, have the second spacing between second line segment and adjacent current layer spirte, described second width and the second spacing are located at
Photoetching resolution limit table in can exposure area；
According to the length of described first line segment, compare photoetching resolution and limit table, the distance that the first line segment mobile phase is answered, make the
There is between the relative edge of the first line segment and the first line segment in one spirte to be modified 3rd width, the first line segment is current with adjacent
There is between straton figure the 3rd spacing, described 3rd width and the 3rd spacing are located at the photoetching corresponding to length of the first line segment
Resolution limit table in can exposure area.
2. optical adjacent correction method according to claim 1 is it is characterised in that described second width is less than the first width
Degree, the 3rd width is more than the second width.
3. optical adjacent correction method according to claim 1 is it is characterised in that described cut-off straton adjacent with first
Vertical dimension between figure is 0～100nm.
4. optical adjacent correction method according to claim 1 is it is characterised in that described preset value is 30nm～50nm.
5. optical adjacent correction method according to claim 1 is it is characterised in that described first line segment and adjacent layer subgraph
Spacing between shape is 0～30nm.
6. optical adjacent correction method according to claim 1 is it is characterised in that the building of described photoetching resolution restriction table
Cube method includes: provides mask pattern, described mask pattern has the spirte of some different in width and spacing, described subgraph
Shape is the lightproof area of mask pattern；Described mask pattern is exposed, obtains exposure figure, if described exposure figure includes
Dry exposure spirte；Using the spacing between the described exposure width of spirte and adjacent exposure spirte as abscissa and
Vertical coordinate, sets up photoetching resolution restriction table, the width of described exposure spirte, described exposure spirte and adjacent spirte
Between spacing be located at described photoetching resolution limit in table can exposure area, and the size of the exposure figure that remaining does not form
Region for photoetching resolution limit table in can not exposure area.
7. optical adjacent correction method according to claim 6 is it is characterised in that exposure subgraph according to different length
Shape, sets up different photoetching resolution restriction tables respectively.
8. optical adjacent correction method according to claim 6 is it is characterised in that described photoetching resolution limits the exposure of table
The width range of light spirte is 50nm～6000nm, and the spacing between adjacent exposure spirte is 40nm～300nm.
9. optical adjacent correction method according to claim 7 is it is characterised in that set up described photoetching resolution restriction table
Exposure spirte length range be 50nm～6000nm.
10. optical adjacent correction method according to claim 9 is it is characterised in that described photoetching resolution limits table
Quantity is four, comprising: the first photoetching resolution limits table, set up that described first photoetching resolution restriction table is adopted first
Exposure spirte has the first length, and described first length range is 1000nm～6000nm；Second photoetching resolution limits table,
Set up the second exposure spirte that described second photoetching resolution restriction table adopted and there is the second length, described second length model
Enclose for 500nm～1000nm；3rd photoetching resolution limits table, set up that described 3rd photoetching resolution restriction table adopted the
Three exposure spirtes have the 3rd length, and described 3rd length range is 150nm～500nm；4th quarter resolution restriction table, builds
The 4th exposure spirte that vertical described 4th quarter resolution restriction table is adopted has the 4th length, and described 4th length range is
50nm～150nm.
11. optical adjacent correction methods according to claim 10 are it is characterised in that the method for mobile described second line segment
Including: comparison first photoetching resolution limits table, second line segment is moved minimum range, makes second in the first spirte to be modified
The second width between the relative edge of line segment and second line segment, between second between second line segment and adjacent current layer spirte
Away from, positioned at first photoetching resolution limit table in can exposure area.
12. optical adjacent correction methods according to claim 10 are it is characterised in that the method for mobile described first line segment
Including: according to the length of the first line segment, select corresponding photoetching resolution to limit table, described corresponding photoetching resolution limits table
The length of exposure spirte being adopted is closest or identical with the length of described first line segment；Judge the length of described first line segment
Degree and the first width whether be located in described corresponding photoetching resolution restriction table can exposure area；Can exposure area if being located at
Interior, then keep described first line segment motionless；If being located at described corresponding photoetching resolution can not be compareed and limits in exposure area
Table, by the first line segment minimum distance of movement, so that the distance between the first line segment and adjacent current layer spirte is decreased to can
In exposure area.
13. optical adjacent correction methods according to claim 1 are it is characterised in that also comprise determining that in described figure
Side to be modified, the current layer spirte that described side to be modified is located is as the second spirte to be modified, described second positron to be repaired
Spacing between the width of figure and described side to be modified and adjacent current layer spirte is located at photoetching resolution and limits in table
Can not exposure area.
14. optical adjacent correction methods according to claim 13 are it is characterised in that also include: movement is described to be modified
Side, makes the spacing between width, described side to be modified and the adjacent current layer spirte of the described second spirte to be modified, is located at
Photoetching resolution limit table in can exposure area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310745648.7A CN104749899B (en) | 2013-12-30 | 2013-12-30 | Optical proximity correction method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310745648.7A CN104749899B (en) | 2013-12-30 | 2013-12-30 | Optical proximity correction method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104749899A CN104749899A (en) | 2015-07-01 |
| CN104749899B true CN104749899B (en) | 2017-02-01 |
Family
ID=53589801
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310745648.7A Active CN104749899B (en) | 2013-12-30 | 2013-12-30 | Optical proximity correction method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104749899B (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109696796B (en) * | 2017-10-23 | 2022-05-31 | 中芯国际集成电路制造(上海)有限公司 | Photomask optimization method and optical proximity correction method |
| CN110221515B (en) * | 2018-03-02 | 2023-01-20 | 中芯国际集成电路制造(上海)有限公司 | Optical proximity correction method and manufacturing method of mask |
| CN110515267B (en) * | 2019-08-29 | 2023-08-18 | 上海华力微电子有限公司 | Layout correction method |
| CN112445059A (en) * | 2019-09-05 | 2021-03-05 | 中芯国际集成电路制造(上海)有限公司 | Optical proximity correction, photomask manufacturing and graphical method |
| CN110376843B (en) * | 2019-09-10 | 2019-12-24 | 墨研计算科学（南京）有限公司 | Method, apparatus and computer readable storage medium for lithography mask optical correction |
| CN112650020B (en) * | 2019-10-11 | 2024-06-18 | 中芯国际集成电路制造(上海)有限公司 | Method for correcting mask pattern |
| CN114609857A (en) * | 2020-12-03 | 2022-06-10 | 无锡华润上华科技有限公司 | Optical proximity effect correction method and system and mask |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3506688B2 (en) * | 2001-12-11 | 2004-03-15 | Ｎｅｃエレクトロニクス株式会社 | Optical proximity correction method and mask data forming method in semiconductor manufacturing process |
| JP4266189B2 (en) * | 2004-07-09 | 2009-05-20 | 株式会社東芝 | Semiconductor integrated circuit pattern verification method, photomask creation method, semiconductor integrated circuit device manufacturing method, and program for realizing semiconductor integrated circuit pattern verification method |
| KR100982135B1 (en) * | 2005-09-09 | 2010-09-14 | 에이에스엠엘 네델란즈 비.브이. | System and method for mask verification using an individual mask error model |
| CN101458448B (en) * | 2007-12-13 | 2011-01-12 | 中芯国际集成电路制造(上海)有限公司 | Optical close range correction and photo mask production method |
| JP5282511B2 (en) * | 2008-09-29 | 2013-09-04 | 富士通セミコンダクター株式会社 | Optical proximity effect correction pattern verification method and apparatus |
| CN102043326B (en) * | 2009-10-20 | 2012-07-11 | 中芯国际集成电路制造(上海)有限公司 | Mask graph correcting method |
| CN102096308B (en) * | 2009-12-15 | 2012-10-31 | 中芯国际集成电路制造(上海)有限公司 | Mask graph, method for manufacturing mask, and method for correcting mask graph |
| CN102193306B (en) * | 2010-03-11 | 2012-09-05 | 中芯国际集成电路制造(上海)有限公司 | Method for designing optical mask |
-
2013
- 2013-12-30 CN CN201310745648.7A patent/CN104749899B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN104749899A (en) | 2015-07-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104749899B (en) | Optical proximity correction method | |
| CN108333865B (en) | Method for correcting mask graph | |
| CN107844033B (en) | Method for correcting global metal layer process hot spots | |
| CN106933028B (en) | Method for correcting mask graph | |
| CN107479331B (en) | OPC correction method for graph corner | |
| CN106896648B (en) | Expose the modification method of targeted graphical | |
| US8261214B2 (en) | Pattern layout creation method, program product, and semiconductor device manufacturing method | |
| CN109407460B (en) | Exposure auxiliary pattern adding method | |
| CN107797375A (en) | The modification method of targeted graphical | |
| CN107490931B (en) | Method for correcting mask graph | |
| CN109669319B (en) | OPC correction method for improving line end size uniformity of polycrystalline silicon layer | |
| CN102129166A (en) | Method for setting sub-resolution assistance feature and method for producing photoetching mask plate | |
| CN107490932B (en) | Method for correcting mask graph | |
| CN104749896A (en) | Optical proximity correction method | |
| CN100592494C (en) | Method for correcting layout design for correcting metallic coating of contact hole | |
| US7930656B2 (en) | System and method for making photomasks | |
| CN107785242B (en) | Triple patterning method | |
| CN109254494B (en) | Optical proximity correction method | |
| KR100742968B1 (en) | A fabrication method of a mask and a calculating method of a optimized bias | |
| US20120131522A1 (en) | Method for generating ultra-short-run-length dummy poly features | |
| CN107706103B (en) | A kind of solution of polysilicon layer bridge joint open circuit | |
| CN111983887B (en) | Sub-resolution auxiliary graph acquisition method | |
| KR100809705B1 (en) | Formation method of image contour for prediction of semiconductor device pattern | |
| CN104977798A (en) | Image correcting method | |
| CN210776174U (en) | Combined light shield |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |