WO2022116295A1 - 开关模块及显示装置 - Google Patents

开关模块及显示装置 Download PDF

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Publication number
WO2022116295A1
WO2022116295A1 PCT/CN2020/137659 CN2020137659W WO2022116295A1 WO 2022116295 A1 WO2022116295 A1 WO 2022116295A1 CN 2020137659 W CN2020137659 W CN 2020137659W WO 2022116295 A1 WO2022116295 A1 WO 2022116295A1
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WO
WIPO (PCT)
Prior art keywords
mos transistor
electrically connected
voltage
node
input terminal
Prior art date
Application number
PCT/CN2020/137659
Other languages
English (en)
French (fr)
Inventor
吴永锋
李文芳
李浩然
Original Assignee
Tcl华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tcl华星光电技术有限公司 filed Critical Tcl华星光电技术有限公司
Publication of WO2022116295A1 publication Critical patent/WO2022116295A1/zh
Priority to US18/176,199 priority Critical patent/US20230206822A1/en

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/027—Arrangements or methods related to powering off a display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Definitions

  • the present application relates to the technical field of power supplies, and in particular, to a switch module and a display device.
  • the light-emitting module in the display device needs to input a DC voltage to the light-emitting module to turn on the light-emitting module.
  • the light-emitting module emits light by continuously inputting a constant DC voltage to the light-emitting module.
  • the present application provides a switch module, including: a control signal input end, a voltage input end, a switch circuit and a voltage output end;
  • the control signal input terminal is used for inputting a control signal to the switch circuit, and the control signal is a square wave signal;
  • the voltage input terminal is used for inputting an original voltage to the switch circuit, and the original voltage is a constant voltage
  • the voltage output terminal is electrically connected to the light-emitting module for outputting the output voltage to the light-emitting module
  • the switch circuit includes a first input terminal, a second input terminal and a first output terminal, the first input terminal and the second input terminal are electrically connected to the control signal input terminal and the voltage input terminal, respectively,
  • the first output terminal is electrically connected to the voltage output terminal, and the switch circuit is used to control the output voltage of the voltage output terminal under the control of the control signal, so as to control the switch circuit to conduct the light-emitting module. on or off;
  • the switch circuit includes: a first MOS transistor, a second MOS transistor, a first resistor and a second resistor;
  • the gate of the first MOS transistor is electrically connected to the first node, the source of the first MOS transistor is electrically connected to the second input terminal, and the drain of the first MOS transistor is electrically connected to the second node ;
  • the gate of the second MOS transistor is electrically connected to the first node, the source of the second MOS transistor is electrically connected to the ground terminal, and the drain of the second MOS transistor is electrically connected to the second node;
  • Both ends of the first resistor are electrically connected to the second input end and the second node respectively;
  • Both ends of the second resistor are electrically connected to the ground terminal and the second node respectively;
  • the first node is electrically connected to the first input end
  • the second node is electrically connected to the first output end
  • the light emitting module is a micro light emitting diode or a very small light emitting diode.
  • the first MOS transistor is a P-type MOS transistor
  • the second MOS transistor is an N-type MOS transistor
  • the switch circuit further includes a third MOS transistor, the gate of the third MOS transistor is electrically connected to the second node, and the source of the third MOS transistor is electrically connected to the second node
  • the second input terminal, the drain of the third MOS transistor is electrically connected to the first output terminal and the second resistor respectively.
  • the switch circuit further includes a fourth MOS transistor, the gate of the fourth MOS transistor is electrically connected to the first input terminal, and the source of the fourth MOS transistor is electrically connected to The ground terminal and the drain of the fourth MOS transistor are electrically connected to the first node and the second input terminal.
  • the third MOS transistor is an N-type MOS transistor or a P-type MOS transistor, and the polarity of the fourth MOS transistor is opposite to that of the third MOS transistor.
  • the switch circuit further includes a third resistor and a fourth resistor
  • the third resistor is electrically connected to the second node and the drain of the second MOS transistor, respectively;
  • the fourth resistor is respectively connected to the drain of the fourth MOS transistor and the second input terminal.
  • the switch circuit further includes a capacitor, and two ends of the capacitor are electrically connected to the first output terminal and the ground terminal, respectively.
  • the original voltage is 24V
  • the amplitude of the square wave signal is 5V
  • the present application further provides a switch module, including: a control signal input end, a voltage input end, a switch circuit and a voltage output end;
  • the control signal input terminal is used for inputting a control signal to the switch circuit, and the control signal is a square wave signal;
  • the voltage input terminal is used for inputting an original voltage to the switch circuit, and the original voltage is a constant voltage
  • the voltage output terminal is electrically connected to the light-emitting module for outputting the output voltage to the light-emitting module
  • the switch circuit includes a first input terminal, a second input terminal and a first output terminal, the first input terminal and the second input terminal are electrically connected to the control signal input terminal and the voltage input terminal, respectively,
  • the first output terminal is electrically connected to the voltage output terminal, and the switch circuit is used to control the output voltage of the voltage output terminal under the control of the control signal, so as to control the switch circuit to conduct the light-emitting module. on or off.
  • the switch circuit includes: a first MOS transistor, a second MOS transistor, a first resistor, and a second resistor;
  • the gate of the first MOS transistor is electrically connected to the first node, the source of the first MOS transistor is electrically connected to the second input terminal, and the drain of the first MOS transistor is electrically connected to the second node ;
  • the gate of the second MOS transistor is electrically connected to the first node, the source of the second MOS transistor is electrically connected to the ground terminal, and the drain of the second MOS transistor is electrically connected to the second node;
  • Both ends of the first resistor are electrically connected to the second input end and the second node respectively;
  • Both ends of the second resistor are electrically connected to the ground terminal and the second node respectively;
  • the first node is electrically connected to the first input end
  • the second node is electrically connected to the first output end.
  • the first MOS transistor is a P-type MOS transistor
  • the second MOS transistor is an N-type MOS transistor
  • the switch circuit further includes a third MOS transistor, the gate of the third MOS transistor is electrically connected to the second node, and the source of the third MOS transistor is electrically connected to the second node
  • the second input terminal, the drain of the third MOS transistor is electrically connected to the first output terminal and the second resistor respectively.
  • the switch circuit further includes a fourth MOS transistor, the gate of the fourth MOS transistor is electrically connected to the first input terminal, and the source of the fourth MOS transistor is electrically connected to The ground terminal and the drain of the fourth MOS transistor are electrically connected to the first node and the second input terminal.
  • the third MOS transistor is an N-type MOS transistor or a P-type MOS transistor, and the polarity of the fourth MOS transistor is opposite to that of the third MOS transistor.
  • the switch circuit further includes a third resistor and a fourth resistor
  • the third resistor is electrically connected to the second node and the drain of the second MOS transistor, respectively;
  • the fourth resistor is respectively connected to the drain of the fourth MOS transistor and the second input terminal.
  • the switch circuit further includes a capacitor, and two ends of the capacitor are electrically connected to the first output terminal and the ground terminal, respectively.
  • the original voltage is 24V
  • the amplitude of the square wave signal is 5V
  • the present application further provides a display device, including a switch module in any of the above implementation manners, the switch module comprising: a control signal input end, a voltage input end, a switch circuit and a voltage output end;
  • the control signal input terminal is used for inputting a control signal to the switch circuit, and the control signal is a square wave signal;
  • the voltage input terminal is used for inputting an original voltage to the switch circuit, and the original voltage is a constant voltage
  • the voltage output terminal is electrically connected to the light-emitting module for outputting the output voltage to the light-emitting module
  • the switch circuit includes a first input terminal, a second input terminal and a first output terminal, the first input terminal and the second input terminal are electrically connected to the control signal input terminal and the voltage input terminal, respectively,
  • the first output terminal is electrically connected to the voltage output terminal, and the switch circuit is used to control the output voltage of the voltage output terminal under the control of the control signal, so as to control the switch circuit to conduct the light-emitting module. on or off.
  • the switch circuit includes: a first MOS transistor, a second MOS transistor, a first resistor, and a second resistor;
  • the gate of the first MOS transistor is electrically connected to the first node, the source of the first MOS transistor is electrically connected to the second input terminal, and the drain of the first MOS transistor is electrically connected to the second node ;
  • the gate of the second MOS transistor is electrically connected to the first node, the source of the second MOS transistor is electrically connected to the ground terminal, and the drain of the second MOS transistor is electrically connected to the second node;
  • Both ends of the first resistor are electrically connected to the second input end and the second node respectively;
  • Both ends of the second resistor are electrically connected to the ground terminal and the second node respectively;
  • the first node is electrically connected to the first input end
  • the second node is electrically connected to the first output end.
  • the first MOS transistor is a P-type MOS transistor
  • the second MOS transistor is an N-type MOS transistor
  • control signal input terminal, the voltage input terminal, the voltage output terminal and the switch circuit are arranged, the working state of the voltage output terminal is controlled by the square wave signal output from the control signal input terminal, and the on-state time and off-state of the control voltage output terminal are controlled. time, thereby preventing the light-emitting module from continuously working under the original voltage, and achieving the technical effect of reducing useless power consumption.
  • FIG. 1 is a schematic diagram of the overall structure of a switch module provided by the application.
  • FIG. 2 is a schematic diagram of the circuit structure of the first embodiment of the switch circuit provided by the application;
  • FIG. 3 is a schematic diagram of a circuit structure of a second embodiment of the switch circuit provided by the application.
  • FIG. 4 is a schematic diagram of a circuit structure of a third embodiment of a switch circuit provided by the application.
  • FIG. 5 is a schematic diagram of signal changes of the switch circuit provided by the present application.
  • Embodiments of the present application provide a switch module and a display device. A detailed description will be given below.
  • an embodiment of the present application provides a switch module 100 .
  • the switch module 100 includes: a control signal input end 110 , a voltage input end 120 , a switch circuit 130 and a voltage output end 140 ;
  • the control signal input terminal 110 is used to output the control signal Vi to the switch circuit 130, and the control signal Vi is a square wave signal;
  • the voltage input terminal 120 is used for inputting the original voltage Vcc to the switch circuit 130, and the original voltage Vcc is a constant voltage;
  • the voltage output terminal 140 is electrically connected to the light emitting module 200 for outputting the output voltage Vo to the light emitting module 200;
  • the switch circuit 130 includes a first input terminal 131, a second input terminal 132 and a first output terminal 133.
  • the first input terminal 131 and the second input terminal 132 are electrically connected to the control signal input terminal 110 and the voltage input terminal 120, respectively.
  • the output terminal 133 is electrically connected to the voltage output terminal 140 , and the switch circuit 130 is used to control the voltage of the voltage output terminal 140 under the control of the control signal, so as to control the switch circuit 130 and the light emitting module 200 to be turned on or off.
  • the working principle of the switch module 100 in the embodiment of the present application is as follows: the voltage input terminal 120 provides voltage for the light emitting module 200 , the control signal input terminal 110 controls the working state (on or off) of the voltage output terminal 140 according to the working state (on or off) of the control signal input terminal; 110 controls the switching frequency of the on state and the off state of the switching circuit 120 according to the switching frequency of the high level and the low level of the square wave signal, thereby controlling the switching frequency of the on state and the off state of the voltage output terminal 140, That is, the on-state time and the off-state time of the control voltage output terminal 140 are controlled.
  • control signal input end 110 the voltage input end 120 , the voltage output end 140 and the switch circuit 130 are set, and the square wave signal output from the control signal input end 110 controls the working state of the voltage output end 140 , and controls the control voltage output.
  • the on-state time and off-state time of the terminal 140 are controlled, so as to prevent the light-emitting module 200 from continuously working under the original voltage Vcc, and achieve the technical effect of reducing useless power consumption.
  • the switch circuit 130 includes: a first MOS transistor Q1 , a second MOS transistor Q2 , a first resistor R1 and a first MOS transistor Q2 .
  • the gate of the first MOS transistor Q1 is electrically connected to the first node D, the source of the first MOS transistor Q1 is electrically connected to the second input terminal 132, and the drain of the first MOS transistor Q1 is electrically connected to the second node G;
  • the gate of the second MOS transistor Q2 is electrically connected to the first node D, the source of the second MOS transistor Q2 is electrically connected to the ground terminal GND, and the drain of the second MOS transistor Q2 is electrically connected to the second node G;
  • Both ends of the first resistor R1 are electrically connected to the second input end 132 and the second node G, respectively;
  • Both ends of the second resistor R2 are electrically connected to the ground terminal GND and the second node G, respectively;
  • the first node D is electrically connected to the first input end 131;
  • the second node G is electrically connected to the first output terminal 133 .
  • Setting the first resistor R1 can protect the first MOS transistor Q1, and setting the second resistor R2 can protect the second MOS transistor Q2. This is because when the first MOS transistor Q1 or the second MOS transistor is turned on, it can play a current limiting role to avoid excessive current passing through the first MOS transistor Q1 or the second MOS transistor Q2, resulting in the first MOS transistor Q1 Or the second MOS transistor Q2 is damaged.
  • the working principle of the switch circuit 130 in the above embodiment is:
  • the first MOS transistor Q1 When the control signal output from the control signal input terminal 110 is at a high level and the voltage of the first node D is at a high level, the first MOS transistor Q1 is turned off, the second MOS transistor Q2 is turned on, and the voltage of the second node G is equal to For the source voltage of the second MOS transistor Q2, since the source of the second MOS transistor Q2 is grounded, the source voltage of the second MOS transistor Q2 is 0V, and the voltage output by the first output terminal 133 is 0V;
  • the first MOS transistor Q1 When the control signal output from the control signal input terminal 110 is at a low level, and the voltage of the first node D is at a low level, the first MOS transistor Q1 is turned on, and the second MOS transistor Q2 is turned off, and the voltage of the second node G is is equal to the source voltage of the first MOS transistor Q1. Since the source of the first MOS transistor Q1 is electrically connected to the voltage input terminal 120, the source voltage of the first MOS transistor Q1 is the original voltage Vcc, and the first output terminal 133 outputs The voltage is the original voltage Vcc.
  • the first MOS transistor Q1 is a P-type MOS transistor
  • the second MOS transistor Q2 is an N-type MOS transistor.
  • the working principle of the N-type MOS transistor is as follows: when the voltage difference between the gate voltage and the source voltage of the N-type MOS transistor is greater than the threshold voltage, the N-type MOS transistor is turned on.
  • the working principle of the P-type MOS transistor is: when the voltage difference between the gate voltage and the source voltage of the P-type MOS transistor is smaller than the threshold voltage, the P-type MOS transistor is turned on.
  • first MOS transistor Q1 and the second MOS transistor Q2 in the embodiments of the present application are not limited to MOS transistors, but may also be devices having the same function.
  • the switch circuit 130 further includes a third MOS transistor Q3 , and the gate of the third MOS transistor Q3 is electrically connected to the third MOS transistor Q3 .
  • the source of the third MOS transistor Q3 is electrically connected to the second input terminal 132, and the drain of the third MOS transistor Q3 is electrically connected to the first output terminal 133 and the second resistor R2, respectively.
  • Other circuit structures are the same as the circuit structures in the previous embodiment, and are not repeated here.
  • the third MOS transistor Q3 is an N-type MOS transistor or a P-type MOS transistor. In an embodiment of the present application, the third MOS transistor Q3 is a P-type MOS transistor.
  • the working principle of the switch circuit 130 in the above embodiment is:
  • the first MOS transistor Q1 When the control signal output from the control signal input terminal 110 is at a high level and the voltage of the first node D is at a high level, the first MOS transistor Q1 is turned off, the second MOS transistor Q2 is turned on, and the voltage of the second node G is equal to For the source voltage of the second MOS transistor Q2, since the source of the second MOS transistor Q2 is grounded, the voltage of the second node G is 0V, then the third MOS transistor Q3 is turned on, and the output voltage Vo of the first output terminal 133 is equal to the first For the source voltage of the three MOS transistor Q3, since the source of the third MOS transistor Q3 is electrically connected to the second input terminal 132, the voltage output by the first output terminal 133 is the original voltage Vcc;
  • the first MOS transistor Q1 When the control signal output from the control signal input terminal 110 is at a low level and the voltage of the first node D is at a low level, the first MOS transistor Q1 is turned on, the second MOS transistor Q2 is turned off, and the voltage of the second node G is equal to The source voltage of the first MOS transistor Q1, since the source of the first MOS transistor Q1 is electrically connected to the second input terminal 132, the source voltage of the first MOS transistor Q1 is the original voltage Vcc, then the voltage of the second node G is the original voltage Vcc, the third MOS transistor Q3 is turned off, so the voltage output by the first output terminal 133 is 0V.
  • the switch circuit 130 further includes a fourth MOS transistor Q4 , and the gate of the fourth MOS transistor Q4 is electrically connected to the first MOS transistor Q4 .
  • An input terminal 131 the source of the fourth MOS transistor Q4 is electrically connected to the ground terminal GND, and the drain of the fourth MOS transistor Q4 is electrically connected to the first node D and the second input terminal 132 .
  • Other circuit structures are the same as the circuit structures in the previous embodiment, and are not repeated here.
  • the polarity of the fourth MOS transistor Q4 is opposite to that of the third MOS transistor Q3.
  • the fourth MOS transistor Q4 is an N-type MOS transistor.
  • the working principle of the switch circuit 130 in the above embodiment is:
  • the fourth MOS transistor Q4 When the control signal output from the control signal input terminal 110 is at a high level, the fourth MOS transistor Q4 is turned on, and the drain voltage of the fourth MOS transistor Q4 is equal to its source voltage. Since the source of the fourth MOS transistor Q4 is electrically connected At the ground terminal GND, therefore, the voltage of the first node D is 0V, the first MOS transistor Q1 is turned on, the second MOS transistor Q2 is turned off, and after the first MOS transistor Q1 is turned on, the voltage of the second node G is equal to the original voltage Vcc, then the third MOS transistor Q4 is turned off. Since the drain of the third MOS transistor Q3 is electrically connected to the ground terminal GND, the voltage output by the first output terminal 133 is 0V;
  • the fourth MOS transistor Q4 When the control signal output from the control signal input terminal 110 is at a low level, the fourth MOS transistor Q4 is turned off, the voltage of the first node D is the original voltage Vcc, the first MOS transistor Q1 is turned off, and the second MOS transistor Q2 is turned on.
  • the gate voltage of the third MOS transistor Q3 is less than 24V, so the third MOS transistor Q3 is turned on. Therefore, the voltage output by the first output terminal 133 is the original voltage Vcc.
  • the original voltage Vcc can be converted into a square wave voltage, which reduces the useless power consumption compared with the constant original voltage Vcc.
  • the switch circuit 130 further includes a third resistor R3 and a fourth resistor R4;
  • the third resistor R3 is electrically connected to the second node G and the drain of the second MOS transistor Q2, respectively; by setting the third resistor R3, when the second MOS transistor Q2 and the third MOS transistor Q3 are turned on at the same time, limiting the flow, further reducing the current passing through the second MOS transistor Q2, and improving the safety and reliability of the second MOS transistor Q2.
  • the fourth resistor R4 is connected to the drain of the fourth MOS transistor Q4 and the second input terminal 132, respectively.
  • the third MOS transistor Q3 and the fourth MOS transistor Q4 in the embodiments of the present application are not limited to MOS transistors, but may also be devices having the same function.
  • the switch circuit 130 further includes a capacitor C, and both ends of the capacitor C are electrically connected to the first output terminal 133 and the ground terminal GND, respectively.
  • the capacitor C is used to filter the voltage signal output by the first output terminal 133 , so as to improve the reliability of the voltage signal output by the first output terminal 133 and improve the switching performance of the switch module 100 .
  • the original voltage Vcc is 24V
  • the amplitude of the square wave signal is 5V.
  • the duty cycle of the square wave signal is not limited here, as long as the duty cycle of the square wave signal is sufficient for the light emitting module 200 to emit light normally.
  • the switch circuit 130 may not include the third MOS transistor Q3.
  • the duty cycle of the square wave signal refers to the proportion of the high level time relative to the total time in one pulse cycle.
  • the switch circuit 120 may not only include the above-mentioned four MOS transistors, but may also include other MOS transistors, and only needs to convert the original voltage connected to the second input terminal to A square wave voltage will do.
  • Embodiments of the present application further provide a display device 10, where the display device 10 includes the switch module 100 in any of the foregoing embodiments.
  • the display device 10 includes a light-emitting module 200 , and the light-emitting module 200 is electrically connected to the switch module 100 .
  • the light emitting module 100 may be a micro light emitting diode (Mini-LED). Of course, the light emitting module 100 may also be other light emitting modules 100 other than the Mini-LED, such as a very small light emitting diode (Micro-LED).
  • Mini-LED micro light emitting diode
  • Micro-LED very small light emitting diode
  • the working state of the voltage output end 140 is controlled by the square wave signal output from the control signal input end 110 .
  • control the on-state time and off-state time of the control voltage output terminal 140 so as to prevent the light-emitting module 200 from continuously working under the original voltage, and achieve the technical effect of reducing useless power consumption;
  • by setting the first resistor R1, The second resistor R2 , the third resistor R3 and the fourth resistor R4 improve the reliability and safety of the switch circuit 130 .

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Abstract

一种开关模块（100）及显示装置，包括：向开关电路（130）输入控制信号的控制信号输入端（110），向开关电路（130）输入原始电压的电压输入端（120），控制开关电路（130）与发光模块（200）导通或关断的开关电路（130）以及将输出电压输出至发光模块（200）的电压输出端（140）；开关电路（130）包括电连接于控制信号输入端（110）和电压输入端（120）的第一输入端（131）、第二输入端（132）和电连接于电压输出端（140）的第一输出端（133）。

Description

开关模块及显示装置 技术领域
本申请涉及电源技术领域，具体涉及一种开关模块及显示装置。
 背景技术
目前，显示装置中的发光模块发光需要向发光模块输入一个能够使发光模块导通的直流电压。现有技术中的是通过持续不断的向发光模块输入恒定的直流电压的方式实现发光模块发光。
 技术问题
通过持续不断的向发光模块输入恒定的直流电压的方式实现发光模块发光会造成较大的无用功耗。
 技术解决方案
第一方面，本申请提供了一种开关模块，包括：控制信号输入端，电压输入端，开关电路以及电压输出端；
所述控制信号输入端用于向所述开关电路输入控制信号，所述控制信号为方波信号；
所述电压输入端用于向所述开关电路输入原始电压，所述原始电压为恒定电压；
所述电压输出端电连接于发光模块，用于将输出电压输出至所述发光模块；
所述开关电路包括第一输入端、第二输入端和第一输出端，所述第一输入端和所述第二输入端分别电连接于所述控制信号输入端和所述电压输入端，所述第一输出端电连接于所述电压输出端，所述开关电路用于在所述控制信号的控制下控制所述电压输出端的输出电压，从而控制所述开关电路与所述发光模块导通或关断；
所述开关电路包括：第一MOS管、第二MOS管、第一电阻和第二电阻；
所述第一MOS管的栅极电连接于第一节点，所述第一MOS管的源极电连接于所述第二输入端，所述第一MOS管的漏极电连接于第二节点；
所述第二MOS管的栅极电连接于第一节点，所述第二MOS管的源极电连接于接地端，所述第二MOS管的漏极电连接于所述第二节点；
所述第一电阻两端分别电连接于所述第二输入端和所述第二节点；
所述第二电阻两端分别电连接于所述接地端和所述第二节点；
所述第一节点电连接于所述第一输入端；
所述第二节点电连接于所述第一输出端；
所述发光模块为微发光二极管或极小型发光二极管。
在本申请一些实现方式中，所述第一MOS管为P型MOS管，所述第二MOS管为N型MOS管。
在本申请一些实现方式中，所述开关电路还包括第三MOS管，所述第三MOS管的栅极电连接于所述第二节点，所述第三MOS管的源极电连接所述第二输入端，所述第三MOS管的漏极分别电连接于所述第一输出端和所述第二电阻。
在本申请一些实现方式中，所述开关电路还包括第四MOS管，所述第四MOS管的栅极电连接于所述第一输入端，所述第四MOS管的源极电连接于所述接地端，所述第四MOS管的漏极电连接于所述第一节点和所述第二输入端。
在本申请一些实现方式中，所述第三MOS管为N型MOS管或P型MOS管，所述第四MOS管的极性与所述第三MOS管的极性相反。
在本申请一些实现方式中，所述开关电路还包括第三电阻和第四电阻；
所述第三电阻分别电连接于所述第二节点和所述第二MOS管的漏极；
所述第四电阻分别连接于所述第四MOS管的漏极和所述第二输入端。
在本申请一些实现方式中，所述开关电路还包括电容，所述电容两端分别电连接于所述第一输出端和所述接地端。
在本申请一些实现方式中，所述原始电压为24V，所述方波信号的幅值为5V。
第二方面，本申请还提供了一种开关模块，包括：控制信号输入端，电压输入端，开关电路以及电压输出端；
所述控制信号输入端用于向所述开关电路输入控制信号，所述控制信号为方波信号；
所述电压输入端用于向所述开关电路输入原始电压，所述原始电压为恒定电压；
所述电压输出端电连接于发光模块，用于将输出电压输出至所述发光模块；
所述开关电路包括第一输入端、第二输入端和第一输出端，所述第一输入端和所述第二输入端分别电连接于所述控制信号输入端和所述电压输入端，所述第一输出端电连接于所述电压输出端，所述开关电路用于在所述控制信号的控制下控制所述电压输出端的输出电压，从而控制所述开关电路与所述发光模块导通或关断。
在本申请一些实现方式中，所述开关电路包括：第一MOS管、第二MOS管、第一电阻和第二电阻；
所述第一MOS管的栅极电连接于第一节点，所述第一MOS管的源极电连接于所述第二输入端，所述第一MOS管的漏极电连接于第二节点；
所述第二MOS管的栅极电连接于第一节点，所述第二MOS管的源极电连接于接地端，所述第二MOS管的漏极电连接于所述第二节点；
所述第一电阻两端分别电连接于所述第二输入端和所述第二节点；
所述第二电阻两端分别电连接于所述接地端和所述第二节点；
所述第一节点电连接于所述第一输入端；
所述第二节点电连接于所述第一输出端。
在本申请一些实现方式中，所述第一MOS管为P型MOS管，所述第二MOS管为N型MOS管。
在本申请一些实现方式中，所述开关电路还包括第三MOS管，所述第三MOS管的栅极电连接于所述第二节点，所述第三MOS管的源极电连接所述第二输入端，所述第三MOS管的漏极分别电连接于所述第一输出端和所述第二电阻。
在本申请一些实现方式中，所述开关电路还包括第四MOS管，所述第四MOS管的栅极电连接于所述第一输入端，所述第四MOS管的源极电连接于所述接地端，所述第四MOS管的漏极电连接于所述第一节点和所述第二输入端。
在本申请一些实现方式中，所述第三MOS管为N型MOS管或P型MOS管，所述第四MOS管的极性与所述第三MOS管的极性相反。
在本申请一些实现方式中，所述开关电路还包括第三电阻和第四电阻；
所述第三电阻分别电连接于所述第二节点和所述第二MOS管的漏极；
所述第四电阻分别连接于所述第四MOS管的漏极和所述第二输入端。
在本申请一些实现方式中，所述开关电路还包括电容，所述电容两端分别电连接于所述第一输出端和所述接地端。
在本申请一些实现方式中，所述原始电压为24V，所述方波信号的幅值为5V。
第三方面，本申请还提供了一种显示装置，其中，包括上述任一实现方式中的开关模块，所述开关模块包括：控制信号输入端，电压输入端，开关电路以及电压输出端；
所述控制信号输入端用于向所述开关电路输入控制信号，所述控制信号为方波信号；
所述电压输入端用于向所述开关电路输入原始电压，所述原始电压为恒定电压；
所述电压输出端电连接于发光模块，用于将输出电压输出至所述发光模块；
所述开关电路包括第一输入端、第二输入端和第一输出端，所述第一输入端和所述第二输入端分别电连接于所述控制信号输入端和所述电压输入端，所述第一输出端电连接于所述电压输出端，所述开关电路用于在所述控制信号的控制下控制所述电压输出端的输出电压，从而控制所述开关电路与所述发光模块导通或关断。
在本申请一些实现方式中，所述开关电路包括：第一MOS管、第二MOS管、第一电阻和第二电阻；
所述第一MOS管的栅极电连接于第一节点，所述第一MOS管的源极电连接于所述第二输入端，所述第一MOS管的漏极电连接于第二节点；
所述第二MOS管的栅极电连接于第一节点，所述第二MOS管的源极电连接于接地端，所述第二MOS管的漏极电连接于所述第二节点；
所述第一电阻两端分别电连接于所述第二输入端和所述第二节点；
所述第二电阻两端分别电连接于所述接地端和所述第二节点；
所述第一节点电连接于所述第一输入端；
所述第二节点电连接于所述第一输出端。
在本申请一些实现方式中，所述第一MOS管为P型MOS管，所述第二MOS管为N型MOS管。
 有益效果
本申请通过设置控制信号输入端、电压输入端、电压输出端和开关电路，通过控制信号输入端输出的方波信号控制电压输出端的工作状态，控制控制电压输出端的导通状态时间和关断状态时间，从而避免发光模块一直持续工作在原始电压下，实现减小无用功耗的技术效果。
 附图说明
图1为本申请提供的开关模块的整体结构示意图；
图2为本申请提供的开关电路的第一实施例的电路结构示意图；
图3为本申请提供的开关电路的第二实施例的电路结构示意图；
图4为本申请提供的开关电路的第三实施例的电路结构示意图；
图5为本申请提供的开关电路的信号变化示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。
为了使本领域任何技术人员能够实现和使用本申请，给出了以下描述。在以下描述中，为了解释的目的而列出了细节。应当明白的是，本领域普通技术人员可以认识到，在不使用这些特定细节的情况下也可以实现本申请。在其它实例中，不会对公知的结构和过程进行详细阐述，以避免不必要的细节使本申请的描述变得晦涩。因此，本申请并非旨在限于所示的实施例，而是与符合本申请所公开的原理和特征的最广范围相一致。
本申请实施例提供了一种开关模块及显示装置。以下进行详细说明。
如图1所示，本申请实施例提供了一种开关模块100，该开关模块100包括：控制信号输入端110，电压输入端120，开关电路130以及电压输出端140；
控制信号输入端110用于向开关电路130输出控制信号Vi，控制信号Vi为方波信号；
电压输入端120用于向开关电路130输入原始电压Vcc，原始电压Vcc为恒定电压；
电压输出端140电连接于发光模块200，用于将输出电压Vo输出至发光模块200；
开关电路130包括第一输入端131、第二输入端132和第一输出端133，第一输入端131和第二输入端132分别电连接于控制信号输入端110和电压输入端120，第一输出端133电连接于电压输出端140，开关电路130用于在控制信号的控制下控制电压输出端140的电压，从而控制开关电路130与发光模块200导通或关断。
本申请实施例的开关模块100的工作原理为：电压输入端120为发光模块 200提供电压，控制信号输入端110根据控制电压输出端140的工作状态（导通或关断）；控制信号输入端110根据方波信号的高电平和低电平的切换频率，控制开关电路120的导通状态和关断状态的切换频率，从而控制电压输出端140的导通状态和关断状态的切换频率，即控制电压输出端140的导通状态时间和关断状态时间。
本申请实施例通过设置控制信号输入端110、电压输入端120、电压输出端140和开关电路130，通过控制信号输入端110输出的方波信号控制电压输出端140的工作状态，控制控制电压输出端140的导通状态时间和关断状态时间，从而避免发光模块200一直持续工作在原始电压Vcc下，实现减小无用功耗的技术效果。
进一步地，如图2所示，为本申请提供的开关电路130的第一实施例的电路结构示意图，开关电路130包括：第一MOS管Q1、第二MOS管Q2、第一电阻R1和第二电阻R2；
第一MOS管Q1的栅极电连接于第一节点D，第一MOS管Q1的源极电连接于第二输入端132，第一MOS管Q1的漏极电连接于第二节点G；
第二MOS管Q2的栅极电连接于第一节点D，第二MOS管Q2的源极电连接于接地端GND，第二MOS管Q2的漏极电连接于第二节点G；
第一电阻R1两端分别电连接于第二输入端132和第二节点G；
第二电阻R2两端分别电连接于接地端GND和第二节点G；
第一节点D电连接于第一输入端131；
第二节点G电连接于第一输出端133。
通过设置第一电阻R1可起到保护第一MOS管Q1的作用，通过设置第二电阻R2可起到保护第二MOS管Q2的作用。这是由于，当第一MOS管Q1或第二MOS管导通时，可起到限流作用，避免经过第一MOS管Q1或第二MOS管Q2的电流过大，导致第一MOS管Q1或第二MOS管Q2损坏。
具体地，上述实施例中的开关电路130的工作原理为：
当控制信号输入端110输出的控制信号为高电平时，第一节点D的电压为高电平，则第一MOS管Q1关断，第二MOS管Q2导通，第二节点G的电压等于第二MOS管Q2的源极电压，由于第二MOS管Q2的源极接地，因此第二MOS管Q2的源极电压为0V，则第一输出端133输出的电压为0V；
当控制信号输入端110输出的控制信号为低电平时，第一节点D的电压为低电平，则第一MOS管Q1导通，第二MOS管Q2关断，则第二节点G的电压等于第一MOS管Q1的源极电压，由于第一MOS管Q1的源极电连接于电压输入端120，因此第一MOS管Q1的源极电压为原始电压Vcc，则第一输出端133输出的电压为原始电压Vcc。
进一步地，第一MOS管Q1为P型MOS管，第二MOS管Q2为N型MOS管。
其中，N型MOS管的工作原理为：当N型MOS管的栅极电压与源极电压之间的电压差大于阈值电压时，N型MOS管导通。P型MOS管的工作原理为：当P型MOS管的栅极电压与源极电压之间的电压差小于阈值电压时，P型MOS管导通。
应当理解的是，本申请实施例中的第一MOS管Q1和第二MOS管Q2不仅仅限于MOS管，还可以为具有相同功能器件。
进一步地，如图3所示，为本申请提供的开关电路130的第二实施例的电路结构示意图，开关电路130还包括第三MOS管Q3，第三MOS管Q3的栅极电连接于第二节点G，第三MOS管Q3的源极电连接第二输入端132，第三MOS管Q3的漏极分别电连接于第一输出端133和第二电阻R2。其他电路结构与上一实施例中的电路结构相同，在此不做赘述。
需要说明的是：第三MOS管Q3为N型MOS管或P型MOS管，在本申请的一个实施例中，第三MOS管Q3为P型MOS管。
具体地，上述实施例中的开关电路130的工作原理为：
当控制信号输入端110输出的控制信号为高电平时，第一节点D的电压为高电平，则第一MOS管Q1关断，第二MOS管Q2导通，第二节点G的电压等于第二MOS管Q2的源极电压，由于第二MOS管Q2的源极接地，因此第二节点G电压为0V，则第三MOS管Q3导通，第一输出端133的输出电压Vo等于第三MOS管Q3的源极电压，由于第三MOS管Q3的源极电连接于第二输入端132，因此，第一输出端133输出的电压为原始电压Vcc；
当控制信号输入端110输出的控制信号为低电平时，第一节点D的电压为低电平，则第一MOS管Q1导通，第二MOS管Q2关断，第二节点G的电压等于第一MOS管Q1的源极电压，由于第一MOS管Q1的源极电连接于第二输入端132，因此第一MOS管Q1的源极电压为原始电压Vcc，则第二节点G的电压为原始电压Vcc，则第三MOS管Q3关断，因此，第一输出端133输出的电压为0V。
进一步地，如图4所示，为本申请提供的开关电路130的第三实施例的电路结构示意图，开关电路130还包括第四MOS管Q4，第四MOS管Q4的栅极电连接于第一输入端131，第四MOS管Q4的源极电连接于接地端GND，第四MOS管Q4的漏极电连接于第一节点D和第二输入端132。其他电路结构与上一实施例中的电路结构相同，在此不做赘述。
需要说明的是：第四MOS管Q4的极性与第三MOS管Q3的极性相反。在本申请的一个实施例中，第四MOS管Q4为N型MOS管。
具体地，结合图5，上述实施例中的开关电路130的工作原理为：
当控制信号输入端110输出的控制信号为高电平时，第四MOS管Q4导通，则第四MOS管Q4的漏极电压等于其源极电压，由于第四MOS管Q4的源极电连接于接地端GND，因此，第一节点D的电压为0V，则第一MOS管Q1导通，第二MOS管Q2关断，第一MOS管Q1导通后，第二节点G的电压等于原始电压Vcc，则第三MOS管Q4关断，由于第三MOS管Q3的漏极电连接于接地端GND，因此，第一输出端133输出的电压为0V；
当控制信号输入端110输出的控制信号为低电平时，第四MOS管Q4关断，则第一节点D的电压为原始电压Vcc，则第一MOS管Q1关断，第二MOS管Q2导通，但由于第一电阻R1的存在，导致第三MOS管Q3栅极的电压小于24V，则第三MOS管Q3导通，因此，第一输出端133输出的电压为原始电压Vcc。
通过上述三种实施例中的开关电路130，均可将原始电压Vcc转换为方波电压，相比于恒定的原始电压Vcc，减小了无用功耗。
进一步地，为了提高开关电路130的安全性和可靠性，如图4所示，开关电路130还包括第三电阻R3和第四电阻R4；
第三电阻R3分别电连接于第二节点G和第二MOS管Q2的漏极；通过设置第三电阻R3，可在当第二MOS管Q2和第三MOS管Q3同时导通时，实现限流，进一步减小通过第二MOS管Q2的电流，提高第二MOS管Q2的安全性和可靠性。
第四电阻R4分别连接于第四MOS管Q4的漏极和第二输入端132。通过设置第四电阻R4，可在当第四MOS管Q4导通时，，实现限流，减小通过第四MOS管Q4的电流，提高第四MOS管Q4的安全性和可靠性。
应当理解的是，本申请实施例中的第三MOS管Q3和第四MOS管Q4不仅仅限于MOS管，还可以为具有相同功能器件。
进一步地，如图4所示，开关电路130还包括电容C，电容C两端分别电连接于第一输出端133和接地端GND。电容C用于对第一输出端133输出的电压信号进行滤波，提高第一输出端133输出的电压信号更加可靠，提高开关模块100的开关性能。
进一步地，在本申请的实施例中，原始电压Vcc为24V，方波信号的幅值为5V。方波信号的占空比在此不做限定，只需满足方波信号的占空比可供发光模块200正常发光即可。
需要说明的是：在本申请的另外一些实施例中，开关电路130可以不包括第三MOS管Q3。
其中，方波信号的占空比指的是指在一个脉冲循环内，高电平时间相对于总时间所占的比例。
还需要说明的是：在本申请的一些其他实施例中，开关电路120可不仅仅包括上述四个MOS管，还可包括其他MOS管，仅需满足将第二输入端接入的原始电压转换为方波电压即可。
本申请实施例还提供了一种显示装置10，显示装置10包括上述任一实施例中的开关模块100。
在本申请的实施例中，显示装置10包括发光模块200，发光模块200电连接于开关模块100。
其中，发光模块100可以为微发光二极管（Mini-LED），当然，发光模块100也可以是除了Mini-LED之外的其他发光模块100，如：极小型发光二极管（Micro-LED）等。
综上所述，本申请实施例通过设置控制信号输入端110、电压输入端120、电压输出端140和开关电路130，通过控制信号输入端110输出的方波信号控制电压输出端140的工作状态，控制控制电压输出端140的导通状态时间和关断状态时间，从而避免发光模块200一直持续工作在原始电压下，实现减小无用功耗的技术效果；同时，通过设置第一电阻R1、第二电阻R2、第三电阻R3和第四电阻R4，提高开关电路130的可靠性和安全性。
以上对本申请所提供的开关模块及显示装置进行了详细介绍。应理解，本文所述的示例性实施方式应仅被认为是描述性的，用于帮助理解本申请的核心思想，而并不用于限制本申请。在每个示例性实施方式中对特征或方面的描述通常应被视作适用于其他示例性实施例中的类似特征或方面。尽管参考示例性实施例描述了本申请，但可建议所属领域的技术人员进行各种变化和更改。本申请意图涵盖所附权利要求书的范围内的这些变化和更改，凡在本申请的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本申请的保护范围之内。

Claims (20)

  1. 一种开关模块，其中，包括：控制信号输入端，电压输入端，开关电路以及电压输出端；
    所述控制信号输入端用于向所述开关电路输入控制信号，所述控制信号为方波信号；
    所述电压输入端用于向所述开关电路输入原始电压，所述原始电压为恒定电压；
    所述电压输出端电连接于发光模块，用于将输出电压输出至所述发光模块；
    所述开关电路包括第一输入端、第二输入端和第一输出端，所述第一输入端和所述第二输入端分别电连接于所述控制信号输入端和所述电压输入端，所述第一输出端电连接于所述电压输出端，所述开关电路用于在所述控制信号的控制下控制所述电压输出端的输出电压，从而控制所述开关电路与所述发光模块导通或关断；
    所述开关电路包括：第一MOS管、第二MOS管、第一电阻和第二电阻；
    所述第一MOS管的栅极电连接于第一节点，所述第一MOS管的源极电连接于所述第二输入端，所述第一MOS管的漏极电连接于第二节点；
    所述第二MOS管的栅极电连接于第一节点，所述第二MOS管的源极电连接于接地端，所述第二MOS管的漏极电连接于所述第二节点；
    所述第一电阻两端分别电连接于所述第二输入端和所述第二节点；
    所述第二电阻两端分别电连接于所述接地端和所述第二节点；
    所述第一节点电连接于所述第一输入端；
    所述第二节点电连接于所述第一输出端；
    所述发光模块为微发光二极管或极小型发光二极管。
  2. 根据权利要求1所述的开关模块，其中，所述第一MOS管为P型MOS管，所述第二MOS管为N型MOS管。
  3. 根据权利要求2所述的开关模块，其中，所述开关电路还包括第三MOS管，所述第三MOS管的栅极电连接于所述第二节点，所述第三MOS管的源极电连接所述第二输入端，所述第三MOS管的漏极分别电连接于所述第一输出端和所述第二电阻。
  4. 根据权利要求3所述的开关模块，其中，所述开关电路还包括第四MOS管，所述第四MOS管的栅极电连接于所述第一输入端，所述第四MOS管的源极电连接于所述接地端，所述第四MOS管的漏极电连接于所述第一节点和所述第二输入端。
  5. 根据权利要求4所述的开关模块，其中，所述第三MOS管为N型MOS管或P型MOS管，所述第四MOS管的极性与所述第三MOS管的极性相反。
  6. 根据权利要求5所述的开关模块，其中，所述开关电路还包括第三电阻和第四电阻；
    所述第三电阻分别电连接于所述第二节点和所述第二MOS管的漏极；
    所述第四电阻分别连接于所述第四MOS管的漏极和所述第二输入端。
  7. 根据权利要求6所述的开关模块，其中，所述开关电路还包括电容，所述电容两端分别电连接于所述第一输出端和所述接地端。
  8. 根据权利要求1所述的开关模块，其中，所述原始电压为24V，所述方波信号的幅值为5V。
  9. 一种开关模块，其中，包括：控制信号输入端，电压输入端，开关电路以及电压输出端；
    所述控制信号输入端用于向所述开关电路输入控制信号，所述控制信号为方波信号；
    所述电压输入端用于向所述开关电路输入原始电压，所述原始电压为恒定电压；
    所述电压输出端电连接于发光模块，用于将输出电压输出至所述发光模块；
    所述开关电路包括第一输入端、第二输入端和第一输出端，所述第一输入端和所述第二输入端分别电连接于所述控制信号输入端和所述电压输入端，所述第一输出端电连接于所述电压输出端，所述开关电路用于在所述控制信号的控制下控制所述电压输出端的输出电压，从而控制所述开关电路与所述发光模块导通或关断。
  10. 根据权利要求9所述的开关模块，其中，所述开关电路包括：第一MOS管、第二MOS管、第一电阻和第二电阻；
    所述第一MOS管的栅极电连接于第一节点，所述第一MOS管的源极电连接于所述第二输入端，所述第一MOS管的漏极电连接于第二节点；
    所述第二MOS管的栅极电连接于第一节点，所述第二MOS管的源极电连接于接地端，所述第二MOS管的漏极电连接于所述第二节点；
    所述第一电阻两端分别电连接于所述第二输入端和所述第二节点；
    所述第二电阻两端分别电连接于所述接地端和所述第二节点；
    所述第一节点电连接于所述第一输入端；
    所述第二节点电连接于所述第一输出端。
  11. 根据权利要求10所述的开关模块，其中，所述第一MOS管为P型MOS管，所述第二MOS管为N型MOS管。
  12. 根据权利要求11所述的开关模块，其中，所述开关电路还包括第三MOS管，所述第三MOS管的栅极电连接于所述第二节点，所述第三MOS管的源极电连接所述第二输入端，所述第三MOS管的漏极分别电连接于所述第一输出端和所述第二电阻。
  13. 根据权利要求12所述的开关模块，其中，所述开关电路还包括第四MOS管，所述第四MOS管的栅极电连接于所述第一输入端，所述第四MOS管的源极电连接于所述接地端，所述第四MOS管的漏极电连接于所述第一节点和所述第二输入端。
  14. 根据权利要求13所述的开关模块，其中，所述第三MOS管为N型MOS管或P型MOS管，所述第四MOS管的极性与所述第三MOS管的极性相反。
  15. 根据权利要求14所述的开关模块，其中，所述开关电路还包括第三电阻和第四电阻；
    所述第三电阻分别电连接于所述第二节点和所述第二MOS管的漏极；
    所述第四电阻分别连接于所述第四MOS管的漏极和所述第二输入端。
  16. 根据权利要求15所述的开关模块，其中，所述开关电路还包括电容，所述电容两端分别电连接于所述第一输出端和所述接地端。
  17. 根据权利要求1所述的开关模块，其中，所述原始电压为24V，所述方波信号的幅值为5V。
  18. 一种显示装置，其中，包括如权利要求1-9任意一项所述的开关模块，所述开关模块包括：控制信号输入端，电压输入端，开关电路以及电压输出端；
    所述控制信号输入端用于向所述开关电路输入控制信号，所述控制信号为方波信号；
    所述电压输入端用于向所述开关电路输入原始电压，所述原始电压为恒定电压；
    所述电压输出端电连接于发光模块，用于将输出电压输出至所述发光模块；
    所述开关电路包括第一输入端、第二输入端和第一输出端，所述第一输入端和所述第二输入端分别电连接于所述控制信号输入端和所述电压输入端，所述第一输出端电连接于所述电压输出端，所述开关电路用于在所述控制信号的控制下控制所述电压输出端的输出电压，从而控制所述开关电路与所述发光模块导通或关断。
  19. 根据权利要求18所述的开关模块，其中，所述开关电路包括：第一MOS管、第二MOS管、第一电阻和第二电阻；
    所述第一MOS管的栅极电连接于第一节点，所述第一MOS管的源极电连接于所述第二输入端，所述第一MOS管的漏极电连接于第二节点；
    所述第二MOS管的栅极电连接于第一节点，所述第二MOS管的源极电连接于接地端，所述第二MOS管的漏极电连接于所述第二节点；
    所述第一电阻两端分别电连接于所述第二输入端和所述第二节点；
    所述第二电阻两端分别电连接于所述接地端和所述第二节点；
    所述第一节点电连接于所述第一输入端；
    所述第二节点电连接于所述第一输出端。
  20. 根据权利要求19所述的开关模块，其中，所述第一MOS管为P型MOS管，所述第二MOS管为N型MOS管。
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608339A (en) * 1994-08-30 1997-03-04 Rohm, Co. Ltd. Device for driving a LED display
CN101868091A (zh) * 2009-07-17 2010-10-20 罗宏基 Led通电发光电路
JP2011186641A (ja) * 2010-03-05 2011-09-22 Toshiba Corp 出力回路
CN102665325A (zh) * 2012-04-12 2012-09-12 深圳市华星光电技术有限公司 一种 led 背光驱动电路、背光模组及液晶显示装置
CN103377631A (zh) * 2012-04-17 2013-10-30 株式会社日本显示器东 液晶显示装置
CN205751476U (zh) * 2016-05-11 2016-11-30 深圳市金立通信设备有限公司 一种oled显示屏的供电电路
CN108076561A (zh) * 2016-11-10 2018-05-25 达宙科技股份有限公司 发光二极管驱动器

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4147345B2 (ja) * 2002-08-22 2008-09-10 セイコーエプソン株式会社 電源回路
US20090243577A1 (en) * 2008-03-28 2009-10-01 Matsushita Electric Industrial Co., Ltd. Reverse current reduction technique for dcdc systems
US8395427B1 (en) * 2010-12-20 2013-03-12 National Semiconductor Corporation Low power and low spur sampling PLL
US8624517B2 (en) * 2011-09-20 2014-01-07 Shenzhen China Star Optoelectronics Technology., Ltd. LED dimming drive device, method and LCD
US9559583B2 (en) * 2014-01-13 2017-01-31 Mediatek Inc. Power converter with a wave generator that filters a wave signal to generate an output voltage
CN204131399U (zh) * 2014-08-07 2015-01-28 青岛歌尔声学科技有限公司 一种升压电路
CN105871180B (zh) * 2016-04-08 2018-07-17 厦门大学 一种大电流cmos推挽驱动电路及其控制方法
CN206099771U (zh) * 2016-10-21 2017-04-12 广州视源电子科技股份有限公司 信号输出装置
CN108924995A (zh) * 2018-06-28 2018-11-30 广州视源电子科技股份有限公司 Led均流电路及电子设备

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608339A (en) * 1994-08-30 1997-03-04 Rohm, Co. Ltd. Device for driving a LED display
CN101868091A (zh) * 2009-07-17 2010-10-20 罗宏基 Led通电发光电路
JP2011186641A (ja) * 2010-03-05 2011-09-22 Toshiba Corp 出力回路
CN102665325A (zh) * 2012-04-12 2012-09-12 深圳市华星光电技术有限公司 一种 led 背光驱动电路、背光模组及液晶显示装置
CN103377631A (zh) * 2012-04-17 2013-10-30 株式会社日本显示器东 液晶显示装置
CN205751476U (zh) * 2016-05-11 2016-11-30 深圳市金立通信设备有限公司 一种oled显示屏的供电电路
CN108076561A (zh) * 2016-11-10 2018-05-25 达宙科技股份有限公司 发光二极管驱动器

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