WO2022102400A1 - Dispositif d'imagerie - Google Patents

Dispositif d'imagerie Download PDF

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Publication number
WO2022102400A1
WO2022102400A1 PCT/JP2021/039570 JP2021039570W WO2022102400A1 WO 2022102400 A1 WO2022102400 A1 WO 2022102400A1 JP 2021039570 W JP2021039570 W JP 2021039570W WO 2022102400 A1 WO2022102400 A1 WO 2022102400A1
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Prior art keywords
pixel
barrier
opb
layer
sensor
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PCT/JP2021/039570
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English (en)
Japanese (ja)
Inventor
忍 朝山
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ソニーセミコンダクタソリューションズ株式会社
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Publication of WO2022102400A1 publication Critical patent/WO2022102400A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/63—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith

Definitions

  • This disclosure relates to an image pickup device.
  • an image pickup apparatus includes pixels arranged in a pixel region that receives light from a subject (hereinafter, normal pixels) and pixels arranged in an optical black region in which light from a subject is shielded.
  • a pixel having a photodiode (PD) hereinafter, a pixel with PD
  • a pixel without PD hereinafter, a pixel without PD
  • the dark current component is calculated by subtracting the voltage signal corresponding to the noise component of the none pixel.
  • a contact plug is provided in the pixel without PD, and by applying a positive voltage to the pixel without PD through the contact plug, the dark charge generated in the pixel without PD is discharged. Is disclosed.
  • the PD-less pixel is provided with a contact plug for receiving a positive voltage supply (that is, for charge reset), and there are many layout restrictions. If there is a large difference in layout between the pixels with PD and the pixels without PD, the photoelectric conversion efficiency and wiring capacity will not be equivalent between these pixels, and there is a possibility that an error will occur in the calculation of the dark current component. If this error is large, the image quality may deteriorate.
  • the present disclosure has been made in view of such circumstances, and an object of the present disclosure is to provide an image pickup apparatus capable of suppressing deterioration of image quality.
  • the image pickup apparatus includes a pixel region provided in the semiconductor layer and receiving light from a subject, and an optical black region provided in the semiconductor layer in which the light is shielded.
  • the optical black region has a first pixel having a sensor function of detecting the light and outputting a signal, and a second pixel having no sensor function. Between the first pixel and the second pixel adjacent to each other, there is a first barrier that hinders the movement of electric charges. There is a second barrier that hinders the movement of electric charges between the second pixels that are adjacent to each other. The second barrier has a deeper potential than the first barrier.
  • the second barrier there is one or more regions in which the second barrier exists around the second pixel.
  • the charges exceeding the capacity that can be stored in the second pixel exceed the second barrier and overflow to the other adjacent second pixels.
  • there is a first barrier between the first pixel and the second pixel but there is no second barrier. Since the first barrier has a shallower potential than the second barrier, the transfer of electric charge from the second pixel to the first pixel is suppressed. Thereby, the image pickup apparatus can suppress the occurrence of a defect (for example, whitening) in the output of the first pixel due to the overflow of the electric charge from the second pixel.
  • a defect for example, whitening
  • the image pickup apparatus can reduce the difference in layout between the first pixel and the second pixel, and can make the photoelectric conversion efficiency and the wiring capacity equivalently close to each other between the first pixel and the second pixel. .. As a result, the image pickup apparatus can reduce the possibility of an error in the calculation of the dark current component, and thus can suppress the deterioration of the image quality.
  • FIG. 1 is a block diagram showing a configuration example of the image pickup apparatus according to the first embodiment of the present disclosure.
  • FIG. 2 is a plan view showing a configuration example of the pixel array unit according to the first embodiment of the present disclosure.
  • FIG. 3 is a cross-sectional view showing a configuration example of an OPB region of the pixel array unit according to the first embodiment of the present disclosure.
  • FIG. 4 is a diagram showing an example of the potential distribution of the OPB region according to the first embodiment of the present disclosure.
  • FIG. 5 is a diagram showing an example of the potential distribution of the OPB region according to the first embodiment of the present disclosure.
  • FIG. 6 is a diagram showing an image quality image of the OPB region according to the first embodiment of the present disclosure.
  • FIG. 1 is a block diagram showing a configuration example of the image pickup apparatus according to the first embodiment of the present disclosure.
  • FIG. 2 is a plan view showing a configuration example of the pixel array unit according to the first embodiment of the present disclosure.
  • FIG. 7A is a cross-sectional view showing a configuration example of an OPB pixel with a sensor according to the first embodiment of the present disclosure.
  • FIG. 7B is a plan view showing a configuration example of the N + layer and the P + layer of the OPB pixel with a sensor according to the first embodiment of the present disclosure.
  • FIG. 8A is a cross-sectional view showing a configuration example of a sensorless OPB pixel according to the first embodiment of the present disclosure.
  • FIG. 8B is a plan view showing a configuration example of the N + layer and the P + layer of the OPB pixel without a sensor according to the first embodiment of the present disclosure.
  • FIG. 9 is a cross-sectional view showing a configuration example of the OPB region according to the first embodiment of the present disclosure.
  • FIG. 10 is a diagram showing the potential distribution of the OPB region according to the comparative example of the present disclosure.
  • FIG. 11 is a diagram showing an image quality image of the OPB region according to the comparative example of the present disclosure.
  • FIG. 12 is a cross-sectional view showing the configuration of an OPB pixel with a sensor according to a modification of the first embodiment of the present disclosure.
  • FIG. 13 is a cross-sectional view showing the configuration of the OPB pixel without a sensor according to the modified example of the first embodiment of the present disclosure.
  • FIG. 14A is a cross-sectional view showing a configuration example of an OPB pixel with a sensor according to the second embodiment of the present disclosure.
  • FIG. 14B is a plan view showing a configuration example of the N + layer and the DTI layer of the OPB pixel with a sensor according to the second embodiment of the present disclosure.
  • FIG. 15A is a cross-sectional view showing a configuration example of a sensorless OPB pixel according to the second embodiment of the present disclosure.
  • FIG. 15B is a plan view showing a configuration example of the N + layer and the DTI layer of the OPB pixel without a sensor according to the second embodiment of the present disclosure.
  • FIG. 16 is a cross-sectional view showing the configuration of an OPB pixel with a sensor according to a modification of the second embodiment of the present disclosure.
  • FIG. 17 is a cross-sectional view showing the configuration of the OPB pixel without a sensor according to the modified example of the second embodiment of the present disclosure.
  • FIG. 18 is a cross-sectional view showing a configuration example of the OPB region according to the third embodiment of the present disclosure.
  • the direction may be explained using the words in the X-axis direction, the Y-axis direction, and the Z-axis direction.
  • the X-axis direction and the Y-axis direction are directions parallel to one surface 10a of the semiconductor layer 10, which will be described later.
  • the X-axis direction and the Y-axis direction are also referred to as horizontal directions.
  • the Z-axis direction is the normal direction of one surface 10a.
  • the X-axis direction, the Y-axis direction, and the Z-axis direction are orthogonal to each other.
  • the first conductive type is P type and the second conductive type is N type will be exemplified.
  • the conductive type may be selected in the opposite relationship, the first conductive type may be N type, and the second conductive type may be P type.
  • + (or-) attached to P or N is a semiconductor layer having a relatively high (or low) impurity concentration as compared with the semiconductor layer not marked with + (or-). Means. However, even if the semiconductor layers have the same P and P (or the same N and N), it does not mean that the impurity concentrations of the respective semiconductor layers are exactly the same.
  • FIG. 1 is a block diagram showing a configuration example of the image pickup apparatus 1 according to the first embodiment of the present disclosure.
  • the image pickup device 1 shown in FIG. 1 is, for example, a back-illuminated solid-state image pickup device.
  • the image pickup apparatus 1 includes a pixel array unit 12, a vertical drive circuit 13, a column signal processing circuit 14, a horizontal drive circuit 15, an output circuit 16, and a control circuit 17.
  • the pixel array unit 12 has a normal pixel area R0 (an example of the “pixel area” of the present disclosure) and an optical black (hereinafter, OPB) area arranged around the normal pixel area R0. It has R1 and.
  • the normal pixel region R0 is a light receiving region that receives light collected by an optical system (not shown), and has a plurality of pixels 21.
  • the plurality of pixels 21 are arranged in a matrix.
  • the plurality of pixels 21 are connected to the vertical drive circuit 13 row by row via the horizontal signal line 22, and are connected to the column signal processing circuit 14 column by column via the vertical signal line 23.
  • Each of the plurality of pixels 21 outputs a pixel signal at a level corresponding to the amount of light received.
  • An image of the subject is constructed from those pixel signals.
  • the vertical drive circuit 13 sequentially supplies drive signals for driving (transfer, selection, reset, etc.) of each pixel 21 to the pixels 21 via the horizontal signal line 22 for each row of the plurality of pixels 21. ..
  • the column signal processing circuit 14 performs AD conversion of the pixel signal by performing CDS (Correlated Double Sampling) processing on the pixel signal output from the plurality of pixels 21 via the vertical signal line 23. At the same time, remove the reset noise.
  • the horizontal drive circuit 15 sequentially supplies a drive signal for outputting a pixel signal from the column signal processing circuit 14 to the data output signal line 24 to the column signal processing circuit 14 for each row of the plurality of pixels 21.
  • the output circuit 16 amplifies the pixel signal supplied from the column signal processing circuit 14 via the data output signal line 24 at the timing according to the drive signal of the horizontal drive circuit 15, and outputs the pixel signal to the signal processing circuit in the subsequent stage.
  • the control circuit 17 controls the drive of each block inside the image pickup apparatus 1. For example, the control circuit 17 generates a clock signal according to the drive cycle of each block and supplies it to each block.
  • the pixel 21 includes a photodiode 31, a transfer transistor 32, a floating diffusion FD, an amplification transistor 34, a selection transistor 35, and a reset transistor 36.
  • the transfer transistor 32, the floating diffusion FD, the amplification transistor 34, the selection transistor 35, and the reset transistor 36 constitute a read circuit 30 that reads out the charge (pixel signal) photoelectrically converted by the photodiode 31.
  • the photodiode 31 is a photoelectric conversion unit that converts incident light into electric charges by photoelectric conversion and stores them.
  • the anode terminal is grounded and the cathode terminal is connected to the transfer transistor 32.
  • a transfer signal TRG is supplied from the vertical drive circuit 13 to the gate electrode TG of the transfer transistor 32.
  • the transfer transistor 32 is driven according to the transfer signal TRG supplied to the gate electrode TG.
  • the transfer transistor 32 is turned on, the charge stored in the photodiode 31 is transferred to the floating diffusion FD.
  • the floating diffusion FD is a floating diffusion region having a predetermined storage capacity connected to the gate electrode of the amplification transistor 34, and temporarily stores the charge transferred from the photodiode 31.
  • the amplification transistor 34 outputs a pixel signal at a level corresponding to the electric charge stored in the floating diffusion FD (that is, the potential of the floating diffusion FD) to the vertical signal line 23 via the selection transistor 35. That is, due to the configuration in which the floating diffusion FD is connected to the gate electrode of the amplification transistor 34, the floating diffusion FD and the amplification transistor 34 amplify the electric charge generated in the photodiode 31 and convert it into a pixel signal at a level corresponding to the electric charge. Functions as a conversion unit.
  • the selection transistor 35 is driven according to the selection signal SEL supplied from the vertical drive circuit 13, and when the selection transistor 35 is turned on, the pixel signal output from the amplification transistor 34 can be output to the vertical signal line 23.
  • the reset transistor 36 is driven according to the reset signal RST supplied from the vertical drive circuit 13, and when the reset transistor 36 is turned on, the electric charge accumulated in the floating diffusion FD is discharged to the power supply line Vdd, and the floating diffusion FD becomes the floating diffusion FD. It will be reset.
  • FIG. 2 is a plan view showing a configuration example of the pixel array unit 12 according to the first embodiment of the present disclosure.
  • the OPB region R1 is shown larger than the normal pixel region R0.
  • the OPB area R1 is usually arranged around the pixel area R0.
  • the OPB region R1 has a plurality of light-shielded pixels, and the signal output from these pixels is used as a reference for the black level of the pixels of the normal pixel region.
  • the OPB region R1 is symmetrically arranged vertically and horizontally in the normal pixel region R0 in a plan view in order to realize, for example, a vertical inversion that inverts the captured image up and down and a left-right inversion drive that inverts the left and right. ing.
  • the OPB region R1 has an OPB pixel region R11 with a sensor, an OPB pixel region R12 without a sensor, and an overflow drain pixel region R13.
  • the overflow / drain pixel area R13, the OPB pixel area R11 with the sensor, the OPB pixel area R12 without the sensor, and the overflow / drain pixel area R13 are arranged in this order from the normal pixel area R0 toward the outside of the normal pixel area R0. ..
  • the charge e- for example, the dark current component
  • FIG. 3 is a cross-sectional view showing a configuration example of the OPB region R1 of the pixel array unit 12 according to the first embodiment of the present disclosure.
  • the cross-sectional view shown in FIG. 3 corresponds to a cross-sectional view obtained by cutting the plan view shown in FIG. 2 along the AA'line.
  • the pixel array unit 12 includes a semiconductor layer 10 having a normal pixel region R0 (see FIG. 2) and an OPB region R1, and a light-shielding metal 90 provided on one surface 10a of the semiconductor layer 10. And a color filter CF provided on the light-shielding metal 90, and a microlens ML provided on the color filter CF.
  • one surface 10a side of the semiconductor layer 10 is the back surface side of the image pickup apparatus 1.
  • the semiconductor layer 10 is made of, for example, silicon (Si).
  • the semiconductor layer 10 may be composed of a single crystal silicon substrate, or may be a silicon layer formed on the silicon substrate by an epitaxial growth method.
  • the semiconductor layer 10 is provided with an OPB pixel region R11 with a sensor, an OPB pixel region R12 without a sensor, and an overflow drain pixel region R13, respectively.
  • the light-shielding metal 90 is provided, for example, in a part of the normal pixel region R0 (for example, between one adjacent pixel 21 and the other pixel 21) and in the entire OPB region R1.
  • the color filter CF and the microlens ML are provided continuously, for example, from the normal pixel region R0 to the OPB region R1.
  • the light-shielding metal 90 is continuously provided above the OPB pixel region R11 with a sensor, above the OPB pixel region R12 without a sensor, and above the overflow drain pixel region R13.
  • a color filter CF and a microlens ML are provided above the OPB pixel region R11 with a sensor, above the OPB pixel region R12 without a sensor, and above the overflow drain pixel region R13 via a light-shielding metal 90.
  • the OPB pixel region R11 with a sensor, the OPB pixel region R12 without a sensor, and the overflow drain pixel region R13 are shielded from light by a light-shielding metal 90.
  • the sensor-equipped OPB pixel region R11 has a sensor-equipped OPB pixel 50 (an example of the “first pixel” of the present disclosure).
  • the OPB pixel region R11 with a sensor has a plurality of sensors arranged side by side in the X-axis direction and the Y-axis direction (that is, the horizontal direction), respectively. It may have the present OPB pixel 50.
  • the OPB pixel 50 with a sensor has the same configuration as the pixel 21 provided in the normal pixel region R0, except that the upper part thereof is shielded from light by the light-shielding metal 90.
  • the sensorless OPB pixel region R12 has a sensorless OPB pixel 60 (an example of the "second pixel" of the present disclosure). In FIG. 3, four sensorless OPB pixels 60 arranged in the Y-axis direction are shown, but this is merely an example.
  • the sensorless OPB pixel region R12 may have a plurality of sensorless OPB pixels 60 arranged side by side in the X-axis direction and the Y-axis direction, respectively.
  • the overflow-drain pixel region R13 has an overflow-drain pixel 70 (an example of the "third pixel" of the present disclosure). Although only one overflow / drain pixel 70 is shown in FIG. 3, the overflow / drain pixel region R13 may have a plurality of overflow / drain pixels 70 arranged side by side in the X-axis direction and the Y-axis direction, respectively. ..
  • a barrier ⁇ BA1 (an example of the “first barrier” of the present disclosure) that hinders the movement of the electric charge e ⁇ exists between the OPB pixel 50 with a sensor and the OPB pixel 60 without a sensor adjacent to each other. do.
  • a barrier ⁇ BA2 (an example of the “second barrier” of the present disclosure) that hinders the movement of the electric charge e ⁇ .
  • a barrier ⁇ BA3 (an example of the “third barrier” of the present disclosure) that hinders the movement of the electric charge e ⁇ .
  • the space between one adjacent pixel and the other pixel is also referred to as "between adjacent pixels”.
  • FIG. 4 and 5 are diagrams showing an example of the potential distribution of the OPB region R1 according to the first embodiment of the present disclosure.
  • the barrier ⁇ BA2 existing between the adjacent pixels of the OPB pixels 60 without the sensor has a deeper potential than the barrier ⁇ BA1 existing between the adjacent pixels of the OPB pixel 50 with the sensor and the OPB pixel 60 without the sensor. .. ⁇ BA2- ⁇ BA1> 0.
  • deep potential may be paraphrased as “high potential” or “high potential”, or may be paraphrased as “low barrier height” in view of the electric charge e-.
  • shallow potential may be paraphrased as “low potential” or “low potential”, or may be paraphrased as "high barrier height” in view of the electric charge e ⁇ .
  • the barrier ⁇ BA3 existing between the adjacent pixels of the OPB pixel 60 without the sensor and the overflow drain pixel 70 has a deeper potential than the barrier ⁇ BA1.
  • the potential of the barrier ⁇ BA2 and the potential of the barrier ⁇ BA3 are, for example, the same depth as each other.
  • ⁇ BA2 ⁇ BA3.
  • the potential ⁇ Sens1 of the OPB pixel 50 with a sensor has a deeper potential than the barriers ⁇ BA1 and ⁇ BA2, respectively.
  • the potential ⁇ Sens1 of the OPB pixel 50 with a sensor is, for example, the potential of the N + layer 110 (see FIG. 7A described later) in the OPB pixel 50 with a sensor.
  • the sensor-equipped OPB pixel 50 has a gate electrode TG1 (an example of the "first gate electrode” of the present disclosure) for transferring the electric charge generated by the sensor-equipped OPB pixel 50.
  • the OPB pixel 50 with a sensor is connected to the floating diffusion FD via a transfer transistor 32 (see FIG. 1) having a gate electrode TG1.
  • a transfer transistor 32 (see FIG. 1) having a gate electrode TG1.
  • the transfer gate is turned on and the charge e- accumulated in the OPB pixel 50 with a sensor becomes. Transferred to the floating diffusion FD.
  • the potential ⁇ Sens2 of the OPB pixel 60 without a sensor has a deeper potential than each of the barriers ⁇ BA1 and ⁇ BA2.
  • the potential ⁇ Sens2 of the OPB pixel 60 without a sensor is, for example, the potential of the N + layer 110 (see FIG. 8A described later) in the OPB pixel 60 without a sensor.
  • the potential ⁇ Sens3 of the overflow / drain pixel 70 has a deeper potential than each of the barriers ⁇ BA1, ⁇ BA2, and ⁇ BA3.
  • the potential ⁇ Sens3 of the overflow drain pixel 70 is, for example, the potential of the N + layer 110 (see FIG. 9 described later) in the overflow drain pixel 70.
  • the charge e- (for example, the dark current component) generated in the OPB pixel 60 without a sensor
  • the charge e- overflowing in the OPB pixel 60 without a sensor is larger than exceeding the barrier ⁇ BA1 due to the magnitude relationship of the barrier height described above. , It is easier to exceed the barriers ⁇ BA2 and ⁇ BA3.
  • the charge e-overflowing in the OPB pixel 60 without the sensor is suppressed from moving to the OPB pixel 50 with the sensor by the barrier ⁇ BA1 and moves to the OPB pixel 60 without the sensor or the adjacent overflow drain pixel 70. ..
  • the overflow / drain pixel 70 is connected to the floating diffusion FD via, for example, a transfer transistor 32 (see FIG. 1) having a gate electrode TG3.
  • the floating diffusion FD is connected to a positive power line Vdd (an example of the "preset positive potential" of the present disclosure), for example, via a reset transistor 36 (see FIG. 1).
  • the transfer gate is turned on and the charge e- accumulated in the overflow drain pixel 70 is a floating diffusion. It is discharged to the positive power line Vdd via the FD.
  • the transfer gate of the overflow / drain pixel 70 may be on (that is, always on) in a state where no voltage is applied to the third gate electrode. As a result, the overflow / drain pixel 70 is constantly discharged to the positive power supply line Vdd.
  • the OPB pixel 60 without a sensor has a gate electrode TG2 (an example of the “second gate electrode” of the present disclosure) having the same structure as the gate electrode TG1 (see FIG. 4).
  • a gate electrode TG2 an example of the “second gate electrode” of the present disclosure
  • the barrier ⁇ BA2 has a deeper potential (that is, the barrier height is lower) than the barrier ⁇ TG2.
  • the potential of the barrier ⁇ TG2 is the same depth when a voltage is applied to the gate electrode TG2 and when a voltage is not applied to the gate electrode TG.
  • the potential of the barrier ⁇ TG2 has a constant depth regardless of whether a voltage is applied to the gate electrode TG2 or not.
  • the charge e-overflowing in the sensorless OPB pixel 60 is suppressed from moving to the floating diffusion FD by the barrier ⁇ TG2, and moves to the adjacent sensorless OPB pixel 60 or the adjacent overflow drain pixel 70.
  • FIG. 6 is a diagram showing an image quality image of the OPB region R1 according to the first embodiment of the present disclosure.
  • the charge e-overflowing in the OPB pixel 60 without the sensor is suppressed from moving to the OPB pixel 50 with the sensor by the barrier ⁇ BA1, and the movement to the floating diffusion FD is suppressed by the barrier ⁇ TG2.
  • the OPB pixel region R11 with a sensor has a defect in the output of the OPB pixel 50 with a sensor adjacent to the OPB pixel region R12 without a sensor (for example, whitening as shown in FIG. 6 described later). ) Can be suppressed.
  • FIG. 7A is a cross-sectional view showing a configuration example of the OPB pixel 50 with a sensor according to the first embodiment of the present disclosure.
  • FIG. 7B is a plan view showing a configuration example of the N + layer 110 and the P + layer 120 of the OPB pixel 50 with a sensor according to the first embodiment of the present disclosure. Note that FIG. 7A includes a cross section of the plan view shown in FIG. 7B cut along the YZ plane passing through the BB'line.
  • the OPB pixel 50 with a sensor has an N + layer 110 provided on the semiconductor layer 10 (an example of the “second impurity diffusion layer” of the present disclosure) and a P + provided around the N + layer 110.
  • a layer 120 and a gate electrode TG1 provided on the P + layer 120 via a gate insulating film (not shown) are provided.
  • the P + layer 120 is a first P + layer 121 (an example of the “first impurity diffusion layer” of the present disclosure) located on one surface 110a (upper surface in FIG. 7A) side of the N + layer 110, and the N + layer 110.
  • a second P + layer 122 located on the side of the other surface 110b (lower surface in FIG.
  • the third P + layer 123 is provided around each of the OPB pixel 50 with a sensor and the OPB pixel 60 without a sensor.
  • a photodiode is composed of an N + layer 110 and a first P + layer 121.
  • the charge e ⁇ generated by the photodiode is stored in the N + layer 110.
  • the N + layer 110 functions as a charge storage layer.
  • the charge e ⁇ stored in the N + layer 110 is output as a signal to the floating diffusion FD (see, for example, FIG. 4) when the transfer transistor having the gate electrode TG1 is turned on.
  • the third P + layer 123 constitutes an inter-pixel separation portion of the OPB pixel 50 with a sensor. As shown in FIG. 7B, the third P + layer 123 surrounds the N + layer 110 in the X-axis direction and the Y-axis direction.
  • the OPB pixel 50 with a sensor can be placed between adjacent pixels (for example, between an adjacent OPB pixel 50 with a sensor, between an adjacent OPB pixel 50 without a sensor, or an adjacent overflow drain pixel.
  • a barrier ⁇ BA1 (see, for example, FIGS. 3 and 4) can be formed (between 70 and 70).
  • FIG. 8A is a cross-sectional view showing a configuration example of the OPB pixel 60 without a sensor according to the first embodiment of the present disclosure.
  • FIG. 8B is a plan view showing a configuration example of the N + layer 110 and the P + layer 120 of the sensorless OPB pixel 60 according to the first embodiment of the present disclosure. Note that FIG. 8A includes a cross section of the plan view shown in FIG. 8B cut along the YZ plane passing through the CC'line.
  • the sensorless OPB pixel 60 has an N + layer 110 provided on the semiconductor layer 10, a P + layer 120 provided around the N + layer 110, and a gate insulating film on the P + layer 120 (FIG. 8A).
  • a gate electrode TG2 provided via (not shown) is provided.
  • the P + layer 120 is located on the first P + layer 121A located on one surface 110a (upper surface in FIG. 8A) side of the N + layer 110 and on the other surface 110b (lower surface in FIG. 8A) side of the N + layer 110. It has a second P + layer 122 and a third P + layer 123 located on the side surface 110c of the N + layer 110.
  • a photodiode is composed of an N + layer 110 and a first P + layer 121A.
  • the charge e ⁇ generated by the photodiode is stored in the N + layer 110.
  • the N + layer 110 functions as a charge storage layer.
  • the P + layer 121A of the OPB pixel 60 without a sensor has a larger thickness than, for example, the P + layer 121 of the OPB pixel 50 with a sensor.
  • the transfer transistor having the gate electrode TG2 is not turned on.
  • the charge stored in the N + layer 110 is not output as a signal to the floating diffusion FD (see, for example, FIG. 4) via the transfer transistor having the gate electrode TG2.
  • the photodiode composed of the N + layer 110 and the first P + layer 121A does not output a signal to the floating diffusion FD, and therefore does not function as a sensor.
  • the third P + layer 123 constitutes an inter-pixel separation portion of the OPB pixel 60 without a sensor. As shown in FIG. 8B, in the X-axis direction and the Y-axis direction, the third P + layer 123 surrounds the N + layer 110 except for a part of the region R121 (an example of the “non-separable region” of the present disclosure). I'm out.
  • the third P + layer 123 allows the sensorless OPB pixel 60 to form a barrier ⁇ BA1 with the adjacent sensored OPB pixel 50.
  • one or more regions R121 in which the third P + layer 123 is not arranged are provided.
  • One sensorless OPB pixel 60 and the other sensorless OPB pixel 60 adjacent to each other in the Y-axis direction (or the X-axis direction, or the X-axis direction and the Y-axis direction) are the regions R121 in which the third P + layer 123 is not arranged.
  • N + layers 110 are connected to each other.
  • the sensorless OPB pixel 60 has a deeper potential than the barrier ⁇ BA1 between the sensorless OPB pixel 60 and the other sensorless OPB pixels 60 adjacent in the Y-axis direction (or the X-axis direction, or the X-axis direction and the Y-axis direction).
  • the barrier ⁇ BA2 can be formed.
  • FIG. 9 is a cross-sectional view showing a configuration example of the OPB region R1 according to the first embodiment of the present disclosure.
  • the sensorless OPB pixel 60 has the above-mentioned region R121 together with the N + layer 110 of the overflow drain pixels 70 adjacent to each other in the Y-axis direction (or the X-axis direction, or the X-axis direction and the Y-axis direction). Connecting via.
  • the OPB pixel 60 without a sensor has a barrier ⁇ BA3 having a deeper potential than the barrier ⁇ BA1 between the overflow and drain pixels 70 adjacent to each other in the Y-axis direction (or the X-axis direction, or the X-axis direction and the Y-axis direction). Can be formed.
  • the gate electrode TG1 of the OPB pixel 50 with a sensor is driven in the same manner as the pixel in the normal pixel region R0 (see, for example, FIG. 1).
  • the transfer transistor having the gate electrode TG1 is turned on, the charge e ⁇ stored in the N + layer 110 is output as a signal to the floating diffusion FD (see, for example, FIG. 4).
  • the gate electrode TG2 of the OPB pixel 60 without a sensor is also driven in the same manner as the gate electrode TG1 of the OPB pixel 50 with a sensor. Even when driven in this way, the transfer transistor having the gate electrode TG2 is not turned on, so that the charge e ⁇ stored in the N + layer 110 is not output as a signal to the floating diffusion FD.
  • the region where the channel under the gate electrode TG3 is formed is not the first P + layer 121 but the N + layer 110.
  • the transfer transistor having the gate electrode TG3 is always on, and the N + layer 110 of the overflow drain pixel 70 can be constantly connected to the floating diffusion FD (see, for example, FIG. 4).
  • the reset transistor connected in series with the transfer transistor having the gate electrode TG3 may also be always on.
  • the N + layer 110 of the overflow drain pixel 70 can be constantly connected to the power supply line Vdd (for example, see FIG. 4) via the floating diffusion FD and the reset transistor.
  • the electric charge e ⁇ overflowing in the OPB pixel 60 without a sensor exceeds the barriers ⁇ BA2 and ⁇ BA3 and is constantly discharged to the power supply line Vdd.
  • FIG. 10 is a diagram showing the potential distribution of the OPB region R1 ′ according to the comparative example of the present disclosure.
  • FIG. 11 is a diagram showing an image quality image of the OPB region R1 ′ according to the comparative example of the present disclosure.
  • ⁇ BA1 ′ between the adjacent pixels of the OPB pixel 50 ′ with the sensor and the OPB pixel 60 ′ without the sensor.
  • ⁇ BA2 ′ between adjacent pixels of the OPB pixels 60 ′ without a sensor.
  • the barrier ⁇ BA2 ′ has the same potential depth as the barrier ⁇ BA1 ′.
  • ⁇ BA2' ⁇ BA1'.
  • ⁇ BA3 ′ there is a barrier ⁇ BA3 ′ between the adjacent pixels of the OPB pixel 60 ′ without the sensor and the overflow drain pixel 70 ′.
  • the barrier ⁇ BA3 ′ has the same potential depth as the barrier ⁇ BA1 ′.
  • ⁇ BA3' ⁇ BA1'.
  • the sensored OPB pixel adjacent to the sensorless OPB pixel area R12' Whitening may occur in the output of 50.
  • the image pickup apparatus 1 is provided in the semiconductor layer 10, a normal pixel region R0 that receives light from a subject, and is provided in the semiconductor layer 10 to block light.
  • the OPB region R1 is provided.
  • the OPB region R1 has an OPB pixel 50 with a sensor having a sensor function of detecting light and outputting a signal, and an OPB pixel 60 without a sensor having no sensor function.
  • ⁇ BA1 that hinders the movement of the electric charge e ⁇ .
  • ⁇ BA2 between the sensorless OPB pixels 60 adjacent to each other, which hinders the movement of the electric charge e ⁇ .
  • ⁇ BA2 has a deeper potential than ⁇ BA1.
  • ⁇ BA2 there is one or more regions R121 in which ⁇ BA2 exists around the OPB pixel 60 without a sensor.
  • the charge e-that exceeds the capacity that can be stored in the sensorless OPB pixel 60 exceeds the barrier ⁇ BA2 and is adjacent to the other sensorless OPB pixel 60.
  • ⁇ BA1 exists, but the barrier ⁇ BA2 does not exist.
  • the barrier ⁇ BA1 has a shallower potential than the barrier ⁇ BA2, it is possible to suppress the movement of the charge e-from the OPB pixel 60 without the sensor to the OPB pixel 50 with the sensor. As a result, the image pickup apparatus 1 can suppress the occurrence of defects (for example, whitening) in the output of the OPB pixel 50 with the sensor due to the overflow of the charge e ⁇ from the OPB pixel 60 without the sensor.
  • the image pickup apparatus 1 can reduce the difference in layout between the OPB pixel 50 with a sensor and the OPB pixel 60 without a sensor, and the photoelectric conversion efficiency and wiring between the OPB pixel 50 with a sensor and the OPB pixel 60 without a sensor.
  • the capacity etc. can be made close to the equivalent.
  • the image pickup apparatus 1 can reduce the possibility that an error occurs in the calculation of the dark current component, and thus can suppress the deterioration of the image quality.
  • each of the gate electrodes TG1, TG2, and TG3 of the OPB pixel 50 with a sensor, the OPB pixel 60 without a sensor, and the overflow drain pixel 70 has a planar structure. Indicated. However, the embodiments of the present disclosure are not limited to this. In the embodiments of the present disclosure, at least one or more of the gate electrodes TG1, TG2, and TG3 may have a trench gate structure.
  • FIG. 12 is a cross-sectional view showing the configuration of the OPB pixel 50A with a sensor according to the modified example of the first embodiment of the present disclosure.
  • the gate electrode TG1 of the OPB pixel 50A with a sensor has a trench gate structure.
  • the semiconductor layer 10 is provided with a hole H1 that opens on one surface 10a side and reaches the N + layer 110.
  • the gate electrode TG1 is arranged in the hole H1 via a gate insulating film (not shown), and has a vertical gate electrode VG1 extending in the vertical direction (for example, the Z-axis direction) and a gate insulating film (not shown). It has a horizontal gate electrode HG1 provided on one 10a of the semiconductor layer 10 via the above.
  • the vertical gate electrode VG1 and the horizontal gate electrode HG1 are connected to each other and are integrally formed.
  • the sensor-equipped OPB pixel 50A shown in FIG. 12 functions in the same manner as the sensor-equipped OPB pixel 50 shown in FIG. 7A, for example.
  • FIG. 13 is a cross-sectional view showing the configuration of the sensorless OPB pixel 60A according to the modified example of the first embodiment of the present disclosure.
  • the gate electrode TG2 of the OPB pixel 60A without a sensor has a trench gate structure.
  • the semiconductor layer 10 is provided with a hole H2 that opens on one side of 10a and does not reach the N + layer 110.
  • the bottom of the hole H2 is located within the P + layer 121A.
  • the gate electrode TG2 is arranged in the hole H2 via a gate insulating film (not shown), and has a vertical gate electrode VG2 extending in the vertical direction (for example, the Z-axis direction) and a gate insulating film (not shown).
  • the sensorless OPB pixel 60A shown in FIG. 13 functions in the same manner as the sensorless OPB pixel 60 shown in FIG. 8A, for example.
  • the third P + layer 123 is exemplified as a pixel-to-pixel separation unit that separates adjacent pixels.
  • the pixel-to-pixel separation section that separates adjacent pixels is not limited to the P-type impurity diffusion layer.
  • the inter-pixel separation unit may have, for example, trench isolation.
  • FIG. 14A is a cross-sectional view showing a configuration example of the OPB pixel 50B with a sensor according to the second embodiment of the present disclosure.
  • FIG. 14B is a plan view showing a configuration example of the N + layer 110 and the DTI layer 133 of the OPB pixel 50B with a sensor according to the second embodiment of the present disclosure. Note that FIG. 14A includes a cross section of the plan view shown in FIG. 14B cut along the YZ plane passing through the DD'line.
  • the OPB pixel 50B with a sensor has an STI (shallow Trench Isolation) layer 131 and a DTI (Deep Trench Isolation) layer 133 as inter-pixel separation portions.
  • the STI layer 131 has, for example, a structure in which an insulating film such as silicon oxide (SiO2) or polysilicon is embedded in a groove portion that opens on one surface (upper surface in FIG. 14) 10a side of the semiconductor layer 10.
  • the DTI layer 133 has, for example, a structure in which an insulating film such as SiO2 or polysilicon is embedded in a groove that opens on the other surface (lower surface in FIG. 14) side opposite to one surface 10a of the semiconductor layer 10.
  • the STI layer 131 and the DTI layer 133 are in contact with each other.
  • the STI layer 131 and the DTI layer 133 are arranged so as to overlap each other in a plan view from the normal direction (for example, the Z-axis direction) of one surface 10a of the semiconductor layer 10.
  • the DTI layer 133 surrounds the N + layer 110 in the X-axis direction and the Y-axis direction. Due to the DTI layer 133, the OPB pixel 50B with a sensor is placed between adjacent pixels (for example, between an OPB pixel 50B with another sensor adjacent to it, between an OPB pixel 50B without an adjacent sensor, or an adjacent overflow drain pixel 70.
  • a barrier ⁇ BA1 can be formed between the two.
  • FIG. 15A is a cross-sectional view showing a configuration example of the OPB pixel 60B without a sensor according to the second embodiment of the present disclosure.
  • FIG. 15B is a plan view showing a configuration example of the N + layer 110 and the DTI layer 133 of the sensorless OPB pixel 60B according to the second embodiment of the present disclosure. Note that FIG. 15A includes a cross section of the plan view shown in FIG. 15B cut along the YZ plane passing through the DD'line.
  • the sensorless OPB pixel 60B has an N + layer 110 provided on the semiconductor layer 10, a P + layer 120 provided around the N + layer 110, and a gate insulating film on the P + layer 120 (FIG. 15A).
  • a gate electrode TG2 provided via (not shown) is provided.
  • the P + layer 120 is located on the first P + layer 121A located on one surface 110a (upper surface in FIG. 15A) side of the N + layer 110 and on the other surface 110b (lower surface in FIG. 15A) side of the N + layer 110. It has a second P + layer 122 and a third P + layer 123 located on the side surface 110c of the N + layer 110.
  • the OPB pixel 60B without a sensor has an STI layer 131 and a DTI layer 133 as inter-pixel separation portions.
  • the DTI layer 133 surrounds the N + layer 110 except for a part of the region R121.
  • the DTI layer 133 allows the sensorless OPB pixel 60B to form a barrier ⁇ BA1 with the adjacent sensored OPB pixel 50B.
  • the N + layers 110 of the OPB pixels 60B without sensors adjacent to each other in the Y-axis direction (or the X-axis direction, or the X-axis direction and the Y-axis direction) are connected to each other via the above-mentioned region R121. Due to the above region R121, the sensorless OPB pixel 60B forms a barrier ⁇ BA2 with another sensorless OPB pixel 60B adjacent in the Y-axis direction (or X-axis direction, or X-axis direction and Y-axis direction). can do.
  • the image pickup apparatus 1 has a defect (for example, whitening) in the output of the OPB pixel 50B with the sensor due to the overflow of the charge e-from the OPB pixel 60B without the sensor. It can be suppressed from occurring. Further, the image pickup apparatus 1 can reduce the difference in layout between the OPB pixel 50B with a sensor and the OPB pixel 60B without a sensor, and the photoelectric conversion efficiency and wiring capacity between the OPB pixel 50B with a sensor and the OPB pixel 60B without a sensor. Etc. can be brought close to the equivalent. As a result, the image pickup apparatus 1 can reduce the possibility that an error occurs in the calculation of the dark current component, and thus can suppress the deterioration of the image quality.
  • a defect for example, whitening
  • the STI layer 131 may be omitted.
  • the inter-pixel separation unit may be composed of a DTI layer 133 and a P-type impurity diffusion layer, or may be composed of only the DTI layer 133.
  • FIG. 16 is a cross-sectional view showing the configuration of the OPB pixel 50C with a sensor according to the modified example of the second embodiment of the present disclosure.
  • FIG. 17 is a cross-sectional view showing the configuration of the OPB pixel 60C without a sensor according to the modified example of the second embodiment of the present disclosure.
  • the inter-pixel separation portion is composed of a DTI layer and a third P + layer 123. Even with such a configuration, the same effect as that of the second embodiment can be obtained.
  • the third P + layer 123 which is a pixel-to-pixel separation unit, is located between adjacent pixels of the sensorless OPB pixels 60 (or between adjacent pixels of the sensorless OPB pixel 60 and the overflow drain pixel 70). It has been described that there is a region R121 in which a part is removed, and the N + layers 110 of both pixels are connected to each other via this region R121. Further, it has been explained that the barrier ⁇ BA2 (or the barrier ⁇ BA3) is formed between the adjacent pixels by this configuration. However, in the embodiment of the present disclosure, an impurity diffusion layer other than the N + layer 110 is interposed between one N + layer 110 connected via the above region R121 and the other N + layer 120. The barrier ⁇ BA2 (or the barrier ⁇ BA3) may be formed by another impurity diffusion layer.
  • FIG. 18 is a cross-sectional view showing a configuration example of the OPB region R1A according to the third embodiment of the present disclosure.
  • an N-type or N-type impurity diffusion layer 130 having a lower N-type impurity concentration than the N + layer between adjacent pixels of the sensorless OPB pixels 60 (the present disclosure).
  • An example of a "fourth impurity diffusion layer" is provided.
  • the N-type or N-type impurity diffusion layer 130 forms a barrier ⁇ BA2 between adjacent pixels of the sensorless OPB pixels 60.
  • an N-type or N-type impurity diffusion layer 130 is also provided between the adjacent pixels of the OPB pixel 60 without a sensor and the overflow / drain pixel 70.
  • the N-type or N-type impurity diffusion layer 130 forms a barrier ⁇ BA3 between the adjacent pixels of the OPB pixel 60 without a sensor and the overflow drain pixel 70.
  • the image pickup apparatus 1 has the same effect as that of the first and second embodiments. Further, in the third embodiment, the potential of the barrier ⁇ BA2 can be controlled to a desired value by adjusting the concentration of the N-type impurity in the impurity diffusion layer 130 and the horizontal thickness of the impurity diffusion layer 130. ..
  • the present disclosure may also have the following structure.
  • a pixel area provided on the semiconductor layer that receives light from the subject An optical black region provided on the semiconductor layer and shielded from the light is provided.
  • the optical black region is The first pixel having a sensor function of detecting the light and outputting a signal, There is a first barrier that hinders the movement of electric charges between the second pixel that does not have the sensor function and the first pixel that has and is adjacent to each other and the second pixel. There is a second barrier that hinders the movement of electric charges between the second pixels that are adjacent to each other.
  • the second barrier is an image pickup device having a deeper potential than the first barrier.
  • the optical black region further comprises a third pixel, which is connected to a preset positive potential.
  • the image pickup apparatus There is a third barrier that hinders the transfer of electric charge between the second pixel and the third pixel that are adjacent to each other.
  • the image pickup apparatus according to (1), wherein the third barrier has a deeper potential than the first barrier.
  • the first pixel has a first gate electrode for transferring the charge generated by the first pixel.
  • the second pixel has a second gate electrode having the same structure as the first gate electrode.
  • Around the second gate electrode there is a fourth barrier that hinders the transfer of electric charge.
  • the imaging device according to any one of (1) to (3), wherein the second barrier has a deeper potential than the fourth barrier.
  • the potential of the fourth barrier is The image pickup apparatus according to (4) above, wherein the depth is the same when a voltage is applied to the second gate electrode and when the voltage is not applied to the second gate electrode.
  • the third pixel has a third gate electrode and has a third gate electrode. Around the third gate electrode, there is a fifth barrier that hinders the transfer of electric charge.
  • the optical black region is Further, an inter-pixel separation unit provided around each of the first pixel and the second pixel is provided.
  • the inter-pixel separation portion forms the first barrier, and the inter-pixel separation portion forms the first barrier.
  • the image pickup apparatus according to any one of (1) to (7) above, wherein one or more non-separable regions in which the inter-pixel separation portion is not arranged are provided around the second pixel. .. (9)
  • Each of the first pixel and the second pixel The first conductive type first impurity diffusion layer and It has a second conductive type second impurity diffusion layer bonded to the first impurity diffusion layer.
  • Image pickup device 10 Semiconductor layer 10a, 110a One side 12 Pixel array unit 13 Vertical drive circuit 14 Column signal processing circuit 15 Horizontal drive circuit 16 Output circuit 17 Control circuit 21 Pixel 22 Horizontal signal line 23 Vertical signal line 24 Data output signal line 30 Read circuit 31 Photodiode 32 Transfer transistor 34 Amplification transistor 35 Selective transistor 36 Reset transistor 50, 50A, 50B, 50C OPB pixel 60, 60A, 60B, 60C without sensor OPB pixel 70 Overflow drain pixel 90 Light-shielding metal 110 N + layer 110b The other surface 120 P + layer 121, 121A 1st P + layer 122 2nd P + layer 123 3rd P + layer 130 impurity diffusion layer 131 STI layer 133 DTI layer CF color filter FD floating diffusion H1, H2 hole HG1, HG2 horizontal gate electrode ML micro Lens PD photodiode R0 normal pixel area R1, R1A OPB area R11 with sensor OPB pixel area R12 without sensor OPB pixel area R13 overflow drain pixel area

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Abstract

L'invention concerne un dispositif d'imagerie permettant de supprimer toute diminution de la qualité d'image. Ce dispositif d'imagerie comprend une zone de pixels disposée sur une couche semi-conductrice et recevant la lumière provenant d'un objet, et une zone noire optique disposée sur la couche semi-conductrice et protégée contre la lumière. La zone noire optique comporte un premier pixel doté d'une fonction de capteur pour détecter la lumière et émettre un signal, et un deuxième pixel non doté de fonction de capteur. Une première paroi barrière destinée à empêcher le mouvement de charge est présente entre des premier et deuxième pixels mutuellement adjacents. Une deuxième paroi barrière destinée à empêcher le mouvement de charge est présente entre des deuxièmes pixels mutuellement adjacents. La deuxième paroi barrière présente un potentiel plus profond que la première paroi barrière.
PCT/JP2021/039570 2020-11-11 2021-10-27 Dispositif d'imagerie WO2022102400A1 (fr)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008205905A (ja) * 2007-02-21 2008-09-04 Sony Corp 固体撮像装置および撮像装置
JP2013069958A (ja) * 2011-09-26 2013-04-18 Sony Corp 撮像素子、撮像装置、並びに、製造装置および方法
JP2013118573A (ja) * 2011-12-05 2013-06-13 Nikon Corp 撮像装置
JP2019096914A (ja) * 2019-03-18 2019-06-20 株式会社東芝 固体撮像装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008205905A (ja) * 2007-02-21 2008-09-04 Sony Corp 固体撮像装置および撮像装置
JP2013069958A (ja) * 2011-09-26 2013-04-18 Sony Corp 撮像素子、撮像装置、並びに、製造装置および方法
JP2013118573A (ja) * 2011-12-05 2013-06-13 Nikon Corp 撮像装置
JP2019096914A (ja) * 2019-03-18 2019-06-20 株式会社東芝 固体撮像装置

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