WO2022095157A1 - 发光基板及显示装置 - Google Patents

发光基板及显示装置 Download PDF

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Publication number
WO2022095157A1
WO2022095157A1 PCT/CN2020/131721 CN2020131721W WO2022095157A1 WO 2022095157 A1 WO2022095157 A1 WO 2022095157A1 CN 2020131721 W CN2020131721 W CN 2020131721W WO 2022095157 A1 WO2022095157 A1 WO 2022095157A1
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WO
WIPO (PCT)
Prior art keywords
light
control signal
signal input
input end
transistor
Prior art date
Application number
PCT/CN2020/131721
Other languages
English (en)
French (fr)
Inventor
李艳
张翼鹤
李利霞
全海燕
韩斗淵
Original Assignee
Tcl华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tcl华星光电技术有限公司 filed Critical Tcl华星光电技术有限公司
Priority to US17/251,980 priority Critical patent/US11776488B2/en
Publication of WO2022095157A1 publication Critical patent/WO2022095157A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G09G3/3413—Details of control of colour illumination sources
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G09G3/342—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/024—Scrolling of light from the illumination source over the display in combination with the scanning of the display screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0204—Compensation of DC component across the pixels in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Definitions

  • the present application relates to the field of display technology, and in particular, to a light-emitting substrate and a display device.
  • the waveform difference of the signals (data signals and scan signals) at the near and far ends of the signal input terminals (data signal input and scan signal input) will cause the brightness difference of the sub-millimeter light-emitting diodes at the near and far ends. Obviously, especially for a backlight module with a larger size, the difference in brightness will be larger, which will affect the display effect of the display device.
  • the purpose of the present application is to provide a light-emitting substrate and a display device, so as to improve the display problem caused by the difference in brightness between the near end and the far end of the light-emitting substrate.
  • the present application provides a light-emitting substrate, the light-emitting substrate comprising:
  • a plurality of drive circuits each of which includes:
  • the gate of the switch transistor is connected to the first control signal line, and the first pole of the switch transistor is connected to the data line;
  • the gate of the driving transistor is connected to the second electrode of the switching transistor, and one of the first electrode or the second electrode of the driving transistor is connected to the light-emitting element;
  • control unit is connected to one of the first pole or the second pole of the driving transistor, the control unit is in an off state during a preset period when the switching transistor is in an on state , and when the switching transistor is in the conducting state, the period other than the preset period is in the conducting state;
  • the durations of the preset time periods of the plurality of driving circuits are decreased; and/or,
  • the durations of the preset time periods of the plurality of driving circuits are decreased.
  • the light-emitting substrate further includes a plurality of second control signal lines,
  • the control unit includes a control transistor whose gate is connected to the second control signal line, and the control transistor is connected to the second electrode of the driving transistor.
  • the first control signal line is used to transmit the first control signal
  • the switching transistor is in a conducting state according to the valid first control signal, and the falling edge of the valid first control signal within the preset time period.
  • the light-emitting element is connected to the first electrode of the drive transistor.
  • control unit is in an on state when the switching transistor is in an off state.
  • the light-emitting substrate is a display panel or a backlight module.
  • the durations of the preset periods of the plurality of driving circuits decrease, and when approaching the first
  • the control signal input end points in a direction away from the first control signal input end, and the durations of the preset time periods of the plurality of driving circuits are decreased.
  • the light-emitting element is selected from at least one of sub-millimeter light-emitting diodes, micro light-emitting diodes, and organic light-emitting diodes.
  • the light-emitting substrate further includes a data driving circuit and a gate driving circuit
  • the data signal input ends of the plurality of data lines are connected to the data driving circuit
  • the first control signal input terminals of the plurality of first control signal lines are connected to the gate driving circuit.
  • the display device includes a light-emitting substrate, and the light-emitting substrate includes:
  • a plurality of drive circuits each of which includes:
  • the gate of the switch transistor is connected to the first control signal line, and the first pole of the switch transistor is connected to the data line;
  • the gate of the driving transistor is connected to the second electrode of the switching transistor, and one of the first electrode or the second electrode of the driving transistor is connected to the light-emitting element;
  • control unit is connected to one of the first pole or the second pole of the driving transistor, the control unit is in an off state during a preset period when the switching transistor is in an on state , and when the switching transistor is in the conducting state, the period other than the preset period is in the conducting state;
  • the durations of the preset time periods of the plurality of driving circuits are decreased; and/or,
  • the durations of the preset time periods of the plurality of driving circuits are decreased.
  • the light-emitting substrate further includes a plurality of second control signal lines
  • the control unit includes a control transistor whose gate is connected to the second control signal line, and the control transistor is connected to the second electrode of the driving transistor.
  • the first control signal line is used to transmit the first control signal
  • the switch transistor is in a conducting state according to the valid first control signal, and the falling edge of the valid first control signal within the preset time period.
  • the light-emitting element is connected to the first electrode of the drive transistor.
  • control unit is in an on state when the switching transistor is in an off state.
  • the light-emitting substrate is a display panel or a backlight module.
  • the durations of the preset periods of the plurality of driving circuits decrease, and when approaching the first
  • the control signal input end points in a direction away from the first control signal input end, and the durations of the preset time periods of the plurality of driving circuits are decreased.
  • the light-emitting element is selected from at least one of sub-millimeter light-emitting diodes, micro light-emitting diodes, and organic light-emitting diodes.
  • the light-emitting substrate further includes a data driving circuit and a gate driving circuit
  • the data signal input ends of the plurality of data lines are connected to the data driving circuit
  • the first control signal input terminals of the plurality of first control signal lines are connected to the gate driving circuit.
  • the present application provides a light-emitting substrate and a display device, in which the durations of preset time periods of a plurality of driving circuits are decreased in a direction from approaching a data signal input end to a direction away from the data signal input end; and/or, when approaching a first control
  • the signal input end points in the direction away from the first control signal input end, and the preset time periods of the plurality of driving circuits decrease in time, so that the light-emitting time of the light-emitting element close to the data signal input end is shorter than the light-emitting time of the light-emitting element far from the data signal input end.
  • the light-emitting time of the light-emitting element close to the first control signal input end is shorter than that of the light-emitting element far from the first control signal input end, which is beneficial to the same light-emitting brightness of the light-emitting element at the near end and the far end, and improves the display.
  • Device display problem the light-emitting time of the light-emitting element close to the first control signal input end is shorter than that of the light-emitting element far from the first control signal input end, which is beneficial to the same light-emitting brightness of the light-emitting element at the near end and the far end, and improves the display.
  • Device display problem is the light-emitting time of the light-emitting element close to the first control signal input end
  • FIG. 1 is a schematic diagram of a drive circuit of a conventional active backlight module
  • FIG. 2 is a timing diagram corresponding to the driving circuit shown in FIG. 1 at the near end of the scan signal input end and the data signal input end, and the far end of the scan signal input end and the data signal input end;
  • FIG. 3 is a schematic plan view of a backlight module according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a driving circuit of the backlight module shown in FIG. 3;
  • FIG. 5 is a timing diagram corresponding to the driving circuit shown in FIG. 4 , which is close to the first control signal input terminal and the data signal input terminal and far away from the first control signal input terminal and the data signal input terminal.
  • FIG. 1 is a schematic diagram of a driving circuit of a conventional active backlight module.
  • the timing diagram corresponding to the driving circuit shown in Figure 1.
  • the driving circuit of the conventional active backlight module includes a driving transistor M2, a switching transistor M1 and a light emitting diode LED.
  • the gate of the switching transistor M1 is connected to the scan signal line Scan
  • the first electrode of the switching transistor M1 is connected to the data line Data
  • the second electrode of the switching transistor M1 is connected to the gate of the driving transistor M2.
  • the light emitting diode LED is connected between the first pole of the driving transistor M2 and the first power supply signal line VDD
  • the second pole of the driving transistor M2 is connected with the second power supply signal line VSS.
  • Both the driving transistor M2 and the switching transistor M1 are N-type thin film transistors.
  • the scan signal line Scan inputs a high-level scan signal V Scan
  • the data line Data inputs a high-level data signal V Data
  • the switching transistor M1 and the driving transistor M2 are turned on, and the light emitting diode LED emits light.
  • the waveform delay (delay) of the scan signal V Scan (shown by the dotted line) near the input end of the scan signal and the data signal V Data (shown by the dotted line) near the input end of the data signal is relatively light, it is far away from the input end of the scan signal.
  • the waveform delay of the scan signal V Scan (shown by the solid line) at the end and the data signal V Data (shown by the solid line) far from the input end of the data signal is more serious, resulting in the input of the scan signal V Scan close to the input end of the scan signal and close to the input of the data signal.
  • the cumulative brightness of the light-emitting diode LED in the driving circuit of the data signal V Data at the terminal is quite different from the cumulative brightness of the light-emitting diode LED inputting the scan signal V Scan far away from the scan signal input terminal and the data signal V Data far away from the data signal input terminal. It is manifested that the brightness difference between the near and far ends of the backlight module is different.
  • V LED is the voltage across the light-emitting diode LED
  • the solid line in V LED is the voltage across the light-emitting diode LED far away from the scan signal input terminal and the data signal input terminal
  • the dotted line in V LED is close to the scan signal input terminal and the data signal.
  • I LED is the current flowing through the light emitting diode LED
  • the solid line in I LED is the current flowing through the light emitting diode LED far away from the scan signal input terminal and the data signal input terminal
  • the dotted line in I LED is the current flowing through the light emitting diode LED close to the scan signal input terminal and the data signal input terminal. The current of the light-emitting diode LED at the input of the data signal.
  • FIG. 3 is a schematic plan view of a backlight module according to an embodiment of the present application
  • FIG. 4 is a schematic diagram of a driving circuit of the backlight module shown in FIG. 3
  • FIG. 5 is a timing sequence corresponding to the driving circuit shown in FIG. 4 picture.
  • the backlight module includes a substrate 10, a data driving circuit 30, a gate driving circuit, a plurality of driving circuits 20, a plurality of data lines, a plurality of first control signal lines, a plurality of second control signal lines, and a plurality of first power supply signals line VDD and a plurality of second power signal lines VSS.
  • the plurality of data lines include a data line Dn , a data line Dn+1 , a data line Dn+2 , a data line Dn+3 and a data line Dn+4 which are arranged in sequence.
  • the data line D n , the data line D n+1 , the data line D n+2 , the data line D n+3 and the data line D n+4 all extend along the second direction, and are arranged side by side along the first direction, the first direction perpendicular to the second direction.
  • Each data line has a data signal input end, the data signal input end is close to the data driving circuit 30, and the data signal input ends of the plurality of data lines are connected to the data driving circuit 30, and the data driving circuit 30 transmits the data signals to the plurality of data lines.
  • the data driving circuit is a source driver, and the source driver is bound on the substrate 10 .
  • the plurality of first control signal lines include a first control signal line Scan(n), a first control signal line Scan(n+1), a first control signal line Scan(n+2), and a first control signal line Scan(n+2) arranged in sequence.
  • Signal line Scan(n+3) The first control signal line Scan(n), the first control signal line Scan(n+1), the first control signal line Scan(n+2), and the first control signal line Scan(n+3) are all along the first direction extending and arranged side by side along the second direction.
  • Each of the first control signal lines has a first control signal input end, and the first control signal input end is disposed close to the first gate driving circuit 401 .
  • the plurality of first control signal lines are used for transmitting the first control signals.
  • the plurality of second control signal lines include a second control signal line Scan(m), a second control signal line Scan(m+1), a second control signal line Scan(m+2), a second control signal line Scan(m+2), and a second control signal line Scan(m+2) arranged in sequence.
  • Signal line Scan(m+3) The second control signal line Scan(m), the second control signal line Scan(m+1), the second control signal line Scan(m+2), and the second control signal line Scan(m+3) are all along the first direction extending and arranged side by side along the second direction.
  • Each of the second control signal lines is disposed adjacent to each of the first control signal lines.
  • a plurality of second control signal lines are used for transmitting second control signals.
  • the gate driving circuit includes a first gate driving circuit 401 and a second gate driving circuit 402 .
  • the first control signal input terminals of the plurality of first control signal lines are connected to the first gate driving circuit 401 , so that the first control signals output by the first gate driving circuit 401 are output to the plurality of first control signal lines.
  • the plurality of second control signal lines are connected to the second gate driving circuit 402, so that the second control signal output by the second gate driving circuit 402 is output to the plurality of second control signal lines.
  • the first gate driving circuit 401 and the second gate driving circuit 402 may be integrated in the same gate driving chip, and the gate driving chip is bound on the substrate 10 .
  • the first gate driving circuit 401 and the second gate driving circuit 402 may also be disposed on the substrate 10 , and the first gate driving circuit 401 and the second gate driving circuit 402 are disposed on opposite sides of the substrate 10 . It can be understood that, the first gate driving circuit 401 and the second gate driving circuit 402 may also be disposed on the same side of the substrate 10 .
  • a plurality of driving circuits 20 are arranged on the substrate 10 in an array, and the substrate 10 is a glass substrate.
  • Each driving circuit 20 is connected to a data line, a first control signal line, a second control signal line, a first power supply signal line VDD, and a second power supply signal line VSS.
  • the solution of the present application will be described by taking the driving circuit 20 connected to the data line D(n), the first control signal line Scan(n), and the second control signal line Scan(m) as an example.
  • Each driving circuit 20 includes a light emitting element LED, a switching transistor M1 , a driving transistor M2 and a control unit 201 .
  • the light emitting element LED is connected between the first power supply signal line VDD and the second power supply signal line VSS.
  • the first power signal line VDD is input with a DC high level
  • the second power signal line VSS is input with a DC low level.
  • Light is emitted when current passes through the light-emitting element LED.
  • the duration of the current flowing through the light-emitting element LED is different, and the accumulated brightness of the light-emitting element LED is different.
  • the anode of the light-emitting element LED is connected to the first power signal line VDD, and the cathode of the light-emitting element LED is connected to the first pole of the driving transistor M2.
  • the light-emitting element LED is a sub-millimeter light-emitting diode.
  • the gate of the switching transistor M1 is connected to the first control signal line Scan(n), the first pole of the switching transistor M1 is connected to the data line D(n), and the second pole of the switching transistor M1 is connected to the gate of the driving transistor M2.
  • the switching transistor M1 is turned on, and the data signal is transmitted to the gate of the driving transistor M2.
  • the switching transistor M1 is turned off.
  • the switching transistor M1 is an N-type transistor, and the switching transistor M1 is a thin film transistor.
  • the switch transistor M1 may also be a P-type transistor, and the switch transistor M1 may also be a field effect transistor.
  • the gate of the driving transistor M2 is connected to the second pole of the switching transistor M1, one of the first pole and the second pole of the driving transistor M2 is connected to the light-emitting element LED, and the first pole and the second pole of the driving transistor M2 are connected to the light-emitting element LED.
  • One is connected to the second power signal line VSS.
  • the driving transistor M2 is an N-type transistor and is a thin film transistor.
  • the gate of the driving transistor M2 is connected to the second electrode of the switching transistor M1 , the first electrode of the driving transistor M2 is connected to the cathode of the light emitting element LED, and the second electrode of the driving transistor M2 is connected to the control unit 201 .
  • the driving transistor M2 may also be a P-type transistor.
  • the control unit 201 is connected to one of the first pole or the second pole of the driving transistor M2.
  • the control unit 201 is in an off state during a preset period when the switching transistor M1 is in an on state, and is in an on state for a period other than the preset period when the switching transistor M1 is in an on state.
  • control unit 201 includes a control transistor M3, the gate of the control transistor M3 is connected to the second control signal line Scan(m), the first pole of the control transistor M3 is connected to the second pole of the driving transistor M2, and the The second pole is connected to the second power supply signal line VSS.
  • the control transistor M3 is an N-type transistor.
  • the control transistor M3 may also be a P-type transistor.
  • the second control signal is invalid for a preset period within the valid period of the first control signal, and valid for a period other than the preset period within the valid period of the first control signal, so that the control unit 201 is in the switching transistor M1
  • the preset period of the on state is in the off state, and when the switching transistor M1 is in the on state, the period other than the preset period is in the on state.
  • the driving transistor M2 drives the light-emitting element LED to emit light.
  • the time is the first control A time period within the valid period of the signal that overlaps with the valid period of the second control signal.
  • the accumulated brightness of the light-emitting element can be adjusted by controlling the time length of the preset period.
  • the duration of the preset period is less than the duration corresponding to the conduction state of the switching transistor M1 and greater than or equal to 0, for example, the preset period is 1/4, 1/8, 1/12, 1 of the duration of the effective period of the first control signal /16 etc.
  • the durations of the preset periods of the plurality of driving circuits 20 decrease; and/or, in a direction from close to the first control signal input end to away from the first control signal input end In the direction, the durations of the preset time periods of the plurality of driving circuits 20 are decreased.
  • the durations of the preset time periods T of the plurality of driving circuits 20 decrease in the direction from close to the data signal input end to away from the data signal input end, and in the direction from close to the first control signal input end to away from the first control signal input end In the direction of the terminal, the duration of the preset time period T of the plurality of driving circuits 20 decreases, so that the preset time period of the driving circuit 20 that is close to the first control signal input terminal and the data signal input terminal at the same time is larger, and at the same time is far away from the first control signal.
  • the preset time periods of the driving circuits 20 at the input end and the data signal input end are relatively small, so that the brightness of the light emitting elements LED in the driving circuits 20 at the near end and the far end is the same.
  • the first control signal V Scan(n) , the second control signal V Scan(m) and the data signal V D ( n ) indicated by the dotted line are input to the input terminal near the first control signal and the data signal at the same time.
  • the voltage V LED and the current I LED indicated by the dotted line are the voltage and current when the light-emitting element LED in the drive circuit 20a emits light.
  • the first control signal V Scan(n+3) , the second control signal V Scan(m+3), and the data signal V D(n+4) shown by the solid line are input to the input terminal simultaneously away from the first control signal and the data
  • the driving circuit 20b at the signal input end, the voltage V LED and the current I LED shown by the solid line are the voltage and current when the light-emitting element LED in the driving circuit 20b emits light.
  • the duration of the preset period T of the driving circuit 20a that is close to the first control signal input terminal and the data signal input terminal at the same time is 3/8 of the effective period of the first control signal V Scan(n) , that is, the second control signal V Scan (n).
  • the duration of the invalid period T of m) corresponds to 3/8 of the valid period of the first control signal V Scan(n) , and the second control signal V Scan(m) is divided by the valid period of the first control signal V Scan(n) within the valid period of the first control signal V Scan(n).
  • the periods other than the preset period T are all valid, and the duration of the overlapping period of the valid period of the first control signal V Scan(n) and the valid period of the second control signal V Scan(m) is equal to the first control signal V Scan( n) is 5/8 of the duration of the valid period, the light-emitting element LED in the driving circuit 20a emits light for a shorter time, and the current I LED corresponding to the light-emitting element LED is relatively large.
  • the duration of the preset period T of the driving circuit 20b away from the first control signal input terminal and the data signal input terminal at the same time is 0.
  • the first control signal V Scan(n+3) and the second control signal V Scan(m+3) have a The overlapping period is equal to the effective period of V Scan(n+3) of the first control signal, the light-emitting element LED in the driving circuit 20b emits light for a longer time, and the current I LED corresponding to the light-emitting element LED is small.
  • the current I LED of the light emitting element LED of the driving circuit 20a close to the first control signal input terminal and the data signal input terminal is between the valid period of the first control signal V Scan(n) and the valid period of the second control signal V Scan(m) .
  • the brightness accumulated during the overlapping period is equal to the brightness accumulated during the valid period of the first control signal V Scan(n) by the current I LED of the light emitting element LED of the driving circuit 20b far from the first control signal input terminal and the data signal input terminal, such that the first The brightness of the light-emitting element LEDs in the drive circuits at the near and far ends of the control signal input end and the data signal input end are the same.
  • the durations of the preset time periods T of the plurality of driving circuits 20 are decreased, for example, a plurality of driving circuits connected to the same data line.
  • the predetermined period of the driving circuit 20 close to the data driving circuit 30 in the driving circuit 20 is longer than the predetermined period of the driving circuit 20 far from the data driving circuit 30 to improve the impedance of the data line and cause the waveform delay of the data signal to cause brightness difference.
  • the durations of the preset time periods T of the plurality of driving circuits 20 decrease, for example, those connected to the same first control signal line
  • the preset time period of the driving circuit 20 close to the first gate driving circuit 401 among the plurality of driving circuits 20 is longer than the preset time period of the driving circuit 20 far away from the first gate driving circuit 401, so as to improve the impedance due to the first control signal line This results in the waveform delay of the first control signal and the resulting difference in brightness.
  • the control unit 201 is in an on state when the switching transistor M1 is in an off state, so that the control unit 201 is in an on state for a period other than the preset period T.
  • the falling edge of the effective first control signal is located within the preset time period T, so that the light-emitting element LED stops emitting light under the action of the second control signal after the light-emitting element LED emits stably, so as to prevent the light-emitting element LED from emitting light when the light-emitting element LED is unstable and causing the light-emitting element LED to stop emitting light.
  • the brightness of the light is difficult to adjust.
  • the falling edge is the time point when the valid period of the first control signal falls.
  • the present application also provides a display device, which includes the above-mentioned backlight module and a liquid crystal display panel.
  • the liquid crystal display panel is located on the light-emitting side of the backlight module.
  • the brightness of the light-emitting elements of each driving circuit can be adjusted according to the length of the preset period.
  • the duration of the preset time period is decreased; and/or, in the direction from being close to the first control signal input end to the direction away from the first control signal input end, the duration of the preset time periods of the plurality of driving circuits is decreased, so that the light emission close to the data signal input end is
  • the light-emitting time of the element is shorter than the light-emitting time of the light-emitting element far from the data signal input end, and/or the light-emitting time of the light-emitting element close to the first control signal input end is shorter than that of the light-emitting element far from the first control signal input end, It is beneficial for the light emitting elements at the near end and the far end to have the same luminous brightness, thereby improving the display problem of the display device.
  • the display panel may also include a plurality of the above-mentioned driving circuits 20, and correspondingly, the light-emitting element LED may be a micro light-emitting diode (Micro-LED) or an organic light-emitting diode, according to the driving circuit 20 and the first control signal input terminal and The distance between the input end of the data signal makes the brightness of the light-emitting element LEDs at the near end and the far end be the same, which improves the display effect of the display panel.
  • Micro-LED micro light-emitting diode
  • organic light-emitting diode organic light-emitting diode

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Abstract

一种发光基板及显示装置，通过在从靠近数据信号输入端指向远离数据信号输入端的方向上，多个驱动电路的预设时段的时长递减；和/或，在从靠近第一控制信号输入端指向远离第一控制信号输入端的方向上，多个驱动电路的预设时段的时长递减，有利于近端和远端的发光元件的发光亮度相同，改善显示装置的显示问题。

Description

发光基板及显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种发光基板及显示装置。
 背景技术
目前，对于主动式次毫米发光二极管（Mini-LED）背光模组，通常需要扫描线输入扫描信号，数据线输入数据信号，而扫描线和数据线的厚度通常只有几微米，使得扫描线和数据线的阻抗较大，进而导致靠近扫描信号输入端的扫描信号的波形和远离扫描信号输入端的扫描信号的波形会存在差异，且靠近数据信号输入端的数据信号的波形和远离数据信号输入端的数据信号的波形存在差异，信号输入端（数据信号输入端和扫描信号输入端）近端和远端的信号（数据信号以及扫描信号）的波形差异会导致近端和远端的次毫米发光二极管的亮度差异明显，特别是对于尺寸越大的背光模组，亮度差异就会越大，影响显示装置的显示效果。
因此，有必要提出一种技术方案以改善背光模组的近端和远端的亮度差异导致的显示问题。
 技术问题
本申请的目的在于提供一种发光基板及显示装置，以改善发光基板的近端和远端的亮度差异导致的显示问题。
 技术解决方案
为实现上述目的，本申请提供一种发光基板，所述发光基板包括：
多个数据线，每个所述数据线具有数据信号输入端；
多个第一控制信号线，每个所述第一控制信号线具有第一控制信号输入端；以及
多个驱动电路，每个所述驱动电路包括：
发光元件；
开关晶体管，所述开关晶体管的栅极与所述第一控制信号线连接，所述开关晶体管的第一极与所述数据线连接；
驱动晶体管，所述驱动晶体管的栅极与所述开关晶体管的第二极连接，所述驱动晶体管的第一极或第二极中的一者与所述发光元件连接；以及
控制单元，所述控制单元与所述驱动晶体管的所述第一极或所述第二极中的一者连接，所述控制单元在所述开关晶体管处于导通状态的预设时段处于截止状态，且在所述开关晶体管处于导通状态时除所述预设时段外的时段处于导通状态；
其中，在从靠近所述数据信号输入端指向远离所述数据信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减；和/或，
在从靠近所述第一控制信号输入端指向远离所述第一控制信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减。
在上述发光基板中，所述发光基板还包括多个第二控制信号线，
所述控制单元包括控制晶体管，所述控制晶体管的栅极与所述第二控制信号线连接，所述控制晶体管与所述驱动晶体管的所述第二极连接。
在上述发光基板中，所述第一控制信号线用于传输第一控制信号，所述开关晶体管根据有效的所述第一控制信号处于导通状态，有效的所述第一控制信号的下降沿位于所述预设时段内。
在上述发光基板中，所述发光元件与所述驱动晶体管的所述第一极连接。
在上述发光基板中，所述控制单元在所述开关晶体管处于截止状态时处于导通状态。
在上述发光基板中，所述发光基板为显示面板或背光模组。
在上述发光基板中，在从靠近所述数据信号输入端指向远离所述数据信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减，且在从靠近所述第一控制信号输入端指向远离所述第一控制信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减。
在上述发光基板中，所述发光元件选自次毫米发光二极管、微型发光二极管以及有机发光二极管中的至少一种。
在上述发光基板中，所述发光基板还包括数据驱动电路以及栅极驱动电路，
多个所述数据线的所述数据信号输入端与所述数据驱动电路连接；
多个所述第一控制信号线的所述第一控制信号输入端与所述栅极驱动电路连接。
一种显示装置中，所述显示装置包括发光基板，所述发光基板包括：
多个数据线，每个所述数据线具有数据信号输入端；
多个第一控制信号线，每个所述第一控制信号线具有第一控制信号输入端；以及
多个驱动电路，每个所述驱动电路包括：
发光元件；
开关晶体管，所述开关晶体管的栅极与所述第一控制信号线连接，所述开关晶体管的第一极与所述数据线连接；
驱动晶体管，所述驱动晶体管的栅极与所述开关晶体管的第二极连接，所述驱动晶体管的第一极或第二极中的一者与所述发光元件连接；以及
控制单元，所述控制单元与所述驱动晶体管的所述第一极或所述第二极中的一者连接，所述控制单元在所述开关晶体管处于导通状态的预设时段处于截止状态，且在所述开关晶体管处于导通状态时除所述预设时段外的时段处于导通状态；
其中，在从靠近所述数据信号输入端指向远离所述数据信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减；和/或，
在从靠近所述第一控制信号输入端指向远离所述第一控制信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减。
在上述显示装置中，所述发光基板还包括多个第二控制信号线，
所述控制单元包括控制晶体管，所述控制晶体管的栅极与所述第二控制信号线连接，所述控制晶体管与所述驱动晶体管的所述第二极连接。
在上述显示装置中，所述第一控制信号线用于传输第一控制信号，所述开关晶体管根据有效的所述第一控制信号处于导通状态，有效的所述第一控制信号的下降沿位于所述预设时段内。
在上述显示装置中，所述发光元件与所述驱动晶体管的所述第一极连接。
在上述显示装置中，所述控制单元在所述开关晶体管处于截止状态时处于导通状态。
在上述显示装置中，所述发光基板为显示面板或背光模组。
在上述显示装置中，在从靠近所述数据信号输入端指向远离所述数据信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减，且在从靠近所述第一控制信号输入端指向远离所述第一控制信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减。
在上述显示装置中，所述发光元件选自次毫米发光二极管、微型发光二极管以及有机发光二极管中的至少一种。
在上述显示装置中，所述发光基板还包括数据驱动电路以及栅极驱动电路，
多个所述数据线的所述数据信号输入端与所述数据驱动电路连接；
多个所述第一控制信号线的所述第一控制信号输入端与所述栅极驱动电路连接。
 有益效果
本申请提供一种发光基板及显示装置，通过在从靠近数据信号输入端指向远离数据信号输入端的方向上，多个驱动电路的预设时段的时长递减；和/或，在从靠近第一控制信号输入端指向远离第一控制信号输入端的方向上，多个驱动电路的预设时段的时长递减，使得靠近数据信号输入端的发光元件的发光时间相对于远离数据信号输入端的发光元件的发光时间较短，和/或，使得靠近第一控制信号输入端的发光元件相对于远离第一控制信号输入端的发光元件的发光时间较短，有利于近端和远端的发光元件的发光亮度相同，改善显示装置的显示问题。
 附图说明
图1为传统主动式背光模组的驱动电路的示意图；
图2为扫描信号输入端和数据信号输入端的近端、扫描信号输入端和数据信号输入端的远端的图1所示驱动电路对应的时序图；
图3为本申请实施例背光模组的平面示意图；
图4为图3所示背光模组的驱动电路的示意图；
图5为靠近第一控制信号输入端和数据信号输入端、远离第一控制信号输入端和数据信号输入端的图4所示驱动电路对应的时序图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
请参阅图1及图2，图1为传统主动式背光模组的驱动电路的示意图，图2为扫描信号输入端和数据信号输入端的近端、扫描信号输入端和数据信号输入端的远端的图1所示驱动电路对应的时序图。传统主动式背光模组的驱动电路包括驱动晶体管M2、开关晶体管M1以及发光二极管LED。开关晶体管M1的栅极与扫描信号线Scan连接，开关晶体管M1的第一极与数据线Data连接，开关晶体管M1的第二极与驱动晶体管M2的栅极连接。发光二极管LED连接于驱动晶体管M2的第一极与第一电源信号线VDD之间，驱动晶体管M2的第二极与第二电源信号线VSS连接。驱动晶体管M2和开关晶体管M1均为N型薄膜晶体管。
在发光阶段，扫描信号线Scan输入高电平的扫描信号V Scan，数据线Data输入高电平的数据信号V Data，高电平的扫描信号V Scan和高电平的数据信号V Data的脉冲宽度相同。开关晶体管M1和驱动晶体管M2导通，发光二极管LED发光。
如图2所示，由于靠近扫描信号输入端的扫描信号V Scan（虚线所示）和靠近数据信号输入端的数据信号V Data（虚线所示）的波形延时（delay）较轻，远离扫描信号输入端的扫描信号V Scan（实线所示）和远离数据信号输入端的数据信号V Data（实线所示）的波形延时较严重，导致输入靠近扫描信号输入端的扫描信号V Scan和靠近数据信号输入端的数据信号V Data的驱动电路中的发光二极管LED的累积亮度与输入远离扫描信号输入端的扫描信号V Scan和远离数据信号输入端的数据信号V Data的发光二极管LED的累积亮度存在较大差异，最终表现为背光模组的近远端的亮度差异不同。其中，V LED为发光二极管LED两端的电压，V LED中的实线为远离扫描信号输入端和数据信号输入端的发光二极管LED两端的电压，V LED中的虚线为靠近扫描信号输入端和数据信号输入端的发光二极管LED两端的电压。I LED为流过发光二极管LED的电流，I LED中的实线为流过远离扫描信号输入端和数据信号输入端的发光二极管LED的电流，I LED中的虚线为流过靠近扫描信号输入端和数据信号输入端的发光二极管LED的电流。
请参阅图3-图5，图3为本申请实施例背光模组的平面示意图，图4为图3所示背光模组的驱动电路的示意图，图5为图4所示驱动电路对应的时序图。背光模组包括基板10、数据驱动电路30、栅极驱动电路、多个驱动电路20、多个数据线、多个第一控制信号线、多个第二控制信号线、多个第一电源信号线VDD以及多个第二电源信号线VSS。
多个数据线包括依次排布设置的数据线D n、数据线D n+1、数据线D n+2、数据线D n+3以及数据线D n+4。数据线D n、数据线D n+1、数据线D n+2、数据线D n+3以及数据线D n+4均沿第二方向延伸，且沿第一方向并排设置，第一方向与第二方向垂直。每个数据线具有数据信号输入端，数据信号输入端靠近数据驱动电路30，且多个数据线的数据信号输入端与数据驱动电路30连接，数据驱动电路30将数据信号传输至多个数据线。数据驱动电路为源极驱动器，源极驱动器绑定于基板10上。
多个第一控制信号线包括依次排布设置的第一控制信号线Scan(n)、第一控制信号线Scan(n+1)、第一控制信号线Scan(n+2)以及第一控制信号线Scan(n+3)。第一控制信号线Scan(n)、第一控制信号线Scan(n+1)、第一控制信号线Scan(n+2)以及第一控制信号线Scan(n+3)均沿第一方向延伸，且沿第二方向并排设置。每个第一控制信号线具有第一控制信号输入端，第一控制信号输入端靠近第一栅极驱动电路401设置。多个第一控制信号线用于传输第一控制信号。
多个第二控制信号线包括依次排布设置的第二控制信号线Scan(m)、第二控制信号线Scan(m+1)、第二控制信号线Scan(m+2)、第二控制信号线Scan(m+3)。第二控制信号线Scan(m)、第二控制信号线Scan(m+1)、第二控制信号线Scan(m+2)、第二控制信号线Scan(m+3)均沿第一方向延伸，且沿第二方向并排设置。每个第二控制信号线与每个第一控制信号线相邻设置。多个第二控制信号线用于传输第二控制信号。
栅极驱动电路包括第一栅极驱动电路401以及第二栅极驱动电路402。多个第一控制信号线的第一控制信号输入端与第一栅极驱动电路401连接，以使第一栅极驱动电路401输出的第一控制信号输出至多个第一控制信号线。多个第二控制信号线与第二栅极驱动电路402连接，以使第二栅极驱动电路402输出的第二控制信号输出至多个第二控制信号线。第一栅极驱动电路401和第二栅极电路402可以集成于同一个栅极驱动芯片中，栅极驱动芯片绑定于基板10上。第一栅极驱动电路401和第二栅极驱动电路402也可以设置于基板10上，且第一栅极驱动电路401和第二栅极驱动电路402设置于基板10的相对两侧。可以理解的是，第一栅极驱动电路401和第二栅极驱动电路402也可以设置于基板10的同一侧。
多个驱动电路20阵列地设置于基板10上，基板10为玻璃基板。每个驱动电路20与一个数据线、一个第一控制信号线、一个第二控制信号线、第一电源信号线VDD以及第二电源信号线VSS连接。以与数据线D（n）、第一控制信号线Scan(n)以及第二控制信号线Scan(m)连接的驱动电路20为例对本申请的方案进行说明。
每个驱动电路20包括发光元件LED、开关晶体管M1、驱动晶体管M2以及控制单元201。
发光元件LED连接于第一电源信号线VDD和第二电源信号线VSS之间。第一电源信号线VDD输入直流高电平，第二电源信号线VSS输入直流低电平。电流经过发光元件LED时发出光。电流流过发光元件LED的时长不同，发光元件LED累积的亮度不同。
具体地，发光元件LED的阳极与第一电源信号线VDD连接，发光元件LED的阴极与驱动晶体管M2的第一极连接。发光元件LED为次毫米发光二极管。
开关晶体管M1的栅极与第一控制信号线Scan(n)连接，开关晶体管M1的第一极与数据线D（n）连接，开关晶体管M1的第二极与驱动晶体管M2的栅极连接。第一控制信号有效时，开关晶体管M1导通，数据信号传输至驱动晶体管M2的栅极。第一控制信号无效时，开关晶体管M1截止。
具体地，开关晶体管M1为N型晶体管，且开关晶体管M1为薄膜晶体管。在其他实施例中，开关晶体管M1也可以为P型晶体管，开关晶体管M1也可以为场效应管。
驱动晶体管M2的栅极与开关晶体管M1的第二极连接，驱动晶体管M2的第一极和第二极中的一者与发光元件LED连接，驱动晶体管M2的第一极和第二极中的一者与第二电源信号线VSS连接。驱动晶体管M2导通时输出驱动电流，以驱动发光元件LED发光。
具体地，驱动晶体管M2为N型晶体管，且为薄膜晶体管。驱动晶体管M2的栅极与开关晶体管M1的第二极连接，驱动晶体管M2的第一极与发光元件LED的阴极连接，驱动晶体管M2的第二极与控制单元201连接。驱动晶体管M2也可以为P型晶体管。
控制单元201与驱动晶体管M2的第一极或第二极中的一者连接。控制单元201在开关晶体管M1处于导通状态的预设时段处于截止状态，且在开关晶体管M1处于导通状态时除预设时段外的时段处于导通状态。
具体地，控制单元201包括控制晶体管M3，控制晶体管M3的栅极与第二控制信号线Scan(m)连接，控制晶体管M3的第一极与驱动晶体管M2的第二极连接，控制晶体管M3的第二极与第二电源信号线VSS连接。第二控制信号有效时，控制单元201处于导通状态；第二控制信号无效时，控制单元201处于截止状态。控制晶体管M3为N型晶体管。控制晶体管M3也可以为P型晶体管。
第二控制信号在第一控制信号的有效时段内的预设时段为无效，且在第一控制信号的有效时段内除预设时段外的时段为有效，以使得控制单元201在开关晶体管M1处于导通状态的预设时段处于截止状态，且在开关晶体管M1处于导通状态时除预设时段外的时段处于导通状态，对应地，驱动晶体管M2驱动发光元件LED发光的时间为第一控制信号有效时段内与第二控制信号的有效时段交叠的时间段。通过控制预设时段的时间长度可以调节发光元件的累积亮度。预设时段越短，则发光元件LED的发光时间越长；预设时段越长，则发光元件LED的发光时间越短。预设时段的时长小于开关晶体管M1的导通状态对应的时长且大于或等于0，例如预设时段为第一控制信号的有效时段的时长的1/4、1/8、1/12、1/16等。
在从靠近数据信号输入端指向远离数据信号输入端的方向上，多个驱动电路20的预设时段的时长递减；和/或，在从靠近第一控制信号输入端指向远离第一控制信号输入端的方向上，多个驱动电路20的预设时段的时长递减。
具体地，在从靠近数据信号输入端指向远离数据信号输入端的方向上，多个驱动电路20的预设时段T的时长递减，且在从靠近第一控制信号输入端指向远离第一控制信号输入端的方向上，多个驱动电路20的预设时段T的时长递减，以使得同时靠近第一控制信号输入端和数据信号输入端的驱动电路20的预设时段较大，且同时远离第一控制信号输入端和数据信号输入端的驱动电路20的预设时段较小，进而使得近端和远端的驱动电路20中的发光元件LED的亮度相同。
如图5所示，虚线所示的第一控制信号V Scan(n)、第二控制信号V Scan(m)、数据信号V D （ n ）输入至同时靠近第一控制信号输入端和数据信号输入端的驱动电路20a，虚线所示电压V LED以及电流I LED为驱动电路20a中的发光元件LED发光时的电压和电流。实线所示的第一控制信号V Scan(n+3)、第二控制信号V Scan(m+3)以及数据信号V D(n+4)输入至同时远离第一控制信号输入端和数据信号输入端的驱动电路20b，实线所示电压V LED以及电流I LED为驱动电路20b中的发光元件LED发光时的电压和电流。
同时靠近第一控制信号输入端和数据信号输入端的驱动电路20a的预设时段T的时长为第一控制信号V Scan(n)有效时段的时长的3/8，即第二控制信号V Scan(m)的无效时段T的时长对应第一控制信号V Scan(n)有效时段的时长的3/8，第二控制信号V Scan(m)在第一控制信号V Scan(n)有效时段内除预设时段T之外的时段均为有效，第一控制信号V Scan(n)的有效时段和第二控制信号V Scan(m) 的有效时段的重叠时段的时长等于第一控制信号V Scan(n)的有效时段的时长的5/8，驱动电路20a中发光元件LED发光的时间较短，发光元件LED发光对应的电流I LED较大。同时远离第一控制信号输入端和数据信号输入端的驱动电路20b的预设时段T的时长为0，第一控制信号V Scan(n+3)与第二控制信号V Scan(m+3) 的重叠时段等于第一控制信号的V Scan(n+3)的有效时段，驱动电路20b中发光元件LED发光的时间较长，发光元件LED发光对应的电流I LED较小。靠近第一控制信号输入端和数据信号输入端的驱动电路20a的发光元件LED的电流I LED在第一控制信号V Scan(n)的有效时段和第二控制信号V Scan(m)的有效时段的重叠时段累积的亮度等于远离第一控制信号输入端和数据信号输入端的驱动电路20b的发光元件LED的电流I LED在第一控制信号V Scan(n)的有效时段内累积的亮度，使得第一控制信号输入端以及数据信号输入端的近端和远端的驱动电路中的发光元件LED的亮度相同。
可以理解的是，也可以在第二方向上，从靠近数据信号输入端指向远离数据信号输入端，多个驱动电路20的预设时段T的时长递减，例如与同一个数据线连接的多个驱动电路20中靠近数据驱动电路30的驱动电路20的预设时段大于远离数据驱动电路30的驱动电路20的预设时段，以改善数据线的阻抗导致数据信号的波形延时进而导致亮度差异。或者，在第一方向上，从靠近第一控制信号输入端指向远离第一控制信号输入端，多个驱动电路20的预设时段T的时长递减，例如与同一个第一控制信号线连接的多个驱动电路20中靠近第一栅极驱动电路401的驱动电路20的预设时段大于远离第一栅极驱动电路401的驱动电路20的预设时段，以改善由于第一控制信号线的阻抗导致第一控制信号的波形延时进而导致的亮度差异。
控制单元201在开关晶体管M1处于截止状态时处于导通状态，以使得控制单元201在预设时段T外的时段均处于导通状态。
有效的第一控制信号的下降沿位于预设时段T内，以使得发光元件LED稳定发光后在第二控制信号的作用下停止发光，避免发光元件LED发光不稳定时停止发光而导致发光元件LED的发光亮度难以调节。其中，下降沿为第一控制信号有效时段下降的时间点。
本申请还提供一种显示装置，显示装置包括上述背光模组以及液晶显示面板。液晶显示面板位于背光模组的出光侧。
本申请显示装置通过在背光模组上，每个驱动电路的发光元件的亮度通过预设时段的长短可以调节，在从靠近数据信号输入端指向远离数据信号输入端的方向上，多个驱动电路的预设时段的时长递减；和/或，在从靠近第一控制信号输入端指向远离第一控制信号输入端的方向上，多个驱动电路的预设时段的时长递减，使得靠近数据信号输入端的发光元件的发光时间相对于远离数据信号输入端的发光元件的发光时间较短，和/或，使得靠近第一控制信号输入端的发光元件相对于远离第一控制信号输入端的发光元件的发光时间较短，有利于近端和远端的发光元件的发光亮度相同，改善显示装置的显示问题。
可以理解的是，显示面板也可以包括多个上述驱动电路20，对应地，发光元件LED可以为微型发光二极管（Micro-LED）或者有机发光二极管，根据驱动电路20与第一控制信号输入端以及数据信号输入端的远近，以使得近端和远端的发光元件LED的亮度相同，改善显示面板的显示效果。
以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (18)

  1. 一种发光基板，其中，所述发光基板包括：
    多个数据线，每个所述数据线具有数据信号输入端；
    多个第一控制信号线，每个所述第一控制信号线具有第一控制信号输入端；以及
    多个驱动电路，每个所述驱动电路包括：
    发光元件；
    开关晶体管，所述开关晶体管的栅极与所述第一控制信号线连接，所述开关晶体管的第一极与所述数据线连接；
    驱动晶体管，所述驱动晶体管的栅极与所述开关晶体管的第二极连接，所述驱动晶体管的第一极或第二极中的一者与所述发光元件连接；以及
    控制单元，所述控制单元与所述驱动晶体管的所述第一极或所述第二极中的一者连接，所述控制单元在所述开关晶体管处于导通状态的预设时段处于截止状态，且在所述开关晶体管处于导通状态时除所述预设时段外的时段处于导通状态；
    其中，在从靠近所述数据信号输入端指向远离所述数据信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减；和/或，
    在从靠近所述第一控制信号输入端指向远离所述第一控制信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减。
  2. 根据权利要求1所述的发光基板，其中，所述发光基板还包括多个第二控制信号线，
    所述控制单元包括控制晶体管，所述控制晶体管的栅极与所述第二控制信号线连接，所述控制晶体管与所述驱动晶体管的所述第二极连接。
  3. 根据权利要求1所述的发光基板，其中，所述第一控制信号线用于传输第一控制信号，所述开关晶体管根据有效的所述第一控制信号处于导通状态，有效的所述第一控制信号的下降沿位于所述预设时段内。
  4. 根据权利要求1所述的发光基板，其中，所述发光元件与所述驱动晶体管的所述第一极连接。
  5. 根据权利要求1所述的发光基板，其中，所述控制单元在所述开关晶体管处于截止状态时处于导通状态。
  6. 根据权利要求1所述的发光基板，其中，所述发光基板为显示面板或背光模组。
  7. 根据权利要求1所述的发光基板，其中，在从靠近所述数据信号输入端指向远离所述数据信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减，且在从靠近所述第一控制信号输入端指向远离所述第一控制信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减。
  8. 根据权利要求1所述的发光基板，其中，所述发光元件选自次毫米发光二极管、微型发光二极管以及有机发光二极管中的至少一种。
  9. 根据权利要求1所述的发光基板，其中，所述发光基板还包括数据驱动电路以及栅极驱动电路，
    多个所述数据线的所述数据信号输入端与所述数据驱动电路连接；
    多个所述第一控制信号线的所述第一控制信号输入端与所述栅极驱动电路连接。
  10. 一种显示装置，其中，所述显示装置包括发光基板，所述发光基板包括：
    多个数据线，每个所述数据线具有数据信号输入端；
    多个第一控制信号线，每个所述第一控制信号线具有第一控制信号输入端；以及
    多个驱动电路，每个所述驱动电路包括：
    发光元件；
    开关晶体管，所述开关晶体管的栅极与所述第一控制信号线连接，所述开关晶体管的第一极与所述数据线连接；
    驱动晶体管，所述驱动晶体管的栅极与所述开关晶体管的第二极连接，所述驱动晶体管的第一极或第二极中的一者与所述发光元件连接；以及
    控制单元，所述控制单元与所述驱动晶体管的所述第一极或所述第二极中的一者连接，所述控制单元在所述开关晶体管处于导通状态的预设时段处于截止状态，且在所述开关晶体管处于导通状态时除所述预设时段外的时段处于导通状态；
    其中，在从靠近所述数据信号输入端指向远离所述数据信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减；和/或，
    在从靠近所述第一控制信号输入端指向远离所述第一控制信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减。
  11. 根据权利要求10所述的显示装置，其中，所述发光基板还包括多个第二控制信号线，
    所述控制单元包括控制晶体管，所述控制晶体管的栅极与所述第二控制信号线连接，所述控制晶体管与所述驱动晶体管的所述第二极连接。
  12. 根据权利要求10所述的显示装置，其中，所述第一控制信号线用于传输第一控制信号，所述开关晶体管根据有效的所述第一控制信号处于导通状态，有效的所述第一控制信号的下降沿位于所述预设时段内。
  13. 根据权利要求10所述的显示装置，其中，所述发光元件与所述驱动晶体管的所述第一极连接。
  14. 根据权利要求10所述的显示装置，其中，所述控制单元在所述开关晶体管处于截止状态时处于导通状态。
  15. 根据权利要求10所述的显示装置，其中，所述发光基板为显示面板或背光模组。
  16. 根据权利要求10所述的显示装置，其中，在从靠近所述数据信号输入端指向远离所述数据信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减，且在从靠近所述第一控制信号输入端指向远离所述第一控制信号输入端的方向上，多个所述驱动电路的所述预设时段的时长递减。
  17. 根据权利要求10所述的显示装置，其中，所述发光元件选自次毫米发光二极管、微型发光二极管以及有机发光二极管中的至少一种。
  18. 根据权利要求10所述的显示装置，其中，所述发光基板还包括数据驱动电路以及栅极驱动电路，多个所述数据线的所述数据信号输入端与所述数据驱动电路连接；
    多个所述第一控制信号线的所述第一控制信号输入端与所述栅极驱动电路连接。
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