WO2022089155A1 - 一种印制电路板及其制造方法 - Google Patents

一种印制电路板及其制造方法 Download PDF

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Publication number
WO2022089155A1
WO2022089155A1 PCT/CN2021/122266 CN2021122266W WO2022089155A1 WO 2022089155 A1 WO2022089155 A1 WO 2022089155A1 CN 2021122266 W CN2021122266 W CN 2021122266W WO 2022089155 A1 WO2022089155 A1 WO 2022089155A1
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impedance
signal
circuit board
printed circuit
signal via
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PCT/CN2021/122266
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English (en)
French (fr)
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倪建丽
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南京中兴软件有限责任公司
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Publication of WO2022089155A1 publication Critical patent/WO2022089155A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means

Definitions

  • the embodiments of the present application relate to the field of communications, and in particular, to a printed circuit board and a method for manufacturing the same.
  • An embodiment of the present application provides a printed circuit board, comprising: a plurality of stacked boards, a conductive layer disposed between adjacent boards, a signal via hole penetrating the board and the conductive layer, and an impedance arranged around the signal via hole
  • the adjustment part, the impedance adjustment part is used to adjust the impedance of the signal via.
  • An embodiment of the present application also provides a method for manufacturing a printed circuit board, including: determining an initial impedance of a signal via hole in the printed circuit board; determining a difference between the initial impedance and the target impedance of the signal via hole; If the threshold is set, the impedance adjustment part is set to surround the signal via, so that the difference between the impedance of the signal via and the target impedance is smaller than the preset threshold.
  • FIG. 1 is a cross-sectional view of a printed circuit board provided in Embodiment 1 of the present application;
  • Fig. 2 is a partial enlarged view of part A in Fig. 1;
  • FIG. 3 is a flowchart of a method for manufacturing a printed circuit board provided in Embodiment 2 of the present application;
  • Fig. 4 is the impedance gain diagram of the signal via hole after the impedance adjustment part is arranged in the second embodiment of the present application;
  • FIG. 5 is a cross-sectional view of a printed circuit board provided in Embodiment 3 of the present application.
  • FIG. 6 is a cross-sectional view of a printed circuit board provided in Embodiment 4 of the present application.
  • FIG. 7 is a cross-sectional view of a printed circuit board provided in Embodiment 5 of the present application.
  • Figure 8(2) is a cross-sectional view of the second type of printed circuit board provided in the sixth embodiment of the present application.
  • FIG. 8(3) is a cross-sectional view of the third printed circuit board provided in the sixth embodiment of the present application.
  • Figure 8(4) is a cross-sectional view of the fourth printed circuit board provided in the sixth embodiment of the present application.
  • Figure 8(5) is a cross-sectional view of the fifth printed circuit board provided by the sixth embodiment of the present application.
  • FIG. 8(6) is a cross-sectional view of the sixth printed circuit board provided in the sixth embodiment of the present application.
  • the main purpose of the embodiments of the present application is to provide a printed circuit board and a manufacturing method thereof, which can improve the impedance continuity of signal vias and ensure signal transmission when the signal rate of the printed circuit board is getting higher and higher. stability.
  • an embodiment of the present application provides a printed circuit board, comprising: a plurality of stacked boards, a conductive layer disposed between adjacent boards, signal vias penetrating the board and the conductive layer, and a surrounding signal
  • the impedance adjustment part provided by the via hole is used to adjust the impedance of the signal via hole.
  • an embodiment of the present application also provides a method for manufacturing a printed circuit board, comprising: determining an initial impedance of a signal via hole in the printed circuit board; determining a difference between the initial impedance and the target impedance of the signal via hole; If the difference is greater than the preset threshold, the impedance adjustment part is set to surround the signal via, so that the difference between the impedance of the signal via and the target impedance is smaller than the preset threshold.
  • a printed circuit board and a manufacturing method thereof proposed in the present application use an impedance adjustment part arranged around a signal via hole to adjust the impedance of the signal via hole in the printed circuit board, so that the difference between the impedance of the signal via hole and the target impedance If it is less than the preset threshold, the impedance continuity of the signal via hole is improved to ensure the stability of signal transmission.
  • FIG. 1 is a cross-sectional view of a printed circuit board according to Embodiment 1 of the present application cut down from the top surface;
  • FIG. 2 is a partial enlarged view of part A in FIG. 1 .
  • the first embodiment of the present application provides a printed circuit board, comprising: a plurality of stacked boards 101 , a conductive layer 104 disposed between adjacent boards 101 , a part of the board 101 and a portion of the board 101 penetrating downward from the top of the printed circuit board
  • the signal vias 102 of the conductive layer 104 and the impedance adjusting part 110 disposed around the signal vias 102 are used for adjusting the impedance of the signal vias 102 .
  • the printed circuit board is also provided with a ground hole 103 penetrating the printed circuit board, and an inner fan-out line layer 105 surrounding the signal via hole 102 . 101 Same layer settings.
  • the impedance adjusting portion 110 is formed by connecting a non-metallic medium 106 and a signal copper 107 , the signal copper 107 surrounds the signal via 102 , and the non-metallic medium 106 surrounds the signal copper 107 .
  • the conductive layer 104 is provided with an anti-pad area 108, and the impedance adjustment part is arranged in the anti-pad area 108 of the conductive layer 104, so that the difference between the impedance of the signal via 102 and the target impedance is less than a preset threshold, and the signal via 102 is improved.
  • the impedance continuity ensures the stability of signal transmission.
  • FIG. 3 is a flowchart of a method for manufacturing a printed circuit board provided in Embodiment 2 of the present application
  • FIG. 4 is a graph of the impedance gain of signal vias after the impedance adjustment unit is set in Embodiment 2 of the present application .
  • the second embodiment of the present application provides a flowchart of a method for manufacturing a printed circuit board.
  • the method for manufacturing a printed circuit board provided in Embodiment 2 of the present application includes the following steps:
  • the initial impedance of the signal via 102 of the printed circuit board that is, the dielectric constant of the original medium in the signal via 102 of the printed circuit board, the aperture of the signal via 102, the structure of the signal via 102 and the anti-pad of the signal via 102
  • the parameters such as diameter are simulated to confirm the initial impedance of the signal via 102 .
  • the inductive reactance and capacitive reactance of the signal via 102 can be calculated by the following formulas respectively:
  • ZL is the inductive reactance of the signal via
  • j is the imaginary unit
  • ⁇ is the angular frequency of the signal via
  • L is the parasitic inductance of the signal via
  • ZC is the capacitive reactance of the signal via
  • C is the parasitic capacitance of the signal via
  • H is the length of the signal via
  • D is the diameter of the via pad
  • d is the inner diameter of the signal via
  • D2 is the diameter of the anti-pad
  • ⁇ is the pi
  • ⁇ is the dielectric constant of the original medium in the signal via.
  • the initial impedance of the signal via includes the inductive reactance and capacitive reactance of the signal via.
  • the inductive reactance and capacitive reactance of the signal via can be calculated according to the above formulas (1), (2), (3) and (4).
  • S12 Determine the difference between the initial impedance and the target impedance of the signal via.
  • the difference between the initial impedance and the target impedance of the signal via is compared to a preset threshold.
  • step S14 If the value obtained by subtracting the preset threshold from the difference is a positive number, it is determined that the difference is greater than the preset threshold, and step S14 is performed;
  • the difference value minus the preset threshold value is 0 or a negative number, it is determined that the difference value is not greater than the preset threshold value, and there is no need to adjust the signal via.
  • the target capacitance value can be obtained inversely according to the above formula 2.
  • S15 Set the signal copper to surround the signal via hole and set the non-metallic medium to surround the signal copper; determine the thickness and area of the signal copper and the dielectric constant of the non-metallic medium through three-dimensional electromagnetic field parametric simulation.
  • the impedance adjustment part is formed by connecting a non-metallic medium and signal copper, the signal copper surrounds the signal via hole, and the non-metal medium surrounds the signal copper.
  • C is the parasitic capacitance of the signal via
  • ⁇ is the dielectric constant of the medium
  • A is the area of the plate
  • h is the distance between the plates.
  • signal copper is added to the positions corresponding to some layers of the signal vias, and non-metallic dielectrics with different dielectric constants are filled.
  • the dielectric constant of the non-metallic medium and the thickness and area of the signal copper can be simulated by 3D electromagnetic field parameterization.
  • the impedance body adjustment part is arranged in the anti-pad area on the conductive layer of the third, fifth, seventh and ninth layers from top to bottom of the printed circuit board.
  • the anti-pad area of the third conductive layer is filled with a non-metallic medium with a dielectric constant of 3, and signal copper is added to the corresponding signal vias.
  • the signal copper is a ring with a radius of 6 mil (mil ), the copper thickness is 0.5oz (oz), the corresponding anti-pad radius is 10mil, the signal copper surrounds the signal via, and the non-metallic medium surrounds the signal copper; on the fifth, seventh and ninth layers
  • a non-metallic medium with a dielectric constant of 3 is filled, and the signal copper copper thickness added on the corresponding signal via hole is 0.5oz, the non-metallic medium is annular, and Its radius is 7 mil, and the corresponding anti-pad radius is also 10 mil.
  • the signal copper surrounds the signal via, and the non-metallic medium surrounds the signal copper.
  • the conductive layer is a signal layer, and the material of the signal layer is copper.
  • FIG. 4 is a graph of the impedance gain of the signal via hole after the impedance adjustment part is set in the second embodiment of the application.
  • the dotted line in the figure shows the printed circuit board without the impedance adjustment part when transmitting data.
  • the impedance change curve with time it can be obtained that when the time is 0.135ns (ns: nanoseconds), the impedance of the signal via is 99ohm (ohm: ohm); the solid line in the figure is the printing after setting the impedance adjustment part When the circuit board transmits data, the impedance change curve with time can be obtained.
  • the impedance of the signal via is 90.5ohm
  • the impedance of the signal via is reduced by 8.5ohm
  • the impedance continuity is better, and the performance It becomes better and can better meet the application scenarios of high-speed design.
  • those skilled in the art can understand that the difference between the initial impedance and the target impedance of different signal vias is different, and the difference between the initial impedance and the target impedance of each part of the signal via is different, so as to adjust the parameters of the impedance adjustment part, So that the impedance of each part of the signal via is close to the target impedance, the impedance continuity of the signal via is improved, and the stability of the signal transmission is ensured.
  • the thickness and/or area of the signal copper and the dielectric constant of the non-metallic medium are simulated, and the shape of the signal copper, the shape of the non-metallic medium and the shape of the anti-pad are not limited to the ring shape; , the optimized object is not limited to the differential hole in the figure, but also a high-frequency single hole; it is worth noting that the conductive layer can be a signal layer or a plane layer.
  • FIG. 5 is a cross-sectional view of a printed circuit board according to Embodiment 3 of the present application, which is cut from the top surface downward.
  • the printed circuit board provided by the third embodiment of the present application is substantially the same as the printed circuit board provided by the first embodiment.
  • the difference from the first embodiment is that the impedance adjustment part is a non-metallic medium 106, and the non-metallic medium 106 surrounds the signal passing hole 102 .
  • the conductive layer 104 is a signal layer, and the material of the signal layer is copper.
  • the impedance adjustment part is the non-metallic medium 106 and is disposed in the anti-pad area of the conductive layer 104 .
  • the impedance of the signal via hole 102 can be effectively adjusted, thereby ensuring the signal Continuity of via 102 impedance.
  • the difference between the initial impedance and the target impedance of different signal vias 102 is different, and the initial impedance and target impedance of different parts of the same signal via 102 are also different.
  • Different signal vias 102 and different parts of the same signal via 102 need to be set with the dielectric constant of the non-metallic medium 106 so that the initial impedance of each signal via 102 and each part of the signal via 102 is close to its corresponding target impedance.
  • the shape of the filled non-metallic dielectric 106 and the shape of the anti-pad are not limited to a ring shape.
  • FIG. 6 is a cross-sectional view of a printed circuit board according to Embodiment 4 of the present application, which is cut from the top surface downward.
  • the printed circuit board provided by the fourth embodiment of the present application is substantially the same as the printed circuit board provided by the first embodiment.
  • the difference from the first embodiment is that the impedance adjustment part is the signal copper 107, and the signal copper 107 surrounds the signal via hole 102. , a gap 109 is left between the signal copper 107 and the conductive layer 104 .
  • the conductive layer 104 is a signal layer, and the material of the signal layer is copper.
  • the impedance adjustment part is the signal copper 107 and is disposed in the anti-pad area of the conductive layer 104.
  • the difference between the initial impedance and the target impedance of different signal vias 102 is different, and the initial impedance and target impedance of different parts of the same signal via 102 are also different.
  • the thickness and/or area of the signal copper 107 needs to be set for different signal vias 102 and different parts of the same signal via 102, so that the initial impedance of each signal via 102 and each part of the signal via 102 is close to its corresponding target impedance.
  • the shape of the signal copper 107 and the shape of the anti-pad are not limited to the ring shape.
  • FIG. 7 is a cross-sectional view of a printed circuit board according to Embodiment 5 of the present application, which is cut from the top surface downward.
  • the printed circuit board provided by the fifth embodiment of the present application is substantially the same as the printed circuit board provided by the first embodiment, and the difference from the above-mentioned first embodiment is that the impedance adjustment part is the signal copper 107, and the board (not shown in the figure) is located in the phase Between the adjacently laid conductive layers 104 , the impedance adjustment part and one of the plates are arranged in the same layer, and a gap is left between the signal copper 107 and the plate.
  • the conductive layer 104 is a signal layer, and the material of the signal layer is copper.
  • the impedance adjustment part is the signal copper 107 and is disposed on the same layer as one of the boards.
  • the difference between the initial impedance and the target impedance of different signal vias 102 is different, and the initial impedance and target impedance of different parts of the same signal via 102 are also different.
  • the thickness and/or area of the signal copper 107 needs to be set for different signal vias 102 and different parts of the same signal via 102, so that the initial impedance of each signal via 102 and each part of the signal via 102 is close to its corresponding target impedance.
  • the shape of the signal copper 107 and the through holes of the plate corresponding to the anti-pad area of the signal layer 104 are not limited to a ring shape.
  • FIG. 8(1) shows the printed circuit board provided by the sixth embodiment of the present application.
  • the printed circuit board provided by the sixth embodiment of the present application is substantially the same as the printed circuit board provided by the first embodiment, and is the same as the above-mentioned first embodiment.
  • the impedance adjusting part is a non-metallic medium 106, the non-metallic medium 106 surrounds the signal via hole 102; and the non-metallic medium 106 runs through the entire printed circuit board.
  • the conductive layer 104 is a signal layer, and the material of the signal layer is copper. It can be understood that the impedance adjustment part can be adjusted correspondingly throughout the entire printed circuit board, see FIG.
  • the impedance adjustment part penetrates part of the conductive layer 104 of the printed circuit board from above the printed circuit board; see FIG. 8 (3), the impedance adjustment part penetrates part of the conductive layer 104 of the printed circuit board from below the printed circuit board; see FIG. 8(4), the impedance adjustment part penetrates the middle part of the conductive layer 104 of the printed circuit board; see FIG.
  • the impedance adjustment part includes: a first part of the conductive layer 104 penetrating the middle and upper part of the printed circuit board, and a second part penetrating the middle and lower part of the printed circuit board
  • the number of the conductive layers 104 in the middle and upper parts is the same as the number of the conductive layers 104 in the middle and lower parts of the second part of the printed circuit board; referring to FIG.
  • the first part of the layer 104 runs through the middle and lower part of the printed circuit board
  • the second part of the conductive layer 104, the first part runs through the middle and upper part of the printed circuit board
  • the number of conductive layers 104 and the second part runs through the middle and lower part of the printed circuit board
  • the number of partial conductive layers 104 is different.
  • the impedance adjustment part is a non-metallic medium 106, but the position of the impedance adjustment part is not limited to the above several types. According to the actual situation, the position of the impedance adjustment part can be determined by three-dimensional electromagnetic field parametric simulation, and then through Adjusting the capacitance of the signal via can effectively adjust the impedance of the signal via, thereby ensuring the continuity of the impedance of the signal via.

Abstract

本申请实施例提供一种印制电路板，包括：若干堆叠铺设的板材(101)、设置在相邻板材(101)之间的导电层(104)、贯穿板材(101)和导电层(104)的信号过孔(102)，以及环绕信号过孔(102)设置的阻抗调整部(110)，阻抗调整部(110)用于调整信号过孔(102)的阻抗。

Description

一种印制电路板及其制造方法
相关申请的交叉引用
本申请基于申请号为“202011164223.3”、申请日为2020年10月27日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此以引入方式并入本申请。
技术领域
本申请实施例涉及通信领域，特别涉及一种印制电路板及其制造方法。
背景技术
随着系统信号速率越来越高，印制电路板上信号过孔的阻抗连续性的影响变得更为显著。特别是112G+的系统，为保障高速信号的性能需采用低介电常数和低损耗角的板材进行设计，同时随着芯片密度的提升，为了控制“孔与孔”及“线与孔”串扰，设计时使用信号过孔尺寸也越来越小。
然而，在低介电常数以及小尺寸孔的情况下，由于信号过孔的寄生参数，所引入的高阻抗将会导致非常严重的阻抗不连续，从而极大的影响高速信号过孔的性能。
因此，如何在印制电路板的信号速率越来越高的情况下，提升信号过孔的阻抗连续性，保证信号传输的稳定性，成为印制电路板设计以及制造过程中亟待解决的问题。
发明内容
本申请实施例提供了一种印制电路板，包括：若干堆叠铺设的板材、设置在相邻板材之间的导电层、贯穿板材和导电层的信号过孔，以及环绕信号过孔设置的阻抗调整部，阻抗调整部用于调整信号过孔的阻抗。
本申请实施例还提供了一种印制电路板的制造方法，包括：确定印制电路板信号过孔的初始阻抗；确定初始阻抗与信号过孔的目标阻抗的差值；若差值大于预设阈值，则设置阻抗调整部环绕信号过孔，以使得信号过孔的阻抗与目标阻抗的差值小于预设阈值。
附图说明
图1是本申请实施例一提供的一种印制电路板的剖视图；
图2是图1中A部的局部放大图；
图3是本申请实施例二提供的一种印制电路板制造方法的流程图；
图4是本申请实施例二中设置阻抗调整部之后信号过孔的阻抗收益图；
图5是本申请实施例三提供的一种印制电路板的剖视图；
图6是本申请实施例四提供的一种印制电路板的剖视图；
图7是本申请实施例五提供的一种印制电路板的剖视图；
图8(1)是本申请实施例六提供的第一种印制电路板的剖视图；
图8(2)是本申请实施例六提供的第二种印制电路板的剖视图；
图8(3)是本申请实施例六提供的第三种印制电路板的剖视图；
图8(4)是本申请实施例六提供的第四种印制电路板的剖视图；
图8(5)是本申请实施例六提供的第五种印制电路板的剖视图；
图8(6)是本申请实施例六提供的第六种印制电路板的剖视图。
具体实施方式
本申请实施例的主要目的在于提出一种印制电路板及其制造方法，其能够在印制电路板的信号速率越来越高的情况下，提升信号过孔的阻抗连续性，保证信号传输的稳定性。
为实现上述目的，本申请实施例提供了一种印制电路板，包括：若干堆叠铺设的板材、设置在相邻板材之间的导电层、贯穿板材和导电层的信号过孔，以及环绕信号过孔设置的阻抗调整部，阻抗调整部用于调整信号过孔的阻抗。
为实现上述目的，本申请实施例还提供了一种印制电路板的制造方法，包括：确定印制电路板信号过孔的初始阻抗；确定初始阻抗与信号过孔的目标阻抗的差值；若差值大于预设阈值，则设置阻抗调整部环绕信号过孔，以使得信号过孔的阻抗与目标阻抗的差值小于预设阈值。
本申请提出的一种印制电路板及其制造方法，采用环绕信号过孔设置的阻抗调整部，调整印制电路板中信号过孔的阻抗，使得信号过孔的阻抗与目标阻抗的差值小于预设阈值，提升信号过孔的阻抗连续性，保证信号传输的稳定性。
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合附图对本申请的各实施例进行详细的阐述。然而，本领域的普通技术人员可以理解，在本申请各实施例中，为了使读者更好地理解本申请而提出了许多技术细节。但是，即使没有这些技术细节和基于以下各实施例的种种变化和修改，也可以实现本申请所要求保护的技术方案。以下各个实施例的划分是为了描述方便，不应对本申请的具体实现方式构成任何限定，各个实施例在不矛盾的前提下可以相互结合相互引用。
参见图1与图2，图1是本申请实施例一提供的一种印制电路板经顶面向下剖切的剖视图；图2是图1中A部的局部放大图。本申请实施例一提供了一种印制电路板，包括：若干堆叠铺设的板材101、设置在相邻板材101之间的导电层104、从印制电路板顶部向下贯穿部分板材101以及部分导电层104的信号过孔102，以及环绕信号过孔102设置的阻抗调整部110，阻抗调整部110用于调整信号过孔102的阻抗。此外，印制电路板还设有贯穿印制电路板的地孔103，以及环绕信号过孔102的内层扇出线层105，内层扇出线层105与位于印制电路板下部的一层板材101同层设置。
在本实施例中，阻抗调整部110由非金属介质106以及信号铜107相接而成，信号铜107环绕信号过孔102，非金属介质106环绕信号铜107。导电层104设有反焊盘区域108，阻抗调整部设置在导电层104的反焊盘区域108内，使得信号过孔102的阻抗与目标阻抗的差值小于预设阈值，提升信号过孔102的阻抗连续性，保证信号传输的稳定性。
参见图3与图4，图3是本申请实施例二提供的一种印制电路板制造方法的流程图；图4是本申请实施例二中设置阻抗调整部之后信号过孔的阻抗收益图。
本申请实施例二提供了一种印制电路板的制造方法的流程图。本申请实施例二提供的印制电路板制造方法包括如下步骤：
S11:确定印制电路板信号过孔的初始阻抗。
确定印制电路板信号过孔102的初始阻抗，即通过印制电路板信号过孔102中原有介质的介电常数、信号过孔102孔径、信号过孔102结构以及信号过孔102反焊盘直径等参数进行仿真确认信号过孔102的初始阻抗。
具体的说，信号过孔102的感抗和容抗可以分别用下面的公式计算得出：
ZL＝jωL..............................................................(1)
ZC＝1/jωC...........................................................(2)
L＝5.08H[l(4H/d)+1].......................................(3)
C＝πεHD/(D2-D)..................................................(4)
上述公式(1)、(2)、(3)、(4)中ZL为信号过孔的感抗、j为虚数单位、ω为信号过孔的角频率、L为信号过孔的寄生电感、ZC为信号过孔的容抗、C为信号过孔的寄生电容、H为信号过孔的长度、D为过孔盘的直径、d为信号过孔的内径、D2为反焊盘直径、π为圆周率、ε为信号过孔中原有介质的介电常数。
此外，根据上述公式(1)、(2)、(3)、(4)可知，电容值越大时阻抗越小，以及电感值越小时阻抗越小。因此，当在更高速率的系统(如112G等)中为了保障信号性能使用了低介电常数的介质和小孔径的孔进行设计时，将会导致过孔的阻抗偏高，从而影响信号过孔的阻抗连续性，进而影响整个系统的信号完整性。
信号过孔的初始阻抗包括信号过孔的感抗以及容抗。可根据上述公式(1)、(2)、(3)、(4)计算出信号过孔的感抗以及容抗。
S12:确定初始阻抗与信号过孔的目标阻抗的差值。
设立目标阻抗值，确保该目标阻抗值不会影响信号过孔的阻抗连续性，能够保证整个系统的信号完整性。初始阻抗减去信号过孔的目标阻抗得出初始阻抗与信号过孔的目标阻抗的差值。
S13:若差值大于预设阈值。
将初始阻抗与信号过孔的目标阻抗的差值与预设阈值进行比较。
若差值减去预设阈值的得数为正数，则判定差值大于预设阈值，执行步骤S14；
若差值减去预设阈值的得数为0或者负数，则判定差值不大于预设阈值，无需对信号过孔进行调整。
S14:确定信号过孔的目标阻抗对应的目标电容值。
具体的上，确定目标阻抗(也即目标容抗)之后，可根据上述公式2逆向得出目标电容值。
S15:设置信号铜环绕信号过孔以及设置非金属介质环绕信号铜；通过三维电磁场参数化仿真确定信号铜的厚度和面积，及非金属介质的介电常数。
在本实施例中，阻抗调整部由非金属介质以及信号铜相接而成，信号铜环绕信号过孔， 非金属介质环绕信号铜。
具体的说，可根据平面电容的原理：
C＝εA/h.............................................................(5)
上述公式(5)中，C为信号过孔的寄生电容，ε为介质的介电常数，A为平板的面积，h为平板间距。
进而在信号过孔某些层对应的位置增加信号铜，并填充不同介电常数的非金属介质。为了更加便捷的得到非金属介质的介电常数以及信号铜的厚度和面积，可通过三维电磁场参数化仿真出所需设置阻抗调整部非金属介质的介电常数以及信号铜面积和厚度。
经仿真计算可得，阻抗体调整部设置在印制电路板从上至下第三、五、七、九层的导电层上的反焊盘区域。具体的说，在第三层导电层的反焊盘区域填充介电常数为3的非金属介质，且在对应的信号过孔上增加信号铜，信号铜为圆环且半径为6mil(密耳)、其铜厚为0.5oz(盎司)，与之对应的反焊盘半径为10mil，信号铜环绕信号过孔，非金属介质环绕信号铜；在第五层、第七层和第九层的导电层104上的反焊盘区域108内，填充介电常数为3的非金属介质，且在对应的信号过孔上增加的信号铜铜厚为0.5oz，非金属介质为圆环状、且其半径为7mil，与之对应的反焊盘半径也是10mil，信号铜环绕信号过孔，非金属介质环绕信号铜。在本实施例中，导电层为信号层，信号层的材料为铜。
进一步参见图4，图4为本申请实施例二中设置阻抗调整部之后信号过孔的阻抗收益图，采用上述方案后，图中虚线为未设置阻抗调整部的印制电路板在传输数据时、随时间变化的阻抗变化曲线，可得在时间为0.135ns(ns：纳秒)时，信号过孔的阻抗为99ohm(ohm：欧姆)；图中实线为设置阻抗调整部之后的印制电路板在传输数据时、随时间变化的阻抗变化曲线，可得在时间为0.135ns时，信号过孔的阻抗为90.5ohm，信号过孔的阻抗降低了8.5ohm，阻抗连续性更好，性能变得更优，更能满足高速设计的应用场景。此外，本领域技术人员可以理解的是，不同的信号过孔初始阻抗与目标阻抗差值不同，以及信号过孔各个部位初始阻抗与目标阻抗差值的不同，进而调整阻抗调整部的各个参数，以使得信号过孔各个部位的阻抗趋近于目标阻抗，提升信号过孔的阻抗连续性，保证信号传输的稳定性。进一步通过三维电磁场参数化仿真，仿真出信号铜的厚度和/或面积，以及非金属介质的介电常数，且信号铜的形状、非金属介质的形状以及反焊盘的形状不仅限于环形；同时，被优化的对象也不仅限于图示中的差分孔，也可是高频单孔；值得注意的是，导电层可为信号层，也可是平面层。
参见图5，图5是本申请实施例三提供的一种印制电路板经顶面向下剖切的剖视图。本申请实施例三提供的印制电路板与实施例一提供的印制电路板大致相同，与上述实施例一不同之处在于：阻抗调整部为非金属介质106，非金属介质106环绕信号过孔102。在本实施例中，导电层104为信号层，信号层的材料为铜。
在本实施例中，阻抗调整部为非金属介质106、并设置在导电层104的反焊盘区域内，通过调整信号过孔102的电容，可以有效调整信号过孔102的阻抗，进而保证信号过孔102阻抗的连续性。
本领域技术人员可以理解的是，不同的信号过孔102初始阻抗与目标阻抗差值不同，以及同一信号过孔102不同部位的初始阻抗与目标阻抗也不同，进而通过三维电磁场参数化仿真，仿真出不同的信号过孔102以及同一信号过孔102不同部位所需设置非金属介质106的 介电常数，以使得各个信号过孔102以及信号过孔102的各个部位的初始阻抗趋近与其对应的目标阻抗。此外，填充的非金属介质106形状以及反焊盘形状不仅限于环形。
参见图6，图6是本申请实施例四提供的一种印制电路板经顶面向下剖切的剖视图。本申请实施例四提供的印制电路板与实施例一提供的印制电路板大致相同，与上述实施例一不同之处在于，阻抗调整部为信号铜107，信号铜107环绕信号过孔102，信号铜107与导电层104之间留有间隙109。在本实施例中，导电层104为信号层，信号层的材料为铜。
在本实施例中，阻抗调整部为信号铜107、并设置在导电层104的反焊盘区域内，通过调整信号过孔102的电容，可以有效调整信号过孔102的阻抗，进而保证信号过孔102阻抗的连续性。
本领域技术人员可以理解的是，不同的信号过孔102初始阻抗与目标阻抗差值不同，以及同一信号过孔102不同部位的初始阻抗与目标阻抗也不同，进而通过三维电磁场参数化仿真，仿真出不同的信号过孔102以及同一信号过孔102不同部位所需设置信号铜107的厚度和/或面积，以使得各个信号过孔102以及信号过孔102的各个部位的初始阻抗趋近与其对应的目标阻抗。此外，信号铜107形状以及反焊盘形状不仅限于环形。
参见图7，图7是本申请实施例五提供的一种印制电路板经顶面向下剖切的剖视图。本申请实施例五提供的印制电路板与实施例一提供的印制电路板大致相同，与上述实施例一不同之处在于，阻抗调整部为信号铜107，板材(图未示)位于相邻铺设的导电层104之间，阻抗调整部与板材中一者同层设置，信号铜107与板材之间留有间隙。在本实施例中，导电层104为信号层，信号层的材料为铜。
在本实施例中，阻抗调整部为信号铜107，并与板材中一者同层设置，通过调整信号过孔102的电容，可以有效调整信号过孔102的阻抗，进而保证信号过孔102阻抗的连续性。
本领域技术人员可以理解的是，不同的信号过孔102初始阻抗与目标阻抗差值不同，以及同一信号过孔102不同部位的初始阻抗与目标阻抗也不同，进而通过三维电磁场参数化仿真，仿真出不同的信号过孔102以及同一信号过孔102不同部位所需设置信号铜107的厚度和/或面积，以使得各个信号过孔102以及信号过孔102的各个部位的初始阻抗趋近与其对应的目标阻抗。此外，信号铜107形状以及板材对应信号层104反焊盘区域设置的通孔不仅限于环形。
图8(1)所示为本申请实施例六提供的印制电路板，本申请实施例六提供的印制电路板与实施例一提供的印制电路板大致相同，与上述第一实施例不同之处在于，阻抗调整部为非金属介质106，非金属介质106环绕信号过孔102；且所述非金属介质106贯穿整个印制电路板。在本实施例中，导电层104为信号层，信号层的材料为铜。可以理解的是，上述阻抗调整部贯穿整个印制电路板还可相应调整，参见图8(2)，阻抗调整部从印制电路板上方贯穿印制电路板的部分导电层104；参见图8(3)，阻抗调整部从印制电路板下方贯穿印制电路板的部分导电层104；参见图8(4)，阻抗调整部贯穿印制电路板的中部部分导电层104；参见图8(5)，阻抗调整部包括：贯穿印制电路板的中上部部分导电层104的第一部分，以及贯穿印制电路板的中下部部分导电层104的第二部分，第一部分贯穿印制电路板的中上部 部分导电层104的数量与第二部分贯穿印制电路板的中下部部分导电层104的数量相同；参见图8(6)，阻抗调整部包括：贯穿印制电路板的中上部部分导电层104的第一部分，贯穿印制电路板的中下部部分导电层104第二部分，第一部分贯穿印制电路板的中上部部分导电层104的数量与第二部分贯穿印制电路板的中下部部分导电层104的数量不同。
在本实施例中，阻抗调整部为非金属介质106，但阻抗调整部的位置不局限于以上几种，可根据实际情况，通过三位电磁场参数化仿真来确定阻抗调整部的位置，进而通过调整信号过孔的电容，可以有效调整信号过孔的阻抗，进而保证信号过孔阻抗的连续性。
此外，上述各实施例仅仅是实现本申请的具体实施例，上述各实施例之间并不冲突，由上述各实施例排列组合形成的技术方案都应在本申请保护的范围之内，而在实际应用中，也可以在形式上和细节上对其作各种改变，而不偏离本申请的精神和范围。

Claims (17)

  1. 一种印制电路板，包括：若干堆叠铺设的板材、设置在相邻所述板材之间的导电层、贯穿所述板材和所述导电层的信号过孔，以及环绕所述信号过孔设置的阻抗调整部，所述阻抗调整部用于调整所述信号过孔的阻抗。
  2. 根据权利要求1所述的一种印制电路板，其中，所述阻抗调整部包括信号铜以及与所述信号铜相接的非金属介质，所述信号铜环绕所述信号过孔，所述非金属介质环绕所述信号铜。
  3. 根据权利要求2所述的一种印制电路板，其中，所述导电层上设置有反焊盘区域，所述信号铜以及所述非金属介质设置在至少一所述导电层的所述反焊盘区域。
  4. 根据权利要求1所述的一种印制电路板，其中，所述阻抗调整部为信号铜或非金属介质。
  5. 根据权利要求4所述的一种印制电路板，其中，所述阻抗调整部为非金属介质，所述导电层上设置有反焊盘区域，所述阻抗调整部设置在至少一所述导电层的所述反焊盘区域内。
  6. 根据权利要求4所述的一种印制电路板，其中，所述阻抗调整部为非金属介质，所述导电层上设置有反焊盘区域，所述阻抗调整部贯穿多个所述板材，并穿过多个所述导电层的所述反焊盘区域。
  7. 根据权利要求4所述的一种印制电路板，其中，所述阻抗调整部为信号铜，所述导电层上设置有反焊盘区域，所述阻抗调整部设置在至少一所述导电层的所述反焊盘区域内、并与所述导电层之间留有间隙。
  8. 根据权利要求4所述的一种印制电路板，其中，所述阻抗调整部为信号铜，所述阻抗调整部与所述板材中一者同层设置，所述信号铜与所述板材之间留有间隙。
  9. 根据权利要求1-8任一项所述的一种印制电路板，其中，所述导电层为平面层。
  10. 根据权利要求1-8任一项所述的一种印制电路板，其中，所述导电层为信号层。
  11. 根据权利要求1-10任一项所述的一种印制电路板，其中，所述信号过孔为差分孔或高频单孔。
  12. 根据权利要求1-11任一项所述的一种印制电路板，其中，所述阻抗调整部为环形。
  13. 一种印制电路板的制造方法，包括：
    确定印制电路板信号过孔的初始阻抗；
    确定所述初始阻抗与所述信号过孔的目标阻抗的差值；
    若所述差值大于预设阈值，则设置阻抗调整部环绕所述信号过孔，以使得所述信号过孔的阻抗与所述目标阻抗的差值小于所述预设阈值。
  14. 根据权利要求13所述的一种印制电路板的制造方法，其中，所述设置阻抗调整部环绕所述信号过孔，包括：
    确定所述信号过孔的目标阻抗对应的目标电容值；
    所述阻抗调整部具有所述介电常数、面积和/或厚度，根据所述目标电容值确定所述阻抗调整部的介电常数、面积和/或厚度；
    设置环绕所述信号过孔的阻抗调整部。
  15. 根据权利要求14所述的一种印制电路板的制造方法，其中，所述根据所述目标电容 值确定所述阻抗调整部的介电常数、面积和/或厚度，包括：
    通过三维电磁场参数化仿真确定所述介电常数、面积和/或厚度。
  16. 根据权利要求15所述的一种印制电路板的制造方法，其中，
    设置信号铜作为所述阻抗调整部，所述通过三维电磁场参数化仿真确定所述介电常数、面积和/或厚度，包括：通过三维电磁场参数化仿真确定所述信号铜的厚度和/或面积；
    或者，设置非金属介质作为所述阻抗调整部，所述通过三维电磁场参数化仿真确定所述介电常数、面积和/或厚度，包括：通过三维电磁场参数化仿真确定所述非金属介质的介电常数。
  17. 根据权利要求15所述的一种印制电路板的制造方法，其中，设置信号铜与非金属介质相接作为所述阻抗调整部，设置所述信号铜环绕所述信号过孔，设置所述非金属介质环绕所述信号铜，所述通过三维电磁场参数化仿真确定所述介电常数、面积和/或厚度，包括：通过三维电磁场参数化仿真确定所述信号铜的厚度和/或面积，及所述非金属介质的介电常数。
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