WO2022057822A1 - Heat dissipating packaging structure and preparation method therefor, and electronic device - Google Patents

Heat dissipating packaging structure and preparation method therefor, and electronic device Download PDF

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Publication number
WO2022057822A1
WO2022057822A1 PCT/CN2021/118487 CN2021118487W WO2022057822A1 WO 2022057822 A1 WO2022057822 A1 WO 2022057822A1 CN 2021118487 W CN2021118487 W CN 2021118487W WO 2022057822 A1 WO2022057822 A1 WO 2022057822A1
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WIPO (PCT)
Prior art keywords
heat dissipation
chip
plastic
substrate
heat
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Application number
PCT/CN2021/118487
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French (fr)
Chinese (zh)
Inventor
陈建超
于上家
Original Assignee
青岛歌尔微电子研究院有限公司
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Publication of WO2022057822A1 publication Critical patent/WO2022057822A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736—Metallic materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73259—Bump and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Definitions

  • the present application relates to the technical field of semiconductor packaging structures, and in particular, to a heat dissipation packaging structure, a preparation method thereof, and an electronic device.
  • SIP package is one of the most important and most potential technologies to meet this high-density system integration.
  • SIP packaging refers to the integration of multiple functional wafers, including processors, memory and other functional wafers, into one package according to the application scenarios, the number of packaging substrate layers and other factors, so as to achieve a basically complete functional packaging solution.
  • SIP packaged chips are highly centralized, and the heat generated during the operation of the chip will cause irreversible damage to the chip itself.
  • the traditional chip heat dissipation process usually mounts the heat dissipation block on the back of the chip, and dissipates the heat through the heat dissipation block, thus effectively avoiding the damage to the chip caused by high temperature.
  • this also greatly increases the thickness of the chip, which is not conducive to the IC chip ( miniaturization of microelectronic devices).
  • the main purpose of the present application is to provide a heat dissipation package structure, a preparation method thereof, and an electronic device, which aim to reduce the thickness of the package body of the chip package structure.
  • a heat dissipation package structure including:
  • the chip is arranged on the mounting side;
  • the plastic sealing body is arranged on the mounting side and is arranged around the chip;
  • the heat dissipation structure is arranged on the plastic package, and the heat dissipation structure is connected to the chip for dissipating heat from the chip.
  • the heat dissipation structure includes:
  • a heat-dissipating metal layer disposed on the side of the plastic package away from the substrate;
  • the heat-dissipating connection part is arranged in the plastic package and is connected to the heat-dissipating metal layer and the chip.
  • a plurality of the heat dissipation connecting portions are provided, and the plurality of the heat dissipation connecting portions are distributed at intervals on a side of the chip away from the substrate.
  • the material of the heat dissipation metal layer is copper or stainless steel.
  • the material of the heat dissipation connecting portion is tin, silver or copper.
  • the present application also proposes a preparation method of the above-mentioned heat dissipation package structure, comprising the following steps:
  • a substrate is provided, and one side of the substrate is provided with a chip
  • plastic-sealing the chip to form a plastic-sealing body arranged to wrap the chip;
  • a heat dissipation connection part is arranged on the plastic package, so that one end of the heat dissipation connection part is connected to the chip, and the other end is exposed on the side of the plastic package away from the substrate;
  • a heat-dissipating metal layer is arranged on the side of the plastic package away from the substrate, so as to obtain a heat-dissipating package structure.
  • the step of disposing a heat dissipation connection portion on the plastic package, so that one end of the heat dissipation connection portion is connected to the chip, and the other end is exposed on the side of the plastic package away from the substrate including: :
  • An opening is provided on the side of the plastic package away from the substrate, and the opening communicates with the side of the chip away from the substrate;
  • Heat dissipation metal is filled in the opening to form the heat dissipation connection portion.
  • a substrate is provided, and in the step of disposing a chip on one side of the substrate: a heat dissipation pad is disposed on a side of the chip away from the substrate;
  • the opening communicates with the heat dissipation pad.
  • the chip is plastic-sealed to form a plastic-sealed body that wraps the chip:
  • the material of the plastic sealing body is LDS material
  • the steps of disposing a heat-dissipating metal layer on the side of the plastic package away from the substrate to obtain a heat-dissipating package structure include:
  • a heat-dissipating metal layer is formed by depositing a heat-dissipating metal on the surface of the activated plastic body by means of electroless plating, thereby obtaining a heat-dissipating package structure.
  • the present application also proposes an electronic device including the heat dissipation package structure as described above.
  • the heat dissipation package structure includes a substrate, a chip, a plastic package and a heat dissipation structure, the substrate has a mounting side, the chip is located on the mounting side, and the plastic package is located on the mounting side, and encapsulate the chip, the heat dissipation structure is disposed on the plastic package, and the heat dissipation structure is connected to the chip to dissipate heat from the chip.
  • the heat dissipation package structure can be arranged in an effective manner. Reducing the thickness of the package body of the chip package is conducive to realizing the miniaturization of the IC chip.
  • FIG. 1 is a schematic structural diagram of an embodiment of a heat dissipation package structure provided by the present application
  • FIG. 2 is a schematic flowchart of an embodiment of a method for preparing a heat dissipation package structure provided by the present application
  • FIG. 3 is a schematic structural diagram of the substrate provided in FIG. 2;
  • FIG. 4 is a schematic view of the structure of FIG. 2 after heat dissipation pads are arranged on the chip;
  • FIG. 5 is a schematic structural diagram after the plastic sealing body is arranged in FIG. 2;
  • Fig. 6 is the structural representation after setting the opening in Fig. 2;
  • FIG. 7 is a schematic view of the structure of FIG. 2 after the heat dissipation connecting portion is provided.
  • Heat dissipation package structure 41 heat dissipation metal layer 10 substrate 42 heat dissipation connection 20 chip 50 Thermal pad 30 Plastic body 60 hole
  • SIP packaged chips are highly centralized, and the heat generated during the operation of the chip will cause irreversible damage to the chip itself.
  • the traditional chip heat dissipation process usually mounts the heat dissipation block on the back of the chip, and dissipates the heat through the heat dissipation block, thus effectively avoiding the damage to the chip caused by high temperature.
  • this also greatly increases the thickness of the chip, which is not conducive to the IC chip ( miniaturization of microelectronic devices).
  • the present application proposes a heat dissipation package structure
  • FIG. 1 shows an embodiment of the heat dissipation package structure 100 proposed in the present application.
  • the heat dissipation package structure 100 includes a substrate 10 (usually a PCB board, that is, a printed circuit board, which is well known to those skilled in the art and will not be repeated here), a chip 20 , a plastic package 30 and a heat dissipation structure, the substrate 10 has a mounting side; the chip 20 is provided on the mounting side; the plastic package 30 is provided on the mounting side and wraps the chip 20; the heat dissipation The structure is disposed on the plastic package 30 , and the heat dissipation structure is connected to the chip 20 for dissipating heat from the chip 20 .
  • a substrate 10 usually a PCB board, that is, a printed circuit board, which is well known to those skilled in the art and will not be repeated here
  • the substrate 10 has a mounting side; the chip 20 is provided on the mounting side
  • the heat dissipation package structure 100 includes a substrate 10, a chip 20, a plastic package 30 and a heat dissipation structure, the substrate 10 has a mounting side, the chip 20 is arranged on the mounting side, and the plastic package The body 30 is disposed on the mounting side and wraps the chip 20 , the heat dissipation structure is disposed on the plastic packaging body 30 , and the heat dissipation structure is connected with the chip 20 to dissipate heat from the chip 20 .
  • the arrangement of the heat dissipation package structure can effectively reduce the thickness of the package body of the chip package, which is conducive to realizing the miniaturization of the IC chip.
  • the heat dissipation structure includes a heat dissipation metal layer 41 and a heat dissipation connection portion 42 , and the heat dissipation metal layer 41 is disposed on the side of the plastic package 30 away from the substrate 10 ; the heat dissipation connection The portion 42 is disposed in the plastic package 30 and is disposed to connect the heat dissipation metal layer 41 and the chip 20 .
  • the heat generated during the operation of the chip 20 is conducted to the heat dissipation metal layer 41 through the heat dissipation connection portion 42 , and then dissipates heat through the heat dissipation metal layer 41 .
  • the heat generated by the chip 20 is smoothly conducted to the heat dissipating metal layer 41 , so as to avoid the heat conduction affected by the setting of the plastic package 30 wrapping the chip 20 .
  • the number of the heat dissipation connection parts 42 is not limited, and it can be one or more. Distributed on the side of the chip 20 away from the substrate 10 . In this way, by disposing a plurality of the heat dissipation connection parts 42, the heat conduction efficiency is improved.
  • there are two heat dissipation connecting parts 42 which can not only ensure a better heat conduction effect, but also simplify the structural arrangement of the heat dissipation package structure 100 and reduce the processing difficulty.
  • the size and shape of the heat dissipation connecting portion 42 are not limited.
  • the heat dissipation connecting portion 42 can be set to have a circular or square cross-section, and its specific size and distribution position can be based on the actual size of the chip 20 . Requirements, etc. to be adjusted, and will not be repeated here.
  • the function of the heat-dissipating metal layer 41 is to conduct the heat generated on the chip 20 , and can be made of a metal material with better thermal conductivity.
  • the heat-dissipating metal layer 41 is made of copper. or stainless steel.
  • the heat dissipation metal layer 41 is made of copper or stainless steel, which not only has good heat conduction effect, but also is easy to manufacture.
  • the function of the heat dissipation connection part 42 is to conduct the heat generated on the chip 20, and it can also be made of a metal material with better heat conduction effect, and the heat dissipation metal layer 41 and the heat dissipation connection part 42
  • the materials may be the same or different.
  • the materials of the heat dissipation metal layer 41 and the heat dissipation connection portion 42 are preferably different, and
  • the material of the heat dissipation connection portion 42 is tin, silver or copper, which has good thermal conductivity and is easy to manufacture.
  • FIG. 2 shows an embodiment of the method for manufacturing the heat dissipation package structure 100 provided by the present application.
  • the manufacturing method of the heat dissipation package structure 100 includes the following steps:
  • Step S10 providing a substrate 10, and the chip 20 is disposed on one side of the substrate 10;
  • the substrate can be directly selected from a substrate with a chip mounted thereon, or can be prepared from a substrate and a wafer as raw materials.
  • the preparation process is as follows: first, the raw wafer is thinned to a corresponding thickness by back grinding, and then deposited on the back of the wafer. An insulating layer such as silicon oxide or silicon nitride, or an insulating layer is provided on the back of the wafer by direct thermal oxidation, and then the wafer is cut into chips. Mounted on the substrate to obtain the substrate 10 with the chips 20 disposed on one side as shown in FIG. 3 .
  • Step S20 plastic-sealing the chip 20 to form a plastic-sealing body 30 arranged to wrap the chip 20 ;
  • the chip 20 is then plastic-sealed to form a plastic package 30 that wraps the chip 20 .
  • the material of the plastic sealing body 30 is not limited, and the plastic sealing compound commonly used in the field of chip packaging can be selected.
  • the material of the plastic sealing body 30 is preferably LDS material, and the LDS material is a kind of organic metal composite material.
  • the modified plastic of the material after the material is irradiated by laser, the metal particles can be released from the organometallic compound in it.
  • Electroless plating is deposited on the surface of the plastic package 30 , so that the connection between the heat dissipation metal layer 41 and the plastic package 30 is more reliable, and the manufacturing process is also simpler.
  • the heat-dissipating metal layer 41 can also be realized by a process such as spraying or physical deposition, and the material of the plastic sealing body 30 is not limited at this time.
  • Step S30 disposing a heat dissipation connecting portion 42 on the plastic sealing body 30 , so that one end of the heat dissipation connecting portion 42 is connected to the chip 20 , and the other end is exposed on the side of the plastic sealing body 30 away from the substrate 10 ;
  • step S30 includes:
  • step S31 an opening 50 is provided on the side of the plastic package 30 away from the substrate 10, and the opening 50 communicates with the side of the chip away from the substrate;
  • Step S32 filling the opening 50 with heat-dissipating metal to form the heat-dissipating connecting portion 42 .
  • a heat dissipation pad 60 is provided on the side of the chip 20 away from the substrate 10 , and the heat dissipation pad 60 may be
  • the chip 20 is disposed on the surface of the chip 20 before being plastic-sealed, or a wafer with heat dissipation pads on the back can be directly selected as the raw material of the chip 20 .
  • the method of disposing the heat dissipation pad 60 before the plastic packaging of the chip 20 is adopted. For details, please refer to FIG. 2 . Before step S20 , the following steps are further included:
  • Step S20a disposing a heat dissipation pad 60 on the side of the chip 20 away from the substrate 10;
  • step S21 the opening 50 is configured to communicate with the heat dissipation pad 60 .
  • a heat dissipation pad 60 is first set at a specific position on the back of the chip 20 to form the structure shown in FIG. 4 , wherein the material of the heat dissipation pad 60 is preferably The material of the heat dissipation connecting portion 42 is the same; then the chip 20 is plastic-sealed to form a plastic-sealed body 30 that wraps the chip 20 , as shown in FIG. 5 ; The opening 50 of the heat dissipation pad 60, as shown in FIG.
  • the method of disposing the opening 50 can be laser or cutting, preferably laser, which can ensure the accuracy of opening the opening 50, and To avoid damage to the chip 20 ; after the opening 50 is set, silver paste, solder paste or copper paste is filled in the opening 50 to form the heat dissipation connection portion 42 as shown in FIG. 7 .
  • step S10 when a wafer provided with heat dissipation pads on the back is directly selected as the raw material of the chip 20 , the grinding of the back of the wafer, the provision of insulating layers, and the process of grinding the back of the wafer in step S10 can be omitted.
  • the process of disposing the heat dissipation pads 60 on the chip 20 is described.
  • the implementations of steps S10 to S30 are as follows: the wafer is cut into chips, and the chips are mounted by flip-chip, reflow, cleaning, underfill and other processes.
  • the substrate 10 with the chip 20 disposed on one side is obtained, and then the chip 20 is plastic-sealed to form the plastic package 30 disposed around the chip 20 ; and then the plastic package 30 is provided on the surface Connecting the openings 50 of the heat dissipation pads 60 ; and then filling the openings 50 with silver paste, solder paste or copper paste to form the heat dissipation connection portion 42 .
  • Step S40 disposing a heat-dissipating metal layer 41 on the side of the plastic package 30 away from the substrate 10 to obtain the heat-dissipating package structure 100 .
  • step S40 specifically includes:
  • Step S41 performing activation treatment on the surface of the plastic package 30 on the side away from the substrate 10, so that metal particles are released from the organometallic compound in the LDS material;
  • Step S42 depositing heat-dissipating metal on the surface of the plastic package 30 after the activation treatment by means of electroless plating to form a heat-dissipating metal layer 41 , and obtaining the heat-dissipating package structure 100 .
  • the surface of the plastic package 30 is activated by a laser, so that the metal particles are released from the organometallic compound in the LDS material, and then a copper layer or stainless steel is deposited on the surface of the activated plastic package 30 by an electroless plating process.
  • layer to form a heat dissipation metal layer 41 on the surface of the plastic package 30 that is, the heat dissipation package structure 100 shown in FIG. 1 is obtained.
  • the preparation method of the heat dissipation package structure provided by the present application has the advantages of simple preparation process, easy quantitative production, and the thickness of the package body in the prepared heat dissipation package structure 100 is reduced, which is beneficial to realize the miniaturization of the IC chip.
  • the consumable material of the heat sink is omitted, and the packaging cost is reduced.
  • the present application also proposes an electronic device including a heat dissipation package structure 100 , and the structure of the heat dissipation package structure 100 refers to the above-mentioned embodiments. It can be understood that, since the electronic device of the present application adopts all the technical solutions of all the above-mentioned embodiments, it has at least all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be repeated here.

Abstract

A heat dissipating packaging structure and a preparation method therefor, and an electronic device. The heat dissipating packaging structure comprises a substrate, a chip, plastic packaging, and a heat dissipation structure, the substrate being provided with a mounting side. The chip is arranged on the mounting side. The plastic packaging is arranged on the mounting side, and is arranged to encapsulate the chip. The heat dissipation structure is arranged on the plastic packaging, and is connected to the chip, in order to dissipate heat from the chip.

Description

一种散热封装结构及其制备方法、以及电子器件A heat dissipation package structure and preparation method thereof, and electronic device
本申请要求于2020年9月21日提交中国专利局、申请号为202011001292.2、申请名称为“一种散热封装结构及其制备方法、以及电子器件”的中国专利申请的优先权，其全部内容通过引用结合在申请中。This application claims the priority of the Chinese patent application filed on September 21, 2020 with the application number 202011001292.2 and the application name "A heat dissipation package structure and its preparation method, and electronic device", the entire contents of which are approved by Reference is incorporated in the application.
技术领域technical field
本申请涉及半导体封装结构技术领域，具体涉及一种散热封装结构及其制备方法、以及电子器件。The present application relates to the technical field of semiconductor packaging structures, and in particular, to a heat dissipation packaging structure, a preparation method thereof, and an electronic device.
背景技术Background technique
电子产品的迅猛发展是当今封装技术进化的主要驱动力，小型化、高密度、高频高速、高性能、高可靠性和低成本是先进封装的主流发展方向，其中系统级封装（System In a Package，SIP封装）是最重要也是最有潜力满足这种高密度系统集成的技术之一。SIP封装是指将多种功能晶圆，包括处理器、存储器等功能晶圆根据应用场景、封装基板层数等因素，集成在一个封装内，从而实现一个基本完整功能的封装方案。目前，SIP封装芯片高度集中化，芯片工作过程中产生的热量会对芯片自身产生不可逆的损伤。传统的芯片散热工艺，通常是将散热块贴装在芯片背部，通过散热块将热量导出，从而有效避免了高温对芯片的损伤，但是，这样也大大增加了芯片的厚度，不利于IC芯片（微型电子器件）的小型化。The rapid development of electronic products is the main driving force for the evolution of packaging technology. Miniaturization, high density, high frequency and high speed, high performance, high reliability and low cost are the mainstream development directions of advanced packaging. Package, SIP package) is one of the most important and most potential technologies to meet this high-density system integration. SIP packaging refers to the integration of multiple functional wafers, including processors, memory and other functional wafers, into one package according to the application scenarios, the number of packaging substrate layers and other factors, so as to achieve a basically complete functional packaging solution. At present, SIP packaged chips are highly centralized, and the heat generated during the operation of the chip will cause irreversible damage to the chip itself. The traditional chip heat dissipation process usually mounts the heat dissipation block on the back of the chip, and dissipates the heat through the heat dissipation block, thus effectively avoiding the damage to the chip caused by high temperature. However, this also greatly increases the thickness of the chip, which is not conducive to the IC chip ( miniaturization of microelectronic devices).
技术问题technical problem
本申请的主要目的是提出一种散热封装结构及其制备方法、以及电子器件，旨在减小芯片封装结构的封装体厚度。The main purpose of the present application is to provide a heat dissipation package structure, a preparation method thereof, and an electronic device, which aim to reduce the thickness of the package body of the chip package structure.
技术解决方案technical solutions
为实现上述目的，本申请提出一种散热封装结构，包括：In order to achieve the above purpose, the present application proposes a heat dissipation package structure, including:
基板，所述基板具有安装侧；a base plate having a mounting side;
芯片，所述芯片设于所述安装侧；a chip, the chip is arranged on the mounting side;
塑封体，所述塑封体设于所述安装侧，且包裹所述芯片设置；以及，a plastic sealing body, the plastic sealing body is arranged on the mounting side and is arranged around the chip; and,
散热结构，设于所述塑封体，且所述散热结构与所述芯片连接，用以对所述芯片进行散热。The heat dissipation structure is arranged on the plastic package, and the heat dissipation structure is connected to the chip for dissipating heat from the chip.
在一实施例中，所述散热结构包括：In one embodiment, the heat dissipation structure includes:
散热金属层，设于所述塑封体远离所述基板的一侧；以及，a heat-dissipating metal layer, disposed on the side of the plastic package away from the substrate; and,
散热连接部，设于所述塑封体内，且连接所述散热金属层和所述芯片设置。The heat-dissipating connection part is arranged in the plastic package and is connected to the heat-dissipating metal layer and the chip.
在一实施例中，所述散热连接部设有多个，多个所述散热连接部间隔分布于所述芯片背离所述基板的一侧。In one embodiment, a plurality of the heat dissipation connecting portions are provided, and the plurality of the heat dissipation connecting portions are distributed at intervals on a side of the chip away from the substrate.
在一实施例中，所述散热金属层的材质为铜或不锈钢。In one embodiment, the material of the heat dissipation metal layer is copper or stainless steel.
在一实施例中，所述散热连接部的材质为锡、银或铜。In one embodiment, the material of the heat dissipation connecting portion is tin, silver or copper.
为实现上述目的，本申请还提出一种如上所述的散热封装结构的制备方法，包括以下步骤：In order to achieve the above purpose, the present application also proposes a preparation method of the above-mentioned heat dissipation package structure, comprising the following steps:
提供一基板，所述基板的一侧设置有芯片；A substrate is provided, and one side of the substrate is provided with a chip;
对所述芯片进行塑封，形成包裹所述芯片设置的塑封体；plastic-sealing the chip to form a plastic-sealing body arranged to wrap the chip;
在所述塑封体上设置散热连接部，使所述散热连接部的一端与所述芯片连接，另一端显露于所述塑封体远离所述基板的一侧；A heat dissipation connection part is arranged on the plastic package, so that one end of the heat dissipation connection part is connected to the chip, and the other end is exposed on the side of the plastic package away from the substrate;
在所述塑封体远离所述基板的一侧设置散热金属层，得到散热封装结构。A heat-dissipating metal layer is arranged on the side of the plastic package away from the substrate, so as to obtain a heat-dissipating package structure.
在一实施例中，在所述塑封体上设置散热连接部，使所述散热连接部的一端与所述芯片连接，另一端显露于所述塑封体远离所述基板的一侧的步骤，包括：In one embodiment, the step of disposing a heat dissipation connection portion on the plastic package, so that one end of the heat dissipation connection portion is connected to the chip, and the other end is exposed on the side of the plastic package away from the substrate, including: :
在所述塑封体远离所述基板的一侧设置开孔，所述开孔连通所述芯片远离所述基板的一侧；An opening is provided on the side of the plastic package away from the substrate, and the opening communicates with the side of the chip away from the substrate;
在所述开孔内填充散热金属，形成所述散热连接部。Heat dissipation metal is filled in the opening to form the heat dissipation connection portion.
在一实施例中，提供一基板，所述基板的一侧设置有芯片的步骤中：所述芯片远离所述基板的一侧设有散热焊盘；In one embodiment, a substrate is provided, and in the step of disposing a chip on one side of the substrate: a heat dissipation pad is disposed on a side of the chip away from the substrate;
在所述塑封体远离所述基板的一侧设置开孔，所述开孔连通所述芯片远离所述基板的一侧的步骤中：所述开孔连通所述散热焊盘。In the step of disposing an opening on the side of the plastic package away from the substrate, and the opening communicates with the side of the chip away from the substrate: the opening communicates with the heat dissipation pad.
在一实施例中，对所述芯片进行塑封，形成包裹所述芯片设置的塑封体的步骤中：In one embodiment, the chip is plastic-sealed to form a plastic-sealed body that wraps the chip:
所述塑封体的材质为LDS材料；The material of the plastic sealing body is LDS material;
在所述塑封体远离所述基板的一侧设置散热金属层，得到散热封装结构的步骤，包括：The steps of disposing a heat-dissipating metal layer on the side of the plastic package away from the substrate to obtain a heat-dissipating package structure include:
对所述塑封体远离所述基板的一侧的表面进行活化处理，使所述LDS材料中的有机金属复合物释放出金属粒子；Activating the surface of the side of the plastic package away from the substrate to release metal particles from the organometallic compound in the LDS material;
在经过所述活化处理的所述塑封体的表面通过化学镀的方式沉积散热金属，形成散热金属层，得到散热封装结构。A heat-dissipating metal layer is formed by depositing a heat-dissipating metal on the surface of the activated plastic body by means of electroless plating, thereby obtaining a heat-dissipating package structure.
此外，本申请还提出一种电子器件，包括如上所述的散热封装结构。In addition, the present application also proposes an electronic device including the heat dissipation package structure as described above.
本申请提供的技术方案中，散热封装结构包括基板、芯片、塑封体以及散热结构，所述基板具有安装侧，所述芯片设于所述安装侧，所述塑封体设于所述安装侧，且包裹所述芯片设置，所述散热结构设于所述塑封体，且所述散热结构与所述芯片连接，用以对所述芯片进行散热，如此，所述散热封装结构的设置方式能够有效减小芯片封装的封装体厚度，有利于实现IC芯片更小型化。In the technical solution provided by the present application, the heat dissipation package structure includes a substrate, a chip, a plastic package and a heat dissipation structure, the substrate has a mounting side, the chip is located on the mounting side, and the plastic package is located on the mounting side, and encapsulate the chip, the heat dissipation structure is disposed on the plastic package, and the heat dissipation structure is connected to the chip to dissipate heat from the chip. In this way, the heat dissipation package structure can be arranged in an effective manner. Reducing the thickness of the package body of the chip package is conducive to realizing the miniaturization of the IC chip.
附图说明Description of drawings
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅为本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他相关的附图。In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only For some embodiments of the present application, for those of ordinary skill in the art, other related drawings can also be obtained according to these drawings without any creative effort.
图1为本申请提供的散热封装结构的一实施例的结构示意图；FIG. 1 is a schematic structural diagram of an embodiment of a heat dissipation package structure provided by the present application;
图2为本申请提供的散热封装结构的制备方法的一实施例的流程示意图；FIG. 2 is a schematic flowchart of an embodiment of a method for preparing a heat dissipation package structure provided by the present application;
图3为图2中提供的基板的结构示意图；3 is a schematic structural diagram of the substrate provided in FIG. 2;
图4为图2中在所述芯片上设置散热焊盘后的结构示意图；FIG. 4 is a schematic view of the structure of FIG. 2 after heat dissipation pads are arranged on the chip;
图5为图2中设置塑封体后的结构示意图；FIG. 5 is a schematic structural diagram after the plastic sealing body is arranged in FIG. 2;
图6为图2中设置开孔后的结构示意图；Fig. 6 is the structural representation after setting the opening in Fig. 2;
图7为图2中设置散热连接部后的结构示意图。FIG. 7 is a schematic view of the structure of FIG. 2 after the heat dissipation connecting portion is provided.
附图标号说明：Description of reference numbers:
100 100 散热封装结构 Heat dissipation package structure 41 41 散热金属层 heat dissipation metal layer
10 10 基板 substrate 42 42 散热连接部 heat dissipation connection
20 20 芯片 chip 50 50 散热焊盘 Thermal pad
30 30 塑封体 Plastic body 60 60 开孔 hole
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。The realization, functional characteristics and advantages of the purpose of the present application will be further described with reference to the accompanying drawings in conjunction with the embodiments.
本发明的实施方式Embodiments of the present invention
为使本申请实施例的目的、技术方案和优点更加清楚，下面将对本申请实施例中的技术方案进行清楚、完整地描述。实施例中未注明具体条件者，按照常规条件或制造商建议的条件进行。所用试剂或仪器未注明生产厂商者，均为可以通过市售购买获得的常规产品。另外，全文中出现的“和/或”的含义，包括三个并列的方案，以“A和/或B”为例，包括A方案、或B方案、或A和B同时满足的方案。此外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。To make the purposes, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be described clearly and completely below. If the specific conditions are not indicated in the examples, it is carried out according to the conventional conditions or the conditions suggested by the manufacturer. The reagents or instruments used without the manufacturer's indication are conventional products that can be purchased from the market. In addition, the meaning of "and/or" in the whole text includes three parallel schemes. Taking "A and/or B" as an example, it includes scheme A, scheme B, or scheme satisfying both of A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but must be based on the realization of those of ordinary skill in the art. When the combination of technical solutions is contradictory or cannot be achieved, it should be considered that the combination of technical solutions does not exist. , is not within the scope of protection claimed in this application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.
目前，SIP封装芯片高度集中化，芯片工作过程中产生的热量会对芯片自身产生不可逆的损伤。传统的芯片散热工艺，通常是将散热块贴装在芯片背部，通过散热块将热量导出，从而有效避免了高温对芯片的损伤，但是，这样也大大增加了芯片的厚度，不利于IC芯片（微型电子器件）的小型化。At present, SIP packaged chips are highly centralized, and the heat generated during the operation of the chip will cause irreversible damage to the chip itself. The traditional chip heat dissipation process usually mounts the heat dissipation block on the back of the chip, and dissipates the heat through the heat dissipation block, thus effectively avoiding the damage to the chip caused by high temperature. However, this also greatly increases the thickness of the chip, which is not conducive to the IC chip ( miniaturization of microelectronic devices).
鉴于此，本申请提出一种散热封装结构，图1所示为本申请提出的散热封装结构100的一实施例。参阅图1所示，在本实施例中，所述散热封装结构100包括基板10（通常为PCB板，即印制电路板，为本领域技术人员所熟知，在此不再赘述）、芯片20、塑封体30以及散热结构，所述基板10具有安装侧；所述芯片20设于所述安装侧；所述塑封体30设于所述安装侧，且包裹所述芯片20设置；所述散热结构设于所述塑封体30，且所述散热结构与所述芯片20连接，用以对所述芯片20进行散热。In view of this, the present application proposes a heat dissipation package structure, and FIG. 1 shows an embodiment of the heat dissipation package structure 100 proposed in the present application. Referring to FIG. 1 , in this embodiment, the heat dissipation package structure 100 includes a substrate 10 (usually a PCB board, that is, a printed circuit board, which is well known to those skilled in the art and will not be repeated here), a chip 20 , a plastic package 30 and a heat dissipation structure, the substrate 10 has a mounting side; the chip 20 is provided on the mounting side; the plastic package 30 is provided on the mounting side and wraps the chip 20; the heat dissipation The structure is disposed on the plastic package 30 , and the heat dissipation structure is connected to the chip 20 for dissipating heat from the chip 20 .
本申请提供的技术方案中，所述散热封装结构100包括基板10、芯片20、塑封体30以及散热结构，所述基板10具有安装侧，所述芯片20设于所述安装侧，所述塑封体30设于所述安装侧，且包裹所述芯片20设置，所述散热结构设于所述塑封体30，且所述散热结构与所述芯片20连接，用以对所述芯片20进行散热，如此，所述散热封装结构的设置方式能够有效减小芯片封装的封装体厚度，有利于实现IC芯片更小型化。In the technical solution provided in this application, the heat dissipation package structure 100 includes a substrate 10, a chip 20, a plastic package 30 and a heat dissipation structure, the substrate 10 has a mounting side, the chip 20 is arranged on the mounting side, and the plastic package The body 30 is disposed on the mounting side and wraps the chip 20 , the heat dissipation structure is disposed on the plastic packaging body 30 , and the heat dissipation structure is connected with the chip 20 to dissipate heat from the chip 20 . In this way, the arrangement of the heat dissipation package structure can effectively reduce the thickness of the package body of the chip package, which is conducive to realizing the miniaturization of the IC chip.
进一步地，参阅图1所示，所述散热结构包括散热金属层41以及散热连接部42，所述散热金属层41设于所述塑封体30远离所述基板10的一侧；所述散热连接部42设于所述塑封体30内，且连接所述散热金属层41和所述芯片20设置。如此，所述芯片20工作过程中产生的热量经由所述散热连接部42传导至所述散热金属层41，再经由所述散热金属层41进行散热，通过所述散热连接部42的设置，使得所述芯片20产生的热量顺利传导至所述散热金属层41，避免因所述塑封体30包裹所述芯片20的设置影响热量的传导。Further, as shown in FIG. 1 , the heat dissipation structure includes a heat dissipation metal layer 41 and a heat dissipation connection portion 42 , and the heat dissipation metal layer 41 is disposed on the side of the plastic package 30 away from the substrate 10 ; the heat dissipation connection The portion 42 is disposed in the plastic package 30 and is disposed to connect the heat dissipation metal layer 41 and the chip 20 . In this way, the heat generated during the operation of the chip 20 is conducted to the heat dissipation metal layer 41 through the heat dissipation connection portion 42 , and then dissipates heat through the heat dissipation metal layer 41 . The heat generated by the chip 20 is smoothly conducted to the heat dissipating metal layer 41 , so as to avoid the heat conduction affected by the setting of the plastic package 30 wrapping the chip 20 .
更进一步地，所述散热连接部42的个数不做限制，可以是一个，也可以是多个，优选为所述散热连接部42设有多个，且多个所述散热连接部42间隔分布于所述芯片20背离所述基板10的一侧。如此，通过多个所述散热连接部42的设置，提高了热量的传导效率。具体参阅图1所示，在本实施例中，所述散热连接部42设有两个，既能保证较好的热量传导效果，也能简化所述散热封装结构100的结构设置，降低加工难度。此外，所述散热连接部42的尺寸和形状不做限制，所述散热连接部42可以设置为其横截面呈圆形或方形等，其具体尺寸以及分布位置可以根据所述芯片20的实际尺寸要求等进行调整，在此不做赘述。Further, the number of the heat dissipation connection parts 42 is not limited, and it can be one or more. Distributed on the side of the chip 20 away from the substrate 10 . In this way, by disposing a plurality of the heat dissipation connection parts 42, the heat conduction efficiency is improved. Referring specifically to FIG. 1 , in this embodiment, there are two heat dissipation connecting parts 42 , which can not only ensure a better heat conduction effect, but also simplify the structural arrangement of the heat dissipation package structure 100 and reduce the processing difficulty. . In addition, the size and shape of the heat dissipation connecting portion 42 are not limited. The heat dissipation connecting portion 42 can be set to have a circular or square cross-section, and its specific size and distribution position can be based on the actual size of the chip 20 . Requirements, etc. to be adjusted, and will not be repeated here.
所述散热金属层41的作用是传导所述芯片20上产生的热量，可以选择导热效果较好的金属材料制成，具体地，在本实施例中，所述散热金属层41的材质为铜或不锈钢。选用铜或不锈钢来制成所述散热金属层41，不仅导热效果好，而且也易于制作。The function of the heat-dissipating metal layer 41 is to conduct the heat generated on the chip 20 , and can be made of a metal material with better thermal conductivity. Specifically, in this embodiment, the heat-dissipating metal layer 41 is made of copper. or stainless steel. The heat dissipation metal layer 41 is made of copper or stainless steel, which not only has good heat conduction effect, but also is easy to manufacture.
同样地，所述散热连接部42的作用也是传导所述芯片20上产生的热量，也可以选择导热效果较好的金属材料制成，且所述散热金属层41和所述散热连接部42的材质可以相同，也可以不同，而考虑到所述散热封装结构100加工难易度的问题，在本实施例中，优选为所述散热金属层41和所述散热连接部42的材质不同，且所述散热连接部42的材质为锡、银或铜，导热效果好，而且易于制作。Similarly, the function of the heat dissipation connection part 42 is to conduct the heat generated on the chip 20, and it can also be made of a metal material with better heat conduction effect, and the heat dissipation metal layer 41 and the heat dissipation connection part 42 The materials may be the same or different. Considering the difficulty of processing the heat dissipation package structure 100, in this embodiment, the materials of the heat dissipation metal layer 41 and the heat dissipation connection portion 42 are preferably different, and The material of the heat dissipation connection portion 42 is tin, silver or copper, which has good thermal conductivity and is easy to manufacture.
基于上述散热封装结构100，本申请还提出一种散热封装结构100的制备方法，图2所示为本申请提供的散热封装结构100的制备方法的一实施例。参阅图2所示，在本实施例中，所述散热封装结构100的制备方法包括以下步骤：Based on the above-mentioned heat dissipation package structure 100 , the present application further proposes a method for manufacturing the heat dissipation package structure 100 . FIG. 2 shows an embodiment of the method for manufacturing the heat dissipation package structure 100 provided by the present application. Referring to FIG. 2 , in this embodiment, the manufacturing method of the heat dissipation package structure 100 includes the following steps:
步骤S10、提供一基板10，所述基板10的一侧设置有芯片20；Step S10, providing a substrate 10, and the chip 20 is disposed on one side of the substrate 10;
所述基板可以直接选用贴装有芯片的基板，也可以以基板和晶圆为原材料制得，其制备流程如下：首先通过背部研磨将原料晶圆减薄到相应厚度，然后在晶圆背部沉积氧化硅或氮化硅等绝缘层，或者通过直接热氧化的方式在晶圆背部设置绝缘层，再将晶圆切割成芯片，通过倒装、回流焊、清洗、底部填充等工艺，将芯片贴装在基板上，得到如图3所示的一侧设置有芯片20的基板10。The substrate can be directly selected from a substrate with a chip mounted thereon, or can be prepared from a substrate and a wafer as raw materials. The preparation process is as follows: first, the raw wafer is thinned to a corresponding thickness by back grinding, and then deposited on the back of the wafer. An insulating layer such as silicon oxide or silicon nitride, or an insulating layer is provided on the back of the wafer by direct thermal oxidation, and then the wafer is cut into chips. Mounted on the substrate to obtain the substrate 10 with the chips 20 disposed on one side as shown in FIG. 3 .
步骤S20、对所述芯片20进行塑封，形成包裹所述芯片20设置的塑封体30；Step S20 , plastic-sealing the chip 20 to form a plastic-sealing body 30 arranged to wrap the chip 20 ;
完成所述芯片20的贴装之后，然后对所述芯片20进行塑封，形成包裹所述芯片20设置的塑封体30，然后再在所述塑封体30上设置所述散热连接部42和所述散热金属层41。所述塑封体30的材质不做限制，可以选用芯片封装领域常用的塑封胶，在本实施例中，优选为所述塑封体30的材质为LDS材料，LDS材料是一种内含有机金属复合物的改性塑料，该材料经过激光照射后，可以使其中的有机金属复合物释放出金属粒子，通过选用上述LDS材料作为制作所述塑封体30的材料，使得所述散热金属层41可以采用化学镀的方式沉积于所述塑封体30的表面形成，如此，所述散热金属层41与所述塑封体30之间的连接更为可靠，且制作工艺也更为简便。在本申请的其他实施例中，所述散热金属层41也可以通过喷涂或物理沉积等工艺实现，则此时对所述塑封体30的材质不做限制。After the mounting of the chip 20 is completed, the chip 20 is then plastic-sealed to form a plastic package 30 that wraps the chip 20 . The heat dissipation metal layer 41 . The material of the plastic sealing body 30 is not limited, and the plastic sealing compound commonly used in the field of chip packaging can be selected. In the present embodiment, the material of the plastic sealing body 30 is preferably LDS material, and the LDS material is a kind of organic metal composite material. The modified plastic of the material, after the material is irradiated by laser, the metal particles can be released from the organometallic compound in it. Electroless plating is deposited on the surface of the plastic package 30 , so that the connection between the heat dissipation metal layer 41 and the plastic package 30 is more reliable, and the manufacturing process is also simpler. In other embodiments of the present application, the heat-dissipating metal layer 41 can also be realized by a process such as spraying or physical deposition, and the material of the plastic sealing body 30 is not limited at this time.
步骤S30、在所述塑封体30上设置散热连接部42，使所述散热连接部42的一端与所述芯片20连接，另一端显露于所述塑封体30远离所述基板10的一侧；Step S30 , disposing a heat dissipation connecting portion 42 on the plastic sealing body 30 , so that one end of the heat dissipation connecting portion 42 is connected to the chip 20 , and the other end is exposed on the side of the plastic sealing body 30 away from the substrate 10 ;
由于所述塑封体30在形成的时候，需要将所述芯片20完全包裹于其中，在此基础上，要实现所述散热连接部42连接所述散热金属层41和所述芯片20，则所述散热连接部42必然穿设于所述塑封体30中，因此，在所述塑封体30设置完毕后，需要在所述塑封体30上开孔，然后将所述散热连接部42设于该开孔内。也即，在本实施例中，参阅图2所示，步骤S30包括：When the plastic package 30 is formed, the chip 20 needs to be completely wrapped in it. The heat-dissipating connecting portion 42 must pass through the plastic sealing body 30. Therefore, after the plastic sealing body 30 is set, a hole needs to be made in the plastic sealing body 30, and then the heat-dissipating connecting portion 42 is arranged on the plastic sealing body 30. inside the hole. That is, in this embodiment, referring to FIG. 2 , step S30 includes:
步骤S31、在所述塑封体30远离所述基板10的一侧设置开孔50，所述开孔50连通所述芯片远离所述基板的一侧；In step S31, an opening 50 is provided on the side of the plastic package 30 away from the substrate 10, and the opening 50 communicates with the side of the chip away from the substrate;
步骤S32、在所述开孔50内填充散热金属，形成所述散热连接部42。Step S32 , filling the opening 50 with heat-dissipating metal to form the heat-dissipating connecting portion 42 .
而考虑到在开槽过程中，尽量避免对所述芯片20造成不必要的损伤，优选为所述芯片20远离所述基板10的一侧设有散热焊盘60，所述散热焊盘60可以在对所述芯片20进行塑封之前设置于所述芯片20表面，也可以直接选用背部设置有散热焊盘的晶圆作为所述芯片20的原材料。在本实施例中，采用在对所述芯片20进行塑封之前设置所述散热焊盘60的方式，具体参阅图2所示，步骤S20之前还包括：Considering that unnecessary damage to the chip 20 is avoided as much as possible during the slotting process, it is preferable that a heat dissipation pad 60 is provided on the side of the chip 20 away from the substrate 10 , and the heat dissipation pad 60 may be The chip 20 is disposed on the surface of the chip 20 before being plastic-sealed, or a wafer with heat dissipation pads on the back can be directly selected as the raw material of the chip 20 . In this embodiment, the method of disposing the heat dissipation pad 60 before the plastic packaging of the chip 20 is adopted. For details, please refer to FIG. 2 . Before step S20 , the following steps are further included:
步骤S20a、在所述芯片20远离所述基板10的一侧设置散热焊盘60；Step S20a, disposing a heat dissipation pad 60 on the side of the chip 20 away from the substrate 10;
对应地，步骤S21中：所述开孔50设置为连通所述散热焊盘60。Correspondingly, in step S21 : the opening 50 is configured to communicate with the heat dissipation pad 60 .
如此，在所述芯片20的贴装完毕后，先在所述芯片20背部的特定位置设置散热焊盘60，形成如图4所示的结构，其中，所述散热焊盘60的材质优选为与所述散热连接部42的材质相同；然后对所述芯片20进行塑封，形成包裹所述芯片20设置的塑封体30，如图5所示；然后在所述塑封体30的表面设置连通所述散热焊盘60的开孔50，如图6所示，设置所述开孔50的方式可以是镭射或切割的方式，优选为镭射，更能够保证所述开孔50开设的精确度，以及避免对所述芯片20造成损伤；所述开孔50设置完毕后，再在所述开孔50内填充银浆、锡膏或铜浆，即形成如图7所示的散热连接部42。In this way, after the mounting of the chip 20 is completed, a heat dissipation pad 60 is first set at a specific position on the back of the chip 20 to form the structure shown in FIG. 4 , wherein the material of the heat dissipation pad 60 is preferably The material of the heat dissipation connecting portion 42 is the same; then the chip 20 is plastic-sealed to form a plastic-sealed body 30 that wraps the chip 20 , as shown in FIG. 5 ; The opening 50 of the heat dissipation pad 60, as shown in FIG. 6, the method of disposing the opening 50 can be laser or cutting, preferably laser, which can ensure the accuracy of opening the opening 50, and To avoid damage to the chip 20 ; after the opening 50 is set, silver paste, solder paste or copper paste is filled in the opening 50 to form the heat dissipation connection portion 42 as shown in FIG. 7 .
在本申请的另一实施例中，当直接选用背部设置有散热焊盘的晶圆作为所述芯片20的原材料时，可以省去步骤S10中对晶圆背部进行研磨、设置绝缘层以及在所述芯片20上设置散热焊盘60的工艺，具体地，步骤S10至步骤S30的实施方式如下：将晶圆切割成芯片，通过倒装、回流焊、清洗、底部填充等工艺，将芯片贴装在基板上，得到一侧设置有芯片20的所述基板10，然后对所述芯片20进行塑封，形成包裹所述芯片20设置的所述塑封体30；然后在所述塑封体30的表面设置连通所述散热焊盘60的所述开孔50；再在所述开孔50内填充银浆、锡膏或铜浆，即形成所述散热连接部42。In another embodiment of the present application, when a wafer provided with heat dissipation pads on the back is directly selected as the raw material of the chip 20 , the grinding of the back of the wafer, the provision of insulating layers, and the process of grinding the back of the wafer in step S10 can be omitted. The process of disposing the heat dissipation pads 60 on the chip 20 is described. Specifically, the implementations of steps S10 to S30 are as follows: the wafer is cut into chips, and the chips are mounted by flip-chip, reflow, cleaning, underfill and other processes. On the substrate, the substrate 10 with the chip 20 disposed on one side is obtained, and then the chip 20 is plastic-sealed to form the plastic package 30 disposed around the chip 20 ; and then the plastic package 30 is provided on the surface Connecting the openings 50 of the heat dissipation pads 60 ; and then filling the openings 50 with silver paste, solder paste or copper paste to form the heat dissipation connection portion 42 .
步骤S40、在所述塑封体30远离所述基板10的一侧设置散热金属层41，得到散热封装结构100。Step S40 , disposing a heat-dissipating metal layer 41 on the side of the plastic package 30 away from the substrate 10 to obtain the heat-dissipating package structure 100 .
在本实施例中，所述塑封体30的材质为LDS材料，基于此，参阅图2所示，在本实施例中，步骤S40具体包括：In this embodiment, the material of the plastic sealing body 30 is LDS material. Based on this, referring to FIG. 2 , in this embodiment, step S40 specifically includes:
步骤S41、对所述塑封体30远离所述基板10的一侧的表面进行活化处理，使所述LDS材料中的有机金属复合物释放出金属粒子；Step S41, performing activation treatment on the surface of the plastic package 30 on the side away from the substrate 10, so that metal particles are released from the organometallic compound in the LDS material;
步骤S42、在经过所述活化处理的所述塑封体30的表面通过化学镀的方式沉积散热金属，形成散热金属层41，得到散热封装结构100。Step S42 , depositing heat-dissipating metal on the surface of the plastic package 30 after the activation treatment by means of electroless plating to form a heat-dissipating metal layer 41 , and obtaining the heat-dissipating package structure 100 .
先通过激光将所述塑封体30的表面活化，使得所述LDS材料中的有机金属复合物释放出金属粒子，然后再通过化学镀工艺在活化后的所述塑封体30表面沉积铜层或者不锈钢层，以在所述塑封体30的表面形成散热金属层41，即制得如图1所示的所述散热封装结构100。First, the surface of the plastic package 30 is activated by a laser, so that the metal particles are released from the organometallic compound in the LDS material, and then a copper layer or stainless steel is deposited on the surface of the activated plastic package 30 by an electroless plating process. layer to form a heat dissipation metal layer 41 on the surface of the plastic package 30 , that is, the heat dissipation package structure 100 shown in FIG. 1 is obtained.
本申请提供的散热封装结构的制备方法，制备工艺简单，易于进行量化生产，且制得的散热封装结构100中封装体的厚度得以减小，有利于实现IC芯片的更小型化，此外，还省去了散热块这一耗材，降低了封装成本。The preparation method of the heat dissipation package structure provided by the present application has the advantages of simple preparation process, easy quantitative production, and the thickness of the package body in the prepared heat dissipation package structure 100 is reduced, which is beneficial to realize the miniaturization of the IC chip. The consumable material of the heat sink is omitted, and the packaging cost is reduced.
此外，本申请还提出一种电子器件，包括散热封装结构100，所述散热封装结构100的结构参照上述实施例。可以理解的是，由于本申请电子器件采用了上述所有实施例的全部技术方案，因此至少具有上述实施例的技术方案所带来的所有有益效果，在此不再一一赘述。In addition, the present application also proposes an electronic device including a heat dissipation package structure 100 , and the structure of the heat dissipation package structure 100 refers to the above-mentioned embodiments. It can be understood that, since the electronic device of the present application adopts all the technical solutions of all the above-mentioned embodiments, it has at least all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be repeated here.
以上仅为本申请的优选实施例，并非因此限制本申请的专利范围，对于本领域的技术人员来说，本申请可以有各种更改和变化。凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包括在本申请的专利保护范围内。The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. For those skilled in the art, various modifications and changes may be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this application shall be included in the scope of patent protection of this application.

Claims (10)

  1. 一种散热封装结构，其中，包括：A heat dissipation package structure, comprising:
    基板，所述基板具有安装侧；a base plate having a mounting side;
    芯片，所述芯片设于所述安装侧；a chip, the chip is arranged on the mounting side;
    塑封体，所述塑封体设于所述安装侧，且包裹所述芯片设置；以及，a plastic sealing body, the plastic sealing body is arranged on the mounting side and is arranged around the chip; and,
    散热结构，设于所述塑封体，且所述散热结构与所述芯片连接，用以对所述芯片进行散热。The heat dissipation structure is arranged on the plastic package, and the heat dissipation structure is connected to the chip for dissipating heat from the chip.
  2. 如权利要求1所述的散热封装结构，其中，所述散热结构包括：The heat dissipation package structure of claim 1, wherein the heat dissipation structure comprises:
    散热金属层，设于所述塑封体远离所述基板的一侧；以及，a heat-dissipating metal layer, disposed on the side of the plastic package away from the substrate; and,
    散热连接部，设于所述塑封体内，且连接所述散热金属层和所述芯片设置。The heat-dissipating connection part is arranged in the plastic package and is connected to the heat-dissipating metal layer and the chip.
  3. 如权利要求2所述的散热封装结构，其中，所述散热连接部设有多个，多个所述散热连接部间隔分布于所述芯片背离所述基板的一侧。The heat dissipation package structure according to claim 2, wherein a plurality of the heat dissipation connection parts are provided, and the plurality of the heat dissipation connection parts are distributed at intervals on a side of the chip away from the substrate.
  4. 如权利要求2所述的散热封装结构，其中，所述散热金属层的材质为铜或不锈钢。The heat dissipation package structure according to claim 2, wherein the material of the heat dissipation metal layer is copper or stainless steel.
  5. 如权利要求2所述的散热封装结构，其中，所述散热连接部的材质为锡、银或铜。The heat dissipation package structure according to claim 2, wherein the material of the heat dissipation connection portion is tin, silver or copper.
  6. 一种如权利要求1至5任意一项所述的散热封装结构的制备方法，其中，包括以下步骤：A method for preparing a heat dissipation package structure as claimed in any one of claims 1 to 5, comprising the following steps:
    提供一基板，所述基板的一侧设置有芯片；A substrate is provided, and one side of the substrate is provided with a chip;
    对所述芯片进行塑封，形成包裹所述芯片设置的塑封体；plastic-sealing the chip to form a plastic-sealing body arranged to wrap the chip;
    在所述塑封体上设置散热连接部，使所述散热连接部的一端与所述芯片连接，另一端显露于所述塑封体远离所述基板的一侧；A heat dissipation connection part is arranged on the plastic package, so that one end of the heat dissipation connection part is connected to the chip, and the other end is exposed on the side of the plastic package away from the substrate;
    在所述塑封体远离所述基板的一侧设置散热金属层，得到散热封装结构。A heat-dissipating metal layer is arranged on the side of the plastic package away from the substrate, so as to obtain a heat-dissipating package structure.
  7. 如权利要求6所述的散热封装结构的制备方法，其中，在所述塑封体上设置散热连接部，使所述散热连接部的一端与所述芯片连接，另一端显露于所述塑封体远离所述基板的一侧的步骤，包括：The manufacturing method of the heat dissipation package structure according to claim 6, wherein a heat dissipation connection part is provided on the plastic sealing body, so that one end of the heat dissipation connection part is connected to the chip, and the other end is exposed from the plastic sealing body away from the The steps of one side of the substrate include:
    在所述塑封体远离所述基板的一侧设置开孔，所述开孔连通所述芯片远离所述基板的一侧；An opening is provided on the side of the plastic package away from the substrate, and the opening communicates with the side of the chip away from the substrate;
    在所述开孔内填充散热金属，形成所述散热连接部。Heat dissipation metal is filled in the opening to form the heat dissipation connection portion.
  8. 如权利要求7所述的散热封装结构的制备方法，其中，提供一基板，所述基板的一侧设置有芯片的步骤中：所述芯片远离所述基板的一侧设有散热焊盘；The method for preparing a heat dissipation package structure according to claim 7, wherein a substrate is provided, and in the step of disposing a chip on one side of the substrate: a heat dissipation pad is disposed on a side of the chip away from the substrate;
    在所述塑封体远离所述基板的一侧设置开孔，所述开孔连通所述芯片远离所述基板的一侧的步骤中：所述开孔连通所述散热焊盘。In the step of disposing an opening on the side of the plastic package away from the substrate, and the opening communicates with the side of the chip away from the substrate: the opening communicates with the heat dissipation pad.
  9. 如权利要求6所述的散热封装结构的制备方法，其中，对所述芯片进行塑封，形成包裹所述芯片设置的塑封体的步骤中：The method for preparing a heat dissipation package structure according to claim 6, wherein, in the step of plastic-sealing the chip to form a plastic-sealing body disposed around the chip:
    所述塑封体的材质为LDS材料；The material of the plastic sealing body is LDS material;
    在所述塑封体远离所述基板的一侧设置散热金属层，得到散热封装结构的步骤，包括：The steps of disposing a heat-dissipating metal layer on the side of the plastic package away from the substrate to obtain a heat-dissipating package structure include:
    对所述塑封体远离所述基板的一侧的表面进行活化处理，使所述LDS材料中的有机金属复合物释放出金属粒子；Activating the surface of the side of the plastic package away from the substrate to release metal particles from the organometallic compound in the LDS material;
    在经过所述活化处理的所述塑封体的表面通过化学镀的方式沉积散热金属，形成散热金属层，得到散热封装结构。A heat-dissipating metal layer is formed by depositing a heat-dissipating metal on the surface of the activated plastic body by means of electroless plating, thereby obtaining a heat-dissipating package structure.
  10. 一种电子器件，其中，包括如权利要求1至5任意一项所述的散热封装结构。An electronic device, comprising the heat dissipation package structure according to any one of claims 1 to 5.
PCT/CN2021/118487 2020-09-21 2021-09-15 Heat dissipating packaging structure and preparation method therefor, and electronic device WO2022057822A1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112151469A (en) * 2020-09-21 2020-12-29 青岛歌尔微电子研究院有限公司 Heat dissipation packaging structure, preparation method thereof and electronic device
CN112885726B (en) * 2021-01-19 2022-03-25 杭州梵特斯科技有限公司 Intelligent power chip structure and manufacturing method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040118501A1 (en) * 2002-12-19 2004-06-24 Intel Corporation Heat transfer composite with anisotropic heat flow structure
CN102054799A (en) * 2010-01-30 2011-05-11 江苏长电科技股份有限公司 Encapsulating structure with exposed inner pin, inverted chip and radiating block provided with lock hole and externally connected with radiator through projecting post
CN103985695A (en) * 2014-05-19 2014-08-13 中国科学院微电子研究所 Fan-out type packaging structure and manufacturing process thereof
CN107316847A (en) * 2016-04-27 2017-11-03 中芯国际集成电路制造(上海)有限公司 A kind of package structure of semiconductor device and electronic installation
CN112151469A (en) * 2020-09-21 2020-12-29 青岛歌尔微电子研究院有限公司 Heat dissipation packaging structure, preparation method thereof and electronic device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9013035B2 (en) * 2006-06-20 2015-04-21 Broadcom Corporation Thermal improvement for hotspots on dies in integrated circuit packages
CN103021972B (en) * 2011-09-22 2015-09-09 讯芯电子科技（中山）有限公司 Chip-packaging structure and method
CN103441106A (en) * 2013-08-28 2013-12-11 江苏长电科技股份有限公司 Chip flip-mounting BGA encapsulating structure
CN106898591A (en) * 2015-12-21 2017-06-27 深圳市中兴微电子技术有限公司 A kind of multi-chip framework encapsulation structure of radiating and preparation method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040118501A1 (en) * 2002-12-19 2004-06-24 Intel Corporation Heat transfer composite with anisotropic heat flow structure
CN102054799A (en) * 2010-01-30 2011-05-11 江苏长电科技股份有限公司 Encapsulating structure with exposed inner pin, inverted chip and radiating block provided with lock hole and externally connected with radiator through projecting post
CN103985695A (en) * 2014-05-19 2014-08-13 中国科学院微电子研究所 Fan-out type packaging structure and manufacturing process thereof
CN107316847A (en) * 2016-04-27 2017-11-03 中芯国际集成电路制造(上海)有限公司 A kind of package structure of semiconductor device and electronic installation
CN112151469A (en) * 2020-09-21 2020-12-29 青岛歌尔微电子研究院有限公司 Heat dissipation packaging structure, preparation method thereof and electronic device

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