WO2022053084A1 - 配置多相交错电源相序方法、计算机存储介质和电子设备 - Google Patents

配置多相交错电源相序方法、计算机存储介质和电子设备 Download PDF

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Publication number
WO2022053084A1
WO2022053084A1 PCT/CN2021/130074 CN2021130074W WO2022053084A1 WO 2022053084 A1 WO2022053084 A1 WO 2022053084A1 CN 2021130074 W CN2021130074 W CN 2021130074W WO 2022053084 A1 WO2022053084 A1 WO 2022053084A1
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phase
power supply
phase sequence
sequence
supply branch
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PCT/CN2021/130074
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English (en)
French (fr)
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李硕
陈娜
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北京比特大陆科技有限公司
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Publication of WO2022053084A1 publication Critical patent/WO2022053084A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement

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  • the present invention relates to the technical field of integrated circuits, and in particular, to a method for configuring a phase sequence of a multi-phase interleaved power supply, a computer storage medium and an electronic device.
  • High-performance semiconductor IC integrated circuit, integrated circuit
  • CPU/GPU/ASIC central processing unit, central processing unit/Graphics Processing Unit, graphics processor/Application Specific Integrated Circuit, application-specific integrated circuit
  • the power supply POL point of load, point-of-load power supply
  • the output current of the phase branch is only AC current.
  • the layout scheme is usually placed in a line on one side of the IC device, and the phase sequence of the multi-phase branches is arranged in sequence, but the phase sequence configuration in sequence It will lead to serious imbalance of AC current on the entire power plane, especially when the AC current occupies a large proportion of the output current of the power supply, and in the case of light load in continuous mode, critical mode, discontinuous mode, etc., it will lead to the current plane. Serious imbalance, when the output current of the power supply in a local area is too small, the power supply pins of IC devices in this area can only be compensated by discharging the energy storage capacitor, thereby increasing the number of capacitors and increasing the design cost. At the same time, in the high-frequency switching multi-phase power supply, the large-scale unbalanced change of the AC current plane output by the power supply will also cause electromagnetic interference to become serious.
  • the present invention aims to solve at least one of the technical problems existing in the prior art.
  • an object of the present invention is to provide a method for configuring the phase sequence of a multi-phase interleaved power supply.
  • the second object of the present invention is to provide a computer storage medium.
  • the third object of the present invention is to provide an electronic device.
  • the fourth object of the present invention is to provide an electronic device.
  • the method for configuring the phase sequence of a multi-phase staggered power supply determines the phase sequence interval according to the phase number of the power supply branch of the multi-phase staggered power supply; configures any one-phase power supply branch of the multi-phase staggered power supply.
  • the circuit is the first phase sequence; starting from the power supply branch configured as the first phase sequence, the phase sequence of the other phase power supply branches of the multi-phase interleaved power supply is configured according to the phase sequence interval.
  • the phase sequence interval is determined according to the phase number of the power supply branch of the multi-phase staggered power supply, and the other phase power supply branches of the multi-phase staggered power supply are configured according to the phase sequence interval.
  • the phase sequence compared to setting the phase sequence of the power supply branches of the multi-phase staggered power supply in sequence, can reduce the unbalanced influence of the AC current plane output by the multi-phase staggered power supply, thereby reducing electromagnetic interference, and eliminating the need for local area When the output current of the power supply is too small, the number of capacitors is increased to reduce the cost.
  • the multi-phase interleaved power supply includes N-phase power supply branches, where N>3, and the phase sequence interval is determined according to the number of phases of the multi-phase interleaved power supply branches, including: less than (N- The first prime number that is not divisible by N appears in the prime number sequence of 1), the first prime number that is not divisible by N is assigned to m, and the phase sequence interval is determined to be m-1.
  • configuring the phase sequence of the power supply branches of other phases of the multi-phase interleaved power supply according to the phase sequence interval includes: starting from the power supply branch configured as the first phase sequence.
  • the sequential phase sequences are sequentially configured in a clockwise direction, wherein every m-1 power supply branch is configured as a phase sequence.
  • configuring the phase sequence of the power supply branches of other phases of the multi-phase interleaved power supply according to the phase sequence interval includes: starting from the power supply branch configured as the first phase sequence.
  • the sequential phase sequences are sequentially configured in a counterclockwise direction, wherein every m-1 power supply branch is configured as a phase sequence.
  • phase sequence of other phase power supply branches of the multi-phase interleaved power supply starting from the power supply branch configured as the first phase sequence, configuring the phase sequences of other phase power supply branches of the multi-phase interleaved power supply according to the phase sequence interval, further comprising: The phase sequence of the other power supply branches of the multi-phase staggered power supply has not completed the phase sequence configuration.
  • one power supply branch is extended in the counterclockwise direction;
  • the power supply branch at the position after the clock clockwise is extended by one power supply branch is the new starting point, and the phase sequence of the remaining power supply branches without phase sequence is continued to be configured, wherein, every m-1 power supply branch is configured as a phase sequence; Until the phase sequences of other power supply branches of the multi-phase interleaved power supply are all configured.
  • phase sequence of other phase power supply branches of the multi-phase interleaved power supply starting from the power supply branch configured as the first phase sequence, configuring the phase sequences of other phase power supply branches of the multi-phase interleaved power supply according to the phase sequence interval, further comprising: The phase sequence of the other power supply branches of the multi-phase staggered power supply has not completed the phase sequence configuration.
  • one power supply branch is extended in the clockwise direction;
  • the power supply branch at the position after the clock clockwise is extended by one power supply branch is the new starting point, and the phase sequence of the remaining power supply branches without phase sequence is continued to be configured, wherein, every m-1 power supply branch is configured as a phase sequence; Until the phase sequences of all power supply branches of the multi-phase interleaved power supply are all configured.
  • the computer storage medium has a computer program stored thereon, and is characterized in that, when the computer program is executed by a processor, any one of the configuration multi-phase interleaved power supply phases described above is realized. sequential method.
  • the computer program stored thereon runs, and an executable instruction is sent to the processor 101.
  • the method for configuring the phase sequence of the multi-phase interleaved power supply is implemented, thereby optimizing the The stability of the AC current plane further improves the dynamic response capability of the power supply load.
  • the electronic device includes: a memory connected in communication with at least one processor and at least one processor; wherein, a computer program executable by the at least one processor is stored in the memory , when at least one processor executes the computer program, any one of the methods for configuring a phase sequence of a multi-phase interleaved power supply is implemented.
  • a computer program stored on the computer program is executed, and an executable instruction is sent to the processor.
  • the computer program is executed by the processor, the method for configuring the phase sequence of a multi-phase interleaved power supply is implemented, thereby optimizing the AC current plane. stability.
  • the electronic device includes: a main board and an IC device arranged on the main board; a multi-phase interleaved power supply, the multi-phase interleaved power supply is used to supply power to the IC device;
  • the controller is configured to configure the phase sequence of each phase power supply branch in the multi-phase staggered power supply according to any one of the methods for configuring a multiphase staggered power supply sequence.
  • the multi-phase power supply branches in the multi-phase interleaved power supply are arranged according to the first phase, the second phase, the third phase, the fourth phase, the fifth phase, the sixth phase, the seventh phase, the During the process of AC power supply in the eighth phase, the maximum and minimum values of the instantaneous AC current values of these phases can coexist, which can greatly optimize the stability of the AC current plane, reduce electromagnetic interference, and further improve the dynamic response of the power supply load.
  • the multi-phase interleaved power supply includes an N-phase power supply branch; the N-phase power supply branch is arranged on one side of the IC device and is arranged in a row; or, the N-phase power supply The branches are evenly arranged on both sides of the IC device, and the power supply branches on each side of the IC device are arranged in a row; or, the N-phase power supply branches are arranged around the circumference or circumference of the IC device .
  • the method for configuring the phase sequence of the multi-phase staggered power supply proposed by the present invention can reduce the unbalanced influence of the AC current plane output by the multi-phase staggered power supply, and reduce the electromagnetic interference, thereby reducing the number of capacitors and reducing the cost.
  • FIG. 1 is a schematic diagram of a method for configuring a multi-phase interleaved power supply phase sequence in the prior art
  • FIG. 2 is a flowchart of a method for configuring a multi-phase interleaved power supply phase sequence according to an embodiment of the present invention
  • FIG. 3 is a schematic diagram of a method of clockwise configuring eight-phase power supply branches in a multi-phase interleaved power supply phase sequence
  • FIG. 4 is a schematic diagram of a method for configuring counterclockwise six-phase power supply branches in a multi-phase staggered power supply phase sequence
  • FIG. 5 is a schematic diagram of a phase sequence configuration method of an eight-phase power supply branch in a multi-phase interleaved step-down power supply common in the prior art
  • FIG. 6 is a waveform diagram of the output alternating current of each phase power supply branch in an eight-phase power supply branch with time;
  • FIG. 7 is a schematic diagram of the layout of an eight-phase power supply branch in a multi-phase interleaved power supply according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of a phase sequence configuration method of a six-phase power supply branch in the prior art
  • FIG. 9 is a waveform diagram of the time-varying alternating current of the output of each phase power supply branch in a six-phase power supply branch;
  • FIG. 10 is a schematic diagram of the layout of a six-phase power supply branch in a multi-phase interleaved power supply according to an embodiment of the present invention
  • FIG. 11 is a block diagram of an electronic device according to an embodiment of the present invention.
  • FIG. 12 is a block diagram of an electronic device according to another embodiment of the present invention.
  • FIG. 13 is a schematic diagram of a multi-phase staggered power supply placed in a line on one side of an IC device
  • Figure 14 is a schematic diagram of a multi-phase interleaved power supply placed in a ring centered on the IC device.
  • Electronic equipment 10, electronic equipment 20, IC device 100 multi-phase interleaved power supply 200, controller 300, main board 400, interleaved power supply 200a, interleaved power supply 200b, interleaved power supply 200c, interleaved power supply 200d, processor 101, memory 102, eight-phase Power supply road (power supply branch 301, power supply branch 302, power supply branch 303, power supply branch 304, power supply branch 305, power supply branch 306, power supply branch 307, power supply branch 308).
  • power supply branch 301 power supply branch 302, power supply branch 303, power supply branch 304, power supply branch 305, power supply branch 306, power supply branch 307, power supply branch 308.
  • FIG. 1 is a schematic diagram of a method for configuring a phase sequence of a multi-phase interleaved power supply in the prior art.
  • the multi-phase interleaved power supply may include N-phase power supply branches, wherein N>3 may be set, for example, the value of N may be 6 or 8 or 12 and so on.
  • N>3 may be set, for example, the value of N may be 6 or 8 or 12 and so on.
  • the multi-phase staggered power supply in the process of configuring the phase sequence of the multi-phase staggered power supply, can be equivalent to that there is a ring around the IC device, and the ring can be corresponding to the number of phases of the N-phase power supply branch. Divide into N vacancies.
  • the first phase, the second phase, the third phase, the N-2th phase, the N-1th phase, and the Nth phase of the power supply branch can be equalized, and then follow the clockwise or counterclockwise order. Correspondingly placed in N vacancies.
  • FIG. 2 is a flowchart of a method for configuring a multi-phase interleaved power supply phase sequence according to an embodiment of the present invention.
  • the method for configuring a phase sequence of a multi-phase interleaved power supply may include at least steps S101-S103.
  • phase sequence interval Determine the phase sequence interval according to the number of phases of the multi-phase staggered power supply branches.
  • the corresponding phase sequence interval may be determined corresponding to the number of phases of the N-phase power supply branch.
  • the phase sequence interval of the eight-phase power supply branch may be set to 2, or the phase sequence interval of the six-phase power supply branch may be set to 2.
  • the phase sequence interval is set to 1.
  • S102 configure any one-phase power supply branch of the multi-phase staggered power supply as the first phase sequence.
  • the multi-phase staggered power supply in the process of configuring the phase sequence of the multi-phase staggered power supply, can also be equivalent to that there is a ring around the IC device, and the ring can be corresponding to the N-phase power supply branch.
  • the number of phases is divided into N vacancies.
  • the circle surrounding the IC device can be divided into 8 vacancies.
  • any one-phase power supply branch in the N-phase power supply branches can be selected, and the selected one-phase power supply branch can be defined as the first phase sequence.
  • the phase sequence interval of the eight-phase power supply branch set to 2 as an example, any phase in the eight-phase power supply branch can be arbitrarily selected as the first phase, and the first phase can be placed in 8 circles around the IC device. in any one of the vacancies.
  • phase sequences of the power supply branches of other phases of the multi-phase staggered power supply according to the phase sequence interval.
  • the phase sequence interval of the eight-phase power supply branch set to 2 as an example, after the first phase is placed in any one of the eight vacancies surrounding the IC device, the eight-phase power supply branch can be set again.
  • the other phases are set to other vacancies at corresponding intervals in a clockwise or counterclockwise order.
  • the second phase and the first phase can be set two vacancies apart, and the third phase and the The second phase is set at two vacancies, the third phase and the fourth phase are set at two vacancies, the fourth and fifth phases are set at two vacancies, the fifth and sixth phases are set at two vacancies, and the sixth and fifth phases are set at two vacancies.
  • the phase and the seventh phase are set at two vacancies, and the seventh phase and the eighth phase are set at two vacancies, until the phase sequences of all the power supply branches of the multi-phase interleaved power supply are all configured.
  • the phase sequences of the multi-phase staggered power supply are set crosswise, so that the phase sequences of these phases can be set.
  • the maximum and minimum values of the AC current instantaneous value coexist, which can greatly optimize the stability of the AC current plane, reduce electromagnetic interference, and further improve the dynamic response capability of the power supply load.
  • the multi-phase interleaved power supply may include N-phase power supply branches, wherein N>3 may be set, for example, the value of N may be 6 or 8 or 12, etc., and the power supply can be supplied according to the multi-phase interleaved power supply
  • the phase number of the branch determines the phase sequence interval. If the first prime number that is not divisible by N appears in the prime number sequence less than (N-1), the first prime number that is not divisible by N can be assigned to m, and the phase sequence is determined.
  • the sequence interval is m-1, and the prime number sequence is a recognized array.
  • the prime number sequence can be 2, 3, 5, 7, 11, 13, 17, 19, etc., and the number of prime numbers can be infinite.
  • N-phase power supply branch if the value of N is 8, the value of (N-1) can be calculated to be 7, and the sequence of prime numbers less than 7 can be 2, 3, and 5. Select the first prime number that is not divisible by 8 in the sequence 2, 3, and 5. You can judge whether the prime number is divisible by 8 from the smallest prime number in the sequence from small to large.
  • a prime number is divisible by 8 until the first prime number that is not divisible by 8 appears, the prime number is assigned to m, for example, the prime number 2 is divisible by 8, the prime number 3 is not divisible by 8, and the prime number 3 is determined as a prime number sequence
  • N-phase power supply branch if the value of N is 6, the value of (N-1) can be calculated as 5, and the sequence of prime numbers less than 5 can be 2 and 3. It is necessary to select the first prime number that is not divisible by 6 in the sequence 2 and 3, and determine whether the prime number is divisible by 6 in order from the smallest prime number in the sequence.
  • the prime number 2 is divisible by 6, and the prime number 3 If it can be divisible by 6, then there is no prime number less than 6 and divisible by 6.
  • the method for configuring the phase sequence of a multi-phase interleaved power supply selects a prime number sequence and determines whether there is a first prime number that cannot be divisible by the phase number value in the multi-phase power supply branch. The method is selected to determine the phase sequence interval. If it does not exist, the phase sequence interval can be determined to be 1. Determining the phase sequence interval can separate the phases originally adjacently arranged in the prior art during the sorting process, and can be separated by at least one interval, and there is no adjacent phenomenon, which can meet the phase sequence layout requirements of multi-phase interleaved power supplies.
  • the power supply branches of the first phase sequence can be configured first, and then the phase sequences of the other phase power supply branches of the multi-phase interleaved power supply can be configured according to the determined phase sequence interval.
  • the phase sequence in the clockwise direction can be used to configure the sequence, and every m-1 power supply branch can be configured as a phase sequence.
  • the sequential phase sequence is configured in a clockwise direction, and every m-1 power supply branch can be configured as a phase sequence, there are also phases of other power supply branches in the multi-phase staggered power supply.
  • the phase sequence configuration has not been completed, and there is a power supply branch that needs to be configured with a phase sequence that has already been configured with a phase sequence, you can extend a power supply branch in a clockwise direction, and you can extend a power supply branch in a clockwise direction.
  • the power supply branch is the new starting point, continue to configure the phase sequence of the remaining power supply branches without phase sequence configuration, wherein, every m-1 power supply branch is configured as a phase sequence, until all the power supply branches of the multi-phase interleaved power supply The phase sequence of the road is all configured.
  • the power supply branches of the first phase sequence can be configured first, and then the phase sequences of the other phase power supply branches of the multi-phase interleaved power supply can be configured according to the determined phase sequence interval.
  • the phase sequence of the sequence can be configured in a counterclockwise direction, and each m-1 power supply branch can be configured as a phase sequence.
  • every m-1 power supply branch can be configured as a phase sequence
  • a power supply branch can be extended in the counterclockwise direction, and the position after a power supply branch can be extended in a counterclockwise direction.
  • the power supply branch is the new starting point, continue to configure the phase sequence of the remaining power supply branches without phase sequence configuration, wherein, every m-1 power supply branch is configured as a phase sequence, until all the power supply branches of the multi-phase interleaved power supply The phase sequence of the road is all configured.
  • FIG. 3 is a schematic diagram of a method for clockwise configuration of eight-phase power supply branches in a multi-phase interleaved power supply phase sequence.
  • the multi-phase staggered power supply 200 can be equivalent to the existence of the existing around the IC device 100 .
  • a ring-shaped structure surrounded by a circle, and 8 vacancies corresponding to the number of phases of the eight-phase power supply branch can be provided in the multi-phase interleaved power supply 200.
  • the phase number is determined according to the phase number of the power supply branch of the multi-phase interleaved power supply. sequence interval, it can be obtained that when the power supply branch is an eight-phase power supply branch, the phase sequence interval is 2. You can choose any vacancy among the 8 vacancies, and you can set the position number to 1, and set it to the first phase at the same time, and then you can move clockwise, after 2 position numbers, the second phase, and then continue to space 2 vacancies.
  • place the 3rd phase then continue to space 2 blank numbers, place the 4th phase, and then continue to separate 2 blank numbers, place the 5th phase, and then continue to space 2 blank numbers, place the 6th phase, After continuing to separate 2 blanks, place the 7th phase, and then continue to separate 2 blanks, then place the 8th phase until the 8 blanks are filled.
  • FIG. 4 is a schematic diagram of a method for clockwise configuration of six-phase power supply branches in a multi-phase interleaved power supply phase sequence.
  • the multi-phase staggered power supply 200 can be equivalent to the existence of the existing around the IC device 100 .
  • a ring structure surrounded by a circle, and 6 vacancies corresponding to the number of phases of the six-phase power supply branch can be provided in the multi-phase interleaved power supply 200.
  • the phase is determined according to the phase number of the multi-phase interleaved power supply branch. sequence interval, it can be obtained that when the power supply branch is a six-phase power supply branch, the phase sequence interval is 1. You can choose any one of the 6 vacancies, and you can set the bit number to 1, and set it to the first phase at the same time, then you can move clockwise, after an interval of 1 bit number, the second phase, and then continue to interval 1 empty number After that, place the 3rd phase, and then continue to place the 4th phase after the interval of 1 space number.
  • Phase 1 has already been placed on it. Then it can be placed 1 position in the clockwise direction, the fourth phase can be placed in the next vacancy of the first phase in a clockwise direction, and the third phase is separated by two vacancies, and then the fifth phase can be placed in the process. Take Phase 4 as the starting phase, continue to space 1 space, place the 5th phase, and continue to space 1 space, then place the 6th phase until the 6 spaces are filled.
  • the method for configuring the phase sequence of a multi-phase staggered power supply in the embodiment of the present invention can determine the phase sequence interval according to the number of phases of the N-phase power supply branches in the phase sequence of the multi-phase staggered power supply, and determine the corresponding vacancy according to the phase sequence interval.
  • the adjacent phase sequences are arranged at the vacancy determined by the interval, which can separate the original two adjacent phase sequences.
  • the sorting method can be arranged clockwise or counterclockwise. The sorting method is simple, fast and flexible. When the multi-phase staggered power supply scheme is adopted, the phase sequence configuration can be performed quickly, and the adjacent phase sequences in the prior art can be effectively arranged at intervals.
  • FIG. 5 is a schematic diagram of a phase sequence configuration method of an eight-phase power supply branch in a multi-phase interleaved power supply common in the prior art.
  • the multi-phase interleaved power supply 200 can be equivalent to a circle surrounding the IC device 100 , and can be used in the multi-phase interleaved power supply 200 is provided with 8 vacancies corresponding to the number of phases of the eight-phase power supply branch, for example, the eight vacancies can be set adjacent to the left side of the ring, and the eight-phase power supply branch is defined as the power supply branch 301, the power supply branch 302,
  • the power supply branch 303, the power supply branch 304, the power supply branch 305, the power supply branch 306, the power supply branch 307 and the power supply branch 308, the power supply branch 301 can also be defined as the first phase, and the power supply branch 302 can be defined as the first phase.
  • the power supply branch 303 is defined as the third phase
  • the power supply branch 304 is defined as the fourth phase
  • the power supply branch 305 is defined as the fifth phase
  • the power supply branch 306 is defined as the sixth phase
  • the power supply branch 307 is defined as the fourth phase.
  • the power supply branch 308 is defined as the eighth phase
  • the eight-phase power supply branch is divided into the first phase, the second phase, the third phase, the fourth phase, the fifth phase, the sixth phase, the seventh phase, and the eighth phase.
  • the phases are arranged in sequence, and are sequentially set clockwise into the eight vacancies.
  • the power supply branch 301, the power supply branch 302, the power supply branch 303, and the power supply branch 304 it is also possible to define the power supply branch 301, the power supply branch 302, the power supply branch 303, and the power supply branch 304 to form an area A, and define the power supply branch 305, the power supply branch 306, the power supply branch 307, and the power supply branch 308. Area.
  • FIG. 6 is a waveform diagram of the change of the AC current output by each phase power supply branch in an eight-phase power supply branch with time.
  • only one phase power supply branch of the multi-phase power supply branch in a working cycle is in the inductive charging state, and the other phase power supply branches are in the inductive discharge state. state, and can control the power supply branches of each phase to alternately complete the inductor charging state and the inductor discharging state.
  • the AC current waveforms of the power supply branches of the first phase to the eighth phase will be in an staggered state in one working cycle.
  • the eight-phase power supply branch may also be divided into two areas, which are area A and area B respectively.
  • the AC current value output by the first phase power supply branch is 0, the AC current value output by the second phase power supply branch is 1, and the third phase power supply branch is 1.
  • the AC current value output by the circuit is 2, and the AC current value output by the fourth-phase power supply branch is 3.
  • the AC current value output by the 5th phase power supply branch is 4, the AC current value output by the 6th phase power supply branch is 5, the AC current value output by the 7th phase power supply branch is 6, and the 8th phase power supply branch
  • the AC current value output by the circuit is 7.
  • the total current value in area A is the sum of the AC current values output by the 1st to 4th phase power supply branches
  • the total current value in B area is the AC current value output by the 5th to 8th phase power supply branches
  • time t4 the AC current value output by the first phase power supply branch is 7, the AC current value output by the second phase power supply branch is 6, and the output by the third phase power supply branch is 6.
  • the AC current value is 5, and the AC current value output by the 4th phase power supply branch is 4.
  • the AC current value output by the 5th phase power supply branch is 3, the AC current value output by the 6th phase power supply branch is 2, the AC current value output by the 7th phase power supply branch is 1, and the 8th phase power supply branch
  • the AC current value output by the circuit is 0.
  • the total current value of the A area is 22, the total current value of the B area is 6, and the difference between the currents of the A area and the B area is 12. It can be obtained that the ratio of the current in the A region to the B region is 22:6 at the middle time after the cycle starts.
  • the total current value of zone A is 6
  • the total current value of zone B is 22, and the ratio of current between zone A and zone B is 6: 22.
  • the difference between the current in the A area and the B area is 12.
  • the sequential configuration of the phases may lead to serious imbalance of AC currents in local areas such as the A area and the B area on the entire power plane.
  • a serious imbalance of the current plane will be caused.
  • the power supply pins of the IC device in this area can only discharge the energy storage capacitor to supplement the current, but the number of capacitors will increase, and the design cost will also increase.
  • the large unbalanced change of the AC current plane output by the power supply will also cause electromagnetic interference to become serious.
  • FIG. 7 is a schematic diagram of the layout of an eight-phase charging branch in a multi-phase interleaved power supply according to an embodiment of the present invention.
  • the multi-phase interleaved power supply may include an N-phase charging branch, where N may be 8.
  • N may be 8.
  • the multi-phase interleaved power supply can surround the IC device. 100 circles are set. After setting the phase sequence of the eight-phase charging branch according to the method for configuring the phase sequence of the multi-phase interleaved power supply according to the embodiment of the present invention, it can be obtained that the first phase is used as the starting point, and the clockwise sorting results are the first phase and the fourth phase. , Phase 7, Phase 2, Phase 5, Phase 8, Phase 3, Phase 6.
  • the phase sequence configuration of the six-phase power supply branch in the embodiment of the present invention is shown in FIG. 7 , and the sorting result of the eight-phase charging branch in the embodiment of the present invention can also be divided into two areas, and the first area may include any adjacent area.
  • the adjacent four-phase charging branches included in the second area may include the 5th phase, the 8th phase, the 3rd phase and the 6th phase corresponding to the first area, or may include the 8th phase, the 3rd phase and the 6th phase.
  • the adjacent four-phase charging branches included in the first area may be the first phase, the fourth phase, the seventh phase, and the second phase, then the adjacent four-phase charging branches included in the second area are charged.
  • the branch can be the 5th phase, the 8th phase, the 3rd phase, and the 6th phase.
  • the AC current values output by the four power supply branches of the first phase, the fourth phase, the seventh phase and the second phase included in the first area are respectively 0, 3, 6 and 1
  • the AC current values output by the four power supply branches of the 5th phase, the 8th phase, the 3rd phase and the 6th phase included in the second area are 4, 7, 2 and 5 respectively.
  • the total current value of the first area is the sum of the AC current values output by the four power supply branches including the first phase, the fourth phase, the seventh phase and the second phase included in the first area, and the total value of the second area
  • the current value is the sum of the AC current values output by the 5th, 8th, 3rd and 6th power supply branches included in the second area, then at time t0, the total current of the first area
  • the value is 10
  • the total current value of the second zone is 18, and the difference between the current values of the first zone and the second zone is 8. It can be obtained that at the beginning of the cycle, the ratio of the current in the first region to its second region is 10:18.
  • the AC current values output by the four power supply branches of the first phase, the fourth phase, the seventh phase and the second phase included in the first area are 4 and 7, respectively.
  • the AC current values output by the four power supply branches of the 5th phase, the 8th phase, the 3rd phase and the 6th phase included in the second area are 0, 3, 6 and 1 respectively.
  • the total current value of the first area is 18, the total current value of the second area is 10, and the difference between the current values of the first area and the second area is 8. It can be obtained that at time t4, the ratio of the current between the first region and its second region is 18:10.
  • the total current value of the first area is 10
  • the total current value of the second area is 18, then the ratio of the current extreme value of the first area to the second area is 10:18, the value of the current in the first zone and the second zone differs by 8.
  • the current in the first region can reach the minimum and the current in the second region can reach the maximum.
  • the current in the first zone reaches the maximum and the current in the second zone reaches the minimum.
  • the current in the first zone reaches the minimum again, and the current in the second zone reaches the maximum again, and the cycle repeats itself.
  • the difference between the current extreme values of the first zone and its second zone is at most 8.
  • the difference between zone A and zone B For the maximum difference of the regional current extreme value of 12, the variation range of the extreme value is reduced by one third, and the standard deviation of the discrete type is also reduced by one third.
  • the adjacent four-phase charging branches included in the first area may be the fourth phase, the seventh phase, the second phase and the fifth phase, then the adjacent four-phase charging circuits included in the second area are charged
  • the branch can be 8th phase, 3rd phase, 6th phase and 1st phase. It can be seen from Figure 6 that at the beginning of the cycle, that is, time t0, the AC current values output by the four power supply branches included in the first area are 3, 6, 1, and 4, respectively, and the four power supply branches included in the second area. The AC current values output by the circuit are 7, 2, 5 and 0 respectively. Then at time t0, the total current value of the first area is 14, and the total current value of the second area is 14.
  • the AC current values output by the four power supply branches included in the first area are 7, 2, 5, and 0, respectively, and the AC current values output by the four power supply branches included in the second area are 3 , 6, 1, and 4.
  • the total current value of the first area is 14, and the total current value of the second area is 14.
  • the total current value of the second area is 14. It can be obtained that in the entire current cycle, the current values of the first area and the second area are always equal and can remain unchanged, both are 14, the first area and its second area.
  • the current ratio is always 14:14.
  • the adjacent four-phase charging branches included in the first area may be the seventh phase, the second phase, the fifth phase and the eighth phase, then the adjacent four-phase charging branches included in the second area are charged
  • the branches can be Phase 3, Phase 6, Phase 1 and Phase 4. It can be seen from Figure 6 that at the beginning of the cycle, that is, time t0, the AC current values output by the four power supply branches included in the first area are 6, 1, 4, and 7, respectively, and the four power supply branches included in the second area. The AC current values output by the circuit are 2, 5, 0 and 3, respectively. Then, at time t0, the total current value of the first area is 18, the total current value of the second area is 10, and the difference between the current values of the first area and the second area is 8.
  • the ratio of the current in the first region to its second region is 18:10.
  • the AC current values output by the four power supply branches included in the first area are 2, 5, 0 and 3, respectively, and the four power supply branches included in the second area are The output AC current values are 6, 1, 4, and 7, respectively.
  • the total current value of the first area is 10
  • the total current value of the second area is 18, and the difference between the current values of the first area and the second area is 8. It can be obtained that at time t4, the ratio of the current between the first region and its second region is 10:18.
  • the ratio of the current extreme value of the first area to the second area is At 18:10, the value of the current in the first zone and the second zone differs by 8.
  • the current in the first region can reach the maximum and the current in the second region can reach the minimum.
  • the current in the first zone reaches the minimum and the current in the second zone reaches the maximum.
  • the current in the first zone reaches the maximum again, and the current in the second zone reaches the minimum again, and the cycle repeats itself.
  • the difference between the current extreme values of the first zone and its second zone is at most 8.
  • the difference between zone A and zone B For the maximum difference of the regional current extreme value of 12, the variation range of the extreme value is reduced by one third, and the standard deviation of the discrete type is also reduced by one third.
  • the adjacent four-phase charging branches included in the first area may be the second phase, the fifth phase, the eighth phase and the third phase, and the adjacent four-phase charging branches included in the second area are charged.
  • the branches can be 6th phase, 1st phase, 4th phase and 7th phase. It can be seen from Figure 6 that at the beginning of the cycle, that is, time t0, the AC current values output by the four power supply branches included in the first area are 5, 0, 3, and 6, respectively, and the four power supply branches included in the second area. The AC current values output by the circuit are 1, 4, 7 and 2, respectively. Then at time t0, the total current value of the first area is 14, and the total current value of the second area is 14.
  • the AC current values output by the four power supply branches included in the first area are 4, 7, 2, and 5, respectively, and the four power supply branches included in the second area are The output AC current values are 0, 3, 6, and 1, respectively.
  • the total current value of the first area is 14, and the total current value of the second area is 14.
  • the total current value of the second area is 14. It can be obtained that in the entire current cycle, the current values of the first area and the second area are always equal and can remain unchanged, both are 14, the first area and its second area.
  • the current ratio is always 14:14.
  • the ordering method of the multi-phase power supply branches is different, and the dynamic current between any two adjacent phases is also different in the whole cycle floating range.
  • the embodiment of the present invention configures Compared with the phase sequence configuration method of the eight-phase power supply branch in the prior art as shown in FIG. 5, the method of the phase sequence of the multi-phase interleaved power supply has a maximum difference of 12 between the current extreme values of the A area and the B area.
  • the range of variation can be reduced by at least one-third, and the standard deviation of the discrete type can also be reduced by at least one-third.
  • the stability of the AC current plane can be greatly optimized, further improving the dynamic response capability of the power supply load, reducing electromagnetic interference, and local
  • the output current of the power supply in the area is too small, the number of added capacitors can be reduced and the design cost can be reduced.
  • FIG. 8 is a schematic diagram of a phase sequence configuration of a six-phase power supply branch in a multi-phase interleaved step-down power supply common in the prior art
  • the multi-phase interleaved power supply 200 can be equivalent to a circle surrounding the IC device 100 , and the multi-phase interleaved power supply 200 can be provided with six corresponding to the number of phases of the six-phase power supply branch.
  • the six-phase power supply branches are defined as power supply branch 301, power supply branch 302, power supply branch 303, power supply branch 304, power supply branch 305,
  • the power supply branch 306 the power supply branch 301 can also be defined as the first phase
  • the power supply branch 302 can be defined as the second phase
  • the power supply branch 303 can be defined as the third phase
  • the power supply branch 304 can be defined as the fourth phase
  • the power supply branch 304 can be defined as the fourth phase
  • the branch circuit 305 is defined as the fifth phase
  • the power supply branch circuit 306 is defined as the sixth phase. Arranged in order, and set clockwise into six vacancies in turn.
  • a power supply branch 301 it is also possible to define a power supply branch 301, a power supply branch 302, and a power supply branch 303 to form an A' area, and define a power supply branch 304, a power supply branch 305, and a power supply branch 306 to form a B' area.
  • FIG. 9 is a waveform diagram of the time-varying alternating current of the output of each phase power supply branch in a six-phase power supply branch.
  • only one phase power supply branch of the multi-phase power supply branch in a working cycle is in the inductive charging state, and the other phase power supply branches are in the inductive discharge state. state, and can control the power supply branches of each phase to alternately complete the inductor charging state and the inductor discharging state.
  • the AC current waveforms of the power supply branches of the first phase to the sixth phase will be in an staggered state in one working cycle.
  • the six-phase power supply branch can also be divided into two areas, namely the A' area and the B' area.
  • the AC current value output by the first phase power supply branch is 0, the AC current value output by the second phase power supply branch is 1, and the third phase power supply branch is 1.
  • the AC current value output by the circuit is 2, and the AC current value output by the fourth-phase power supply branch is 3.
  • the AC current value output by the fifth-phase power supply branch is 4, and the AC current value output by the sixth-phase power supply branch is 5.
  • the total current value of A' is the sum of the AC current values output by the 1st to 3rd phase power supply branches
  • the total current value of B' is the AC current value output by the 4th to 6th phase power supply branches
  • the sum of the current values, at time t0, the total current value of the A' area is 3, the total current value of the B' area is 12, and the difference between the currents in the A' area and the B' area is 9. It can be obtained that at the beginning of the cycle, the ratio of the current in the A' region to the B' region is 3:12.
  • the AC current value output by the first phase power supply branch is 4, the AC current value output by the second phase power supply branch is 5, and the output by the third phase power supply branch is 5.
  • the AC current value is 6, and the AC current value output by the 4th phase power supply branch is 7.
  • the AC current value output by the fifth-phase power supply branch is 0, and the AC current value output by the sixth-phase power supply branch is 1.
  • the total current value in the A' area is 15, the total current value in the B' area is 8, and the difference between the currents in the A' area and the B' area is 7. It can be obtained that the ratio of the current in the A' area to the B' area is 15:8 at the middle time after the start of the cycle.
  • the total current value in the A' area is 3
  • the total current value in the B' area is 12
  • the sum of the currents in the A' area and the B' area is 12.
  • the ratio is 3:12 and the difference between the currents in the A' area and the B' area is 9.
  • the sequential configuration of the phases may cause serious imbalance of AC currents in local areas such as the A' area and the B' area on the entire power plane.
  • a serious imbalance of the current plane will be caused.
  • the power supply pins of the IC device in this area can only discharge the energy storage capacitor to supplement the current, but the number of capacitors will increase, and the design cost will also increase.
  • the large unbalanced change of the AC current plane output by the power supply will also cause electromagnetic interference to become serious.
  • FIG. 10 is a schematic diagram of the layout of a six-phase power supply branch in a multi-phase interleaved power supply according to an embodiment of the present invention
  • the multi-phase interleaved power supply may include N-phase charging branches, where N may be 6.
  • N may be 6.
  • the multi-phase interleaved power supply can be arranged around the circumference of the IC device 100, and the six After the phase sequence of the phase charging branch is set according to the method for configuring the phase sequence of the multi-phase interleaved power supply in the embodiment of the present invention, the first phase is used as the starting point, and the clockwise sorting results are the first phase, the fourth phase, the second phase, and the first phase.
  • the phase sequence configuration of the six-phase power supply branch in the embodiment of the present invention is shown in FIG. 10 .
  • the sorting result of the six-phase charging branch in the embodiment of the present invention can also be divided into two areas, and the first area may include any adjacent area.
  • the three-phase charging branch, the second area may include the remaining three-phase charging branches except the three-phase charging branch in the first area, for example, the adjacent three-phase charging branch included in the first area may include the third Phase 1, Phase 4, and Phase 2, or may include Phase 4, Phase 2, and Phase 6, or may include Phase 2, Phase 6, and Phase 3.
  • the adjacent three-phase charging branches included in the second area may include the fifth phase, the third phase and the sixth phase corresponding to the first area, or may include the first phase, the fifth phase and the third phase, or may include Phase 5, Phase 1 and Phase 4.
  • the adjacent three-phase charging branches included in the first area may be the first phase, the fourth phase, and the second phase
  • the adjacent three-phase charging branches included in the second area may be Phase 5, Phase 3 and Phase 6.
  • the AC current values output by the four power supply branches of the first phase, the fourth phase and the second phase included in the first area are 0, 3 and 0, respectively.
  • the AC current values output by the three power supply branches of the 5th phase, the 3rd phase and the 6th phase included in the second area are 4, 2 and 5 respectively.
  • the total current value of the first zone is the sum of the AC current values output by the three power supply branches of the first, fourth and second phases included in the first zone, and the total current value of the second zone is the first
  • the sum of the AC current values output by the 5th, 3rd and 6th power supply branches included in the second area then at time t0, the total current value of the first area is 4, and the second area is 4.
  • the total current value is 11, and the value of the current in the first zone and the second zone differs by 7. It can be obtained that at the beginning of the cycle, the ratio of the current in the first region to its second region is 4:11.
  • the AC current values output by the four power supply branches of the first phase, the fourth phase and the second phase included in the first area are 4, 7 and 5, respectively.
  • the AC current values output by the three power supply branches of the 5th phase, the 3rd phase and the 6th phase included in the second area are 0, 6 and 1 respectively.
  • the total current value of the first area is 16, the total current value of the second area is 7, and the difference between the current values of the first area and the second area is 9. It can be obtained that at time t4, the ratio of the current between the first region and its second region is 16:7.
  • the total current value of the first area is 4, and the total current value of the second area is 11, then the ratio of the current extreme value of the first area to the second area is 4:11, the value of the current in the first zone and the second zone differs by 7.
  • the current in the first region can reach the minimum and the current in the second region can reach the maximum.
  • the current in the first zone reaches the maximum and the current in the second zone reaches the minimum.
  • the current in the first zone reaches the minimum again, and the current in the second zone reaches the maximum again, and the cycle repeats itself.
  • the difference between the current extreme values of the first region and its second region is at most 9.
  • the current extreme value difference between the A' area and the B' area is the largest 9, and the variation range of the extreme value is the same.
  • the adjacent three-phase charging branches included in the first area may be the fourth phase, the second phase, and the sixth phase
  • the adjacent three-phase charging branches included in the second area may be Phase 1, Phase 5 and Phase 3.
  • the AC current values output by the three power supply branches included in the first area are 3, 1, and 5, respectively
  • the three power supply branches included in the second area are The output AC current values are 0, 4, and 2, respectively.
  • the total current value of the first area is 9, the total current value of the second area is 6, the ratio of the current between the first area and the second area is 9:6, and the current between the first area and the second area is 9:6.
  • the values differ by 3.
  • the AC current values output by the three power supply branches included in the first area are 7, 5, and 1, respectively, and the AC current values output by the three power supply branches included in the second area are 4, 0, respectively and 6.
  • the total current value of the first area is 13
  • the total current value of the second area is 10
  • the ratio of the current between the first area and the second area is 13:10
  • the current between the first area and the second area is 13:10.
  • the values differ by 3.
  • the total current value of the first area is 9, and the total current value of the second area is 6, then the ratio of the extreme value of the current between the first area and the second area is 9:6, the value of the current in the first zone and the second zone differs by 3.
  • the current in the first region can reach the maximum and the current in the second region can reach the minimum.
  • the current in the first zone reaches the minimum and the current in the second zone reaches the maximum.
  • the current in the first zone reaches the maximum again, and the current in the second zone reaches the minimum again, and the cycle repeats itself.
  • the difference between the current extreme values of the first zone and its second zone is at most 3.
  • the maximum value is 9, the variation range of the extreme value is reduced, and the standard deviation of the discrete type is also reduced.
  • the adjacent three-phase charging branches included in the first area may be the second phase, the sixth phase, and the third phase
  • the adjacent three-phase charging branches included in the second area may be Phase 5, Phase 1 and Phase 4.
  • the AC current values output by the three power supply branches included in the first area are 1, 5, and 2, respectively, and the three power supply branches included in the second area.
  • the output AC current values are 4, 0, and 3, respectively.
  • the total current value of the first area is 8
  • the total current value of the second area is 7
  • the ratio of the current between the first area and the second area is 8:7
  • the current between the first area and the second area is 8:7.
  • the values differ by 1.
  • the AC current values output by the three power supply branches included in the first area are 5, 1, and 6, respectively, and the AC current values output by the three power supply branches included in the second area are 0, 4, respectively and 7.
  • the total current value of the first area is 12, the total current value of the second area is 11, the ratio of the current between the first area and the second area is 12:11, and the difference between the current in the first area and the second area is 12:11.
  • the values differ by 1.
  • the total current value of the first area is 8, and the total current value of the second area is 7, then the ratio of the current extreme value of the first area to the second area is 8:7, the value of the current between the first zone and the second zone differs by 1.
  • the current in the first region can reach the maximum and the current in the second region can reach the minimum.
  • the current in the first zone reaches the minimum and the current in the second zone reaches the maximum.
  • the current in the first zone reaches the maximum again, and the current in the second zone reaches the minimum again, and the cycle repeats itself.
  • the difference between the current extreme values of the first zone and its second zone is at most 1.
  • the maximum value is 9, the variation range of the extreme value is reduced, and the standard deviation of the discrete type is also reduced.
  • the sorting method of the multi-phase power supply branches is different, and the dynamic current between any two adjacent phases is also different in the whole cycle floating range.
  • the difference between the current extreme values in the first area and the second area is less than or equal to, as shown in the phase sequence configuration method of the six-phase power supply branch in the prior art as shown in FIG. 8 .
  • the maximum difference between the current extreme values in the A' area and the B' area is 9.
  • the standard deviation representing the discrete type may also be less than or equal to the discrete standard deviation of the current value in the prior art method for configuring the phase sequence of the six-phase power supply branch.
  • the stability of the AC current plane can be greatly optimized, further improving the dynamic response capability of the power supply load, reducing electromagnetic interference, and local
  • the output current of the power supply in the area is too small, the number of added capacitors can be reduced and the design cost can be reduced.
  • the non-transitory computer storage medium in this embodiment of the present invention is a non-transitory computer-readable storage medium in which the stored instructions are executed by the processor 101.
  • the system can execute a A method based on configuring a phase sequence of a plurality of interleaved power supplies, wherein, in the embodiment of the present invention, a main program is stored inside a non-transitory computer storage medium, and instructions executable by the processor 101 can be issued by running the program.
  • Information such as the IC device and the multiple interleaved power supplies that power the IC device is memorized, responds quickly, and can effectively shorten the response time.
  • any method for configuring the phase sequence of the multi-phase interleaved power supply is realized. Guarantee the intelligent sequencing of the multi-phase power supply branches in the multi-phase interleaved power supply.
  • FIG. 11 is a block diagram of an electronic device according to an embodiment of the present invention.
  • the electronic device 10 in the embodiment of the present invention may include at least a processor 101 and a memory 102, wherein at least one processor 101 may be connected to the memory 102 in communication, and the memory 102 may store a computer program, and the computer The program operation can be executed by transmitting a signal to the processor 101, and any method of configuring the phase sequence of the multi-phase interleaved power supply can be implemented.
  • the electronic device can be used in a computer, a large-scale server, or an application-specific integrated circuit, the computer program stored thereon runs, and an instruction that can be executed is sent to the processor 101, and the computer program is implemented when the processor 101 executes it.
  • FIG. 12 is a block diagram of an electronic device according to another embodiment of the present invention.
  • the electronic device 20 in the embodiment of the present invention may include at least a main board 400 , an IC device 100 , a multi-phase interleaved power supply 200 and a controller 300 , wherein the IC device 100 can be arranged on the main board 400 , and the multi-phase interleaved
  • the power supply 200 may power the IC device 100 .
  • the controller 300 can be used to configure the phase sequence of each phase power supply branch in the multi-phase staggered power supply by using the above method for configuring the sequence of the multi-phase staggered power supply.
  • the phase branch is in the inductive charging state, and the other branches are in the inductive discharging state.
  • the controller 300 can also control each phase branch to alternately complete the inductive charging state and the inductive discharging state.
  • the eight-phase power supply is used.
  • the controller 300 can configure the phase sequence of each phase power supply branch in the multi-phase staggered power supply according to the method for configuring the sequence of the multi-phase staggered power supply, and can control the first phase, the second phase, the third phase and the third phase.
  • the phase, the fourth phase, the fifth phase, the sixth phase, the seventh phase, and the eighth phase power supply branches complete the inductor charging state and the inductor discharging state in turn.
  • the multi-phase power supply branches in the multi-phase interleaved power supply are arranged according to the first phase, the second phase, the third phase, the fourth phase, the fifth phase, the sixth phase, the seventh phase, the During the process of AC power supply in the eighth phase, the maximum and minimum values of the instantaneous AC current values of these phases can coexist, which can greatly optimize the stability of the AC current plane, reduce electromagnetic interference, and further improve the dynamic response of the power supply load.
  • FIG. 13 is a schematic diagram of a multi-phase staggered power supply placed in a line on one side of an IC device
  • FIG. 14 is a schematic diagram of a ring-shaped placement of a multi-phase interleaved power supply centered on an IC device
  • the multi-phase interleaved power supply may include N-phase power supply branches, and the N-phase power supply branches may be arranged on one side of the IC device 100 and arranged in a line, for example, as shown in FIG. 13 .
  • the staggered power supply 200a or the staggered power supply 200b or the staggered power supply 200c or the staggered power supply 200d can be individually provided on one side of the IC device 100 .
  • the N-phase power supply branches may be arranged equally on both sides of the IC device 100, and may be arranged in a line on each side of the IC device 100.
  • FIG. 13 the staggered power supply branches may be arranged equally on both sides of the IC device 100, and may be arranged in a line on each side of the IC device 100.
  • the staggered power supply 200a and the staggered power supply 200c, or the staggered power supply 200b and the staggered power supply 200d can be respectively disposed on opposite sides of the IC device 100 to form a line-to-line layout.
  • the N-phase power supply branches can be arranged around the circumference of the IC device 100 .
  • the staggered power supply 200a, the staggered power supply 200c, the staggered power supply 200b, and the staggered power supply 200d can be respectively arranged around the IC device 100 to form a line-to-line layout.
  • the N-phase power supply branches can be arranged around the circumference of the IC device 100. For example, as shown in FIG. Circular arrangement.
  • the method for configuring the sequence of the multi-phase interleaved power supply in the embodiment of the present invention enables the multi-phase interleaved power supply in the electronic device to be arbitrarily arranged on one side of the IC device 100 in one word or one word on both sides of the IC device 100 in the actual layout situation.
  • Arranged or arranged around the circumference or circumference of the IC device 100 if the multi-phase interleaved power supply is arranged around the circumference of the IC device 100, the N-phase power supply branch can be rotated around the IC device 100 at any angle, which is convenient for PCB layout and wiring.
  • the already set annular phase sequence can be arranged from any two If the adjacent phases are disconnected, it can become a line-up layout.
  • the 6th phase if disconnected from the 7th phase and the 2nd phase, can get a 2nd phase, 5th phase, 8th phase, 3rd phase, 6th phase, 1st phase, 4th phase
  • the IC device 100 is lined up on one side of the layout.
  • the disconnection between the 7th phase and the 2nd phase and the disconnection between the 3rd phase and the 6th phase it can be obtained as the 2nd phase, the 5th phase, the 8th phase, the 3rd phase, the 3rd phase
  • a row of phases can be arranged on one side of the IC device 100
  • a row of the sixth phase, the first phase, the fourth phase, and the seventh phase can be arranged on the other side of the IC device 100 , that is, formed on the IC device 100
  • the layout is lined up on both sides.
  • the method for configuring the multi-phase staggered power supply sequence according to the embodiment of the present invention is simple and fast in design, and has strong space adaptability.
  • the method for configuring a multi-phase interleaved power supply sequence, the computer storage medium and the electronic device according to the embodiments of the present invention are simple and fast in design, and have strong space adaptability.
  • the unbalanced influence of the AC current plane output by the multi-phase interleaved power supply can be reduced, and the electromagnetic interference can be reduced, and the output current of the power supply in the unnecessary local area is too small Time to increase the number of capacitors and reduce costs.
  • first and second are used for descriptive purposes only and should not be construed to indicate or imply relative importance. Or implicitly indicate the number of technical features indicated. Thus, a feature delimited with “first”, “second” may expressly or implicitly include at least one of that feature. In the description of the present invention, “plurality” means at least two, such as two, three, etc., unless otherwise expressly and specifically defined.

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Abstract

一种配置多相交错电源（200）相序方法、计算机存储介质和电子设备（10，20）。包括根据多相交错电源（200）供电支路的相数确定相序间隔（S101）；配置多相交错电源（200）的任意一相供电支路为第一相序（S102）；从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源（200）的其它相供电支路的相序（S103）。所述配置多相交错电源（200）相序方法、计算机存储介质和电子设备（10，20），设计简单快捷，且空间适应能力强，可以根据相序间隔配置多相交错电源（200）的其它相供电支路的相序，降低多相交错电源（200）输出的AC电流平面的失衡影响，从而可以减轻电磁干扰。

Description

配置多相交错电源相序方法、计算机存储介质和电子设备
本申请要求于2020年9月11日提交中国专利局、申请号为202010954772.4、发明名称为“配置多相交错电源相序方法、计算机存储介质和电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及集成电路技术领域，尤其是涉及一种配置多相交错电源相序方法、计算机存储介质和电子设备。
背景技术
在计算机服务器等主板上给CPU/GPU/ASIC(central processing unit，中央处理器/Graphics Processing Unit，图形处理器/Application Specific IntegratedCircuit，专用集成电路)等高性能半导体IC(integrated circuit,集成电路)器件供电的POL(point of load,负载点电源)基本都是采用多相交错式降压电源电路，随着IC电流等级以及对多相电源的动态响应性能要求越来越高，电源相数越来越多，功率电感值越来越小。这导致了各相支路的功率电感流出的电流中的AC(Alternating Current，交流)部分占比也随之变大。尤其是在临界工作模式时，相支路输出的电流只有AC电流。
目前较为流行的多相交错式降压电源中，布局方案通常是在IC器件的单侧一字排开放置，且多相支路的相序按照顺序排列，但是，按照顺序排列的相序配置会导致整个电源平面上出现AC电流的严重失衡现象，尤其是AC电流大比例占据电源输出电流的情况、及连续模式的轻载情况、临界模式、断续模式等情况下，会导致电流平面的严重失衡，在局部区域的电源输出电流过小的时候，在此区域内的IC器件的电源管脚只能通过储能电容放电去弥补，从而增加了电容数量，设计成本增加。同时在高频开关多相电源中，电源输出的AC电流平面大幅度的失衡变动，也会使电磁干扰变得严重。
技术问题
本发明旨在至少解决现有技术中存在的技术问题之一。
技术解决方案
为此，本发明的一个目的在于提出一种配置多相交错电源相序的方法。
本发明第二个目的在于提出一种计算机存储介质。
本发明第三个目的在于提出一种电子设备。
本发明第四个目的在于提出一种电子设备。
为了达到上述目的，本发明第一方面实施例的配置多相交错电源相序的方法，根据多相交错电源供电支路的相数确定相序间隔；配置多相交错电源的任意一相供电支路为第一相序；从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序。
根据本发明实施例的配置多相交错电源相序的方法，通过根据多相交错电源供电支路的相数确定相序间隔，并且根据相序间隔配置多相交错电源的其它相供电支路的相序，相较于将多相交错电源供电支路的相序进行顺次设置，可以降低多相交错电源输出的AC电流平面的失衡影响，从而可以减轻电磁干扰，也可以不必要局部区域的电源输出电流过小的时候增加电容数量，降低成本。
在本发明的一些实施例中，所述多相交错电源包括N相供电支路，其中，N>3，根据多相交错电源供电支路的相数确定相序间隔，包括：小于(N-1)的质数数列中出现第一个不能被N整除的质数，将所述第一个不能被N整除的质数赋予m，并确定相序间隔为m-1。
在本发明的一些实施例中，所述多相交错电源包括N相供电支路，其中，N>3，根据多相交错电源供电支路的相数确定相序间隔，包括：小于(N-1)的质数数列中不存在不能被N整除的质数，则赋值m＝2，并确定相序间隔为m-1。
在本发明的一些实施例中，从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序，包括：从配置为所述第一相序的供电支路开始，按照顺时针方向依次配置顺序的相序，其中，每相隔m-1个供电支路配置为一个相序。
在本发明的一些实施例中，从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序，包括：从配置为所述第一相序的供电支路开始，按照逆时针方向依次配置顺序的相序，其中，每相隔m-1个供电支路配置为一个相序。
在本发明的一些实施例中，从配置为所述第一相序的供电支路开 始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序，还包括：所述多相交错电源的其它供电支路的相序未完成相序配置，当需要配置相序的供电支路已经配置过相序时，则沿逆时针方向顺延一个供电支路；以沿逆时针顺延一个供电支路后所在位置的供电支路为新起始点，继续配置剩余未配置相序的供电支路的相序，其中，每相隔m-1个供电支路配置为一个相序；直至所述多相交错电源的其它供电支路的相序全部配置完。
在本发明的一些实施例中，从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序，还包括：所述多相交错电源的其它供电支路的相序未完成相序配置，当需要配置相序的供电支路已经配置过相序时，则沿顺时针方向顺延一个供电支路；以沿顺时针顺延一个供电支路后所在位置的供电支路为新起始点，继续配置剩余未配置相序的供电支路的相序，其中，每相隔m-1个供电支路配置为一个相序；直至所述多相交错电源的所有供电支路的相序全部配置完。
在本发明的一些实施例中，所述N＝8，或者，所述N＝6。
为了达到上述目的，本发明第二方面实施例的计算机存储介质，其上存储有计算机程序，其特征在于，所述计算机程序被处理器执行时实现任一项所述的配置多相交错电源相序的方法。
根据本发明实施例的计算机存储介质，其上存储的计算机程序运行，发送可被运行的指令给处理器101，计算机程序被处理器101执行时实现配置多相交错电源相序的方法，从而优化AC电流平面的稳定性，进一步提升电源负载动态响应的能力。
为了达到上述目的，本发明第三方面实施例的电子设备，包括：至少一个处理器与至少一个处理器通信连接的存储器；其中，所述存储器中存储有可被至少一个处理器执行的计算机程序，至少一个处理器执行所述计算机程序时实现任一项所述的配置多相交错电源相序的方法。
根据本发明实施例的电子设备，其上存储的计算机程序运行，发送可被运行的指令给处理器，计算机程序被处理器执行时实现配置多相交错电源相序的方法，从而优化AC电流平面的稳定性。
为了达到上述目的，本发明第四方面实施例的电子设备，包括：主板和设置在所述主板上的IC器件；多相交错电源，所述多相交错电源用于为所述IC器件供电；控制器，所述控制器用于根据任一项 所述的配置多相交错电源时序的方法配置所述多相交错电源中每相供电支路的相序。
根据本发明实施例的电子设备，在多相交错电源中的多相供电支路按照第1相、第2相、第3相、第4相、第5相、第6相、第7相、第8相等顺次进行交流供电的过程中，可以使这些相位的AC电流瞬时值的最大值和最小值并存，可大幅优化AC电流平面的稳定性，能够降低电磁干扰，进一步提升电源负载动态响应的能力。
在本发明的一些实施例中，所述多相交错电源包括N相供电支路；N相供电支路设置在所述IC器件的一侧且一字排开设置；或者，所述N相供电支路平均设置在所述IC器件的两侧，且在所述IC器件每侧的供电支路一字排开设置；或者，所述N相供电支路围绕所述IC器件的四周或圆周设置。
有益效果
本发明提出的配置多相交错电源相序的方法，可以降低多相交错电源输出的AC电流平面的失衡影响，减轻电磁干扰，从而减少电容数量，降低成本。
附图说明
本发明的上述和/或附加的方面和优点从结合下面附图对实施例的描述中将变得明显和容易理解，其中：
图1是现有技术中配置多相交错电源相序的方法的示意图；
图2是本发明一个实施例的配置多相交错电源相序的方法的流程图；
图3是一种顺时针配置多相交错电源相序中八相供电支路的方法的示意图；
图4是一种逆时针配置多相交错电源相序中六相供电支路的方法的示意图；
图5是现有技术中常见的多相交错式降压电源中八相供电支路的相序配置方法的示意图；
图6是一种八相供电支路中的各相供电支路的输出的交流电流随时间变化的波形图；
图7是本发明的一个实施例的多相交错电源中八相供电支路的布局的示意图；
图8是现有技术中六相供电支路的相序配置方法的示意图；
图9是一种六相供电支路中的各相供电支路的输出的交流电流随时间变化的波形图；
图10是本发明的一个实施例的多相交错电源中六相供电支路的布局的示意图；
图11是本发明一个实施例的电子设备的框图；
图12是本发明另一个实施例的电子设备的框图；
图13是一种多相交错电源在IC器件的单侧一字排开放置的示意图；
图14是一种多相交错电源在以IC器件为中心的环形放置的示意图。
附图标记：
电子设备10、电子设备20、IC器件100、多相交错电源200、控制器300、主板400、交错电源200a、交错电源200b、交错电源200c、交错电源200d、处理器101、存储器102、八相供电之路(供电支路301、供电支路302、供电支路303、供电支路304、供电支路305、供电支路306、供电支路307、供电支路308)。
本发明的最佳实施方式
下面详细描述本发明的实施例，实施例的示例在附图中示处，其中自始至终相同或类似的元件标号表示相同或类似的元件具有相同或类似的功能的元件，参考附图描述的实施例是示例性的，旨在用于解释本发明，而不能理解为对本发明的限制，下面详细描述本发明的实施例。
下面结合附图描述本发明实施例的配置多相交错电源相序的方法、计算机存储介质和电子设备。
图1是现有技术中配置多相交错电源相序的方法的示意图。
多相交错电源可以包括N相供电支路，其中，可以设置N>3，例如，N的值可以为6或8或12等。如图2所示，在配置多相交错电源相序的过程，可以将多相交错电源等效为在IC器件周围存在有围成一周的环形，可以将环形对应N相供电支路的相数分成N个空位。在现有技术中，可以将供电支路的第1相、第2相、第3相、第N-2相、第N-1相、第N相等，然后按照顺时针或逆时针的次序依次对应放置在N个空位中。直接将N相供电支路按照顺时针或逆时针 的次序依次设置在IC器件周围环形的N个空位中，在给IC器件供电的过程中，这种设置方法容易导致整个电源平面上出现AC电流的严重失衡现象，且电磁干扰比较严重。
图2是本发明一个实施例的配置多相交错电源相序的方法的流程图。
本发明实施例的配置多相交错电源相序的方法，如图1所示，可以至少包括步骤S101-S103。
S101，根据多相交错电源供电支路的相数确定相序间隔。例如，在实施例中，可以对应N相供电支路的相数确定对应的相序间隔，例如，可以将八相供电支路的相序间隔设置为2，或者可以将六相供电支路的相序间隔设置为1。
S102，配置多相交错电源的任意一相供电支路为第一相序。
在本发明的实施例中，在配置多相交错电源相序的过程，也可以将多相交错电源等效为在IC器件周围存在有围成一周的环形，可以将环形对应N相供电支路的相数分成N个空位。例如以八相供电支路为例，可以将IC器件周围围成一周的环形分成8个空位。
在配置多相交错电源的过程中，可以选取N相供电支路中的任意一相供电支路，并可以将选取的一相供电支路定义为第一相序。以八相供电支路的相序间隔设置为2为例，可以任意选择八相供电支路中的任意一相作为第一相，可以将第一相配置到IC器件周围围成一周的8个空位中的任意一个空位中。
S103，从配置为第一相序的供电支路开始，根据相序间隔配置多相交错电源的其它相供电支路的相序。以八相供电支路的相序间隔设置为2为例，将第一相配置到IC器件周围围成一周的8个空位中的任意一个空位中后，可以再将八相供电支路中的其他相按照顺时针或者逆时针的顺序，相隔对应的间隔设置到其他空位中，例如，相序间隔设置为2时，可以将第二相与第一相相隔两个空位设置，第三相与第二相相隔两个空位设置，第三相与第四相相隔两个空位设置，第四相与第五相相隔两个空位设置，第五相与第六相相隔两个空位设置，第六相与第七相相隔两个空位设置，第七相与第八相相隔两个空位设置，直至多相交错电源的所有供电支路的相序全部配置完。
根据本发明实施例的配置多相交错电源相序的方法，对比现有技术中将各相供电支路相序顺次设置，将多相交错电源的相序进行交叉设置，可以使这些相位的AC电流瞬时值的最大值和最小值并存，可 大幅优化AC电流平面的稳定性，能够降低电磁干扰，进一步提升电源负载动态响应的能力。
在本发明的实施例中，多相交错电源可以包括N相供电支路，其中，可以设置N>3，例如，N的值可以为6或8或12等，并且可以根据多相交错电源供电支路的相数确定相序间隔，如果小于(N-1)的质数数列中出现第一个不能被N整除的质数，则可以将第一个不能被N整除的质数赋予m，并确定相序间隔为m-1，其中，质数数列为公认的数组，例如质数数列可以为2、3、5、7、11、13、17、19等，质数的个数可以有无限多个。例如，在N相供电支路中，N的值为8则可以计算出(N-1)的值为7，则小于7的质数数列可以为2、3、5。选择数列2、3、5中出现第一个不能被8整除的质数，可以从数列最小的质数来进行由小到大依次判断该质数是否可以被8整除，如果能被8整除，则进行下一个质数能否被8整除的判断，直至出现第一个不能被8整除的质数，则该质数赋予m，例如质数2可以被8整除，质数3不能被8整除，并且确定质数3为质数数列中出现的第一个不能被8整除的质数，则确定m＝3，由此可以计算出m-1＝2，可以最终确定相序间隔为2。
再例如，在N相供电支路中，N的值为12，则可以计算出(N-1)的值为11，则小于11的质数数列可以为2、3、5、7。选择数列2、3、5、7中出现第一个不能被12整除的质数，可以从数列最小的质数来进行由小到大依次判断该质数是否可以被8整除，如果能被12整除，则进行下一个质数能否被12整除的判断，直至出现第一个不能被12整除的质数，则该质数赋予m，例如质数2可以被12整除，质数3可以被12整除，质数5不可以被12整除，并且质数5为质数数列中出现的第一个不能被12整除的质数，则确定m＝5，由此可以计算出m-1＝4，可以最终确定相序间隔为4。
在本发明的实施例中，再确定相序间隔的过程中，从(N-1)的质数数列最小的质数来进行由小到大依次判断该质数是否可以被N整除，如果小于(N-1)的质数数列中不存在不能被N整除的质数，则赋值m＝2，并确定相序间隔为m-1。例如，在N相供电支路中，N的值为6，则可以计算出(N-1)的值5，则小于5的质数数列可以为2、3。需要选择数列2、3中出现第一个不能被6整除的质数，从数列最小的质数来进行由小到大依次判断该质数是否可以被6整除，例如质数2可以被6整除，质数3也能被6整除，则不存在小于6且能被6整 除的质数，在这种情况下，可以将m赋值为2，由此可以计算出m-1＝1，也可以最终确定相序间隔为1。
本发明实施例的配置多相交错电源相序的方法，通过选取质数数列，并且判断是否存在第一个不能被多相供电支路中的相数数值整除的质数，如果存在，则可以通过以上的方法选确定相序间隔，如果不存在，则可以确定相序间隔为1。通过确定相序间隔可以使排序过程中隔开现有技术中原相邻设置的各个相，且至少可以相隔一个间隔，不会存在相邻的现象，可以适应多相交错电源相序布局需求。
在本发明的实施例中，可以先配置第一相序的供电支路，再根据已经确定好的相序间隔配置多相交错电源的其它相供电支路的相序，在配置其它相供电支路的相序的过程中，可以采用顺时针方向依次配置顺序的相序，并且可以每相隔m-1个供电支路配置为一个相序。
在本发明的实施例中，如果采用顺时针方向依次配置顺序的相序，并且可以每相隔m-1个供电支路配置为一个相序，在多相交错电源还存在其它供电支路的相序未完成相序配置时，并且存在需要配置相序的供电支路已经配置过相序时，则可以沿顺时针方向顺延一个供电支路，可以以沿顺时针顺延一个供电支路后所在位置的供电支路为新起始点，继续配置剩余未配置相序的供电支路的相序，其中，每相隔m-1个供电支路配置为一个相序，直至多相交错电源的所有供电支路的相序全部配置完。
在本发明的实施例中，可以先配置第一相序的供电支路，再根据已经确定好的相序间隔配置多相交错电源的其它相供电支路的相序，在配置其它相供电支路的相序的过程中，可以采用逆时针方向依次配置顺序的相序，并且可以每相隔m-1个供电支路配置为一个相序。
在本发明的实施例中，如果采用逆时针方向依次配置顺序的相序，并且可以每相隔m-1个供电支路配置为一个相序，在多相交错电源还存在其它供电支路的相序未完成相序配置时，并且存在需要配置相序的供电支路已经配置过相序时，则可以沿逆时针方向顺延一个供电支路，可以以沿逆时针顺延一个供电支路后所在位置的供电支路为新起始点，继续配置剩余未配置相序的供电支路的相序，其中，每相隔m-1个供电支路配置为一个相序，直至多相交错电源的所有供电支路的相序全部配置完。
图3是一种顺时针配置多相交错电源相序中八相供电支路的方法的示意图。例如，如图3所示，以顺时针配置多相交错电源相序中 八相供电支路为例，在设置相序的过程，多相交错电源200可以等效成IC器件100周围存在的有围成一周的环形结构，并且可以在多相交错电源200设置有对应八相供电支路的相数的8个空位，从上述一个实施例中根据多相交错电源供电支路的相数确定相序间隔，可以得到当供电支路为八相供电支路时，相序间隔为2。可以在8个空位中任意选一个空位，并且可以设位号为1，同时设置为第一相，然后可以沿顺时针方向，间隔2个位号后，第2相，再继续间隔2个空号后，放置第3相，再继续间隔2个空号后，放置第4相，再继续间隔2个空号后，放置第5相，再继续间隔2个空号后，放置第6相，再继续间隔2个空号后，放置第7相，再继续间隔2个空号后，放置第8相，直至8个空位填满为止。
图4是一种顺时针配置多相交错电源相序中六相供电支路的方法的示意图。例如，如图4所示，以顺时针配置多相交错电源相序中六相供电支路为例，在设置相序的过程，多相交错电源200可以等效成IC器件100周围存在的有围成一周的环形结构，并且可以在多相交错电源200设置有对应六相供电支路的相数的6个空位，从上述一个实施例中根据多相交错电源供电支路的相数确定相序间隔，可以得到当供电支路为六相供电支路时，相序间隔为1。可以6个空位中任意选一个空位，并且可以设位号为1，同时设置为第一相，然后可以沿顺时针方向，间隔1个位号后，第2相，再继续间隔1个空号后，放置第3相，再继续间隔1个空号后，放置第4相，此时当需要放置相序值的空位上已经放置过相序值时，例如，在即将放置第4相的空位上已经放置第1相。则可以沿顺时针方向顺延1位放置，可以将第4相按照顺时针方向放置到第1相的下一个空位中，与第3相间隔两个空位，再放置第5相的过程中，可以以第4相为开始相，再继续间隔1个空号后，放置第5相，再继续间隔1个空号后，放置第6相，直至6个空位填满为止。
本发明实施例的配置多相交错电源相序的方法，可以按照多相交错电源相序中N相供电支路的相数确定相序间隔，并且按照相序间隔确定对应的空位，将原来相邻的相序间隔确定的空位进行排列，可以将原来相邻的两个相序分隔开，排序方法可以按照顺时针排列，也可以按照逆时针排列，排序方法简单快捷且具有灵活性，在采用多相交错电源方案时，能快速进行相序配置，可以有效的将现有技术中相邻的相序间隔排列。
图5是现有技术中常见的多相交错电源中八相供电支路的相序配置方法的示意图。
在现有技术中，如图5所示，以八相供电支路为例，多相交错电源200可以等效成IC器件100周围存在的有围成一周的环形，并且可以在多相交错电源200设置有对应八相供电支路的相数的8个空位，例如八个空位可以靠环形左侧相邻设置，并将八相供电支路分别定义为供电支路301、供电支路302、供电支路303、供电支路304、供电支路305、供电支路306、供电支路307和供电支路308，还可以将供电支路301定义为第1相，供电支路302定义为第2相，供电支路303定义为第3相，供电支路304定义为第4相，供电支路305定义为第5相，供电支路306定义为第6相，供电支路307定义为第7相，供电支路308定义为第8相，将八相供电支路按照第1相、第2相、第3相、第4相、第5相、第6相、第7相、第8相的顺序排列，并且依次顺时针设置到八个空位中。还可以定义供电支路301、供电支路302、供电支路303、供电支路304组合成A区，定义供电支路305、供电支路306、供电支路307、供电支路308组合成B区。
图6是一种八相供电支路中的各相供电支路的输出的交流电流随时间变化的波形图。
在多相交错电源给IC器件供电的过程中，多相交错电源中的多相供电支路在一个工作周期内，只有一个相供电支路处于电感充电状态，其他相供电支路都处于电感放电状态，并且可以控制各相供电支路依次交替完成电感充电状态和电感放电状态。如图6所示，以八相交错电源为例，在一个工作周期内第1相至第8相的供电支路的AC电流波形会呈交错状态。
对于图5所示的八相供电支路的配置方式，其中，可以将八相供电支路也分为两个区，分别为A区与B区。参照图6所示，在周期开始时，即t0时刻，第1相供电支路所输出的AC电流值为0、第2相供电支路所输出的AC电流值为1、第3相供电支路所输出的AC电流值为2、第4相供电支路所输出的AC电流值为3。第5相供电支路所输出的AC电流值为4、第6相供电支路所输出的AC电流值为5、第7相供电支路所输出的AC电流值为6、第8相供电支路所输出的AC电流值为7。A区的总的电流值为第1相至第4相供电支路所输出的AC电流值总和，B区的总的电流值为第5相至第8相供电支路所输出的AC电流值总和，则在t0时刻，A区的总的电流值为 6，B区的总的电流值为22，A区与B区电流的相差12。可以得到在周期开始时，A区与B区电流之比为6:22。在周期开始后的中间时刻，即t4时刻，第1相供电支路所输出的AC电流值为7、第2相供电支路所输出的AC电流值为6、第3相供电支路所输出的AC电流值为5、第4相供电支路所输出的AC电流值为4。第5相供电支路所输出的AC电流值为3、第6相供电支路所输出的AC电流值为2、第7相供电支路所输出的AC电流值为1、第8相供电支路所输出的AC电流值为0。则在t4时刻，A区的总的电流值为22，B区的总的电流值为6，A区与B区电流的相差12。可以得到在周期开始后的中间时刻时，A区与B区电流之比为22：6。在一个周期结束时刻即下一个周期的开始时刻，即下一个t0时刻，A区的总的电流值为6，B区的总的电流值为22，A区与B区电流之比为6:22，A区与B区电流的相差12。
由图6可知，在周期开始时，A区的电流可以达到最小而B区的电流达到了最大。而在周期开始后的中间时刻，A区的电流达到了最大，B区的电流达到了最小。而在周期结束时，A区的电流再次达到了最小，B区的电流再次达到了最大，周而复始。在每一个工作周期，A区与B区电流极值的差值最大为12，且A区与B区电流极值之比，都出现一次由6:22变成了22:6再变成了6:22的变化。在现有技术中，如图5所示，按照顺序排列的相序配置会导致整个电源平面上可能会出现A区与B区等的局部区域的AC电流的严重失衡现象，在AC电流大比例占据电源输出电流的情况下及连续模式的轻载情况、临界模式、断续模式下，会导致电流平面的严重失衡。在局部区域的电源输出电流过小的情况下，在此区域内的IC器件的电源管脚只能通过储能电容放电去补充电流，但是会增加电容数量，同时设计成本增加。在高频开关多相交错电源中，电源输出的AC电流平面大幅度的失衡变动，也会使电磁干扰变得严重。
图7是本发明的一个实施例的多相交错电源中八相充电支路的布局的示意图。
在本发明的实施例中，多相交错电源可以包括N相充电支路，其中N可以为8，以八相充电支路为例，如图7所示，可以将多相交错电源围绕IC器件100圆周设置，将八相充电支路按照本发明实施例的配置多相交错电源相序的方法设置相序后可以得到由第1相作为开端，顺时针排序结果为第1相、第4相、第7相、第2相、第5 相、第8相、第3相、第6相。
对于本发明实施例的六相供电支路的相序配置如图7所示，也可以对本发明实施例的八相充电支路的排序结果划分为两个区，第一区可以包括任意相邻的四相充电支路，第二区可以包括除第一区中的四相充电支路外的其余四相充电支路，例如，第一区包括的相邻的四相充电支路可以包括第1相、第4相、第7相和第2相，或者可以包括第4相、第7相、第2相和第5相，或者可以包括第7相、第2相、第5相和第8相，或者可以包括第2相、第5相、第8相和第3相。则第二区包括的相邻的四相充电支路可以对应第一区包括第5相、第8相、第3相和第6相，或者可以包括第8相、第3相、第6相和第1相，或者可以包括第3相、第6相、第1相和第4相，或者可以包括第6相、第1相、第4相和第7相。
在一个实施例中，例如第一区包括的相邻的四相充电支路可以为第1相、第4相、第7相、第2相，则第二区包括的相邻的四相充电支路可以为第5相、第8相、第3相、第6相。如图6所示，在周期开始时，即t0时刻，第一区所包括的第1相、第4相、第7相和第2相的四个供电支路所输出的AC电流值分别为0、3、6和1，第二区包括的第5相、第8相、第3相和第6相的四个供电支路所输出的AC电流值分别为4、7、2和5。第一区的总的电流值为第一区所包括的第1相、第4相、第7相和第2相四个供电支路所输出的AC电流值的总和，第二区的总的电流值为第二区所包括的第5相、第8相、第3相和第6相四个供电支路所输出的AC电流值的总和，则在t0时刻，第一区的总的电流值为10，第二区的总的电流值为18，第一区与第二区电流的值相差8。可以得到在周期开始时，第一区与其二区电流之比为10：18。在周期开始后的中间时刻，即t4时刻，第一区所包括的第1相、第4相、第7相和第2相的四个供电支路所输出的AC电流值分别为4、7、2和5，第二区包括的第5相、第8相、第3相和第6相的四个供电支路所输出的AC电流值分别为0、3、6和1。则在t4时刻，第一区的总的电流值为18，第二区的总的电流值为10，第一区与第二区电流的值相差8。可以得到在t4时刻，第一区与其二区电流之比为18：10。在一个周期结束时刻，即下一个周期的t0时刻，第一区的总的电流值为10，第二区的总的电流值为18，则第一区与其二区电流的极值之比为10：18，第一区与第二区电流的值相差8。
在本发明的实施例中，由图6可知，在周期开始时，第一区的电流可以达到最小而第二区的电流达到了最大。而在周期开始后的中间时刻，第一区的电流达到了最大，第二区的电流达到了最小。而在周期结束时，第一区的电流再次达到了最小，第二区的电流再次达到了最大，周而复始。在每一个工作周期，第一区与其二区电流极值的差值最大为8，较于如图5所示的现有技术中的八相供电支路的相序配置方法中A区与B区电流极值差值最大12来说，极值的的变化幅度均减小三分之一，象征离散型的标准偏差也减少了三分之一。
在一个实施例中，例如第一区包括的相邻的四相充电支路可以为第4相、第7相、第2相和第5相，则第二区包括的相邻的四相充电支路可以为第8相、第3相、第6相和第1相。由图6可知，在周期开始时，即t0时刻，第一区所包括的四个供电支路所输出的AC电流值分别为3、6、1和4，第二区包括的四个供电支路所输出的AC电流值分别为7、2、5和0。则在t0时刻，第一区的总的电流值为14，第二区的总的电流值为14。在t4时刻，第一区所包括的四个供电支路所输出的AC电流值分别为7、2、5和0，第二区包括的四个供电支路所输出的AC电流值分别为3、6、1和4。则在t4时刻，第一区的总的电流值为14，第二区的总的电流值为14，在一个周期结束时刻，即下一个周期的t0时刻，第一区的总的电流值为14，第二区的总的电流值为14，可以得到在整个电流周期中，第一区与第二区的电流的值始终相等并可以保持不变，均为14，第一区与其二区电流之比始终为14：14。
在一个实施例中，例如第一区包括的相邻的四相充电支路可以为第7相、第2相、第5相和第8相，则第二区包括的相邻的四相充电支路可以为第3相、第6相、第1相和第4相。由图6可知，在周期开始时，即t0时刻，第一区所包括的四个供电支路所输出的AC电流值分别为6、1、4和7，第二区包括的四个供电支路所输出的AC电流值分别为2、5、0和3。则在t0时刻，第一区的总的电流值为18，第二区的总的电流值为10，第一区与第二区电流的值相差8。可以得到在周期开始时，第一区与其二区电流之比为18：10。在周期开始后的中间时刻，即t4时刻，第一区所包括的四个供电支路所输出的AC电流值分别为2、5、0和3，第二区包括的四个供电支路所输出的AC电流值分别为6、1、4和7。则在t4时刻，第一区的总的电流值为10，第二区的总的电流值为18，第一区与第二区电流的值 相差8。可以得到在t4时刻，第一区与其二区电流之比为10：18。在一个周期结束时刻，即下一个周期的t0时刻，第一区的总的电流值为18，第二区的总的电流值为10，则第一区与其二区电流的极值之比为18：10，第一区与第二区电流的值相差8。
在本发明的实施例中，由图6可知，在周期开始时，第一区的电流可以达到最大而第二区的电流达到了最小。而在周期开始后的中间时刻，第一区的电流达到了最小，第二区的电流达到了最大。而在周期结束时，第一区的电流再次达到了最大，第二区的电流再次达到了最小，周而复始。在每一个工作周期，第一区与其二区电流极值的差值最大为8，较于如图5所示的现有技术中的八相供电支路的相序配置方法中A区与B区电流极值差值最大12来说，极值的的变化幅度均减小三分之一，象征离散型的标准偏差也减少了三分之一。
在一个实施例中，例如第一区包括的相邻的四相充电支路可以为第2相、第5相、第8相和第3相，则第二区包括的相邻的四相充电支路可以为第6相、第1相、第4相和第7相。由图6可知，在周期开始时，即t0时刻，第一区所包括的四个供电支路所输出的AC电流值分别为5、0、3和6，第二区包括的四个供电支路所输出的AC电流值分别为1、4、7和2。则在t0时刻，第一区的总的电流值为14，第二区的总的电流值为14。在周期开始后的中间时刻，即t4时刻，第一区所包括的四个供电支路所输出的AC电流值分别为4、7、2和5，第二区包括的四个供电支路所输出的AC电流值分别为0、3、6和1。则在t4时刻，第一区的总的电流值为14，第二区的总的电流值为14，在一个周期结束时刻，即下一个周期的t0时刻，第一区的总的电流值为14，第二区的总的电流值为14，可以得到在整个电流周期中，第一区与第二区的电流的值始终相等并可以保持不变，均为14，第一区与其二区电流之比始终为14：14。
在本发明的实施例中，多相供电支路的排序方法的不同，任意相邻两相之间的动态电流在整个周期浮动范围也不尽相同，如图7所示，本发明实施例配置多相交错电源相序的方法较于如图5所示的现有技术中的八相供电支路的相序配置方法中A区与B区电流极值差值最大12来说，极值的的变化幅度最少可以减小三分之一，则象征离散型的标准偏差也可以最少减少三分之一。在AC电流大比例占据电源输出电流的情况下及在对电源负载动态响应要求高的场景下，可大幅优化AC电流平面的稳定性，进一步提升电源负载动态响应的能力， 降低电磁干扰，在局部区域的电源输出电流过小的情况下，可以减少增加电容数量，降低设计成本。
图8是现有技术中常见的多相交错式降压电源中六相供电支路的相序配置的示意图；
如图8所示，多相交错电源200可以等效成IC器件100周围存在的有围成一周的环形，并且可以在多相交错电源200设置有对应六相供电支路的相数的六个空位，例如六个空位可以靠环形左侧相邻设置，并将六相供电支路分别定义为供电支路301、供电支路302、供电支路303、供电支路304、供电支路305、和供电支路306，还可以将供电支路301定义为第1相，供电支路302定义为第2相，供电支路303定义为第3相，供电支路304定义为第4相，供电支路305定义为第5相，供电支路306定义为第6相，将六相供电支路按照第1相、第2相、第3相、第4相、第5相、第6相的顺序排列，并且依次顺时针设置到六个空位中。还可以定义供电支路301、供电支路302、供电支路303组合成A’区，定义供电支路304、供电支路305、供电支路306组合成B’区。
图9是一种六相供电支路中的各相供电支路的输出的交流电流随时间变化的波形图。
在多相交错电源给IC器件供电的过程中，多相交错电源中的多相供电支路在一个工作周期内，只有一个相供电支路处于电感充电状态，其他相供电支路都处于电感放电状态，并且可以控制各相供电支路依次交替完成电感充电状态和电感放电状态。如图9所示，以六相交错电源为例，在一个工作周期内第1相至第6相的供电支路的AC电流波形会呈交错状态。
对于图8所示的六相支路的配置方式，其中，可以将六相供电支路也分为两个区，分别为A’区与B’区。参照图9所示，在周期开始时，即t0时刻，第1相供电支路所输出的AC电流值为0、第2相供电支路所输出的AC电流值为1、第3相供电支路所输出的AC电流值为2、第4相供电支路所输出的AC电流值为3。第5相供电支路所输出的AC电流值为4、第6相供电支路所输出的AC电流值为5。例如，A’的总的电流值为第1相至第3相供电支路所输出的AC电流值总和，B’的总的电流值为第4相至第6相供电支路所输出的AC电流值总和，则在t0时刻，A’区的总的电流值为3，B’区的总的电流值为12，A’区与B’区电流的相差9。可以得到在周期开始 时，A’区与B’区电流之比为3:12。在周期开始后的中间时刻，即t4时刻，第1相供电支路所输出的AC电流值为4、第2相供电支路所输出的AC电流值为5、第3相供电支路所输出的AC电流值为6、第4相供电支路所输出的AC电流值为7。第5相供电支路所输出的AC电流值为0、第6相供电支路所输出的AC电流值为1。则在t4时刻，A’区的总的电流值为15，B’区的总的电流值为8，A’区与B’区电流的相差7。可以得到在周期开始后的中间时刻时，A’区与B’区电流之比为15：8。在一个周期结束时刻即下一个周期的开始时刻，即下一个t0时刻，A’区的总的电流值为3，B’区的总的电流值为12，A’区与B’区电流之比为3:12，A’区与B’区电流的相差9。
由图9可知，在周期开始时，A’区的电流可以达到最小而B’区的电流达到了最大。而在周期开始后的中间时刻，A’区的电流达到了最大，B’区的电流达到了最小。而在周期结束时，A’区的电流再次达到了最小，B’区的电流再次达到了最大，周而复始。在每一个工作周期，A’区与B’区电流极值的差值最大为9，且A’区与B’区电流极值之比，都出现一次由3:12变成了15:8再变成了3:12的变化。在现有技术中，如图8所示，按照顺序排列的相序配置会导致整个电源平面上可能会出现A’区与B’区等的局部区域的AC电流的严重失衡现象，在AC电流大比例占据电源输出电流的情况下及连续模式的轻载情况、临界模式、断续模式下，会导致电流平面的严重失衡。在局部区域的电源输出电流过小的情况下，在此区域内的IC器件的电源管脚只能通过储能电容放电去补充电流，但是会增加电容数量，同时设计成本增加。在高频开关多相交错电源中，电源输出的AC电流平面大幅度的失衡变动，也会使电磁干扰变得严重。
图10是本发明的一个实施例的多相交错电源中六相供电支路的布局的示意图；
在本发明的实施例中，多相交错电源可以包括N相充电支路，其中N可以为6，以六相充电支路为例，可以将多相交错电源围绕IC器件100圆周设置，将六相充电支路按照本发明实施例的配置多相交错电源相序的方法设置相序后可以得到由第1相作为开端，顺时针排序结果为第1相、第4相、第2相、第6相、第3相和第5相。
对于本发明实施例的六相供电支路的相序配置如图10所示，也可以对本发明实施例的六相充电支路的排序结果划分为两个区，第一 区可以包括任意相邻的三相充电支路，第二区可以包括除第一区中的三相充电支路外的其余三相充电支路，例如，第一区包括的相邻的三相充电支路可以包括第1相、第4相和第2相，或者可以包括第4相第2相和第6相，或者可以包括第2相、第6相和第3相。则第二区包括的相邻的三相充电支路可以对应第一区包括第5相、第3相和第6相，或者可以包括第1相、第5相和第3相，或者可以包括第5相、第1相和第4相。
在一个实施例中，例如第一区包括的相邻的三相充电支路可以为第1相、第4相和第2相，则第二区包括的相邻的三相充电支路可以为第5相、第3相和第6相。如图9所示，在周期开始时，即t0时刻，第一区所包括的第1相、第4相和第2相的四个供电支路所输出的AC电流值分别为0、3和1，第二区包括的第5相、第3相和第6相的三个供电支路所输出的AC电流值分别为4、2和5。第一区的总的电流值为第一区所包括的第1相、第4相和第2相三个供电支路所输出的AC电流值的总和，第二区的总的电流值为第二区所包括的第5相、第3相和第6相三个供电支路所输出的AC电流值的总和，则在t0时刻，第一区的总的电流值为4，第二区的总的电流值为11，第一区与第二区电流的值相差7。可以得到在周期开始时，第一区与其二区电流之比为4：11。在周期开始后的中间时刻，即t4时刻，第一区所包括的第1相、第4相和第2相的四个供电支路所输出的AC电流值分别为4、7和5，第二区包括的第5相、第3相和第6相的三个供电支路所输出的AC电流值分别为0、6和1。则在t4时刻，第一区的总的电流值为16，第二区的总的电流值为7，第一区与第二区电流的值相差9。可以得到在t4时刻，第一区与其二区电流之比为16：7。在一个周期结束时刻，即下一个周期的t0时刻，第一区的总的电流值为4，第二区的总的电流值为11，则第一区与其二区电流的极值之比为4：11，第一区与第二区电流的值相差7。
在本发明的实施例中，由图9可知，在周期开始时，第一区的电流可以达到最小而第二区的电流达到了最大。而在周期开始后的中间时刻，第一区的电流达到了最大，第二区的电流达到了最小。而在周期结束时，第一区的电流再次达到了最小，第二区的电流再次达到了最大，周而复始。在每一个工作周期，第一区与其二区电流极值的差值最大为9。较于如图8所示的现有技术中的六相供电支路的相序配置方法中A’区与B’区电流极值差值最大9来说，极值的的变化幅 度相同。
在一个实施例中，例如第一区包括的相邻的三相充电支路可以为第4相、第2相和第6相，则第二区包括的相邻的三相充电支路可以为第1相、第5相和第3相。由图9可知，在周期开始时，即t0时刻，第一区所包括的三个供电支路所输出的AC电流值分别为3、1和5，第二区包括的三个供电支路所输出的AC电流值分别为0、4和2。则在t0时刻，第一区的总的电流值为9，第二区的总的电流值为6，第一区与其二区电流之比为9：6，第一区与第二区电流的值相差3。在t4时刻，第一区所包括的三个供电支路所输出的AC电流值分别为7、5和1，第二区包括的三个供电支路所输出的AC电流值分别为4、0和6。则在t4时刻，第一区的总的电流值为13，第二区的总的电流值为10，第一区与其二区电流之比为13：10，第一区与第二区电流的值相差3。在一个周期结束时刻，即下一个周期的t0时刻，第一区的总的电流值为9，第二区的总的电流值为6，则第一区与其二区电流的极值之比为9：6，第一区与第二区电流的值相差3。
在本发明的实施例中，由图9可知，在周期开始时，第一区的电流可以达到最大而第二区的电流达到了最小。而在周期开始后的中间时刻，第一区的电流达到了最小，第二区的电流达到了最大。而在周期结束时，第一区的电流再次达到了最大，第二区的电流再次达到了最小，周而复始。在每一个工作周期，第一区与其二区电流极值的差值最大为3，较于如图8所示的现有技术中的六相供电支路的相序配置方法中A’区与B’区电流极值差值最大9来说，极值的的变化幅度均减小，象征离散型的标准偏差也减少。
在一个实施例中，例如第一区包括的相邻的三相充电支路可以为第2相、第6相和第3相，则第二区包括的相邻的三相充电支路可以为第5相、第1相和第4相。由图9可知，在周期开始时，即t0时刻，第一区所包括的三个供电支路所输出的AC电流值分别为1、5和2，第二区包括的三个供电支路所输出的AC电流值分别为4、0和3。则在t0时刻，第一区的总的电流值为8，第二区的总的电流值为7，第一区与其二区电流之比为8：7，第一区与第二区电流的值相差1。在t4时刻，第一区所包括的三个供电支路所输出的AC电流值分别为5、1和6，第二区包括的三个供电支路所输出的AC电流值分别为0、4和7。则在t4时刻，第一区的总的电流值为12，第二区的总的电流值为11，第一区与其二区电流之比为12：11，第一区与第 二区电流的值相差1。在一个周期结束时刻，即下一个周期的t0时刻，第一区的总的电流值为8，第二区的总的电流值为7，则第一区与其二区电流的极值之比为8：7，第一区与第二区电流的值相差1。
在本发明的实施例中，由图9可知，在周期开始时，第一区的电流可以达到最大而第二区的电流达到了最小。而在周期开始后的中间时刻，第一区的电流达到了最小，第二区的电流达到了最大。而在周期结束时，第一区的电流再次达到了最大，第二区的电流再次达到了最小，周而复始。在每一个工作周期，第一区与其二区电流极值的差值最大为1，较于如图8所示的现有技术中的六相供电支路的相序配置方法中A’区与B’区电流极值差值最大9来说，极值的的变化幅度均减小，象征离散型的标准偏差也减少。
在本发明的实施例中，多相供电支路的排序方法的不同，任意相邻两相之间的动态电流在整个周期浮动范围也不尽相同，如图10所示的本发明实施例的六相供电支路的相序配置方法中第一区与第二区电流极值差值均小于或等于，如图8中所示的现有技术中的六相供电支路的相序配置方法中A’区与B’区电流极值差值最大值9。象征离散型的标准偏差也可以小于或等于现有技术中的六相供电支路的相序配置方法中的电流值的离散型的标准偏差。在AC电流大比例占据电源输出电流的情况下及在对电源负载动态响应要求高的场景下，可大幅优化AC电流平面的稳定性，进一步提升电源负载动态响应的能力，降低电磁干扰，在局部区域的电源输出电流过小的情况下，可以减少增加电容数量，降低设计成本。
本发明实施例的非临时性计算机存储介质，存储的指令由处理器101执行的非临时性计算机可读存储介质,当所述存储介质中的指令由处理器101执行时，使得系统能够执行一种基于配置多项交错电源的相序的方法，其中，在本发明的实施例中，非临时性计算机存储介质内部存储了主程序，通过程序运行可以发出可被处理器101执行的指令，对于IC器件以及为IC器件供电的多项交错电源的等信息有记忆性，反应迅速，能有效缩短反应时间，计算机程序被处理器101执行时实现任一项配置多相交错电源相序的方法，保障多相交错电源中的多相供电支路的智能性排序。
图11是本发明一个实施例的电子设备的框图。
本发明实施例的电子设备10，如图11所示，至少可以包括处理器101和存储器102，其中，可以至少存在一个处理器101与存储器 102通信连接，存储器102中可以存储有计算机程序，计算机程序运行可以通过信号传递给处理器101执行，并且可以实现任一项配置多相交错电源相序的方法。
根据本发明实施例的电子设备，可以用于计算机、大型服务器或者专用集成电路中，其上存储的计算机程序运行，发送可被运行的指令给处理器101，计算机程序被处理器101执行时实现配置多相交错电源相序的方法，从而优化AC电流平面的稳定性，进一步提升电源负载动态响应的能力。
图12是本发明另一个实施例的电子设备的框图。
本发明实施例的电子设备20，如图12所示，可以至少主板400、IC器件100、多相交错电源200和控制器300，其中，可以将IC器件100设置在主板400上，多相交错电源200可以为IC器件100供电。控制器300可以用于以上配置多相交错电源时序的方法配置所述多相交错电源中每相供电支路的相序，在多相交错电源200中，交流电流在一个工作周期内，只有一个相支路处于电感充电状态，其他支路都处于电感放电状态，控制器300还可以控制各相支路依次交替完成电感充电状态和电感放电状态，例如，如图7所示，以八相供电支路为例，控制器300可以按照上述的配置多相交错电源时序的方法配置所述多相交错电源中每相供电支路的相序，并且可以控制第1相、第2相、第3相、第4相、第5相、第6相、第7相、第8相供电支路依次完成完成电感充电状态和电感放电状态。
根据本发明实施例的电子设备，在多相交错电源中的多相供电支路按照第1相、第2相、第3相、第4相、第5相、第6相、第7相、第8相等顺次进行交流供电的过程中，可以使这些相位的AC电流瞬时值的最大值和最小值并存，可大幅优化AC电流平面的稳定性，能够降低电磁干扰，进一步提升电源负载动态响应的能力。
图13是一种多相交错电源在IC器件的单侧一字排开放置的示意图；
图14是一种多相交错电源的以IC器件为中心的环形放置的示意图；
在本发明的实施例中，多相交错电源可以包括N相供电支路，可以将N相供电支路设置在IC器件100的一侧，并且一字排开设置，例如，如图13所示，交错电源200a或交错电源200b或交错电源200c或交错电源200d的可以单独设置在IC器件100的单侧。或者也可以 将N相供电支路平均设置在IC器件100的两侧，并且可以在IC器件100的每侧一字排开设置。或者，如图13所示，可以将交错电源200a和交错电源200c，或者交错电源200b和交错电源200d可以分别设置在IC器件100的对侧，形成一字对排的布局。再或者，可以将N相供电支路围绕IC器件100的四周设置。再或者，如图13所示，可以将交错电源200a、交错电源200c、交错电源200b和交错电源200d、分别设置在IC器件100的四周，形成一字对排的布局。再例如，可以将N相供电支路围绕IC器件100的圆周设置，例如，如图14所示，可以将交错电源200a、交错电源200c、交错电源200b和交错电源200d以IC器件100为中心呈环形排布。
在本发明实施例的配置多相交错电源时序的方法，使得电子设备中的多相交错电源在实际布局情况下可以任意采用在IC器件100单侧一字排开或者IC器件100两侧一字排开或者围绕IC器件100的四周或圆周设置，如果将多相交错电源围绕IC器件100圆周设置，则可以将N相供电支路围绕IC器件100旋转任意角度，方便PCB板的布局和布线。如果在实际布局情况下采用在IC器件100单侧一字排开或者IC器件100两侧一字排开或者围绕IC器件100的四周设置，则可以将已经设置好的环形相序，从任意两个相邻的相位之间断开，即可以成为一字排开的布局。例如，以八相供电之路为例，如图7所示，将顺时针排序的第1相、第4相、第7相、第2相、第5相、第8相、第3相、第6相，如果从第7相和第2相之间断开，则可以得到一种第2相、第5相、第8相、第3相、第6相、第1相、第4相、第7相的在IC器件100单侧一字排开布局方式。或者，如果在第5相和第8相之间断开，则可以得到一种第8相、第3相、第6相、第1相、第4相、第7相、第2相、第5相的在IC器件100单侧一字排开布局方式。例如，从如果从第7相和第2相之间断开以及从第3相和第6相之间断开，则可以得到以第2相、第5相、第8相、第3相、第3相为一排可以设置在IC器件100的一侧，以第6相、第1相、第4相、第7相为一排可以设置在IC器件100的另一侧，即形成在IC器件100两侧一字排开的布局。本发明实施例的配置多相交错电源时序的方法设计简单快捷，且空间适应能力强。
总的来说，本发明实施例的配置多相交错电源时序的方法、计算机存储介质和电子设备，设计简单快捷，且空间适应能力强。在实际布局中无论采用一字排开式还是圆周排布式，都可以降低多相交错电 源输出的AC电流平面的失衡影响，降低电磁干扰，也可以不必要局部区域的电源输出电流过小的时候增加电容数量，降低成本。
术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性。或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本发明的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示意性实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不一定指的是相同的实施例或示例。
尽管已经示出和描述了本发明的实施例，本领域的普通技术人员可以理解：在不脱离本发明的原理和宗旨的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由权利要求及其等同物限定。

Claims (12)

  1. 一种配置多相交错电源相序的方法，其特征在于，
    根据多相交错电源供电支路的相数确定相序间隔；
    配置多相交错电源的任意一相供电支路为第一相序；
    从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序。
  2. 根据权利要求1所述的配置多相交错电源相序的方法，其特征在于，所述多相交错电源包括N相供电支路，其中，N>3，根据多相交错电源供电支路的相数确定相序间隔，包括：
    小于(N-1)的质数数列中出现第一个不能被N整除的质数，将所述第一个不能被N整除的质数赋予m，并确定相序间隔为m-1。
  3. 根据权利要求1所述的配置多相交错电源相序的方法，其特征在于，所述多相交错电源包括N相供电支路，其中，N>3，根据多相交错电源供电支路的相数确定相序间隔，包括：
    小于(N-1)的质数数列中不存在不能被N整除的质数，则赋值m＝2，并确定相序间隔为m-1。
  4. 根据权利要求2或3所述的配置多相交错电源相序的方法，其特征在于，从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序，包括：
    从配置为所述第一相序的供电支路开始，按照顺时针方向依次配置顺序的相序，其中，每相隔m-1个供电支路配置为一个相序。
  5. 根据权利要求2或3所述的配置多相交错电源相序的方法，其特征在于，从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序，包括：
    从配置为所述第一相序的供电支路开始，按照逆时针方向依次配置顺序的相序，其中，每相隔m-1个供电支路配置为一个相序。
  6. 根据权利要求4所述的配置多相交错电源相序的方法，其特征在于，从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序，还包括：
    所述多相交错电源的其它供电支路的相序未完成相序配置，当需要配置相序的供电支路已经配置过相序时，则沿逆时针方向顺延一个供电支路；
    以沿逆时针顺延一个供电支路后所在位置的供电支路为新起始点，继续配置剩余未配置相序的供电支路的相序，其中，每相隔m-1 个供电支路配置为一个相序；
    直至所述多相交错电源的其它供电支路的相序全部配置完。
  7. 根据权利要求5所述的配置多相交错电源相序的方法，其特征在于，从配置为所述第一相序的供电支路开始，根据所述相序间隔配置所述多相交错电源的其它相供电支路的相序，还包括：
    所述多相交错电源的其它供电支路的相序未完成相序配置，当需要配置相序的供电支路已经配置过相序时，则沿顺时针方向顺延一个供电支路；
    以沿顺时针顺延一个供电支路后所在位置的供电支路为新起始点，继续配置剩余未配置相序的供电支路的相序，其中，每相隔m-1个供电支路配置为一个相序；
    直至所述多相交错电源的所有供电支路的相序全部配置完。
  8. 根据权利要求2或3所述的配置多相交错电源相序的方法，其特征在于，所述N＝8，或者，所述N＝6。
  9. 一种计算机存储介质，其上存储有计算机程序，其特征在于，所述计算机程序被处理器执行时实现权利要求1-8任一项所述的配置多相交错电源相序的方法。
  10. 一种电子设备，其特征在于，包括：
    至少一个处理器；
    与至少一个处理器通信连接的存储器；
    其中，所述存储器中存储有可被至少一个处理器执行的计算机程序，至少一个处理器执行所述计算机程序时实现权利要求1-8任一项所述的配置多相交错电源相序的方法。
  11. 一种电子设备，其特征在于，包括：
    主板和设置在所述主板上的IC器件；
    多相交错电源，所述多相交错电源用于为所述IC器件供电；
    控制器，所述控制器用于根据权利要求1-8任一项所述的配置多相交错电源时序的方法配置所述多相交错电源中每相供电支路的相序。
  12. 根据权利要求11所述的电子设备，其特征在于，
    所述多相交错电源包括N相供电支路；
    N相供电支路设置在所述IC器件的一侧且一字排开设置；
    或者，所述N相供电支路平均设置在所述IC器件的两侧，且在所述IC器件每侧的供电支路一字排开设置；
    或者，所述N相供电支路围绕所述IC器件的四周或圆周设置。
PCT/CN2021/130074 2020-09-11 2021-11-11 配置多相交错电源相序方法、计算机存储介质和电子设备 WO2022053084A1 (zh)

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