WO2022052010A1 - 一种显示基板及相关装置 - Google Patents

一种显示基板及相关装置 Download PDF

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Publication number
WO2022052010A1
WO2022052010A1 PCT/CN2020/114621 CN2020114621W WO2022052010A1 WO 2022052010 A1 WO2022052010 A1 WO 2022052010A1 CN 2020114621 W CN2020114621 W CN 2020114621W WO 2022052010 A1 WO2022052010 A1 WO 2022052010A1
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WIPO (PCT)
Prior art keywords
sub
pixel
pixels
virtual
display substrate
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PCT/CN2020/114621
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English (en)
French (fr)
Inventor
罗昶
胡明
徐倩
吴建鹏
牛彤
黄琰
张国梦
王本莲
徐鹏
嵇凤丽
张毅
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2020/114621 priority Critical patent/WO2022052010A1/zh
Priority to CN202080002231.XA priority patent/CN112470287B/zh
Priority to US17/417,336 priority patent/US11785821B2/en
Priority to PCT/CN2020/119231 priority patent/WO2022052194A1/zh
Publication of WO2022052010A1 publication Critical patent/WO2022052010A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10Deposition of organic active material
    • H10K71/16Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/166Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display substrate, an organic electroluminescence display panel, a high-precision metal mask and a display device.
  • Organic electroluminescence (Organic Light Emitting Diode, OLED) display device is one of the hot spots in the field of flat panel display research. Compared with liquid crystal display, OLED display device has low energy consumption, low production cost, self-luminescence, wide viewing angle and response speed. At present, in the field of flat panel display, OLED display devices have begun to replace the traditional liquid crystal display (Liquid Crystal Display, LCD).
  • LCD Liquid Crystal Display
  • the structure of the OLED display device mainly includes: a base substrate, and pixels arranged in a matrix are fabricated on the base substrate.
  • each pixel generally uses organic material to form an organic electroluminescence structure at the corresponding pixel position on the array substrate through a high-precision metal mask using an evaporation film formation technology.
  • the size of the opening of the high-precision metal mask directly determines the size of the sub-pixels.
  • the technical problem to be solved by the present disclosure is to provide a display substrate, an organic electroluminescence display panel, a high-precision metal mask and a display device, which can improve the resolution of the display device.
  • a display substrate which includes a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels,
  • the first sub-pixels and the third sub-pixels are alternately arranged to form a plurality of first sub-pixel rows, the second sub-pixels form a plurality of second sub-pixel rows, and the first sub-pixel rows
  • the sub-pixel row and the second sub-pixel row are alternately arranged in the second direction, and the center connecting line of the two first sub-pixels and the two third sub-pixels distributed in two adjacent rows and two columns is a first virtual quadrilateral
  • the two first sub-pixels are located on two opposite top corners of the first virtual quadrilateral, the first virtual quadrilateral includes an interior angle a that is not 90°, and the second sub-pixels are located on the first virtual quadrilateral Inside;
  • the distance between the orthographic projection of the center of the first sub-pixel and the center of the third sub-pixel in different first sub-pixel rows on the first straight line is x, and the first straight line and The first direction is parallel; the distance between the orthographic projection of the center of the first subpixel and the center of the third subpixel in the same first subpixel row on the second straight line is y, and the second straight line is parallel to the second direction,
  • the non-90° interior angle a of the first virtual quadrilateral roughly satisfies any one of the following formulas:
  • P is the distance between the centers of the two most adjacent second sub-pixels in the second sub-pixel row.
  • the value range of x is 1-10um
  • the value range of y is 1-10um
  • the inner angle a is greater than or equal to 70° and less than 90°.
  • the center line connecting the adjacent first subpixels and the third subpixels in the first direction is parallel to the first direction, and the centers connecting the first subpixels and the third subpixels adjacent in the second direction are connected.
  • the line is parallel to the second direction;
  • the line connecting the centers of the adjacent first and third subpixels in the first direction is parallel to the first direction, and the line connecting the centers of the adjacent first and third subpixels in the second direction is parallel to the second direction.
  • the first direction and the second direction are substantially perpendicular, the first direction is one of a row direction and a column direction, and the second direction is the other of a row direction and a column direction. one.
  • the second sub-pixel is a rectangle
  • the shape of the second sub-pixel has a length direction, the second sub-pixel has a maximum size in its length direction, the length direction of the second sub-pixel intersects both the first direction and the second direction, and
  • the dimension L' of the second sub-pixel in its length direction roughly satisfies
  • the dimension M' of the second sub-pixel in its width direction substantially satisfies
  • the dimension L' of the second sub-pixel in its width direction approximately satisfies
  • the dimension M' of the second sub-pixel in its length direction approximately satisfies or
  • the dimension L' of the second sub-pixel in its length direction roughly satisfies
  • the dimension M' of the second sub-pixel in its width direction substantially satisfies
  • the dimension L' of the second sub-pixel in its width direction approximately satisfies
  • the dimension M' of the second sub-pixel in its length direction approximately satisfies
  • the width direction of the same second sub-pixel is substantially perpendicular to the length direction, and L and M are preset values.
  • the shape of the second sub-pixel has a length direction
  • the second sub-pixel has a maximum size in its length direction
  • the length direction of the second sub-pixel is related to the first direction and the second direction. All intersect, and x is greater than 0, y is greater than 0,
  • the four first virtual quadrilaterals arranged in two columns and two rows form a second virtual polygon in a co-edge manner, and the second virtual polygon includes four second sub-pixels, five first sub-pixels, four third sub-pixels;
  • the four second sub-pixels are respectively located in the four first virtual quadrilaterals, one of the first sub-pixels is surrounded by the four second sub-pixels, and the other four first sub-pixels and the four third sub-pixels are respectively located in the first sub-pixels.
  • the four first sub-pixels located on the edge or vertex of the second virtual polygon and the four third sub-pixels are alternately distributed;
  • the line connecting the centers of the four first sub-pixels located at the edge or vertex position of the second virtual polygon is substantially a virtual parallelogram, and the four third sub-pixels located at the edge or vertex position of the second virtual polygon
  • the center connection lines of the are substantially virtual parallelograms, and the center connection lines of the four second sub-pixels located in the four first virtual quadrilaterals are substantially virtual parallelograms.
  • At least some of the center lines of the first sub-pixels are substantially located on a third straight line, and at least some of the center lines of the first sub-pixels are substantially located on a fourth line, and the third line is connected to the third line.
  • the fourth straight line is substantially parallel.
  • the third straight line and the fourth straight line are parallel to the first direction;
  • the third straight line and the fourth straight line are parallel to the second direction
  • the center line connecting at least some of the second sub-pixels located in the same second pixel row is substantially located on the fifth straight line.
  • the four first virtual quadrilaterals of the same second virtual polygon include a first virtual quadrilateral T1 and a second virtual polygon T2, and the difference between the minimum interior angle of the first virtual quadrilateral T1 and 90° is less than the absolute value of the difference between the smallest interior angle of the first virtual quadrilateral T2 and 90°, and the width to length ratio of the second subpixel in the first virtual quadrilateral T1 is greater than the width of the second subpixel in the first virtual quadrilateral T2. Aspect ratio.
  • the display substrate includes a plurality of pixel repeating units, and each pixel repeating unit includes two first sub-pixels, two third sub-pixels located in the same first virtual quadrangle, and also includes two first sub-pixels and the two first sub-pixels.
  • One of the first sub-pixels in the pixels is located in the same second virtual polygon and surrounds the four second sub-pixels of the first sub-pixel.
  • the center lines of the second sub-pixels arranged along the first direction are parallel to the first direction, and the centers of the second sub-pixels arranged along the second direction are connected to each other. Lines are parallel to the second direction.
  • the four second subpixels in the first virtual quadrilateral are respectively the second subpixel A, the second subpixel B, the second subpixel C, and the second subpixel D,
  • the second sub-pixel A, the second sub-pixel B, the second sub-pixel C and the second sub-pixel D have the same shape; or
  • the second sub-pixel A and the second sub-pixel B have the same shape
  • the second sub-pixel C and the second sub-pixel D have the same shape
  • the second sub-pixel A and the second sub-pixel Subpixels C are not the same shape
  • the second sub-pixel A and the second sub-pixel D have the same shape
  • the second sub-pixel C and the second sub-pixel B have the same shape
  • the second sub-pixel A and the second sub-pixel A have the same shape.
  • Subpixels C are not the same shape; or
  • the shape of the second sub-pixel A and the second sub-pixel C are the same, and the shapes of the second sub-pixel A, the second sub-pixel B and the second sub-pixel D are different; or
  • the shapes of the second sub-pixel A, the second sub-pixel B, the second sub-pixel C and the second sub-pixel D are different from each other.
  • each of the first sub-pixels has the same area, and each of the third sub-pixels has the same area.
  • the area of the first sub-pixel is S
  • the area of the second-color sub-pixel is f*S
  • the area of the third-color sub-pixel is g*S, where 0.5 ⁇ f ⁇ 0.8, 1 ⁇ g ⁇ 2.2.
  • the shapes of the first sub-pixels are approximately the same; and/or
  • the shapes of the third sub-pixels are substantially the same.
  • the shape of the first subpixel, the second subpixel and the third subpixel is a polygon; or, the first subpixel, the second subpixel and the third subpixel
  • the shape of the sub-pixel is a polygon with rounded corners.
  • the shapes of the first sub-pixel, the second sub-pixel and the third sub-pixel are selected from the group consisting of quadrilateral, hexagonal, octagonal, quadrilateral with rounded corners, and rounded corners Any of the hexagons or octagons with rounded corners, circles or ellipses.
  • the first sub-pixel is a red sub-pixel
  • the third sub-pixel is a blue sub-pixel
  • the first sub-pixel is a blue sub-pixel
  • the third sub-pixel is red sub-pixels
  • the second sub-pixels are green sub-pixels.
  • Embodiments of the present disclosure also provide an organic electroluminescence display panel, including the above-mentioned display substrate, wherein adjacent first virtual quadrilaterals are arranged in a row direction and a column direction in a manner of sharing sides.
  • Embodiments of the present disclosure also provide a display device including the organic electroluminescence display panel as described above.
  • Embodiments of the present disclosure further provide a high-precision metal mask for fabricating the above-mentioned display substrate, which includes: a plurality of opening regions, and the plurality of opening regions include positions corresponding to the first sub-pixels The corresponding first opening area, or the second opening area corresponding to the position of the second sub-pixel, or the third opening area corresponding to the position of the third sub-pixel.
  • the first sub-pixel includes a multi-layer film
  • the second sub-pixel includes a multi-layer film
  • the third sub-pixel includes a multi-layer film
  • the shape of the first opening area is the same as that of the first opening area.
  • the shape and distribution of at least one film layer in the first sub-pixel are substantially the same, and the shape and distribution of the third opening area are substantially the same as the shape and distribution of at least one film layer in the third sub-pixel
  • the shape and distribution of the second opening area are substantially the same as the shape and distribution of at least one film layer in the second sub-pixel.
  • a plurality of second opening regions corresponding to the positions of the second sub-pixels are included, and at least two of the plurality of second opening regions have different shapes or areas.
  • FIG. 1 is a schematic diagram of a cross-sectional structure of a display substrate according to an embodiment of the disclosure
  • 2-13 are schematic diagrams of display substrates according to embodiments of the present disclosure.
  • Embodiments of the present disclosure provide a display substrate, an organic electroluminescence display panel, a high-precision metal mask, and a display device, which can improve the resolution of the display device.
  • Embodiments of the present disclosure provide a display substrate, which includes a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels,
  • the first sub-pixels and the third sub-pixels are alternately arranged to form a plurality of first sub-pixel rows, the second sub-pixels form a plurality of second sub-pixel rows, and the first sub-pixel rows
  • the sub-pixel row and the second sub-pixel row are alternately arranged in the second direction, and the center connecting line of the two first sub-pixels and the two third sub-pixels distributed in two adjacent rows and two columns is a first virtual quadrilateral
  • the two first sub-pixels are located on two opposite top corners of the first virtual quadrilateral, the first virtual quadrilateral includes an interior angle a that is not 90°, and the second sub-pixels are located on the first virtual quadrilateral Inside;
  • the distance between the orthographic projection of the center of the first sub-pixel and the center of the third sub-pixel in different first sub-pixel rows on the first straight line is x, and the first straight line and The first direction is parallel; the distance between the orthographic projection of the center of the first subpixel and the center of the third subpixel in the same first subpixel row on the second straight line is y, and the second straight line is parallel to the second direction,
  • the non-90° interior angle a of the first virtual quadrilateral roughly satisfies any one of the following formulas:
  • P is the distance between the centers of the two most adjacent second sub-pixels in the second sub-pixel row.
  • the above formula is a roughly equal relationship, that is, the angle of a can have a certain deviation, for example, it can float up and down 5° on the basis of the calculation result.
  • P is the approximate distance between the centers of two adjacent second sub-pixels.
  • the second sub-pixels in the second sub-pixel row may be uniformly distributed, that is, the distance between every two adjacent second sub-pixels may be approximately equal, or there may be a certain deviation, for example, the difference is less than 5 microns.
  • P may also be the average distance between adjacent second subpixels in the same subpixel row.
  • the distance between P and the center of the first sub-pixel and the center of the adjacent third sub-pixel in the same row is also approximately equal, for example, the difference is less than 5 microns. or half the distance between the centers of two adjacent first subpixels in the same subpixel row; or half the distance between the centers of two adjacent third subpixels in the same subpixel row .
  • the display substrate provided by the embodiment of the present disclosure can make the first sub-pixel, the second sub-pixel and the third sub-pixel closely arranged under the same process conditions, so as to meet the minimum requirements.
  • the resolution of the display device is improved under the condition of pixel spacing.
  • the second sub-pixels are staggered, so that under the condition of the same aperture ratio, the distance between the openings of the fine metal mask used to make the second sub-pixel can be increased, and the production of the fine metal mask can be improved.
  • the distribution of the brightness center can be made more uniform, and the display effect of the display device can be improved.
  • a first sub-pixel includes a first effective light-emitting area
  • a second sub-pixel includes a second effective light-emitting area
  • a third sub-pixel includes a third effective light-emitting area
  • a second effective light-emitting area The area of the region ⁇ a first effective light-emitting region ⁇ a third effective light-emitting region.
  • each of the first effective light-emitting regions, each of the second effective light-emitting regions, and each of the third effective light-emitting regions are separated.
  • each of the first effective light emitting regions, each of the second effective light emitting regions, and each of the third effective light emitting regions are defined by a plurality of separated openings formed in the pixel defining layer.
  • each first effective light-emitting region is defined by a light-emitting layer in the corresponding first sub-pixel, which is located between opposite anodes and cathodes in a direction perpendicular to the substrate and is driven to emit light.
  • each second effective light-emitting region is defined by a light-emitting layer in a corresponding second sub-pixel, which is located between the opposite anode and cathode in a direction perpendicular to the substrate substrate, and is driven to emit light.
  • each third effective light-emitting region is defined by a light-emitting layer in a corresponding third sub-pixel, which is located between opposite anodes and cathodes in a direction perpendicular to the substrate substrate, and is driven to emit light.
  • each of the first effective light-emitting regions, each of the second effective light-emitting regions, and each of the third effective light-emitting regions is composed of a corresponding light-emitting layer and an electrode having carrier (hole or electron) transport with the corresponding light-emitting layer (Anode or cathode) or partial definition of an electrode.
  • each first effective light emitting area, each second effective light emitting area, and each third effective light emitting area are defined by at least a portion of the cathode and at least a portion of the anode that overlap in orthographic projection on the base substrate, And at least part of the cathode and at least part of the anode do not overlap with the orthographic projection of the first insulating layer on the base substrate, and the first insulating layer is located between the cathode and the anode in a direction perpendicular to the base substrate.
  • the first insulating layer includes a pixel defining layer.
  • each of the first sub-pixels, each of the second sub-pixels and each of the third sub-pixels respectively includes a first electrode, a light-emitting layer located on a side of the first electrode away from the base substrate, and a light-emitting layer located away from the first
  • the second electrode on one side of the electrode is further provided with a second insulating layer between the first electrode and the light-emitting layer, and/or between the second electrode and the light-emitting layer, in the direction perpendicular to the substrate substrate, and the second insulating layer Projecting overlap with the first electrode or the second electrode on the base substrate, and the second insulating layer has an opening, and the opening of the second insulating layer on the side facing the light-emitting layer can expose at least part of the first electrode or the second electrode , so that it can be in contact with the light-emitting layer or the functional layer of auxiliary light-emitting, each first effective light-emitting area, each second effective light-emitting area and each
  • the second insulating layer includes a pixel defining layer.
  • the auxiliary light-emitting functional layer may be a hole injection layer, a hole transport layer, an electron transport layer, a hole blocking layer, an electron blocking layer, an electron injection layer, an auxiliary light-emitting layer, an interface improvement layer, Any one or more of antireflection layers, etc.
  • the first electrode may be an anode and the second electrode may be a cathode.
  • the first electrode may include at least two layers of indium tin oxide (ITO), silver (A) g, such as three layers of ITO, Ag, and ITO.
  • the second electrode may include any one or more of magnesium (Mg), Ag, ITO, and indium zinc oxide (IZO), such as a mixed layer or alloy layer of Mg and Ag.
  • Each sub-pixel includes a light-emitting layer
  • each first sub-pixel includes a first-color light-emitting layer located in the opening and on the pixel-defining layer
  • each second sub-pixel includes a second-color light-emitting layer located in the opening and on the pixel-defining layer
  • each The third sub-pixel includes a third-color light-emitting layer within the opening and on the pixel-defining layer.
  • the preparation process of the display substrate of this embodiment may include the following steps (1) to (9).
  • a flexible display substrate with a top emission structure is taken as an example for description.
  • the base substrate 10 may be a flexible base substrate, for example, including a first flexible material layer, a first inorganic material layer, a semiconductor layer, and a second flexible material layer stacked on the glass carrier 1 and the second inorganic material layer.
  • the materials of the first flexible material layer and the second flexible material layer are polyimide (PI), polyethylene terephthalate (PET), or a surface-treated soft polymer film.
  • the materials of the first inorganic material layer and the second inorganic material layer are silicon nitride (SiNx) or silicon oxide (SiOx), etc., which are used to improve the water and oxygen resistance of the substrate.
  • the layer is also referred to as a barrier layer.
  • the material of the semiconductor layer is amorphous silicon (a-si).
  • the preparation process includes: firstly coating a layer of polyimide on the glass carrier 1, and curing to form a film Then, a first flexible (PI1) layer is formed; then a barrier film is deposited on the first flexible layer to form a first barrier (Barrier1) layer covering the first flexible layer; then an amorphous layer is deposited on the first barrier layer A silicon film to form an amorphous silicon (a-si) layer covering the first barrier layer; then a layer of polyimide is coated on the amorphous silicon layer, and a second flexible (PI2) layer is formed after curing into a film; Then, a barrier film is deposited on the second flexible layer to form a second barrier (Barrier 2 ) layer covering the second flexible layer, and the preparation of the base substrate 10 is completed.
  • the driving structure layer includes a plurality of driving circuits, each of which includes a plurality of transistors and at least one storage capacitor, such as a 2T1C, 3T1C or 7T1C design.
  • the preparation process of the driving structure layer may refer to the following description.
  • the manufacturing process of the driving circuit of the first sub-pixel 21 is taken as an example for description.
  • a first insulating film and an active layer film are sequentially deposited on the base substrate 10, and the active layer film is patterned through a patterning process to form a first insulating layer 11 covering the entire base substrate 10, and a first insulating layer 11 disposed on the first insulating layer
  • the active layer pattern on 11, the active layer pattern includes at least the first active layer.
  • a second insulating film and a first metal film are sequentially deposited, and the first metal film is patterned through a patterning process to form a second insulating layer 12 covering the pattern of the active layer, and a first insulating layer 12 disposed on the second insulating layer 12
  • a gate metal layer pattern, the first gate metal layer pattern at least includes a first gate electrode and a first capacitor electrode.
  • a third insulating film and a second metal film are sequentially deposited, and the second metal film is patterned through a patterning process to form a third insulating layer 13 covering the first gate metal layer, and a third insulating layer 13 disposed on the third insulating layer 13
  • the second gate metal layer pattern at least includes a second capacitor electrode, and the position of the second capacitor electrode corresponds to the position of the first capacitor electrode.
  • a fourth insulating film is deposited, and the fourth insulating film is patterned by a patterning process to form a fourth insulating layer 14 pattern covering the second gate metal layer, and at least two first via holes are opened on the fourth insulating layer 14,
  • the fourth insulating layer 14, the third insulating layer 13 and the second insulating layer 12 in the two first via holes are etched away, exposing the surface of the first active layer.
  • a third metal film is deposited, the third metal film is patterned through a patterning process, and a source-drain metal layer pattern is formed on the fourth insulating layer 14, and the source-drain metal layer at least includes the first source electrode and the first source electrode located in the display area. drain electrode.
  • the first source electrode and the first drain electrode may be connected to the first active layer through first via holes, respectively.
  • the first active layer, the first gate electrode, the first source electrode and the first drain electrode may form the first transistor 210, and the first capacitor electrode and the second capacitor electrode may The first storage capacitor 212 is formed.
  • the driving circuit of the second sub-pixel 22 and the driving circuit of the third-color sub-pixel 23 can be formed at the same time.
  • the first insulating layer 11 , the second insulating layer 12 , the third insulating layer 13 and the fourth insulating layer 14 are silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride ( Any one or more of SiON), which may be a single layer, a multi-layer or a composite layer.
  • the first insulating layer 11 is called a buffer layer, which is used to improve the water and oxygen resistance of the base substrate;
  • the second insulating layer 12 and the third insulating layer 13 are called gate insulating (GI, Gate Insulator) layers;
  • the fourth insulating layer 14 is called an interlayer insulating (ILD, Interlayer Dielectric) layer.
  • the first metal film, the second metal film and the third metal film are made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo).
  • metal materials such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo).
  • Various, or alloy materials of the above metals such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti and the like.
  • the active layer film is made of amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic matter technology.
  • a-IGZO amorphous indium gallium zinc oxide
  • ZnON zinc oxynitride
  • IZTO indium zinc tin oxide
  • a-Si amorphous silicon
  • p-Si polycrystalline silicon
  • One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic matter technology.
  • a planar thin film of organic material is coated on the base substrate 10 on which the aforementioned patterns are formed, to form a planarization (PLN, Planarization) layer 15 covering the entire base substrate 10, and through masking, exposure,
  • PPN Planarization
  • a plurality of second via holes K2 are formed on the flat layer 15 in the display area.
  • the flat layer 15 in the plurality of second via holes K2 is developed away, exposing the surface of the first drain electrode of the first transistor 210 of the driving circuit of the first sub-pixel 21 and the surface of the first drain electrode of the driving circuit of the second sub-pixel 22 respectively.
  • the surface of the first drain electrode of a transistor and the surface of the first drain electrode of the first transistor of the driving circuit of the third color sub-pixel 23 are examples of the third color sub-pixel 23 .
  • the first electrode is a reflective anode.
  • a conductive thin film is deposited on the base substrate 10 on which the aforementioned patterns are formed, and the conductive thin film is patterned through a patterning process to form the first electrode pattern.
  • the first anode 213 of the first sub-pixel 21 is connected to the first drain electrode of the first transistor 210 through the second via K2
  • the second anode 223 of the second sub-pixel 22 is connected to the second sub-pixel 22 through the second via K2
  • the first drain electrode of the first transistor of the third color sub-pixel 23 is connected to the first drain electrode of the first transistor of the third color sub-pixel 23 through the second via K2.
  • the first electrode may employ a metallic material, such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).
  • a metallic material such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).
  • Various, or alloy materials of the above metals such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb) can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti, etc., or, a metal and Stacked structures formed of transparent conductive materials, such as reflective materials such as ITO/Ag/ITO, Mo/AlNd/ITO, etc.
  • a pixel definition layer (PDL, Pixel Definition Layer) pattern is formed.
  • a pixel definition film is coated on the base substrate 10 on which the aforementioned pattern is formed, and a pixel definition layer pattern is formed by masking, exposing, and developing processes.
  • the pixel definition layer 30 in the display area includes a plurality of sub-pixel definition parts 302, a plurality of pixel definition layer openings 301 are formed between adjacent sub-pixel definition parts 302, and the pixel definition layer 30 in the plurality of pixel definition layer openings 301 is developed and removed , at least part of the surface of the first anode 213 of the first subpixel 21 , at least part of the surface of the second anode 223 of the second subpixel 22 and at least part of the surface of the third anode 233 of the third color subpixel 23 are exposed, respectively.
  • the pixel definition layer 30 may employ polyimide, acrylic, polyethylene terephthalate, or the like.
  • a thin film of organic material is coated on the base substrate 10 on which the aforementioned patterns are formed, and a pattern of spacer pillars 34 is formed by masking, exposing, and developing processes.
  • the spacer posts 34 may act as a support layer configured to support the FMM during the evaporation process.
  • a repeating unit is spaced between two adjacent spacer columns 34.
  • the spacer columns 34 may be located in adjacent first sub-pixels 21 and third adjacent ones. between color sub-pixels 23 .
  • an organic functional layer and a second electrode are sequentially formed on the base substrate on which the pattern is formed.
  • the second electrode is a transparent cathode.
  • the light-emitting element can emit light from the side away from the base substrate 10 through the transparent cathode to realize top emission.
  • the organic functional layers of the light emitting element include: a hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer.
  • the hole injection layer 241 and the hole transport layer 242 are sequentially formed by vapor deposition on the base substrate 10 on which the aforementioned patterns are formed by using an open mask, and then the hole injection layer 241 and the hole transport layer 242 are sequentially vapor deposited by using FMM
  • the blue light-emitting layer 236 , the green light-emitting layer 216 and the red light-emitting layer 226 are formed, and then the electron transport layer 243 , the cathode 244 and the light coupling layer 245 are formed by successive evaporation using an open mask.
  • the hole injection layer 241 , the hole transport layer 242 , the electron transport layer 243 and the cathode 244 are all common layers of a plurality of sub-pixels.
  • the organic functional layer may further include: a microcavity adjustment layer between the hole transport layer and the light emitting layer.
  • FMM can be used to sequentially evaporate a blue microcavity adjusting layer, a blue light-emitting layer, a green microcavity adjusting layer, a green light-emitting layer, a red microcavity adjusting layer, and a red light-emitting layer.
  • the organic functional layer is formed in the sub-pixel region to realize the connection between the organic functional layer and the anode.
  • the cathode is formed on the pixel definition layer and connected to the organic functional layer.
  • the cathode may employ any one or more of magnesium (Mg), silver (Ag), aluminum (Al), or an alloy made of any one or more of the foregoing metals , or a transparent conductive material, such as indium tin oxide (ITO), or a multi-layer composite structure of metal and transparent conductive material.
  • Mg magnesium
  • Ag silver
  • Al aluminum
  • ITO indium tin oxide
  • a light coupling layer may be formed on the side of the cathode 244 away from the base substrate 10 , and the light coupling layer may be a common layer of a plurality of sub-pixels.
  • the light coupling layer can cooperate with the transparent cathode to increase the light output.
  • the material of the light coupling layer can be a semiconductor material. However, this embodiment does not limit this.
  • an encapsulation layer is formed on the base substrate 10 on which the aforementioned patterns are formed, and the encapsulation layer may include a stacked first encapsulation layer 41 , a second encapsulation layer 42 and a third encapsulation layer 43 .
  • the first encapsulation layer 41 is made of inorganic material and covers the cathode 244 in the display area.
  • the second encapsulation layer 42 adopts an organic material.
  • the third encapsulation layer 43 is made of inorganic material and covers the first encapsulation layer 41 and the second encapsulation layer 42 .
  • the encapsulation layer may adopt a five-layer structure of inorganic/organic/inorganic/organic/inorganic.
  • the value range of x may be 1-10um, and the value range of y may be 1-10um; further, the value range of x may be 2-7um, and the value range of y may be 2- 7um; or, the value range of x may be 2-8um, and the value range of y may be 2-8um.
  • the interior angle a is greater than or equal to 70° and less than 90°; further, the interior angle a is greater than or equal to 75° but not 90°.
  • the center line connecting the adjacent first subpixels and the third subpixels in the first direction is parallel to the first direction, and the centers connecting the first subpixels and the third subpixels adjacent in the second direction are connected.
  • the line is parallel to the second direction;
  • the line connecting the centers of the adjacent first and third subpixels in the first direction is parallel to the first direction, and the line connecting the centers of the adjacent first and third subpixels in the second direction is parallel to the second direction.
  • the range of c may be 0°-30°, or the range of c may be 0-20°, or the range of c may be 0-10°, or the range of c may be 0-5°, For example, 1°, 2°, 3°, 4°, etc.
  • the first direction and the second direction are substantially perpendicular, the first direction is one of a row direction and a column direction, and the second direction is the other of a row direction and a column direction. one.
  • the second sub-pixel may be any kind of axisymmetric shape, such as a rounded rectangle, a rounded hexagon, a rounded octagon, an ellipse, etc., and the length direction of the second sub-pixel may be its length.
  • the axis direction, the width direction is its short axis direction;
  • the shape of the second sub-pixel has a length direction, the second sub-pixel has a maximum size in its length direction, the length direction of the second sub-pixel intersects both the first direction and the second direction, and
  • the dimension L' of the second sub-pixel in its length direction roughly satisfies
  • the dimension M' of the second sub-pixel in its width direction substantially satisfies
  • the dimension L' of the second sub-pixel in its width direction approximately satisfies
  • the dimension M' of the second sub-pixel in its length direction approximately satisfies or
  • the dimension L' of the second sub-pixel in its length direction roughly satisfies
  • the dimension M' of the second sub-pixel in its width direction substantially satisfies
  • the dimension L' of the second sub-pixel in its width direction approximately satisfies
  • the dimension M' of the second sub-pixel in its length direction approximately satisfies
  • the width direction of the same second sub-pixel is substantially perpendicular to the length direction
  • L and M are preset values
  • the value range of L and M may be 8-30 ⁇ m.
  • the second sub-pixel may be any kind of axisymmetric shape, such as a rounded rectangle, a rounded hexagon, a rounded octagon, an ellipse, etc., and the length direction of the second sub-pixel may be its length.
  • the axis direction, the width direction is its short axis direction;
  • the shape of the second sub-pixel has a length direction, the second sub-pixel has a maximum size in its length direction, the length direction of the second sub-pixel intersects both the first direction and the second direction, and x greater than 0, y is greater than 0,
  • the four first virtual quadrilaterals arranged in two columns and two rows form a second virtual polygon in a co-edge manner, and the second virtual polygon includes four second sub-pixels, five first sub-pixels, four third sub-pixels;
  • the four second sub-pixels are respectively located in the four first virtual quadrilaterals, one of the first sub-pixels is surrounded by the four second sub-pixels, and the other four first sub-pixels and the four third sub-pixels are respectively located in the first sub-pixels.
  • the four first sub-pixels located on the edge or vertex of the second virtual polygon and the four third sub-pixels are alternately distributed;
  • the line connecting the centers of the four first sub-pixels located at the edge or vertex position of the second virtual polygon is substantially a virtual parallelogram, and the four third sub-pixels located at the edge or vertex position of the second virtual polygon
  • the center connection lines of the are substantially virtual parallelograms, and the center connection lines of the four second sub-pixels located in the four first virtual quadrilaterals are substantially virtual parallelograms.
  • the second virtual polygon may be a concave hexagon, wherein two third sub-pixels are located on two sides thereof, and the other two third sub-pixels and four first sub-pixels are respectively located on the concave hexagon sides.
  • the second virtual polygon may be a concave octagon, and the four first sub-pixels and the four third sub-pixels are respectively located at the eight vertices of the concave octagon.
  • the center connecting line of the four first sub-pixels located at the edge or vertex position of the second virtual polygon is approximately a virtual rectangle; the edge located at the edge of the second virtual polygon Or the center connecting lines of the four third sub-pixels at the vertex positions are substantially virtual rectangles; the center connecting lines of the four second sub-pixels located in the four first virtual quadrilaterals are substantially virtual rectangles.
  • At least some of the center lines of the first sub-pixels are substantially located on a third straight line, and at least some of the center lines of the first sub-pixels are substantially located on a fourth line, and the third line is connected to the third line.
  • the fourth straight line is substantially parallel.
  • the third straight line and the fourth straight line are parallel to the first direction;
  • the third straight line and the fourth straight line are parallel to the second direction
  • the center line connecting at least some of the second sub-pixels located in the same second pixel row is substantially located on the fifth straight line.
  • the second virtual polygon may be a concave polygon or a convex polygon.
  • the first virtual quadrilateral forms a second virtual polygon in a common edge manner, that is, two adjacent first virtual quadrilaterals in the row direction share one side in the column direction; two adjacent first virtual quadrilaterals in the column direction share one row square. up side.
  • the four first virtual quadrilaterals of the same second virtual polygon include a first virtual quadrilateral T1 and a second virtual polygon T2, and the difference between the minimum interior angle of the first virtual quadrilateral T1 and 90° is less than the absolute value of the difference between the smallest interior angle of the first virtual quadrilateral T2 and 90°, and the width to length ratio of the second subpixel in the first virtual quadrilateral T1 is greater than the width of the second subpixel in the first virtual quadrilateral T2. Aspect ratio.
  • the second sub-pixel includes two mutually perpendicular symmetry axes, and the width-length ratio of the second sub-pixel is the ratio of the smaller size to the larger size on the two symmetry axes.
  • the display substrate includes a plurality of pixel repeating units, and each pixel repeating unit includes two first sub-pixels, two third sub-pixels located in the same first virtual quadrangle, and also includes two first sub-pixels and the two first sub-pixels.
  • One of the first sub-pixels in the pixels is located in the same second virtual polygon and surrounds the four second sub-pixels of the first sub-pixel.
  • the center lines of the second sub-pixels arranged along the first direction are parallel to the first direction, and the centers of the second sub-pixels arranged along the second direction are connected to each other. Lines are parallel to the second direction.
  • the four second subpixels in the first virtual quadrilateral are respectively the second subpixel A, the second subpixel B, the second subpixel C, and the second subpixel D,
  • the second sub-pixel A, the second sub-pixel B, the second sub-pixel C and the second sub-pixel D have the same shape; or
  • the second sub-pixel A and the second sub-pixel B have the same shape
  • the second sub-pixel C and the second sub-pixel D have the same shape
  • the second sub-pixel A and the second sub-pixel Subpixels C are not the same shape
  • the second sub-pixel A and the second sub-pixel D have the same shape
  • the second sub-pixel C and the second sub-pixel B have the same shape
  • the second sub-pixel A and the second sub-pixel A have the same shape.
  • Subpixels C are not the same shape; or
  • the shape of the second sub-pixel A and the second sub-pixel C are the same, and the shapes of the second sub-pixel A, the second sub-pixel B and the second sub-pixel D are different; or
  • the shapes of the second sub-pixel A, the second sub-pixel B, the second sub-pixel C and the second sub-pixel D are different from each other.
  • the first sub-pixel is a red sub-pixel
  • the third sub-pixel is a blue sub-pixel
  • the first sub-pixel is a blue sub-pixel
  • the third sub-pixel is a blue sub-pixel is a red sub-pixel
  • the second sub-pixel is a green sub-pixel.
  • each first sub-pixel has the same area. This ensures that in any light-emitting pixel point composed of the first sub-pixel, the second sub-pixel and the third sub-pixel, the light-emitting area of the first sub-pixel is the same.
  • the areas of at least two first sub-pixels may also be different, which is not limited herein.
  • the area of each second sub-pixel is the same. This ensures that in any light-emitting pixel point composed of the first sub-pixel, the second sub-pixel and the third sub-pixel, the light-emitting area of the second sub-pixel is the same.
  • the area of at least two second sub-pixels may also be different, which is not limited herein.
  • each third sub-pixel has the same area. This ensures that in any light-emitting pixel point composed of the first sub-pixel, the second sub-pixel and the third sub-pixel, the light-emitting area of the third sub-pixel is the same.
  • the areas of at least two third sub-pixels may also be different, which is not limited herein.
  • the area of the first sub-pixel is S
  • the area of the second-color sub-pixel is f*S
  • the area of the third-color sub-pixel is g*S, where 0.5 ⁇ f ⁇ 0.8, 1 ⁇ g ⁇ 2.2, in this way, the brightness center distribution of any light-emitting pixel point composed of the first sub-pixel, the second sub-pixel and the third sub-pixel can be more uniform, and the display effect can be improved.
  • the area of the blue sub-pixel can be designed to be larger than that of the red sub-pixel and the area of the green subpixel.
  • the area of the green sub-pixel can be set to be smaller than that of the red sub-pixel.
  • the area of the green sub-pixel may also be the same as the area of the red sub-pixel, which is not limited herein.
  • the shapes of the first sub-pixels are approximately the same.
  • the shapes of at least two first sub-pixels may also be inconsistent, which is not limited herein.
  • the shapes of the second sub-pixels are approximately the same.
  • the shapes of at least two second sub-pixels may also be inconsistent, which is not limited herein.
  • the arrangement angles may be the same, or the arrangement angles may be the same.
  • the cloth angle can be rotated arbitrarily, which is not limited here.
  • the shapes of the third sub-pixels are approximately the same.
  • the shapes of at least two third sub-pixels may also be inconsistent, which is not limited herein.
  • the specific shapes, positional relationships, parallel and angular relationships of the second sub-pixel, the first sub-pixel and the third sub-pixel can be designed as needed.
  • the shape, position and relative positional relationship of each sub-pixel roughly meet the above conditions, they all belong to the display substrate provided by the embodiment of the present disclosure.
  • inconsistent shapes of the sub-pixels mentioned in the embodiments of the present disclosure refer to the inconsistent shapes of the sub-pixels, for example, one is a circle and the other is a rectangle.
  • consistent patterns of sub-pixels mentioned in the embodiments of the present disclosure refer to similar or identical shapes of sub-pixels.
  • the shape of the first subpixel, the second subpixel and the third subpixel is a polygon; or, the first subpixel, the second subpixel and the third subpixel
  • the shape of the sub-pixel is a polygon with rounded corners.
  • the shapes of the first sub-pixel, the second sub-pixel and the third sub-pixel are selected from quadrilateral, hexagonal, octagonal, quadrilateral with rounded corners, hexagonal with rounded corners, or Any of an octagon, circle, or ellipse with rounded corners.
  • the mentioned sub-pixel is located at a certain position, which refers to the position range where the sub-pixel is located, as long as the sub-pixel overlaps with the position.
  • the center of the sub-pixel can be made to overlap with the position.
  • the center of the sub-pixel can also not overlap with the position, that is, there is an offset between the two, which is not limited here.
  • the center of the sub-pixel may be the geometric center of the sub-pixel figure or the center of the light-emitting color of the sub-pixel, which is not limited herein.
  • the center of each sub-pixel is as close to the corresponding position as possible.
  • the first sub-pixels 01 and the third sub-pixels 03 are alternately arranged to form a plurality of first sub-pixel rows, and the second sub-pixels 02 form a plurality of second sub-pixel rows.
  • the first sub-pixel row and the second sub-pixel row are alternately arranged in the column direction.
  • the two first sub-pixels 01 are located on two opposite corners of the first virtual quadrilateral T
  • the two third sub-pixels 03 are located on the opposite two corners of the first virtual quadrilateral T.
  • a second sub-pixel 02 is located inside the first virtual quadrangle T. As shown in FIG.
  • the center of the second sub-pixel 02 may coincide with the center of the first virtual quadrilateral T, or may not coincide with the center of the first virtual quadrilateral T.
  • the center connecting line of the first sub-pixel 01 and the third sub-pixel 03 adjacent in the column direction is parallel to the column direction; the first sub-pixel adjacent in the row direction 01 and the center line of the third sub-pixel 03 are not parallel to the row direction, and have an included angle c1, and c1 is greater than 0° and less than 90°, that is, two sides of the first virtual quadrilateral T are parallel to the column direction, and the other two sides are parallel to the column direction.
  • the four adjacent first virtual quadrilaterals T are arranged in two columns and two rows to form a large virtual polygon (that is, the largest dashed box in Figure 2), that is, the second virtual polygon, and the first sub-pixel 01 is located in the second virtual polygon.
  • the center position of the second virtual polygon and the four corner positions of the second virtual polygon, the third sub-pixel 03 is located at the midpoint position of the side of the second virtual polygon, and the center connection line of the second sub-pixel 02 in the second virtual polygon is virtual rectangle.
  • the above pixel arrangement can make the distribution of the brightness center 04 of the light-emitting pixel points composed of the first sub-pixel 01, the second sub-pixel 02 and the third sub-pixel 03 more uniform, which can improve the display effect of the display device.
  • staggering the arrangement of the second sub-pixels 02 can increase the manufacturing margin of the metal mask; in this way, under the condition of the same aperture ratio, the mask for making the second sub-pixel 02 can be opened.
  • the distance D between (corresponding to the smallest solid line frame surrounding the second sub-pixel 02 ) increases, which improves the fabrication margin of the metal mask and achieves higher resolution.
  • the distance between the orthographic projection of the center of the first sub-pixel 01 and the center of the third sub-pixel 03 in the same first sub-pixel row on the second straight line is y, and the second straight line is parallel to the column direction , the value range of y is 1-10um, or, it can be 2-10um.
  • the interior angle a smaller than 90° of the first virtual quadrilateral T satisfies the following formula:
  • the obtuse angle a1 of the first virtual quadrilateral T may be 95°; the acute angle b1 may be 85°.
  • the shape of the second sub-pixel 02 has a length direction
  • the second sub-pixel 02 has the largest size in its length direction
  • the length direction of the second sub-pixel 02 intersects both the row direction and the column direction.
  • the dimension L' of the second sub-pixel 02 in its length direction approximately satisfies
  • the dimension M' of the second sub-pixel in its width direction substantially satisfies
  • the dimension L' of the second sub-pixel 02 in its width direction approximately satisfies
  • the dimension M' of the second sub-pixel in its length direction approximately satisfies
  • one pixel repeating unit 05 (the part included in the dotted box in FIG. 4 ) includes two third sub-pixels 03 , two first sub-pixels 01 and four second sub-pixels 02 .
  • the center lines of the first sub-pixels 01 are substantially located on the third straight line Z3, and at least some of the center lines of the third sub-pixels 03 are substantially located on the fourth line Z4.
  • the third straight line is substantially parallel to the fourth straight line.
  • the center line Z5 of the second sub-pixels 02 arranged in the first direction is parallel to the first direction
  • the second sub-pixels 02 arranged along the second direction eg, column direction
  • the center line Z6 of the two sub-pixels 02 is parallel to the second direction.
  • the center line connecting the four first sub-pixels 01 located at the edges or vertices of the second virtual polygon is approximately a virtual rectangle;
  • the line connecting the centers of the four third sub-pixels 03 at the edge or vertex position of is roughly a virtual rectangle;
  • the center line connecting the four second sub-pixels 02 located in the four first virtual quadrilaterals is roughly a virtual rectangle.
  • the first sub-pixels 01 and the third sub-pixels 03 are alternately arranged to form a plurality of first sub-pixel rows, and the second sub-pixels 02 form a plurality of second sub-pixel rows.
  • the first sub-pixel row and the second sub-pixel row are alternately arranged in the column direction.
  • the two first sub-pixels 01 are located on the two opposite corners of the first virtual quadrilateral T
  • the two third sub-pixels 03 are located on the opposite two corners of the first virtual quadrilateral T.
  • a second sub-pixel 02 is located inside the first virtual quadrangle T. As shown in FIG.
  • the center of the second sub-pixel 02 may coincide with the center of the first virtual quadrilateral T, or may not coincide with the center of the first virtual quadrilateral T.
  • the center line connecting the adjacent first sub-pixel 01 and the third sub-pixel 03 in the column direction is not parallel to the column direction, and has an included angle c2, and c2 is greater than 0° Less than 90°; the center line of the adjacent first subpixel 01 and the third subpixel 03 in the row direction is parallel to the row direction, that is, two sides of the first virtual quadrilateral T are parallel to the row direction, and the other two sides are parallel to the row direction.
  • the adjacent four first virtual quadrilaterals T are arranged in two columns and two rows to form a large virtual polygon (that is, the largest dashed box in FIG. 6 ), that is, the second virtual polygon, and the first subpixel 01 is located in the second virtual polygon.
  • the center position of the second virtual polygon and the four corner positions of the second virtual polygon, the third sub-pixel 03 is located at the midpoint position of the side of the second virtual polygon, and the center connection line of the second sub-pixel 02 in the second virtual polygon is virtual rectangle.
  • the above-mentioned pixel arrangement can make the distribution of the brightness center of the light-emitting pixel points composed of the first sub-pixel 01, the second sub-pixel 02 and the third sub-pixel 03 more uniform, which can improve the display effect of the display device.
  • the manufacturing margin of the metal mask can be increased; in this way, the mask for making the second sub-pixel 02 can be opened under the condition of the same aperture ratio. The distance between them is increased, the manufacturing margin of the metal mask is improved, and higher resolution is achieved.
  • the distance between the orthographic projections of the center of the first sub-pixel 01 and the center of the third sub-pixel 03 located in different first sub-pixel rows on the first straight line is x, and the first straight line and the row
  • the directions are parallel, and the value range of x is 1-10um, or, it can be 2-10um.
  • the interior angle a smaller than 90° of the first virtual quadrilateral T satisfies the following formula:
  • the acute angle a2 of the first virtual quadrilateral T may be 85°; the obtuse angle b2 may be 95°.
  • the shape of the second sub-pixel 02 has a length direction
  • the second sub-pixel 02 has the largest size in its length direction
  • the length direction of the second sub-pixel 02 intersects both the row direction and the column direction.
  • the dimension L' of the second sub-pixel 02 in its length direction approximately satisfies
  • the dimension M' of the second sub-pixel in its width direction substantially satisfies
  • the dimension L' of the second sub-pixel 02 in its width direction approximately satisfies
  • the dimension M' of the second sub-pixel in its length direction approximately satisfies
  • one pixel repeating unit 05 (the part included in the dotted box in FIG. 7 ) includes two third sub-pixels 03 , two first sub-pixels 01 and four second sub-pixels 02 .
  • the center lines of the first sub-pixels 01 are substantially located on the third straight line Z3, and at least some of the center lines of the third sub-pixels 03 are substantially located on the fourth line Z4.
  • the third straight line is substantially parallel to the fourth straight line.
  • the center line Z5 of the second sub-pixels 02 arranged in the first direction is parallel to the first direction
  • the second sub-pixels 02 arranged along the second direction eg, column direction
  • the center line Z6 of the two sub-pixels 02 is parallel to the second direction.
  • the center line connecting the four first sub-pixels 01 located at the edges or vertices of the second virtual polygon is approximately a virtual rectangle;
  • the line connecting the centers of the four third sub-pixels 03 at the edge or vertex position of is roughly a virtual rectangle;
  • the center line connecting the four second sub-pixels 02 located in the four first virtual quadrilaterals is roughly a virtual rectangle.
  • the first sub-pixels 01 and the third sub-pixels 03 are alternately arranged to form a plurality of first sub-pixel rows, and the second sub-pixels 02 form a plurality of second sub-pixel rows.
  • the first sub-pixel row and the second sub-pixel row are alternately arranged in the column direction.
  • the two first sub-pixels 01 are located on the two opposite corners of the first virtual quadrilateral T
  • the two third sub-pixels 03 are located on the opposite two corners of the first virtual quadrilateral T.
  • a second sub-pixel 02 is located inside the first virtual quadrangle T. As shown in FIG.
  • the center of the second sub-pixel 02 may coincide with the center of the first virtual quadrilateral T, or may not coincide with the center of the first virtual quadrilateral T.
  • the center line connecting the adjacent first sub-pixel 01 and the third sub-pixel 03 in the column direction is not parallel to the column direction, and has an included angle e1, and e1 is greater than 0° less than 90°;
  • the center line of the adjacent first sub-pixel 01 and the third sub-pixel 03 in the row direction is not parallel to the row direction, and has an included angle d1, and d1 is greater than 0° and less than 90°; that is, the first virtual quadrilateral T
  • Two of the sides are not parallel to the row direction, and the other two sides are not parallel to the column direction; specifically, e1 and d1 can range from 0° to 30°.
  • the range of e1 and d1 may be 0-20°, or the range of e1 and d1 may be 0-10°, or the range of e1 and d1 may be 0-5°, such as 1°, 2° , 3°, 4°, etc.
  • the adjacent four first virtual quadrilaterals T are arranged in two columns and two rows to form a large virtual polygon (that is, the largest dashed box in Figure 9), that is, the second virtual polygon, and the first sub-pixel 01 is located in the second virtual polygon.
  • the center position of the second virtual polygon and the four corner positions of the second virtual polygon, the third sub-pixel 03 is located at the midpoint position of the side of the second virtual polygon, and the center connection line of the second sub-pixel 02 in the second virtual polygon is virtual rectangle.
  • the above-mentioned pixel arrangement can make the distribution of the brightness center of the light-emitting pixel points composed of the first sub-pixel 01, the second sub-pixel 02 and the third sub-pixel 03 more uniform, which can improve the display effect of the display device.
  • the manufacturing margin of the metal mask can be increased; in this way, the mask for making the second sub-pixel 02 can be opened under the condition of the same aperture ratio. The distance between them is increased, the manufacturing margin of the metal mask is improved, and higher resolution is achieved.
  • the distance between the orthographic projections of the center of the first sub-pixel 01 and the center of the third sub-pixel 03 located in different first sub-pixel rows on the first straight line is x, and the first straight line and the row The direction is parallel; the distance between the orthographic projection of the center of the first subpixel 01 and the center of the third subpixel 03 in the same first subpixel row on the second straight line is y, and the second straight line is parallel to the column direction; y , the value range of x is 1-10um, or, it can be 2-10um.
  • the interior angle a smaller than 90° of the first virtual quadrilateral T satisfies the following formula:
  • the interior angle a of the first virtual quadrilateral T satisfies the following formula:
  • the acute angle a4 of the first virtual quadrilateral T where the second subpixel B is located may be 80°; the obtuse angle b4 may be 100°.
  • the angle a3 of the first virtual quadrilateral T where the second subpixel A is located may be 90°; the angle b3 may be 90°
  • one pixel repeating unit 05 (the part included in the dotted box in FIG. 10 ) includes two third subpixels 03 , two first subpixels 01 and four second subpixels 02 .
  • the center lines of the first sub-pixels 01 are substantially located on the third straight line Z3, and at least some of the center lines of the third sub-pixels 03 are substantially located on the fourth line Z4.
  • the third straight line is substantially parallel to the fourth straight line.
  • the center line Z5 of the second sub-pixels 02 arranged in the first direction is parallel to the first direction
  • the second sub-pixels 02 arranged along the second direction eg, column direction
  • the center line Z6 of the two sub-pixels 02 is parallel to the second direction.
  • the angle a5 of a first virtual quadrilateral T may be 94°; the angle b5 may be 86°.
  • the angle a6 of the other first virtual quadrilateral T may be 102°; the angle b6 may be 78°.
  • the angle a7 of the other first virtual quadrilateral T may be 78°; the angle b7 may be 102°
  • the shape of the second sub-pixel 02 has a longitudinal direction
  • the second sub-pixel 02 has the largest size in its longitudinal direction
  • the longitudinal direction of the second sub-pixel 02 intersects both the row direction and the column direction.
  • the dimension L' of the second sub-pixel in its length direction generally satisfies
  • the dimension L' of the second sub-pixel in its length direction approximately satisfies
  • the dimension L' of the second sub-pixel in its length direction approximately satisfies
  • the dimension L' of the second sub-pixel in its length direction approximately satisfies
  • reference numeral 02 refers to all the second sub-pixels, and the second sub-pixel A, the second sub-pixel B, the second sub-pixel C and the second sub-pixel D are used to distinguish a second virtual polygon different second subpixels within.
  • an embodiment of the present disclosure also provides an organic electroluminescent display panel
  • the display substrate may be any of the above-mentioned display substrates provided by the implementation of the present disclosure, and adjacent first virtual quadrilaterals share a side edge.
  • the patterns are arranged in row and column directions. That is, two adjacent display substrates share the first sub-pixel 01 and the third sub-pixel 03 located on the sides of the adjacent first virtual quadrangle, because the principle of solving the problem of the organic electroluminescent display panel is similar to that of the aforementioned display substrate.
  • the implementation of the organic electroluminescent display panel can refer to the implementation of the aforementioned pixel arrangement structure, and the repetition will not be repeated.
  • Adjacent first virtual quadrilaterals are arranged in the row and column directions in a manner of sharing sides, that is, two adjacent first virtual quadrilaterals in the row direction share one side in the column direction; A virtual quadrilateral shares one side in the row direction.
  • an embodiment of the present disclosure further provides a display device, including any of the above-mentioned organic electroluminescence display panels provided by the embodiment of the present disclosure.
  • the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a TV, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.
  • a display function such as a mobile phone, a tablet computer, a TV, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.
  • an embodiment of the present disclosure also provides a high-precision metal mask for fabricating any of the above-mentioned display substrates provided by the embodiment of the present disclosure, and has a plurality of opening areas, wherein the plurality of opening areas include the same A first opening area corresponding to the position of the first sub-pixel, or a second opening area corresponding to the position of the second sub-pixel, or a third opening area corresponding to the position of the third sub-pixel. Since the principle of the high-precision metal mask for solving the problem is similar to that of the aforementioned display substrate, the implementation of the high-precision metal mask can refer to the implementation of the aforementioned display substrate, and the repetition will not be repeated.
  • the first sub-pixel includes a multi-layer film
  • the second sub-pixel includes a multi-layer film
  • the third sub-pixel includes a multi-layer film
  • the shape of the first opening area is the same as that of the first opening area.
  • the shape and distribution of at least one film layer in the first sub-pixel are substantially the same, and the shape and distribution of the third opening area are substantially the same as the shape and distribution of at least one film layer in the third sub-pixel
  • the shape and distribution of the second opening area are substantially the same as the shape and distribution of at least one film layer in the second sub-pixel.
  • the high-precision metal mask includes a plurality of second opening regions corresponding to the positions of the second sub-pixels, and at least two of the plurality of second opening regions have different shapes or areas.
  • the shape of the second opening area used to fabricate at least one film layer in the second sub-pixel is as shown in the solid line frame 06, and the four second sub-pixels in the second virtual polygon
  • the shapes of 02 are the same, and the shapes of the second opening regions are also the same, so that the patterning process can be simplified.
  • the shape of the second opening area used to make at least one film layer in the second sub-pixel is as shown in the solid line frame 06, and the four second sub-pixels in the second virtual polygon
  • the shapes of the pixels 02 are all the same, and the shapes of the second opening regions are different, so that the process margin during vapor deposition can be increased, and the yield rate of the display panel can be improved.
  • the distance between the adjacent second opening regions is greater than or equal to the process limit distance to meet the process requirements.

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Abstract

一种显示基板及相关装置,属于显示技术领域。其中,显示基板包括多个第一子像素(01)、多个第二子像素(02)和多个第三子像素(03),在第一方向上,所述第一子像素(01)和所述第三子像素(03)交替排布形成多个第一子像素排,所述第二子像素(02)形成多个第二子像素排,所述第一子像素排和所述第二子像素排在第二方向交替排列,分布在相邻两行两列的两个第一子像素(01)和两个第三子像素(03)的中心连线为第一虚拟四边形(T),所述两个第一子像素(01)位于所述第一虚拟四边形相对的两个顶角上,所述第一虚拟四边形(T)包括非90°的内角a,所述第二子像素(02)位于所述第一虚拟四边形(T)内。能够提高显示装置的分辨率。

Description

一种显示基板及相关装置 技术领域
本公开涉及显示技术领域,尤其涉及一种显示基板、有机电致发光显示面板、高精度金属掩模板及显示装置。
背景技术
有机电致发光(Organic Light Emitting Diode,OLED)显示器件是当今平板显示器研究领域的热点之一,与液晶显示器相比,OLED显示器件具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点,目前,在平板显示领域,OLED显示器件已经开始取代传统的液晶显示屏(Liquid Crystal Display,LCD)。
OLED显示器件的结构主要包括:衬底基板,制作在衬底基板上呈矩阵排列的像素。其中,各像素一般都是通过有机材料利用蒸镀成膜技术透过高精度金属掩模板,在阵列基板上的相应的像素位置形成有机电致发光结构。
高精度金属掩模板的开口大小直接决定了子像素的尺寸,但由于高精度金属掩模板在制备工艺上存在限制,目前的显示基板很难得到高分辨率的显示器件。
发明内容
本公开要解决的技术问题是提供一种显示基板、有机电致发光显示面板、高精度金属掩模板及显示装置,能够提高显示装置的分辨率。
为解决上述技术问题,本公开的实施例提供技术方案如下:
一方面,提供一种显示基板其中,包括多个第一子像素、多个第二子像素和多个第三子像素,
在第一方向上,所述第一子像素和所述第三子像素交替排布形成多个第一子像素排,所述第二子像素形成多个第二子像素排,所述第一子像素排和所述第二子像素排在第二方向交替排列,分布在相邻两行两列的两个第一子 像素和两个第三子像素的中心连线为第一虚拟四边形,所述两个第一子像素位于所述第一虚拟四边形相对的两个顶角上,所述第一虚拟四边形包括非90°的内角a,所述第二子像素位于所述第一虚拟四边形内;
所述第一虚拟四边形内,位于不同第一子像素排的第一子像素的中心和第三子像素的中心在第一直线上的正投影之间的距离为x,第一直线与第一方向平行;位于同一第一子像素排的第一子像素的中心和第三子像素的中心在第二直线上的正投影之间的距离为y,第二直线与第二方向平行,所述第一虚拟四边形的所述非90°的内角a大致满足以下任一公式:
Figure PCTCN2020114621-appb-000001
Figure PCTCN2020114621-appb-000002
Figure PCTCN2020114621-appb-000003
Figure PCTCN2020114621-appb-000004
其中,P为第二子像素排中最相邻的两个第二子像素的中心之间的距离。
一些实施例中,x的取值范围为1-10um,y的取值范围为1-10um。
一些实施例中,所述内角a大于等于70°小于90°。
一些实施例中,第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向平行,第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向平行;或
第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向平行,第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向之间存在夹角c,所述夹角c大于0°非90°;或
第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向之间存在夹角d,第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向之间存在夹角e,所述夹角d大于0°非90°,所述夹角e大于0°非90°。
一些实施例中,所述第一方向和所述第二方向大致垂直,所述第一方向为行方向和列方向中的其中一者,所述第二方向为行方向和列方向中的另一者。
一些实施例中,所述第二子像素为矩形,
所述第二子像素的形状具有一个长度方向,所述第二子像素在其长度方向上具有最大尺寸,所述第二子像素的长度方向与第一方向和第二方向均相交,且
其中,x=0,所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000005
所述第二子像素的在其宽度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000006
或,所述第二子像素的在其宽度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000007
所述第二子像素的在其长度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000008
或者,
其中,y=0,所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000009
所述第二子像素的在其宽度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000010
或,所述第二子像素的在其宽度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000011
所述第二子像素的在其长度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000012
其中,同一所述第二子像素的所述宽度方向与长度方向大致垂直,L和M为预设值。
一些实施例中,所述第二子像素的形状具有一个长度方向,所述第二子像素在其长度方向上具有最大尺寸,所述第二子像素的长度方向与第一方向和第二方向均相交,且x大于0,y大于0,
所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000013
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000014
所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000015
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000016
所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000017
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000018
Figure PCTCN2020114621-appb-000019
所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000020
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000021
一些实施例中,排布成两列两行的四个所述第一虚拟四边形以共边的方式组成第二虚拟多边形,所述第二虚拟多边形包括四个第二子像素,五个第一子像素,四个第三子像素;
四个第二子像素分别位于四个第一虚拟四边形内,其中一个第一子像素被所述四个第二子像素包围,另四个第一子像素和四个第三子像素分别位于第二虚拟多边形的边上或顶点处,且沿所述第二虚拟多边形的边上顺时针和逆时针的顺序,位于第二虚拟多边形的边上或顶点处的所述四个第一子像素和所述四个第三子像素交替分布;
所述位于第二虚拟多边形的边或顶点位置处的四个第一子像素的中心连线大致为虚拟平行四边形,所述位于第二虚拟多边形的边或顶点位置处的四个第三子像素的中心连线大致为虚拟平行四边形,所述位于四个第一虚拟四边形内的所述四个第二子像素的中心连线大致为虚拟平行四边形。
一些实施例中,至少部分所述第一子像素的中心连线大致位于第三直线上,至少部分所述第一子像素的中心连线大致位于第四直线上,所述第三直线与所述第四直线大致平行。
一些实施例中,所述第三直线和所述第四直线与所述第一方向平行;或
所述第三直线和所述第四直线与所述第二方向平行
一些实施例中,位于同一第二像素排的至少部分所述第二子像素的中心连线大致位于第五直线上。
一些实施例中,同一所述第二虚拟多边形的四个所述第一虚拟四边形中,包括第一虚拟四边形T1和第二虚拟多边形T2,第一虚拟四边形T1的最小内角与90°的差值的绝对值小于第一虚拟四边形T2的最小内角与90°的差值的 绝对值,第一虚拟四边形T1内的第二子像素的宽长比大于第一虚拟四边形T2内的第二子像素的宽长比。
一些实施例中,
所述显示基板包括多个像素重复单元,每一像素重复单元包括位于同一所述第一虚拟四边形的两个第一子像素、两个第三子像素,还包括与所述两个第一子像素中的一个第一子像素位于同一第二虚拟多边形、且包围该第一子像素的四个第二子像素。
一些实施例中,沿所述第一方向排布的所述第二子像素的中心连线与所述第一方向平行,沿所述第二方向排布的所述第二子像素的中心连线与所述第二方向平行。
一些实施例中,沿逆时针方向,所述第一虚拟四边形内的四个第二子像素分别为第二子像素A、第二子像素B、第二子像素C和第二子像素D,
所述第二子像素A、所述第二子像素B、所述第二子像素C和所述第二子像素D的形状均相同;或
所述第二子像素A和所述第二子像素B的形状相同,所述第二子像素C和所述第二子像素D的形状相同,所述第二子像素A和所述第二子像素C的形状不相同;或
所述第二子像素A和所述第二子像素D的形状相同,所述第二子像素C和所述第二子像素B的形状相同,所述第二子像素A和所述第二子像素C的形状不相同;或
所述第二子像素A和所述第二子像素C的形状相同,所述第二子像素A、所述第二子像素B和所述第二子像素D的形状各不相同;或
所述第二子像素A、所述第二子像素B、所述第二子像素C和所述第二子像素D的形状各不相同。
一些实施例中,各所述第一子像素的面积相同,各所述第三子像素的面积相同。
一些实施例中,所述第一子像素的面积为S,所述第二颜色子像素的面积为f*S,第三颜色子像素的面积为g*S,其中,0.5≤f≤0.8,1≤g≤2.2。
一些实施例中,各所述第一子像素的形状大致一致;和/或
各所述第三子像素的形状大致一致。
一些实施例中,所述第一子像素、所述第二子像素和所述第三子像素的形状为多边形;或,所述第一子像素、所述第二子像素和所述第三子像素的形状为具有倒圆角的多边形。
一些实施例中,所述第一子像素、所述第二子像素和所述第三子像素的形状选自四边形、六边形、八边形、具有倒圆角的四边形、具有倒圆角的六边形或具有倒圆角的八边形、圆形或椭圆形中的任意一种。
一些实施例中,所述第一子像素为红色子像素,所述第三子像素为蓝色子像素;或,所述第一子像素为蓝色子像素,所述第三子像素为红色子像素;所述第二子像素为绿色子像素。
本公开实施例还提供了一种有机电致发光显示面板,包括如上所述的显示基板,其中,相邻的第一虚拟四边形以共用侧边的方式在行方向和列方向排列。
本公开实施例还提供了一种显示装置,包括如上所述的有机电致发光显示面板。
本公开实施例还提供了一种高精度金属掩模板,用于制作如上所述的显示基板,其中,包括:多个开口区域,所述多个开口区域包括与所述第一子像素的位置对应的第一开口区域、或与所述第二子像素的位置对应的第二开口区域、或与所述第三子像素的位置对应的第三开口区域。
一些实施例中,所述第一子像素包括多层膜层,所述第二子像素包括多层膜层,所述第三子像素包括多层膜层,所述第一开口区域的形状与所述第一子像素中的至少一个膜层的形状和分布大致相同,所述第三开口区域的形状与所述第三子像素中的至少一个膜层的形状和分布大致相同,
所述第二开口区域的形状和分布与所述第二子像素中的至少一个膜层的形状和分布大致相同。
一些实施例中,包括与所述第二子像素的位置对应的多个第二开口区域,且所述多个第二开口区域中至少有两个形状或面积不同。
附图说明
图1为本公开实施例的显示基板的剖面结构的示意图;
图2-图13为本公开实施例显示基板的示意图。
具体实施方式
为使本公开的实施例要解决的技术问题、技术方案和优点更加清楚,下面将结合附图及具体实施例进行详细描述。
本公开实施例提供一种显示基板、有机电致发光显示面板、高精度金属掩模板及显示装置,能够提高显示装置的分辨率。
本公开实施例提供一种显示基板,其中,包括多个第一子像素、多个第二子像素和多个第三子像素,
在第一方向上,所述第一子像素和所述第三子像素交替排布形成多个第一子像素排,所述第二子像素形成多个第二子像素排,所述第一子像素排和所述第二子像素排在第二方向交替排列,分布在相邻两行两列的两个第一子像素和两个第三子像素的中心连线为第一虚拟四边形,所述两个第一子像素位于所述第一虚拟四边形相对的两个顶角上,所述第一虚拟四边形包括非90°的内角a,所述第二子像素位于所述第一虚拟四边形内;
所述第一虚拟四边形内,位于不同第一子像素排的第一子像素的中心和第三子像素的中心在第一直线上的正投影之间的距离为x,第一直线与第一方向平行;位于同一第一子像素排的第一子像素的中心和第三子像素的中心在第二直线上的正投影之间的距离为y,第二直线与第二方向平行,所述第一虚拟四边形的所述非90°的内角a大致满足以下任一公式:
Figure PCTCN2020114621-appb-000022
Figure PCTCN2020114621-appb-000023
Figure PCTCN2020114621-appb-000024
Figure PCTCN2020114621-appb-000025
其中,P为第二子像素排中最相邻的两个第二子像素的中心之间的距离。
上面的公式是大致相等的关系,即,a的角度可以有一定偏差,例如可以 在计算结果的基础上上下5°浮动。
P为相邻两个第二子像素的中心之间的大致距离。第二子像素排中第二子像素可以是均匀分布的,即每两个相邻的第二子像素之间距离大致相等,也可以有一定偏差,例如相差小于5微米。这里的P也可以是同一子像素排中,相邻第二子像素之间间距的平均距离。此外,P与同一排中第一子像素的中心与相邻第三子像素的中心之间的距离也大致相等,例如相差小于5微米。或者为同一子像素排中,相邻的两个第一子像素的中心之间的距离一半;或者为,同一子像素排中,相邻的两个第三子像素的中心之间距离的一半。
上述方案中,本公开实施例提供的显示基板与现有的显示基板相比,在同等工艺条件下可以使第一子像素、第二子像素和第三子像素紧密排列,从而在满足最小的像素间隔的条件下提高显示装置的分辨率。并且,第二子像素交错排列,这样在开口率相同的情况下,可以使得用以制作第二子像素的精细金属掩膜板的开口之间的距离增大,提高精细金属掩膜板的制作裕度,实现更高的分辨率;另外,通过将第一子像素、第二子像素和第三子像素错开排列,可以使得亮度中心的分布更加均匀,改善显示装置的显示效果。
在一些实施例中,一个第一子像素包括一个第一有效发光区,一个第二子像素包括一个第二有效发光区,一个第三子像素包括一个第三有效发光区,一个第二有效发光区的面积<一个第一有效发光区<一个第三有效发光区。在一个显示基板上,第三子像素包括的所有第三有效发光区的总面积>第二子像素包括的所有第三有效发光区的总面积>第一子像素包括的所有第三有效发光区的总面积。在一些实施例中,各第一有效发光区、各所述第二有效发光区、各所述第三有效发光区是分隔开的。在一些实施例中,各第一有效发光区、各所述第二有效发光区、各所述第三有效发光区由像素限定层中形成的多个分隔的开口限定。在一些实施例中,各第一有效发光区由对应的第一子像素中,由在垂直衬底基板方向上,位于相对的阳极和阴极之间,并且被驱动发光的发光层限定。在一些实施例中,各第二有效发光区由对应的第二子像素中,由在垂直衬底基板方向上,位于相对的阳极和阴极之间,并且被驱动发光的发光层限定。在一些实施例中,各第三有效发光区由对应的第三子 像素中,由在垂直衬底基板方向上,位于相对的阳极和阴极之间,并且被驱动发光的发光层限定。在一些实施例中,各第一有效发光区、各第二有效发光区和各第三有效发光区由对应的发光层以及与对应的发光层有载流子(空穴或电子)传输的电极(阳极或阴极)或电极的部分限定。在一些实施例中,各第一有效发光区、各第二有效发光区和各第三有效发光区,由在衬底基板上的正投影交叠的阴极的至少部分和阳极的至少部分限定,且该阴极的至少部分和阳极的至少部分与第一绝缘层在衬底基板上的正投影不交叠,该第一绝缘层在垂直衬底基板方向上,位于阴极和阳极之间。例如该第一绝缘层包括像素限定层。在一些实施例中,各第一子像素、各第二子像素和各第三子像素分别包括第一电极,位于第一电极远离衬底基板一侧的发光层,和位于发光层远离第一电极一侧的第二电极,在垂直衬底基板方向上,在第一电极和发光层之间,和/或第二电极和发光层之间还设置有第二绝缘层,该第二绝缘层与第一电极或第二电极在衬底基板上投影交叠,并且第二绝缘层具有开口,在面向发光层的一侧第二绝缘层的开口可以暴露至少部分的第一电极或第二电极,使其与发光层或辅助发光的功能层能够接触,各第一有效发光区、各第二有效发光区和各第三有效发光区由所述第一电极或第二电极中与发光层或辅助发光的功能层接触的部分限定。在一些实施例中,所述第二绝缘层包括像素限定层。在一些实施例中,所述辅助发光的功能层可以为空穴注入层,空穴传输层,电子传输层,空穴阻挡层,电子阻挡层,电子注入层,辅助发光层,界面改善层,增透层等中的任意一层或多层。在一些实施例中,第一电极可以为阳极,第二电极可以为阴极。在一些实施例中,第一电极可以包括氧化铟锡(ITO),银(A)g的至少两层叠层,例如为ITO,Ag,ITO三层叠层。在一些实施例中,第二电极可以包括镁(Mg)、Ag、ITO、氧化铟锌(IZO)中任意一种或多种,例如为Mg和Ag的混合层或合金层。
各子像素包括发光层,各第一子像素包括位于开口内以及像素限定层上的第一颜色发光层,各第二子像素包括位于开口内以及像素限定层上的第二颜色发光层,各第三子像素包括位于开口内以及像素限定层上的第三颜色发光层。
在一些示例性实施方式中,本实施例的显示基板的制备过程可以包括以下步骤(1)至步骤(9)。在本示例性实施例中,请参考图1,以顶发射结构的柔性显示基板为例进行说明。
(1)、在玻璃载板上制备衬底基板。
在一些示例性实施方式中,衬底基板10可以为柔性衬底基板,例如包括在玻璃载板1上叠设的第一柔性材料层、第一无机材料层、半导体层、第二柔性材料层和第二无机材料层。第一柔性材料层、第二柔性材料层的材料采用聚酰亚胺(PI)、聚对苯二甲酸乙二酯(PET)或经表面处理的聚合物软膜等材料。第一无机材料层、第二无机材料层的材料采用氮化硅(SiNx)或氧化硅(SiOx)等,用于提高衬底基板的抗水氧能力,第一无机材料层、第二无机材料层也称之为阻挡(Barrier)层。半导体层的材料采用非晶硅(a-si)。在一些示例性实施方式中,以叠层结构PI1/Barrier1/a-si/PI2/Barrier2为例,其制备过程包括:先在玻璃载板1上涂布一层聚酰亚胺,固化成膜后形成第一柔性(PI1)层;随后在第一柔性层上沉积一层阻挡薄膜,形成覆盖第一柔性层的第一阻挡(Barrier1)层;然后在第一阻挡层上沉积一层非晶硅薄膜,形成覆盖第一阻挡层的非晶硅(a-si)层;然后在非晶硅层上再涂布一层聚酰亚胺,固化成膜后形成第二柔性(PI2)层;然后在第二柔性层上沉积一层阻挡薄膜,形成覆盖第二柔性层的第二阻挡(Barrier2)层,完成衬底基板10的制备。
(2)、在衬底基板上制备驱动结构层。驱动结构层包括多个驱动电路,每个驱动电路包括多个晶体管和至少一个存储电容,例如2T1C、3T1C或7T1C设计。
在一些示例性实施方式中,驱动结构层的制备过程可以参照以下说明。以第一子像素21的驱动电路的制备过程为例进行说明。
在衬底基板10上依次沉积第一绝缘薄膜和有源层薄膜,通过构图工艺对有源层薄膜进行构图,形成覆盖整个衬底基板10的第一绝缘层11,以及设置在第一绝缘层11上的有源层图案,有源层图案至少包括第一有源层。
随后,依次沉积第二绝缘薄膜和第一金属薄膜,通过构图工艺对第一金 属薄膜进行构图,形成覆盖有源层图案的第二绝缘层12,以及设置在第二绝缘层12上的第一栅金属层图案,第一栅金属层图案至少包括第一栅电极和第一电容电极。
随后,依次沉积第三绝缘薄膜和第二金属薄膜,通过构图工艺对第二金属薄膜进行构图,形成覆盖第一栅金属层的第三绝缘层13,以及设置在第三绝缘层13上的第二栅金属层图案,第二栅金属层图案至少包括第二电容电极,第二电容电极的位置与第一电容电极的位置相对应。
随后,沉积第四绝缘薄膜,通过构图工艺对第四绝缘薄膜进行构图,形成覆盖第二栅金属层的第四绝缘层14图案,第四绝缘层14上开设有至少两个第一过孔,两个第一过孔内的第四绝缘层14、第三绝缘层13和第二绝缘层12被刻蚀掉,暴露出第一有源层的表面。
随后,沉积第三金属薄膜,通过构图工艺对第三金属薄膜进行构图,在第四绝缘层14上形成源漏金属层图案,源漏金属层至少包括位于显示区域的第一源电极和第一漏电极。第一源电极和第一漏电极可以分别通过第一过孔与第一有源层连接。
显示区域的第一子像素21的驱动电路中,第一有源层、第一栅电极、第一源电极和第一漏电极可以组成第一晶体管210,第一电容电极和第二电容电极可以组成第一存储电容212。在上述制备过程中,可以同时形成第二子像素22的驱动电路以及第三颜色子像素23的驱动电路。
在一些示例性实施方式中,第一绝缘层11、第二绝缘层12、第三绝缘层13和第四绝缘层14采用硅氧化物(SiOx)、硅氮化物(SiNx)和氮氧化硅(SiON)中的任意一种或更多种,可以是单层、多层或复合层。第一绝缘层11称之为缓冲(Buffer)层,用于提高衬底基板的抗水氧能力;第二绝缘层12和第三绝缘层13称之为栅绝缘(GI,Gate Insulator)层;第四绝缘层14称之为层间绝缘(ILD,Interlayer Dielectric)层。第一金属薄膜、第二金属薄膜和第三金属薄膜采用金属材料,如银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种,或上述金属的合金材料,如铝钕合金(AlNd)或钼铌合金(MoNb),可以是单层结构,或者多层复合结构,如Ti/Al/Ti等。 有源层薄膜采用非晶态氧化铟镓锌材料(a-IGZO)、氮氧化锌(ZnON)、氧化铟锌锡(IZTO)、非晶硅(a-Si)、多晶硅(p-Si)、六噻吩、聚噻吩等一种或多种材料,即本公开适用于基于氧化物(Oxide)技术、硅技术以及有机物技术制造的晶体管。
(3)、在形成前述图案的衬底基板上形成平坦层。
在一些示例性实施方式中,在形成前述图案的衬底基板10上涂覆有机材料的平坦薄膜,形成覆盖整个衬底基板10的平坦(PLN,Planarization)层15,并通过掩膜、曝光、显影工艺,在显示区域的平坦层15上形成多个第二过孔K2。多个第二过孔K2内的平坦层15被显影掉,分别暴露出第一子像素21的驱动电路的第一晶体管210的第一漏电极的表面、第二子像素22的驱动电路的第一晶体管的第一漏电极的表面以及第三颜色子像素23的驱动电路的第一晶体管的第一漏电极的表面。
(4)、在形成前述图案的衬底基板上,形成第一电极图案。在一些示例中,第一电极为反射阳极。
在一些示例性实施方式中,在形成前述图案的衬底基板10上沉积导电薄膜,通过构图工艺对导电薄膜进行构图,形成第一电极图案。第一子像素21的第一阳极213通过第二过孔K2与第一晶体管210的第一漏电极连接,第二子像素22的第二阳极223通过第二过孔K2与第二子像素22的第一晶体管的第一漏电极连接,第三颜色子像素23的第三阳极233通过第二过孔K2与第三颜色子像素23的第一晶体管的第一漏电极连接。
在一些示例中,第一电极可以采用金属材料,如镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种,或上述金属的合金材料,如铝钕合金(AlNd)或钼铌合金(MoNb),可以是单层结构,或者多层复合结构,如Ti/Al/Ti等,或者,是金属和透明导电材料形成的堆栈结构,如ITO/Ag/ITO、Mo/AlNd/ITO等反射型材料。
(5)、在形成前述图案的衬底基板上,形成像素定义(PDL,Pixel Definition Layer)层图案。
在一些示例性实施例方式中,在形成前述图案的衬底基板10上涂覆像素 定义薄膜,通过掩膜、曝光、显影工艺,形成像素定义层图案。显示区域的像素定义层30包括多个子像素定义部302,相邻子像素定义部302之间形成有多个像素定义层开口301,多个像素定义层开口301内的像素定义层30被显影掉,分别暴露出第一子像素21的第一阳极213的至少部分表面、第二子像素22的第二阳极223的至少部分表面以及第三颜色子像素23的第三阳极233的至少部分表面。
在一些示例中,像素定义层30可以采用聚酰亚胺、亚克力或聚对苯二甲酸乙二醇酯等。
(6)、在形成前述图案的衬底基板上,形成隔垫柱(PS,Post Spacer)图案。
在一些示例性实施方式中,在形成前述图案的衬底基板10上涂覆有机材料薄膜,通过掩膜、曝光、显影工艺,形成隔垫柱34图案。隔垫柱34可以作为支撑层,配置为在蒸镀过程中支撑FMM。在一些示例中,沿着子像素的行排布方向上,相邻两个隔垫柱34之间间隔一个重复单元,例如,隔垫柱34可以位于相邻的第一子像素21和第三颜色子像素23之间。
(7)、在形成前述图案的衬底基板上,依次形成有机功能层以及第二电极。在一些示例中,第二电极为透明阴极。发光元件可以通过透明阴极从远离衬底基板10一侧出光,实现顶发射。在一些示例中,发光元件的有机功能层包括:空穴注入层、空穴传输层、发光层以及电子传输层。
在一些示例性实施方式中,在形成前述图案的衬底基板10上采用开放式掩膜版(Open Mask)依次蒸镀形成空穴注入层241和空穴传输层242,然后采用FMM依次蒸镀形成蓝色发光层236、绿色发光层216和红色发光层226,然后采用开放式掩膜版依次蒸镀形成电子传输层243、阴极244以及光耦合层245。空穴注入层241、空穴传输层242、电子传输层243以及阴极244均为多个子像素的共通层。在一些示例中,有机功能层还可以包括:位于空穴传输层和发光层之间的微腔调节层。例如,可以在形成空穴传输层之后,采用FMM依次蒸镀形成蓝色微腔调节层、蓝色发光层、绿色微腔调节层、绿色发光层、红色微腔调节层、红色发光层。
在一些示例性实施方式中,有机功能层形成在子像素区域内,实现有机功能层与阳极连接。阴极形成在像素定义层上,并与有机功能层连接。
在一些示例性实施方式中,阴极可以采用镁(Mg)、银(Ag)、铝(Al)中的任意一种或更多种,或采用上述金属中任意一种或多种制成的合金,或者采用透明导电材料,例如,氧化铟锡(ITO),或者,金属与透明导电材料的多层复合结构。
在一些示例性实施方式中,可以在阴极244远离衬底基板10的一侧形成光耦合层,光耦合层可以为多个子像素的共通层。光耦合层可以与透明阴极配合,起到增加光输出的作用。例如,光耦合层的材料可以采用半导体材料。然而,本实施例对此并不限定。
(8)、在形成前述图案的衬底基板上,形成封装层。
在一些示例性实施方式中,在形成前述图案的衬底基板10上形成封装层,封装层可以包括叠设的第一封装层41、第二封装层42和第三封装层43。第一封装层41采用无机材料,在显示区域覆盖阴极244。第二封装层42采用有机材料。第三封装层43采用无机材料,覆盖第一封装层41和第二封装层42。然而,本实施例对此并不限定。在一些示例中,封装层可以采用无机/有机/无机/有机/无机的五层结构。
一些实施例中,x的取值范围可以为1-10um,y的取值范围可以为1-10um;进一步地,x的取值范围可以为2-7um,y的取值范围可以为2-7um;或者,x的取值范围可以为2-8um,y的取值范围可以为2-8um。
一些实施例中,所述内角a大于等于70°小于90°;进一步地,所述内角a大于等于75°非90°。
一些实施例中,第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向平行,第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向平行;或
第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向平行,第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向之间存在夹角c,所述夹角c大于0°非90°;或
第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向之间存在夹角d,第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向之间存在夹角e,所述夹角d大于0°非90°,所述夹角e大于0°非90°。
进一步地,c的范围可以为0°-30°,或者,c的范围可以为0-20°,或者,c的范围可以为0-10°,或者,c的范围可以为0-5°,比如为1°、2°、3°、4°等。
一些实施例中,所述第一方向和所述第二方向大致垂直,所述第一方向为行方向和列方向中的其中一者,所述第二方向为行方向和列方向中的另一者。
一些实施例中,所述第二子像素可以为圆角矩形,圆角六边形,圆角八边形,椭圆形等任意一种轴对称图形,第二子像素的长度方向可以为其长轴方向,宽度方向为其短轴方向;
所述第二子像素的形状具有一个长度方向,所述第二子像素在其长度方向上具有最大尺寸,所述第二子像素的长度方向与第一方向和第二方向均相交,且
其中,x=0,所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000026
所述第二子像素的在其宽度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000027
或,所述第二子像素的在其宽度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000028
所述第二子像素的在其长度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000029
或者,
其中,y=0,所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000030
所述第二子像素的在其宽度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000031
或,所述第二子像素的在其宽度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000032
所述第二子像素的在其长度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000033
其中,同一所述第二子像素的所述宽度方向与长度方向大致垂直,L和M为预设值,其中,L和M的取值范围可以为8-30μm。
一些实施例中,所述第二子像素可以为圆角矩形,圆角六边形,圆角八 边形,椭圆形等任意一种轴对称图形,第二子像素的长度方向可以为其长轴方向,宽度方向为其短轴方向;
所述第二子像素的形状具有一个长度方向,所述第二子像素在其长度方向上具有最大尺寸,所述第二子像素的长度方向与第一方向和第二方向均相交,且x大于0,y大于0,
所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000034
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000035
所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000036
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000037
所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000038
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000039
所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000040
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000041
一些实施例中,排布成两列两行的四个所述第一虚拟四边形以共边的方式组成第二虚拟多边形,所述第二虚拟多边形包括四个第二子像素,五个第一子像素,四个第三子像素;
四个第二子像素分别位于四个第一虚拟四边形内,其中一个第一子像素被所述四个第二子像素包围,另四个第一子像素和四个第三子像素分别位于第二虚拟多边形的边上或顶点处,且沿所述第二虚拟多边形的边上顺时针和逆时针的顺序,位于第二虚拟多边形的边上或顶点处的所述四个第一子像素和所述四个第三子像素交替分布;
所述位于第二虚拟多边形的边或顶点位置处的四个第一子像素的中心连 线大致为虚拟平行四边形,所述位于第二虚拟多边形的边或顶点位置处的四个第三子像素的中心连线大致为虚拟平行四边形,所述位于四个第一虚拟四边形内的所述四个第二子像素的中心连线大致为虚拟平行四边形。
一些实施例中,第二虚拟多边形可以为凹六边形,其中,两个第三子像素位于其两个边上,另外两个第三子像素和四个第一子像素分别位于凹六边形的六个顶点;或者,第二虚拟多边形可以为凹八边形,四个第一子像素和四个第三子像素分别位于凹八变形的八个顶点处。
如果x=0或y=0,则位于所述位于第二虚拟多边形的边或顶点位置处的四个第一子像素的中心连线大致为虚拟矩形;位于所述位于第二虚拟多边形的边或顶点位置处的四个第三子像素的中心连线大致为虚拟矩形;位于四个第一虚拟四边形内的所述四个第二子像素的中心连线大致为虚拟矩形。
一些实施例中,至少部分所述第一子像素的中心连线大致位于第三直线上,至少部分所述第一子像素的中心连线大致位于第四直线上,所述第三直线与所述第四直线大致平行。
所述第三直线和所述第四直线与所述第一方向平行;或
所述第三直线和所述第四直线与所述第二方向平行
一些实施例中,位于同一第二像素排的至少部分所述第二子像素的中心连线大致位于第五直线上。
其中,第二虚拟多边形可以为凹多边形,或凸多边形。第一虚拟四边形以共边的方式组成第二虚拟多边形,即行方向上相邻的两个第一虚拟四边形共用一个列方向上的边;列方向上相邻的两个第一虚拟四边形共用一个行方向上的边。
一些实施例中,同一所述第二虚拟多边形的四个所述第一虚拟四边形中,包括第一虚拟四边形T1和第二虚拟多边形T2,第一虚拟四边形T1的最小内角与90°的差值的绝对值小于第一虚拟四边形T2的最小内角与90°的差值的绝对值,第一虚拟四边形T1内的第二子像素的宽长比大于第一虚拟四边形T2内的第二子像素的宽长比。
其中,第二子像素包括两个相互垂直的对称轴,第二子像素的宽长比即 为这两个对称轴上较小的尺寸与较大的尺寸的比值。
一些实施例中,
所述显示基板包括多个像素重复单元,每一像素重复单元包括位于同一所述第一虚拟四边形的两个第一子像素、两个第三子像素,还包括与所述两个第一子像素中的一个第一子像素位于同一第二虚拟多边形、且包围该第一子像素的四个第二子像素。
一些实施例中,沿所述第一方向排布的所述第二子像素的中心连线与所述第一方向平行,沿所述第二方向排布的所述第二子像素的中心连线与所述第二方向平行。
一些实施例中,沿逆时针方向,所述第一虚拟四边形内的四个第二子像素分别为第二子像素A、第二子像素B、第二子像素C和第二子像素D,
所述第二子像素A、所述第二子像素B、所述第二子像素C和所述第二子像素D的形状均相同;或
所述第二子像素A和所述第二子像素B的形状相同,所述第二子像素C和所述第二子像素D的形状相同,所述第二子像素A和所述第二子像素C的形状不相同;或
所述第二子像素A和所述第二子像素D的形状相同,所述第二子像素C和所述第二子像素B的形状相同,所述第二子像素A和所述第二子像素C的形状不相同;或
所述第二子像素A和所述第二子像素C的形状相同,所述第二子像素A、所述第二子像素B和所述第二子像素D的形状各不相同;或
所述第二子像素A、所述第二子像素B、所述第二子像素C和所述第二子像素D的形状各不相同。
可选地,在本公开实施例提供的显示基板中,第一子像素为红色子像素,第三子像素为蓝色子像素;或,第一子像素为蓝色子像素,第三子像素为红色子像素;第二子像素为绿色子像素。这样位于第一虚拟四边形内的绿色子像素可以与位于第一虚拟四边形任意相邻两个角上的红色子像素和蓝色子像素构成一个发光像素点。
可选地,在本公开实施例提供的显示基板中,各第一子像素的面积相同。从而保证在由第一子像素、第二子像素和第三子像素组成的任意发光像素点中,第一子像素的发光面积均相同。
当然,在具体实施时,在本公开实施例提供的显示基板中,也可以至少两个第一子像素的面积不相同,在此不作限定。
可选地,在本公开实施例提供的显示基板中,各第二子像素的面积相同。从而保证在由第一子像素、第二子像素和第三子像素组成的任意发光像素点中,第二子像素的发光面积均相同。
当然,在具体实施时,在本公开实施例提供的显示基板中,也可以至少两个第二子像素的面积不相同,在此不作限定。
可选地,在本公开实施例提供的显示基板中,各第三子像素的面积相同。从而保证在由第一子像素、第二子像素和第三子像素组成的任意发光像素点中,第三子像素的发光面积均相同。
当然,在具体实施时,在本公开实施例提供的显示基板中,也可以至少两个第三子像素的面积不相同,在此不作限定。
一些实施例中,所述第一子像素的面积为S,所述第二颜色子像素的面积为f*S,第三颜色子像素的面积为g*S,其中,0.5≤f≤0.8,1≤g≤2.2,这样可以使得第一子像素、第二子像素和第三子像素组成的任意发光像素点的亮度中心分布更加均匀,改善显示效果。
进一步地,由于蓝色子像素的发光效率比较低,且寿命较短,因此,可选地,在本公开实施例提供的显示基板中,可以将蓝色子像素的面积设计为大于红色子像素和绿色子像素的面积。
进一步地,在本公开实施例提供的显示基板中,由于绿色子像素的发光效率一般较高,因此绿色子像素的面积可以设置为小于红色子像素的面积。当然,在具体实施时,绿色子像素的面积也可以与红色子像素的面积相同,在此不作限定。
为了保证在制备时,对于同一种像素,掩膜图案能够一致,从而能够简化构图工艺,可选地,在本公开实施例提供的显示基板中,各所述第一子像 素的形状大致一致。
当然,在具体实施时,在本公开实施例提供的显示基板中,也可以至少两个第一子像素的形状不一致,在此不作限定。
为了保证在制备时,对于同一种像素,掩膜图案能够一致,从而能够简化构图工艺,可选地,在本公开实施例提供的显示基板中,各所述第二子像素的形状大致一致。
当然,在具体实施时,在本公开实施例提供的显示基板中,也可以至少两个第二子像素的形状不一致,在此不作限定。
并且,可选地,在本公开实施例提供的上述显示基板中,在一个第二虚拟平行四边形中,四个第二子像素图形相同或相似时,其排布角度可以相同,也可以其排布角度任意旋转,在此不做限定。
为了保证在制备时,对于同一种像素,掩膜图案能够一致,从而能够简化构图工艺,可选地,在本公开实施例提供的显示基板中,各所述第三子像素的形状大致一致。
当然,在具体实施时,在本公开实施例提供的显示基板中,也可以至少两个第三子像素的形状不一致,在此不作限定。
可选地,第二子像素、第一子像素和第三子像素的具体形状,位置关系,平行及角度关系等,可以根据需要进行设计,在实际工艺中,由于工艺条件的限制或其他因素,也可能会有一些偏差,因此各子像素的形状、位置及相对位置关系只要大致满足上述条件即可,均属于本公开实施例提供的显示基板。
需要说明的是,本公开实施例提到的子像素的图形不一致,是指子像素的形状不一致,例如一个为圆形,一个为矩形。反之,本公开实施例提到的子像素的图形一致则是指子像素的形状相似或相同,例如两个子像素的形状均为三角形,不管面积是否相等,则认为该两个子像素的形状一致。
一些实施例中,所述第一子像素、所述第二子像素和所述第三子像素的形状为多边形;或,所述第一子像素、所述第二子像素和所述第三子像素的形状为具有倒圆角的多边形。
一些实施例中,
所述第一子像素、所述第二子像素和所述第三子像素的形状选自四边形、六边形、八边形、具有倒圆角的四边形、具有倒圆角的六边形或具有倒圆角的八边形、圆形或椭圆形中的任意一种。
需要说明的是,在本公开实施例提供的显示基板中,提到的子像素位于某一位置处,是指子像素所在的位置范围,只要保证子像素与该位置有重叠即可。在具体实施时,可以使子像素的中心与该位置重叠,当然,子像素的中心也可以与该位置不重叠,即两者存在偏移,在此不作限定。并且,子像素的中心可以为子像素图形的几何中心,也可以为子像素发光颜色的中心,在此不做限定。
可选地,在本公开实施例提供的显示基板中,为了保证各子像素能够均匀分布,尽量使各子像素的中心靠近所对应的位置。
下面结合附图以及具体的实施例对本公开的技术方案进行进一步介绍。
实施例一
本实施例中,如图2所示,第一子像素01和第三子像素03交替排布形成多个第一子像素排,第二子像素02形成多个第二子像素排,所述第一子像素排和所述第二子像素排在列方向交替排列,分布在相邻两行两列的两个第一子像素01和两个第三子像素03的中心连线为第一虚拟四边形T(图2中小的虚线框),两个第一子像素01位于第一虚拟四边形T相对的两个顶角上,两个第三子像素03位于第一虚拟四边形T相对的两个顶角上,一个第二子像素02位于第一虚拟四边形T的内部。第二子像素02的中心可以与第一虚拟四边形T的中心重合,也可以与第一虚拟四边形T的中心不重合。
如图2所示,第一虚拟四边形T中,在列方向上相邻的第一子像素01和第三子像素03的中心连线与列方向平行;在行方向上相邻的第一子像素01和第三子像素03的中心连线与行方向不平行,具有夹角c1,c1大于0°小于90°,即第一虚拟四边形T的其中两条边与列方向平行,另外两条边与行方向具有夹角c1;具体地,c1的范围可以为0°-30°。进一步地,c1的范围可以为0-20°,或者,c1的范围可以为0-10°,或者,c1的范围可以为0-5°,比 如为1°、2°、3°、4°等。
相邻的四个第一虚拟四边形T排布成两列两行组成一个大的虚拟多边形(即图2中最大的虚线框),即第二虚拟多边形,第一子像素01位于第二虚拟多边形的中心位置处和第二虚拟多边形的四个顶角位置处,第三子像素03位于第二虚拟多边形的侧边中点位置处,第二虚拟多边形内第二子像素02的中心连线为虚拟矩形。
通过上述像素排布方式可以使得第一子像素01、第二子像素02和第三子像素03组成的发光像素点的亮度中心04的分布更加均匀,可以改善显示装置的显示效果。
并且如图2所示,将第二子像素02错开排布,可以增加金属掩膜板的制作裕度;这样可以在开口率相同的情况下,使制作第二子像素02的掩膜板开口(对应包围第二子像素02的最小实线框)之间的距离D增大,提高金属掩膜板的制作裕度,实现更高的分辨率。
本实施例中,位于同一第一子像素排的第一子像素01的中心和第三子像素03的中心在第二直线上的正投影之间的距离为y,第二直线与列方向平行,y的取值范围为1-10um,或者,可以为2-10um。
第一虚拟四边形T的小于90°的内角a满足以下公式:
Figure PCTCN2020114621-appb-000042
比如,P=57.9μm,y=5μm,代入公式,则锐角a=85.06°。
如图3所示,一具体示例中,第一虚拟四边形T的钝角a1可以为95°;锐角b1可以为85°。
另外,本实施例中第二子像素02的形状具有一个长度方向,第二子像素02在其长度方向上具有最大尺寸,第二子像素02的长度方向与行方向和列方向均相交。
对于第二子像素A和第二子像素C,第二子像素02的在其长度方向上的尺寸L'大致满足
Figure PCTCN2020114621-appb-000043
所述第二子像素的在其宽度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000044
例如,P=57.9μm,显示基板的像素界定层gap=19mm,L=22.08μm,M=15.63μm,y=5μm,代入公式,则L’=18.55μm,M’=19.17μm。
对于第二子像素B和第二子像素D,所述第二子像素02的在其宽度方向上的尺寸L'大致满足
Figure PCTCN2020114621-appb-000045
所述第二子像素的在其长度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000046
例如,P=57.9μm,显示基板的像素界定层gap=19mm,L=22.08μm,M=15.63μm,y=5μm,代入公式,则L’=25.62μm,M’=12.10μm。
如图4所示,本实施例中,一个像素重复单元05(图4中虚线框包括的部分)包括两个第三子像素03,两个第一子像素01和四个第二子像素02。
如图4所示,至少部分所述第一子像素01的中心连线大致位于第三直线Z3上,至少部分所述第三子像素03的中心连线大致位于第四直线Z4上,所述第三直线与所述第四直线大致平行。
所述第一方向(比如行方向)排布的所述第二子像素02的中心连线Z5与所述第一方向平行,沿所述第二方向(比如列方向)排布的所述第二子像素02的中心连线Z6与所述第二方向平行。
如图5所示,本实施例中,位于所述位于第二虚拟多边形的边或顶点位置处的四个第一子像素01的中心连线大致为虚拟矩形;位于所述位于第二虚拟多边形的边或顶点位置处的四个第三子像素03的中心连线大致为虚拟矩形;位于四个第一虚拟四边形内的所述四个第二子像素02的中心连线大致为虚拟矩形。
实施例二
本实施例中,如图6所示,第一子像素01和第三子像素03交替排布形成多个第一子像素排,第二子像素02形成多个第二子像素排,所述第一子像素排和所述第二子像素排在列方向交替排列,分布在相邻两行两列的两个第一子像素01和两个第三子像素03的中心连线为第一虚拟四边形T(图6中小的虚线框),两个第一子像素01位于第一虚拟四边形T相对的两个顶角上,两个第三子像素03位于第一虚拟四边形T相对的两个顶角上,一个第二子像素02位于第一虚拟四边形T的内部。第二子像素02的中心可以与第一虚拟 四边形T的中心重合,也可以与第一虚拟四边形T的中心不重合。
如图6所示,第一虚拟四边形T中,在列方向上相邻的第一子像素01和第三子像素03的中心连线与列方向不平行,具有夹角c2,c2大于0°小于90°;在行方向上相邻的第一子像素01和第三子像素03的中心连线与行方向平行,即第一虚拟四边形T的其中两条边与行方向平行,另外两条边与列方向具有夹角c2;具体地,c2的范围可以为0°-30°。进一步地,c2的范围可以为0-20°,或者,c2的范围可以为0-10°,或者,c2的范围可以为0-5°,比如为1°、2°、3°、4°等。
相邻的四个第一虚拟四边形T排布成两列两行组成一个大的虚拟多边形(即图6中最大的虚线框),即第二虚拟多边形,第一子像素01位于第二虚拟多边形的中心位置处和第二虚拟多边形的四个顶角位置处,第三子像素03位于第二虚拟多边形的侧边中点位置处,第二虚拟多边形内第二子像素02的中心连线为虚拟矩形。
通过上述像素排布方式可以使得第一子像素01、第二子像素02和第三子像素03组成的发光像素点的亮度中心的分布更加均匀,可以改善显示装置的显示效果。
并且如图6所示,将第二子像素02错开排布,可以增加金属掩膜板的制作裕度;这样可以在开口率相同的情况下,使制作第二子像素02的掩膜板开口之间的距离增大,提高金属掩膜板的制作裕度,实现更高的分辨率。
本实施例中,位于不同第一子像素排的第一子像素01的中心和第三子像素03的中心在第一直线上的正投影之间的距离为x,第一直线与行方向平行,x的取值范围为1-10um,或者,可以为2-10um。
第一虚拟四边形T的小于90°的内角a满足以下公式:
Figure PCTCN2020114621-appb-000047
比如,P=57.9μm,x=5μm,代入公式,则锐角a=85.06°。
如图6所示,一具体示例中,第一虚拟四边形T的锐角a2可以为85°;钝角b2可以为95°。
另外,本实施例中第二子像素02的形状具有一个长度方向,第二子像素02在其长度方向上具有最大尺寸,第二子像素02的长度方向与行方向和列方向均相交。
对于第二子像素A和第二子像素B,第二子像素02的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000048
所述第二子像素的在其宽度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000049
例如,P=57.9μm,显示基板的像素界定层gap=19mm,L=22.08μm,M=15.63μm,x=5μm,代入公式,则L’=25.62μm,M’=12.10μm。
对于第二子像素C和第二子像素D,所述第二子像素02的在其宽度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000050
所述第二子像素的在其长度方向上的尺寸M'大致满足
Figure PCTCN2020114621-appb-000051
例如,P=57.9μm,显示基板的像素界定层gap=19mm,L=22.08μm,M=15.63μm,x=5μm,代入公式,则L’=18.55μm,M’=19.17μm。
如图7所示,本实施例中,一个像素重复单元05(图7中虚线框包括的部分)包括两个第三子像素03,两个第一子像素01和四个第二子像素02。
如图7所示,至少部分所述第一子像素01的中心连线大致位于第三直线Z3上,至少部分所述第三子像素03的中心连线大致位于第四直线Z4上,所述第三直线与所述第四直线大致平行。
所述第一方向(比如行方向)排布的所述第二子像素02的中心连线Z5与所述第一方向平行,沿所述第二方向(比如列方向)排布的所述第二子像素02的中心连线Z6与所述第二方向平行。
如图8所示,本实施例中,位于所述位于第二虚拟多边形的边或顶点位置处的四个第一子像素01的中心连线大致为虚拟矩形;位于所述位于第二虚拟多边形的边或顶点位置处的四个第三子像素03的中心连线大致为虚拟矩形;位于四个第一虚拟四边形内的所述四个第二子像素02的中心连线大致为虚拟矩形。
实施例三
本实施例中,如图9所示,第一子像素01和第三子像素03交替排布形 成多个第一子像素排,第二子像素02形成多个第二子像素排,所述第一子像素排和所述第二子像素排在列方向交替排列,分布在相邻两行两列的两个第一子像素01和两个第三子像素03的中心连线为第一虚拟四边形T(图9中小的虚线框),两个第一子像素01位于第一虚拟四边形T相对的两个顶角上,两个第三子像素03位于第一虚拟四边形T相对的两个顶角上,一个第二子像素02位于第一虚拟四边形T的内部。第二子像素02的中心可以与第一虚拟四边形T的中心重合,也可以与第一虚拟四边形T的中心不重合。
如图9所示,第一虚拟四边形T中,在列方向上相邻的第一子像素01和第三子像素03的中心连线与列方向不平行,具有夹角e1,e1大于0°小于90°;在行方向上相邻的第一子像素01和第三子像素03的中心连线与行方向不平行,具有夹角d1,d1大于0°小于90°;即第一虚拟四边形T的其中两条边与行方向不平行,另外两条边与列方向不平行;具体地,e1和d1的范围可以为0°-30°。进一步地,e1和d1的范围可以为0-20°,或者,e1和d1的范围可以为0-10°,或者,e1和d1的范围可以为0-5°,比如为1°、2°、3°、4°等。
相邻的四个第一虚拟四边形T排布成两列两行组成一个大的虚拟多边形(即图9中最大的虚线框),即第二虚拟多边形,第一子像素01位于第二虚拟多边形的中心位置处和第二虚拟多边形的四个顶角位置处,第三子像素03位于第二虚拟多边形的侧边中点位置处,第二虚拟多边形内第二子像素02的中心连线为虚拟矩形。
通过上述像素排布方式可以使得第一子像素01、第二子像素02和第三子像素03组成的发光像素点的亮度中心的分布更加均匀,可以改善显示装置的显示效果。
并且如图9所示,将第二子像素02错开排布,可以增加金属掩膜板的制作裕度;这样可以在开口率相同的情况下,使制作第二子像素02的掩膜板开口之间的距离增大,提高金属掩膜板的制作裕度,实现更高的分辨率。
本实施例中,位于不同第一子像素排的第一子像素01的中心和第三子像素03的中心在第一直线上的正投影之间的距离为x,第一直线与行方向平行; 位于同一第一子像素排的第一子像素01的中心和第三子像素03的中心在第二直线上的正投影之间的距离为y,第二直线与列方向平行;y,x的取值范围为1-10um,或者,可以为2-10um。
第一虚拟四边形T的小于90°的内角a满足以下公式:
Figure PCTCN2020114621-appb-000052
比如,P=57.9μm,x=5μm,y=5μm,代入公式,则锐角a=80.12°;
P=57.9μm,x=4μm,y=8μm,代入公式,则锐角a=78.18°。
或者,第一虚拟四边形T的内角a满足以下公式:
Figure PCTCN2020114621-appb-000053
比如,P=57.9μm,x=5μm,y=5μm,代入公式,则a=90°;
P=57.9μm,x=4μm,y=8μm,代入公式,则锐角a=86.09°。
如图9所示,一具体示例中,第二子像素B所在的第一虚拟四边形T的锐角a4可以为80°;钝角b4可以为100°。第二子像素A所在的第一虚拟四边形T的角a3可以为90°;角b3可以为90°
如图10所示,本实施例中,一个像素重复单元05(图10中虚线框包括的部分)包括两个第三子像素03,两个第一子像素01和四个第二子像素02。
如图10所示,至少部分所述第一子像素01的中心连线大致位于第三直线Z3上,至少部分所述第三子像素03的中心连线大致位于第四直线Z4上,所述第三直线与所述第四直线大致平行。
所述第一方向(比如行方向)排布的所述第二子像素02的中心连线Z5与所述第一方向平行,沿所述第二方向(比如列方向)排布的所述第二子像素02的中心连线Z6与所述第二方向平行。
另一具体示例中,如图11所示,一第一虚拟四边形T的角a5可以为94°;角b5可以为86°。另一第一虚拟四边形T的角a6可以为102°;角b6可以为78°。另一第一虚拟四边形T的角a7可以为78°;角b7可以为102°
另外,本实施例中第二子像素02的形状具有一个长度方向,第二子像素02在其长度方向上具有最大尺寸,第二子像素02的长度方向与行方向和列 方向均相交。
如图11所示,对于第二子像素A,所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000054
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000055
例如,P=57.9μm,显示基板的像素界定层gap=19mm,L=22.08μm,M=15.63μm,x=5μm,y=5μm,代入公式,则L’=19.25μm,M’=18.46μm。
对于第二子像素B,所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000056
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000057
Figure PCTCN2020114621-appb-000058
例如,P=57.9μm,显示基板的像素界定层gap=19mm,L=22.08μm,M=15.63μm,x=5μm,y=5μm,代入公式,则L’=24.12μm,M’=13.6μm。
对于第二子像素C,所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000059
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000060
例如,P=57.9μm,显示基板的像素界定层gap=19mm,L=22.08μm,M=15.63μm,x=5μm,y=5μm,代入公式,则L’=30.57μm,M’=7.15μm。
对于第二子像素D,所述第二子像素的在其长度方向上的尺寸L′大致满足
Figure PCTCN2020114621-appb-000061
所述第二子像素的在其宽度方向上的尺寸M′大致满足
Figure PCTCN2020114621-appb-000062
例如,P=57.9μm,显示基板的像素界定层gap=19mm,L=22.08μm,M=15.63μm,x=5μm,y=5μm,代入公式,则L’=24.91μm,M’=12.80μm。
值得注意的是,附图标记02是指所有的第二子像素,第二子像素A、第二子像素B、第二子像素C和第二子像素D是用以区分一个第二虚拟多边形内的不同第二子像素。
基于同一公开构思,本公开实施例还提供了一种有机电致发光显示面板,该显示基板可以是本公开实施提供的上述任一种显示基板,相邻的第一虚拟四边形以共用侧边的方式在行方向和列方向排列。即相邻的两个显示基板共用位于相邻第一虚拟四边形侧边的第一子像素01和第三子像素03,由于该有机电致发光显示面板解决问题的原理与前述一种显示基板相似,因此该有机电致发光显示面板的实施可以参见前述素排布结构的实施,重复之处不再赘述。
相邻的第一虚拟四边形以共用侧边的方式在行方向和列方向排列,即行方向上相邻的两个第一虚拟四边形共用一个列方向上的边;列方向上相邻的两个第一虚拟四边形共用一个行方向上的边。
基于同一公开构思,本公开实施例还提供了一种显示装置,包括本公开实施例提供的上述任一种有机电致发光显示面板。该显示装置可以为:手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置的实施可以参见上述显示面板的实施例,重复之处不再赘述。
基于同一公开构思,本公开实施例还提供了一种高精度金属掩模板,用于制作本公开实施例提供的上述任一种显示基板,多个开口区域,所述多个开口区域包括与所述第一子像素的位置对应的第一开口区域、或与所述第二子像素的位置对应的第二开口区域、或与所述第三子像素的位置对应的第三开口区域。由于该高精度金属掩模板解决问题的原理与前述一种显示基板相似,因此该高精度金属掩模板的实施可以参见前述显示基板的实施,重复之处不再赘述。
一些实施例中,所述第一子像素包括多层膜层,所述第二子像素包括多层膜层,所述第三子像素包括多层膜层,所述第一开口区域的形状与所述第一子像素中的至少一个膜层的形状和分布大致相同,所述第三开口区域的形状与所述第三子像素中的至少一个膜层的形状和分布大致相同,
所述第二开口区域的形状和分布与所述第二子像素中的至少一个膜层的形状和分布大致相同。
一些实施例中,高精度金属掩模板包括与所述第二子像素的位置对应的多个第二开口区域,且所述多个第二开口区域中至少有两个形状或面积不同。
一具体示例中,如图12所示,用以制作第二子像素中的至少一个膜层的第二开口区域的形状如实线框06所示,第二虚拟多边形内的四个第二子像素02的形状均相同,第二开口区域的形状也均相同,这样可以简化构图工艺。
另一具体示例中,如图13所示,用以制作第二子像素中的至少一个膜层的第二开口区域的形状如实线框06所示,第二虚拟多边形内的四个第二子像素02的形状均相同,第二开口区域的形状不相同,这样可以增大蒸镀时的工艺裕度,提高显示面板的良率。
可选地,在本公开实施例提供的上述高精度金属掩模板中,相邻所述第二开口区域之间的距离大于或等于工艺极限距离,以满足工艺需求。
需要说明,本说明书中的各个实施例均采用递进的方式描述,各个实施例之间相同相似的部分互相参见即可,每个实施例重点说明的都是与其他实施例的不同之处。尤其,对于实施例而言,由于其基本相似于产品实施例,所以描述得比较简单,相关之处参见产品实施例的部分说明即可。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
可以理解,当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时,该元件可以“直接”位于另一元件“上”或“下”,或者可以存在中间元件。
在上述实施方式的描述中,具体特征、结构、材料或者特点可以在任何 的一个或多个实施例或示例中以合适的方式结合。
以上所述,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以所述权利要求的保护范围为准。

Claims (26)

  1. 一种显示基板,其特征在于,包括多个第一子像素、多个第二子像素和多个第三子像素,
    在第一方向上,所述第一子像素和所述第三子像素交替排布形成多个第一子像素排,所述第二子像素形成多个第二子像素排,所述第一子像素排和所述第二子像素排在第二方向交替排列,分布在相邻两行两列的两个第一子像素和两个第三子像素的中心连线为第一虚拟四边形,所述两个第一子像素位于所述第一虚拟四边形相对的两个顶角上,所述第一虚拟四边形包括非90°的内角a,所述第二子像素位于所述第一虚拟四边形内;
    所述第一虚拟四边形内,位于不同第一子像素排的第一子像素的中心和第三子像素的中心在第一直线上的正投影之间的距离为x,第一直线与第一方向平行;位于同一第一子像素排的第一子像素的中心和第三子像素的中心在第二直线上的正投影之间的距离为y,第二直线与第二方向平行,所述第一虚拟四边形的所述非90°的内角a大致满足以下任一公式:
    Figure PCTCN2020114621-appb-100001
    Figure PCTCN2020114621-appb-100002
    Figure PCTCN2020114621-appb-100003
    Figure PCTCN2020114621-appb-100004
    其中,P为第二子像素排中最相邻的两个第二子像素的中心之间的距离。
  2. 根据权利要求1所述的显示基板,其特征在于,x的取值范围为1-10um,y的取值范围为1-10um。
  3. 根据权利要求1所述的显示基板,其特征在于,所述内角a大于等于70°小于90°。
  4. 根据权利要求1所述的显示基板,其特征在于,
    第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向平行,第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向平行;或
    第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向平行, 第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向之间存在夹角c,所述夹角c大于0°非90°;或
    第一方向上相邻的第一子像素和第三子像素的中心连线与第一方向之间存在夹角d,第二方向上相邻的第一子像素和第三子像素的中心连线与第二方向之间存在夹角e,所述夹角d大于0°非90°,所述夹角e大于0°非90°。
  5. 根据权利要求1-4中任一项所述的显示基板,其特征在于,所述第一方向和所述第二方向大致垂直,所述第一方向为行方向和列方向中的其中一者,所述第二方向为行方向和列方向中的另一者。
  6. 根据权利要求1所述的显示基板,其特征在于,
    所述第二子像素的形状具有一个长度方向,所述第二子像素在其长度方向上具有最大尺寸,所述第二子像素的长度方向与第一方向和第二方向均相交,且
    其中,x=0,所述第二子像素的在其长度方向上的尺寸L′大致满足
    Figure PCTCN2020114621-appb-100005
    所述第二子像素的在其宽度方向上的尺寸M'大致满足
    Figure PCTCN2020114621-appb-100006
    或,所述第二子像素的在其宽度方向上的尺寸L′大致满足
    Figure PCTCN2020114621-appb-100007
    所述第二子像素的在其长度方向上的尺寸M'大致满足
    Figure PCTCN2020114621-appb-100008
    或者,
    其中,y=0,所述第二子像素的在其长度方向上的尺寸L′大致满足
    Figure PCTCN2020114621-appb-100009
    所述第二子像素的在其宽度方向上的尺寸M'大致满足
    Figure PCTCN2020114621-appb-100010
    或,所述第二子像素的在其宽度方向上的尺寸L′大致满足
    Figure PCTCN2020114621-appb-100011
    所述第二子像素的在其长度方向上的尺寸M'大致满足
    Figure PCTCN2020114621-appb-100012
    其中,同一所述第二子像素的所述宽度方向与长度方向大致垂直,L和M为预设值。
  7. 根据权利要求1所述的显示基板,其特征在于,所述第二子像素的形状具有一个长度方向,所述第二子像素在其长度方向上具有最大尺寸,所述第二子像素的长度方向与第一方向和第二方向均相交,且x大于0,y大于0,
    所述第二子像素的在其长度方向上的尺寸L′大致满足
    Figure PCTCN2020114621-appb-100013
    所述第二子像素的在其宽度方向上的尺寸M′大致满足
    Figure PCTCN2020114621-appb-100014
    所述第二子像素的在其长度方向上的尺寸L′大致满足
    Figure PCTCN2020114621-appb-100015
    所述第二子像素的在其宽度方向上的尺寸M′大致满足
    Figure PCTCN2020114621-appb-100016
    所述第二子像素的在其长度方向上的尺寸L′大致满足
    Figure PCTCN2020114621-appb-100017
    所述第二子像素的在其宽度方向上的尺寸M′大致满足
    Figure PCTCN2020114621-appb-100018
    所述第二子像素的在其长度方向上的尺寸L′大致满足
    Figure PCTCN2020114621-appb-100019
    所述第二子像素的在其宽度方向上的尺寸M′大致满足
    Figure PCTCN2020114621-appb-100020
  8. 根据权利要求1所述的显示基板,其特征在于,排布成两列两行的四个所述第一虚拟四边形以共边的方式组成第二虚拟多边形,所述第二虚拟多边形包括四个第二子像素,五个第一子像素,四个第三子像素;
    四个第二子像素分别位于四个第一虚拟四边形内,其中一个第一子像素被所述四个第二子像素包围,另四个第一子像素和四个第三子像素分别位于第二虚拟多边形的边上或顶点处,且沿所述第二虚拟多边形的边上顺时针和逆时针的顺序,位于第二虚拟多边形的边上或顶点处的所述四个第一子像素和所述四个第三子像素交替分布;
    所述位于第二虚拟多边形的边或顶点位置处的四个第一子像素的中心连线大致为虚拟平行四边形,所述位于第二虚拟多边形的边或顶点位置处的四个第三子像素的中心连线大致为虚拟平行四边形,所述位于四个第一虚拟四边形内的所述四个第二子像素的中心连线大致为虚拟平行四边形。
  9. 根据权利要求8所述的显示基板,其特征在于,至少部分所述第一子像素的中心连线大致位于第三直线上,至少部分所述第三子像素的中心连线大致位于第四直线上,所述第三直线与所述第四直线大致平行。
  10. 根据权利要求9所述的显示基板,其特征在于,所述第三直线和所 述第四直线与所述第一方向平行;或
    所述第三直线和所述第四直线与所述第二方向平行
  11. 根据权利要求9所述的显示基板,其特征在于,位于同一第二像素排的至少部分所述第二子像素的中心连线大致位于第五直线上。
  12. 根据权利要求8所述的显示基板,其特征在于,同一所述第二虚拟多边形的四个所述第一虚拟四边形中,包括第一虚拟四边形T1和第二虚拟多边形T2,第一虚拟四边形T1的最小内角与90°的差值的绝对值小于第一虚拟四边形T2的最小内角与90°的差值的绝对值,第一虚拟四边形T1内的第二子像素的宽长比大于第一虚拟四边形T2内的第二子像素的宽长比。
  13. 根据权利要求8所述的显示基板,其特征在于,所述显示基板包括多个像素重复单元,每一像素重复单元包括位于同一所述第一虚拟四边形的两个第一子像素、两个第三子像素,还包括与所述两个第一子像素中的一个第一子像素位于同一第二虚拟多边形、且包围该第一子像素的四个第二子像素。
  14. 根据权利要求1所述的显示基板,其特征在于,所述第一方向排布的所述第二子像素的中心连线与所述第一方向平行,沿所述第二方向排布的所述第二子像素的中心连线与所述第二方向平行。
  15. 根据权利要求8所述的显示基板,其特征在于,沿逆时针方向,所述第一虚拟四边形内的四个第二子像素分别为第二子像素A、第二子像素B、第二子像素C和第二子像素D,
    所述第二子像素A、所述第二子像素B、所述第二子像素C和所述第二子像素D的形状均相同;或
    所述第二子像素A和所述第二子像素B的形状相同,所述第二子像素C和所述第二子像素D的形状相同,所述第二子像素A和所述第二子像素C的形状不相同;或
    所述第二子像素A和所述第二子像素D的形状相同,所述第二子像素C和所述第二子像素B的形状相同,所述第二子像素A和所述第二子像素C的形状不相同;或
    所述第二子像素A和所述第二子像素C的形状相同,所述第二子像素A、所述第二子像素B和所述第二子像素D的形状各不相同;或
    所述第二子像素A、所述第二子像素B、所述第二子像素C和所述第二子像素D的形状各不相同。
  16. 根据权利要求1所述的显示基板,其特征在于,各所述第一子像素的面积相同,各所述第三子像素的面积相同。
  17. 根据权利要求16所述的显示基板,其特征在于,所述第一子像素的面积为S,所述第二颜色子像素的面积为f*S,第三颜色子像素的面积为g*S,其中,0.5≤f≤0.8,1≤g≤2.2。
  18. 根据权利要求1所述的显示基板,其特征在于,各所述第一子像素的形状大致一致;和/或
    各所述第三子像素的形状大致一致。
  19. 根据权利要求1所述的显示基板,其特征在于,所述第一子像素、所述第二子像素和所述第三子像素的形状为多边形;或,所述第一子像素、所述第二子像素和所述第三子像素的形状为具有倒圆角的多边形。
  20. 根据权利要求19所述的显示基板,其特征在于,所述第一子像素、所述第二子像素和所述第三子像素的形状选自四边形、六边形、八边形、具有倒圆角的四边形、具有倒圆角的六边形或具有倒圆角的八边形、圆形或椭圆形中的任意一种。
  21. 根据权利要求1所述的显示基板,其特征在于,所述第一子像素为红色子像素,所述第三子像素为蓝色子像素;或,所述第一子像素为蓝色子像素,所述第三子像素为红色子像素;所述第二子像素为绿色子像素。
  22. 一种有机电致发光显示面板,其特征在于,包括如权利要求1-21任一项所述的显示基板,其中,相邻的第一虚拟四边形以共用侧边的方式在行方向和列方向排列。
  23. 一种显示装置,其特征在于,包括如权利要求22所述的有机电致发光显示面板。
  24. 一种高精度金属掩模板,其特征在于,用于制作如权利要求1-21任 一项所述的显示基板,其中,包括:多个开口区域,所述多个开口区域包括与所述第一子像素的位置对应的第一开口区域、或与所述第二子像素的位置对应的第二开口区域、或与所述第三子像素的位置对应的第三开口区域。
  25. 根据权利要求24所述的高精度金属掩模板,其特征在于,所述第一子像素包括多层膜层,所述第二子像素包括多层膜层,所述第三子像素包括多层膜层,所述第一开口区域的形状与所述第一子像素中的至少一个膜层的形状和分布大致相同,所述第三开口区域的形状与所述第三子像素中的至少一个膜层的形状和分布大致相同,
    所述第二开口区域的形状和分布与所述第二子像素中的至少一个膜层的形状和分布大致相同。
  26. 根据权利要求25所述的高精度金属掩模板,其特征在于,包括与所述第二子像素的位置对应的多个第二开口区域,且所述多个第二开口区域中至少有两个形状或面积不同。
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