WO2022041057A1 - 触控基板及其制作方法、触控显示装置 - Google Patents

触控基板及其制作方法、触控显示装置 Download PDF

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Publication number
WO2022041057A1
WO2022041057A1 PCT/CN2020/111786 CN2020111786W WO2022041057A1 WO 2022041057 A1 WO2022041057 A1 WO 2022041057A1 CN 2020111786 W CN2020111786 W CN 2020111786W WO 2022041057 A1 WO2022041057 A1 WO 2022041057A1
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WIPO (PCT)
Prior art keywords
substrate
touch
signal
electrode
layer
Prior art date
Application number
PCT/CN2020/111786
Other languages
English (en)
French (fr)
Inventor
许邹明
尹晓峰
郭总杰
田�健
刘纯建
Original Assignee
京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 合肥鑫晟光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202080001703.XA priority Critical patent/CN114730229A/zh
Priority to US17/413,407 priority patent/US11768569B2/en
Priority to PCT/CN2020/111786 priority patent/WO2022041057A1/zh
Publication of WO2022041057A1 publication Critical patent/WO2022041057A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04111—Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate

Definitions

  • the present disclosure relates to the technical field of touch display, and in particular, to a touch substrate, a method for manufacturing the same, and a touch display device.
  • MLOC (English: Mutil-Layer On-Cell) structure, namely the multi-layer On-Cell structure, refers to the structure in which the touch substrate is embedded between the liquid crystal display panel and the polarizer, which can realize the integration of touch display .
  • the current touch substrate includes driving electrodes and sensing electrodes. During operation, a driving signal is provided to the driving electrodes, and the sensing signals on each sensing electrode are sensed at the same time, and the specific position where the touch occurs is determined according to the sensed sensing signals.
  • the purpose of the present disclosure is to provide a touch substrate, a manufacturing method thereof, and a touch display device.
  • a first aspect of the present disclosure provides a touch substrate, including: a substrate;
  • a plurality of electrode connection bridges arranged on the substrate, the plurality of electrode connection bridges are distributed in an array;
  • the signal wiring layer disposed on the side of the electrode connecting bridge facing away from the substrate, the signal wiring layer including a plurality of first signal wirings and a plurality of second signal wirings;
  • An insulating layer disposed on the side of the signal wiring layer facing away from the substrate, the insulating layer comprising a first insulating pattern corresponding to the electrode connecting bridges one-to-one, and a first insulating pattern covering the signal wiring layer.
  • the second touch electrodes are arranged across the second touch electrodes; the first signal traces are electrically connected with the first touch electrodes in a one-to-one correspondence, and the second signal traces are in a one-to-one correspondence with the second touch electrodes Electrical connection;
  • the orthographic projection of the first touch electrodes on the substrate and the orthographic projection of the electrode connecting bridge on the substrate have a first overlapping area, and the first insulating pattern covers the substrate in a one-to-one correspondence.
  • the first overlapping area; each of the second touch electrodes includes a plurality of electrode patterns arranged at intervals, and adjacent electrode patterns in the plurality of electrode patterns are electrically connected through the electrode connection bridge.
  • the touch substrate further includes:
  • a plurality of binding pins a first part of the binding pins of the plurality of binding pins is electrically connected with the first signal wiring in a one-to-one correspondence, and a second part of the binding pins is bound
  • the pins are electrically connected to the second signal wires in a one-to-one correspondence;
  • the binding pin includes a first binding pattern, a second binding pattern and a third binding pattern that are sequentially stacked along the direction away from the substrate, and the first binding pattern is the same as the electrode connecting bridge.
  • the layers are set with the same material, the second binding pattern and the corresponding electrically connected first signal wiring or the second signal wiring form an integrated structure, and the third binding pattern and the touch electrode layer are on the same layer and the same material set up.
  • the orthographic projection of the first touch electrodes on the substrate and the orthographic projection of the overlapping ends of the corresponding first signal traces on the substrate have a second overlapping area, and the second overlapping area is
  • the insulating pattern is provided with a first via structure corresponding to the second overlapping area, the first via structure includes a plurality of first vias, and the first touch electrodes pass through the corresponding first vias.
  • the plurality of first via holes in the via hole structure are electrically connected to the overlapping terminals of the corresponding first signal traces; and/or,
  • the orthographic projection of the second touch electrodes on the substrate and the orthographic projection of the overlapping ends of the corresponding second signal traces on the substrate have a third overlapping area, and the second insulating pattern is provided on the substrate.
  • the second via structure includes a plurality of second via holes, and the second touch electrodes pass through the corresponding second via structure.
  • the plurality of second via holes are electrically connected with the overlapping terminals of the corresponding second signal wires.
  • the orthographic projection of the plurality of first via holes on the substrate is located inside the orthographic projection of the overlapping ends of the first signal traces on the substrate; and/or,
  • the orthographic projections of the plurality of second via holes on the substrate are located inside the orthographic projections of the overlapping ends of the second signal traces on the substrate.
  • the touch substrate further includes:
  • a passivation layer located on a side of the touch electrode layer facing away from the substrate, the passivation layer exposing a plurality of bonding pins of the touch substrate.
  • the signal trace layer further includes: a signal isolation wire, the plurality of first signal traces are located on the first side of the signal isolation wire, and the plurality of second signal traces are located on the signal isolation wire The second side of the isolation line.
  • a second aspect of the present disclosure provides a touch display device including the above touch substrate.
  • the touch display device further includes a display panel, the display panel includes an array substrate and a color filter substrate disposed opposite to each other, and a liquid crystal layer disposed between the array substrate and the color filter substrate; the The color filter substrate is multiplexed as a base in the touch substrate.
  • the touch display device further includes a display panel, the display panel and the touch substrate are stacked and disposed, and the touch electrode layer in the touch substrate is located between the display panel and the touch substrate between the bases.
  • a third aspect of the present disclosure provides a method for fabricating a touch substrate for fabricating the above touch substrate.
  • the fabrication method includes:
  • a signal wiring layer is formed on the side of the electrode connecting bridge facing away from the substrate, and the signal wiring layer includes a plurality of first signal wirings and a plurality of second signal wirings;
  • An insulating layer is formed on the side of the signal wiring layer facing away from the substrate.
  • the insulating layer includes a first insulating pattern corresponding to the electrode connecting bridges one-to-one, and a second insulating layer covering the signal wiring layer. Insulation graphics;
  • a touch electrode layer is formed on the side of the insulating layer facing away from the substrate.
  • the touch electrode layer includes a plurality of first touch electrodes and a plurality of second touch electrodes.
  • the first touch electrodes are connected to The second touch electrodes are arranged crosswise; the first signal traces are electrically connected to the first touch electrodes in a one-to-one correspondence, and the second signal traces are electrically connected to the second touch electrodes in a one-to-one correspondence.
  • each of the second touch electrodes includes a plurality of electrode patterns arranged at intervals, and adjacent electrode patterns in the plurality of electrode patterns are electrically connected through the electrode connection bridge.
  • the manufacturing method further includes manufacturing a plurality of binding pins, and a first part of the binding pins in the multiple binding pins is electrically connected to the first signal wiring in a one-to-one correspondence, and the A second part of the binding pins is electrically connected with the second signal wiring in a one-to-one correspondence;
  • the binding pins include first binding patterns that are stacked in sequence along the direction away from the substrate , the second binding graphic and the third binding graphic;
  • the steps of making a plurality of binding pins specifically include:
  • the first binding pattern and the electrode connecting bridge are formed simultaneously;
  • the second binding pattern and the signal wiring layer of the integrated structure are simultaneously formed;
  • the third binding pattern and the touch electrode layer are simultaneously formed.
  • the step of forming an insulating layer on the side of the signal wiring layer facing away from the substrate specifically includes:
  • the orthographic projection on the substrate has a second overlapping area, the second insulating pattern is provided with a first via structure corresponding to the second overlapping area one-to-one, and the first via structure includes a plurality of first via holes, the first touch electrodes are electrically connected to the overlapping terminals of the corresponding first signal traces through the plurality of first via holes in the corresponding first via structure; the second contact
  • the orthographic projection of the control electrode on the substrate and the orthographic projection of the overlapped end of the corresponding second signal trace on the substrate have a third overlapping area, and the second insulating pattern is provided with a third overlapping area.
  • the three overlapping regions correspond to a one-to-one second via structure
  • the second via structure includes a plurality of second via holes
  • the second touch electrodes pass through a plurality of second via holes in the corresponding second via structure
  • the via hole is electrically connected to the overlapping end of the corresponding second signal wire.
  • the touch substrate further includes:
  • a passivation layer is formed on the side of the touch electrode layer facing away from the substrate, and the passivation layer exposes a plurality of bonding pins of the touch substrate.
  • the manufacturing method further includes:
  • signal isolation lines, the plurality of first signal lines and the plurality of second signal lines are simultaneously formed, and the plurality of first signal lines are located on the first side of the signal isolation lines , the plurality of second signal traces are located on the second side of the signal isolation wire.
  • FIG. 1 is a schematic diagram of fabricating an electrode connection bridge on a substrate provided by the present disclosure
  • FIG. 2 is a schematic diagram of fabricating a first insulating layer on an electrode connecting bridge provided by the present disclosure
  • FIG. 3 is a schematic diagram of fabricating a touch electrode layer on the first insulating layer provided by the present disclosure
  • FIG. 4 is a schematic diagram of fabricating a signal wiring layer on a touch electrode layer provided by the present disclosure
  • FIG. 5 is a schematic diagram of fabricating a second insulating layer on a signal wiring layer provided by the present disclosure
  • FIG. 6 is a schematic cross-sectional view along the D1D2 direction in FIG. 5;
  • FIG. 7 is a schematic diagram of a first fabrication process of the touch substrate provided by the present disclosure.
  • FIG. 8 is a schematic diagram of fabricating a signal wiring layer on an electrode connecting bridge according to an embodiment of the present disclosure
  • FIG. 9 is a schematic layout diagram of a first insulating pattern and a second insulating pattern provided by an embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of fabricating an insulating layer on a signal wiring layer according to an embodiment of the present disclosure
  • FIG. 11 is a schematic diagram of fabricating a touch electrode layer on an insulating layer according to an embodiment of the present disclosure
  • FIG. 12 is a schematic cross-sectional view along the C1C2 direction in FIG. 11;
  • FIG. 13 is a schematic diagram of a second fabrication process of the touch substrate provided by the embodiment of the present disclosure.
  • the touch substrate includes a base 10 , a plurality of electrode connecting bridges 20 disposed on the base 10 and disposed on the plurality of electrode connections.
  • the first insulating layer (including the first insulating pattern 41 ) on the side of the bridge 20 facing away from the substrate 10
  • the touch electrode layer including the first insulating pattern 41 ) on the side of the first insulating layer facing away from the substrate 10 .
  • a touch electrode 71 and a second touch electrode 72 disposed on the metal wiring layer 36 (including the first signal wiring 31 , the second signal wiring 31 and the second signal wiring) on the side of the touch electrode layer facing away from the substrate 10 line 32 , signal spacing line 33 and negative power signal line 35 ) are disposed on the second insulating layer 45 on the side of the metal wiring layer facing away from the substrate 10 .
  • the specific manufacturing method is as follows:
  • Step 1 as shown in FIG. 1 , using indium tin oxide (ITO) material, a plurality of electrode connecting bridges 20 are fabricated on the substrate 10 through a sputtering process and a photolithography process.
  • the sputtering temperature during the sputtering process is normal temperature
  • the square resistance of the formed electrode connecting bridge 20 is less than or equal to 36 ⁇ /square
  • the transmittance is greater than or equal to 80%.
  • Step 2 as shown in FIG. 2 , an organic insulating material is used to form a first insulating film on the side of the plurality of electrode connecting bridges 20 facing away from the substrate 10, and a photolithography process is performed on the first insulating film to form a first insulating film. the first insulating layer.
  • the curing temperature for the first insulating layer is less than 150°C.
  • Step 3 as shown in FIG. 3 , using ITO material, through sputtering process and photolithography process, the touch electrode layer is formed on the side of the first insulating layer facing away from the substrate 10 .
  • the sputtering temperature during the sputtering process is normal temperature
  • the square resistance of the formed touch electrode layer is required to be less than or equal to 36 ⁇ /square
  • the transmittance is greater than or equal to 80%.
  • Step 4 as shown in FIG. 4 , a metal wiring layer is formed on the side of the touch electrode layer facing away from the substrate 10 by using a metal material through a sputtering process and a photolithography process.
  • the sputtering temperature during the sputtering process is room temperature, and the square resistance of the formed metal wiring layer is required to be less than or equal to 4 ⁇ /square.
  • Step 5 an organic insulating material is used to form a second insulating film on the side of the metal wiring layer facing away from the substrate 10, and a photolithography process is performed on the second insulating film to form the The second insulating layer 45 .
  • the curing temperature of the second insulating layer 45 is less than 150°C.
  • the electrode connecting bridge process that is, the ITO1 process
  • the first insulating layer process that is, the OC1 process
  • the touch electrode layer process that is, the ITO2 process
  • the metal wiring layer process ie the MT process
  • the second insulating layer process ie the OC2 process
  • the color filter substrate of the liquid crystal display panel can be multiplexed into the substrate shown, and the structures included in the touch substrate can be fabricated directly on the color filter substrate.
  • Dep in Figure 7 represents deposition, that is, the deposition work is performed before the mask starts.
  • an embodiment of the present disclosure provides a touch substrate, including: a substrate 10 ;
  • a plurality of electrode connection bridges 20 disposed on the substrate 10, and the plurality of electrode connection bridges 20 are distributed in an array;
  • the insulating layer disposed on the side of the signal wiring layer 30 facing away from the substrate 10, the insulating layer includes a first insulating pattern 41 corresponding to the electrode connecting bridge 20 one-to-one, and covers the signal wiring. the second insulating pattern 42 of the wire layer 30;
  • the touch electrode layer disposed on the side of the insulating layer facing away from the substrate 10 includes a plurality of first touch electrodes 71 and a plurality of second touch electrodes 72 .
  • the touch electrodes 71 and the second touch electrodes 72 are arranged to intersect; the first signal traces 31 are electrically connected to the first touch electrodes 71 in a one-to-one correspondence, and the second signal traces 32 are electrically connected to the The second touch electrodes 72 are electrically connected in one-to-one correspondence; the orthographic projection of the first touch electrodes 71 on the substrate 10 and the orthographic projection of the electrode connecting bridges 20 on the substrate 10 have a first overlap
  • Each of the second touch electrodes includes a plurality of electrode patterns arranged at intervals, and the adjacent ones of the plurality of electrode patterns The electrode patterns are electrically connected through the electrode connecting bridges 20 .
  • the manufacturing method specifically includes:
  • Step 1 using ITO material, depositing an ITO film layer on the substrate 10 by a sputtering process, coating photoresist on the side of the ITO film layer facing away from the substrate 10, and applying the photoresist to the substrate 10.
  • the photoresist is exposed and developed to form a photoresist retention area and a photoresist removal area.
  • the photoresist retention area corresponds to the area where the electrode connecting bridge 20 is located, and the photoresist removal area is the same as the electrode removal area.
  • the ITO film layer located in the photoresist removal area is removed by an etching process, and the remaining photoresist is peeled off to form the plurality of electrode connection bridges distributed in an array.
  • the sputtering temperature during the sputtering process is normal temperature
  • the square resistance of the formed electrode connecting bridge 20 is less than or equal to 36 ⁇ /square
  • the transmittance is greater than or equal to 80%.
  • Step 2 as shown in FIG. 8 , a metal material layer is deposited on the side of the plurality of electrode connecting bridges 20 facing away from the substrate 10 by using a metal material, and the metal material layer is facing away from the substrate.
  • One side of 10 is coated with photoresist, and the photoresist is exposed and developed to form a photoresist retention area and a photoresist removal area, and the photoresist retention area and the area where the signal wiring layer 30 is located are formed.
  • the photoresist removal area corresponds to other areas except the area where the signal wiring layer 30 is located, and the metal material layer located in the photoresist removal area is removed by an etching process, and the remaining photoresist removal area is removed.
  • the glue is peeled off to form the signal wiring layer 30 , and the signal wiring layer 30 includes a plurality of first signal wirings 31 and a plurality of second signal wirings 32 .
  • the sputtering temperature during the sputtering process is normal temperature, and the square resistance of the formed metal wiring layer is required to be less than or equal to 4 ⁇ /square. It should be noted that the selection of the metal material should meet the requirement of having good electrical conductivity.
  • the metal material may be selected from Cu, Al, or Al alloy.
  • Step 3 as shown in FIG. 9 and FIG. 10 , an insulating film is formed on the side of the signal wiring layer 30 facing away from the substrate 10 by using an organic insulating material, and the insulating film is exposed and developed to form an insulating film.
  • the insulating layer includes a first insulating pattern 41 corresponding to the electrode connecting bridges 20 one-to-one, and a second insulating pattern 42 covering the signal wiring layer 30 .
  • the curing temperature of the insulating layer is less than 150°C.
  • Step 4 as shown in FIG. 11 , using ITO material, through a sputtering process, an ITO film layer is deposited on the side of the insulating layer facing away from the substrate 10 to form an ITO film layer, and on a side of the ITO film layer facing away from the substrate 10 .
  • the photoresist reserved area corresponds to the area where the touch electrode layer is located
  • the The photoresist removal area corresponds to other areas except the area where the touch electrode layer is located
  • the ITO film layer located in the photoresist removal area is removed by an etching process, and the remaining photoresist is peeled off to form the the touch electrode layer.
  • the sputtering temperature during the sputtering process is normal temperature
  • the square resistance of the formed electrode connecting bridge 20 is less than or equal to 36 ⁇ /square
  • the transmittance is greater than or equal to 80%.
  • the color filter substrate in the liquid crystal display panel is multiplexed as the substrate 10 of the touch substrate, and the touch The electrode connecting bridges 20 , the signal wiring layer 30 , the insulating layer and the touch electrode layer in the substrate are all formed on the color filter substrate.
  • the process temperature needs to be lower than the destruction temperature of the liquid crystal display panel, that is, the destruction temperature of the liquid crystal in the liquid crystal display panel.
  • the plurality of electrode connection bridges 20 are distributed in an array, and the plurality of electrode connection bridges 20 can be divided into a plurality of rows of electrode connection bridges 20 arranged along the first direction, and each row of electrode connection bridges 20 includes sequentially spaced intervals along the second direction.
  • a plurality of electrode connection bridges 20 are arranged; the plurality of electrode connection bridges 20 can be divided into a plurality of columns of electrode connection bridges 20 arranged along the second direction, and each column of electrode connection bridges 20 includes a sequence of electrode connection bridges 20 arranged along the first direction at intervals
  • the plurality of electrodes are connected to the bridge 20 .
  • the touch electrode layer includes a plurality of first touch electrodes 71 and a plurality of second touch electrodes 72.
  • the first touch electrodes 71 extend along a first direction
  • the second touch electrodes 72 extends in the second direction.
  • the first direction includes the Y direction
  • the second direction includes the X direction.
  • One of the first touch electrodes 71 and the second touch electrodes 72 is a driving electrode, and the other is a sensing electrode.
  • the plurality of first touch electrodes 71 are in one-to-one correspondence with the plurality of columns of electrode connection bridges 20 , and the orthographic projection of each of the first touch electrodes 71 on the substrate 10 corresponds to a column of electrode connection bridges corresponding thereto.
  • the orthographic projections of the electrode connecting bridges 20 in 20 on the substrate 10 respectively form first overlapping regions, and the first insulating patterns 41 cover the first overlapping regions in a one-to-one correspondence.
  • the first insulating pattern 41 can insulate the first touch electrodes 71 from the electrode connecting bridges 20 .
  • the second insulating pattern 42 can cover the signal wiring layer 30 .
  • the plurality of second touch electrodes 72 are in one-to-one correspondence with the plurality of rows of electrode connecting bridges 20 , each of the second touch electrodes 72 includes a plurality of electrode patterns arranged at intervals, and the plurality of electrode patterns are Arranged in the second direction, the plurality of electrode patterns are alternately arranged with the plurality of electrode connection bridges 20 in the corresponding row of electrode connection bridges 20, and the adjacent electrode patterns in the plurality of electrode patterns pass through the corresponding electrode connection bridges 20 are electrically connected, and the corresponding electrode connecting bridges 20 are located between the adjacent electrode patterns. It should be noted that, as shown in FIGS.
  • each of the electrode connecting bridges 20 includes a first end portion 201 and a second end portion 202 , and the first end portion 201 and the second end portion 202 are in the The orthographic projection on the substrate 10 does not overlap with the orthographic projection of the first insulating pattern 41 on the substrate 10, and the first end portion 201 and the second end portion 202 are used for adjacent The electrode pattern is electrically connected.
  • the first signal traces 31 are electrically connected to the first touch electrodes 71 in a one-to-one correspondence
  • the second signal traces 32 are electrically connected to the second touch electrodes 72 in a one-to-one correspondence.
  • the first touch electrodes 71 are sensing electrodes
  • the second touch electrodes 72 are driving electrodes
  • the first signal traces 31 can sense the first touch electrodes 71 .
  • the test signal is transmitted to the chip structure, and the second signal traces 32 can provide driving signals for the second touch electrodes 72 .
  • AA represents the touch area
  • B1 represents the overlap area between the touch electrodes and the overlap terminal 34
  • B2 represents the wiring area
  • B3 represents the binding area.
  • an electrode connecting bridge process ie, ITO1 fabrication
  • a signal wiring layer process ie MT process
  • insulating layer process ie OC1 process
  • touch electrode layer process ie ITO2
  • the touch substrate When fabricating the touch substrate provided by the present disclosure, only four photolithography processes are required, which effectively simplifies the fabrication process, improves the productivity, and enhances the competitiveness of the product. Moreover, since the touch electrode layer is formed after the signal wiring layer 30 is formed, the etching solution applied during the fabrication of the signal wiring layer 30 is prevented from corroding the touch electrode layer, thereby effectively improving the touch Control substrate performance and yield.
  • the electrode connecting bridges 20 are made of ITO, the bridge points can be completely invisible. Therefore, the touch substrate provided by the above embodiment has more advantages in vision than the touch substrate including metal connecting bridges.
  • the touch substrate further includes:
  • the binding pin 50 includes a first binding graphic 501, a second binding graphic 502, and a third binding graphic 503 that are stacked in sequence along the direction away from the substrate 10.
  • the first binding graphic 501 and the The electrode connecting bridge 20 is provided with the same layer and material, the second binding pattern 502 and the first signal wiring 31 or the second signal wiring 32 corresponding to electrical connection are formed into an integrated structure, and the third binding pattern 503 and the touch electrode layer are provided in the same layer and the same material.
  • the touch substrate further includes a plurality of binding pins 50.
  • the plurality of binding pins 50 are used for binding with the flexible circuit board, or for binding with the chip structure.
  • the plurality of binding pins 50 can receive the driving signals provided by the flexible circuit board and the chip structure, or can transmit the sensed signals to the flexible circuit board and the chip. structure.
  • the binding pins 50 include a first binding pattern 501 and a second binding pattern that are sequentially stacked along a direction away from the substrate 10 . 502 and a third binding graphic 503.
  • the step of making a plurality of binding pins 50 specifically includes:
  • the first binding pattern 501 and the electrode connecting bridge 20 are simultaneously formed;
  • the second binding pattern 502 and the signal wiring layer 30 of the integrated structure are simultaneously formed;
  • the third binding pattern 503 and the touch electrode layer are simultaneously formed.
  • the binding pin 50 by setting the binding pin 50 to include the first binding pattern 501, the second binding pattern 502 and the third binding pattern 503, the The binding pins 50 are formed into a structure similar to a "sandwich", which not only ensures that the binding pins 50 have good electrical conductivity, but also ensures that the binding pins 50 can be stably attached to the substrate 10 s surface.
  • the third binding pattern 503 in the binding pin 50 of the above structure is made of the same material as the touch electrode layer, and the touch electrode layer is generally made of ITO with better stability, the third binding pattern 503 is made of the same material. It has good stability, so that the surface of the binding pin 50 facing away from the substrate 10 has good stability, which ensures good electrical conductivity of the binding pin 50 .
  • binding pins 50 of the above structure can also be formed in the same patterning process as other structures in the touch substrate, which avoids adding additional fabrication processes, effectively simplifies the fabrication process of the touch substrate, and saves cost of production.
  • the orthographic projection of the first touch electrodes 71 on the substrate 10 and the corresponding overlapping ends 34 of the first signal traces 31 are in the same position.
  • the orthographic projection on the substrate 10 has a second overlapping area, and the second insulating pattern 42 is provided with a first via structure 43 corresponding to the second overlapping area.
  • the structure 43 includes a plurality of first vias 430 , and the first touch electrodes 71 pass through the plurality of first vias 430 in the corresponding first via structure 43 and the overlapping ends of the corresponding first signal traces 31 . 34 electrical connections; and/or,
  • the orthographic projection of the second touch electrodes 72 on the substrate 10 and the orthographic projection of the corresponding overlapping ends 34 of the second signal traces 32 on the substrate 10 have a third overlapping area.
  • the two insulating patterns 42 are provided with second via structures 44 corresponding to the third overlapping regions one-to-one.
  • the second via structures 44 include a plurality of second vias 440 .
  • the second touch electrodes 72 is electrically connected to the overlapping end 34 of the corresponding second signal trace 32 through the plurality of second via holes 440 in the corresponding second via structure 44 .
  • the orthographic projection of each of the first touch electrodes 71 on the substrate 10 can have the first Two overlapping regions.
  • the second insulating pattern 42 is provided with first via structures 43 corresponding to the second overlapping regions one-to-one.
  • the first via structure 43 includes a plurality of first vias, and at least part of each of the first vias is located in the second overlapping region.
  • the first touch electrodes 71 cover the plurality of first via holes in the corresponding first via structure 43 , and the first touch electrodes 71 can pass through the plurality of first via holes in the corresponding first via structure 43 .
  • the via holes are electrically connected to the overlapping ends 34 of the corresponding first signal traces 31 .
  • the orthographic projection of each of the second touch electrodes 72 on the substrate 10 can have a third overlap with the orthographic projection of the corresponding overlap end 34 of the second signal trace 32 on the substrate 10 area.
  • the second insulating pattern 42 is provided with second via structures 44 corresponding to the third overlapping regions one-to-one.
  • the second via structure 44 includes a plurality of second vias, and at least part of each of the second vias is located in the third overlapping region.
  • the second touch electrodes 72 cover the plurality of second via holes in the corresponding second via structure 44 , and the second touch electrodes 72 can pass through the plurality of second via holes in the corresponding second via structure 44 .
  • the via holes are electrically connected to the overlapping ends 34 of the corresponding second signal traces 32 .
  • the size of the first via hole and the second via hole is larger than the exposure resolution of the organic material used in the insulating layer.
  • the size of the first via hole and the second via hole is 100 ⁇ m ⁇ 100 ⁇ m.
  • the first touch electrodes 71 are arranged to be electrically connected to the overlapping terminals 34 of the corresponding first signal traces 31 through a plurality of first via holes, and the second touch electrodes 71 are arranged
  • the control electrodes 72 are electrically connected to the overlapping ends 34 of the corresponding second signal traces 32 through a plurality of second via holes, which can not only ensure good connection performance between the touch electrodes and the overlapping terminals 34 of the signal traces, but also ensure good connection performance between the touch electrodes and the overlapping terminals 34 of the signal traces.
  • the overlapping ends 34 of the signal traces are prevented from being exposed in a large area, thereby better avoiding oxidation of the overlapping terminals 34 of the signal traces, and ensuring the overlapping of the signal traces.
  • Conductivity of terminal 34 In the process of the touch substrate, the overlapping ends 34 of the signal traces are prevented from being exposed in a large area, thereby better avoiding oxidation of the overlapping terminals 34 of the signal traces, and ensuring the overlapping of the signal traces.
  • the orthographic projection of the plurality of first vias on the substrate 10 is located inside the orthographic projection of the overlapping ends 34 of the first signal traces 31 on the substrate 10; and /or, the orthographic projection of the plurality of second vias on the substrate 10 is located inside the orthographic projection of the overlapping ends 34 of the second signal traces 32 on the substrate 10 .
  • the first signal trace 31 and the second signal trace 32 may adopt a laminated metal pattern structure.
  • both the first signal trace 31 and the second signal trace 32 include molybdenum/aluminum/molybdenum stacked in sequence along the direction away from the substrate 10, since aluminum is easily used to make the insulating layer
  • the above-mentioned setting method prevents the developer from corroding metal aluminum from the sides of the overlapping ends of the signal traces, thereby ensuring the yield of the touch substrate.
  • the touch substrate further includes: a passivation layer 60 on the side of the touch electrode layer facing away from the substrate 10 , and the passivation layer 60 exposes the The plurality of binding pins 50 of the touch substrate are described.
  • the touch substrate provided by the above embodiment, by disposing the passivation layer 60 on the side of the touch electrode layer facing away from the substrate 10 , the plurality of bindings can be removed from the touch substrate. Other structures other than the pins 50 are protected, thereby better improving the yield and touch performance of the touch substrate.
  • the signal wiring layer 30 further includes: signal isolation lines 33 , and the plurality of first signal wirings 31 are located on the first side of the signal isolation lines 33 , so The plurality of second signal wires 32 are located on the second side of the signal isolation wires 33 .
  • the signal trace layer 30 further includes a signal isolation wire 33, and the signal isolation wire 33 is used to isolate the first signal trace 31 and the second signal trace 32 to avoid the first signal trace.
  • the signal transmitted on the trace 31 and the signal transmitted on the second signal trace 32 interfere with each other.
  • a stable signal with a fixed potential is applied to the signal isolation line 33 .
  • the signal isolation lines 33 are electrically connected to the corresponding binding pins 50 to receive stable electrical signals provided by the binding pins 50 .
  • a GND signal is applied to the signal isolation line 33 .
  • the first side includes the left side and the lower side of the signal isolation line 33
  • the second side includes the right side and the upper side of the signal isolation line 33 .
  • the touch substrate further includes a negative power signal line 35, and the negative power signal line 35 surrounds the touch area of the touch substrate.
  • Embodiments of the present disclosure further provide a touch display device, including the touch substrate provided by the above embodiments.
  • the electrode connecting bridge 20 , the signal wiring layer 30 , the insulating layer and the touch electrode layer are sequentially fabricated on the substrate 10 , since the insulating layer can cover the signal wiring layer 30 and the touch electrode layer It has good stability, so after finishing the fabrication of the touch electrode layer, there is no need to use a photolithography process to fabricate an insulating layer. Therefore, when fabricating the touch substrate provided by the present disclosure, only four photolithography processes are required That is, the production process is effectively simplified, the production capacity is improved, and the competitiveness of the product is enhanced.
  • the touch electrode layer is formed after the signal wiring layer 30 is formed, the etching solution applied during the fabrication of the signal wiring layer 30 is prevented from corroding the touch electrode layer, thereby effectively improving the touch Control substrate performance and yield.
  • the electrode connecting bridges 20 are made of ITO, the bridge points can be completely invisible. Therefore, the touch substrate provided by the above embodiments has more advantages in vision than the touch substrate including metal connecting bridges.
  • the touch display device provided by the embodiment of the present disclosure includes the above-mentioned touch substrate, it also has the above-mentioned beneficial effects, which will not be repeated here.
  • the touch display device may be any product or component with a display function, such as a TV, a monitor, a digital photo frame, a mobile phone, and a tablet computer.
  • the touch display device further includes a display panel, the display panel includes an array substrate and a color filter substrate disposed opposite to each other, and a liquid crystal layer disposed between the array substrate and the color filter substrate ;
  • the color filter substrate is multiplexed into the substrate 10 in the touch substrate.
  • the electrode connection bridge 20, the signal wiring layer 30, the insulating layer and the touch electrode layer included in the touch substrate are all formed on the on the color filter substrate.
  • the surface of the color filter substrate in the display panel may be cleaned first, and specifically, conventional cleaning methods such as rolling brush, disk brush, detergent spray, pure water spray and the like may be used to clean the surface of the color filter substrate in the display panel. Clean the surface of the color filter substrate to remove the dirt on the surface of the color filter substrate.
  • the touch substrate is entirely located between the color filter substrate of the display panel and the polarizer in the touch display device, so that the touch display device is formed as On-Cell structure.
  • the touch display device with the On-Cell structure can not only reduce the thickness of the touch display device, but also reduce the manufacturing process of the back-end module.
  • the touch display device further includes a display panel, the display panel and the touch substrate are stacked and disposed, and the touch electrode layer in the touch substrate is located between the display panel and the touch substrate. between the bases 10 of the control substrate.
  • the touch display device with the above structure is formed as an external structure, and the touch substrate can be pasted on the display panel by using an adhesive material.
  • Embodiments of the present disclosure further provide a method for manufacturing a touch substrate, which is used to manufacture the touch substrate provided by the above embodiments, and the manufacturing method includes:
  • a plurality of electrode connection bridges 20 are fabricated on the substrate 10, and the plurality of electrode connection bridges 20 are distributed in an array;
  • a signal wiring layer 30 is formed on the side of the electrode connecting bridge 20 facing away from the substrate 10 , and the signal wiring layer 30 includes a plurality of first signal wirings 31 and a plurality of second signal wirings 32 ;
  • the insulating layer is formed on the side of the signal wiring layer 30 facing away from the substrate 10 .
  • the insulating layer includes a first insulating pattern 41 corresponding to the electrode connecting bridges 20 one-to-one, and covers the signal wiring. the second insulating pattern 42 of the layer 30;
  • a touch electrode layer is formed on the side of the insulating layer facing away from the substrate 10 , and the touch electrode layer includes a plurality of first touch electrodes 71 and a plurality of second touch electrodes 72 .
  • the control electrodes 71 and the second touch electrodes 72 are arranged to intersect; the first signal traces 31 are electrically connected to the first touch electrodes 71 in a one-to-one correspondence, and the second signal traces 32 are electrically connected to the first touch electrodes 71 .
  • the two touch electrodes 72 are electrically connected in one-to-one correspondence; the orthographic projection of the first touch electrode 71 on the substrate 10 and the orthographic projection of the electrode connecting bridge 20 on the substrate 10 have a first overlapping area , the first insulating patterns 41 cover the first overlapping area in a one-to-one correspondence; each of the second touch electrodes 72 includes a plurality of electrode patterns arranged at intervals, and adjacent ones of the plurality of electrode patterns The electrode patterns are electrically connected through the electrode connecting bridges 20 .
  • the electrode connecting bridge process ie, ITO1 fabrication
  • the signal wiring layer fabrication process ie, the MT fabrication process
  • the insulating layer fabrication process ie, the OC1 fabrication process
  • the touch control process are sequentially performed.
  • Electrode layer process ie, made of ITO2. Since the insulating layer can cover the signal wiring layer 30, the touch electrode layer has good stability. Therefore, after the fabrication of the touch electrode layer is completed, there is no need to use a photolithography process to make an insulating layer.
  • the touch substrate is fabricated by the fabrication method provided by the embodiment of the present disclosure, only four photolithography processes are required, which effectively simplifies the fabrication process, improves the productivity, and enhances the competitiveness of the product. Moreover, since the touch electrode layer is formed after the signal wiring layer 30 is formed, the etching solution applied during the fabrication of the signal wiring layer 30 is prevented from corroding the touch electrode layer, thereby effectively improving the touch Control substrate performance and yield.
  • the electrode connection bridges 20 are made of ITO, the bridge points can be completely invisible. Therefore, the touch substrate fabricated by the fabrication method provided by the embodiment of the present disclosure is visually less visible than the touch substrate including the metal connection bridges. more advantage.
  • the fabrication method further includes fabricating a plurality of bonding pins 50 , and a first part of the bonding pins 50 among the plurality of bonding pins 50 is one-to-one with the first signal trace 31 .
  • the second part of the binding pins 50 in the binding pins 50 is electrically connected with the second signal traces 32 in a one-to-one correspondence;
  • the direction of the first binding graphics 501, the second binding graphics 502 and the third binding graphics 503 are stacked in sequence;
  • the steps of making a plurality of binding pins 50 specifically include:
  • the first binding pattern 501 and the electrode connecting bridge 20 are simultaneously formed;
  • the second binding pattern 502 and the signal wiring layer 30 of an integrated structure are simultaneously formed;
  • the third binding pattern 503 and the touch electrode layer are simultaneously formed.
  • the binding pins 50 are formed into a structure similar to a "sandwich", which not only ensures that the binding pins 50 have good electrical conductivity, but also It also ensures that the binding pins 50 can be firmly attached to the surface of the substrate 10 .
  • the third binding pattern 503 in the binding pin 50 of the above structure is made of the same material as the touch electrode layer, and the touch electrode layer is generally made of ITO with better stability, the third binding pattern 503 is made of the same material. It has good stability, so that the surface of the binding pin 50 facing away from the substrate 10 has good stability, which ensures good electrical conductivity of the binding pin 50 .
  • the binding pins 50 can be formed in the same patterning process as other structures in the touch substrate, which avoids adding additional manufacturing processes and effectively simplifies The manufacturing process of the touch substrate is improved, and the manufacturing cost is saved.
  • the step of forming an insulating layer on the side of the signal wiring layer 30 facing away from the substrate 10 specifically includes:
  • the insulating film is patterned to form the first insulating pattern 41 and the second insulating pattern 42 ; the orthographic projection of the first touch electrode 71 on the substrate 10 and the corresponding first signal trace
  • the orthographic projection of the overlapping end 34 of 31 on the substrate 10 has a second overlapping area
  • the second insulating pattern 42 is provided with a first via structure 43 corresponding to the second overlapping area one-to-one
  • the first via structure 43 includes a plurality of first vias
  • the first touch electrodes 71 pass through the plurality of first vias in the corresponding first via structure 43 and the corresponding first signal traces
  • the overlap end 34 of 31 is electrically connected;
  • the orthographic projection of the second touch electrode 72 on the substrate 10 and the orthographic projection of the overlap end 34 of the corresponding second signal trace 32 on the substrate 10 have In the third overlapping region, the second insulating pattern 42 is provided with a second via structure 44 corresponding to the third overlapping region one-to-one, and the second via structure 44 includes a pluralit
  • an organic insulating material is used to coat and form an insulating film on the side of the signal trace layer 30 facing away from the substrate 10, and the insulating film is exposed and developed to form the insulating layer. It includes a first insulating pattern 41 corresponding to the electrode connecting bridges 20 one-to-one, and a second insulating pattern 42 covering the signal wiring layer 30 .
  • the curing temperature of the insulating layer is less than 150°C.
  • the first touch electrodes 71 are electrically connected to the lap terminals 34 of the corresponding first signal traces 31 through a plurality of first via holes
  • the second The touch electrodes 72 are electrically connected to the lap terminals 34 of the corresponding second signal traces 32 through a plurality of second via holes, which can not only ensure good connection performance between the touch electrodes and the lap terminals 34 of the signal traces, but also It also prevents the overlapping ends 34 of the signal traces from being exposed in a large area during the manufacturing process of the touch substrate, thereby better avoiding oxidation of the overlapping terminals 34 of the signal traces, and ensuring the overlapping of the signal traces.
  • the electrical conductivity of the terminal 34 is not only ensure good connection performance between the touch electrodes and the lap terminals 34 of the signal traces, but also It also prevents the overlapping ends 34 of the signal traces from being exposed in a large area during the manufacturing process of the touch substrate, thereby better avoiding oxidation of the overlapping terminals 34 of the signal traces, and
  • the orthographic projection of the plurality of first vias on the substrate 10 is located inside the orthographic projection of the overlapping ends 34 of the first signal traces 31 on the substrate 10; and /or, the orthographic projection of the plurality of second vias on the substrate 10 is located inside the orthographic projection of the overlapping ends 34 of the second signal traces 32 on the substrate 10 .
  • the touch substrate further includes: forming a passivation layer 60 on a side of the touch electrode layer facing away from the substrate 10 , and the passivation layer 60 exposes many parts of the touch substrate. One is bound to pin 50.
  • the passivation layer PVX can be made of silicon oxynitride material, but not limited to this. It is worth noting that the passivation layer does not use a mask process during fabrication.
  • the touch substrate fabricated by the fabrication method provided in the above embodiment, by fabricating the passivation layer 60 on the side of the touch electrode layer facing away from the substrate 10, the touch substrate can be removed from the touch substrate.
  • Other structures other than the plurality of bonding pins 50 are used for protection, thereby better improving the yield and touch performance of the touch substrate.
  • the manufacturing method further includes:
  • the signal isolation lines 33, the plurality of first signal lines 31 and the plurality of second signal lines 32 are simultaneously formed, and the plurality of first signal lines 31 are located on the signal isolation lines On the first side of the signal isolation line 33 , the plurality of second signal traces 32 are located on the second side of the signal isolation line 33 .
  • the signal wiring layer 30 further includes a signal isolation line 33, and the signal isolation line 33 is used for isolating the first signal wiring 31 and the second signal line 31.
  • the signal trace 32 avoids mutual interference between the signal transmitted on the first signal trace 31 and the signal transmitted on the second signal trace 32 .

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Abstract

一种触控基板及其制作方法、触控显示装置，触控基板包括：沿远离基底（10）的方向依次形成的电极连接桥（20），信号走线层（30），绝缘层和触控电极层，触控电极层包括多个第一触控电极（71）和多个第二触控电极（72），第一触控电极（71）与第二触控电极（72）交叉设置。

Description

触控基板及其制作方法、触控显示装置 技术领域
本公开涉及触控显示技术领域，尤其涉及一种触控基板及其制作方法、触控显示装置。
背景技术
MLOC(英文：Mutil-Layer On-Cell)结构，即多层On-Cell结构，是指将触控基板嵌入到液晶显示面板与偏光片之间的结构，这种结构能够实现触控显示一体化。目前的触控基板包括驱动电极和感应电极，工作时，向驱动电极提供驱动信号，同时感测各感应电极上的感应信号，根据感测到的感应信号，判断触控发生的具体位置。
发明内容
本公开的目的在于提供一种触控基板及其制作方法、触控显示装置。
本公开的第一方面提供一种触控基板，包括：基底；
设置于所述基底上的多个电极连接桥，所述多个电极连接桥呈阵列分布；
设置于所述电极连接桥背向所述基底的一侧的信号走线层，所述信号走线层包括多条第一信号走线和多条第二信号走线；
设置于所述信号走线层背向所述基底的一侧的绝缘层，所述绝缘层包括与所述电极连接桥一一对应的第一绝缘图形，以及覆盖所述信号走线层的第二绝缘图形；
设置于所述绝缘层背向所述基底的一侧的触控电极层，所述触控电极层包括多个第一触控电极和多个第二触控电极，所述第一触控电极与所述第二触控电极交叉设置；所述第一信号走线与所述第一触控电极一一对应电连接，所述第二信号走线与所述第二触控电极一一对应电连接；所述第一触控电极在所述基底上的正投影与所述电极连接桥在所述基底上的正投影具有第一交叠区域，所述第一绝缘图形一一对应覆盖所述第一交叠区域；每个所述第二触控电极均包括间隔设置的多个电极图形，所述多个电极图形中相邻的电极 图形通过所述电极连接桥电连接。
可选的，所述触控基板还包括：
多个绑定引脚，所述多个绑定引脚中的第一部分绑定引脚与所述第一信号走线一一对应电连接，所述绑定引脚中的第二部分绑定引脚与所述第二信号走线一一对应电连接；
所述绑定引脚包括沿远离所述基底的方向依次层叠设置的第一绑定图形、第二绑定图形和第三绑定图形，所述第一绑定图形与所述电极连接桥同层同材料设置，所述第二绑定图形与对应电连接的第一信号走线或第二信号走线形成为一体结构，所述第三绑定图形与所述触控电极层同层同材料设置。
可选的，所述第一触控电极在所述基底上的正投影与对应的第一信号走线的搭接端在所述基底上的正投影具有第二交叠区域，所述第二绝缘图形上设置有与所述第二交叠区域一一对应的第一过孔结构，所述第一过孔结构包括多个第一过孔，所述第一触控电极通过对应的第一过孔结构中的多个第一过孔与对应的第一信号走线的搭接端电连接；和/或，
所述第二触控电极在所述基底上的正投影与对应的第二信号走线的搭接端在所述基底上的正投影具有第三交叠区域，所述第二绝缘图形上设置有与所述第三交叠区域一一对应的第二过孔结构，所述第二过孔结构包括多个第二过孔，所述第二触控电极通过对应的第二过孔结构中的多个第二过孔与对应的第二信号走线的搭接端电连接。
可选的，所述多个第一过孔在所述基底上的正投影位于所述第一信号走线的搭接端在所述基底上的正投影的内部；和/或，
所述多个第二过孔在所述基底上的正投影位于所述第二信号走线的搭接端在所述基底上的正投影的内部。
可选的，所述触控基板还包括：
位于所述触控电极层背向所述基底的一侧的钝化层，所述钝化层暴露所述触控基板的多个绑定引脚。
可选的，所述信号走线层还包括：信号隔离线，所述多条第一信号走线位于所述信号隔离线的第一侧，所述多条第二信号走线位于所述信号隔离线的第二侧。
基于上述触控基板的技术方案，本公开的第二方面提供一种触控显示装置，包括上述触控基板。
可选的，所述触控显示装置还包括显示面板，所述显示面板包括相对设置的阵列基板和彩膜基板，以及设置于所述阵列基板与所述彩膜基板之间的液晶层；所述彩膜基板复用为所述触控基板中的基底。
可选的，所述触控显示装置还包括显示面板，所述显示面板与所述触控基板层叠设置，所述触控基板中的触控电极层位于所述显示面板与所述触控基板的基底之间。
基于上述触控基板的技术方案，本公开的第三方面提供一种触控基板的制作方法，用于制作上述触控基板，所述制作方法包括：
在基底上制作多个电极连接桥，所述多个电极连接桥呈阵列分布；
在所述电极连接桥背向所述基底的一侧制作信号走线层，所述信号走线层包括多条第一信号走线和多条第二信号走线；
在所述信号走线层背向所述基底的一侧制作绝缘层，所述绝缘层包括与所述电极连接桥一一对应的第一绝缘图形，以及覆盖所述信号走线层的第二绝缘图形；
在所述绝缘层背向所述基底的一侧制作触控电极层，所述触控电极层包括多个第一触控电极和多个第二触控电极，所述第一触控电极与所述第二触控电极交叉设置；所述第一信号走线与所述第一触控电极一一对应电连接，所述第二信号走线与所述第二触控电极一一对应电连接；所述第一触控电极在所述基底上的正投影与所述电极连接桥在所述基底上的正投影具有第一交叠区域，所述第一绝缘图形一一对应覆盖所述第一交叠区域；每个所述第二触控电极均包括间隔设置的多个电极图形，所述多个电极图形中相邻的电极图形通过所述电极连接桥电连接。
可选的，所述制作方法还包括制作多个绑定引脚，所述多个绑定引脚中的第一部分绑定引脚与所述第一信号走线一一对应电连接，所述绑定引脚中的第二部分绑定引脚与所述第二信号走线一一对应电连接；所述绑定引脚包括沿远离所述基底的方向依次层叠设置的第一绑定图形、第二绑定图形和第三绑定图形；
所述制作多个绑定引脚的步骤具体包括：
通过一次构图工艺，同时形成所述第一绑定图形与所述电极连接桥；
通过一次构图工艺，同时形成一体结构的所述第二绑定图形和所述信号走线层；
通过一次构图工艺，同时形成所述第三绑定图形与所述触控电极层。
可选的，在所述信号走线层背向所述基底的一侧制作绝缘层的步骤具体包括：
在所述信号走线层背向所述基底的一侧形成绝缘薄膜；
对所述绝缘薄膜进行构图，形成所述第一绝缘图形和所述第二绝缘图形；所述第一触控电极在所述基底上的正投影与对应的第一信号走线的搭接端在所述基底上的正投影具有第二交叠区域，所述第二绝缘图形上设置有与所述第二交叠区域一一对应的第一过孔结构，所述第一过孔结构包括多个第一过孔，所述第一触控电极通过对应的第一过孔结构中的多个第一过孔与对应的第一信号走线的搭接端电连接；所述第二触控电极在所述基底上的正投影与对应的第二信号走线的搭接端在所述基底上的正投影具有第三交叠区域，所述第二绝缘图形上设置有与所述第三交叠区域一一对应的第二过孔结构，所述第二过孔结构包括多个第二过孔，所述第二触控电极通过对应的第二过孔结构中的多个第二过孔与对应的第二信号走线的搭接端电连接。
可选的，所述触控基板还包括：
在所述触控电极层背向所述基底的一侧制作钝化层，所述钝化层暴露所述触控基板的多个绑定引脚。
可选的，所述制作方法还包括：
通过一次构图工艺，同时形成信号隔离线、所述多条第一信号走线和所述多条第二信号走线，所述多条第一信号走线位于所述信号隔离线的第一侧，所述多条第二信号走线位于所述信号隔离线的第二侧。
附图说明
此处所说明的附图用来提供对本公开的进一步理解，构成本公开的一部分，本公开的示意性实施例及其说明用于解释本公开，并不构成对本公开的 不当限定。在附图中：
图1为本公开提供的在基底上制作电极连接桥的示意图；
图2为本公开提供的在电极连接桥上制作第一绝缘层的示意图；
图3为本公开提供的在第一绝缘层上制作触控电极层的示意图；
图4为本公开提供的在触控电极层上制作信号走线层的示意图；
图5为本公开提供的在信号走线层上制作第二绝缘层的示意图；
图6为图5中沿D1D2方向的截面示意图；
图7为本公开提供的触控基板的第一制作流程示意图；
图8为本公开实施例提供的在电极连接桥上制作信号走线层的示意图；
图9为本公开实施例提供的第一绝缘图形和第二绝缘图形的布局示意图；
图10为本公开实施例提供的在信号走线层上制作绝缘层的示意图；
图11为本公开实施例提供的在绝缘层制作触控电极层的示意图；
图12为图11中沿C1C2方向的截面示意图；
图13为本公开实施例提供的触控基板的第二制作流程示意图。
具体实施方式
为了进一步说明本公开实施例提供的触控基板及其制作方法、触控显示装置，下面结合说明书附图进行详细描述。
如图1～6所示，本公开提供一种触控基板，所述触控基板包括：基底10，设置于所述基底10上的多个电极连接桥20，设置于所述多个电极连接桥20背向所述基底10的一侧的第一绝缘层(包括第一绝缘图形41)，设置于所述第一绝缘层背向所述基底10的一侧的触控电极层(包括第一触控电极71和第二触控电极72)，设置于所述触控电极层背向所述基底10的一侧的金属走线层36(包括第一信号走线31、第二信号走线32、信号间隔线33和负电源信号线35)，设置于所述金属走线层背向所述基底10的一侧的第二绝缘层45。
制作上述结构的触控基板时，具体制作方法如下：
步骤一，如图1所示，采用氧化铟锡(ITO)材料，通过溅射工艺和光刻 工艺，在基底10上制作多个电极连接桥20。进行溅射工艺时的溅射温度为常温，形成的电极连接桥20的方阻小于或等于36Ω/square，透过率大于或等于80％。
步骤二，如图2所示，采用有机绝缘材料，在所述多个电极连接桥20背向所述基底10的一侧制作第一绝缘薄膜，对该第一绝缘薄膜进行光刻工艺，形成所述第一绝缘层。对所述第一绝缘层的固化温度小于150℃。
步骤三，如图3所示，采用ITO材料，通过溅射工艺和光刻工艺，在所述第一绝缘层背向所述基底10的一侧制作所述触控电极层。进行溅射工艺时的溅射温度为常温，形成的触控电极层的方阻要求小于或等于36Ω/square，透过率大于或等于80％。
步骤四，如图4所示，采用金属材料，通过溅射工艺和光刻工艺，在所述触控电极层背向所述基底10的一侧制作金属走线层。进行溅射工艺时的溅射温度为常温，形成的金属走线层的方阻要求小于或等于4Ω/square。
步骤五，如图5所示，采用有机绝缘材料，在所述金属走线层背向所述基底10的一侧制作第二绝缘薄膜，对该第二绝缘薄膜进行光刻工艺，形成所述第二绝缘层45。对所述第二绝缘层45的固化温度小于150℃。
如图7所示，在制作上述结构的触控基板时，依次进行电极连接桥制程(即ITO1制成)，第一绝缘层制程(即OC1制程)，触控电极层制程(即ITO2制成)，金属走线层制程(即M-T制程)和第二绝缘层制程(即OC2制程)。当在液晶显示面板(ODF面板)上制作触控基板时，可将液晶显示面板的彩膜基板复用为所示基底，直接在所述彩膜基板上制作触控基板包括的各结构。需要说明，图7中的Dep代表沉积，即在mask开始前，先进行沉积工作。
可见，在制作上述结构的触控基板时需要进行五次光刻工艺，即采用5张Mask，这样不仅导致了工艺流程复杂，占用产能，而且在制作金属走线层时，金属刻蚀液会腐蚀已经形成的ITO材料层，将低触控基板的良率。
请参阅图8～图12，本公开实施例提供一种触控基板，包括：基底10；
设置于所述基底10上的多个电极连接桥20，所述多个电极连接桥20呈阵列分布；
设置于所述电极连接桥20背向所述基底10的一侧的信号走线层30，所 述信号走线层30包括多条第一信号走线31和多条第二信号走线32；
设置于所述信号走线层30背向所述基底10的一侧的绝缘层，所述绝缘层包括与所述电极连接桥20一一对应的第一绝缘图形41，以及覆盖所述信号走线层30的第二绝缘图形42；
设置于所述绝缘层背向所述基底10的一侧的触控电极层，所述触控电极层包括多个第一触控电极71和多个第二触控电极72，所述第一触控电极71与所述第二触控电极72交叉设置；所述第一信号走线31与所述第一触控电极71一一对应电连接，所述第二信号走线32与所述第二触控电极72一一对应电连接；所述第一触控电极71在所述基底10上的正投影与所述电极连接桥20在所述基底10上的正投影具有第一交叠区域，所述第一绝缘图形41一一对应覆盖所述第一交叠区域；每个所述第二触控电极均包括间隔设置的多个电极图形，所述多个电极图形中相邻的电极图形通过所述电极连接桥20电连接。
制作上述结构的触控基板时，制作方法具体包括：
步骤一，如图1所示，采用ITO材料，通过溅射工艺在基底10上沉积形成ITO膜层，在该ITO膜层背向所述基底10的一侧涂覆光刻胶，对该光刻胶进行曝光、显影，形成光刻胶保留区域和光刻胶去除区域，所述光刻胶保留区域与所述电极连接桥20所在区域对应，所述光刻胶去除区域与除所述电极连接桥20所在区域之外的其它区域对应，采用刻蚀工艺将位于光刻胶去除区域的ITO膜层去除，并将剩余的光刻胶剥离，形成呈阵列分布的所述多个电极连接桥20。示例性的，进行溅射工艺时的溅射温度为常温，形成的电极连接桥20的方阻小于或等于36Ω/square，透过率大于或等于80％。
步骤二，如图8所示，采用金属材料，通过溅射工艺在所述多个电极连接桥20背向所述基底10的一侧沉积金属材料层，在该金属材料层背向所述基底10的一侧涂覆光刻胶，对该光刻胶进行曝光、显影，形成光刻胶保留区域和光刻胶去除区域，所述光刻胶保留区域与所述信号走线层30所在区域对应，所述光刻胶去除区域与除所述信号走线层30所在区域之外的其它区域对应，采用刻蚀工艺将位于光刻胶去除区域的金属材料层去除，并将剩余的光刻胶剥离，形成所述信号走线层30，所述信号走线层30包括多条第一信号 走线31和多条第二信号走线32。示例性的，进行溅射工艺时的溅射温度为常温，形成的金属走线层的方阻要求小于或等于4Ω/square。需要说明，所述金属材料的选择要满足具有良好的导电性能，示例性的，所述金属材料可选为Cu、Al或Al合金等。
步骤三，如图9和图10所示，采用有机绝缘材料，在所述信号走线层30背向所述基底10的一侧涂覆形成绝缘薄膜，对该绝缘薄膜进行曝光、显影，形成所述绝缘层，所述绝缘层包括与所述电极连接桥20一一对应的第一绝缘图形41，以及覆盖所述信号走线层30的第二绝缘图形42。示例性的，对所述绝缘层的固化温度小于150℃。
步骤四，如图11所示，采用ITO材料，通过溅射工艺在所述绝缘层背向所述基底10的一侧沉积形成ITO膜层，在该ITO膜层背向所述基底10的一侧涂覆光刻胶，对该光刻胶进行曝光、显影，形成光刻胶保留区域和光刻胶去除区域，所述光刻胶保留区域与所述触控电极层所在区域对应，所述光刻胶去除区域与除所述触控电极层所在区域之外的其它区域对应，采用刻蚀工艺将位于光刻胶去除区域的ITO膜层去除，并将剩余的光刻胶剥离，形成所述触控电极层。示例性的，进行溅射工艺时的溅射温度为常温，形成的电极连接桥20的方阻小于或等于36Ω/square，透过率大于或等于80％。
值得注意，当所述触控基板与液晶显示面板形成为On-Cell结构的触控显示装置时，液晶显示面板中的彩膜基板复用为所述触控基板的基底10，所述触控基板中的电极连接桥20、信号走线层30、绝缘层和触控电极层均形成在所述彩膜基板上。在所述触控基板的整个制程中，制程温度均需要小于对液晶显示面板的破坏温度，即对液晶显示面板中液晶的破坏温度。
所述多个电极连接桥20呈阵列分布，所述多个电极连接桥20能够划分为沿第一方向排列的多行电极连接桥20，每行电极连接桥20均包括沿第二方向依次间隔排布的多个电极连接桥20；所述多个电极连接桥20能够划分为沿第二方向排列的多列电极连接桥20，每列电极连接桥20均包括沿第一方向依次间隔排布的多个电极连接桥20。
所述触控电极层包括多个第一触控电极71和多个第二触控电极72，示例性的，所述第一触控电极71沿第一方向延伸，所述第二触控电极72沿第 二方向延伸。示例性的，所述第一方向包括Y方向，所述第二方向包括X方向。所述第一触控电极71和所述第二触控电极72中的一个为驱动电极，另一个为感应电极。
所述多个第一触控电极71与所述多列电极连接桥20一一对应，每个所述第一触控电极71在所述基底10上的正投影，与其对应的一列电极连接桥20中的各电极连接桥20在所述基底10上的正投影分别形成第一交叠区域，所述第一绝缘图形41一一对应覆盖所述第一交叠区域。所述第一绝缘图形41能够将所述第一触控电极71与所述电极连接桥20绝缘。所述第二绝缘图形42能够覆盖所述信号走线层30。
所述多个第二触控电极72与所述多行电极连接桥20一一对应，每个所述第二触控电极72均包括间隔设置的多个电极图形，所述多个电极图形沿所述第二方向排列，所述多个电极图形与对应的一行电极连接桥20中的多个电极连接桥20交替设置，所述多个电极图形中相邻的电极图形通过对应的电极连接桥20电连接，该对应的电极连接桥20位于所述相邻的电极图形之间。需要说明，如图10和图12所示，每个所述电极连接桥20均包括第一端部201和第二端部202，所述第一端部201和所述第二端部202在所述基底10上的正投影与所述第一绝缘图形41在所述基底10上的正投影均不交叠，所述第一端部201和所述第二端部202用于与相邻的电极图形电连接。
所述第一信号走线31与所述第一触控电极71一一对应电连接，所述第二信号走线32与所述第二触控电极72一一对应电连接。示例性的，所述第一触控电极71为感应电极，所述第二触控电极72为驱动电极，所述第一信号走线31能够将所述第一触控电极71感测的感测信号传输至芯片结构，所述第二信号走线32能够为所述第二触控电极72提供驱动信号。
需要说明，图12中，AA代表触控区域，B1代表触控电极与搭接端34的搭接区域，B2代表走线区域，B3代表绑定区域。
根据上述触控基板的具体结构和制作方法可知，如图13所示，在制作本公开实施例提供的触控基板时，依次进行电极连接桥制程(即ITO1制成)，信号走线层制程(即M-T制程)，绝缘层制程(即OC1制程)和触控电极层制程(即ITO2制成)。由于绝缘层能够覆盖所述信号走线层30，触控电极层 具有较好的稳定性，因此在完成触控电极层的制作后，无需再采用光刻工艺制作一层绝缘层，因此，在制作本公开提供的触控基板时，仅需要四次光刻工艺即可，有效简化了制作工艺流程，提升了产能，增强了产品的竞争力。而且，由于触控电极层是在信号走线层30形成之后形成的，避免了制作所述信号走线层30时应用的刻蚀液对所述触控电极层产生腐蚀，从而有效提升了触控基板性能和良率。
另外，当所述电极连接桥20采用ITO制作时，能够实现桥点完全不可见，因此，上述实施例提供的触控基板相比于包括金属连接桥的触控基板在视觉方面更具有优势。
如图12所示，在一些实施例中，所述触控基板还包括：
多个绑定引脚50，所述多个绑定引脚50中的第一部分绑定引脚50与所述第一信号走线31一一对应电连接，所述绑定引脚50中的第二部分绑定引脚50与所述第二信号走线32一一对应电连接；
所述绑定引脚50包括沿远离所述基底10的方向依次层叠设置的第一绑定图形501、第二绑定图形502和第三绑定图形503，所述第一绑定图形501与所述电极连接桥20同层同材料设置，所述第二绑定图形502与对应电连接的第一信号走线31或第二信号走线32形成为一体结构，所述第三绑定图形503与所述触控电极层同层同材料设置。
具体地，所述触控基板还包括多个绑定引脚50，示例性的，所述多个绑定引脚50用于与柔性电路板绑定在一起，或者用于与芯片结构绑定在一起，所述多个绑定引脚50能够接收所述柔性电路板、所述芯片结构提供的驱动信号，或者能够将感测到的感测信号传输至所述柔性电路板、所述芯片结构。
所述绑定引脚50的具体结构多种多样，示例性的，所述绑定引脚50包括沿远离所述基底10的方向依次层叠设置的第一绑定图形501、第二绑定图形502和第三绑定图形503。
示例性的，所述制作多个绑定引脚50的步骤具体包括：
通过一次构图工艺，同时形成所述第一绑定图形501与所述电极连接桥20；
通过一次构图工艺，同时形成一体结构的所述第二绑定图形502和所述 信号走线层30；
通过一次构图工艺，同时形成所述第三绑定图形503与所述触控电极层。
上述实施例提供的触控基板中，通过设置所述绑定引脚50包括所述第一绑定图形501、所述第二绑定图形502和所述第三绑定图形503，使得所述绑定引脚50形成为类似“三明治”的结构，这种结构不仅保证了所述绑定引脚50具有良好的导电性能，还保证了所述绑定引脚50能够稳固的附着在基底10的表面。
此外，由于上述结构的绑定引脚50中第三绑定图形503与触控电极层同材料制作，而触控电极层一般采用稳定性较好的ITO，使得所述第三绑定图形503具有良好的稳定性，从而使得所述绑定引脚50背向所述基底10的表面具有较好的稳定性，保证了所述绑定引脚50良好的导电性能。
另外，上述结构的绑定引脚50还能够与所述触控基板中的其它结构在同一次构图工艺中形成，避免了增加额外的制作工艺，有效简化了触控基板的制作流程，节约了制作成本。
如图9、图11和图12所示，在一些实施例中，所述第一触控电极71在所述基底10上的正投影与对应的第一信号走线31的搭接端34在所述基底10上的正投影具有第二交叠区域，所述第二绝缘图形42上设置有与所述第二交叠区域一一对应的第一过孔结构43，所述第一过孔结构43包括多个第一过孔430，所述第一触控电极71通过对应的第一过孔结构43中的多个第一过孔430与对应的第一信号走线31的搭接端34电连接；和/或，
所述第二触控电极72在所述基底10上的正投影与对应的第二信号走线32的搭接端34在所述基底10上的正投影具有第三交叠区域，所述第二绝缘图形42上设置有与所述第三交叠区域一一对应的第二过孔结构44，所述第二过孔结构44包括多个第二过孔440，所述第二触控电极72通过对应的第二过孔结构44中的多个第二过孔440与对应的第二信号走线32的搭接端34电连接。
具体地，每个所述第一触控电极71在所述基底10上的正投影，均能够与对应的第一信号走线31的搭接端34在所述基底10上的正投影具有第二交叠区域。所述第二绝缘图形42上设置有与所述第二交叠区域一一对应的第一 过孔结构43。示例性的，所述第一过孔结构43包括多个第一过孔，各所述第一过孔的至少部分位于所述第二交叠区域。所述第一触控电极71覆盖对应的第一过孔结构43中的多个第一过孔，所述第一触控电极71能够通过对应的第一过孔结构43中的多个第一过孔与对应的第一信号走线31的搭接端34电连接。
每个所述第二触控电极72在所述基底10上的正投影，均能够与对应的第二信号走线32的搭接端34在所述基底10上的正投影具有第三交叠区域。所述第二绝缘图形42上设置有与所述第三交叠区域一一对应的第二过孔结构44。示例性的，所述第二过孔结构44包括多个第二过孔，各所述第二过孔的至少部分位于所述第三交叠区域。所述第二触控电极72覆盖对应的第二过孔结构44中的多个第二过孔，所述第二触控电极72能够通过对应的第二过孔结构44中的多个第二过孔与对应的第二信号走线32的搭接端34电连接。
示例性的，所述第一过孔和所述第二过孔的大小大于绝缘层采用的有机材料的曝光解析度。示例性的，所述第一过孔和所述第二过孔的尺寸为100μm×100μm。
上述实施例提供的触控基板中，设置所述第一触控电极71通过多个第一过孔与对应的第一信号走线31的搭接端34电连接，以及设置所述第二触控电极72通过多个第二过孔与对应的第二信号走线32的搭接端34电连接，不仅能够保证触控电极与信号走线的搭接端34之间良好的连接性能，还使得在触控基板的制程中，避免信号走线的搭接端34被大面积暴露，从而更好的避免了信号走线的搭接端34被氧化，保证了所述信号走线的搭接端34的导电性能。
在一些实施例中，所述多个第一过孔在所述基底10上的正投影位于所述第一信号走线31的搭接端34在所述基底10上的正投影的内部；和/或，所述多个第二过孔在所述基底10上的正投影位于所述第二信号走线32的搭接端34在所述基底10上的正投影的内部。
具体地，所述第一信号走线31和所述第二信号走线32可采用层叠的金属图形结构。示例性的，当所述第一信号走线31和所述第二信号走线32均 包括沿远离基底10的方向依次层叠设置的钼/铝/钼时，由于铝容易被用于制作绝缘层的显影液腐蚀，上述设置方式避免了显影液从信号走线的搭接端的侧面腐蚀金属铝，从而很好的保证了所述触控基板的良率。
如图12所示，在一些实施例中，所述触控基板还包括：位于所述触控电极层背向所述基底10的一侧的钝化层60，所述钝化层60暴露所述触控基板的多个绑定引脚50。
上述实施例提供的触控基板中，通过在所述触控电极层背向所述基底10的一侧设置所述钝化层60，能够对所述触控基板上除所述多个绑定引脚50之外的其它结构进行保护，从而更好的提升了所述触控基板的良率和触控性能。
如图11所示，在一些实施例中，所述信号走线层30还包括：信号隔离线33，所述多条第一信号走线31位于所述信号隔离线33的第一侧，所述多条第二信号走线32位于所述信号隔离线33的第二侧。
具体地，所述信号走线层30还包括信号隔离线33，所述信号隔离线33用于隔离所述第一信号走线31和所述第二信号走线32，避免所述第一信号走线31上传输的信号与所述第二信号走线32上传输的信号之间相互干扰。
值得注意，所述信号隔离线33上施加有具有固定电位的稳定信号。示例性的，所述信号隔离线33与相应的绑定引脚50电连接，接收由绑定引脚50提供的稳定电信号。示例性的，所述信号隔离线33上施加有GND信号。
示例性的，所述第一侧包括所述信号隔离线33的左侧和下侧，所述第二侧包括所述信号隔离线33的右侧和上侧。
在一些实施例中，所述触控基板还包括负电源信号线35，所述负电源信号线35围绕所述触控基板的触控区域。
本公开实施例还提供了一种触控显示装置，包括上述实施例提供的触控基板。
由于上述触控基板中，在基底10上依次制作了电极连接桥20、信号走线层30、绝缘层和触控电极层，由于绝缘层能够覆盖所述信号走线层30，触控电极层具有较好的稳定性，因此在完成触控电极层的制作后，无需再采用光刻工艺制作一层绝缘层，因此，在制作本公开提供的触控基板时，仅需要 四次光刻工艺即可，有效简化了制作工艺流程，提升了产能，增强了产品的竞争力。而且，由于触控电极层是在信号走线层30形成之后形成的，避免了制作所述信号走线层30时应用的刻蚀液对所述触控电极层产生腐蚀，从而有效提升了触控基板性能和良率。另外，当所述电极连接桥20采用ITO制作时，能够实现桥点完全不可见，因此，上述实施例提供的触控基板相比于包括金属连接桥的触控基板在视觉方面更具有优势。
因此，本公开实施例提供的触控显示装置在包括上述触控基板时，同样具有上述有益效果，此处不再赘述。
需要说明的是，所述触控显示装置可以为：电视、显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
在一些实施例中，所述触控显示装置还包括显示面板，所述显示面板包括相对设置的阵列基板和彩膜基板，以及设置于所述阵列基板与所述彩膜基板之间的液晶层；所述彩膜基板复用为所述触控基板中的基底10。
在将所述彩膜基板复用为所述触控基板中的基底10时，所述触控基板中包括的电极连接桥20、信号走线层30、绝缘层和触控电极层均形成在所述彩膜基板上。在制作所述触控基板包括的各结构之前，可先对显示面板中彩膜基板的表面进行清洗，具体可采用滚刷、盘刷、洗剂喷淋、纯水喷淋等常规清洗方式对彩膜基板表面进行清洁，去除彩膜基板表面的污物。
上述实施例提供的触控显示装置中，所述触控基板整体位于所述显示面板的彩膜基板与触控显示装置中的偏光片之间，使得所述触控显示装置形成为On-Cell结构。这种On-Cell结构的触控显示装置不仅能够降低触控显示装置的厚度，还减少了后端模组的制作工序。
在一些实施例中，所述触控显示装置还包括显示面板，所述显示面板与所述触控基板层叠设置，所述触控基板中的触控电极层位于所述显示面板与所述触控基板的基底10之间。
上述结构的触控显示装置形成为外挂式结构，可采用胶材将所述触控基板粘贴在显示面板上。
本公开实施例还提供了一种触控基板的制作方法，用于制作上述实施例提供的触控基板，所述制作方法包括：
在基底10上制作多个电极连接桥20，所述多个电极连接桥20呈阵列分布；
在所述电极连接桥20背向所述基底10的一侧制作信号走线层30，所述信号走线层30包括多条第一信号走线31和多条第二信号走线32；
在所述信号走线层30背向所述基底10的一侧制作绝缘层，所述绝缘层包括与所述电极连接桥20一一对应的第一绝缘图形41，以及覆盖所述信号走线层30的第二绝缘图形42；
在所述绝缘层背向所述基底10的一侧制作触控电极层，所述触控电极层包括多个第一触控电极71和多个第二触控电极72，所述第一触控电极71与所述第二触控电极72交叉设置；所述第一信号走线31与所述第一触控电极71一一对应电连接，所述第二信号走线32与所述第二触控电极72一一对应电连接；所述第一触控电极71在所述基底10上的正投影与所述电极连接桥20在所述基底10上的正投影具有第一交叠区域，所述第一绝缘图形41一一对应覆盖所述第一交叠区域；每个所述第二触控电极72均包括间隔设置的多个电极图形，所述多个电极图形中相邻的电极图形通过所述电极连接桥20电连接。
采用本公开实施例提供的制作方法制作触控基板时，依次进行电极连接桥制程(即ITO1制成)，信号走线层制程(即M-T制程)，绝缘层制程(即OC1制程)和触控电极层制程(即ITO2制成)。由于绝缘层能够覆盖所述信号走线层30，触控电极层具有较好的稳定性，因此在完成触控电极层的制作后，无需再采用光刻工艺制作一层绝缘层，因此，采用本公开实施例提供的制作方法制作触控基板时，仅需要四次光刻工艺即可，有效简化了制作工艺流程，提升了产能，增强了产品的竞争力。而且，由于触控电极层是在信号走线层30形成之后形成的，避免了制作所述信号走线层30时应用的刻蚀液对所述触控电极层产生腐蚀，从而有效提升了触控基板性能和良率。
另外，当所述电极连接桥20采用ITO制作时，能够实现桥点完全不可见，因此，采用本公开实施例提供的制作方法制作触控基板相比于包括金属连接桥的触控基板在视觉方面更具有优势。
在一些实施例中，所述制作方法还包括制作多个绑定引脚50，所述多个 绑定引脚50中的第一部分绑定引脚50与所述第一信号走线31一一对应电连接，所述绑定引脚50中的第二部分绑定引脚50与所述第二信号走线32一一对应电连接；所述绑定引脚50包括沿远离所述基底10的方向依次层叠设置的第一绑定图形501、第二绑定图形502和第三绑定图形503；
所述制作多个绑定引脚50的步骤具体包括：
通过一次构图工艺，同时形成所述第一绑定图形501与所述电极连接桥20；
通过一次构图工艺，同时形成一体结构的所述第二绑定图形502和所述信号走线层30；
通过一次构图工艺，同时形成所述第三绑定图形503与所述触控电极层。
采用上述实施例提供制作方法制作的触控基板中，使得所述绑定引脚50形成为类似“三明治”的结构，这种结构不仅保证了所述绑定引脚50具有良好的导电性能，还保证了所述绑定引脚50能够稳固的附着在基底10的表面。
此外，由于上述结构的绑定引脚50中第三绑定图形503与触控电极层同材料制作，而触控电极层一般采用稳定性较好的ITO，使得所述第三绑定图形503具有良好的稳定性，从而使得所述绑定引脚50背向所述基底10的表面具有较好的稳定性，保证了所述绑定引脚50良好的导电性能。
另外，采用上述实施例提供制作方法制作的触控基板中，绑定引脚50能够与所述触控基板中的其它结构在同一次构图工艺中形成，避免了增加额外的制作工艺，有效简化了触控基板的制作流程，节约了制作成本。
在一些实施例中，在所述信号走线层30背向所述基底10的一侧制作绝缘层的步骤具体包括：
在所述信号走线层30背向所述基底10的一侧形成绝缘薄膜；
对所述绝缘薄膜进行构图，形成所述第一绝缘图形41和所述第二绝缘图形42；所述第一触控电极71在所述基底10上的正投影与对应的第一信号走线31的搭接端34在所述基底10上的正投影具有第二交叠区域，所述第二绝缘图形42上设置有与所述第二交叠区域一一对应的第一过孔结构43，所述第一过孔结构43包括多个第一过孔，所述第一触控电极71通过对应的第一过孔结构43中的多个第一过孔与对应的第一信号走线31的搭接端34电连 接；所述第二触控电极72在所述基底10上的正投影与对应的第二信号走线32的搭接端34在所述基底10上的正投影具有第三交叠区域，所述第二绝缘图形42上设置有与所述第三交叠区域一一对应的第二过孔结构44，所述第二过孔结构44包括多个第二过孔，所述第二触控电极72通过对应的第二过孔结构44中的多个第二过孔与对应的第二信号走线32的搭接端34电连接。
具体地，采用有机绝缘材料，在所述信号走线层30背向所述基底10的一侧涂覆形成绝缘薄膜，对该绝缘薄膜进行曝光、显影，形成所述绝缘层，所述绝缘层包括与所述电极连接桥20一一对应的第一绝缘图形41，以及覆盖所述信号走线层30的第二绝缘图形42。示例性的，对所述绝缘层的固化温度小于150℃。
采用上述实施例提供制作方法制作的触控基板中，所述第一触控电极71通过多个第一过孔与对应的第一信号走线31的搭接端34电连接，所述第二触控电极72通过多个第二过孔与对应的第二信号走线32的搭接端34电连接，不仅能够保证触控电极与信号走线的搭接端34之间良好的连接性能，还使得在触控基板的制程中，避免信号走线的搭接端34被大面积暴露，从而更好的避免了信号走线的搭接端34被氧化，保证了所述信号走线的搭接端34的导电性能。
在一些实施例中，所述多个第一过孔在所述基底10上的正投影位于所述第一信号走线31的搭接端34在所述基底10上的正投影的内部；和/或，所述多个第二过孔在所述基底10上的正投影位于所述第二信号走线32的搭接端34在所述基底10上的正投影的内部。
在一些实施例中，所述触控基板还包括：在所述触控电极层背向所述基底10的一侧制作钝化层60，所述钝化层60暴露所述触控基板的多个绑定引脚50。
具体地，所述钝化层PVX可采用氮氧化硅材料制作，但不仅限于此。值得注意，所述钝化层在制作时不采用mask工艺。
采用上述实施例提供制作方法制作的触控基板中，通过在所述触控电极层背向所述基底10的一侧制作所述钝化层60，能够对所述触控基板上除所述多个绑定引脚50之外的其它结构进行保护，从而更好的提升了所述触控基 板的良率和触控性能。
在一些实施例中，所述制作方法还包括：
通过一次构图工艺，同时形成信号隔离线33、所述多条第一信号走线31和所述多条第二信号走线32，所述多条第一信号走线31位于所述信号隔离线33的第一侧，所述多条第二信号走线32位于所述信号隔离线33的第二侧。
采用上述实施例提供制作方法制作的触控基板中，所述信号走线层30还包括信号隔离线33，所述信号隔离线33用于隔离所述第一信号走线31和所述第二信号走线32，避免所述第一信号走线31上传输的信号与所述第二信号走线32上传输的信号之间相互干扰。
需要说明，本说明书中的各个实施例均采用递进的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于方法实施例而言，由于其基本相似于产品实施例，所以描述得比较简单，相关之处参见产品实施例的部分说明即可。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”、“耦接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
在上述实施方式的描述中，具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易 想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (14)

  1. 一种触控基板，包括：基底；
    设置于所述基底上的多个电极连接桥，所述多个电极连接桥呈阵列分布；
    设置于所述电极连接桥背向所述基底的一侧的信号走线层，所述信号走线层包括多条第一信号走线和多条第二信号走线；
    设置于所述信号走线层背向所述基底的一侧的绝缘层，所述绝缘层包括与所述电极连接桥一一对应的第一绝缘图形，以及覆盖所述信号走线层的第二绝缘图形；
    设置于所述绝缘层背向所述基底的一侧的触控电极层，所述触控电极层包括多个第一触控电极和多个第二触控电极，所述第一触控电极与所述第二触控电极交叉设置；所述第一信号走线与所述第一触控电极一一对应电连接，所述第二信号走线与所述第二触控电极一一对应电连接；所述第一触控电极在所述基底上的正投影与所述电极连接桥在所述基底上的正投影具有第一交叠区域，所述第一绝缘图形一一对应覆盖所述第一交叠区域；每个所述第二触控电极均包括间隔设置的多个电极图形，所述多个电极图形中相邻的电极图形通过所述电极连接桥电连接。
  2. 根据权利要求1所述的触控基板，其中，所述触控基板还包括：
    多个绑定引脚，所述多个绑定引脚中的第一部分绑定引脚与所述第一信号走线一一对应电连接，所述绑定引脚中的第二部分绑定引脚与所述第二信号走线一一对应电连接；
    所述绑定引脚包括沿远离所述基底的方向依次层叠设置的第一绑定图形、第二绑定图形和第三绑定图形，所述第一绑定图形与所述电极连接桥同层同材料设置，所述第二绑定图形与对应电连接的第一信号走线或第二信号走线形成为一体结构，所述第三绑定图形与所述触控电极层同层同材料设置。
  3. 根据权利要求1所述的触控基板，其中，
    所述第一触控电极在所述基底上的正投影与对应的第一信号走线的搭接端在所述基底上的正投影具有第二交叠区域，所述第二绝缘图形上设置有与所述第二交叠区域一一对应的第一过孔结构，所述第一过孔结构包括多个第 一过孔，所述第一触控电极通过对应的第一过孔结构中的多个第一过孔与对应的第一信号走线的搭接端电连接；和/或，
    所述第二触控电极在所述基底上的正投影与对应的第二信号走线的搭接端在所述基底上的正投影具有第三交叠区域，所述第二绝缘图形上设置有与所述第三交叠区域一一对应的第二过孔结构，所述第二过孔结构包括多个第二过孔，所述第二触控电极通过对应的第二过孔结构中的多个第二过孔与对应的第二信号走线的搭接端电连接。
  4. 根据权利要求3所述的触控基板，其中，所述多个第一过孔在所述基底上的正投影位于所述第一信号走线的搭接端在所述基底上的正投影的内部；和/或，
    所述多个第二过孔在所述基底上的正投影位于所述第二信号走线的搭接端在所述基底上的正投影的内部。
  5. 根据权利要求2所述的触控基板，其中，所述触控基板还包括：
    位于所述触控电极层背向所述基底的一侧的钝化层，所述钝化层暴露所述触控基板的多个绑定引脚。
  6. 根据权利要求1所述的触控基板，其中，所述信号走线层还包括：信号隔离线，所述多条第一信号走线位于所述信号隔离线的第一侧，所述多条第二信号走线位于所述信号隔离线的第二侧。
  7. 一种触控显示装置，包括如权利要求1～6中任一项所述的触控基板。
  8. 根据权利要求7所述的触控显示装置，其中，所述触控显示装置还包括显示面板，所述显示面板包括相对设置的阵列基板和彩膜基板，以及设置于所述阵列基板与所述彩膜基板之间的液晶层；所述彩膜基板复用为所述触控基板中的基底。
  9. 根据权利要求7所述的触控显示装置，其中，所述触控显示装置还包括显示面板，所述显示面板与所述触控基板层叠设置，所述触控基板中的触控电极层位于所述显示面板与所述触控基板的基底之间。
  10. 一种触控基板的制作方法，用于制作如权利要求1～9中任一项所述的触控基板，所述制作方法包括：
    在基底上制作多个电极连接桥，所述多个电极连接桥呈阵列分布；
    在所述电极连接桥背向所述基底的一侧制作信号走线层，所述信号走线层包括多条第一信号走线和多条第二信号走线；
    在所述信号走线层背向所述基底的一侧制作绝缘层，所述绝缘层包括与所述电极连接桥一一对应的第一绝缘图形，以及覆盖所述信号走线层的第二绝缘图形；
    在所述绝缘层背向所述基底的一侧制作触控电极层，所述触控电极层包括多个第一触控电极和多个第二触控电极，所述第一触控电极与所述第二触控电极交叉设置；所述第一信号走线与所述第一触控电极一一对应电连接，所述第二信号走线与所述第二触控电极一一对应电连接；所述第一触控电极在所述基底上的正投影与所述电极连接桥在所述基底上的正投影具有第一交叠区域，所述第一绝缘图形一一对应覆盖所述第一交叠区域；每个所述第二触控电极均包括间隔设置的多个电极图形，所述多个电极图形中相邻的电极图形通过所述电极连接桥电连接。
  11. 根据权利要求10所述的触控基板的制作方法，其中，所述制作方法还包括制作多个绑定引脚，所述多个绑定引脚中的第一部分绑定引脚与所述第一信号走线一一对应电连接，所述绑定引脚中的第二部分绑定引脚与所述第二信号走线一一对应电连接；所述绑定引脚包括沿远离所述基底的方向依次层叠设置的第一绑定图形、第二绑定图形和第三绑定图形；
    所述制作多个绑定引脚的步骤具体包括：
    通过一次构图工艺，同时形成所述第一绑定图形与所述电极连接桥；
    通过一次构图工艺，同时形成一体结构的所述第二绑定图形和所述信号走线层；
    通过一次构图工艺，同时形成所述第三绑定图形与所述触控电极层。
  12. 根据权利要求10所述的触控基板的制作方法，其中，在所述信号走线层背向所述基底的一侧制作绝缘层的步骤具体包括：
    在所述信号走线层背向所述基底的一侧形成绝缘薄膜；
    对所述绝缘薄膜进行构图，形成所述第一绝缘图形和所述第二绝缘图形；所述第一触控电极在所述基底上的正投影与对应的第一信号走线的搭接端在所述基底上的正投影具有第二交叠区域，所述第二绝缘图形上设置有与所述 第二交叠区域一一对应的第一过孔结构，所述第一过孔结构包括多个第一过孔，所述第一触控电极通过对应的第一过孔结构中的多个第一过孔与对应的第一信号走线的搭接端电连接；所述第二触控电极在所述基底上的正投影与对应的第二信号走线的搭接端在所述基底上的正投影具有第三交叠区域，所述第二绝缘图形上设置有与所述第三交叠区域一一对应的第二过孔结构，所述第二过孔结构包括多个第二过孔，所述第二触控电极通过对应的第二过孔结构中的多个第二过孔与对应的第二信号走线的搭接端电连接。
  13. 根据权利要求11所述的触控基板的制作方法，其中，所述触控基板还包括：
    在所述触控电极层背向所述基底的一侧制作钝化层，所述钝化层暴露所述触控基板的多个绑定引脚。
  14. 根据权利要求10所述的触控基板的制作方法，其中，所述制作方法还包括：
    通过一次构图工艺，同时形成信号隔离线、所述多条第一信号走线和所述多条第二信号走线，所述多条第一信号走线位于所述信号隔离线的第一侧，所述多条第二信号走线位于所述信号隔离线的第二侧。
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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012047013A2 (ko) * 2010-10-05 2012-04-12 네오뷰코오롱 주식회사 정전용량방식 터치 패널 소자 및 이의 제조방법
CN103472944A (zh) * 2013-07-02 2013-12-25 友达光电股份有限公司 触控面板及其制造方法
CN103500036A (zh) * 2013-08-30 2014-01-08 京东方科技集团股份有限公司 触摸屏、其制作方法及显示装置
CN103995612A (zh) * 2014-05-07 2014-08-20 合肥鑫晟光电科技有限公司 一种触控模组、其制作方法及显示装置
US20140267953A1 (en) * 2013-03-14 2014-09-18 Samsung Display Co., Ltd. Touch screen panel and method of manufacturing the same
CN105159515A (zh) * 2015-09-18 2015-12-16 京东方科技集团股份有限公司 触控结构及其制作方法、触控基板和显示装置
CN106843616A (zh) * 2017-01-03 2017-06-13 京东方科技集团股份有限公司 一种触控基板及其制作方法、触控显示装置
CN107463031A (zh) * 2017-09-18 2017-12-12 武汉华星光电技术有限公司 结晶ITO薄膜的制备方法、On‑cell型触控面板的制备方法
CN109960434A (zh) * 2017-12-25 2019-07-02 瀚宇彩晶股份有限公司 触控面板、触控显示装置及制作触控面板的方法
CN211124000U (zh) * 2020-01-02 2020-07-28 京东方科技集团股份有限公司 一种显示面板及显示装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102955603B (zh) * 2011-08-17 2016-05-25 宸鸿科技(厦门)有限公司 触控面板及其制造方法
CN103376928B (zh) * 2012-04-17 2017-04-19 宸鸿科技(厦门)有限公司 触控面板及其制作方法
KR102261128B1 (ko) * 2014-08-06 2021-06-07 삼성디스플레이 주식회사 터치 스크린 패널 및 터치 스크린 패널의 제조 방법
CN109116643A (zh) * 2018-09-10 2019-01-01 武汉天马微电子有限公司 一种显示面板及显示装置

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012047013A2 (ko) * 2010-10-05 2012-04-12 네오뷰코오롱 주식회사 정전용량방식 터치 패널 소자 및 이의 제조방법
US20140267953A1 (en) * 2013-03-14 2014-09-18 Samsung Display Co., Ltd. Touch screen panel and method of manufacturing the same
CN103472944A (zh) * 2013-07-02 2013-12-25 友达光电股份有限公司 触控面板及其制造方法
CN103500036A (zh) * 2013-08-30 2014-01-08 京东方科技集团股份有限公司 触摸屏、其制作方法及显示装置
CN103995612A (zh) * 2014-05-07 2014-08-20 合肥鑫晟光电科技有限公司 一种触控模组、其制作方法及显示装置
CN105159515A (zh) * 2015-09-18 2015-12-16 京东方科技集团股份有限公司 触控结构及其制作方法、触控基板和显示装置
CN106843616A (zh) * 2017-01-03 2017-06-13 京东方科技集团股份有限公司 一种触控基板及其制作方法、触控显示装置
CN107463031A (zh) * 2017-09-18 2017-12-12 武汉华星光电技术有限公司 结晶ITO薄膜的制备方法、On‑cell型触控面板的制备方法
CN109960434A (zh) * 2017-12-25 2019-07-02 瀚宇彩晶股份有限公司 触控面板、触控显示装置及制作触控面板的方法
CN211124000U (zh) * 2020-01-02 2020-07-28 京东方科技集团股份有限公司 一种显示面板及显示装置

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