WO2022037145A1 - 数据处理设备的电源电压控制方法、装置、数据处理设备及存储介质 - Google Patents

数据处理设备的电源电压控制方法、装置、数据处理设备及存储介质 Download PDF

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WO2022037145A1
WO2022037145A1 PCT/CN2021/094527 CN2021094527W WO2022037145A1 WO 2022037145 A1 WO2022037145 A1 WO 2022037145A1 CN 2021094527 W CN2021094527 W CN 2021094527W WO 2022037145 A1 WO2022037145 A1 WO 2022037145A1
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data processing
computing power
processing device
power supply
threshold value
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PCT/CN2021/094527
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English (en)
French (fr)
Inventor
马伟彬
黄理洪
巫跃凤
郭海丰
杨作兴
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深圳比特微电子科技有限公司
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Priority to CA3176930A priority Critical patent/CA3176930A1/en
Priority to US17/997,316 priority patent/US12093099B2/en
Publication of WO2022037145A1 publication Critical patent/WO2022037145A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/20—Cooling means
    • G06F1/206—Cooling means comprising thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present application belongs to the technical field of digital currency, and in particular relates to a power supply voltage control method, device, data processing device and storage medium for data processing equipment.
  • Digital currency can be considered as a virtual currency based on node network and digital encryption algorithm.
  • the core features of digital currency mainly include: 1. Due to some open algorithms, digital currency has no issuer; 2. Since the number of algorithm solutions is determined, the total amount of digital currency is fixed; 3. Since the transaction process requires The recognition of each node, so the transaction process of digital currency is safe enough.
  • digital currency mining machines With the rapid development of supercomputers, digital currency mining machines have gradually moved from graphics card mining machines to application specific integrated circuit (ASIC) mining machines with lower power consumption and lower cost.
  • ASIC application specific integrated circuit
  • digital currency mining machines generally run firmware customized by manufacturers to complete functions such as connecting to mining pools, running mining programs, and providing mining farm operation and maintenance interfaces.
  • the embodiments of the present application provide a power supply voltage control method, device, data processing device, and storage medium for data processing equipment.
  • a power supply voltage control method for a data processing device comprising:
  • the output voltage of the data processing apparatus power supply is controlled.
  • a power supply voltage control device for data processing equipment comprising:
  • a computing power ratio determination module configured to determine the computing power ratio of the data processing device based on the actual computing power and the theoretical computing power of the data processing device;
  • an instruction generation module configured to generate a power control instruction based on a comparison result between the computing power ratio and a predetermined threshold
  • the control module is configured to control the output voltage of the power supply of the processing device based on the power supply control instruction.
  • a power supply voltage control device for data processing equipment comprising:
  • An application program executable by the processor is stored in the memory, so as to cause the processor to execute the power supply voltage control method for a data processing device as described in any one of the above.
  • a data processing device comprising:
  • a control board comprising: a memory and a processor; wherein an application program executable by the processor is stored in the memory, for causing the processor to perform power supply voltage control of the data processing device according to any one of the above method;
  • the computing power board has a signal connection with the control board through a signal connection interface, and the computing power board has an electrical connection with a power source through a power supply connection interface.
  • a non-volatile computer-readable storage medium storing computer-readable instructions for executing the power supply voltage control method for a data processing device as described in any one of the above.
  • the computing power ratio of the data processing device is determined based on the actual computing power and the theoretical computing power of the data processing device; Power control instructions; based on the power control instructions, control the output voltage of the power supply of the data processing equipment. It can be seen that the embodiments of the present application realize automatic voltage regulation for the output voltage of the power supply, and can achieve a good compromise between the power consumption loss of the data processing device and the computing power.
  • FIG. 1 is an exemplary flowchart of a power supply voltage control method of a data processing apparatus in some embodiments of the present application.
  • FIG. 2 is a first exemplary flowchart of a power supply voltage control method for a digital currency mining machine in some embodiments of the present application.
  • FIG. 3 is a second exemplary flowchart of a power supply voltage control method for a digital currency mining machine in some embodiments of the present application.
  • FIG. 4 is a third exemplary flowchart of a power supply voltage control method for a digital currency mining machine in some embodiments of the present application.
  • FIG. 5 is an exemplary structural diagram of a power supply voltage control apparatus of a data processing apparatus in some embodiments of the present application.
  • FIG. 6 is an exemplary structural diagram of a power supply voltage control apparatus of a data processing apparatus having a memory-processor architecture in some embodiments of the present application.
  • FIG. 7 is an exemplary structural diagram of a data processing device in some embodiments of the present application.
  • the applicant also found that: generally speaking, when the ambient temperature increases, the overall temperature of the data processing equipment increases, and the output voltage of the power supply can be appropriately reduced to save power. consumption. Conversely, when the ambient temperature decreases, the overall temperature of the data processing device will decrease. At this time, the output voltage of the power supply needs to be properly increased to ensure the computing power and stability of the data processing device.
  • the data processing device may be a digital currency processing device, a supercomputing server, a digital currency mining machine, and the like.
  • FIG. 1 is an exemplary flowchart of a power supply voltage control method for a data processing device of the present application.
  • the method includes:
  • Step 101 Determine the computing power ratio of the data processing device based on the actual computing power and the theoretical computing power of the data processing device.
  • the applicant proposes the concept of the computing power ratio and the calculation method of the computing power ratio.
  • the theoretical computing power is the computing power calculated according to the theory in combination with the parameters of the data processing equipment. Specifically, the theoretical computing power can be determined by parameters such as the number of chips, the number of cores in each chip, and the chip frequency.
  • the actual computing power is the computing power actually presented by the data processing equipment within a predetermined time.
  • the actual computing power can be determined by the actual computing power of each chip and the number of chips, wherein the actual computing power of each chip can be determined by the total number of random numbers (total nonce number) of the chip within a predetermined time, the random number of the chip It is determined by the number of difficulty (Nonce difficulty) and the predetermined time.
  • Nonce is the abbreviation of Number used once or Number once, which means an arbitrary or non-repetitive random number that is only used once, specifically refers to a random number that meets the difficulty of Nonce.
  • Each Nonce is the result of the traversal of the data processing device chip.
  • the computing power ratio of the data processing device is determined based on the actual computing power and the theoretical computing power of the data processing device, which specifically includes:
  • the theoretical computing power of each chip is determined based on the number of cores in each chip and the chip frequency; the sum of the theoretical computing power of each chip is determined as the theoretical computing power of the data processing device.
  • the theoretical computing power of each chip is equal to the product of the number of cores in the chip and the chip frequency.
  • the summation result of the theoretical computing power of all chips in the data processing device is the theoretical computing power of the data processing device.
  • Sub-step (2) Determine the actual computing power of the chip based on the total number of Nonces of each chip within the predetermined time, the Nonce difficulty of the chip, and the predetermined time; determine the sum of the actual computing power of each chip to determine It is the actual computing power of the data processing equipment.
  • Substep (3) Determine the ratio of the actual computing power of the data processing device determined in substep (2) to the theoretical computing power of the data processing device determined in substep (1) as the computing power of the data processing device Compare.
  • Step 102 Generate a power control command based on the comparison result between the computing power ratio and a predetermined threshold value.
  • the predetermined threshold value has any one of the following situations:
  • the predetermined threshold value is one, and it is the first threshold value (the upper limit value of the computing power ratio);
  • the predetermined threshold is one, and it is the second threshold (the lower limit of the computing power ratio);
  • Situation (3) There are two predetermined thresholds, which are the first threshold (the upper limit of the computing power ratio) and the second threshold (the lower limit of the computing power ratio).
  • the power control command may specifically include: a voltage reduction command, a voltage increase command or a voltage maintenance command.
  • the predetermined threshold value is one and is implemented as the first threshold value: if the computing power ratio is greater than or equal to the first threshold value, it is determined that the actual computing power of the data processing device is relatively high (for example, the high ambient temperature causes the data processing device to temperature is high), at this time, the output voltage of the power supply of the data processing device can be reduced to reduce the power consumption of the data processing device, so a voltage reduction instruction is generated in step 102 .
  • the predetermined threshold value is one and the second threshold value is implemented: if the computing power ratio is less than or equal to the second threshold value, it is determined that the actual computing power of the data processing device is low (for example, the low ambient temperature causes the data processing device low temperature), at this time, the output voltage of the power supply of the data processing device can be increased to ensure the computing power and stability of the data processing device. Therefore, a voltage increase command is generated in step 102 .
  • the computing power ratio is greater than or equal to the first threshold, it is determined that the actual computing power of the data processing device is higher, at this time
  • the output voltage of the power supply of the data processing device can be reduced to reduce the power consumption of the data processing device, so a voltage reduction instruction is generated in step 102;
  • the computing power ratio is less than or equal to the second threshold value, it is determined that the actual computing power of the data processing device is low , at this time, the output voltage of the power supply of the data processing equipment can be increased to ensure the computing power and stability of the data processing equipment, so a voltage increase command is generated in step 102;
  • the computing power ratio is between the first threshold value and the second threshold value
  • the actual computing power of the data processing device is ideal (for example, the ambient temperature is appropriate and the temperature of the data processing device is appropriate), and it is determined that the output voltage of the power supply of the data processing device needs to be maintained, so a
  • Step 103 Control the output voltage of the power supply of the data processing device based on the power supply control instruction.
  • the output voltage of the power supply of the data processing apparatus is controlled.
  • the output voltage of the power supply of the data processing device is the voltage output from the power supply of the data processing device to the chip.
  • the output voltage of the data processing device power supply is reduced based on the voltage reduction command. In some embodiments, the output voltage of the data processing device power supply is stepped down in fixed steps (eg, 10 millivolts).
  • step 102 After the voltage reduction command is generated in step 102, the voltage reduction command is executed in step 103 to reduce the output voltage by 10 millivolts. Then, return to step 101 to calculate the computing power ratio within the predetermined time again, and when the voltage reduction command is generated again based on the comparison result between the computing power ratio calculated again and the first threshold value, execute the voltage reduction command to output the output voltage again.
  • the voltage is reduced by 10 millivolts (mv). This process is repeated until the comparison result between the computing power ratio and the first threshold value does not generate a voltage reduction command.
  • the output voltage of the data processing device power supply is increased based on the voltage increase command. In some embodiments, the output voltage of the data processing device power supply is stepped up in fixed steps (eg, 10 millivolts).
  • step 102 After the voltage increase command is generated in step 102, the voltage increase command is executed in step 103 to increase the output voltage by 10 millivolts. Then, return to step 101 to calculate the computing power ratio within the predetermined time again, and when the voltage increasing command is generated again based on the comparison result between the calculated computing power ratio and the second threshold value, execute the voltage increasing command to output the output voltage again.
  • the voltage was increased by 10 millivolts (mv). This process is repeated until the comparison result of the computing power ratio and the second threshold value does not generate a voltage increase command.
  • the output voltage of the data processing device power supply is maintained based on the voltage maintenance command.
  • step 102 the voltage maintenance command is executed in step 103 to maintain the output voltage unchanged. Then, return to step 101 to calculate the computing power ratio within a predetermined time again, and determine that the power control command is a voltage increase command, a voltage drop command or a voltage maintenance command based on the comparison result of the calculated computing power ratio.
  • the output voltage of the power supply of the data processing device can be adjusted in real time to avoid wasting excess power consumption.
  • the present application also proposes a calculation method of the computing power ratio, and the calculated computing power ratio can be used to precisely control the output voltage of the power supply.
  • the embodiment of the present application when the computing power ratio is greater than or equal to the first threshold value due to factors such as the high temperature of the data processing device, the embodiment of the present application reduces the output voltage, thereby preventing the data processing device from wasting power consumption.
  • the embodiment of the present application increases the output voltage, thereby ensuring the computing power and stability of the data processing device.
  • the embodiment of the present application maintains the output voltage, thereby ensuring that the good compromise state can continue.
  • the predetermined threshold value is one, and is the first threshold value (the upper limit value of the computing power ratio).
  • FIG. 2 is a first exemplary flowchart of the power supply voltage control method of the digital currency mining machine of the present application.
  • the method includes:
  • Step 201 Determine the theoretical computing power of each chip based on the number of cores in each chip and the frequency of the chips; determine the sum of the theoretical computing power of each chip as the theoretical computing power of the digital currency mining machine.
  • Step 202 Determine the actual computing power of the chip based on the total number of Nonces of each chip within a predetermined time, the Nonce difficulty of the chip, and the predetermined time; determine the sum of the actual computing power of each chip as a digital currency The actual computing power of the miner.
  • Step 203 Determine the ratio of the actual computing power determined in step 202 to the theoretical computing power determined in step 201 as the computing power ratio.
  • Step 204 Determine whether the computing power ratio is greater than a predetermined first threshold value (eg, 99.8%), and if so, execute Step 205 and exit this process, otherwise exit this process.
  • a predetermined first threshold value eg, 99.8%
  • Step 205 Generate a voltage reduction command.
  • Step 206 Execute the voltage reduction instruction to reduce the output voltage of the power supply of the mining machine, and exit this process.
  • step 206 is executed to exit the process
  • timing is started (for example, a timer of 15 minutes is set).
  • the method flow shown in FIG. 2 is executed again from step 201 . Therefore, by cyclically executing the method flow shown in Figure 2, the output voltage of the power supply of the mining machine can be continuously controlled.
  • the predetermined threshold value is one, which is the second threshold value (the lower limit value of the computing power ratio).
  • FIG. 3 is a second exemplary flowchart of the power supply voltage control method of the digital currency mining machine of the present application.
  • the method includes:
  • Step 301 Determine the theoretical computing power of each chip based on the number of cores in each chip and the chip frequency; determine the sum of the theoretical computing power of each chip as the theoretical computing power of the digital currency mining machine.
  • Step 302 Determine the actual computing power of the chip based on the total number of Nonces of each chip within the predetermined time, the Nonce difficulty of the chip, and the predetermined time; determine the sum of the actual computing power of each chip as the digital currency The actual computing power of the miner.
  • Step 303 Determine the ratio of the actual computing power determined in step 302 to the theoretical computing power determined in step 301 as the computing power ratio.
  • Step 304 Determine whether the computing power ratio is less than a predetermined second threshold value (eg, 98.0%), if so, execute Step 305 and exit this process, otherwise exit this process.
  • a predetermined second threshold value eg, 98.0%
  • Step 305 Generate a voltage increase command.
  • Step 306 Execute the voltage increase command to increase the output voltage of the power supply of the mining machine, and exit the process.
  • start timing eg, set a timer for 15 minutes.
  • start timing eg, set a timer for 15 minutes.
  • the method flow shown in FIG. 3 is executed again from step 301 . Therefore, by cyclically executing the method flow shown in Figure 3, the output voltage of the power supply of the mining machine can be continuously controlled.
  • the data processing device as a digital currency mining machine as an example.
  • there are two predetermined threshold values which are a first threshold value (the upper limit value of the computing power ratio) and the second threshold value (the lower value of the computing power ratio).
  • FIG. 4 is a third exemplary flowchart of the power supply voltage control method of the digital currency mining machine of the present application.
  • the method includes:
  • Step 401 Determine the theoretical computing power of each chip based on the number of cores in each chip and the frequency of the chips; determine the sum of the theoretical computing power of each chip as the theoretical computing power of the digital currency mining machine.
  • Step 402 Determine the actual computing power of the chip based on the total number of Nonces of each chip within the predetermined time, the Nonce difficulty of the chip, and the predetermined time; determine the sum of the actual computing power of each chip as the digital currency The actual computing power of the miner.
  • Step 403 Determine the ratio of the actual computing power determined in step 402 to the theoretical computing power determined in step 401 as the computing power ratio.
  • Step 404 Determine whether the computing power ratio is greater than a predetermined second threshold value (eg, 98.0%), if so, execute step 407 and its subsequent steps, otherwise execute step 405 and its subsequent steps.
  • a predetermined second threshold value eg, 98.0%
  • Step 405 Generate a voltage increase command.
  • Step 406 Execute the voltage increase command to increase the output voltage of the power supply of the mining machine, and exit this process.
  • Step 407 Determine whether the computing power ratio is less than a predetermined first threshold value (eg, 99.8%), if so, execute step 410 and its subsequent steps, otherwise execute step 408 and its subsequent steps.
  • a predetermined first threshold value eg, 99.8%
  • Step 408 Generate a voltage reduction command.
  • Step 409 Execute the voltage reduction instruction to reduce the output voltage of the power supply of the mining machine, and exit this process.
  • Step 410 Generate a voltage maintenance command.
  • Step 411 Execute the voltage maintenance instruction to maintain the output voltage of the power supply of the mining machine, and exit this process.
  • step 406 after step 406, step 411 or step 409 is performed to exit the process, a timer is started (eg, a timer of 15 minutes is set). When the timer expires, the method flow shown in FIG. 4 is executed again from step 401 . Therefore, by cyclically executing the method flow shown in Figure 4, the output voltage of the power supply of the mining machine can be continuously controlled.
  • a timer eg, a timer of 15 minutes is set.
  • an embodiment of the present application also proposes a power supply voltage control apparatus for a data processing device.
  • FIG. 5 is an exemplary structural diagram of a power supply voltage control device of the data processing apparatus of the present application.
  • the device 500 includes:
  • a computing power ratio determining module 501 configured to determine the computing power ratio of the data processing device based on the actual computing power and the theoretical computing power of the data processing device;
  • an instruction generation module 502 configured to generate a power control instruction based on a comparison result between the computing power ratio and a predetermined threshold
  • the control module 503 is configured to control the output voltage of the power supply of the data processing device based on the power supply control instruction.
  • the computing power ratio determination module 501 is further configured to determine the theoretical computing power of each chip based on the number of cores in each chip and the chip frequency; and determine the sum of the theoretical computing power of each chip as The theoretical computing power of the digital currency data processing equipment; based on the total number of Nonces of each chip within the predetermined time, the Nonce difficulty of the chip and the predetermined time, the actual computing power of the chip is determined; the actual computing power of each chip is calculated. The sum value is determined as the actual computing power of the data processing device; the ratio of the actual computing power to the theoretical computing power is determined as the computing power ratio.
  • the predetermined threshold value includes a first threshold value and/or a second threshold value, wherein the first threshold value is greater than the second threshold value.
  • the instruction generation module 502 is further configured to generate a voltage reduction instruction when the computing power ratio is greater than or equal to the first threshold value; the control module 503 is further configured to, based on the voltage reduction instruction, Reduce the output voltage of the data processing equipment power supply.
  • the instruction generation module 502 is further configured to generate a voltage increase instruction when the computing power ratio is less than or equal to the second threshold value; the control module 503 is configured to increase the voltage based on the voltage increase instruction The output voltage of the power supply for data processing equipment.
  • the instruction generation module 502 is further configured to generate a voltage maintenance instruction when the computing power ratio is less than the first threshold value and greater than the second threshold value; the control module 503 is further configured to use The output voltage of the power supply of the data processing apparatus is maintained based on the voltage maintaining command.
  • the embodiments of the present application also propose a power supply voltage control apparatus for a data processing device having a memory-processor architecture.
  • FIG. 6 is an exemplary structural diagram of a power supply voltage control device of a data processing apparatus having a memory-processor architecture of the present application.
  • the power supply voltage control device 600 includes:
  • a processor 601 ; a memory 602; wherein an application program executable by the processor 601 is stored in the memory 602, so as to cause the processor 601 to perform the power supply voltage control of the data processing device according to any one of the above method.
  • the memory 602 can be specifically implemented as various storage media such as Electrically Erasable Programmable Read-Only Memory (EEPROM), Flash Memory (Flash memory), Programmable Read-Only Memory (PROM).
  • the processor 601 may be implemented to include one or more central processing units or one or more field programmable gate arrays, wherein the field programmable gate arrays integrate one or more central processing unit cores.
  • the central processing unit or central processing unit core may be implemented as a CPU, an MCU or a digital signal processor (DSP).
  • FIG. 7 is an exemplary structural diagram of a data processing device provided by an embodiment of the present application.
  • the data processing equipment includes:
  • the hash board 701 is used to run the mining program
  • the control board 702 includes: a memory and a processor; wherein an application program executable by the processor is stored in the memory, so as to cause the processor to execute the power supply voltage control method of the data processing device according to any one of the above; wherein
  • the computing power board 701 has a signal connection with the control board 702 through a signal connection interface, and the computing power board 701 has an electrical connection with a power supply 703 through a power supply connection interface.
  • the computing power ratio of the data processing device is determined based on the actual computing power and the theoretical computing power of the data processing device; based on the comparison result between the computing power ratio and the predetermined threshold value, the power control command is generated ; Control the output voltage of the power supply of the data processing device based on the power control command.
  • the embodiments of the present application implement an automatic voltage regulation mechanism for the output voltage of the power supply, and can achieve a good compromise between the power consumption loss and the computing power of the data processing device.
  • the present application also proposes a computing power ratio calculation method, which can use the computing power ratio to precisely control the output voltage of the power supply.
  • the embodiment of the present application when the computing power ratio is greater than or equal to the first threshold value due to factors such as the high temperature of the data processing device, the embodiment of the present application reduces the output voltage, thereby preventing the data processing device from wasting power consumption.
  • the embodiment of the present application increases the output voltage, thereby ensuring the computing power and stability of the data processing device.
  • the embodiment of the present application maintains the output voltage, thereby ensuring that the good trade-off can continue.
  • the hardware modules in various embodiments may be implemented mechanically or electronically.
  • a hardware module may include specially designed permanent circuits or logic devices (eg, special purpose processors, such as FPGAs or ASICs) for performing specific operations.
  • Hardware modules may also include programmable logic devices or circuits (e.g., including general-purpose processors or other programmable processors) temporarily configured by software for performing particular operations.
  • programmable logic devices or circuits e.g., including general-purpose processors or other programmable processors
  • the present application also provides a machine-readable storage medium storing instructions for causing a machine to perform the method as described in the present application.
  • a system or device equipped with a storage medium on which software program codes for realizing the functions of any one of the above-described embodiments are stored, and make the computer (or CPU or MPU of the system or device) ) to read and execute the program code stored in the storage medium.
  • a part or all of the actual operation can also be completed by an operating system or the like operating on the computer based on the instructions of the program code.
  • the program code read from the storage medium can also be written into the memory provided in the expansion board inserted into the computer or into the memory provided in the expansion unit connected to the computer, and then the instructions based on the program code make the device installed in the computer.
  • the CPU on the expansion board or the expansion unit or the like performs part and all of the actual operations, so as to realize the functions of any one of the above-mentioned embodiments.
  • Embodiments of storage media for providing program code include floppy disks, hard disks, magneto-optical disks, optical disks (eg, CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, DVD+RW), Magnetic tapes, non-volatile memory cards and ROMs.
  • the program code may be downloaded from a server computer or cloud over a communications network.

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Abstract

一种数据处理设备的电源电压控制方法、装置和数据处理设备。方法包括：基于数据处理设备的实际算力与理论算力确定所述数据处理设备的算力比（101）；基于所述算力比与预定门限值的比较结果，生成电源控制指令（102）；基于所述电源控制指令，控制所述数据处理设备的电源的输出电压（103）。该方法根据算力比对电源输出电压执行控制，可以在数据处理设备的功耗损失与算力之间取得良好折衷。

Description

数据处理设备的电源电压控制方法、装置、数据处理设备及存储介质
本申请要求于2020年8月18日提交中国专利局、申请号为202010830757.9，发明名称为“数字货币矿机的电源电压控制方法、装置和数字货币矿机”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请属于数字货币技术领域，特别是涉及一种数据处理设备的电源电压控制方法、装置、数据处理设备及存储介质。
背景技术
数字货币可以认为是一种基于节点网络和数字加密算法的虚拟货币。数字货币的核心特征主要包括：1、由于来自于某些开放的算法，数字货币没有发行主体；2、由于算法解的数量确定，数字货币的总量固定；3、由于交易过程需要网络中的各个节点的认可，因此数字货币的交易过程足够安全。随着超级计算机的快速发展，数字货币矿机已经从显卡矿机逐步走向更低功耗和更低成本的专用集成电路(Application Specific Integrated Circuit，ASIC)矿机。目前，数字货币矿机一般运行厂商定制的固件，完成连接矿池、运行挖矿程序、并提供矿场运维接口等功能。
在数字货币矿机的运行过程中，环境温度的变化可能导致矿机整体温度的变化。
技术内容
本申请实施例提出一种数据处理设备的电源电压控制方法、装置、数据处理设备及存储介质。
本申请实施例的技术方案如下：
一种数据处理设备的电源电压控制方法，该方法包括：
基于数据处理设备的实际算力与理论算力确定所述数据处理设备的算力比；
基于所述算力比与预定门限值的比较结果，生成电源控制指令；
基于所述电源控制指令，控制所述数据处理设备电源的输出电压。
一种数据处理设备的电源电压控制装置，包括：
算力比确定模块，用于基于数据处理设备的实际算力与理论算力确定所述数据处理设备的算力比；
指令生成模块，用于基于所述算力比与预定门限值的比较结果，生成电源控制指令；
控制模块，用于基于所述电源控制指令，控制处理设备电源的输出电压。
一种数据处理设备的电源电压控制装置，包括：
存储器；
处理器；
其中所述存储器中存储有可被所述处理器执行的应用程序，用于使得所述处理器执行如上任一项所述的数据处理设备的电源电压控制方法。
一种数据处理设备，包括：
算力板；
控制板，包含：存储器和处理器；其中所述存储器中存储有可被所述处理器执行的应用程序，用于使得所述处理器执行如上任一项所述的数据处理设备的电源电压控制方法；
其中所述算力板通过信号连接接口与所述控制板具有信号连接，所述算力板通过电源连接接口与电源具有电力连接。
一种非易失性计算机可读存储介质，其中存储有计算机可读指令，该计算机可读指令用于执行如上任一项所述的数据处理设备的电源电压控制方法。
从上述技术方案可以看出，在本申请实施方式中，基于数据处理设备的实际算力与理论算力确定数据处理设备的算力比；基于算力比与预定门限值的比较结果，生成电源控制指令；基于电源控制指令，控制数据处理设备电源的输出电压。由此可见，本申请实施方式针对电源输出电压实现自动调压，可以在数据处理设备的功耗损失与算力之间取得良好折衷。
附图简要说明
图1为本申请一些实施例中的数据处理设备的电源电压控制方法的示范性流程 图。
图2为本申请一些实施例中的数字货币矿机的电源电压控制方法的第一示范性流程图。
图3为本申请一些实施例中的数字货币矿机的电源电压控制方法的第二示范性流程图。
图4为本申请一些实施例中的数字货币矿机的电源电压控制方法的第三示范性流程图。
图5为本申请一些实施例中的数据处理设备的电源电压控制装置的示范性结构图。
图6为本申请一些实施例中具有存储器-处理器架构的数据处理设备的电源电压控制装置的示范性结构图。
图7为本申请一些实施例中数据处理设备的示范性结构图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面结合附图对本申请作进一步的详细描述。
为了描述上的简洁和直观，下文通过描述若干代表性的实施方式来对本申请的方案进行阐述。实施方式中大量的细节仅用于帮助理解本申请的方案。但是很明显，本申请的技术方案实现时可以不局限于这些细节。为了避免不必要地模糊了本申请的方案，一些实施方式没有进行细致地描述，而是仅给出了框架。下文中，“包括”是指“包括但不限于”，“根据……”是指“至少根据……，但不限于仅根据……”。由于汉语的语言习惯，下文中没有特别指出一个成分的数量时，意味着该成分可以是一个也可以是多个，或可理解为至少一个。
申请人发现：在相关技术中，数据处理设备正常运行时并没有针对数据处理设备电源输出电压的自动调压机制，即通常将数据处理设备电源输出电压维持在预设的固定电压值。这具有如下缺点：当数据处理设备温度过高时，维持该输出电压会浪费功耗；当数据处理设备温度过低时，维持该输出电压导致数据处理设备算力及稳定性会受到影响。
在尝试解决该技术问题的研究过程中，申请人还发现：通常而言，当环境温度 升高时，数据处理设备整体温度随着升高，此时电源的输出电压可以被适当降低以节约功耗。反之，当环境温度降低时，数据处理设备整体温度会降低，此时电源的输出电压需要被恰当提高以保证数据处理设备算力及稳定性。
在本申请实施例中，所述数据处理设备可以是数字货币处理设备，超算服务器、数字货币矿机等等。
基于上述分析，图1为本申请的数据处理设备的电源电压控制方法的示范性流程图。
如图1所示，该方法包括：
步骤101：基于数据处理设备的实际算力与理论算力确定数据处理设备的算力比。
在这里，申请人提出算力比的概念以及算力比的计算方式。
算力比为数据处理设备的实际算力与该数据处理设备的理论算力的比值。即：算力比＝(实际算力)/(理论算力)。
理论算力为结合数据处理设备的参数按照理论计算出的算力。具体地，可以由芯片数、每个芯片内的核数以及芯片频率等参数确定理论算力。
实际算力为数据处理设备在预定时间内实际呈现出的算力。具体地，可以由每个芯片的实际算力和芯片数确定实际算力，其中每个芯片的实际算力可以由芯片在预定时间内的随机数的总数(总Nonce数)、该芯片的随机数难度(Nonce难度)以及该预定时间所确定。其中：Nonce为Number used once或Number once的缩写，其含义为只被使用一次的任意或非重复的随机数，具体指符合Nonce难度的随机数。每个Nonce都是数据处理设备芯片遍历出来的结果。
在一些实施方式中，步骤101中基于数据处理设备的实际算力与理论算力确定数据处理设备的算力比，具体包括：
子步骤(1)、基于每个芯片内的核数和芯片频率确定每个芯片的理论算力；将各个芯片的理论算力的求和值，确定为数据处理设备的理论算力。
举例，每个芯片的理论算力等于该芯片内的核数与芯片频率的乘积。数据处理设备中全部芯片的理论算力的求和结果，即为数据处理设备的理论算力。
子步骤(2)：基于每个芯片在预定时间内的总Nonce数、该芯片的Nonce难度以及该预定时间，确定该芯片的实际算力；将各个芯片的实际算力的求和值，确定 为数据处理设备的实际算力。
举例，每个芯片的实际算力K具有如下表达式：K＝(M*Q)/T；其中M为该芯片在预定时间T内的总Nonce数；Q为该芯片的Nonce难度；T为该预定时间的长度。而且，数据处理设备中全部芯片的实际算力的求和结果，即为数据处理设备的实际算力。
子步骤(3)：将子步骤(2)中确定的数据处理设备的实际算力与子步骤(1)中确定的该数据处理设备的理论算力的比值，确定为数据处理设备的算力比。
以上示范性描述了基于数据处理设备的实际算力与理论算力确定数据处理设备的算力比的一种实施方式，本领域技术人员可以意识到，这种描述仅是示范性的，并不用于限定本申请实施方式的保护范围。
步骤102：基于算力比与预定门限值的比较结果，生成电源控制指令。
在这里，预定门限值具有如下情形中的任意一个：
情形(1)：预定门限值为一个，且为第一门限值(算力比的上限值)；
情形(2)：预定门限值为一个，且为第二门限值(算力比的下限值)；
情形(3)：预定门限值为两个，分别为第一门限值(算力比的上限值)和第二门限值(算力比的下限值)。
其中，第一门限值大于第二门限值。而且，电源控制指令具体可以包括：电压降低指令、电压增高指令或电压维持指令。
举例(1)：
当预定门限值为一个且实施为第一门限值时：如果算力比大于等于第一门限值，则认定数据处理设备的实际算力较高(比如，环境温度高导致数据处理设备温度高)，此时可以降低数据处理设备电源的输出电压以降低数据处理设备功耗，因此在步骤102中生成电压降低指令。
举例(2)：
当预定门限值为一个且实施为第二门限值时：如果算力比小于等于第二门限值，则认定数据处理设备的实际算力较低(比如，环境温度低导致数据处理设备温度低)，此时可以增高数据处理设备电源的输出电压以保证数据处理设备算力及稳定性，因此在步骤102中生成电压增高指令。
举例(3)：
当预定门限值为两个且实施为第一门限值和第二门限值时：如果算力比大于等于第一门限值，则认定数据处理设备的实际算力较高，此时可以降低数据处理设备电源的输出电压以降低数据处理设备功耗，因此在步骤102中生成电压降低指令；如果算力比小于等于第二门限值，则认定数据处理设备的实际算力较低，此时可以增高数据处理设备电源的输出电压以保证数据处理设备算力及稳定性，因此在步骤102中生成电压增高指令；如果算力比处于第一门限值与第二门限值之间，认定数据处理设备的实际算力较为理想(比如，环境温度恰当，数据处理设备温度恰当)，确定需要维持数据处理设备电源的输出电压，因此在步骤102中生成电压维持指令。
步骤103：基于电源控制指令，控制数据处理设备电源的输出电压。
在这里，基于步骤102中生成的电源控制指令，控制数据处理设备电源的输出电压。其中，数据处理设备电源的输出电压，即为数据处理设备电源输出到芯片的电压。
在一些实施方式中，基于电压降低指令，降低数据处理设备电源的输出电压。在一些实施例中，以固定的步长(比如，10毫伏)，逐步降低数据处理设备电源的输出电压。
比如，假定数据处理设备电源的输出电压的原始值为12伏特(V)，当在步骤102中生成电压降低指令后，在步骤103中执行该电压降低指令以将输出电压降低10毫伏。然后，返回步骤101再次计算预定时间内的算力比，并当基于再次计算出的算力比与第一门限值的比较结果再次生成电压降低指令后，执行该电压降低指令以再次将输出电压降低10毫伏(mv)。循环该过程，直到算力比与第一门限值的比较结果不生成电压降低指令。
在一些实施方式中，基于电压增高指令，增高数据处理设备电源的输出电压。在一些实施例中，以固定的步长(比如，10毫伏)，逐步增强数据处理设备电源的输出电压。
比如，假定数据处理设备电源的输出电压的原始值为12伏特(V)，当在步骤102中生成电压增高指令后，在步骤103中执行该电压增高指令以将输出电压增高10毫伏。然后，返回步骤101再次计算预定时间内的算力比，并当基于再次计算出的算力比与第二门限值的比较结果再次生成电压增高指令后，执行该电压增高指令以再次将输出电压增高10毫伏(mv)。循环该过程，直到算力比与第二门限值的比 较结果不生成电压增高指令。
在一些实施方式中，基于电压维持指令，维持数据处理设备电源的输出电压。
比如，当在步骤102中生成电压维持指令后，在步骤103中执行该电压维持指令以维持输出电压不变。然后，返回步骤101再次计算预定时间内的算力比，并基于再次计算出的算力比的比较结果确定电源控制指令具体为电压增高指令、电压降低指令或电压维持指令。
可见，在本申请实施方式中，通过实时监测数据处理设备预定时间内的算力比，可以实时调整数据处理设备电源的输出电压，避免浪费多余功耗。
而且，本申请还提出了算力比的计算方式，可以利用计算出的算力比对电源输出电压执行精确控制。
另外，当数据处理设备温度过高等因素导致算力比大于等于第一门限值时，本申请实施方式降低输出电压，从而避免数据处理设备浪费功耗。当数据处理设备温度过低等因素导致算力比小于等于第二门限值时，本申请实施方式增高输出电压，从而保证数据处理设备算力及稳定性。还有，当算力比处于第一门限值与第二门限值之间时，本申请实施方式维持输出电压，从而保证良好折衷状态能够持续下去。
下面以所述数据处理设备为数字货币矿机为例，描述上述情形(1)的具体实施方式。其中，预定门限值为一个，且为第一门限值(算力比的上限值)。
图2为本申请的数字货币矿机的电源电压控制方法的第一示范性流程图。
如图2所示，该方法包括：
步骤201：基于每个芯片内的核数和芯片频率确定每个芯片的理论算力；将各个芯片的理论算力的求和值，确定为数字货币矿机的理论算力。
步骤202：基于每个芯片在预定时间内的总Nonce数、该芯片的Nonce难度以及该预定时间，确定该芯片的实际算力；将各个芯片的实际算力的求和值，确定为数字货币矿机的实际算力。
步骤203：将步骤202确定的实际算力与步骤201确定的理论算力的比值，确定为算力比。
步骤204：判断该算力比是否大于预定的第一门限值(比如，为99.8％)，如果是，则执行步骤205并退出本流程，否则退出本流程。
步骤205：生成电压降低指令。
步骤206：执行电压降低指令以降低矿机电源的输出电压，并退出本流程。
在一些实施例中，在执行完步骤206退出本流程之后，开始计时(比如，设置15分钟的定时器)。当计时时间到后，重新从步骤201开始执行如图2所示的方法流程。因此，通过循环执行如图2所示的方法流程，可以持续地控制矿机电源的输出电压。
下面以所述数据处理设备为数字货币矿机为例，描述上述情形(2)的具体实施方式。其中，预定门限值为一个，且为第二门限值(算力比的下限值)。
图3为本申请的数字货币矿机的电源电压控制方法的第二示范性流程图。
如图3所示，该方法包括：
步骤301：基于每个芯片内的核数和芯片频率确定每个芯片的理论算力；将各个芯片的理论算力的求和值，确定为数字货币矿机的理论算力。
步骤302：基于每个芯片在预定时间内的总Nonce数、该芯片的Nonce难度以及该预定时间，确定该芯片的实际算力；将各个芯片的实际算力的求和值，确定为数字货币矿机的实际算力。
步骤303：将步骤302确定的实际算力与步骤301确定的理论算力的比值，确定为算力比。
步骤304：判断该算力比是否小于预定的第二门限值(比如，98.0％)，如果是，则执行步骤305并退出本流程，否则退出本流程。
步骤305：生成电压增高指令。
步骤306：执行电压增高指令以增高矿机电源的输出电压，并退出本流程。
在一些实施例中，在执行完步骤306退出本流程之后，开始计时(比如，设置15分钟的定时器)。当计时时间到后，重新从步骤301开始执行如图3所示的方法流程。因此，通过循环执行如图3所示的方法流程，可以持续地控制矿机电源的输出电压。
下面以所述数据处理设备为数字货币矿机为例，描述上述情形(3)的具体实施方式。其中，预定门限值为两个，分别为第一门限值(算力比的上限值)和第二门限值(算力比的下限值)。
图4为本申请的数字货币矿机的电源电压控制方法的第三示范性流程图。
如图4所示，该方法包括：
步骤401：基于每个芯片内的核数和芯片频率确定每个芯片的理论算力；将各个芯片的理论算力的求和值，确定为数字货币矿机的理论算力。
步骤402：基于每个芯片在预定时间内的总Nonce数、该芯片的Nonce难度以及该预定时间，确定该芯片的实际算力；将各个芯片的实际算力的求和值，确定为数字货币矿机的实际算力。
步骤403：将步骤402确定的实际算力与步骤401确定的理论算力的比值，确定为算力比。
步骤404：判断该算力比是否大于预定的第二门限值(比如，98.0％)，如果是，则执行步骤407及其后续步骤，否则执行步骤405及其后续步骤。
步骤405：生成电压增高指令。
步骤406：执行电压增高指令以增高矿机电源的输出电压，并退出本流程。
步骤407：判断该算力比是否小于预定的第一门限值(比如，99.8％)，如果是，则执行步骤410及其后续步骤，否则执行步骤408及其后续步骤。
步骤408：生成电压降低指令。
步骤409：执行电压降低指令以降低矿机电源的输出电压，并退出本流程。
步骤410：生成电压维持指令。
步骤411：执行电压维持指令以维持矿机电源的输出电压，并退出本流程。
在一些实施例中，在执行完步骤406、步骤411或步骤409以退出本流程之后，开始计时(比如，设置15分钟的定时器)。当计时时间到后，重新从步骤401开始执行如图4所示的方法流程。因此，通过循环执行如图4所示的方法流程，可以持续地控制矿机电源的输出电压。
基于上述描述，本申请实施方式还提出了数据处理设备的电源电压控制装置。
图5为本申请的数据处理设备的电源电压控制装置的示范性结构图。
如图5所示，该装置500包括：
算力比确定模块501，用于基于数据处理设备的实际算力与理论算力确定所述数据处理设备的算力比；
指令生成模块502，用于基于所述算力比与预定门限值的比较结果，生成电源控制指令；
控制模块503，用于基于所述电源控制指令，控制所述数据处理设备电源的输出 电压。
在一些实施方式中，算力比确定模块501，进一步用于基于每个芯片内的核数和芯片频率确定每个芯片的理论算力；将各个芯片的理论算力的求和值，确定为数字货币数据处理设备的理论算力；基于每个芯片在预定时间内的总Nonce数、该芯片的Nonce难度以及该预定时间，确定该芯片的实际算力；将各个芯片的实际算力的求和值，确定为数据处理设备的实际算力；将实际算力与所述理论算力的比值，确定为所述算力比。
在一些实施方式中，所述预定门限值包括第一门限值和/或第二门限值，其中第一门限值大于第二门限值。
在一些实施方式中，指令生成模块502，进一步用于当所述算力比大于等于所述第一门限值时，生成电压降低指令；控制模块503，进一步用于基于所述电压降低指令，降低数据处理设备电源的输出电压。
在一些实施方式中，指令生成模块502，进一步用于当所述算力比小于等于所述第二门限值时，生成电压增高指令；控制模块503，用于基于所述电压增高指令，增高数据处理设备电源的输出电压。
在一些实施方式中，指令生成模块502，进一步用于当所述算力比小于所述第一门限值且大于所述第二门限值时，生成电压维持指令；控制模块503，进一步用于基于所述电压维持指令，维持数据处理设备电源的输出电压。
本申请实施方式还提出了具有存储器-处理器架构的数据处理设备的电源电压控制装置。
图6为本申请具有存储器-处理器架构的数据处理设备的电源电压控制装置的示范性结构图。
如图6所示，所述电源电压控制装置600，包括：
处理器601；存储器602；其中所述存储器602中存储有可被所述处理器601执行的应用程序，用于使得所述处理器601执行如上任一项所述的数据处理设备的电源电压控制方法。
其中，存储器602具体可以实施为电可擦可编程只读存储器(EEPROM)、快闪存储器(Flash memory)、可编程只读存储器(PROM)等多种存储介质。处理器601可以实施为包括一或多个中央处理器或一或多个现场可编程门阵列，其中现场可编 程门阵列集成一或多个中央处理器核。具体地，中央处理器或中央处理器核可以实施为CPU、MCU或数字信号处理器(DSP)。
本申请实施方式还提出了一种数据处理设备。图7为本申请实施例提供的数据处理设备的示范性结构图。
如图7所示，所述数据处理设备包括：
算力板701，用于运行挖矿程序；
控制板702，包含：存储器和处理器；其中所述存储器中存储有可被所述处理器执行的应用程序，用于使得处理器执行如上任一项的数据处理设备的电源电压控制方法；其中所述算力板701通过信号连接接口与所述控制板702具有信号连接，所述算力板701通过电源连接接口与电源703具有电力连接。
综上所述，在本申请实施方式中，基于数据处理设备的实际算力与理论算力确定数据处理设备的算力比；基于算力比与预定门限值的比较结果，生成电源控制指令；基于电源控制指令，控制数据处理设备电源的输出电压。由此可见，本申请实施方式实现针对电源输出电压的自动调压机制，可以在数据处理设备的功耗损失与算力之间取得良好折衷。而且，本申请还提出了算力比计算方式，可以利用算力比对电源输出电压执行精确控制。另外，当数据处理设备温度过高等因素导致算力比大于等于第一门限值时，本申请实施方式降低输出电压，从而避免数据处理设备浪费功耗。当数据处理设备温度过低等因素导致算力比小于等于第一门限值时，本申请实施方式增高输出电压，从而保证数据处理设备算力及稳定性。还有，当算力比处于第一门限值与第二门限值之间时，本申请实施方式维持输出电压，从而保证良好折衷可以持续下去。
需要说明的是，上述各流程和各结构图中不是所有的步骤和模块都是必须的，可以根据实际的需要忽略某些步骤或模块。各步骤的执行顺序不是固定的，可以根据需要进行调整。各模块的划分仅仅是为了便于描述采用的功能上的划分，实际实现时，一个模块可以分由多个模块实现，多个模块的功能也可以由同一个模块实现，这些模块可以位于同一个设备中，也可以位于不同的设备中。
各实施方式中的硬件模块可以以机械方式或电子方式实现。例如，一个硬件模块可以包括专门设计的永久性电路或逻辑器件(如专用处理器，如FPGA或ASIC)用于完成特定的操作。硬件模块也可以包括由软件临时配置的可编程逻辑器件或电 路(如包括通用处理器或其它可编程处理器)用于执行特定操作。至于具体采用机械方式，或是采用专用的永久性电路，或是采用临时配置的电路(如由软件进行配置)来实现硬件模块，可以根据成本和时间上的考虑来决定。
本申请还提供了一种机器可读的存储介质，存储用于使一机器执行如本申请所述方法的指令。具体地，可以提供配有存储介质的系统或者装置，在该存储介质上存储着实现上述实施例中任一实施方式的功能的软件程序代码，且使该系统或者装置的计算机(或CPU或MPU)读出并执行存储在存储介质中的程序代码。此外，还可以通过基于程序代码的指令使计算机上操作的操作系统等来完成部分或者全部的实际操作。还可以将从存储介质读出的程序代码写到插入计算机内的扩展板中所设置的存储器中或者写到与计算机相连接的扩展单元中设置的存储器中，随后基于程序代码的指令使安装在扩展板或者扩展单元上的CPU等来执行部分和全部实际操作，从而实现上述实施方式中任一实施方式的功能。用于提供程序代码的存储介质实施方式包括软盘、硬盘、磁光盘、光盘(如CD-ROM、CD-R、CD-RW、DVD-ROM、DVD-RAM、DVD-RW、DVD+RW)、磁带、非易失性存储卡和ROM。在一些实施例中，可以由通信网络从服务器计算机或云上下载程序代码。
在本文中，“示意性”表示“充当实例、例子或说明”，不应将在本文中被描述为“示意性”的任何图示、实施方式解释为一种技术方案。为使图面简洁，各图中的只示意性地表示出了与本申请相关部分，而并不代表其作为产品的实际结构。另外，以使图面简洁便于理解，在有些图中具有相同结构或功能的部件，仅示意性地绘示了其中的一个，或仅标出了其中的一个。在本文中，“一个”并不表示将本申请相关部分的数量限制为“仅此一个”，并且“一个”不表示排除本申请相关部分的数量“多于一个”的情形。在本文中，“上”、“下”、“前”、“后”、“左”、“右”、“内”、“外”等仅用于表示相关部分之间的相对位置关系，而非限定这些相关部分的绝对位置。
以上所述，仅为本申请的较佳实施例而已，并非用于限定本申请的保护范围。凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (15)

  1. 一种数据处理设备的电源电压控制方法，该方法包括：
    基于数据处理设备的实际算力与理论算力确定所述数据处理设备的算力比；
    基于所述算力比与预定门限值的比较结果，生成电源控制指令；
    基于所述电源控制指令，控制所述数据处理设备的电源的输出电压。
  2. 根据权利要求1所述的方法，
    所述基于数据处理设备的实际算力与理论算力确定所述数据处理设备的算力比包括：
    基于所述数据处理设备的每个芯片内的核数和芯片频率确定每个芯片的理论算力；将各个芯片的理论算力的求和值，确定为所述数据处理设备的理论算力；
    基于每个芯片在预定时间内的总Nonce数、该芯片的Nonce难度以及该预定时间，确定该芯片的实际算力；将各个芯片的实际算力的求和值，确定为所述数据处理设备的实际算力；
    将所述实际算力与所述理论算力的比值，确定为所述算力比。
  3. 根据权利要求1所述的方法，所述预定门限值包括第一门限值和/或第二门限值，其中第一门限值大于第二门限值。
  4. 根据权利要求3所述的方法，
    所述基于算力比与预定门限值的比较结果，生成电源控制指令包括：当所述算力比大于等于所述第一门限值时，生成电压降低指令；
    所述基于电源控制指令，控制所述数据处理设备的电源的输出电压包括：基于所述电压降低指令，降低所述数据处理设备的电源的输出电压。
  5. 根据权利要求3所述的方法，
    所述基于算力比与预定门限值的比较结果，生成电源控制指令包括：当所述算力比小于等于所述第二门限值时，生成电压增高指令；
    所述基于电源控制指令，控制所述数据处理设备电源的输出电压包括：基于所述电压增高指令，增高所述数据处理设备的电源的输出电压。
  6. 根据权利要求3所述的方法，
    所述基于算力比与预定门限值的比较结果，生成电源控制指令包括：当所述算 力比小于所述第一门限值且大于所述第二门限值时，生成电压维持指令；
    所述基于电源控制指令，控制所述数据处理设备电源的输出电压包括：基于所述电压维持指令，维持所述数据处理设备的电源的输出电压。
  7. 一种数据处理设备的电源电压控制装置，包括：
    算力比确定模块，用于基于数据处理设备的实际算力与理论算力确定所述数据处理设备的算力比；
    指令生成模块，用于基于所述算力比与预定门限值的比较结果，生成电源控制指令；
    控制模块，用于基于所述电源控制指令，控制所述数据处理设备的电源的输出电压。
  8. 根据权利要求7所述的装置，
    所述算力比确定模块，进一步用于基于所述数据处理设备的每个芯片内的核数和芯片频率确定每个芯片的理论算力；将各个芯片的理论算力的求和值，确定为所述数据处理设备的理论算力；基于每个芯片在预定时间内的总Nonce数、该芯片的Nonce难度以及该预定时间，确定该芯片的实际算力；将各个芯片的实际算力的求和值，确定为所述数据处理设备的实际算力；将实际算力与所述理论算力的比值，确定为所述算力比。
  9. 根据权利要求7所述的装置，所述预定门限值包括第一门限值和/或第二门限值，其中第一门限值大于第二门限值。
  10. 根据权利要求9所述的装置，
    所述指令生成模块，进一步用于当所述算力比大于等于所述第一门限值时，生成电压降低指令；
    所述控制模块，进一步用于基于所述电压降低指令，降低所述数据处理设备的电源的输出电压。
  11. 根据权利要求9所述的装置，
    所述指令生成模块，进一步用于当所述算力比小于等于所述第二门限值时，生成电压增高指令；
    所述控制模块，进一步用于基于所述电压增高指令，增高所述数据处理设备的电源的输出电压。
  12. 根据权利要求9所述的装置，
    所述指令生成模块，进一步用于当所述算力比小于所述第一门限值且大于所述第二门限值时，生成电压维持指令；
    所述控制模块，进一步用于基于所述电压维持指令，维持所述数据处理设备的电源的输出电压。
  13. 一种数据处理设备的电源电压控制装置，包括：
    存储器；
    处理器；
    其中所述存储器中存储有可被所述处理器执行的应用程序，用于使得所述处理器执行如权利要求1至6中任一项所述的数据处理设备的电源电压控制方法。
  14. 一种数据处理设备，包括：
    算力板；
    控制板，包含：存储器和处理器；其中所述存储器中存储有可被所述处理器执行的应用程序，用于使得所述处理器执行如权利要求1至6中任一项所述的数据处理设备的电源电压控制方法；
    其中所述算力板通过信号连接接口与所述控制板具有信号连接，所述算力板通过电源连接接口与电源具有电力连接。
  15. 一种非易失性计算机可读存储介质，其中存储有计算机可读指令，该计算机可读指令用于执行如权利要求1至6中任一项所述的数据处理设备的电源电压控制方法。
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