WO2022036864A1 - 显示面板及其制作方法 - Google Patents

显示面板及其制作方法 Download PDF

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Publication number
WO2022036864A1
WO2022036864A1 PCT/CN2020/125395 CN2020125395W WO2022036864A1 WO 2022036864 A1 WO2022036864 A1 WO 2022036864A1 CN 2020125395 W CN2020125395 W CN 2020125395W WO 2022036864 A1 WO2022036864 A1 WO 2022036864A1
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WO
WIPO (PCT)
Prior art keywords
layer
unit
source
gate
display panel
Prior art date
Application number
PCT/CN2020/125395
Other languages
English (en)
French (fr)
Inventor
陈勇
鲁凯
廖作敏
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/263,422 priority Critical patent/US20230252930A1/en
Publication of WO2022036864A1 publication Critical patent/WO2022036864A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections

Definitions

  • the present application relates to the field of display, and in particular, to a display panel and a manufacturing method thereof.
  • the wiring of the array unit is very dense and complex, and the array unit is easily affected by the coupling effect of the AC signal in the adjacent components, resulting in uneven display and appearance. Display Error.
  • the present application provides a display panel and a manufacturing method thereof to solve the technical problem in the prior art that the array unit is easily affected by the coupling effect of AC signals in adjacent components, resulting in uneven display.
  • a display panel comprising a substrate, a gate layer on the substrate, a first insulating layer on the gate layer, and a metal shielding layer on the first insulating layer;
  • the gate layer includes a plurality of gate units, the metal shielding layer includes a plurality of metal shield units, and one of the metal shield units corresponds to one of the gate units;
  • the metal shielding layer is used for shielding the AC signal between two adjacent gate units.
  • the gate unit includes a first gate and at least one second gate disposed opposite to the first gate, the first gate and the second gate Insulation setting;
  • the orthographic projection of the first gate or/and the second gate on the substrate is located within the orthographic projection of the metal shielding unit on the substrate.
  • any one of the metal shielding units is electrically connected to the constant voltage signal terminal of the display panel.
  • the display panel further includes a source-drain layer on the first insulating layer, and the metal shielding layer is electrically connected to the source-drain layer.
  • the source-drain layer includes a plurality of first source-drain units and second source-drain units corresponding to the first source-drain units, the first source-drain units disposed in different layers from the second source-drain unit;
  • the first source-drain unit includes a first sub-source unit and a first sub-drain unit
  • the second source-drain unit includes a second sub-source unit
  • the second sub-source unit is electrically connected
  • the metal shielding layer is located between the first source-drain unit and the second source-drain unit.
  • the display panel further includes a second insulating layer on the source and drain layers, and an anode layer on the second insulating layer;
  • the anode layer includes a plurality of anode units, and one of the metal shielding units is electrically connected to one of the anode units.
  • the display panel further includes a metal light shielding layer on the substrate, and a plurality of source units of the source and drain layers are electrically connected to the metal light shielding layer through a plurality of first via holes , the metal shielding layer and the metal light shielding layer are electrically connected through a plurality of second via holes.
  • the metal shielding unit includes at least a first shielding component and a second shielding component, and the first shielding component and the second shielding component are disposed in different layers;
  • the first shielding member is electrically connected to the source unit of the source-drain layer, the second shielding member is electrically connected to the drain unit of the source-drain layer, or the second shielding member is electrically connected to the anode layer .
  • the display panel includes a first area close to the bending area, and in the direction of the data line, the distance between two adjacent array units in the first area is smaller than the first area.
  • the metal shielding layer is located in the first region.
  • the array unit in the first area, is not included in the orthographic projection of some light-emitting units of the display panel on the display panel, and the light-emitting unit corresponds to the array unit. Electrically connected by lead wires.
  • the present application also provides a method for manufacturing a display panel, comprising:
  • a gate layer including a plurality of gate units on the substrate
  • a metal shielding layer including a plurality of metal shielding units on the first insulating layer
  • one of the metal shielding units corresponds to one of the gate units, and the metal shielding layer is used to shield the AC signal between two adjacent gate units.
  • the steps of forming the gate layer and the first insulating layer include:
  • the first sub-insulating layer and the second sub-insulating layer constitute a first insulating layer
  • the first gate and the second gate are disposed opposite to each other, the first gate or/and the The orthographic projection of the second grid on the substrate is located within the corresponding orthographic projection of the metal shielding unit on the substrate.
  • any one of the metal shielding units is electrically connected to the constant voltage signal terminal of the display panel.
  • the method further includes:
  • the metal shielding layer is electrically connected to the source and drain layers.
  • the step of forming the source and drain layers on the first insulating layer includes:
  • first source-drain units including first sub-source units and first sub-drain units on the first insulating layer
  • the second source-drain unit includes a second sub-source unit, the second sub-source unit is electrically connected to the first sub-source unit, and the metal shielding layer is located on the first source-drain unit between the pole unit and the second source-drain unit.
  • the method before forming the gate layer, the method further includes forming a metal light shielding layer on the substrate;
  • the step further includes forming a plurality of first openings on the first insulating layer, and the first openings expose the metal light shielding layer;
  • the step of forming the fifth insulating layer further includes forming a plurality of second openings on the fifth insulating layer, and the second openings expose the metal light shielding layer;
  • the source and drain layers are electrically connected to the metal light shielding layer through the first via hole, and the metal shielding layer is electrically connected to the metal light shielding layer through the second via hole.
  • the method further includes:
  • anode layer including a plurality of anode units on the second insulating layer
  • the metal shielding unit is electrically connected to the anode unit through the fourth via hole.
  • the metal shielding unit includes at least a first shielding component and a second shielding component, and the first shielding component and the second shielding component are disposed in different layers;
  • the first shielding member is electrically connected to the source unit of the source-drain layer, the second shielding member is electrically connected to the drain unit of the source-drain layer, or the second shielding member is electrically connected to the anode layer .
  • the display panel includes a first area close to the bending area, and in the direction of the data line, the distance between two adjacent array units in the first area is less than the spacing between two adjacent array units at the periphery of the first area;
  • the metal shielding layer is located in the first region.
  • the array unit in the first area, is not included in the orthographic projection of some light-emitting units of the display panel on the display panel, and the light-emitting unit is associated with the corresponding light-emitting unit.
  • the array units are electrically connected by leads.
  • the influence of the AC signal between two adjacent gate units is reduced, the display unevenness is reduced, and the display effect is improved.
  • FIG. 1 is a schematic diagram of a first structure of a display panel of the present application
  • FIG. 2 is a schematic diagram of a second structure of the display panel of the present application.
  • FIG. 3 is a partial top schematic view of the display panel of the present application.
  • FIG. 4 is a schematic diagram of a third structure of the display panel of the present application.
  • FIG. 5 is a schematic diagram of a fourth structure of the display panel of the present application.
  • FIG. 6 is a schematic diagram of a fifth structure of the display panel of the present application.
  • FIG. 7 is a schematic diagram of a sixth structure of the display panel of the present application.
  • FIG. 8 is a schematic diagram of a seventh structure of the display panel of the present application.
  • FIG. 9 is a schematic top view of the display panel of the present application.
  • FIG. 10 is a flowchart showing the steps of the manufacturing method of the display panel of the present application.
  • the present application provides a display panel and a manufacturing method thereof.
  • the present application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.
  • the present application discloses a display panel 100 including a substrate 200 , a gate layer on the substrate 200 , a first insulating layer 210 on the gate layer, and a metal shielding layer on the first insulating layer 210;
  • the gate layer includes a plurality of gate units 310, the metal shield layer includes a plurality of metal shield units 600, and one of the metal shield units 600 corresponds to one of the gate units 310;
  • the metal shielding layer is used to shield the AC signal between two adjacent gate units 310 .
  • the influence of the AC signal between two adjacent gate units is reduced, the display unevenness is reduced, and the display effect is improved.
  • the display panel 100 includes a substrate 200, a gate layer on the substrate 200, a first insulating layer 210 on the gate layer, and a first insulating layer 210 on the gate layer.
  • the gate layer includes a plurality of gate units 310 .
  • the metal shielding layer includes a plurality of metal shielding units 600 , and one of the metal shielding units 600 corresponds to one of the gate units 310 .
  • the metal shielding layer is used to shield the AC signal between two adjacent gate units 310 .
  • the shielding principle of the metal shielding layer is similar to the electromagnetic shielding principle of the Faraday electromagnetic cage.
  • the display panel 100 further includes an active layer 400 on the third insulating layer 230 and a fourth insulating layer 240 on the active layer 400 .
  • the gate layer is located on the fourth insulating layer 240 and away from the substrate 200 .
  • the active layer 400 includes a plurality of silicon islands, and the source and drain layers are electrically connected to the active layer 400 through vias, even if the source unit and the drain unit are connected to the silicon through vias The island is electrically connected.
  • 400 is used to represent the silicon island, and the label will not be repeated. Please refer to Figure 1 to Figure 9 for details.
  • the gate unit 310 includes a first gate 311 and at least one second gate 312 opposite to the first gate 311 , the first gate 311 and the second gate 312
  • the gate 312 is provided in isolation.
  • the orthographic projection of the first gate 311 on the substrate 200 is located within the orthographic projection of the metal shielding unit 600 on the substrate 200 , or/and the orthographic projection of the metal shielding unit 600 on the substrate 200
  • the orthographic projection of the second gate 312 on the substrate 200 is located within the corresponding orthographic projection of the metal shielding unit 600 on the substrate 200 .
  • the display panel 100 includes a first sub-insulating layer 211 located between the first gate 311 and the second gate 312, and a second sub-insulating layer 212 located on the second gate.
  • the first sub-insulating layer 211 and the second sub-insulating layer 212 constitute the first insulating layer 210 , please refer to FIG. 2 and FIG. 3 for details.
  • the second gate 312 is The perspective relationship is moved to the top, in fact, the first gate 312 is located between the first gate 311 and the metal shielding unit 600 .
  • the shielding principle of the metal shielding layer is similar to the electromagnetic shielding principle of the Faraday electromagnetic cage.
  • the first gate 311 unit 310 is located on the side close to the substrate 200 .
  • the orthographic projection of the unit 310 of the second gate 312 on the substrate 200 is located within the orthographic projection of the unit 310 of the first grid 311 on the substrate 200 .
  • the orthographic projection of the second gate 312 on the substrate 200 is located within the orthographic projection of the metal shielding unit 600 on the substrate 200 .
  • FIG. 2 and FIG. 3 wherein FIG. 3 In the figure, for convenience of illustration, the perspective relationship of the second grid 312 is moved to the top, in fact, the first grid 312 is located between the first grid 311 and the metal shielding unit 600 .
  • the metal shielding unit 600 may not be electrically connected to other film layers, which reduces the perforation of the film layer. In a plan view, the metal shielding unit 600 only needs to cover the second gate 312 unit 310 at a minimum to achieve the shielding of AC signals. .
  • any one of the metal shielding units 600 is electrically connected to the constant voltage signal terminal of the display panel 100 .
  • the metal shielding unit 600 can form a certain magnetic field, which can shield the AC signal more stably.
  • the connection between two adjacent metal shielding units 600 protects the grid.
  • the pole unit 310 is not affected by the surrounding alternating current signal, which reduces display unevenness and improves the display effect.
  • the display panel 100 further includes a source and drain layer on the first insulating layer 210 and on a side away from the gate layer.
  • the metal shielding layer is electrically connected to the source and drain layers. Please refer to FIG. 4 and FIG. 5 for details.
  • the charged film layer closest to the gate layer is the source and drain layers, and is electrically connected to the source and drain layers through the metal shielding layer, so as to provide the gate unit 310 with the best shielding effect of alternating current signals.
  • the source-drain layer includes a plurality of source units 510 and a plurality of drain units 520, a metal shielding unit 600 is electrically connected to a source unit 510 and/or a metal
  • the shielding unit 600 is electrically connected to one of the drain units 520 .
  • the source unit 510 and the drain unit 520 are on the periphery of the gate unit 310, and which side the metal shielding unit 600 is conveniently connected to can be connected to the source unit 510 or the source unit 510 on the side. / It is connected with the drain unit 520, which is convenient for shielding the AC signal.
  • the source-drain layer includes a plurality of first source-drain units 520 and second source-drain units 520 corresponding to the first source-drain units 520 .
  • 520 and the second source-drain unit 520 are disposed in different layers.
  • the first source-drain unit 520 includes a first sub-source unit 511 and a first sub-drain unit 521 .
  • the second source-drain unit 520 includes a second sub-source unit 512 , and the second sub-source unit 512 is electrically connected to the first sub-source unit 511 .
  • the metal shielding layer is located between the first source-drain unit 520 and the second source-drain unit 520 , and the first source-drain unit 520 is close to the side of the substrate 200 .
  • the source unit 510 is composed of the first sub-source unit 511 and the second sub-source unit 512 , and the display panel 100 further includes the first source-drain unit 520 and the second sub-source unit 520 .
  • the first sub-source unit 511 and the second sub-source unit 512 are connected through the third via hole 130 , please refer to FIG. 4 to FIG. 7 for details.
  • the display panel 100 also includes fan-out traces arranged on the same layer as the second sub-source unit 512, so the electrical signals on the same layer of the second sub-source unit 512 are more complicated, and the metal shielding layer Being located between the first source-drain unit 520 and the second source-drain unit 520 can better shield the AC signal of the same layer of the second sub-source unit 512 and provide it to the gate unit 310 The best AC signal shielding effect.
  • the metal shielding unit 600 is located at the periphery of the third via hole 130 , and the metal shielding unit 600 is electrically connected to the second source-drain unit 520 through the third via hole 130 . See Figure 5.
  • the metal shielding unit 600 is electrically connected to the first sub-drain unit 521 through a via hole, and the source unit 510 has more film layers and more complex holes, avoiding complex holes and simplifying the process , strengthen the charging stability of the metal shielding unit 600 , and provide the gate unit 310 with the best shielding effect of alternating current signals.
  • the display panel 100 further includes a second insulating layer 220 on the source and drain layers of the display panel 100 , and an anode layer on the second insulating layer 220 .
  • the anode layer includes a plurality of anode units 700 , and one of the metal shielding units 600 is electrically connected to one of the anode units 700 .
  • the second insulating layer 220 includes a plurality of fourth vias 140 , and the fourth vias 140 penetrate through the second insulating layer 220 to expose the metal shielding unit 600 . Please refer to FIG. 6 for details.
  • the metal shielding unit 600 is electrically connected to the anode unit 700 through the fourth via hole 140 , and the holes in the source and drain layers are also complicated, avoiding complex holes, simplifying the process, and enhancing the charging stability of the metal shielding unit 600 .
  • the gate unit 310 is provided with the best AC signal shielding effect.
  • the display panel 100 further includes a metal light shielding layer 800 on the substrate 200 , and the source units 510 of the source and drain layers of the display panel 100 pass through the first via holes 110 It is electrically connected to the metal light shielding layer 800 , and the metal shielding layer is electrically connected to the metal light shielding layer 800 through a plurality of second via holes 120 .
  • the display panel 100 further includes a third insulating layer 230 located between the metal light shielding layer 800 and the gate layer. Since the position of the metal shielding unit 600 can be set in various ways, the first via hole 110 that is electrically connected between the source unit 510 and the metal light shielding layer 800 needs to pass through correspondingly.
  • the metal shielding unit 600 is connected to The positions of the second via holes 120 for electrical connection between the metal light shielding layers 800 may pass through correspondingly, which is not limited herein.
  • the specific structure of the source and drain layers is also not limited, please refer to FIG. 7 for details.
  • the source unit 510 balances the potential of the metal light shielding layer 800, which is beneficial to the electrical balance and electrical stability of the display panel 100.
  • the metal shielding unit 600 is electrically connected to the metal light shielding layer 800 through the second via hole 120. Similarly The effect of making the metal shielding unit 600 carry a constant voltage can be achieved.
  • the complex holes are avoided, the process is simplified, the charging stability of the metal shielding unit 600 is enhanced, and the best AC signal shielding effect is provided to the gate unit 310 .
  • the metal shielding unit 600 includes at least a first shielding component 610 and a second shielding component 620, and the first shielding component 610 and the second shielding component 620 are disposed in different layers.
  • the first shielding member 610 is electrically connected to the source unit 510 of the source-drain layer of the display panel 100
  • the second shielding member 620 is electrically connected to the drain unit 520 of the source-drain layer of the display panel 100
  • the second shielding member 620 is connected or electrically connected to the anode layer of the display panel 100 , please refer to FIG. 8 for details.
  • the display panel 100 includes a first area 132 close to the bending area, and in the direction of the data lines, the distance between two adjacent array units 150 in the first area 132 is smaller than the The distance between two adjacent array units 150 at the periphery of the first area 132 .
  • the metal shielding layer is located in the first region 132 .
  • the direction of the data line represents the Y direction in FIG. 9 , and the position of the bending area is close to the first side edge 131 , please refer to FIG. 9 for details.
  • the display panel 100 further includes a pixel definition layer including a plurality of openings on the anode layer, and a light emitting layer.
  • the first area 132 corresponds to the lower border area of the display panel 100 , the spacing between the array units 150 is shortened, and the film where the second sub-source unit 512 of the second source-drain unit 520 is located is used.
  • the wiring of the layer connects the anode unit 700 with the output circuit.
  • the first area 132 will cover the light emitting unit of the light emitting layer, which can effectively reduce the lower frame. Since the first region 132 is in the working stage, the gate unit 310 will be affected by the coupling effect of the surrounding AC signals, resulting in differences in the luminous brightness of each row.
  • the metal shielding unit 600 can better enhance the shielding effect of the AC signal on the gate unit 310 effect, reduce display unevenness and improve display effect.
  • the array unit 150 in the first area 132 , is not included in the orthographic projection of some light-emitting units of the display panel 100 on the display panel 100 , and the light-emitting units correspond to the array units.
  • the cells 150 are electrically connected by leads.
  • the spacing between some of the array units in the first area 132 is compressed, and the placement position of the light-emitting unit does not need to be changed.
  • the light-emitting unit and the corresponding array unit 150 are electrically connected by wires.
  • the position is vacated, and fan-out traces or bent traces can be set, which greatly reduces the width of the lower frame, but at the same time, the gate unit 310 is also greatly affected by the coupling effect of the surrounding AC signals.
  • the metal shielding unit 600 The influence of the coupling effect of the AC signal can be well reduced in the first region, the uneven display is reduced, and the display effect is improved.
  • the material of the metal shielding layer is any one or a combination of indium tin oxide, nano-silver, and carbon nanotubes.
  • indium tin oxide (ITO) material has good transparency
  • nano-silver has good thermal conductivity
  • carbon nanotube has good static electricity conduction function, which can strengthen the effect of the metal shielding unit 600 .
  • the thickness of the metal shielding unit 600 is 500 angstroms to 1000 angstroms.
  • the influence of the AC signal between two adjacent gate units is reduced, the display unevenness is reduced, and the display effect is improved.
  • the present application also discloses a method for manufacturing a display panel 100 , including:
  • One of the metal shielding units 600 corresponds to one of the gate units 310 , and the metal shielding layer is used to shield the AC signal between two adjacent gate units 310 .
  • the influence of the AC signal between two adjacent gate units is reduced, the display unevenness is reduced, and the display effect is improved.
  • the manufacturing method of the display panel 100 includes:
  • the method before forming the gate layer, the method further includes:
  • the gate layer is formed on the third insulating layer 230 away from the metal light shielding layer 800 .
  • the display panel 100 further includes an active layer 400 on the third insulating layer 230 and a fourth insulating layer 240 on the active layer 400 .
  • the gate layer is located on the fourth insulating layer 240 and away from the substrate 200 .
  • the active layer 400 includes a plurality of silicon islands, and the source and drain layers are electrically connected to the active layer 400 through vias, even if the source unit and the drain unit are connected to the silicon through vias The island is electrically connected.
  • 400 is used to represent the silicon island, and the label will not be repeated. Please refer to Figure 1 to Figure 8 for details.
  • the gate layer is formed on the fourth insulating layer 240 away from the metal light shielding layer 800 .
  • the steps of forming the gate layer and the first insulating layer 210 include:
  • the gate unit 310 includes a first gate 311 and at least one second gate 312 opposite to the first gate 311 , the first gate 311 and the second gate 312
  • the gate 312 is provided in isolation.
  • the orthographic projection of the first gate 311 on the substrate 200 is located within the orthographic projection of the metal shielding unit 600 on the substrate 200 , or/and the second gate 312 is located there.
  • the orthographic projection on the substrate 200 is located within the orthographic projection of the metal shielding unit 600 on the substrate 200 .
  • the display panel 100 includes a first sub-insulating layer 211 located between the first gate 311 and the second gate 312, and a second sub-insulating layer 212 located on the second gate.
  • the first sub-insulating layer 211 and the second sub-insulating layer 212 constitute the first insulating layer 210 , please refer to FIG. 2 and FIG. 3 for details.
  • the second gate 312 is The perspective relationship is moved to the top, in fact, the first gate 312 is located between the first gate 311 and the metal shielding unit 600 .
  • the shielding principle of the metal shielding layer is similar to the electromagnetic shielding principle of the Faraday electromagnetic cage.
  • the first gate 311 unit 310 is located on the side close to the substrate 200 .
  • the orthographic projection of the unit 310 of the second gate 312 on the substrate 200 is located within the orthographic projection of the unit 310 of the first grid 311 on the substrate 200 .
  • the orthographic projection of the second gate 312 on the substrate 200 is located within the orthographic projection of the metal shielding unit 600 on the substrate 200 .
  • FIG. 2 and FIG. 3 wherein FIG. 3 In the figure, for convenience of illustration, the perspective relationship of the second grid 312 is moved to the top, in fact, the first grid 312 is located between the first grid 311 and the metal shielding unit 600 .
  • the metal shielding unit 600 may not be electrically connected to other film layers, which reduces the perforation of the film layer. In a plan view, the metal shielding unit 600 only needs to cover the second gate 312 unit 310 at a minimum to achieve the shielding of AC signals. .
  • any one of the metal shielding units 600 is electrically connected to the constant voltage signal terminal of the display panel 100 .
  • the metal shielding unit 600 can form a certain magnetic field, which can shield the AC signal more stably.
  • the connection between two adjacent metal shielding units 600 protects the grid.
  • the pole unit 310 is not affected by the surrounding alternating current signal, which reduces display unevenness and improves the display effect.
  • step S200 it includes:
  • the display panel 100 further includes a source and drain layer on the first insulating layer 210 and on a side away from the gate layer.
  • the metal shielding layer is electrically connected to the source and drain layers. Please refer to FIG. 4 and FIG. 5 for details.
  • the charged film layer closest to the gate layer is the source and drain layers, and is electrically connected to the source and drain layers through the metal shielding layer, so as to provide the gate unit 310 with the best shielding effect of alternating current signals.
  • the source-drain layer includes a plurality of source units 510 and a plurality of drain units 520, a metal shielding unit 600 is electrically connected to a source unit 510 and/or a metal
  • the shielding unit 600 is electrically connected to one of the drain units 520 .
  • the source unit 510 and the drain unit 520 are on the periphery of the gate unit 310. Please refer to FIG. 4 and FIG. 5 for details.
  • the metal shielding unit 600 can be connected to which side it is convenient to connect to.
  • the source unit 510 or/and the drain unit 520 on the side are connected to facilitate shielding of AC signals.
  • step S210 includes:
  • the first source-drain unit 520 includes a first sub-source unit 511 and a first sub-drain unit 521 .
  • the second source-drain unit 520 includes a second sub-source unit 512, the second sub-source unit 512 is electrically connected to the first sub-source unit 511, and the metal shielding layer Located between the first source-drain unit and the second source-drain unit, please refer to FIG. 4 to FIG. 8 for details.
  • step S212 it includes:
  • the first sub-source unit 511 and the second sub-source unit 512 are connected through the third via hole 130 .
  • the display panel 100 also includes fan-out traces arranged on the same layer as the second sub-source unit 512, so the electrical signals on the same layer of the second sub-source unit 512 are more complicated, and the metal shielding layer Located between the first source-drain unit 520 and the second source-drain unit 520 , please refer to FIG. 4 to FIG. 7 for details, which can better shield the AC at the same layer of the second sub-source unit 512
  • the electric signal is provided to the gate unit 310 with the best shielding effect of the alternating current electric signal.
  • the metal shielding unit 600 is located at the periphery of the third via hole 130 , and the metal shielding unit 600 is electrically connected to the second source-drain unit 520 through the third via hole 130 . See Figure 5.
  • the metal shielding unit 600 is electrically connected to the first sub-drain unit 521 through a via hole, the source unit 510 has many film layers, and the holes are also more complex, avoiding complex holes and simplifying the process , strengthen the charging stability of the metal shielding unit 600 , and provide the gate unit 310 with the best shielding effect of alternating current signals.
  • step S300 it further includes:
  • step S400 it further includes:
  • the anode layer includes a plurality of anode units 700 , and one of the metal shielding units 600 is electrically connected to one of the anode units 700 .
  • the second insulating layer 220 includes a plurality of fourth vias 140 , and the fourth vias 140 penetrate through the second insulating layer 220 to expose the metal shielding unit 600 .
  • the metal shielding unit 600 is electrically connected to the anode unit 700 through the fourth via hole 140 , and the holes in the source and drain layers are also complicated, avoiding complex holes, simplifying the process, and enhancing the charging stability of the metal shielding unit 600 .
  • the gate unit 310 is provided with the best AC signal shielding effect.
  • the steps further include:
  • a plurality of first openings 110 are formed on the first insulating layer 210 , and the first openings 110 expose the metal light shielding layer 800 .
  • the first insulating layer 210 may be a first sub-insulating layer 211 or a second sub-insulating layer 212 .
  • the steps further include:
  • a plurality of second openings 120 are formed on the fifth insulating layer 250 , and the second openings 120 expose the metal light shielding layer 800 .
  • the display panel 100 further includes a metal light shielding layer 800 on the substrate 200 , and the source units 510 of the source and drain layers of the display panel 100 pass through the first via holes 110 It is electrically connected to the metal light shielding layer 800 , and the metal shielding layer is electrically connected to the metal light shielding layer 800 through a plurality of second via holes 120 . Since the position of the metal shielding unit 600 can be set in various ways, the first via hole 110 that is electrically connected between the source unit 510 and the metal light shielding layer 800 needs to pass through correspondingly. Therefore, the metal shielding unit 600 is connected to The positions of the second via holes 120 for electrical connection between the metal light shielding layers 800 may pass through correspondingly, which is not limited herein.
  • the specific structure of the source and drain layers is also not limited.
  • the display panel 100 further includes a third insulating layer 230 located between the metal light shielding layer 800 and the gate layer.
  • the source unit 510 balances the potential of the metal light shielding layer 800, which is beneficial to the electrical balance and electrical stability of the display panel 100.
  • the metal shielding unit 600 is electrically connected to the metal light shielding layer 800 through the second via hole 120. Similarly The effect of making the metal shielding unit 600 carry a constant voltage can be achieved. For details, please refer to FIG. 7 .
  • the complex holes are avoided, the process is simplified, the charging stability of the metal shielding unit 600 is enhanced, and the best AC signal shielding effect is provided to the gate unit 310 .
  • the step of forming the metal shielding layer includes:
  • a metal shielding unit 600 including at least a first shielding member 610 and a second shielding member 620 is formed, and the first shielding member 610 and the second shielding member 620 are disposed in different layers.
  • the metal shielding unit 600 includes at least a first shielding component 610 and a second shielding component 620, and the first shielding component 610 and the second shielding component 620 are disposed in different layers.
  • the first shielding member 610 is electrically connected to the source unit 510 of the source-drain layer of the display panel 100
  • the second shielding member 620 is electrically connected to the drain unit 520 of the source-drain layer of the display panel 100
  • the second shielding member 620 is connected or electrically connected to the anode layer of the display panel 100 , please refer to FIG. 8 for details.
  • the step of forming the gate layer includes:
  • a plurality of gate units 310 are formed in the first region 132 of the display panel 100 close to the bending region.
  • One of the gate units 310 forms an array unit 150 , please refer to FIG. 9 for details.
  • step S500 it further includes:
  • the display panel 100 includes a first area 132 close to the bending area, and in the direction of the data lines, the distance between two adjacent array units 150 in the first area 132 is smaller than the The distance between two adjacent array units 150 at the periphery of the first area 132 .
  • the metal shielding layer is located in the first region 132 .
  • the direction of the data line represents the Y direction in FIG. 9 , please refer to FIG. 9 for details.
  • the display panel 100 further includes a pixel definition layer including a plurality of openings on the anode layer, and a light emitting layer.
  • the first area 132 corresponds to the lower border area of the display panel 100 , the spacing between the array units 150 is shortened, and the film where the second sub-source unit 512 of the second source-drain unit 520 is located is used.
  • the wiring of the layer connects the anode unit 700 with the output circuit.
  • the first area 132 will cover the light emitting unit of the light emitting layer, which can effectively reduce the lower frame. Since the first region 132 is in the working stage, the gate unit 310 will be affected by the coupling effect of the surrounding AC signals, resulting in differences in the luminous brightness of each row.
  • the metal shielding unit 600 can better enhance the shielding effect of the AC signal on the gate unit 310 effect, reduce display unevenness and improve display effect.
  • the array unit 150 in the first area 132, is not included in the orthographic projection of some of the light-emitting units of the display panel 100 on the display panel 100, and the light-emitting units correspond to the array units.
  • the cells 150 are electrically connected by leads.
  • the spacing between some of the array units in the first area 132 is compressed, and the placement position of the light-emitting unit does not need to be changed.
  • the light-emitting unit and the corresponding array unit 150 are electrically connected by wires.
  • the position is vacated, and fan-out traces or bent traces can be set, which greatly reduces the width of the lower frame, but at the same time, the gate unit 310 is also greatly affected by the coupling effect of the surrounding AC signals.
  • the metal shielding unit 600 The influence of the coupling effect of the AC signal can be well reduced in the first region, the uneven display is reduced, and the display effect is improved.
  • the material of the metal shielding layer is any one or a combination of indium tin oxide, nano-silver, and carbon nanotubes.
  • indium tin oxide (ITO) material has good transparency
  • nano-silver has good thermal conductivity
  • carbon nanotube has good static electricity conduction function, which can strengthen the effect of the metal shielding unit 600 .
  • the thickness of the metal shielding unit 600 is 500 angstroms to 1000 angstroms.
  • the influence of the AC signal between two adjacent gate units is reduced, the display unevenness is reduced, and the display effect is improved.
  • the present application also discloses a display device including the display panel 100 as described above.
  • the present application discloses a display panel and a manufacturing method thereof.
  • the display panel includes a substrate, a gate layer on the substrate, a first insulating layer on the gate layer, and a metal shielding layer on the first insulating layer;
  • the gate layer includes a plurality of gates a pole unit;
  • the metal shielding layer includes a plurality of metal shielding units, one of the metal shielding units corresponds to one of the gate units; wherein, the metal shielding layer is used for shielding the AC signal between two adjacent gate units.
  • the present application by disposing a metal shielding layer on the gate layer and utilizing the principle of electrical shielding, the influence of the AC signal between two adjacent gate units is reduced, the display unevenness is reduced, and the display effect is improved.

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Abstract

一种显示面板(100)及其制作方法，显示面板(100)包括衬底(200)、位于衬底(200)上包括多个栅极单元(310)的栅极层、位于栅极层上的第一绝缘层(210)、及位于第一绝缘层(210)上的金属屏蔽层；金属屏蔽层包括与栅极单元(310)对应的金属屏蔽单元(600)。通过设置金属屏蔽层，利用电屏蔽原理，减少栅极单元(310)之间的交流信号影响，改善了显示效果。

Description

显示面板及其制作方法 技术领域
本本申请涉及显示领域，具体涉及一种显示面板及其制作方法。
 背景技术
随着生活水平的提高，极窄边框的显示屏幕越来越受到各大厂商及人民的喜爱。
现有技术中，在极窄边框的显示屏幕或高分辨率屏幕中，阵列单元的布线非常密集复杂，阵列单元容易受到相邻元器件中交流信号的耦合效应的影响，导致显示不均，出现显示异常。
因此，亟需一种显示面板及其制作方法以解决上述技术问题。
 技术问题
本申请提供了一种显示面板及其制作方法，以解决现有技术中，阵列单元容易受到相邻元器件中交流信号的耦合效应的影响，导致显示不均的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
一种显示面板，包括衬底、位于所述衬底上的栅极层、位于所述栅极层上的第一绝缘层、及位于所述第一绝缘层上的金属屏蔽层；
所述栅极层包括多个栅极单元，所述金属屏蔽层包括多个金属屏蔽单元，一所述金属屏蔽单元对应一所述栅极单元；
其中，所述金属屏蔽层用于屏蔽相邻两个所述栅极单元之间的交流信号。
在本申请的显示面板中，所述栅极单元包括一第一栅极及至少一与所述第一栅极相对设置的第二栅极，所述第一栅极与所述第二栅极绝缘设置；
在一个子像素内，所述第一栅极或/和所述第二栅极在所述衬底上的正投影位于所述金属屏蔽单元在所述衬底上的正投影之内。
在本申请的显示面板中，任一所述金属屏蔽单元与所述显示面板的恒压信号端电连接。
在本申请的显示面板中，所述显示面板还包括位于所述第一绝缘层上的源漏极层，所述金属屏蔽层与所述源漏极层电连接。
在本申请的显示面板中，所述源漏极层包括多个第一源漏极单元及与所述第一源漏极单元对应的第二源漏极单元，所述第一源漏极单元与所述第二源漏极单元异层设置；
所述第一源漏极单元包括第一子源极单元及第一子漏极单元，所述第二源漏极单元包括第二子源极单元，所述第二子源极单元与所述第一子源极单元电连接，所述金属屏蔽层位于所述第一源漏极单元与所述第二源漏极单元之间。
在本申请的显示面板中，所述显示面板还包括位于源漏极层上的第二绝缘层、位于所述第二绝缘层上的阳极层；
其中，所述阳极层包括多个阳极单元，一所述金属屏蔽单元与一所述阳极单元电连接。
在本申请的显示面板中，所述显示面板还包括位于所述衬底上的金属遮光层，源漏极层的多个源极单元通过多个第一过孔与所述金属遮光层电连接，所述金属屏蔽层与所述金属遮光层通过多个第二过孔电连接。
在本申请的显示面板中，所述金属屏蔽单元至少包括第一屏蔽部件与第二屏蔽部件，所述第一屏蔽部件与所述第二屏蔽部件异层设置；
所述第一屏蔽部件与源漏极层的源极单元电连接，所述第二屏蔽部件与所述源漏极层的漏极单元电连接，或者所述第二屏蔽部件与阳极层电连接。
在本申请的显示面板中，所述显示面板包括靠近弯折区的第一区域，在数据线的方向上，所述第一区域内的相邻两个阵列单元之间的间距小于所述第一区域外围的相邻两个所述阵列单元之间的间距；
其中，所述金属屏蔽层位于所述第一区域内。
在本申请的显示面板中，在所述第一区域内，部分所述显示面板的发光单元在所述显示面板上的正投影内无所述阵列单元，所述发光单元与对应所述阵列单元通过引线电连接。
本申请还提供了一种显示面板的制作方法，包括：
在衬底上形成包括多个栅极单元的栅极层；
在所述栅极层上形成第一绝缘层；
在所述第一绝缘层上形成包括多个金属屏蔽单元的金属屏蔽层；
其中，一所述金属屏蔽单元对应一所述栅极单元，所述金属屏蔽层用于屏蔽相邻两个所述栅极单元之间的交流信号。
在本申请的显示面板的制作方法中，形成所述栅极层及所述第一绝缘层的步骤包括：
在衬底上形成多个第一栅极；
在所述第一栅极上形成第一子绝缘层；
在所述第一子绝缘层上形成多个第二栅极；
在所述第二栅极上形成第二子绝缘层；
其中，所述第一子绝缘层与所述第二子绝缘层构成第一绝缘层，所述第一栅极与所述第二栅极相对设置，所述第一栅极或/和所述第二栅极在所述衬底上的正投影位于对应所述金属屏蔽单元在所述衬底上的正投影之内。
在本申请的显示面板的制作方法中，任一所述金属屏蔽单元与所述显示面板的恒压信号端电连接。
在本申请的显示面板的制作方法中，在所述栅极层上形成第一绝缘层之后，还包括：
在所述第一绝缘层上形成源漏极层；
其中，所述金属屏蔽层与所述源漏极层电连接。
在本申请的显示面板的制作方法中，在所述第一绝缘层上形成源漏极层的步骤包括：
在所述第一绝缘层上形成多个包括第一子源极单元及第一子漏极单元的第一源漏极单元；
在所述第一源漏极单元上形成第五绝缘层；
在所述第五绝缘层上形成多个第三过孔，所述第三过孔使所述第一子源极单元裸露；
在所述第五绝缘层上形成与所述第一漏极单元对应的第二元漏极单元；
其中，所述第二源漏极单元包括第二子源极单元，所述第二子源极单元与所述第一子源极单元电连接，所述金属屏蔽层位于所述第一源漏极单元与所述第二源漏极单元之间。
在本申请的显示面板的制作方法中，在形成所述栅极层之前还包括在衬底上形成金属遮光层；
在形成第一绝缘层时步骤还包括在所述第一绝缘层上形成多个第一开孔，所述第一开孔使所述金属遮光层裸露；
在形成所述第五绝缘层的步骤还包括在所述第五绝缘层上形成多个第二开孔，所述第二开孔使所述金属遮光层裸露；
其中，所述源漏极层通过所述第一过孔与所述金属遮光层电连接，所述金属屏蔽层通过所述第二过孔与所述金属遮光层电连接。
在本申请的显示面板的制作方法中，在所述第一绝缘层上形成包括多个金属屏蔽单元的金属屏蔽层之后还包括：
在所述面板的源漏极层上形成第二绝缘层；
在所述第二绝缘层上形成多个第四过孔；
在所述第二绝缘层上形成包括多个阳极单元的阳极层；
其中，所述金属屏蔽单元通过所述第四过孔与所述阳极单元电连接。
在本申请的显示面板的制作方法中，所述金属屏蔽单元至少包括第一屏蔽部件与第二屏蔽部件，所述第一屏蔽部件与所述第二屏蔽部件异层设置；
所述第一屏蔽部件与源漏极层的源极单元电连接，所述第二屏蔽部件与所述源漏极层的漏极单元电连接，或者所述第二屏蔽部件与阳极层电连接。
在本申请的显示面板的制作方法中，所述显示面板包括靠近弯折区的第一区域，在数据线的方向上，所述第一区域内的相邻两个阵列单元之间的间距小于所述第一区域外围的相邻两个所述阵列单元之间的间距；
其中，所述金属屏蔽层位于所述第一区域内。
在本申请的显示面板的制作方法中，在所述第一区域内，部分所述显示面板的发光单元在所述显示面板上的正投影内无所述阵列单元，所述发光单元与对应所述阵列单元通过引线电连接。
 有益效果
本申请通过在栅极层上设置金属屏蔽层，利用电屏蔽原理，减少相邻两栅极单元之间的交流信号影响，减少了显示不均，改善了显示效果。
 附图说明
图1为本申请显示面板的第一种结构示意图；
图2为本申请显示面板的第二种结构示意图；
图3为本申请显示面板的局部俯视示意图；
图4为本申请显示面板的第三种结构示意图；
图5为本申请显示面板的第四种结构示意图；
图6为本申请显示面板的第五种结构示意图；
图7为本申请显示面板的第六种结构示意图；
图8为本申请显示面板的第七种结构示意图；
图9为本申请显示面板的俯视示意图；
图10为本申请显示面板的制作方法步骤流程图。
 本发明的实施方式
本申请提供一种显示面板及其制作方法，为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
请参阅图1~图9，本申请公开了一种显示面板100，包括衬底200、位于所述衬底200上的栅极层、位于所述栅极层上的第一绝缘层210、及位于所述第一绝缘层210上的金属屏蔽层；
所述栅极层包括多个栅极单元310，所述金属屏蔽层包括多个金属屏蔽单元600，一所述金属屏蔽单元600对应一所述栅极单元310；
其中，所述金属屏蔽层用于屏蔽相邻两个所述栅极单元310之间的交流信号。
本申请通过在栅极层上设置金属屏蔽层，利用电屏蔽原理，减少相邻两栅极单元之间的交流信号影响，减少了显示不均，改善了显示效果。
现结合具体实施例对本申请的技术方案进行描述。
请参阅图1~图9，所述显示面板100，包括衬底200、位于所述衬底200上的栅极层、位于所述栅极层上的第一绝缘层210、及位于所述第一绝缘层210上的金属屏蔽层。所述栅极层包括多个栅极单元310。所述金属屏蔽层包括多个金属屏蔽单元600，一所述金属屏蔽单元600对应一所述栅极单元310。其中，所述金属屏蔽层用于屏蔽相邻两个所述栅极单元310之间的交流信号。
本实施例中，金属屏蔽层的屏蔽原理类似于法拉第电磁笼的电磁屏蔽原理，通过在栅极单元310附近设置金属屏蔽单元600，反射周围交流电信号，避免栅极单元310之间的交流信号的影响，减少了显示不均，改善了显示效果。
本实施例中，所述显示面板100还包括位于所述第三绝缘层230上的有源层400、及位于所述有源层400上的第四绝缘层240。所述栅极层位于所述第四绝缘层240上、及远离所述衬底200一侧。所述有源层400包括多个硅岛，所述源漏极层通过过孔与所述有源层400电连接，即使所述源极单元及所述漏极单元通过过孔与所述硅岛电连接，图中用400代表硅岛，不再重复标号，具体请参阅图1~图9。
本实施例中，所述栅极单元310包括一第一栅极311及至少一与所述第一栅极311相对设置的第二栅极312，所述第一栅极311与所述第二栅极312绝缘设置。在一个子像素内，所述第一栅极311在所述衬底200上的正投影位于对应所述金属屏蔽单元600在所述衬底200上的正投影之内，或/和所述第二栅极312在所述衬底200上的正投影位于对应所述金属屏蔽单元600在所述衬底200上的正投影之内。所述显示面板100包括位于所述第一栅极311与所述第二栅极312之间的第一子绝缘层211、及位于所述第二栅极上的第二子绝缘层212。所述第一子绝缘层211与所述第二子绝缘层212构成所述第一绝缘层210，具体请参阅图2、图3，其中图3中，为方便展示，将第二栅极312的透视关系移至顶端，实际为所述第一栅极312位于第一栅极311与所述金属屏蔽单元600之间。金属屏蔽层的屏蔽原理类似于法拉第电磁笼的电磁屏蔽原理，通过在栅极单元310附近设置金属屏蔽单元600，反射周围交流电信号，避免栅极单元310之间的交流信号的影响，减少了显示不均，改善了显示效果。
本实施例中，相比于所述第二栅极312单元310，所述第一栅极311单元310位于靠近所述衬底200一侧。所述第二栅极312单元310在所述衬底200上的正投影位于所述第一栅极311单元310在所述衬底200上的正投影之内。所述第二栅极312在所述衬底200上的正投影位于对应所述金属屏蔽单元600在所述衬底200上的正投影之内，具体请参阅图2、图3，其中图3中，为方便展示，将第二栅极312的透视关系移至顶端，实际为所述第一栅极312位于第一栅极311与所述金属屏蔽单元600之间。金属屏蔽单元600可以不和其他膜层有电连接，减少了膜层打孔，在俯视图中，所述金属屏蔽单元600只需最小覆盖第二栅极312单元310，即可实现交流信号的屏蔽。
本实施例中，任一所述金属屏蔽单元600与所述显示面板100的恒压信号端电连接，具体请参阅图4~图8。通过对所述金属屏蔽单元600施加恒压电信号，所述金属屏蔽单元600可以形成一定磁场，可以更加稳定地屏蔽交流电信号，相邻两个所述金属屏蔽单元600之间连接，保护栅极单元310不受周围交流电信号的影响，减少了显示不均，改善了显示效果。
本实施例中，所述显示面板100还包括位于所述第一绝缘层210上及远离所述栅极层一侧的源漏极层。所述金属屏蔽层与所述源漏极层电连接，具体请参阅图4、图5。距离所述栅极层最近的带电膜层是源漏极层，通过所述金属屏蔽层与所述源漏极层电连接，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，所述源漏极层包括多个源极单元510及多个漏极单元520，一所述金属屏蔽单元600与一所述源极单元510电连接和/或一所述金属屏蔽单元600与一所述漏极单元520电连接，具体请参阅图4、图5。所述源极单元510以及所述漏极单元520在所述栅极单元310的外围，所述金属屏蔽单元600与哪一侧方便连接，即可与哪一侧的所述源极单元510或/和所述漏极单元520相连接，方便了屏蔽交流电信号。
本实施例中，所述源漏极层包括多个第一源漏极单元520及与所述第一源漏极单元520对应的第二源漏极单元520，所述第一源漏极单元520与所述第二源漏极单元520异层设置。所述第一源漏极单元520包括第一子源极单元511及第一子漏极单元521。所述第二源漏极单元520包括第二子源极单元512，所述第二子源极单元512与所述第一子源极单元511电连接。其中，所述金属屏蔽层位于所述第一源漏极单元520与所述第二源漏极单元520之间，所述第一源漏极单元520靠近所述衬底200一侧。所述源极单元510由所述第一子源极单元511与所述第二子源极单元512构成，所述显示面板100还包括位于所述第一源漏极单元520与所述第二源漏极单元520之间的第五绝缘层250、位于所述第五绝缘层250上的包括多个金属屏蔽单元600的金属屏蔽层、及位于所述金属屏蔽层上的第六绝缘层260，所述第六绝缘层260包括多个第三过孔130，所述第三过孔130贯穿所述第六绝缘层260及所述第五绝缘层250。所述第一子源极单元511与所述第二子源极单元512通过所述第三过孔130连接，具体请参阅图4~图7。所述显示面板100还包括与所述第二子源极单元512同层设置的扇出走线，所以所述第二子源极单元512的同层的电信号更为复杂，所述金属屏蔽层位于所述第一源漏极单元520与所述第二源漏极单元520之间，可以更好屏蔽所述第二子源极单元512的同层的交流电信号，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，所述金属屏蔽单元600位于所述第三过孔130的外围，所述金属屏蔽单元600通过所述第三过孔130与所述第二源漏极单元520电连接，具体请参阅图5。
本实施例中，所述金属屏蔽单元600通过过孔与所述第一子漏极单元521电连接，源极单元510处的膜层较多，孔洞也较复杂，避开复杂孔洞，简化工艺，加强金属屏蔽单元600的带电稳定，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，所述显示面板100还包括位于所述显示面板100的源漏极层上的第二绝缘层220、及位于所述第二绝缘层220上的阳极层。其中，所述阳极层包括多个阳极单元700，一所述金属屏蔽单元600与一所述阳极单元700电连接。所述第二绝缘层220包括多个第四过孔140，所述第四过孔140贯穿所述第二绝缘层220，至使所述金属屏蔽单元600裸露，具体请参阅图6。所述金属屏蔽单元600通过所述第四过孔140与所述阳极单元700电连接，源漏极层的孔洞也较复杂，避开复杂孔洞，简化工艺，加强金属屏蔽单元600的带电稳定，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，所述显示面板100还包括位于所述衬底200上的金属遮光层800，所述显示面板100的源漏极层的多个源极单元510通过多个第一过孔110与所述金属遮光层800电连接，所述金属屏蔽层与所述金属遮光层800通过多个第二过孔120电连接。所述显示面板100还包括位于所述金属遮光层800与所述栅极层之间的第三绝缘层230。由于所述金属屏蔽单元600的位置有多种设置方式，所以源极单元510与所述金属遮光层800之间电连接的第一过孔110位置相应贯穿即可，所以金属屏蔽单元600单元与所述金属遮光层800之间电连接的第二过孔120位置相应贯穿即可，在此不做限定。源漏极层的具体结构也不做限定，具体请参阅图7。源极单元510使金属遮光层800电位平衡，有利于所述显示面板100的电平衡及电稳定性，所述金属屏蔽单元600通过第二过孔120与所述金属遮光层800电连接，同样可以达到使所述金属屏蔽单元600带恒定电压的效果。避开复杂孔洞，简化工艺，加强金属屏蔽单元600的带电稳定，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，所述金属屏蔽单元600至少包括第一屏蔽部件610与第二屏蔽部件620，所述第一屏蔽部件610与所述第二屏蔽部件620异层设置。所述第一屏蔽部件610与所述显示面板100的源漏极层的源极单元510电连接，所述第二屏蔽部件620与所述显示面板100的源漏极层的漏极单元520电连接或者所述第二屏蔽部件620与所述显示面板100的阳极层电连接，具体请参阅图8。通过在不同膜层设置屏蔽部件，加强对栅极单元310的交流信号屏蔽的效果，减少了显示不均，改善了显示效果。
本实施例中，所述显示面板100包括靠近弯折区的第一区域132，在数据线的方向上，所述第一区域132内的相邻两个阵列单元150之间的间距小于所述第一区域132外围的相邻两个阵列单元150之间的间距。其中，所述金属屏蔽层位于所述第一区域132内。数据线的方向在图9中代表Y方向，弯折区的位置靠近第一侧边131，具体请参阅图9。所述显示面板100还包括位于所述阳极层上包括多个开口的像素定义层、及发光层。所述第一区域132对应所述显示面板100的下边框区域，缩短所述阵列单元150之间的间距，利用所述第二源漏极单元520的所述第二子源极单元512所在膜层的走线，将阳极单元700的与输出电路连接，对于下边框区域，所述第一区域132上方会覆盖所述发光层的发光单元，可以有效减小下边框。由于第一区域132在工作阶段，栅极单元310会受周围交流信号的耦合效应影响，从而导致各行发光亮度存在差异，金属屏蔽单元600可以更好地加强对栅极单元310的交流信号屏蔽的效果，减少了显示不均，改善了显示效果。
本实施例中，在所述第一区域132内，部分所述显示面板100的发光单元在所述显示面板100上的正投影内无所述阵列单元150，所述发光单元与对应所述阵列单元150通过引线电连接。对于下边框区域，将所述第一区域132内的部分阵列单元之间的间距压缩，发光单元设置位置不用改变，所述发光单元与对应所述阵列单元150通过引线电连接，原阵列单元的位置被空出来，可以设置扇出走线或设置弯折走线，极大减小了下边框宽度，但同时栅极单元310受周围交流信号的耦合效应的影响也加重，所述金属屏蔽单元600可以很好地在第一区域内减小交流信号的耦合效应的影响，减少了显示不均，改善了显示效果。
本实施例中，所述金属屏蔽层的材料为氧化铟锡、纳米银、碳纳米管中的任意一种或多种的组合。其中，氧化铟锡（ITO）材料透明度好，纳米银具有良好的导热性，碳纳米管具有良好的导静电功能，可以加强对所述金属屏蔽单元600的效果补充。
本实施例中，所述金属屏蔽单元600的厚度为500埃米~1000埃米。
本申请通过在栅极层上设置金属屏蔽层，利用电屏蔽原理，减少相邻两栅极单元之间的交流信号影响，减少了显示不均，改善了显示效果。
请参阅图1~图10，本申请还公开了一种显示面板100的制作方法，包括：
S100、在衬底200上形成包括多个栅极单元310的栅极层；
S200、在所述栅极层上形成第一绝缘层210；
S300、在所述第一绝缘层210上形成包括多个金属屏蔽单元600的金属屏蔽层；
其中，一所述金属屏蔽单元600对应一所述栅极单元310，所述金属屏蔽层用于屏蔽相邻两个所述栅极单元310之间的交流信号。
本申请通过在栅极层上设置金属屏蔽层，利用电屏蔽原理，减少相邻两栅极单元之间的交流信号影响，减少了显示不均，改善了显示效果。
现结合具体实施例对本申请的技术方案进行描述。
请参阅图1~图10，所述显示面板100的制作方法包括：
S100、在衬底200上形成包括多个栅极单元310的栅极层。
本实施例中，在形成所述栅极层之前还包括：
S90、在衬底200上形成金属遮光层800。
S91、在所述遮光层上形成第三绝缘层230。
本实施例中，所述栅极层形成于所述第三绝缘层230上，远离所述金属遮光层800一侧。
S92、在所述第三绝缘层230上形成有源层400。
本实施例中，所述显示面板100还包括位于所述第三绝缘层230上的有源层400、及位于所述有源层400上的第四绝缘层240。所述栅极层位于所述第四绝缘层240上、及远离所述衬底200一侧。所述有源层400包括多个硅岛，所述源漏极层通过过孔与所述有源层400电连接，即使所述源极单元及所述漏极单元通过过孔与所述硅岛电连接，图中用400代表硅岛，不再重复标号，具体请参阅图1~图8。
S93、在所述有源层400上形成第四绝缘层240。
本实施例中，所述栅极层形成于所述第四绝缘层240上，远离所述金属遮光层800一侧。
S200、在所述栅极层上形成第一绝缘层210。
本实施例中，形成所述栅极层及所述第一绝缘层210的步骤包括：
S201、在所述第四绝缘层240上形成多个第一栅极311。
S202、在多个所述第一栅极311上形成第一子绝缘层211。
S203、在所述第一子绝缘层211上形成多个第二栅极312。
S204、在多个所述第二栅极312上形成第二子绝缘层212。
S300、在所述第一绝缘层210上形成包括多个金属屏蔽单元600的金属屏蔽层。
本实施例中，所述栅极单元310包括一第一栅极311及至少一与所述第一栅极311相对设置的第二栅极312，所述第一栅极311与所述第二栅极312绝缘设置。所述第一栅极311在所述衬底200上的正投影位于对应所述金属屏蔽单元600在所述衬底200上的正投影之内，或/和所述第二栅极312在所述衬底200上的正投影位于对应所述金属屏蔽单元600在所述衬底200上的正投影之内。所述显示面板100包括位于所述第一栅极311与所述第二栅极312之间的第一子绝缘层211、及位于所述第二栅极上的第二子绝缘层212。所述第一子绝缘层211与所述第二子绝缘层212构成所述第一绝缘层210，具体请参阅图2、图3，其中图3中，为方便展示，将第二栅极312的透视关系移至顶端，实际为所述第一栅极312位于第一栅极311与所述金属屏蔽单元600之间。金属屏蔽层的屏蔽原理类似于法拉第电磁笼的电磁屏蔽原理，通过在栅极单元310附近设置金属屏蔽单元600，反射周围交流电信号，避免栅极单元310之间的交流信号的影响，减少了显示不均，改善了显示效果。
本实施例中，相比于所述第二栅极312单元310，所述第一栅极311单元310位于靠近所述衬底200一侧。所述第二栅极312单元310在所述衬底200上的正投影位于所述第一栅极311单元310在所述衬底200上的正投影之内。所述第二栅极312在所述衬底200上的正投影位于对应所述金属屏蔽单元600在所述衬底200上的正投影之内，具体请参阅图2、图3，其中图3中，为方便展示，将第二栅极312的透视关系移至顶端，实际为所述第一栅极312位于第一栅极311与所述金属屏蔽单元600之间。金属屏蔽单元600可以不和其他膜层有电连接，减少了膜层打孔，在俯视图中，所述金属屏蔽单元600只需最小覆盖第二栅极312单元310，即可实现交流信号的屏蔽。
本实施例中，任一所述金属屏蔽单元600与所述显示面板100的恒压信号端电连接，具体请参阅图4~图8。通过对所述金属屏蔽单元600施加恒压电信号，所述金属屏蔽单元600可以形成一定磁场，可以更加稳定地屏蔽交流电信号，相邻两个所述金属屏蔽单元600之间连接，保护栅极单元310不受周围交流电信号的影响，减少了显示不均，改善了显示效果。
本实施例中，步骤S200之后，包括：
S210、在所述第一绝缘层210上形成源漏极层。
本实施例中，所述显示面板100还包括位于所述第一绝缘层210上及远离所述栅极层一侧的源漏极层。所述金属屏蔽层与所述源漏极层电连接，具体请参阅图4、图5。距离所述栅极层最近的带电膜层是源漏极层，通过所述金属屏蔽层与所述源漏极层电连接，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，所述源漏极层包括多个源极单元510及多个漏极单元520，一所述金属屏蔽单元600与一所述源极单元510电连接和/或一所述金属屏蔽单元600与一所述漏极单元520电连接。所述源极单元510以及所述漏极单元520在所述栅极单元310的外围，具体请参阅图4、图5，所述金属屏蔽单元600与哪一侧方便连接，即可与哪一侧的所述源极单元510或/和所述漏极单元520相连接，方便了屏蔽交流电信号。
本实施例中，步骤S210包括：
S211、在所述第一绝缘层210上形成多个包括第一子源极单元511及第一子漏极单元521的第一源漏极单元520。
本实施例中，所述第一源漏极单元520包括第一子源极单元511及第一子漏极单元521。
S212、在所述第一源漏极单元520上形成第五绝缘层250。
S213、在所述第五绝缘层250上形成多个第三过孔130，所述第三过孔130使所述第一子源极单元511裸露。
S214、在所述第五绝缘层250上形成与所述第一漏极单元520对应的第二元漏极单元520。
本实施例中，所述第二源漏极单元520包括第二子源极单元512，所述第二子源极单元512与所述第一子源极单元511电连接，所述金属屏蔽层位于所述第一源漏极单元与所述第二源漏极单元之间，具体请参阅图4~图8。
本实施例中，步骤S212之后包括：
S2121、在所述第五绝缘层250上形成包括多个金属屏蔽单元600的金属屏蔽层。
S2122、在所述金属屏蔽层上形成第六绝缘层260。
S2123、在所述第六绝缘层260上形成多个第三过孔130，所述第三过孔130贯穿所述第六绝缘层260及所述第五绝缘层250，所述第三过孔130使所述第一子源极单元511裸露。
本实施例中，所述第一子源极单元511与所述第二子源极单元512通过所述第三过孔130连接。所述显示面板100还包括与所述第二子源极单元512同层设置的扇出走线，所以所述第二子源极单元512的同层的电信号更为复杂，所述金属屏蔽层位于所述第一源漏极单元520与所述第二源漏极单元520之间，具体请参阅图4~图7，可以更好屏蔽所述第二子源极单元512的同层的交流电信号，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，所述金属屏蔽单元600位于所述第三过孔130的外围，所述金属屏蔽单元600通过所述第三过孔130与所述第二源漏极单元520电连接，具体请参阅图5。
本实施例中，所述金属屏蔽单元600通过过孔与所述第一子漏极单元521电连接，源极单元510处的膜层较多，孔洞也较复杂，避开复杂孔洞，简化工艺，加强金属屏蔽单元600的带电稳定，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，步骤S300之后还包括：
S400、在所述源漏极层上形成第二绝缘层220。
S500、在所述第二绝缘层220上形成包括多个阳极单元700的阳极层。
本实施例中，步骤S400之后还包括：
S410、在所述第二绝缘层220上形成多个第四过孔140。
本实施例中，所述阳极层包括多个阳极单元700，一所述金属屏蔽单元600与一所述阳极单元700电连接。所述第二绝缘层220包括多个第四过孔140，所述第四过孔140贯穿所述第二绝缘层220，至使所述金属屏蔽单元600裸露，具体请参阅图6。所述金属屏蔽单元600通过所述第四过孔140与所述阳极单元700电连接，源漏极层的孔洞也较复杂，避开复杂孔洞，简化工艺，加强金属屏蔽单元600的带电稳定，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，在形成第一绝缘层时步骤还包括：
在所述第一绝缘层210上形成多个第一开孔110，所述第一开孔110使所述金属遮光层800裸露。
本实施例中，所述第一绝缘层210可以为第一子绝缘层211或第二子绝缘层212。
本实施例中，在形成第五绝缘层250时步骤还包括：
在所述第五绝缘层250上形成多个第二开孔120，所述第二开孔120使所述金属遮光层800裸露。
本实施例中，所述显示面板100还包括位于所述衬底200上的金属遮光层800，所述显示面板100的源漏极层的多个源极单元510通过多个第一过孔110与所述金属遮光层800电连接，所述金属屏蔽层与所述金属遮光层800通过多个第二过孔120电连接。由于所述金属屏蔽单元600的位置有多种设置方式，所以源极单元510与所述金属遮光层800之间电连接的第一过孔110位置相应贯穿即可，所以金属屏蔽单元600单元与所述金属遮光层800之间电连接的第二过孔120位置相应贯穿即可，在此不做限定。源漏极层的具体结构也不做限定。所述显示面板100还包括位于所述金属遮光层800与所述栅极层之间的第三绝缘层230。源极单元510使金属遮光层800电位平衡，有利于所述显示面板100的电平衡及电稳定性，所述金属屏蔽单元600通过第二过孔120与所述金属遮光层800电连接，同样可以达到使所述金属屏蔽单元600带恒定电压的效果，具体请参阅图7。避开复杂孔洞，简化工艺，加强金属屏蔽单元600的带电稳定，提供给栅极单元310最好的交流电信号屏蔽效果。
本实施例中，形成金属屏蔽层的步骤包括：
形成至少包括第一屏蔽部件610与第二屏蔽部件620的金属屏蔽单元600，所述第一屏蔽部件610与所述第二屏蔽部件620异层设置。
本实施例中，所述金属屏蔽单元600至少包括第一屏蔽部件610与第二屏蔽部件620，所述第一屏蔽部件610与所述第二屏蔽部件620异层设置。所述第一屏蔽部件610与所述显示面板100的源漏极层的源极单元510电连接，所述第二屏蔽部件620与所述显示面板100的源漏极层的漏极单元520电连接或者所述第二屏蔽部件620与所述显示面板100的阳极层电连接，具体请参阅图8。通过在不同膜层设置屏蔽部件，加强对栅极单元310的交流信号屏蔽的效果，减少了显示不均，改善了显示效果。
本实施例中，形成所述栅极层的步骤包括：
在所述显示面板100靠近弯折区的第一区域132内，形成多个栅极单元310，一所述栅极单元310以形成一阵列单元150，具体请参阅图9。
本实施例中，步骤S500之后还包括：
S600、在所述阳极层上形成包括多个开口的像素定义层。
S700、在所述像素定义层上形成包括多个发光单元的发光层。
本实施例中，所述显示面板100包括靠近弯折区的第一区域132，在数据线的方向上，所述第一区域132内的相邻两个阵列单元150之间的间距小于所述第一区域132外围的相邻两个阵列单元150之间的间距。其中，所述金属屏蔽层位于所述第一区域132内。数据线的方向在图9中代表Y方向，具体请参阅图9。所述显示面板100还包括位于所述阳极层上包括多个开口的像素定义层、及发光层。所述第一区域132对应所述显示面板100的下边框区域，缩短所述阵列单元150之间的间距，利用所述第二源漏极单元520的所述第二子源极单元512所在膜层的走线，将阳极单元700的与输出电路连接，对于下边框区域，所述第一区域132上方会覆盖所述发光层的发光单元，可以有效减小下边框。由于第一区域132在工作阶段，栅极单元310会受周围交流信号的耦合效应影响，从而导致各行发光亮度存在差异，金属屏蔽单元600可以更好地加强对栅极单元310的交流信号屏蔽的效果，减少了显示不均，改善了显示效果。
本实施例中，在所述第一区域132内，部分所述显示面板100的发光单元在所述显示面板100上的正投影内无所述阵列单元150，所述发光单元与对应所述阵列单元150通过引线电连接。对于下边框区域，将所述第一区域132内的部分阵列单元之间的间距压缩，发光单元设置位置不用改变，所述发光单元与对应所述阵列单元150通过引线电连接，原阵列单元的位置被空出来，可以设置扇出走线或设置弯折走线，极大减小了下边框宽度，但同时栅极单元310受周围交流信号的耦合效应的影响也加重，所述金属屏蔽单元600可以很好地在第一区域内减小交流信号的耦合效应的影响，减少了显示不均，改善了显示效果。
本实施例中，所述金属屏蔽层的材料为氧化铟锡、纳米银、碳纳米管中的任意一种或多种的组合。其中，氧化铟锡（ITO）材料透明度好，纳米银具有良好的导热性，碳纳米管具有良好的导静电功能，可以加强对所述金属屏蔽单元600的效果补充。
本实施例中，所述金属屏蔽单元600的厚度为500埃米~1000埃米。
本申请通过在栅极层上设置金属屏蔽层，利用电屏蔽原理，减少相邻两栅极单元之间的交流信号影响，减少了显示不均，改善了显示效果。
本申请还公开了一种显示装置，包括如任一上述的显示面板100。
具体所述显示装置中的显示面板100，请参阅上述显示面板100的实施例以及图1~图9，在此不再赘述。
本申请公开了一种显示面板及其制作方法。该显示面板包括衬底、位于该衬底上的栅极层、位于该栅极层上的第一绝缘层、及位于该第一绝缘层上的金属屏蔽层；该栅极层包括多个栅极单元；该金属屏蔽层包括多个金属屏蔽单元，一该金属屏蔽单元对应一该栅极单元；其中，该金属屏蔽层用于屏蔽相邻两该栅极单元之间的交流信号。本申请通过在栅极层上设置金属屏蔽层，利用电屏蔽原理，减少相邻两栅极单元之间的交流信号影响，减少了显示不均，改善了显示效果。
可以理解的是，对本领域普通技术人员来说，可以根据本申请的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。

Claims (20)

  1. 一种显示面板，其中，包括衬底、位于所述衬底上的栅极层、位于所述栅极层上的第一绝缘层、及位于所述第一绝缘层上的金属屏蔽层；
    所述栅极层包括多个栅极单元，所述金属屏蔽层包括多个金属屏蔽单元，一所述金属屏蔽单元对应一所述栅极单元；
    其中，所述金属屏蔽层用于屏蔽相邻两个所述栅极单元之间的交流信号。
  2. 根据权利要求1所述的显示面板，其中，所述栅极单元包括一第一栅极及至少一与所述第一栅极相对设置的第二栅极，所述第一栅极与所述第二栅极绝缘设置；
    在一个子像素内，所述第一栅极或/和所述第二栅极在所述衬底上的正投影位于所述金属屏蔽单元在所述衬底上的正投影之内。
  3. 根据权利要求2所述的显示面板，其中，任一所述金属屏蔽单元与所述显示面板的恒压信号端电连接。
  4. 根据权利要求3所述的显示面板，其中，所述显示面板还包括位于所述第一绝缘层上的源漏极层，所述金属屏蔽层与所述源漏极层电连接。
  5. 根据权利要求4所述的显示面板，其中，所述源漏极层包括多个第一源漏极单元及与所述第一源漏极单元对应的第二源漏极单元，所述第一源漏极单元与所述第二源漏极单元异层设置；
    所述第一源漏极单元包括第一子源极单元及第一子漏极单元，所述第二源漏极单元包括第二子源极单元，所述第二子源极单元与所述第一子源极单元电连接，所述金属屏蔽层位于所述第一源漏极单元与所述第二源漏极单元之间。
  6. 根据权利要求3所述的显示面板，其中，所述显示面板还包括位于源漏极层上的第二绝缘层、位于所述第二绝缘层上的阳极层；
    其中，所述阳极层包括多个阳极单元，一所述金属屏蔽单元与一所述阳极单元电连接。
  7. 根据权利要求3所述的显示面板，其中，所述显示面板还包括位于所述衬底上的金属遮光层，源漏极层的多个源极单元通过多个第一过孔与所述金属遮光层电连接，所述金属屏蔽层与所述金属遮光层通过多个第二过孔电连接。
  8. 根据权利要求3所述的显示面板，其中，所述金属屏蔽单元至少包括第一屏蔽部件与第二屏蔽部件，所述第一屏蔽部件与所述第二屏蔽部件异层设置；
    所述第一屏蔽部件与源漏极层的源极单元电连接，所述第二屏蔽部件与所述源漏极层的漏极单元电连接，或者所述第二屏蔽部件与阳极层电连接。
  9. 根据权利要求1所述的显示面板，其中，所述显示面板包括靠近弯折区的第一区域，在数据线的方向上，所述第一区域内的相邻两个阵列单元之间的间距小于所述第一区域外围的相邻两个所述阵列单元之间的间距；
    其中，所述金属屏蔽层位于所述第一区域内。
  10. 根据权利要求9所述的显示面板，其中，在所述第一区域内，部分所述显示面板的发光单元在所述显示面板上的正投影内无所述阵列单元，所述发光单元与对应所述阵列单元通过引线电连接。
  11. 一种显示面板的制作方法，其中，包括：
    在衬底上形成包括多个栅极单元的栅极层；
    在所述栅极层上形成第一绝缘层；
    在所述第一绝缘层上形成包括多个金属屏蔽单元的金属屏蔽层；
    其中，一所述金属屏蔽单元对应一所述栅极单元，所述金属屏蔽层用于屏蔽相邻两个所述栅极单元之间的交流信号。
  12. 根据权利要求11所述的显示面板的制作方法，其中，形成所述栅极层及所述第一绝缘层的步骤包括：
    在衬底上形成多个第一栅极；
    在所述第一栅极上形成第一子绝缘层；
    在所述第一子绝缘层上形成多个第二栅极；
    在所述第二栅极上形成第二子绝缘层；
    其中，所述第一子绝缘层与所述第二子绝缘层构成第一绝缘层，所述第一栅极与所述第二栅极相对设置，所述第一栅极或/和所述第二栅极在所述衬底上的正投影位于对应所述金属屏蔽单元在所述衬底上的正投影之内。
  13. 根据权利要求12所述的显示面板的制作方法，其中，任一所述金属屏蔽单元与所述显示面板的恒压信号端电连接。
  14. 根据权利要求13所述的显示面板的制作方法，其中，在所述栅极层上形成第一绝缘层之后，还包括：
    在所述第一绝缘层上形成源漏极层；
    其中，所述金属屏蔽层与所述源漏极层电连接。
  15. 根据权利要求14所述的显示面板的制作方法，其中，在所述第一绝缘层上形成源漏极层的步骤包括：
    在所述第一绝缘层上形成多个包括第一子源极单元及第一子漏极单元的第一源漏极单元；
    在所述第一源漏极单元上形成第五绝缘层；
    在所述第五绝缘层上形成多个第三过孔，所述第三过孔使所述第一子源极单元裸露；
    在所述第五绝缘层上形成与所述第一漏极单元对应的第二元漏极单元；
    其中，所述第二源漏极单元包括第二子源极单元，所述第二子源极单元与所述第一子源极单元电连接，所述金属屏蔽层位于所述第一源漏极单元与所述第二源漏极单元之间。
  16. 根据权利要求14所述的显示面板的制作方法，其中，在形成所述栅极层之前还包括在衬底上形成金属遮光层；
    在形成第一绝缘层时步骤还包括在所述第一绝缘层上形成多个第一开孔，所述第一开孔使所述金属遮光层裸露；
    在形成所述第五绝缘层的步骤还包括在所述第五绝缘层上形成多个第二开孔，所述第二开孔使所述金属遮光层裸露；
    其中，所述源漏极层通过所述第一过孔与所述金属遮光层电连接，所述金属屏蔽层通过所述第二过孔与所述金属遮光层电连接。
  17. 根据权利要求13所述的显示面板的制作方法，其中，在所述第一绝缘层上形成包括多个金属屏蔽单元的金属屏蔽层之后还包括：
    在所述面板的源漏极层上形成第二绝缘层；
    在所述第二绝缘层上形成多个第四过孔；
    在所述第二绝缘层上形成包括多个阳极单元的阳极层；
    其中，所述金属屏蔽单元通过所述第四过孔与所述阳极单元电连接。
  18. 根据权利要求13所述的显示面板的制作方法，其中，所述金属屏蔽单元至少包括第一屏蔽部件与第二屏蔽部件，所述第一屏蔽部件与所述第二屏蔽部件异层设置；
    所述第一屏蔽部件与源漏极层的源极单元电连接，所述第二屏蔽部件与所述源漏极层的漏极单元电连接，或者所述第二屏蔽部件与阳极层电连接。
  19. 根据权利要求11所述的显示面板的制作方法，其中，所述显示面板包括靠近弯折区的第一区域，在数据线的方向上，所述第一区域内的相邻两个阵列单元之间的间距小于所述第一区域外围的相邻两个所述阵列单元之间的间距；
    其中，所述金属屏蔽层位于所述第一区域内。
  20. 根据权利要求19所述的显示面板的制作方法，其中，在所述第一区域内，部分所述显示面板的发光单元在所述显示面板上的正投影内无所述阵列单元，所述发光单元与对应所述阵列单元通过引线电连接。
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