WO2022001949A1 - 开路故障检测系统及检测方法 - Google Patents
开路故障检测系统及检测方法 Download PDFInfo
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- WO2022001949A1 WO2022001949A1 PCT/CN2021/102728 CN2021102728W WO2022001949A1 WO 2022001949 A1 WO2022001949 A1 WO 2022001949A1 CN 2021102728 W CN2021102728 W CN 2021102728W WO 2022001949 A1 WO2022001949 A1 WO 2022001949A1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2836—Fault-finding or characterising
- G01R31/2843—In-circuit-testing
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/54—Testing for continuity
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- the present application relates to the technical field of circuit fault detection, for example, to an open circuit fault detection system and a detection method.
- the voltage comparison method is usually used, that is, when the drive is turned off, the relationship between the output terminal voltage and the set open-circuit fault threshold voltage is compared.
- common high-side drive and low-side drive relatively safe and reliable diagnosis can usually be achieved.
- the voltage analysis method is easy to damage the H-bridge drive circuit on the one hand.
- the body diode of the metal oxide semiconductor (MOS) tube on the one hand, cannot perform open circuit fault diagnosis when the motor is in working state, and the open circuit fault in the circuit cannot be detected in time, which has a great potential safety hazard.
- Embodiments of the present application provide an open-circuit fault detection system and a detection method, so as to realize rapid detection of a circuit open-circuit fault point when an open-circuit fault occurs in a circuit.
- an embodiment of the present application provides an open-circuit fault detection system, including: a control unit, a drive circuit, and an operational amplifier measurement unit, wherein the drive circuit includes a shunt resistor; the first end of the control unit is connected to the The first end of the drive circuit is electrically connected, and the control unit is configured to output a control signal to the drive circuit; the first end of the operational amplifier measurement unit is electrically connected to the second end of the drive circuit, and the operational amplifier The second end of the measurement unit is electrically connected to the second end of the control unit, and the operational amplifier measurement unit is configured to obtain the voltage value of the shunt resistance of the driving circuit and send the voltage value of the shunt resistance to the control unit The control unit is further configured to calculate the current value of the shunt resistor according to the obtained voltage value of the shunt resistor, and judge whether the load of the drive circuit has an open-circuit fault according to the calculated current value of the shunt resistor .
- the drive circuit further includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor; the gate of the first MOS transistor, the gate of the second MOS transistor, the third MOS transistor The gate of the MOS transistor and the gate of the fourth MOS transistor are electrically connected to the control unit, the source of the first MOS transistor and the source of the second MOS transistor are electrically connected to the power supply voltage, and the first MOS transistor is electrically connected to the power supply voltage.
- the drain of the third MOS transistor is electrically connected to the drain of the third MOS transistor and the first end of the load of the drive circuit
- the drain of the second MOS transistor is electrically connected to the drain of the fourth MOS transistor and the load
- the second end of the shunt resistor is electrically connected
- the source of the third MOS transistor is electrically connected to the source of the fourth MOS transistor and the first end of the shunt resistor
- the second end of the shunt resistor is grounded.
- the first MOS transistor and the second MOS transistor are PMOS transistors
- the third MOS transistor and the fourth MOS transistor are NMOS transistors.
- control signal output by the control unit includes a PWM pulse signal.
- control signal output by the control unit further includes a diagnosis pulse signal, and the diagnosis pulse signal is located within the high level duration period of the PWM pulse signal.
- an embodiment of the present application further provides a fault detection method, which is applied to the open-circuit fault detection system according to any one of the first aspects.
- the open-circuit fault detection method includes: the control unit outputs a control signal to the a drive circuit; the operational amplifier measurement unit acquires the voltage value of the shunt resistor of the drive circuit and sends the voltage value of the shunt resistor to the control unit; the control unit calculates according to the acquired voltage value of the shunt resistor The current value of the shunt resistor, and according to the calculated current value of the shunt resistor, it is determined whether the load of the drive circuit has an open-circuit fault.
- control unit judging whether an open circuit fault occurs in the drive circuit according to the calculated current value of the shunt resistor includes: when the current value of the shunt resistor is greater than or equal to the first preset current and less than or equal to the first When two preset currents are used, the load of the drive circuit is in a normal state; when the current value of the shunt resistor is less than the first preset current or greater than the second preset current, the load of the drive circuit is in a fault state.
- the load of the drive circuit when the current value of the shunt resistor is less than the first preset current or greater than the second preset current, the load of the drive circuit is in a fault state including: when the current value of the shunt resistor is equal to zero , the load of the drive circuit has an open-circuit fault; when the current value of the shunt resistor is smaller than the first preset current or greater than the second preset current, the load of the drive circuit has a short-circuit fault.
- control unit calculating the current value of the shunt resistor according to the acquired voltage value of the shunt resistor includes: the control unit according to the voltage value of the shunt resistor sent by the operational amplifying measurement unit and the obtained value.
- the resistance value of the shunt resistor is used to calculate the current value of the shunt resistor.
- FIG. 1 is a schematic structural diagram of an open-circuit fault detection system provided by an embodiment of the present application.
- FIG. 2 is a schematic diagram of a circuit structure of an open-circuit fault detection system provided by an embodiment of the present application
- FIG. 3 is a schematic diagram of a driving signal of an open-circuit fault detection system provided by an embodiment of the present application.
- FIG. 4 is a schematic flowchart of an open-circuit fault detection method provided by an embodiment of the present application.
- FIG. 5 is a schematic flowchart of another open-circuit fault detection method provided by an embodiment of the present application.
- FIG. 1 is a schematic structural diagram of an open-circuit fault detection system provided by an embodiment of the present application
- FIG. 2 is a schematic structural diagram of a circuit of an open-circuit fault detection system provided by an embodiment of the present application.
- the open-circuit fault detection system includes: a control unit 10 , a driving circuit 20 and an operational amplifier measuring unit 30 , wherein the driving circuit 20 includes a shunt resistor 40 .
- the first terminal 11 of the control unit 10 is electrically connected to the first terminal 21 of the driving circuit 20 , and the control unit 10 is configured to output a control signal to the driving circuit 20 .
- the first end 31 of the operational amplifier measurement unit 30 is electrically connected to the second end 22 of the driving circuit 20
- the second end 32 of the operational amplifier measurement unit 30 is electrically connected to the second end 12 of the control unit 10
- the operational amplifier measurement unit 30 is provided with
- the control unit 10 is further configured to calculate the current value of the shunt resistor 40 according to the obtained voltage value of the shunt resistor 40, and according to The calculated current value of the shunt resistor 40 determines whether the load of the driving circuit 20 has an open-circuit fault.
- the control unit 10 when the control unit 10 outputs a control signal to the drive circuit 20, the drive circuit 20 controls the load to work at this time.
- the load working current is grounded through the shunt resistor 40, and the operational amplifier measurement unit 30 Measure the voltage value of the shunt resistor 40 in the drive circuit 20 , and send the measured voltage value of the shunt resistor 40 to the control unit 10 , and the control unit 10 calculates the current of the drive circuit 20 according to the voltage value of the shunt resistor 40 and the resistance of the shunt resistor 40 value, and according to the calculated current value, it is determined whether the load of the drive circuit 20 has an open-circuit fault. As shown in FIG.
- the driving circuit 20 is an H-bridge circuit, and the ports HSD1 , HSD2 , LSD1 and LSD2 of the driving circuit 20 are all electrically connected to the control unit 10 , when the control unit 10 outputs a control signal to control the first MOS transistor of the driving circuit 20
- the control unit 10 When Q1 and the fourth MOS transistor Q4 are turned on, the drive circuit 20 drives the load M to work, and the operational amplifier measurement unit 30 sends the voltage value of the shunt resistor 40 in the drive circuit 20 to the control unit 10, and the control unit 10 measures the voltage value according to the obtained voltage value.
- the current in the drive circuit 20 is calculated to determine whether the load of the drive circuit 20 has an open-circuit fault.
- the voltage value of the shunt resistor in the driving circuit is measured by the operational amplifier measurement unit and the measured voltage value of the shunt resistor is sent to the control unit, and the control unit is based on the voltage value measured by the operational amplifier measurement unit.
- the current of the drive circuit is calculated to determine whether the load of the drive circuit is open-circuit fault, so as to realize the rapid detection of the open-circuit fault point of the circuit when the open-circuit fault occurs in the circuit.
- the driving circuit further includes a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q3 and a fourth MOS transistor Q4, the gate of the first MOS transistor Q1, the second MOS transistor Q1, and the second MOS transistor Q1.
- the gate of Q2, the gate of the third MOS transistor Q3 and the gate of the fourth MOS transistor Q4 are electrically connected to the control unit 10, and the source of the first MOS transistor Q1 and the source of the second MOS transistor Q2 are electrically connected to the power supply voltage connected, the drain of the first MOS transistor Q1 is electrically connected to the drain of the third MOS transistor Q3 and the first end of the load, the drain of the second MOS transistor Q2 is electrically connected to the drain of the fourth MOS transistor Q4 and the second end of the load
- the terminals are electrically connected, the source of the third MOS transistor Q3 is electrically connected to the source of the fourth MOS transistor Q4 and the first terminal 41 of the shunt resistor 40 , and the second terminal 42 of the shunt resistor 40 is grounded.
- FIG. 3 is a schematic diagram of a control signal output by a control unit provided by an embodiment of the present application.
- the control unit 10 when the control unit 10 outputs a high-level signal, the first MOS transistor Q1 and the fourth MOS turn on Q4, and the load loop current The direction is shown by the dotted line in FIG. 2 , and the voltage drop of the shunt resistance 40 measured by the operational amplifier measuring unit 30 is a positive value.
- the control unit 10 outputs a low-level signal, the first MOS transistor Q1 is turned off, the third MOS transistor Q3 is turned on for freewheeling, and the direction of the load loop current is shown by the solid line in FIG. 2 .
- the operational amplifier measurement 30 can judge whether there is current flowing between the two ends of the load circuit HB+ and HB- according to the obtained voltage value of the shunt resistance 40, and then judge the load Whether there is an open circuit fault in the circuit, and when the direction of the load loop current is shown by the solid line in Figure 2, since the current does not flow through the body diode of the third MOS transistor Q3 during the operation of the load loop, the third MOS transistor Q3 will not be damaged. .
- the first MOS transistor Q1 and the second MOS transistor Q2 are PMOS transistors
- the third MOS transistor Q3 and the fourth MOS transistor Q4 are NMOS transistors.
- the first terminal IN+ of the operational amplifier measurement unit 30 is electrically connected to the first terminal 41 of the shunt resistor 40
- the second terminal IN ⁇ of the operational amplifier unit 30 is electrically connected to the second terminal 42 of the shunt resistor 40
- the output terminal Vout of the operational amplifier unit 30 is electrically connected to the second terminal 12 of the control unit 10 .
- control signal output by the control unit 10 is a pulse width modulation (Pulse Width Modulation, PWM) signal.
- PWM Pulse Width Modulation
- the control unit 10 controls the working state of the driving circuit 20 by outputting a PWM signal. 2 and 3, when the PWM pulse signal output from the control unit 10 to the HSD1 port is within the Ton time period, the first MOS transistor Q1 and the fourth MOS transistor Q4 are in a conducting state, and the motor is in a forward rotation state.
- the PWM pulse signal output from the control unit 10 to the HSD1 port is in the low-level duration Toff time period
- the first MOS transistor Q1 is in an off state
- the fourth MOS transistor Q4 is in an on state
- the third MOS transistor is in an on state at this time.
- Q3 turns on freewheeling, and the current passes through the third MOS transistor Q3 and the fourth MOS transistor Q4 to realize freewheeling.
- control signal output by the control unit 10 also includes a diagnostic pulse signal.
- the diagnostic pulse signal is located within the high level duration period Ton (high level duration) of the PWM signal. .
- the high level of the PWM signal output by the control unit 10 continues The diagnostic pulse signal is set in the period, and the period t of the diagnostic pulse signal is less than the high level duration of the PWM signal, which ensures that the control unit has a high diagnostic frequency, and avoids the failure of timely detection due to a long detection time.
- FIG. 4 is a schematic flowchart of an open-circuit fault detection method provided by an embodiment of the present application.
- the open-circuit fault detection method includes the following steps.
- the control unit outputs a control signal to the driving circuit.
- the operational amplification measurement unit acquires the voltage value of the shunt resistor of the driving circuit and sends the voltage value of the shunt resistor to the control unit.
- the control unit calculates the current value of the shunt resistor according to the obtained voltage value of the shunt resistor, and judges whether the load of the drive circuit has an open circuit fault according to the calculated current value of the shunt resistor.
- calculating the current value of the shunt resistor by the control unit according to the acquired voltage value of the shunt resistor includes: the control unit calculates the current value according to the voltage value of the shunt resistor and the resistance value of the shunt resistor sent by the operational amplification measurement unit.
- FIG. 5 is a schematic flowchart of another open-circuit fault detection method provided by an embodiment of the present application. As shown in FIG. 5 , the open-circuit fault detection method includes the following steps.
- the control unit outputs a control signal to the driving circuit.
- the operational amplification measurement unit acquires the voltage value of the shunt resistor of the driving circuit and sends the voltage value of the shunt resistor to the control unit.
- the control unit judges whether the load of the drive circuit has an open-circuit fault according to the relationship between the current value of the voltage divider resistor and the circuit current when the drive circuit is working normally, and the load current range is set to be (Imin, Imax) when the drive circuit is working normally, where Imin is the normal work.
- the minimum value of current, Imax is the maximum value of normal operating current.
- the load of the driving circuit may be a short-circuit fault or other faults.
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Abstract
本申请公开了一种开路故障检测系统及检测方法,包括:控制单元、驱动电路和运算放大测量单元,其中,驱动电路包括分流电阻,控制单元第一端与驱动电路的第一端电连接,所述控制单元设置为输出控制信号至驱动电路;运算放大测量单元的第一端与驱动电路的第二端电连接,运算放大测量单元的第二端与控制单元的第二端电连接,所述运算放大测量单元设置为获取驱动电路的分流电阻的电压值并发送分流电阻的电压值至控制单元;控制单元还设置为根据获取的分流电阻的电压值计算分流电阻的电流值,并根据计算的分流电阻的电流值判断驱动电路的负载是否出现开路故障。
Description
本申请要求在2020年7月1日提交中国专利局、申请号为202010626739.9的中国专利申请的优先权,该申请的全部内容通过引用结合在本申请中。
本申请涉及电路故障检测技术领域,例如涉及一种开路故障检测系统及检测方法。
在带有负载的电路系统中,当电路出现开路故障等状况时,若不能迅速发现这些故障可导致功能失效甚至产生安全事故。
对于电子控制单元驱动的开路故障诊断,通常采用比较电压方法,即在驱动关闭时比较输出端电压与设定开路故障阈值电压关系。对于普通的高边驱动和低边驱动,通常可实现比较安全可靠的诊断。但对于H桥驱动,由于其结构和工作模式与普通高边驱动和低边驱动不同,当H桥驱动感性负载(如直流电机)时,采用电压分析法一方面容易损坏H桥驱动电路中的金属氧化物半导体(Metal Oxide Semiconductor,MOS)管的体二极管,一方面当电机处于工作状态时无法进行开路故障诊断,不能及时发现电路出现的开路故障,存在较大安全隐患。
发明内容
本申请实施例提供一种开路故障检测系统及检测方法,以实现在电路出现开路故障时实现对电路开路故障点的迅速检测。
第一方面,本申请实施例提供了一种开路故障检测系统,包括:控制单元、驱动电路和运算放大测量单元,其中,所述驱动电路包括分流电阻;所述控制单元第一端与所述驱动电路的第一端电连接,所述控制单元设置为输出控制信号至所述驱动电路;所述运算放大测量单元的第一端与所述驱动电路的第二端电连接,所述运算放大测量单元的第二端与所述控制单元的第二端电连接,所述运算放大测量单元设置为获取所述驱动电路的分流电阻的电压值并发送所述分流电阻的电压值至所述控制单元;所述控制单元还设置为根据获取的所述分流电阻的电压值计算所述分流电阻的电流值,并根据计算的所述分流电阻的电流值判断所述驱动电路的负载是否出现开路故障。
可选的,所述驱动电路还包括第一MOS管、第二MOS管、第三MOS管和第四MOS管;所述第一MOS管的栅极、第二MOS管的栅极、第三MOS管的栅极和第四MOS管的栅极与所述控制单元电连接,所述第一MOS管的源极和第二MOS管的源极与电源电压电连接,所述第一MOS管的漏极与所述第三MOS管的漏极和所述驱动电路的负载的第一端电连接,所述第二MOS管的漏极与所述第四MOS管的漏极和所述负载的第二端电连接,所述第三MOS管的源极与所述第四MOS管的源极和所述分流电阻的第一端电连接,所述分流电阻的第二端接地。
可选的,所述第一MOS管和所述第二MOS管为PMOS管,所述第三MOS管和所述第四MOS管为NMOS管。
可选的,所述控制单元输出的控制信号包括PWM脉冲信号。
可选的,所述控制单元输出的控制信号还包括诊断脉冲信号,所述诊断脉冲信号位于所述PWM脉冲信号的高电平持续周期内。
第二方面,本申请实施例还提供一种故障检测方法,应用于第一方面任一项所述的开路故障检测系统,所述开路故障检测方法包括:所述控制单元输出控制信号至所述驱动电路;所述运算放大测量单元获取所述驱动电路的分流电阻的电压值并发送所述分流电阻的电压值至所述控制单元;所述控制单元根据获取的所述分流电阻的电压值计算所述分流电阻的电流值,并根据计算的所述分流电阻的电流值判断所述驱动电路的负载是否出现开路故障。
可选的,所述控制单元根据计算的所述分流电阻的电流值判断所述驱动电路是否出现开路故障包括:当所述分流电阻的电流值大于或等于第一预设电流且小于或等于第二预设电流时,所述驱动电路的负载为正常状态;当所述分流电阻的电流值小于第一预设电流或大于第二预设电流时,所述驱动电路的负载为故障状态。
可选的,所述当所述分流电阻的电流值小于第一预设电流或大于第二预设电流时,所述驱动电路的负载为故障状态包括:当所述分流电阻的电流值等于零时,所述驱动电路的负载出现开路故障;当所述分流电阻的电流值小于第一预设电流或大于第二预设电流时,所述驱动电路的负载出现短路故障。
可选的,所述控制单元根据获取的所述分流电阻的电压值计算所述分流电阻的电流值包括:所述控制单元根据所述运算放大测量单元发送的所述分流电阻的电压值及所述分流电阻的阻值计算所述分流电阻的电流值。
图1为本申请实施例提供的一种开路故障检测系统的结构示意图;
图2为本申请实施例提供的一种开路故障检测系统的电路结构示意图;
图3为本申请实施例提供的一种开路故障检测系统的驱动信号示意图;
图4为本申请实施例提供的一种开路故障检测方法的流程示意图;
图5为本申请实施例提供的另一种开路故障检测方法的流程示意图。
下面结合附图和实施例对本申请作说明。可以理解的是,此处所描述的实施例仅仅用于解释本申请,而非对本申请的限定。为了便于描述,附图中仅示出了与本申请相关的部分而非全部结构。
图1为本申请实施例提供的一种开路故障检测系统的结构示意图,图2为本申请实施例提供的一种开路故障检测系统的电路结构示意图。如图1和图2所示,开路故障检测系统包括:控制单元10、驱动电路20和运算放大测量单元30,其中,驱动电路20包括分流电阻40。控制单元10的第一端11与驱动电路20的第一端21电连接,控制单元10设置为输出控制信号至驱动电路20。运算放大测量单元30的第一端31与驱动电路20的第二端22电连接,运算放大测量单元30的第二端32与控制单元10的第二端12电连接,运算放大测量单元30设置为获取驱动电路20的分流电阻40的电压值并发送分流电阻40的电压值至控制单元10,控制单元10还设置为根据获取的分流电阻40的电压值计算分流电阻40的电流值,并根据计算的分流电阻40的电流值判断驱动电路20的负载是否出现开路故障。
结合图1和图2,当控制单元10输出控制信号至驱动电路20时,此时驱动电路20控制负载工作,当负载处于工作状态时,负载工作电流通过分流电阻40接地,运算放大测量单元30测量驱动电路20中分流电阻40的电压值,并将测量的分流电阻40的电压值发送至控制单元10,控制单元10根据分流电阻40的电压值以及分流电阻40的电阻计算驱动电路20的电流值,根据计算的电流值判断驱动电路20的负载是否出现开路故障。如图2所示,驱动电路20为H桥电路,驱动电路20的端口HSD1、HSD2、LSD1和LSD2均与控制单元10电连接,当控制单元10输出控制信号控制驱动电路20的第一MOS管Q1和第四MOS管Q4导通时,驱动电路20驱动负载M工作,运算放大测量单元30将测量驱动电路20中分流电阻40的电压值发送至控制单元10,控制单元10根据获取的电压值计算驱动电路20中的电流进而实现对驱动电路20的负载是否出现 开路故障的判断。
本申请实施例提供的开路故障检测系统,通过运算放大测量单元测量驱动电路中分流电阻的电压值并发送测量的分流电阻的电压值的至控制单元,控制单元根据运算放大测量单元测量的电压值计算驱动电路的电流判断驱动电路的负载是否开路故障,实现在电路出现开路故障时对电路开路故障点的迅速检测。
可选的,继续参见图2,驱动电路还包括第一MOS管Q1、第二MOS管Q2、第三MOS管Q3和第四MOS管Q4,第一MOS管Q1的栅极、第二MOS管Q2的栅极、第三MOS管Q3的栅极和第四MOS管Q4的栅极与控制单元10电连接,第一MOS管Q1的源极和第二MOS管Q2的源极与电源电压电连接,第一MOS管Q1的漏极与第三MOS管Q3的漏极和负载的第一端电连接,第二MOS管Q2的漏极与第四MOS管Q4的漏极和负载的第二端电连接,第三MOS管Q3的源极与第四MOS管Q4的源极和分流电阻40的第一端41电连接,分流电阻40的第二端42接地。
图3是本申请实施例提供控制单元输出的控制信号示意图,结合图2和图3,当控制单元10输出高电平信号时,第一MOS管Q1和第四MOS导通Q4,负载回路电流方向如图2中虚线所示,运算放大器测量单元30测量的分流电阻40的压降为正值。当控制单元10输出低电平信号时,第一MOS管Q1关闭,第三MOS管Q3打开续流,负载回路电流方向如图2中实线所示,此时运算放大器测量单元30测量的分流电阻40的压降为零。当负载回路电流方向如图2中虚线所示时,此时运算放大器测量30可以根据获取的分流电阻40的电压值判断负载电路两端HB+以及HB-之间是否有电流流过,进而判断负载电路是否存在开路故障,而当负载回路电流方向如图2中实线所示时,由于负载回路工作过程中电流不流过第三MOS管Q3的体二极管,因此不会损坏第三MOS管Q3。
可选的,第一MOS管Q1和第二MOS管Q2为PMOS管,第三MOS管Q3和第四MOS管Q4为NMOS管。
继续参见图1和图2,运算放大测量单元30的第一端IN+与分流电阻40的第一端41电连接,运算放大单元30的第二端IN-与分流电阻40的第二端42电连接,运算放大单元30的输出端Vout与控制单元10的第二端12电连接。
可选的,控制单元10输出的控制信号为脉冲宽度调制(Pulse Width Modulation,PWM)信号。
如图3所示,控制单元10通过输出PWM信号控制驱动电路20的工作状态。结合图2和图3,当控制单元10输出至HSD1端口的PWM脉冲信号在Ton时 间段内,此时第一MOS管Q1和第四MOS管Q4为导通状态,电机处于正转状态。当控制单元10输出至HSD1端口的PWM脉冲信号在低电平持续时间Toff时间段内,此时第一MOS管Q1处于关闭状态,第四MOS管Q4处于导通状态,此时第三MOS管Q3打开续流,电流通过第三MOS管Q3与第四MOS管Q4实现续流。
可选的,继续参见图3,控制单元10输出的控制信号还包括诊断脉冲信号,如图3虚线所示,诊断脉冲信号位于PWM信号的高电平持续周期Ton(高电平持续时间)内。
由于在不同的应用场景,当控制单元10输出的PWM信号的周期T较长时,如果电路出现开路故障,则无法及时测得,因此,通过在控制单元10输出PWM信号的高电平持续的周期内设置诊断脉冲信号,且诊断脉冲信号的周期t小于PWM信号的高电平持续时间,保证控制单元有较高的诊断频率,避免出现检测时间较久而无法及时发现故障。
上述实施例以两个半桥组成的H桥电路为例进行说明,但本申请提供的开路故障检测方法也适用于两个以上半桥组成的H桥电路,本申请实施例不对驱动电路的结构进行限定。
在上述实施例的基础上,图4是本申请实施例提供的一种开路故障检测方法的流程示意图。所述开路故障检测方法包括以下步骤。
S110、控制单元输出控制信号至驱动电路。
S120、运算放大测量单元获取驱动电路的分流电阻的电压值并发送分流电阻的电压值至控制单元。
S130、控制单元根据获取的分流电阻的电压值计算分流电阻的电流值,并根据计算的分流电阻的电流值判断驱动电路的负载是否出现开路故障。
可选的,控制单元根据获取的分流电阻的电压值计算分流电阻的电流值包括:控制单元根据运算放大测量单元发送的分流电阻的电压值及分流电阻的阻值计算电流值。
可选的,在上述实施例的基础上,图5是本申请实施例提供的另一开路故障检测方法的流程示意图,如图5所示,所述开路故障检测方法包括以下步骤。
S210、控制单元输出控制信号至驱动电路。
S220、运算放大测量单元获取驱动电路的分流电阻的电压值并发送分流电阻的电压值至控制单元。
S230、当分流电阻的电流值大于或等于第一预设电流且小于或等于第二预 设电流时,判断驱动电路的负载正常连接。
S240、当分流电阻的电流值等于零时,判断驱动电路的负载出现开路故障。
S250、当分流电阻的电流值小于第一预设电流或大于第二预设电流时,判断驱动电路的负载出现短路故障。
运算放大测量单元将测量到的分压电阻压降U发给控制单元,控制单元根据分压压降U计算出流经分压电阻电流I,其中分压电阻I满足:I=U/R,R为分压电阻的阻值。
控制单元根据分压电阻电流值与驱动电路正常工作时电路电流的关系,判断驱动电路的负载是否出现开路故障,设驱动电路正常工作时负载电流范围为(Imin,Imax),其中Imin为正常工作电流最小值,Imax为正常工作电流最大值,当测得的分压电阻的电流I满足Imin≤I≤Imax,则流经分压电阻电流在正常范围内,此时驱动电路的负载连接良好,无开路故障;当测得的分压电阻的电流I=0时,则没有流经分压电阻的电流,此时驱动电路的负载连接不良,出现了开路故障;当测得的分压电阻的电流I>Imax时,则存在流经分压电阻的电流,此时没有出现开路故障。
当分流电阻的电流值小于第一预设电流或大于第二预设电流时,驱动电路的负载可以为短路故障,也可以为其它故障。
Claims (9)
- 一种开路故障检测系统,包括:控制单元、驱动电路和运算放大测量单元,其中,所述驱动电路包括分流电阻;所述控制单元的第一端与所述驱动电路的第一端电连接,所述控制单元设置为输出控制信号至所述驱动电路;所述运算放大测量单元的第一端与所述驱动电路的第二端电连接,所述运算放大测量单元的第二端与所述控制单元的第二端电连接,所述运算放大测量单元设置为获取所述驱动电路的分流电阻的电压值并发送所述分流电阻的电压值至所述控制单元;所述控制单元还设置为根据获取的所述分流电阻的电压值计算所述分流电阻的电流值,并根据计算的所述分流电阻的电流值判断所述驱动电路的负载是否出现开路故障。
- 根据权利要求1所述的开路故障检测系统,其中,所述驱动电路还包括第一金属氧化物半导体MOS管、第二MOS管、第三MOS管和第四MOS管;所述第一MOS管的栅极、第二MOS管的栅极、第三MOS管的栅极和第四MOS管的栅极与所述控制单元电连接,所述第一MOS管的源极和第二MOS管的源极与电源电压电连接,所述第一MOS管的漏极与所述第三MOS管的漏极以及所述驱动电路的负载的第一端电连接,所述第二MOS管的漏极与所述第四MOS管的漏极和所述驱动电路的负载的第二端电连接,所述第三MOS管的源极与所述第四MOS管的源极和所述分流电阻的第一端电连接,所述分流电阻的第二端接地。
- 根据权利要求2所述的开路故障检测系统,其中,所述第一MOS管和所述第二MOS管为PMOS管,所述第三MOS管和所述第四MOS管为NMOS管。
- 根据权利要求1所述的开路故障检测系统,其中,所述控制单元输出的控制信号包括脉冲宽度调制PWM信号。
- 根据权利要求4所述的开路故障检测系统,其中,所述控制单元输出的控制信号还包括诊断脉冲信号,所述诊断脉冲信号位于所述PWM信号的高电平持续时间内。
- 一种开路故障检测方法,应用于权利要求1-5任一项所述的开路故障检测系统,所述开路故障检测方法包括:所述控制单元输出控制信号至所述驱动电路;所述运算放大测量单元获取所述驱动电路的分流电阻的电压值并发送所述 分流电阻的电压值至所述控制单元;所述控制单元根据获取的所述分流电阻的电压值计算所述分流电阻的电流值,并根据计算的所述分流电阻的电流值判断所述驱动电路的负载是否出现开路故障。
- 根据权利要求6所述的开路故障检测方法,其中,所述控制单元根据计算的所述分流电阻的电流值判断所述驱动电路是否出现开路故障包括:在所述分流电阻的电流值大于或等于第一预设电流且小于或等于第二预设电流的情况下,判断所述驱动电路的负载为正常状态;在所述分流电阻的电流值小于所述第一预设电流或大于所述第二预设电流的情况下,判断所述驱动电路的负载为故障状态。
- 根据权利要求7所述的开路故障检测方法,其中,所述在所述分流电阻的电流值小于所述第一预设电流或大于所述第二预设电流的情况下,判断所述驱动电路的负载为故障状态包括:在所述分流电阻的电流值等于零的情况下,判断所述驱动电路的负载出现开路故障;在所述分流电阻的电流值小于所述第一预设电流或大于所述第二预设电流的情况下,判断所述驱动电路的负载出现短路故障。
- 根据权利要求6所述的开路故障检测方法,其中,所述控制单元根据获取的所述分流电阻的电压值计算所述分流电阻的电流值包括:所述控制单元根据所述运算放大测量单元发送的所述分流电阻的电压值及所述分流电阻的阻值计算所述分流电阻的电流值。
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