WO2021238681A1 - 驱动背板、发光二极管芯片的转移方法及显示装置 - Google Patents

驱动背板、发光二极管芯片的转移方法及显示装置 Download PDF

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Publication number
WO2021238681A1
WO2021238681A1 PCT/CN2021/093886 CN2021093886W WO2021238681A1 WO 2021238681 A1 WO2021238681 A1 WO 2021238681A1 CN 2021093886 W CN2021093886 W CN 2021093886W WO 2021238681 A1 WO2021238681 A1 WO 2021238681A1
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Prior art keywords
light
emitting diode
transfer carrier
diode chip
transfer
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PCT/CN2021/093886
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English (en)
French (fr)
Inventor
吕志军
张锋
刘文渠
宋晓欣
崔钊
董立文
孟德天
王利波
侯东飞
张立震
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京东方科技集团股份有限公司
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Priority to US17/922,139 priority Critical patent/US20230215851A1/en
Publication of WO2021238681A1 publication Critical patent/WO2021238681A1/zh

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    • H01L25/167Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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Definitions

  • the present disclosure relates to the field of display technology, in particular to a driving backplane, a transfer method of light-emitting diode chips, and a display device.
  • a light-emitting diode chip is a semiconductor diode that can convert electrical energy into light energy. Because of its small size, high brightness, and low energy consumption, the light-emitting diode chip is widely used in fields such as display screens, backlights, and lighting.
  • Micro-LED chips are light-emitting diode chips with a size of less than 100 microns.
  • a massive transfer process is required, specifically, a large number (usually tens of thousands to hundreds of thousands) of micro-light-emitting diode chips are transferred to the driving circuit board.
  • the current transfer accuracy of the miniature light-emitting diode chip is low, resulting in a low yield of the display device.
  • a drive backplane including:
  • a plurality of contact electrodes are located on one side of the base substrate, and the plurality of contact electrodes are arranged in an array in a first direction and a second direction and enclose a display area.
  • the two directions cross each other;
  • a plurality of electromagnetic structures are located on one side of the base substrate, the plurality of electromagnetic structures are symmetrically arranged about a first straight line and a second straight line, and the first straight line is the display area in the first direction The line where the center line of the display area is located, and the second line is the line where the center line of the display area in the second direction is located;
  • the drive circuit is located between the base substrate and the layer where the contact electrode is located.
  • the drive circuit is electrically connected to each of the electromagnetic structures and is configured to transfer the light-emitting diode chip to each of the
  • the electromagnetic structure applies a current signal so that each electromagnetic structure generates a magnetic field that is the same as that of the light-emitting diode chip, and after the alignment is completed, the application of current signal to each electromagnetic structure is stopped, so that the light-emitting diode chip Contact with the corresponding contact electrode under pressure.
  • the drive backplane provided by the embodiment of the present disclosure, in at least a part of the display area, at least four contact electrodes are arranged symmetrically around the contact electrode.
  • the electromagnetic structure in at least a part of the display area, at least four contact electrodes are arranged symmetrically around the contact electrode.
  • the drive backplane includes at least four symmetrical arrangement of the first straight line and the second straight line located in the edge area. Alignment area; the edge area is an area outside the display area;
  • the electromagnetic structure is provided in each of the alignment areas.
  • the electromagnetic structure includes: a conductive column and a conductive coil surrounding the conductive column;
  • the extending direction of the conductive pillar is perpendicular to the surface of the driving backplane.
  • the conductive coil includes: a plurality of sub-coils arranged in a stack;
  • the electromagnetic structure further includes: an insulating layer located between the adjacent sub-coils;
  • Two adjacent sub-coils are electrically connected through through holes in the insulating layer.
  • the driving circuit includes a thin film transistor
  • At least part of the sub-coils of the conductive coil are respectively arranged in the same layer as the source electrode and the gate electrode of the thin film transistor.
  • an embodiment of the present disclosure also provides a display device, including: the above-mentioned driving backplane, and a plurality of light-emitting diode chips bound on each contact electrode of the driving backplane.
  • embodiments of the present disclosure also provide a method for transferring light-emitting diode chips, including:
  • a transfer carrier is provided; the surface on one side of the transfer carrier has a plurality of light-emitting diode chips; the light-emitting diode chip includes two lead-out electrodes, and the lead-out electrodes are located on the side of the light-emitting diode chip away from the transfer carrier One side; magnetize the extraction electrodes of each of the light-emitting diode chips, so that the magnetic properties of the extraction electrodes are the same;
  • the transfer carrier board Moving the transfer carrier board onto the above-mentioned driving backplane, and the transfer carrier board has a side of the light-emitting diode chip opposite to the side of the driving backplane with contact electrodes;
  • a current signal is applied to each electromagnetic structure in the drive backplane, so that each electromagnetic structure generates and Lead out the magnetic field with the same electrode magnetism;
  • the surface of the transfer carrier is provided with pyrolytic adhesive;
  • the separating the transfer carrier board from each of the light-emitting diode chips includes:
  • the transfer carrier is heated to reduce the viscosity of the pyrolytic adhesive, so that the transfer carrier is separated from the light-emitting diode chip.
  • the surface of the transfer carrier is provided with a photo-releasing adhesive;
  • the separating the transfer carrier board from each of the light-emitting diode chips includes:
  • the light of the set wavelength range is used to irradiate the photo-deadhesive to reduce the viscosity of the photo-deadhesive, so that the transfer carrier is separated from the light-emitting diode chip.
  • the providing a transfer carrier includes:
  • the lead-out electrode of the light-emitting diode chip is located on the side of the light-emitting diode chip away from the wafer;
  • the light-emitting diode chip on the intermediate carrier is transferred to the transfer carrier so that the lead-out electrode of the LED chip is located on the side of the light-emitting diode chip away from the transfer carrier.
  • FIG. 1 is a schematic diagram of a cross-sectional structure of a driving backplane provided by an embodiment of the disclosure
  • FIG. 2 is a schematic top view of a structure of a driving backplane provided by an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of another top view structure of a driving backplane provided by an embodiment of the disclosure.
  • FIG. 4 is a schematic diagram of another top view structure of the driving backplane provided by the embodiments of the disclosure.
  • Figure 5 is an enlarged schematic diagram of the electromagnetic structure
  • FIG. 6 is a flowchart of a method for transferring a light-emitting diode chip according to an embodiment of the disclosure
  • FIG. 7-9, FIG. 11, and FIG. 12 are schematic diagrams of the structure corresponding to each step of the transfer method in the embodiment of the disclosure.
  • Figure 10 is a schematic diagram of the force analysis of the transfer carrier plate during the second alignment process
  • FIG. 13 is a schematic flowchart of a method for transferring a light-emitting diode chip to a transfer carrier in an embodiment of the disclosure
  • embodiments of the present disclosure provide a driving backplane, a transfer method of light emitting diode chips, and a display device.
  • FIG. 1 is a schematic cross-sectional structure diagram of a drive backplane provided by an embodiment of the disclosure
  • FIG. 2 is a schematic top view structure diagram of a drive backplane provided by an embodiment of the disclosure, as shown in FIGS.
  • the driving backplane includes: a base substrate 10, a driving circuit 11 and a plurality of electromagnetic structures 13 on the base substrate 10, and a plurality of contact electrodes on the side of the driving circuit 11 away from the base substrate 10 12;
  • the multiple contact electrodes 12 in the drive backplane are arranged in an array in the first direction X and the second direction Y, and the first direction X and the second direction Y cross each other; the multiple contact electrodes 12 in the drive backplane enclose Display area A;
  • the multiple electromagnetic structures 13 in the drive backplane are symmetrically arranged with respect to the first straight line L1 and the second straight line L2;
  • the first straight line L1 is the straight line where the center line of the display area A in the first direction X is located, and the second straight line L2 is The straight line where the center line of the display area A in the second direction Y is located;
  • the driving circuit 11 is electrically connected to each electromagnetic structure 13 for applying a current signal to each electromagnetic structure 13 in the process of transferring the alignment of the light-emitting diode chip, so that each electromagnetic structure 13 generates a magnetic field that is the same as that of the light-emitting diode chip. After the alignment is completed, the application of current signals to each electromagnetic structure 13 is stopped, so that the light-emitting diode chip is in contact with the corresponding contact electrode 12 under the action of pressure.
  • a plurality of electromagnetic structures are arranged on a base substrate, and the plurality of electromagnetic structures in the driving backplane are symmetrically arranged with respect to the first straight line and the second straight line, and the light emitting diode chip is transferred.
  • a current signal can be applied to each electromagnetic structure through the drive circuit, so that each electromagnetic structure generates a magnetic field that is the same as that of the light-emitting diode chip.
  • the transfer carrier According to the stress generated by the magnetic force of each electromagnetic structure on the transfer carrier, the transfer carrier can be moved When the transfer carrier is balanced in various directions parallel to the surface of the transfer carrier, the light-emitting diode chip and the corresponding contact electrode can be accurately aligned, thereby improving the transfer accuracy of the light-emitting diode chip.
  • the light-emitting diode chip may be a miniature light-emitting diode chip with a size of less than 100 microns, or may be a light-emitting diode chip of other sizes, which is not limited here.
  • the light-emitting diode chip is formed on a wafer, and the distance between the light-emitting diode chips on the wafer can be the same as or multiples of the distance between the contact electrodes on the driving backplane.
  • the light-emitting diode chip generally includes an epitaxial structure And two lead electrodes.
  • the two lead electrodes of the light emitting diode chip are located on the same side of the epitaxial structure as an example for description.
  • the two lead electrodes of the light emitting diode chip may also be located in the epitaxial structure. On both sides.
  • a plurality of contact electrodes 12 in the driving backplane are arranged in an array in a first direction X and a second direction Y.
  • the figure shows that the first direction X and the second direction Y are perpendicular to each other as an example. In a specific implementation, the first direction X and the second direction Y may also be non-perpendicular, which is not limited here.
  • the driving circuit 11 is electrically connected to each contact electrode 12, and each contact electrode 12 can correspond to a lead electrode in the light-emitting diode chip. Apply a driving signal to realize the screen display.
  • the drive circuit 11 is electrically connected to each electromagnetic structure 13, so that a current signal can be applied to each electromagnetic structure 13 through the drive circuit 11 to cause each electromagnetic structure 13 to generate a magnetic field, and the electromagnetic structure 13 can be controlled to generate a magnetic field by controlling the direction of the current. ⁇ magnetism.
  • the light-emitting diode chip formed on the wafer needs to be transferred to the transfer carrier so that the positions of the light-emitting diode chips on the transfer carrier and the contact electrodes on the drive backplane are the same.
  • the light-emitting diode chip on the transfer carrier board is then transferred to the driving backplane, so as to realize the electrical connection between the light-emitting diode chip and the driving backplane.
  • the multiple electromagnetic structures 13 in the driving backplane are symmetrically arranged with respect to the first line L1 and the second line L2, and the electric field generated by each electromagnetic structure 13 is the same as that of the light-emitting diode chip on the transfer carrier, according to the same
  • the principle of extreme repulsion when the transfer carrier reaches a force balance in a direction parallel to the surface of the transfer carrier, the second alignment of the transfer carrier and the drive backplane is completed, so that the light-emitting diode chip is located on the corresponding contact electrode Right above, the precise alignment of the light-emitting diode chip and the contact electrode is realized.
  • the transfer carrier plate is at least balanced when the forces in the first direction X and the second direction Y are balanced.
  • the transfer carrier board reaches a force balance in a direction parallel to the surface of the transfer carrier board, which can be understood as the force balance of the transfer carrier board in this direction, that is, the force balance can be achieved within a certain error range. .
  • the size of the contact electrode can be set to be larger than the size of the lead electrode of the light-emitting diode chip to prevent connection failure due to misalignment.
  • the electromagnetic structure can be provided in at least the following two ways.
  • At least a part of the area C of the display area A at least four electromagnetic structures 13 arranged symmetrically with respect to the contact electrode 12 are provided around the contact electrode 12.
  • the electromagnetic structure 13 is provided in the area C as an example.
  • the area C four symmetrical electromagnetic structures 13 may be provided around the contact electrode 12.
  • the electromagnetic structure 13 may also be placed on the contact electrode 12. There are more electromagnetic structures 13 around, which are not limited here.
  • the area C is located at the middle position of the display area A as an example. In a specific implementation, the area C may also be located at other positions.
  • the area C may include two sub-areas set with respect to the first straight line L1, or As shown in FIG. 3, the area C may also overlap the display area A, that is, an electromagnetic structure 13 may be provided around each contact electrode 12 in the display area A.
  • four electromagnetic structures 13 can be arranged around the contact electrode 12 as an example.
  • the number of electromagnetic structures 13 arranged around the contact electrode 12 can also be other numbers, and between adjacent contact electrodes 12
  • the electromagnetic structure 13 can also be shared.
  • the distribution of the electromagnetic structure 13 is not limited here. In the specific implementation, it can be set according to the actual situation, as long as the multiple electromagnetic structures 13 in the drive backplane are related to the first line L1 and the first line L1.
  • the two straight lines L2 can be set symmetrically.
  • the driving backplane includes at least four alignment areas D located in the edge area and symmetrically arranged with respect to the first straight line L1 and the second straight line L2; the edge area is an area outside the display area A;
  • An electromagnetic structure 13 is provided in each alignment area D.
  • FIG. 4 four electromagnetic structures 13 are provided in the positioning area D as an example for illustration. In specific implementation, other numbers of electromagnetic structures 13 may also be provided in the positioning area D, which is not limited here. In a specific implementation, an electromagnetic structure can be arranged in the alignment area D according to the actual situation, as long as the multiple electromagnetic structures 13 in the driving backplane are arranged symmetrically with respect to the first straight line L1 and the second straight line L2.
  • the electromagnetic structure 13 in the drive backplane can be set according to the required magnetic force, and the above-mentioned method 1 can be used for the setting, or only the method 2 can be used for the setting, or the method 1 and The second method is combined, that is, the electromagnetic structure 13 is provided in both the display area A and the edge area, which is not limited here.
  • FIGS. 2 to 4 a limited number of contact electrodes are shown in FIGS. 2 to 4, and the number and arrangement of the contact electrodes are not limited. In the specific implementation, it can be based on It is actually necessary to set the number and arrangement of contact electrodes.
  • FIG. 5 is an enlarged schematic diagram of the electromagnetic structure.
  • the electromagnetic structure includes: a conductive column 131 and a conductive coil 132 surrounding the conductive column 131;
  • the extending direction of the conductive pillar 131 is perpendicular to the surface of the driving backplane.
  • the conductive column 131 By providing the conductive column 131 and the conductive coil 132, after applying a current signal to the conductive coil 132, the conductive column 131 can generate magnetic poles.
  • the material of the conductive coil 132 may be one or a combination of indium tin oxide (ITO), molybdenum (Mo), copper (Cu), aluminum (Al), and silver (Ag).
  • the material of the conductive pillar 131 may be a metal material, such as iron.
  • the conductive coil 132 includes: a plurality of sub-coils arranged in a stack;
  • the electromagnetic structure further includes: an insulating layer 133 located between adjacent sub-coils;
  • Two adjacent sub-coils are electrically connected through the through holes in the insulating layer 133.
  • the conductive coil 132 includes sub-coils 132a, 132b, and 132c as an example for illustration. In specific implementation, the conductive coil 132 may also include other numbers of sub-coils, which is not limited here. As shown in FIG. 5, the sub-coil 132a is electrically connected to the sub-coil 132b through the through hole V1, and the sub-coil 132b is electrically connected to the sub-coil 132c through the through hole V2.
  • the electromagnetic structure may further include a connecting terminal 134, and the electromagnetic structure may be electrically connected to the driving circuit through the connecting terminal 134.
  • the connection terminal 134 may be electrically connected to the conductive coil 132 through the through hole V3 in the insulating layer 133.
  • the driving circuit may include: a thin film transistor
  • At least part of the sub-coils of the conductive coil are respectively arranged in the same layer as the source electrode and the gate electrode of the thin film transistor.
  • the sub-coils, the source and the gate can be fabricated by the same patterning process, thereby saving process steps and saving Production costs.
  • the insulating layer in the electromagnetic structure can also be provided in the same layer as the insulating layer in the driving circuit to further reduce the manufacturing cost.
  • the sub-coils and the insulating layers in the electromagnetic structure can be manufactured layer by layer.
  • embodiments of the present disclosure also provide a display device, including: the above-mentioned driving backplane, and a plurality of light-emitting diode chips bound on the contact electrodes of the driving backplane.
  • the display device can be applied to any products or components with display functions such as mobile phones, tablet computers, televisions, monitors, notebook computers, digital photo frames, navigators, etc. Since the principle of solving the problem of the display device is similar to that of the aforementioned driving backplane, the implementation of the display device can refer to the implementation of the aforementioned driving backplane, and the repetition will not be repeated.
  • embodiments of the present disclosure also provide a method for transferring light-emitting diode chips. Since the principle of the transfer method to solve the problem is similar to the above-mentioned driving backplane, the implementation of the transferring method can be referred to the above-mentioned driving The implementation of the backplane will not be repeated here.
  • the method for transferring the light-emitting diode chip provided by the embodiment of the present disclosure, as shown in FIG. 6, includes:
  • a transfer carrier 20 is provided; the surface on one side of the transfer carrier 20 has a plurality of light emitting diode chips 21; the light emitting diode chip 21 includes two lead electrodes 212, and the lead electrodes 212 are located on the light emitting diode chip 21 The side away from the transfer carrier 20; magnetize the lead electrodes 212 of each light-emitting diode chip 21, so that the magnetic properties of the lead electrodes 212 are the same, and the magnetic properties of the lead electrodes 212 are all N poles for example;
  • the transfer carrier 20 is moved to the above-mentioned driving backplane, and the transfer carrier 20 has a side of the light emitting diode chip 21 opposite to the side of the driving backplane with the contact electrode 12; for better clarity
  • the transfer process of the light-emitting diode chip is illustrated in FIG. 8, FIG. 9, FIG. 11, and FIG.
  • pressure F is applied to the transfer carrier 20 so that the transfer carrier 20 is close to the driving backplane, and the transfer carrier 20 and the driving backplane are at a certain distance; according to the detected magnetic force of each electromagnetic structure 13
  • the stress generated by the transfer carrier 20 moves the transfer carrier 20; when the transfer carrier 20 is balanced in all directions parallel to the surface of the transfer carrier 20, stop moving the transfer carrier 20 to complete the alignment of the transfer carrier 20 and The second alignment of the drive backplane;
  • a current signal can be applied to each electromagnetic structure through a drive circuit, so that each electromagnetic structure generates a magnetic field that is the same as that of the light-emitting diode chip.
  • the transfer carrier is balanced in various directions parallel to the surface of the transfer carrier, the light-emitting diode chip and the corresponding contact electrode can be accurately aligned. Therefore, the transfer accuracy of the light-emitting diode chip is improved, and the transfer method has a simple process, low transfer cost, high transfer efficiency and accuracy, and is suitable for mass production needs.
  • the multiple light-emitting diode chips 21 on the transfer carrier 20 respectively correspond to the positions of the contact electrodes in the driving backplane.
  • the light emitting diode chip 21 may include an epitaxial structure 211 and a lead electrode 212.
  • the two lead electrodes 212 in the light emitting diode chip 21 are located on the same side of the epitaxial structure 211, and the lead electrode 212 is located on the side of the epitaxial structure 211 away from the transfer carrier 20.
  • the transfer carrier can be placed in the magnetic field of a strong magnet for a period of time to magnetize each lead electrode 212.
  • the size of the transfer carrier can be the same as the size of the drive backplane, and each light-emitting diode chip on the transfer carrier corresponds to the contact electrode in the drive backplane, so that the transfer The light-emitting diode chip is transferred to the drive backplane, and the color filter substrate and the array substrate can be box-matched during the manufacturing process of the liquid crystal display device, thereby saving process equipment and manufacturing cost.
  • step S303 alignment marks corresponding to the positions can be set in the transfer carrier board and the drive backplane.
  • the transfer carrier board and the drive backplane can be aligned by using the alignment marks.
  • each electromagnetic structure 13 can generate the same magnetic field as the extraction electrode 212.
  • step S304 since the electromagnetic structure 13 on the driving backplane has the same magnetic field as the extraction electrode 212 on the transfer carrier 20, it is necessary to apply pressure F to the transfer carrier 20 to bring the transfer carrier 20 close to Drive the backplane, and make a certain distance between the transfer carrier board 20 and the drive backplane.
  • Figure 10 is a schematic diagram of the force analysis of the transfer carrier during the second alignment process.
  • the force of the transfer carrier in the first direction X is used for illustration, and the force in other directions is similar.
  • the third direction Z in FIG. 10 may be a direction perpendicular to the surface of the transfer carrier.
  • the electromagnetic structures in the driving backplane are symmetrically arranged, during the second alignment process, the electromagnetic structures on the driving backplane generate first stress M and second stress N on the transfer carrier board.
  • the component force of the first stress M in the first direction X is M1
  • the component force in the second direction Y is M2
  • the component force of the second stress N in the first direction X is N1
  • the component force in the second direction X is N1.
  • the component force in the direction Y is N2.
  • the component force M2 and the component force N2 can be balanced by the pressure F, so that the transfer carrier board can be close to the drive backplane and maintain a certain distance, and the transfer carrier board can be positioned parallel to the surface of the transfer carrier board.
  • Move in direction. Specifically, the transfer carrier can be moved according to the magnitude of the component force M1 and the component force N1. For example, the component force M1 is greater than the component force N1 in FIG. The difference between the force M1 and the component force N1. When the component force M1 and the component force N1 are approximately equal, it means that the transfer carrier is balanced in the first direction X.
  • the transfer carrier plate is at least balanced when the forces in the first direction X and the second direction Y are balanced. , To stop moving the transfer carrier board to complete the second alignment of the transfer carrier board and the drive backplane.
  • pressure sensing sensors can be provided on the transfer carrier to detect the force on the transfer carrier in various directions.
  • the transfer carrier board is balanced in a certain direction, which can be understood as the force balance of the transfer carrier in this direction, that is, the force balance is achieved within a certain error range. That's it.
  • step S305 after the second alignment is completed, the position between the transfer carrier board and the drive backplane is locked, and the application of current signals to each electromagnetic structure is stopped, and the magnetic field of each electromagnetic structure disappears, so that the transfer carrier board does not By the magnetic force of the electromagnetic structure, the transfer carrier board is brought into contact with the driving backplane under pressure, and then the transfer carrier board and the driving backplane are heated, and pressure is continued to be applied to the transfer carrier board.
  • the magnetism of the lead electrode disappears. This is because when the magnetized material is affected by external energy (such as heating, impact, etc.), the direction of the magnetic moment of each magnetic domain becomes inconsistent, thereby weakening the magnetism Or disappear. Therefore, during the heating process, the energy absorbed by the extraction electrode will increase the kinetic energy of the electrons, which will accelerate the movement of the electrons and disrupt the original orderly arrangement of electrons, and the electrons cannot be restored to their orderly arrangement after cooling, causing the magnetism to disappear.
  • external energy such as heating, impact, etc.
  • the lead electrode or the surface of the contact electrode will be coated with solder material in advance.
  • the solder material can be a thermosetting material such as conductive glue, silver paste or solder paste.
  • the solder material can be coated on the lead electrode by printing or printing.
  • the surface of the electrode or the contact electrode, under the action of heating and pressure, for example, the pressure can be controlled in the range of 0.1-0.5Mpa, so that the lead electrode and the contact electrode are electrically connected, that is, the lead electrode and the corresponding contact electrode are fixedly connected.
  • the surface of the transfer carrier is provided with a thermally debonded adhesive; the transfer carrier is bonded with a plurality of light-emitting diode chips through the thermally debonded adhesive;
  • separating the transfer carrier from each light-emitting diode chip includes:
  • the adhesive layer 22 on the surface of the transfer carrier 20 is a pyrolytic adhesive.
  • the transfer carrier 20 is bonded to the light-emitting diode chip 21 through the adhesive layer 22.
  • the pyrolytic adhesive is heated, the pyrolysis The viscosity of the viscose will decrease, and the viscosity can be restored by pyrolyzing the viscose after cooling.
  • step S305 referring to FIG. 11, by heating the transfer carrier 20, the viscosity of the pyrolytic adhesive can be reduced, so that the transfer carrier 20 is separated from the light-emitting diode chip 21. After the transfer carrier 20 is removed, the result is The structure shown in FIG.
  • step S305 during the process of heating and pressing the transfer carrier plate and the driving back plate, the viscosity of the pyrolytic adhesive on the surface of the transfer carrier plate can be reduced, and there is no need Increase the heating process of the transfer carrier.
  • separating the transfer carrier board from each light-emitting diode chip includes:
  • the surface of the transfer carrier board is provided with photo-deadhesive glue; the transfer carrier board is bonded with a plurality of light-emitting diode chips through the photo-deadhesive glue;
  • separating the transfer carrier from each light-emitting diode chip includes:
  • the light of the set wavelength range is used to irradiate the photo-deadhesive to reduce the viscosity of the photo-deadhesive so that the transfer carrier is separated from the light-emitting diode chip.
  • the adhesive layer 22 on the surface of the transfer carrier 20 is a photo-release adhesive.
  • the transfer carrier 20 is bonded to the light-emitting diode chip 21 through the adhesive layer 22, and the photo-release adhesive is irradiated with light of a set wavelength. When irradiated by light of other wavelengths, the viscosity will be reduced.
  • light with a set wavelength range can be used to irradiate the position of the transfer carrier with the photo-deadhesive to reduce the viscosity of the photo-deadhesive.
  • the light with the set wavelength can be ultraviolet light or infrared light.
  • the light-emitting diode chip can be packaged to prolong the life of the light-emitting diode chip and prevent the light-emitting diode chip from affecting other components due to heat generated when emitting light.
  • materials such as silica gel and epoxy resin can be used.
  • An encapsulation layer is formed on the light-emitting diode chip, and the encapsulation layer can be provided as a whole layer, or it can only cover each light-emitting diode chip.
  • providing a transfer carrier board may include:
  • a plurality of light-emitting diode chips 21 are formed on the wafer 23; the lead-out electrode 212 of the light-emitting diode chip 21 is located on the side of the light-emitting diode chip 21 away from the wafer 23;
  • the epitaxial structure 211 is grown on the surface of the epitaxial structure 211, and then a lead electrode 212 is formed on the surface of the epitaxial structure 211.
  • the distance between adjacent light-emitting diode chips 21 on the wafer 23 is the same as or in a multiple relationship with the distance between adjacent contact electrodes in the driving backplane.
  • each light-emitting diode chip 21 on the wafer 23 specifically, without applying an electrical signal to the light-emitting diode chip, use light excitation to excite each light-emitting diode chip to emit light to detect whether the light-emitting diode chip can Normally emit light, and an automatic optical inspection device can be used to detect the shape of the light-emitting diode chip, and the abnormal shape of the light-emitting diode chip can be recorded.
  • an automatic optical inspection device can be used to detect the shape of the light-emitting diode chip, and the abnormal shape of the light-emitting diode chip can be recorded.
  • the size of the intermediate carrier board 24 may be greater than or equal to the size of the chip 23, or the size of the intermediate carrier board 24 may also be smaller than the size of the chip 23. In FIG. 15, the size of the intermediate carrier board 24 is smaller than the size of the chip 23 as an example.
  • the light-emitting diode chips on the wafer are transferred to the intermediate carrier through multiple transfers, and during the transfer process, only qualified light-emitting diode chips are transferred, and unqualified light-emitting diode chips are skipped, so as to screen out during the transfer process Qualified light-emitting diode chips are tested.
  • an adhesive layer 22 may be coated on the surface of the intermediate carrier 24.
  • the adhesive layer 22 is a photo-debonding glue or a pyro-debonding glue.
  • the photo-debonding glue is irradiated by light of a set wavelength
  • the viscosity is reduced, and the viscosity can be restored under other wavelengths of light.
  • the pyrolytic adhesive reduces the viscosity when heated, and restores the viscosity after cooling.
  • the adhesive layer 22 can be patterned to pick up the light-emitting diode chip 21 at a set position on the wafer 23. For example, in FIG.
  • the pattern of the adhesive layer 22 of the intermediate carrier 24 and the odd-numbered column (or even-number The light-emitting diode chips 21 of the column) correspond to each other, so that the intermediate carrier 24 only picks up the light-emitting diode chips 21 of odd-numbered columns (or even-numbered columns) on the wafer 23.
  • the wafer 23 is moved onto the intermediate carrier 24, and after the light-emitting diode chip 21 is in contact with the adhesive layer 22 and bonded, a laser is used to irradiate the position of the light-emitting diode chip 21 to be transferred to make the light-emitting diode
  • the chip 21 is separated from the wafer 23, and according to the inspection result of the light-emitting diode chip in the above step S402, only the qualified light-emitting diode chip is transferred to the intermediate carrier, that is, only the light-emitting diode chip that has passed the inspection is irradiated with laser light. Improve the yield of light-emitting diode chips.
  • the light-emitting diode chip 21 on the intermediate carrier 24 is transferred to the transfer carrier 20, so that the lead-out electrode 212 of the light-emitting diode chip 21 is located on the side of the LED chip 21 away from the transfer carrier 20 .
  • the size of the intermediate carrier board 24 is smaller than the size of the transfer carrier board 20 as an example for illustration. 21 is transferred to the transfer carrier 20.
  • an adhesive layer 22 is coated on the surface of the transfer carrier 20 (taking the adhesive layer 22 as a pyrolytic adhesive as an example), the middle carrier 24 is moved onto the transfer carrier 20, and the middle carrier 24 The side with the light-emitting diode chip 21 is opposite to the side with the adhesive layer 22 of the transfer carrier 20. After the light-emitting diode chip 21 and the adhesive layer 22 on the surface of the transfer carrier 20 are glued, the adhesive on the intermediate carrier 24 The laminate 22 is heated to separate the light-emitting diode chip 21 from the intermediate carrier board 24, and then the intermediate carrier board 20 is removed to obtain the structure shown in FIG. 7.
  • step S404 In addition, during or after the above-mentioned step S404, according to the detection result of step S402, qualified light-emitting diode chips can be supplemented at the position of the dead spot, so that the light-emitting diode chips transferred to the transfer carrier are all qualified light-emitting The diode chip improves the yield of the light-emitting diode chip.
  • each light-emitting diode chip on the wafer is inspected, and in the subsequent transfer process, only the light-emitting diode chips that pass the inspection are transferred to the intermediate carrier board.
  • the yield of the light-emitting diode chip is improved.
  • the driving backplane, the light-emitting diode chip transfer method, and the display device provided by the embodiments of the present disclosure are provided by arranging a plurality of electromagnetic structures on a base substrate, and the plurality of electromagnetic structures in the driving backplane are related to the first straight line and the second line.
  • the two lines are arranged symmetrically.
  • a current signal can be applied to each electromagnetic structure through the drive circuit, so that each electromagnetic structure generates a magnetic field that is the same as that of the light-emitting diode chip, and transfers according to the magnetic force of each electromagnetic structure.
  • the stress generated by the carrier moves the transfer carrier.
  • the transfer carrier is balanced in all directions parallel to the surface of the transfer carrier, the light-emitting diode chip and the corresponding contact electrode can be accurately aligned, thereby improving the light-emitting diode chip The transfer accuracy.

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Abstract

一种驱动背板、发光二极管芯片(21)的转移方法及显示装置,驱动背板,包括:衬底基板(10),驱动电路,多个电磁结构(13),以及多个接触电极(12);驱动背板中的多个电磁结构(13)关于第一直线(L1)和第二直线(L2)对称设置,由于驱动背板中的多个电磁结构(13)关于第一直线(L1)和第二直线(L2)对称设置,在转移发光二极管芯片(21)的对位过程中,可以通过驱动电路向各电磁结构(13)施加电流信号,使各电磁结构(13)产生与发光二极管芯片(21)磁性相同的磁场,根据各电磁结构(13)的磁力对转移载板(20)产生的应力,移动转移载板(20),转移载板(20)在平行于转移载板(20)表面的各方向受力平衡时,发光二极管芯片(21)与对应的接触电极(12)精准对位,提高了发光二极管芯片(21)的转移精度。

Description

驱动背板、发光二极管芯片的转移方法及显示装置
相关申请的交叉引用
本公开要求在2020年05月25日提交中国专利局、申请号为202010447024.7、申请名称为“驱动背板、发光二极管芯片的转移方法及显示装置”的中国专利申请的优先权,其全部内容通过引用结合在本公开中。
技术领域
本公开涉及显示技术领域,尤指一种驱动背板、发光二极管芯片的转移方法及显示装置。
背景技术
发光二极管芯片是一种可以把电能转化成光能的半导体二极管,由于发光二极管芯片具有体积小、亮度高、能耗小等特点,因而被广泛地应用在显示屏、背光源、照明等领域。
微型发光二极管(Micro-LED)芯片是尺寸达到100微米以内的发光二极管芯片。通常微型发光二极管芯片在制作完成之后,需要进行巨量转移工艺,具体地,将大量(通常为几万至几十万)的微型发光二极管芯片转移到驱动电路板上。然而,目前微型发光二极管芯片的转移精度较低,导致显示装置的良率较低。
发明内容
第一方面,本公开实施例提供了一种驱动背板,包括:
衬底基板;
多个接触电极,位于所述衬底基板一侧,所述多个所述接触电极在第一方向和第二方向上呈阵列排布且围成显示区域,所述第一方向与所述第二方向相互交叉;
多个电磁结构,位于所述衬底基板一侧,所述多个电磁结构关于第一直线和第二直线对称设置,所述第一直线为所述显示区域在所述第一方向上的中线所在的直线,所述第二直线为所述显示区域在所述第二方向上的中线所在的直线;
驱动电路,位于所述衬底基板与所述接触电极所在层之间,所述驱动电路与各所述电磁结构电连接,被配置为在转移发光二极管芯片的对位过程中,向各所述电磁结构施加电流信号,以使各所述电磁结构产生与所述发光二极管芯片磁性相同的磁场,并在对位完成后,停止向各所述电磁结构施加电流信号,以使所述发光二极管芯片在压力的作用下与对应的接触电极接触。
在一种可能的实现方式中,在本公开实施例提供的驱动背板中,在所述显示区域的至少部分区域中,所述接触电极的周围设有关于该接触电极对称设置的至少四个所述电磁结构。
在一种可能的实现方式中,在本公开实施例提供的驱动背板中,在全部所述接触电极的周围设有关于该接触电极对称设置的四个所述电磁结构。
在一种可能的实现方式中,在本公开实施例提供的驱动背板中,所述驱动背板包括位于边缘区域且关于所述第一直线和所述第二直线对称设置的至少四个对位区域;所述边缘区域为所述显示区域以外的区域;
在各所述对位区域内均设有所述电磁结构。
在一种可能的实现方式中,在本公开实施例提供的驱动背板中,所述电磁结构包括:导电柱,以及围绕所述导电柱的导电线圈;
所述导电柱的延伸方向垂直于所述驱动背板的表面。
在一种可能的实现方式中,在本公开实施例提供的驱动背板中,所述导电线圈包括:层叠设置的多个子线圈;
所述电磁结构,还包括:位于相邻所述子线圈之间的绝缘层;
相邻的两个所述子线圈通过所述绝缘层中的通孔电连接。
在一种可能的实现方式中,在本公开实施例提供的驱动背板中,所述驱动电路包括:薄膜晶体管;
所述导电线圈的至少部分所述子线圈分别与所述薄膜晶体管的源极、栅极同层设置。
第二方面,本公开实施例还提供了一种显示装置,包括:上述驱动背板,以及绑定于所述驱动背板的各接触电极之上的多个发光二极管芯片。
第三方面,本公开实施例还提供了一种发光二极管芯片的转移方法,包括:
提供一转移载板;所述转移载板一侧的表面具有多个发光二极管芯片;所述发光二极管芯片包括两个引出电极,所述引出电极位于所述发光二极管芯片背离所述转移载板的一侧;对各所述发光二极管芯片的所述引出电极进行磁化,以使各所述引出电极的磁性相同;
将所述转移载板移至上述驱动背板之上,且所述转移载板具有所述发光二极管芯片的一面,与所述驱动背板具有接触电极的一面相对;
采用对位标记对所述转移载板与所述驱动背板进行第一次对位后,向所述驱动背板中的各电磁结构施加电流信号,以使各所述电磁结构产生与所述引出电极磁性相同的磁场;
向所述转移载板施加压力,以使所述转移载板靠近所述驱动背板,且所述转移载板与所述驱动背板具有一定距离;根据检测到的各所述电磁结构磁力对所述转移载板产生的应力,移动所述转移载板;当所述转移载板在平行于转移载板表面的各方向受力平衡时,停止移动所述转移载板,以完成对所述转移载板与所述驱动背板的第二次对位;
停止向各所述电磁结构施加电流信号,以使各所述电磁结构的磁场消失;对所述转移载板和所述驱动背板进行加热并压合,以使所述引出电极与对应的接触电极固定连接;将所述转移载板与各所述发光二极管芯片分离,并移走所述转移载板。
在一种可能的实现方式中,在本公开实施例提供的转移方法中,所述转移载板的表面具有热解粘胶;所述转移载板通过所述热解粘胶粘合多个所述发光二极管芯片;
所述将所述转移载板与各所述发光二极管芯片分离,包括:
对所述转移载板进行加热,降低所述热解粘胶的粘度,以使所述转移载板与所述发光二极管芯片分离。
在一种可能的实现方式中,在本公开实施例提供的转移方法中,所述转移载板的表面具有光解粘胶;所述转移载板通过所述光解粘胶粘合多个所述发光二极管芯片;
所述将所述转移载板与各所述发光二极管芯片分离,包括:
采用设定波长范围的光线照射所述光解粘胶,降低所述光解粘胶的粘度,以使所述转移载板与所述发光二极管芯片分离。
在一种可能的实现方式中,在本公开实施例提供的转移方法中,所述提供一转移载板,包括:
在晶片上形成多个所述发光二极管芯片;所述发光二极管芯片的引出电极位于发光二极管芯片背离所述晶片的一侧;
对所述晶片上的各所述发光二极管芯片进行检测;
将所述晶片移至中间载板的上方,并且所述晶片具有所述发光二极管芯片的一面朝向所述中间载板,将检测合格的所述发光二极管芯片转移到所述中间载板之上;
将所述中间载板之上的所述发光二极管芯片转移到所述转移载板之上,以使所述发光二极管芯片的引出电极位于发光二极管芯片背离所述转移载板的一侧。
附图说明
图1为本公开实施例提供的驱动背板的截面结构示意图;
图2为本公开实施例提供的驱动背板的一种俯视结构示意图;
图3为本公开实施例提供的驱动背板的另一种俯视结构示意图;
图4为本公开实施例提供的驱动背板的另一种俯视结构示意图;
图5为电磁结构的放大示意图;
图6为本公开实施例提供的发光二极管芯片的一种转移方法流程图;
图7至图9、图11及图12为本公开实施例中转移方法各步骤对应的结构示意图;
图10为转移载板在第二次对位过程中的受力分析示意图;
图13为本公开实施例中将发光二极管芯片转移到转移载板的方法流程示意图;
图14至图16为图13中各步骤对应的结构示意图。
具体实施方式
针对相关技术中存在的微型发光二极管芯片的转移精度较低的问题,本公开实施例提供了一种驱动背板、发光二极管芯片的转移方法及显示装置。
下面结合附图,对本公开实施例提供的驱动背板、发光二极管芯片的转移方法及显示装置的具体实施方式进行详细地说明。附图中各膜层的厚度和形状不反映真实比例,目的只是示意说明本公开内容。
本公开实施例提供了一种驱动背板,图1为本公开实施例提供的驱动背板的截面结构示意图,图2为本公开实施例提供的驱动背板的俯视结构示意图,如图1和图2所示,驱动背板包括:衬底基板10,位于衬底基板10之上的驱动电路11和多个电磁结构13,以及位于驱动电路11背离衬底基板10一侧的多个接触电极12;
驱动背板中的多个接触电极12在第一方向X和第二方向Y上呈阵列排布,第一方向X与第二方向Y相互交叉;驱动背板中的多个接触电极12围成显示区域A;
驱动背板中的多个电磁结构13关于第一直线L1和第二直线L2对称设置;第一直线L1为显示区域A在第一方向X上的中线所在的直线,第二直线L2为显示区域A在第二方向Y上的中线所在的直线;
驱动电路11与各电磁结构13电连接,用于在转移发光二极管芯片的对位过程中,向各电磁结构13施加电流信号,以使各电磁结构13产生与发光 二极管芯片磁性相同的磁场,并在对位完成后,停止向各电磁结构13施加电流信号,以使发光二极管芯片在压力的作用下与对应的接触电极12接触。
本公开实施例提供的驱动背板,通过在衬底基板之上设置多个电磁结构,且驱动背板中的多个电磁结构关于第一直线和第二直线对称设置,在转移发光二极管芯片的对位过程中,可以通过驱动电路向各电磁结构施加电流信号,使各电磁结构产生与发光二极管芯片磁性相同的磁场,根据各电磁结构的磁力对转移载板产生的应力,移动转移载板,当转移载板在平行于转移载板表面的各方向受力平衡时,发光二极管芯片与对应的接触电极的能够精准对位,从而提高了发光二极管芯片的转移精度。
本公开实施例中,发光二极管芯片可以为尺寸小于100微米的微型发光二极管芯片,也可以为其他尺寸的发光二极管芯片,此处不做限定。在实际应用中,发光二极管芯片形成于晶片上,晶片上各发光二极管芯片之间的间距,可以与驱动背板上各接触电极之间的间距相同或成倍数关系,发光二极管芯片一般包括外延结构以及两个引出电极,本公开实施例中,以发光二极管芯片的两个引出电极位于外延结构的同一侧为例进行说明,在具体实施时,发光二极管芯片的两个引出电极也可以位于外延结构的两侧。
如图2所示,驱动背板中的多个接触电极12在第一方向X和第二方向Y上呈阵列排布,图中以第一方向X与第二方向Y相互垂直为例进行示意,在具体实施时,第一方向X与第二方向Y也可以不垂直,此处不做限定。驱动电路11与各接触电极12电连接,每一个接触电极12可以与发光二极管芯片中的一个引出电极对应,将发光二极管芯片转移到驱动背板上之后,可以通过驱动电路11向各接触电极12施加驱动信号,以实现画面显示。并且,驱动电路11与各电磁结构13电连接,从而可以通过驱动电路11向各电磁结构13施加电流信号,使各电磁结构13产生磁场,并且,可以通过控制电流方向,控制电磁结构13产生磁场的磁性。
为了便于后续发光二极管芯片与驱动背板实现电连接,需要将形成于晶片上的发光二极管芯片转移到转移载板上,使转移载板上发光二极管芯片与 驱动背板上的接触电极的位置相对应,然后再将转移载板上的发光二极管芯片转移到驱动背板上,从而实现发光二极管芯片与驱动背板的电连接。
将转移载板上的发光二极管芯片转移到驱动背板上的过程中,先采用对位标记对转移载板与驱动背板进行第一次对位,使发光二极管芯片与对应的接触电极的距离较近。由于驱动背板中的多个电磁结构13关于第一直线L1和第二直线L2对称设置,且各电磁结构13产生的电场与转移载板上的发光二极管芯片的磁性相同,因而,根据同极相斥原理,当转移载板在平行于转移载板表面的方向上达到受力平衡时,完成转移载板与驱动背板的第二次对位,使发光二极管芯片位于对应的接触电极的正上方,实现发光二极管芯片与接触电极的精准对位。由于驱动背板中的各电磁结构关于第一直线和第二直线对称设置,在第二次对位过程中,转移载板至少在第一方向X和第二方向Y的受力达到平衡时,才能停止移动转移载板。并且,转移载板在平行于转移载板表面的方向上达到受力平衡,可以理解为转移载板在该方向上的受力近似平衡,即是在一定的误差范围内达到受力平衡即可。
此外,为了便于将发光二极管芯片与对应的接触电极进行对位,可以将接触电极的尺寸设置为大于发光二极管芯片的引出电极的尺寸,防止由于对位偏离而导致的连接失败。
在具体实施时,本公开实施例提供的上述驱动背板中,可以至少按照以下两种方式设置电磁结构。
方式一:
如图2所示,在显示区域A的至少部分区域C中,接触电极12的周围设有关于该接触电极12对称设置的至少四个电磁结构13。
图2中以在区域C中设置电磁结构13为例进行示意,在区域C中,接触电极12的周围可以设置四个对称设置的电磁结构13,在具体实施时,也可以在接触电极12的周围设置更多个电磁结构13,此处不做限定。
图2中以区域C位于显示区域A的中间位置处为例进行示意,在具体实施时,区域C也可以位于其他位置,例如区域C可以包括关于第一直线L1 设置的两个子区域,或者,如图3所示,区域C也可以与显示区域A重合,即,可以在显示区域A中的每一个接触电极12的周围均设置电磁结构13。图3中以接触电极12的周围可以设置四个电磁结构13为例,在具体实施时,接触电极12的周围设置的电磁结构13也可以为其他数量,并且,相邻的接触电极12之间也可以共用电磁结构13,此处不对电磁结构13的分布进行限定,在具体实施时,可以根据实际情况进行设置,只要使驱动背板中的多个电磁结构13关于第一直线L1和第二直线L2对称设置即可。
方式二:
如图4所示,驱动背板包括位于边缘区域且关于第一直线L1和第二直线L2对称设置的至少四个对位区域D;边缘区域为显示区域A以外的区域;
在各对位区域D内均设有电磁结构13。
图4中,以对位区域D中设置四个电磁结构13为例进行示意,在具体实施时,对位区域D中也可以设置其他数量的电磁结构13,此处不做限定。在具体实施时,可以根据实际情况在对位区域D内设置电磁结构,只要使驱动背板中的多个电磁结构13关于第一直线L1和第二直线L2对称设置即可。
在实际应用中,可以根据所需的磁力来设置驱动背板中的电磁结构13,可以仅采用上述方式一进行设置,或者,也可以仅采用方式二进行设置,或者,也可以将方式一和方式二进行结合,即在显示区域A和边缘区域均设置电磁结构13,此处不做限定。
应该说明的是,为了清楚的实施驱动背板的结构,图2至图4中以有限数量的接触电极进行示意,并不对接触电极的数量和排布方式进行限定,在具体实施时,可以根据实际需要设置接触电极的数量和排布方式。
具体地,本公开实施例提供的上述驱动背板中,图5为电磁结构的放大示意图,如图5所示,电磁结构包括:导电柱131,以及围绕导电柱131的导电线圈132;
导电柱131的延伸方向垂直于驱动背板的表面。
通过设置导电柱131和导电线圈132,向导电线圈132施加电流信号后, 可以使导电柱131产生磁极。具体地,导电线圈132的材料可以为氧化铟锡(ITO)、钼(Mo)、铜(Cu)、铝(Al)、银(Ag)中的一种或组合。导电柱131的材料可以为金属材料,例如铁。
具体地,本公开实施例提供的上述驱动背板中,如图5所示,导电线圈132包括:层叠设置的多个子线圈;
电磁结构还包括:位于相邻子线圈之间的绝缘层133;
相邻的两个子线圈通过绝缘层133中的通孔电连接。
图5中以导电线圈132包括子线圈132a、132b及132c为例进行示意,在具体实施时,导电线圈132也可以包括其他数量的子线圈,此处不做限定。如图5所示,子线圈132a通过通孔V1与子线圈132b电连接,子线圈132b通过通孔V2与子线圈132c电连接。
此外,电磁结构还可以包括连接端子134,电磁结构可以通过连接端子134与驱动电路实现电连接。连接端子134可以通过绝缘层133中的通孔V3与导电线圈132电连接。
在具体实施时,本公开实施例提供的上述驱动背板中,驱动电路可以包括:薄膜晶体管;
导电线圈的至少部分子线圈分别与薄膜晶体管的源极、栅极同层设置。
通过将导电线圈中的至少部分子线圈与源极、栅极同层设置,在制作工艺过程中,可以将子线圈与源极、栅极采用同一次构图工艺制作,从而可以节省工艺步骤,节约制作成本。并且,电磁结构中的绝缘层,也可以与驱动电路中的绝缘层同层设置,以进一步降低制作成本。
此外,也可以在驱动电路制作完成后,逐层制作电磁结构中的各子线圈和各绝缘层。
基于同一发明构思,本公开实施例还提供了一种显示装置,包括:上述驱动背板,以及绑定于驱动背板的各接触电极之上的多个发光二极管芯片。该显示装置可以应用于手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。由于该显示装置解决问 题的原理与上述驱动背板相似,因此该显示装置的实施可以参见上述驱动背板的实施,重复之处不再赘述。
第三方面,基于同一发明构思,本公开实施例还提供了一种发光二极管芯片的转移方法,由于该转移方法解决问题的原理与上述驱动背板相似,因此该转移方法的实施可以参见上述驱动背板的实施,重复之处不再赘述。
本公开实施例提供的发光二极管芯片的转移方法,如图6所示,包括:
S301、如图7所示,提供一转移载板20;转移载板20一侧的表面具有多个发光二极管芯片21;发光二极管芯片21包括两个引出电极212,引出电极212位于发光二极管芯片21背离转移载板20的一侧;对各发光二极管芯片21的引出电极212进行磁化,以使各引出电极212的磁性相同,以各引出电极212的磁性均为N极为例;
S302、如图8所示,将转移载板20移至上述驱动背板之上,且转移载板20具有发光二极管芯片21的一面,与驱动背板具有接触电极12的一面相对;为了更清楚的示意发光二极管芯片的转移过程,图8、图9、图11及图12中仅以一个发光二极管芯片的转移过程为例进行示意。
S303、采用对位标记对转移载板与驱动背板进行第一次对位后,如图9所示,向驱动背板中的各电磁结构13施加电流信号,以使各电磁结构13产生与引出电极212磁性相同的磁场,以各电磁结构13产生的磁场均为N极为例;
S304、同样参照图9,向转移载板20施加压力F,以使转移载板20靠近驱动背板,且转移载板20与驱动背板具有一定距离;根据检测到的各电磁结构13磁力对转移载板20产生的应力,移动转移载板20;当转移载板20在平行于转移载板20表面的各方向受力平衡时,停止移动转移载板20,以完成对转移载板20与驱动背板的第二次对位;
S305、停止向各电磁结构施加电流信号,以使各电磁结构的磁场消失;参照图11,对转移载板20和驱动背板进行加热并压合,以使引出电极212与对应的接触电极12固定连接;将转移载板20与各发光二极管芯片21分离, 并移走转移载板20,以得到如图12所示的结构。
本公开实施例提供的发光二极管芯片的转移方法,在转移发光二极管芯片的对位过程中,可以通过驱动电路向各电磁结构施加电流信号,使各电磁结构产生与发光二极管芯片磁性相同的磁场,根据各电磁结构的磁力对转移载板产生的应力,移动转移载板,当转移载板在平行于转移载板表面的各方向受力平衡时,发光二极管芯片与对应的接触电极的能够精准对位,从而提高了发光二极管芯片的转移精度,并且,该转移方法工艺过程简单,转移成本低,转移效率和精度较高,适合量产需要。
在上述步骤S301中,转移载板20上的多个发光二极管芯片21分别与驱动背板中的各接触电极的位置相对应。发光二极管芯片21可以包括外延结构211及引出电极212,发光二极管芯片21中的两个引出电极212位于外延结构211的同一侧,且引出电极212位于外延结构211背离转移载板20的一侧。在具体实施时,可以将转移载板置于强磁体的磁场内一段时间,以使各引出电极212磁化。
此外,转移载板的尺寸可以与驱动背板的尺寸一致,并且,转移载板上的各发光二极管芯片分别与驱动背板中的接触电极对应,从而可以通过一次转移工艺,将转移载板上的发光二极管芯片转移到驱动背板上,并且,可以采用液晶显示装置制作过程中对彩膜基板与阵列基板进行对盒的对盒设备,从而可以节省工艺设备,节约制作成本。
在上述步骤S303中,可以在转移载板和驱动背板中设置位置对应的对位标记,在第一次对位过程中,可以采用对位标记将转移载板与驱动背板进行对位。可以通过控制电流信号的电流方向,使各电磁结构13产生与引出电极212磁性相同的磁场。
在上述步骤S304中,由于驱动背板上的电磁结构13具有与转移载板20上的引出电极212磁性相同的磁场,因而,需要向转移载板20施加压力F,以使转移载板20靠近驱动背板,并使转移载板20与驱动背板之间具有一定距离。
图10为转移载板在第二次对位过程中的受力分析示意图,图10中以转移载板在第一方向X上的受力情况进行示意,其他方向的受力情况与之类似,并且图10中第三方向Z可以为垂直于转移载板表面的方向。如图10所示,由于驱动背板中的电磁结构对称设置,因而,在第二次对位过程中,驱动背板上的各电磁结构对转移载板产生第一应力M及第二应力N,其中,第一应力M在第一方向X上的分力为M1,在第二方向Y上的分力为M2,第二应力N在第一方向X上的分力为N1,在第二方向Y上的分力为N2,可以通过压力F平衡分力M2和分力N2,使转移载板可以与驱动背板靠近且保持一定距离,并且转移载板可以在平行于转移载板表面的方向移动。具体地,可以根据分力M1与分力N1的大小,来移动转移载板,例如图10中分力M1大于分力N1,则可以将转移载板向左移动相应的距离,以减小分力M1与分力N1之间的差距,分力M1与分力N1近似相等时,表示转移载板在第一方向X上受力平衡。由于驱动背板上的各电磁结构关于第一直线和第二直线对称设置,因而在第二对位过程中,转移载板至少在第一方向X和第二方向Y的受力达到平衡时,才能停止移动转移载板,以完成转移载板与驱动背板的第二次对位。
在具体实施时,可以在转移载板上设置压力感测传感器,以检测转移载板上在各个方向的受力情况。
应该说明的是,在本公开实施例中,转移载板在某方向受力平衡,可以理解为转移载板在该方向上的受力近似平衡,即是在一定的误差范围内达到受力平衡即可。
在上述步骤S305中,在第二次对位完成后,锁定转移载板与驱动背板之间的位置,停止向各电磁结构施加电流信号,则各电磁结构的磁场消失,使转移载板不再受电磁结构的磁力作用,因而,使转移载板在压力的作用下与驱动背板接触,然后,对转移载板和驱动背板进行加热,并继续向转移载板施加压力。
在加热过程中,引出电极的磁性消失,这是由于被磁化后的材料受到外 来能量(例如加热、冲击等)的影响时,其中的各磁畴的磁矩方向变得不一致,从而使磁性减弱或消失,因而,在加热过程中,引出电极吸收的能量会增加电子动能,使电子的运动加速打乱原来整齐的电子排布,并且冷却后电子无法恢复整齐的排布状态,使磁性消失。
另外,在引出电极或接触电极的表面会事先涂覆焊接材料,例如焊接材料可以为导电胶、银浆或锡膏等热固型材料,可以采用打印或印刷的方式将焊接材料涂覆在引出电极或接触电极的表面,在加热和压力的作用下,例如压力可以控制在0.1~0.5Mpa的范围内,使引出电极与接触电极完成电气连接,即引出电极与对应的接触电极实现固定连接。
具体地,本公开实施例提供的上述转移方法中,转移载板的表面具有热解粘胶;转移载板通过热解粘胶粘合多个发光二极管芯片;
上述步骤S305中,将转移载板与各发光二极管芯片分离,包括:
对转移载板进行加热,降低热解粘胶的粘度,以使转移载板与发光二极管芯片分离;
如图7所示,转移载板20表面的粘合层22为热解粘胶,转移载板20通过粘合层22与发光二极管芯片21粘合,对热解粘胶进行加热时,热解粘胶的粘度会降低,冷却后热解粘胶可以恢复粘性。在上述步骤S305中,参照图11,通过对转移载板20进行加热,可以降低热解粘胶的粘度,从而使转移载板20与发光二极管芯片21分离,移走转移载板20后,得到如图12所示的结构,在具体实施时,在步骤S305中,对转移载板和驱动背板进行加热并压合的过程中,可以降低转移载板表面的热解粘胶的粘度,无需增加对转移载板的加热过程。
或者,上述步骤S305中,将转移载板与各发光二极管芯片分离,包括:
转移载板的表面具有光解粘胶;转移载板通过光解粘胶粘合多个发光二极管芯片;
上述步骤S305中,将转移载板与各发光二极管芯片分离,包括:
采用设定波长范围的光线照射光解粘胶,降低光解粘胶的粘度,以使转 移载板与发光二极管芯片分离。
如图7所示,转移载板20表面的粘合层22为光解粘胶,转移载板20通过粘合层22与发光二极管芯片21粘合,光解粘胶被设定波长的光线照射时,粘度会降低,其他波长的光线照射时,光解粘胶可以恢复粘性。在上述步骤S305中,将转移载板和驱动背板进行加热并压合后,可以采用设定波长范围的光线照射转移载板具有光解粘胶的位置,以降低光解粘胶的粘度,使转移载板与发光二极管芯片分离,具体地,设定波长的光线可以为紫外光线或红外光线。
此外,上述步骤S305之后,还可以对发光二极管芯片进行封装,以延长发光二极管芯片的寿命,并且避免发光二极管芯片由于发光时发热而影响其他部件,具体地,可以采用硅胶、环氧树脂等材料,在发光二极管芯片之上形成封装层,封装层可以为整层设置,也可以仅覆盖各发光二极管芯片。
在具体实施时,本公开实施例提供的上述转移方法中,如图13所示,上述步骤S301中,提供一转移载板,可以包括:
S401、参照图14,在晶片23上形成多个发光二极管芯片21;发光二极管芯片21的引出电极212位于发光二极管芯片21背离晶片23的一侧;也就是说,在工艺过程中,先在晶片23的表面生长外延结构211,然后在外延结构211的表面形成引出电极212。在具体实施时,晶片23上相邻的发光二极管芯片21之间的间距与驱动背板中相邻的接触电极之间的间距相同或成倍数关系。
S402、对晶片23上的各发光二极管芯片21进行检测;具体地,可以在不对发光二极管芯片施加电信号的情况下,采用光激发的方式激发各发光二极管芯片发光,来检测发光二极管芯片是否能够正常发光,并且,可以采用自动光学检测装置检测发光二极管芯片的形状,并将形状异常的发光二极管芯片记录下来,通过这两种方式可以确定各位置处的发光二极管芯片是否合格,可以根据检测结果生成相应的检测图谱,以便于后续快速查询各位置处的发光二极管芯片是否合格。
S403、参照图15,将晶片23移至中间载板24之上,并且晶片23具有发光二极管芯片21的一面朝向中间载板24,将检测合格的发光二极管芯片21转移到中间载板24之上;
中间载板24的尺寸可以大于或等于晶片23的尺寸,或者,中间载板24的尺寸也可以小于晶片23的尺寸,图15中以中间载板24的尺寸小于晶片23的尺寸为例进行示意,通过多次转移的方式将晶片上的发光二极管芯片转移到中间载板上,并且转移过程中,仅转移合格的发光二极管芯片,跳过不合格的发光二极管芯片,从而在转移过程中筛选出检测合格的发光二极管芯片。
在具体实施时,在中间载板24的表面可以涂覆一层粘合层22,例如粘合层22为光解粘胶或热解粘胶,光解粘胶在设定波长的光线照射下粘度降低,其他波长的光线照射下可以恢复粘性,热解粘胶在加热时降低粘度,在冷却后恢复粘性。可以将粘合层22进行图形化,以拾取晶片23上设定位置处的发光二极管芯片21,例如图15中,中间载板24的粘合层22的图形与晶片23上奇数列(或偶数列)的发光二极管芯片21对应,从而使中间载板24仅拾取晶片23上奇数列(或偶数列)的发光二极管芯片21。
具体地,将晶片23移至中间载板24之上,并使发光二极管芯片21与粘合层22接触并粘合后,采用激光对待转移的发光二极管芯片21位置处进行照射,以使发光二极管芯片21与晶片23分离,并且,根据上述步骤S402中对发光二极管芯片的检测结果,仅将合格的发光二极管芯片转移到中间载板上,即仅对检测合格的发光二极管芯片进行激光照射,从而提高发光二极管芯片的良率。
S404、参照图16,将中间载板24之上的发光二极管芯片21转移到转移载板20之上,以使发光二极管芯片21的引出电极212位于发光二极管芯片21背离转移载板20的一侧。图16中以中间载板24的尺寸小于转移载板20的尺寸为例进行示意,在转移过程中,可以采用多次转移的方式,或者采用多个中间载板24的方式,将发光二极管芯片21转移到转移载板20上。
具体地,在转移载板20的表面涂覆粘合层22(以粘合层22为热解粘胶 为例),将中间载板24移至转移载板20之上,且中间载板24具有发光二极管芯片21的一面,与转移载板20具有粘合层22的一面相对,将发光二极管芯片21与转移载板20表面的粘合层22粘合后,对中间载板24上的粘合层22进行加热,以使发光二极管芯片21与中间载板24分离,然后移走中间载板20,以得到如图7所示的结构。
此外,在上述步骤S404的过程中或之后,可以根据步骤S402的检测结果,在坏点位置处补上合格的发光二极管芯片,以使转移到转移载板上的发光二极管芯片均为合格的发光二极管芯片,提高发光二极管芯片的良率。
本公开实施例中,在发光二极管芯片转移到中间载板之间,对晶片上的各发光二极管芯片进行检测,在后续转移过程中,仅将检测合格的发光二极管芯片转移到中间载板上,从而提高了发光二极管芯片的良率。
本公开实施例提供的驱动背板、发光二极管芯片的转移方法及显示装置,通过在衬底基板之上设置多个电磁结构,且驱动背板中的多个电磁结构关于第一直线和第二直线对称设置,在转移发光二极管芯片的对位过程中,可以通过驱动电路向各电磁结构施加电流信号,使各电磁结构产生与发光二极管芯片磁性相同的磁场,根据各电磁结构的磁力对转移载板产生的应力,移动转移载板,当转移载板在平行于转移载板表面的各方向受力平衡时,发光二极管芯片与对应的接触电极的能够精准对位,从而提高了发光二极管芯片的转移精度。
显然,本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样,倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内,则本公开也意图包含这些改动和变型在内。

Claims (12)

  1. 一种驱动背板,其中,包括:
    衬底基板;
    多个接触电极,位于所述衬底基板一侧,所述多个所述接触电极在第一方向和第二方向上呈阵列排布且围成显示区域,所述第一方向与所述第二方向相互交叉;
    多个电磁结构,位于所述衬底基板一侧,所述多个电磁结构关于第一直线和第二直线对称设置,所述第一直线为所述显示区域在所述第一方向上的中线所在的直线,所述第二直线为所述显示区域在所述第二方向上的中线所在的直线;
    驱动电路,位于所述衬底基板与所述接触电极所在层之间,所述驱动电路与各所述电磁结构电连接,被配置为在转移发光二极管芯片的对位过程中,向各所述电磁结构施加电流信号,以使各所述电磁结构产生与所述发光二极管芯片磁性相同的磁场,并在对位完成后,停止向各所述电磁结构施加电流信号,以使所述发光二极管芯片在压力的作用下与对应的接触电极接触。
  2. 如权利要求1所述的驱动背板,其中,在所述显示区域的至少部分区域中,所述接触电极的周围设有关于该接触电极对称设置的至少四个所述电磁结构。
  3. 如权利要求2所述的驱动背板,其中,在全部所述接触电极的周围设有关于该接触电极对称设置的四个所述电磁结构。
  4. 如权利要求1所述的驱动背板,其中,所述驱动背板包括位于边缘区域且关于所述第一直线和所述第二直线对称设置的至少四个对位区域;所述边缘区域为所述显示区域以外的区域;
    在各所述对位区域内均设有所述电磁结构。
  5. 如权利要求1-4任一项所述的驱动背板,其中,所述电磁结构包括:导电柱,以及围绕所述导电柱的导电线圈;
    所述导电柱的延伸方向垂直于所述驱动背板的表面。
  6. 如权利要求5所述的驱动背板,其中,所述导电线圈包括:层叠设置的多个子线圈;
    所述电磁结构还包括:位于相邻所述子线圈之间的绝缘层;
    相邻的两个所述子线圈通过所述绝缘层中的通孔电连接。
  7. 如权利要求6所述的驱动背板,其中,所述驱动电路包括:薄膜晶体管;
    所述导电线圈的至少部分所述子线圈分别与所述薄膜晶体管的源极、栅极同层设置。
  8. 一种显示装置,其中,包括:如权利要求1~7任一项所的驱动背板,以及绑定于所述驱动背板的各接触电极之上的多个发光二极管芯片。
  9. 一种发光二极管芯片的转移方法,其中,包括:
    提供一转移载板;所述转移载板一侧的表面具有多个发光二极管芯片;所述发光二极管芯片包括两个引出电极,所述引出电极位于所述发光二极管芯片背离所述转移载板的一侧;对各所述发光二极管芯片的所述引出电极进行磁化,以使各所述引出电极的磁性相同;
    将所述转移载板移至如权利要求1~7任一项所述的驱动背板之上,且所述转移载板具有所述发光二极管芯片的一面,与所述驱动背板具有接触电极的一面相对;
    采用对位标记对所述转移载板与所述驱动背板进行第一次对位后,向所述驱动背板中的各电磁结构施加电流信号,以使各所述电磁结构产生与所述引出电极磁性相同的磁场;
    向所述转移载板施加压力,以使所述转移载板靠近所述驱动背板,且所述转移载板与所述驱动背板具有一定距离;根据检测到的各所述电磁结构磁力对所述转移载板产生的应力,移动所述转移载板;当所述转移载板在平行于转移载板表面的各方向受力平衡时,停止移动所述转移载板,以完成对所述转移载板与所述驱动背板的第二次对位;
    停止向各所述电磁结构施加电流信号,以使各所述电磁结构的磁场消失;对所述转移载板和所述驱动背板进行加热并压合,以使所述引出电极与对应的接触电极固定连接;将所述转移载板与各所述发光二极管芯片分离,并移走所述转移载板。
  10. 如权利要求9所述的转移方法,其中,所述转移载板的表面具有热解粘胶;所述转移载板通过所述热解粘胶粘合多个所述发光二极管芯片;
    所述将所述转移载板与各所述发光二极管芯片分离,包括:
    对所述转移载板进行加热,降低所述热解粘胶的粘度,以使所述转移载板与所述发光二极管芯片分离。
  11. 如权利要求9所述的转移方法,其中,所述转移载板的表面具有光解粘胶;所述转移载板通过所述光解粘胶粘合多个所述发光二极管芯片;
    所述将所述转移载板与各所述发光二极管芯片分离,包括:
    采用设定波长范围的光线照射所述光解粘胶,降低所述光解粘胶的粘度,以使所述转移载板与所述发光二极管芯片分离。
  12. 如权利要求9-11任一项所述的转移方法,其中,所述提供一转移载板,包括:
    在晶片上形成多个所述发光二极管芯片;所述发光二极管芯片的引出电极位于发光二极管芯片背离所述晶片的一侧;
    对所述晶片上的各所述发光二极管芯片进行检测;
    将所述晶片移至中间载板的上方,并且所述晶片具有所述发光二极管芯片的一面朝向所述中间载板,将检测合格的所述发光二极管芯片转移到所述中间载板之上;
    将所述中间载板之上的所述发光二极管芯片转移到所述转移载板之上,以使所述发光二极管芯片的引出电极位于发光二极管芯片背离所述转移载板的一侧。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116300182A (zh) * 2023-05-11 2023-06-23 惠科股份有限公司 显示面板和显示装置

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111584519B (zh) * 2020-05-25 2024-01-23 京东方科技集团股份有限公司 驱动背板、发光二极管芯片的转移方法及显示装置
CN112802941A (zh) * 2020-12-30 2021-05-14 深圳市华星光电半导体显示技术有限公司 一种显示面板
CN113764551B (zh) * 2021-09-07 2023-01-03 东莞市中麒光电技术有限公司 一种led芯片转移方法
CN115207173B (zh) * 2022-06-29 2024-07-05 上海天马微电子有限公司 发光芯片的转移方法
CN115347088A (zh) * 2022-08-12 2022-11-15 闻泰通讯股份有限公司 一种芯片生长阵列及芯片转移方法
CN117080335B (zh) * 2023-10-12 2024-01-26 惠科股份有限公司 微型发光二极管及显示面板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160211415A1 (en) * 2015-01-15 2016-07-21 Industrial Technology Research Institute Semiconductor light emitting device and fabricating method thereof
CN110323309A (zh) * 2019-07-05 2019-10-11 深超光电(深圳)有限公司 显示面板制作方法、显示面板制作系统及有源矩阵基板
CN110364607A (zh) * 2019-07-18 2019-10-22 京东方科技集团股份有限公司 发光二极管、显示基板、转移装置及其方法
CN110400861A (zh) * 2019-07-30 2019-11-01 上海天马有机发光显示技术有限公司 显示面板的制备方法、显示面板及显示装置
CN110416139A (zh) * 2019-09-11 2019-11-05 京东方科技集团股份有限公司 一种转移载板、其制作方法及发光二极管芯片的转移方法
CN111584519A (zh) * 2020-05-25 2020-08-25 京东方科技集团股份有限公司 驱动背板、发光二极管芯片的转移方法及显示装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3262694B1 (en) * 2015-10-20 2019-08-21 Goertek. Inc Method for transferring micro-leds and method for manufacturing micro-led device
CN109801868A (zh) * 2019-01-15 2019-05-24 严光能 芯片转移装置及其制作方法、led芯片转移方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160211415A1 (en) * 2015-01-15 2016-07-21 Industrial Technology Research Institute Semiconductor light emitting device and fabricating method thereof
CN110323309A (zh) * 2019-07-05 2019-10-11 深超光电(深圳)有限公司 显示面板制作方法、显示面板制作系统及有源矩阵基板
CN110364607A (zh) * 2019-07-18 2019-10-22 京东方科技集团股份有限公司 发光二极管、显示基板、转移装置及其方法
CN110400861A (zh) * 2019-07-30 2019-11-01 上海天马有机发光显示技术有限公司 显示面板的制备方法、显示面板及显示装置
CN110416139A (zh) * 2019-09-11 2019-11-05 京东方科技集团股份有限公司 一种转移载板、其制作方法及发光二极管芯片的转移方法
CN111584519A (zh) * 2020-05-25 2020-08-25 京东方科技集团股份有限公司 驱动背板、发光二极管芯片的转移方法及显示装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116300182A (zh) * 2023-05-11 2023-06-23 惠科股份有限公司 显示面板和显示装置
CN116300182B (zh) * 2023-05-11 2023-08-25 惠科股份有限公司 显示面板和显示装置

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