WO2021213254A1 - 显示基板及其制备方法、显示面板和显示装置 - Google Patents

显示基板及其制备方法、显示面板和显示装置 Download PDF

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Publication number
WO2021213254A1
WO2021213254A1 PCT/CN2021/087671 CN2021087671W WO2021213254A1 WO 2021213254 A1 WO2021213254 A1 WO 2021213254A1 CN 2021087671 W CN2021087671 W CN 2021087671W WO 2021213254 A1 WO2021213254 A1 WO 2021213254A1
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cathode
substrate
anode
pixel
display substrate
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PCT/CN2021/087671
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English (en)
French (fr)
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张国苹
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京东方科技集团股份有限公司
鄂尔多斯市源盛光电有限责任公司
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Priority to US17/630,617 priority Critical patent/US20220254847A1/en
Publication of WO2021213254A1 publication Critical patent/WO2021213254A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/10—Transparent electrodes, e.g. using graphene
    • H10K2102/101—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present disclosure belongs to the field of display technology, and specifically relates to a display substrate and a preparation method thereof, a display panel and a display device.
  • OLED Organic Light-Emitting Diode
  • OLED Organic Light-Emitting Diode
  • LCD Organic Light-Emitting Diode
  • Other panel displays have a tendency to replace traditional liquid crystal displays and become the recognized next-generation screen display technology.
  • the organic electroluminescent device has a structure composed of an anode, a light-emitting functional layer, and a cathode superimposed on each other.
  • anode In the process of preparing the anode, it is necessary to continuously wash the substrate with high-pressure water. Warping and rolling will occur at the ends. The warped and rolled anode ends can easily break through the pixel defining layer and the light-emitting function layer defining the pixel area and directly short the cathode film layer, resulting in poor dark spots on the OLED display panel. The yield and quality of OLED display panels.
  • the present invention provides a display substrate including a substrate and a plurality of pixel units arranged in an array arranged on the substrate, each pixel unit of the plurality of pixel units includes an anode sequentially stacked on the substrate , A light-emitting functional layer and a cathode, a pixel defining layer is further provided on the substrate, and a plurality of openings corresponding to the plurality of pixel units are opened in the pixel defining layer, each of the plurality of openings The opening exposes a part of the anode of the corresponding pixel unit; the light-emitting function layer is located on the exposed part of the anode in the opening; the cathode also extends to cover part of the surface of the pixel defining layer, wherein, for the plurality of At least one pixel unit in the pixel unit, the orthographic projection of at least one of the opposite ends of the anode in the first direction on the substrate and the orthographic projection of the cathode on the substrate do not intersect Stack, and
  • At least a part of at least one end of the anode is warped in a direction close to the cathode.
  • the cathodes of the plurality of pixel units are in an integrated structure.
  • the orthographic projection of the opposite ends of the anode along the first direction on the substrate is the same as the orthographic projection of the cathode on the substrate.
  • the orthographic projections do not overlap, and the cathode is provided as a hollow area at least in the regions corresponding to the two opposite ends of the anode; and the first direction is the row direction or the column direction of the array.
  • the orthographic projections of the regions of the two opposite ends of the anode along the first direction on the cathode coincide with the hollowed-out area; or the hollowed-out area of the cathode also covers the pixel The surface of a portion of the defining layer that is in contact with the light-emitting function layer.
  • the hollowed-out region of the cathode includes a plurality of hollowed-out sub-regions, and each hollowed-out sub-region extends along a second direction orthogonal to the first direction with an equal width, and its width is equal to that of the anode along the The width of one end of the first direction; and when the first direction is the row direction of the array, the second direction is the column direction of the array; or, when the first direction is the In the case of the column direction of the array, the second direction is the row direction of the array.
  • the hollowed-out region of the cathode includes a plurality of hollowed-out sub-regions, and each hollowed-out sub-region extends along a second direction orthogonal to the first direction with an equal width, and its width is equal to that of the anode along the The sum of the width of one end of the first direction and the width of a part of the surface of the pixel defining layer that is in contact with the light-emitting function layer; and when the first direction is the row direction of the array, the The second direction is the column direction of the array; or, when the first direction is the column direction of the array, the second direction is the row direction of the array.
  • the display substrate further includes a plurality of spacers, and the plurality of spacers are disposed on a surface of the pixel defining layer on a side facing away from the substrate.
  • a part of the cathode is formed on the surface of the plurality of spacers away from the substrate.
  • a part of the cathode is formed on the surface of the spacer located at the edge of the display substrate in the plurality of spacers, and the plurality of spacers are located in the display substrate. Part of the cathode is not formed on the surface of the spacer other than the spacer at the edge of the substrate.
  • the substrate includes a substrate and a pixel driving circuit disposed on the substrate, and the pixel defining layer and the plurality of pixel units are located on a side of the pixel driving circuit away from the substrate, A planarization layer is also provided between the pixel driving circuit and the pixel defining layer and the pixel unit.
  • the anode adopts a transparent metal oxide material
  • the cathode adopts a conductive metal or a conductive metal alloy material.
  • the present disclosure also provides a display panel, which includes the above-mentioned display substrate, and further includes an encapsulation layer, and the encapsulation layer is boxed with the display substrate to encapsulate a plurality of pixel units in the display substrate.
  • the present disclosure also provides a display device, which includes the above-mentioned display panel.
  • the present disclosure also provides a method for preparing a display substrate, which includes forming a plurality of pixel units on the substrate, the plurality of pixel units are arranged in an array; forming the plurality of pixel units includes: preparing a substrate; Forming a plurality of anodes of a plurality of pixel units; forming a pixel defining layer, the pixel defining layer includes a plurality of openings corresponding to the plurality of pixel units one-to-one, and each of the plurality of openings exposes a corresponding pixel Part of the anode of the unit; forming the light emitting function layer of the plurality of pixel units on the exposed portion of each anode of the light emitting function layer located in the plurality of openings; and at least the light emitting function of the plurality of pixel units A cathode is formed on the layer, and the cathode also extends to cover part of the surface of the pixel defining layer, wherein, for at least one pixel unit of the pluralit
  • forming the plurality of anodes of the plurality of pixel units on the substrate includes continuously washing the substrate with high-pressure water.
  • forming a cathode on the light-emitting function layer of the plurality of pixel units includes forming the cathode by vapor deposition using a mask including the cathode pattern.
  • the method further includes a step of forming a plurality of spacers, the plurality of spacers being disposed at a distance from the pixel defining layer On the surface of one side of the substrate; preparing the substrate includes forming a pixel driving circuit on a base; and the preparing method further includes after forming the pixel driving circuit and before forming the pixel defining layer The step of forming a planarization layer on the side of the pixel driving circuit away from the substrate.
  • forming a cathode at least on the light-emitting function layer of the plurality of pixel units further includes forming a cathode on a surface of the plurality of spacers away from the substrate.
  • the plurality of spacers are arranged to be in contact with the light-emitting function layer or the plurality of spacers are arranged to be spaced apart from the light-emitting function layer by a predetermined distance.
  • FIG. 1A and 1B are a schematic cross-sectional view and a schematic top view of a related art OLED display substrate, wherein FIG. 1A is a cross-sectional view of the structure of the display substrate in FIG. 1B along a section line AA;
  • FIG. 2A and 2B are a schematic cross-sectional view and a schematic top view of the structure of the display substrate according to an embodiment of the disclosure, wherein FIG. 2B is a schematic cross-sectional view of the structure of the display substrate in FIG. 2A along the AA section line;
  • FIG. 3A and 3B are a schematic cross-sectional view and a schematic top view of the structure of the display substrate according to an embodiment of the disclosure, wherein FIG. 3B is a schematic cross-sectional view of the structure of the display substrate in FIG. 3A along the AA section line;
  • FIG. 4A and 4B are a schematic cross-sectional view and a schematic top view of the structure of the display substrate according to an embodiment of the disclosure, wherein FIG. 4B is a schematic cross-sectional view of the structure of the display substrate in FIG. 4A along the AA section line;
  • FIG. 5 is a schematic top view of the structure of the display substrate in an embodiment of the disclosure.
  • FIG. 6A and 6B are a schematic cross-sectional view and a top schematic view of the structure of the display substrate according to an embodiment of the disclosure, wherein FIG. 6B is a schematic cross-sectional view of the structure of the display substrate in FIG. 6A along a section line AA;
  • FIG. 7 is a schematic top view of the structure of the display substrate in an embodiment of the disclosure.
  • Substrate 11. Base; 12. Pixel drive circuit; 13. Planarization layer; 2. Pixel defining layer; 3. Pixel unit; 31. Anode; 32. Light-emitting functional layer; 33. Cathode; 330. Hollowed area; L. The first direction; M. The second direction; 4. Spacers; 130. Vias.
  • the present disclosure provides a display substrate and a preparation method thereof, a display panel and a display Device.
  • the display substrate can prevent the anode and the cathode with warping at both ends from contacting and shorting, thereby avoiding the short circuit between the anode and the cathode, and avoiding the dark spots at the position where the anode and the cathode are shorted. It shows the yield and quality of the substrate.
  • the anode 31 of an organic electroluminescent device (for example, an organic light-emitting diode device OLED) is prone to warping and rolling at opposite ends along the high-pressure water washing direction, and the warping of the anode 31 is rolling up. Both ends easily break through the pixel defining layer 2 and the light-emitting function layer 32 defining the pixel area and directly short-circuit with the cathode 33 film layer, causing the OLED display panel to have dark spots, which affects the yield and quality of the OLED display panel.
  • the cathodes 33 of the multiple light-emitting devices of the entire OLED display substrate may be an integral structure. As shown in FIG. 1A, the anode 31 for each light-emitting device is easily warped at both ends along the first direction L, so there is a possibility that the material of the cathode 33 and the anode 31 may be short-circuited.
  • embodiments of the present disclosure provide a display substrate, as shown in FIG. 2A and FIG. 2B, which includes a substrate 1 on which a plurality of pixels arranged in an array are arranged Unit 3, each pixel unit 3 in the plurality of pixel units includes an anode 31, a light-emitting function layer 32, and a cathode 33 which are sequentially stacked on the substrate 1.
  • the substrate 1 is also provided with a pixel defining layer 2 in the pixel defining layer 2
  • An opening is provided to expose part of the anode 31; the light-emitting function layer 32 is located in the opening; the cathode 33 also extends to cover a part of the pixel defining layer 2, and the anode 31 faces the cathode 33 at least partially at opposite ends of the first direction L Warping, the orthographic projection of the warped portion of the anode 31 on the substrate 1 and the orthographic projection of the cathode 33 on the substrate 1 do not overlap, and the cathode 33 is provided as a hollow area 330 at least at a position corresponding to the warping of the anode 31.
  • the orthographic projection of the warped portion of the anode 31 on the substrate 1 and the orthographic projection of the cathode 33 on the substrate 1 not overlap, and setting at least the area of the cathode 33 corresponding to the warped portion of the anode 31 as the hollow area 330, It can avoid the warped part of the anode 31 and the corresponding part of the cathode 33 from contacting and short-circuiting, thereby avoiding a short circuit between the anode 31 and the cathode 33, and thus avoiding dark spots at the position where the anode 31 and the cathode 33 are short-circuited. , Improve the yield and quality of the display substrate.
  • the first direction L may be the row direction of an array composed of a plurality of pixel units 3.
  • the first direction can also be the column direction of the array.
  • the first direction L is the row direction of the array. If the substrate 1 is rinsed along the column direction of the array (the direction orthogonal to the first direction L), the opposite ends of the anode 31 in the column direction are likely to be warped and rolled.
  • each of the two opposite ends of the anode 31 in the first direction L represents a portion of a predetermined length of the anode 31 from the edge to the central portion in the first direction L. This part is, for example, a part that is prone to warping and rolling.
  • the length of this part is different.
  • the length of the two opposite ends of the anode 31 along the first direction L can be judged according to the actual situation, so as to judge the size of the corresponding hollow area to be set, so as to maximize the opening of the display substrate while avoiding the short-circuiting of the cathode and the anode. Rate.
  • the orthographic projection of the light-emitting function layer 32 on the substrate 1 at least partially covers the orthographic projection area of the hollow area 330 of the cathode 33 on the substrate 1. That is, the light-emitting functional layer 32 at least partially covers the opposite ends of the anode 31 along the first direction L, but the parts of the light-emitting functional layer 32 corresponding to the opposite ends of the anode 31 along the first direction L will no longer emit light because the cathode 33 is disposed in the corresponding part It is a hollow area 330.
  • the present disclosure is not limited to this, and the light-emitting function layer may not cover the opposite ends of the anode along the first direction.
  • the portion of the anode 31 that is not covered by the light-emitting functional layer may be filled with a pixel defining layer.
  • the display substrate may further include a plurality of spacers 4, as shown in FIGS. 3A and 3B and FIGS. 4A and 4B, the plurality of spacers 4 are correspondingly disposed on the surface of the area where the pixel defining layer 2 is located. It is located on the side of the pixel defining layer 2 away from the substrate 1.
  • the plurality of spacers 4 can support the encapsulation layer for encapsulating the pixel unit 3 so as to better protect the pixel unit 3.
  • a plurality of spacers 4 are arranged on the surface of the pixel defining layer 2 next to the edge of the pixel defining layer 2, so that as shown in FIG. 3B, the hollow area 330 of the cathode 33 is arranged On the light-emitting function layer 32. That is, as shown in FIG. 3A, in the anode 33 of the entire display substrate, only the anode material is not provided on the opposite ends of the cathode 31 along the first direction L, and the anode material in the other regions is formed as an anode of an integrated structure. 33. As shown in FIG.
  • the spacer 4 is positioned along the first No anode material is provided on both sides in one direction L.
  • a hollow area can be provided only for one of the two ends along the first direction L of the anode 33 of one pixel unit among the plurality of pixel units, and the Display substrate with better technical performance.
  • the plurality of spacers 4 are not arranged next to the edge of the pixel defining layer, but in the first direction.
  • L is not adjacent to the light-emitting functional layer 32, but is separated by a certain distance, that is, a plurality of spacers 4 in the first direction L will expose part of the surface of the pixel defining layer 2 to further expand the formation on the spacer 4
  • the distance between the cathode material on the surface and the two ends of the anode 31 along the first direction L so as to further ensure that the cathode material does not short-circuit with the anode 31.
  • the substrate 1 includes a substrate 11 and a pixel driving circuit 12 disposed on the substrate 11.
  • the pixel defining layer 2 and the pixel unit 3 are located on a side of the pixel driving circuit 12 away from the substrate 11.
  • a planarization layer 13 is also provided between the pixel driving circuit 12 and the pixel defining layer 2 and the pixel unit 3.
  • the pixel driving circuit 12 is electrically connected to the anode 31 of the pixel unit 3 through a via 130 opened in the planarization layer 13 for driving the pixel unit 3 to emit light.
  • the arrangement of the planarization layer 13 is beneficial to flatten the surface of the substrate 1, so that the pixel defining layer 2 and the pixel unit 3 are formed on the substrate 1 by evaporation.
  • the pixel unit 3 may be an OLED (Organic Light-Emitting Diode) or an LED (Light Emitting Diode).
  • the anode 31 can be made of transparent metal oxide materials, such as indium tin oxide, and the cathode 33 can be made of conductive metals or conductive metal alloy materials, such as metals such as aluminum, silver, magnesium alloy, and calcium.
  • the light-emitting functional layer 32 may include, for example, an electron transport layer, a light-emitting layer, and a hole transport layer.
  • this embodiment also provides a method for preparing the display substrate, which includes forming a plurality of pixel units on the substrate and arranging the plurality of pixel units in an array; forming a plurality of pixel units includes sequentially forming on the substrate The steps of the anode, the light-emitting functional layer and the cathode of each pixel unit; the preparation method further includes forming a pixel defining layer and an opening in the pixel defining layer on the substrate, and a part of the anode is exposed at the opening; the light-emitting functional layer is located in the exposed part of the anode in the opening
  • the cathode also extends to cover the pixel defining layer, and at least part of the opposite ends of the anode along the first direction warp towards the direction close to the cathode, and the orthographic projection of the warped part of the anode on the substrate is not the same as the orthographic projection of the cathode on the substrate. Overlapping, the cath
  • forming the cathode includes: forming the cathode by vapor deposition using a mask including a cathode pattern. Wherein, the orthographic projection of the opposite ends of the anode along the first direction on the cathode coincides with the hollow area.
  • the cathode can also be prepared and formed by the traditional patterning process (including the steps of depositing the cathode film, coating photoresist, exposing, developing, etching, etc.), and the mask used in the exposure is the one that includes the cathode pattern.
  • Mask board The specific preparation process is a relatively mature process and will not be repeated here.
  • the specific process of forming the pixel defining layer and the pixel unit on the substrate is as follows:
  • a pattern of the anode is formed on the substrate; the anode can be formed by a patterning process or an evaporation process. In this step, for a plurality of pixel units, a plurality of pixel units are formed on the substrate.
  • the anode, the plurality of anodes are discrete anodes, which are electrically insulated from each other and spaced apart, so as to individually control the light emission of each pixel unit.
  • S2 forming a pattern of a pixel defining layer including a plurality of openings on the substrate where S1 is completed; the pixel defining layer is formed by film coating, exposure, and development processes, or formed by an evaporation process.
  • the edge of the anode is usually located under the pixel defining layer.
  • a pattern of a pixel defining layer including a plurality of openings is formed.
  • the pattern of the pixel defining layer can cover each edge of the pattern of the plurality of anodes and expose most of the anode area.
  • the multiple pixel areas used as multiple pixel units for example, can cover the edge area of each anode and expose its central area.
  • each film layer (electron transport layer, light-emitting layer, hole transport layer, etc.) in the light-emitting functional layer is formed by an evaporation process.
  • the light-emitting material of each light-emitting function layer is formed in a plurality of openings defined by the pixel defining layer.
  • a cathode is formed on the substrate after S3; the cathode is formed by an evaporation process or a traditional patterning process.
  • the formed cathodes for a plurality of pixel units may be an integral structure.
  • the preparation method of the display substrate may further include a step of forming a plurality of spacers after forming the pixel defining layer and before forming the light-emitting function layer, and the plurality of spacers may be formed on the surface of the pixel defining layer, And it is located on the side of the pixel defining layer away from the substrate.
  • a plurality of spacers can be formed by the processes of film coating, exposure, and development. A plurality of spacers are used to support the encapsulation layer of the encapsulation pixel unit to be formed later.
  • forming the substrate includes forming a pixel driving circuit on a substrate, and the pixel defining layer and a plurality of pixel units are located on the side of the pixel driving circuit away from the substrate; after the pixel driving circuit is formed, the pixel defining layer and the plurality of pixel defining layers are formed.
  • the pixel unit also includes a step of forming a planarization layer on the side of the pixel driving circuit away from the substrate.
  • Each film layer of the pixel driving circuit can be formed by a traditional patterning process, and the planarization layer can be formed by a process of film coating, exposure, and development.
  • the planarization layer can make the surface of the substrate after the pixel driving circuit is formed on the substrate even, thereby facilitating the formation of a plurality of pixel units thereon.
  • the embodiment of the present invention also provides a display substrate.
  • the hollow area 330 of the cathode 33 can be set in 31 extends along the column direction of the entire display substrate at opposite ends of the first direction L.
  • hollow regions 330 are provided in the regions of the cathode 33 corresponding to the two ends of the anode 31 along the first direction L, and the column direction is opposite to each other.
  • the hollow areas 330 of two adjacent pixel units are separated. Different from the embodiment shown in FIG. 3A and FIG. 4A, in the embodiment shown in FIG. structure).
  • the orthographic projections of the regions at opposite ends of the anode 31 along the first direction L and the same width extending along the second direction M on the cathode 33 coincide with the hollow area 330; wherein The width is the size of the regions at the opposite ends of the anode 31 in the first direction L along the first direction L, the first direction L is the row direction of the array, and the second direction M is the column direction of the array.
  • the above arrangement of the display substrate in this embodiment can also make the parts of the opposite ends of the anode 31 along the first direction L warp and roll, because the corresponding area is not provided with cathode material, it will not come into contact with the corresponding cathode 33 3A and 4A, the area of the hollow area 330 of the cathode 33 in this embodiment is increased compared with the area of the hollow area in the embodiment of FIG. 3A and FIG. 4A.
  • the embodiment can save material cost, reduce the complexity of preparation, and thus reduce the production cost.
  • the preparation method of the display substrate in this embodiment is different from the embodiment shown in FIG. 3A and FIG. 4A except that the pattern of the cathode on the mask plate used when forming the cathode is different.
  • the other preparation methods are the same, and will not be repeated here. .
  • the embodiments of the present disclosure also provide a display substrate.
  • the difference from the above-mentioned embodiments is that, as shown in FIGS. 6A and 6B, the regions at opposite ends of the anode 31 along the first direction L and the regions adjacent to each other along the first direction L
  • the orthographic projection of the spacing area between the two anodes 31 on the cathode 33 coincides with the hollow area 330. That is, in the first direction L, no cathode material is provided on the regions corresponding to the opposite ends of the anode 31 and the two adjacent anodes 31 in the first direction L.
  • the spacing between the cathode materials on adjacent anodes 31 is larger, which can further avoid the short circuit between the cathode 33 and the anode 31.
  • This arrangement can also make the anode 31 not contact or short-circuit with the cathode 33 when the opposite ends of the anode 31 in the first direction L are warped and rolled, so as to prevent the display substrate from dark spots;
  • the area of the hollow area 330 of the cathode 33 in this embodiment is further increased, the material cost can be saved, the process complexity can be reduced, and the production cost can be reduced.
  • the preparation method of the display substrate in this embodiment is only that the pattern of the cathode on the mask plate used when forming the cathode is different, and the other preparation methods are the same, and will not be repeated here.
  • the embodiment of the present disclosure also provides a display substrate.
  • the difference from the above-mentioned embodiment is that, as shown in FIG.
  • the hollow area 330 of the cathode 33 may be arranged to cover the opposite ends of the anode 31 in the first direction L and adjacent ones in the first direction L.
  • the width of the area between the anodes 31 of the two columns of pixel units extends along the column direction of the entire display substrate (however, as shown in FIG. 7, the edge area may be excluded).
  • FIG. 7 the edge area may be excluded.
  • the hollow area 330 is connected in the column direction (ie, an integral structure), and its width in the row direction may include the opposite ends of the anode that are not covered by the cathode 33 in the first direction L.
  • the width of the part and the distance between two adjacent anodes 31 in the first direction L, and the length in the column direction M may include the end of the anode 31 of the first row of pixel units close to an edge of the display substrate and the last The distance between the cathodes 31 of a row of pixel units close to the other edge of the display substrate.
  • a hollow area can be provided in the cathode pattern of the integrated structure as required.
  • This arrangement can also prevent the anode 31 from contacting or shorting with the cathode 33 when the opposite ends of the anode 31 in the first direction L are warped and rolled, thereby avoiding the display substrate from defective dark spots; at the same time, compared to In the above-mentioned embodiment of the display substrate, since the area of the hollow area 330 of the cathode 33 in this embodiment is increased, the material cost can be saved, the complexity of preparing the mask pattern of the cathode 33 can be reduced, and the production cost can be reduced.
  • the preparation method of the display substrate in this embodiment is only that the pattern of the cathode on the mask plate used when forming the cathode is different, and the other preparation methods are the same, and will not be repeated here.
  • the area of the cathode at least corresponding to the warped position of the anode as a hollow area (that is, at least the area corresponding to the warped position of the anode is not provided with cathode material)
  • the warped anode and the cathode are in contact and short-circuited, thereby avoiding a short circuit between the anode and the cathode, thereby avoiding the occurrence of dark spots at the position where the anode and the cathode are short-circuited, and improving the yield and quality of the display substrate.
  • Embodiments of the present disclosure also provide a display panel, which includes the display substrate and an encapsulation layer in any of the above embodiments, and the encapsulation layer is boxed with the display substrate to encapsulate a plurality of pixel units in the display substrate.
  • the display panel of the present disclosure can prevent the anode and the cathode from being short-circuited in the display panel, thereby preventing the display panel from appearing defective dark spots caused by the display panel, and improving the display panel The yield and quality.
  • An embodiment of the present invention also provides a display device, including the display panel in the foregoing embodiment.
  • the yield and quality of the display device can be improved.
  • the display device provided by the embodiment of the present disclosure may be any product or component with a display function, such as an OLED panel, an OLED TV, an LED panel, an LED TV, a display, a mobile phone, a navigator, and the like.

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Abstract

本公开提供一种显示基板及其制备方法、显示面板和显示装置。该显示基板包括基板，基板上设置有阵列排布的多个像素单元，多个像素单元中的每个像素单元包括依次叠置于基板上的阳极、发光功能层和阴极，基板上还设置有像素界定层，像素界定层中开设有与所述多个像素单元一一对应的多个开口，开口处暴露部分阳极；发光功能层位于开口中；阴极还延伸至覆盖像素界定层的部分表面，阳极沿第一方向的相对两端的至少局部向靠近阴极的方向翘曲，阳极的翘曲部分在基板上的正投影与阴极在基板上的正投影不交叠，阴极至少在对应阳极翘曲的位置设置为镂空区。该显示基板能够避免翘曲的阳极与相对应的阴极接触而发生短接，从而避免在阳极与阴极发生短路的位置出现暗点不良，提升了显示基板的良率和品质。

Description

显示基板及其制备方法、显示面板和显示装置
相关申请的交叉引用
本公开要求于2020年4月24日提交的中国专利申请No.202010332566.X的优先权，在此将其整体并入本文。
技术领域
本公开属于显示技术领域，具体涉及一种显示基板及其制备方法、显示面板和显示装置。
背景技术
有机电致发光器件(OLED，Organic Light-Emitting Diode)由于自主发光、色域广、响应快、面板薄、可弯曲、耐低温等独有的优异特性，已经广泛应用于手机，车载显示，相机等面板显示，具有取代传统的液晶显示器的趋势，成为公认的下一代屏幕显示技术。
有机电致发光器件具有由阳极、发光功能层和阴极相互叠置构成的结构，在制备阳极的过程中需要用高压水持续冲洗基板，这会导致制备形成的阳极沿高压水冲洗方向的相对两端会出现翘曲卷起现象，翘曲卷起的阳极两端容易顶破界定像素区域的像素界定层以及发光功能层而与阴极膜层直接短接，造成OLED显示面板出现暗点不良，影响OLED显示面板的良率和品质。
发明内容
本发明提供一种显示基板，包括基板和设置在所述基板上的阵列排布的多个像素单元，所述多个像素单元中的每个像素单元包括依次叠置于所述基板上的阳极、发光功能层和阴极，所述基板上还设置有像素界定层，所述像素界定层中开设有与所述多个像素单元一一对应的多个开口，所述多个开口中的每个开口暴露对应像素单元的阳极的一部分；所述发光功能层位于所述开口中的阳极的暴露部分上；所述阴极还延伸至覆盖所述像素界定层的部分表面，其中， 对于所述多个像素单元中的至少一个像素单元，所述阳极沿第一方向的相对两个端部中的至少一个端部在所述基板上的正投影与所述阴极在所述基板上的正投影不交叠，以及所述阴极至少在对应所述阳极的至少一个端部的区域设置为镂空区。
在一个实施例中，所述阳极的至少一个端部的至少靠近该端部边缘的一部分向靠近所述阴极的方向翘曲。
在一个实施例中，所述多个像素单元的阴极为一体结构。
在一个实施例中，对于所述多个像素单元中的每个像素单元，其阳极沿第一方向的相对两个端部在所述基板上的正投影与所述阴极在所述基板上的正投影不交叠，以及所述阴极至少在对应所述阳极的相对两个端部的区域设置为镂空区；以及所述第一方向为所述阵列的行方向或列方向。
在一个实施例中，所述阳极沿所述第一方向的相对两个端部的区域在所述阴极上的正投影与所述镂空区重合；或所述阴极的镂空区还覆盖所述像素界定层的与所述发光功能层接触的一部分的表面。
在一个实施例中，所述阴极的镂空区包括多个镂空子区，每个镂空子区沿着与第一方向正交的第二方向以等宽度延伸，其宽度等于所述阳极沿所述第一方向的一个端部的宽度；以及当所述第一方向为所述阵列的行方向时，所述第二方向为所述阵列的列方向；或者，当所述第一方向为所述阵列的列方向时，所述第二方向为所述阵列的行方向。
在一个实施例中，所述阴极的镂空区包括多个镂空子区，每个镂空子区沿着与第一方向正交的第二方向以等宽度延伸，其宽度等于所述阳极沿所述第一方向的一个端部的宽度和所述像素界定层的与所述发光功能层接触的一部分的表面的宽度之和；以及当所述第一方向为所述阵列的行方向时，所述第二方向为所述阵列的列方向；或者，当所述第一方向为所述阵列的列方向时，所述第二方向为所述阵列的行方向。
在一个实施例中，所述显示基板还包括多个隔垫物，所述多个隔垫物设置 于所述像素界定层的背离所述基板的一侧的表面上。
在一个实施例中，所述多个隔垫物的远离基板的表面上形成有所述阴极的一部分。
在一个实施例中，所述多个隔垫物中位于所述显示基板的边缘的隔垫物的表面上形成有所述阴极的一部分，而所述多个隔垫物中除了位于所述显示基板的边缘的隔垫物之外的隔垫物的表面上未形成所述阴极的一部分。
在一个实施例中，所述基板包括基底和设置于所述基底上的像素驱动电路，所述像素界定层和所述多个像素单元位于所述像素驱动电路的背离所述基底的一侧，所述像素驱动电路与所述像素界定层和所述像素单元之间还设置有平坦化层。
在一个实施例中，所述阳极采用透明金属氧化物材料，所述阴极采用导电金属或导电金属合金材料。
本公开还提供了一种显示面板，其包括上述显示基板，还包括封装层，所述封装层与所述显示基板对盒，以对所述显示基板中的多个像素单元进行封装。
本公开还提供了一种显示装置，其包括上述显示面板。
本公开还提供了一种显示基板的制备方法，其包括在基板上形成多个像素单元，所述多个像素单元阵列排布；形成所述多个像素单元包括：制备基板；在所述基板上形成多个像素单元的多个阳极；形成像素限定层，所述像素限定层包括与所述多个像素单元一一对应的多个开口，所述多个开口中的每个开口暴露对应像素单元的阳极的一部分；在所述发光功能层位于所述多个开口中的各阳极的暴露部分上形成所述多个像素单元的发光功能层；以及至少在所述多个像素单元的发光功能层上形成阴极，所述阴极还延伸至覆盖所述像素界定层的部分表面，其中，对于所述多个像素单元中的至少一个像素单元，所述阳极沿第一方向的相对两个端部中的至少一个端部在所述基板上的正投影与所述阴极在所述基板上的正投影不交叠，以及所述阴极至少在对应所述阳极的至少一个端部的区域形成为镂空区。
在一个实施例中，在所述基板上形成多个像素单元的多个阳极包括用高压 水持续冲洗所述基板。
在一个实施例中，在所述多个像素单元的发光功能层上形成阴极包括采用包括所述阴极图形的掩膜板蒸镀形成所述阴极。
在一个实施例中，在形成所述像素界定层之后且在形成所述发光功能层之前还包括形成多个隔垫物的步骤，所述多个隔垫物设置于所述像素界定层的背离所述基板的一侧的表面上；制备所述基板包括在基底上形成像素驱动电路；以及所述制备方法还包括在形成所述像素驱动电路之后且在形成所述像素界定层之前还包括在所述像素驱动电路的背离所述基底的一侧形成平坦化层的步骤。
在一个实施例中，至少在所述多个像素单元的发光功能层上形成阴极还包括在所述多个隔垫物的远离所述基板的表面上形成阴极。
在一个实施例中，所述多个隔垫物设置为与所述发光功能层接触或者所述多个隔垫物设置为与所述发光功能层之间隔开预定距离。
附图说明
图1A和图1B为相关技术的OLED显示基板的结构剖视示意图和俯视示意图，其中，图1A为图1B中的显示基板沿AA剖切线的结构剖视图；
图2A和图2B为本公开实施例的显示基板的结构剖视示意图和俯视示意图，其中，图2B为图2A中的显示基板沿AA剖切线的结构剖视示意图；
图3A和图3B为本公开实施例的显示基板的结构剖视示意图和俯视示意图，其中，图3B为图3A中的显示基板沿AA剖切线的结构剖视示意图；
图4A和图4B为本公开实施例的显示基板的结构剖视示意图和俯视示意图，其中，图4B为图4A中的显示基板沿AA剖切线的结构剖视示意图；
图5为本公开实施例中显示基板的结构俯视示意图；
图6A和图6B为本公开实施例的显示基板的结构剖视示意图和俯视示意图，其中，图6B为图6A中的显示基板沿AA剖切线的结构剖视示意图；
图7为本公开实施例中显示基板的结构俯视示意图。
其中附图标记为：
1、基板；11、基底；12、像素驱动电路；13、平坦化层；2、像素界定层；3、像素单元；31、阳极；32、发光功能层；33、阴极；330、镂空区；L、第一方向；M、第二方向；4、隔垫物；130、过孔。
具体实施方式
为使本领域技术人员更好地理解本公开的技术方案，下面结合附图和具体实施方式对本公开的显示基板及其制备方法、显示面板和显示装置作进一步详细描述。
针对相关技术的沿着一个方向的阳极两端容易翘曲卷起的阳极容易与阴极发生短接，造成暗点不良的问题，本公开提供了一种显示基板及其制备方法、显示面板和显示装置。该显示基板能够避免两端翘曲的阳极与阴极的相对应位置相接触而发生短接，从而避免阳极与阴极之间发生短路，进而避免在阳极与阴极发生短路的位置出现暗点不良，提升了显示基板的良率和品质。
如图1A和图1B所示，有机电致发光器件(例如，有机发光二极管器件OLED)的阳极31沿高压水冲洗方向的相对两端容易出现翘曲卷起现象，阳极31的翘曲卷起两端容易顶破界定像素区域的像素界定层2以及发光功能层32而与阴极33膜层直接短接，造成OLED显示面板出现暗点不良，影响OLED显示面板的良率和品质。在相关技术中，整个OLED显示基板的多个发光器件的阴极33可以为一体结构。如图1A所示，针对每个发光器件的阳极31在沿第一方向L的两端容易翘曲，因此存在阴极33的材料与阳极31短接的可能。
针对相关技术的有机电致发光器件存在的上述问题，本公开实施例提供一种显示基板，如图2A和图2B所示，其包括基板1，基板1上设置有阵列排布的多个像素单元3，多个像素单元中的每个像素单元3包括依次叠置于基板1上的阳极31、发光功能层32和阴极33，基板1上还设置有像素界定层2，像素界定 层2中开设有开口，开口处暴露部分阳极31；发光功能层32位于开口中；阴极33还延伸至覆盖部分像素界定层2，阳极31沿第一方向L的相对两端的至少局部向朝向阴极33的方向翘曲，阳极31的翘曲部分在基板1上的正投影与阴极33在基板1上的正投影不交叠，阴极33至少在对应阳极31翘曲的位置设置为镂空区330。
通过使阳极31的翘曲部分在基板1上的正投影与阴极33在基板1上的正投影不交叠，并将阴极33的至少对应阳极31的翘曲部分的区域设置为镂空区330，能够避免阳极31的翘曲部分与阴极33的相对应部分相接触而发生短接，从而避免阳极31与阴极33之间发生短路，进而避免在阳极31与阴极33发生短路的位置出现暗点不良，提升了显示基板的良率和品质。
本实施例中，第一方向L可以为多个像素单元3组成的阵列的行方向。当然，第一方向也可以为阵列的列方向。在制备阳极31的过程中，如果高压水沿阵列的行方向冲洗基板1，则阳极31沿行方向的相对两端容易发生翘曲卷起，第一方向L为阵列的行方向，如果高压水沿阵列的列方向(与第一方向L正交的方向)冲洗基板1，则阳极31沿列方向的相对两端容易发生翘曲卷起。
本实施例中，阳极31沿第一方向L的相对两个端部在基板1上的正投影与阴极33的镂空区330在基板1上的正投影至少部分重合。如此设置，使得阳极31沿第一方向L的相对两端存在翘曲卷起时，不会与阴极33发生接触和短接，从而避免显示基板出现暗点不良。在本公开中，阳极31沿第一方向L的相对两个端部中的每个端部表示阳极31在第一方向L上从边缘向中心部分的预定长度的部分。这部分例如是容易发生翘曲卷起的部分，针对不同的工艺和不同尺寸的像素单元，这部分的长度是不同的。可以根据实际情况来判断阳极31沿第一方向L的相对两个端部的长度，从而判断要设置的对应镂空区域的大小，以在避免阴极和阳极短接的情况下最大化显示基板的开口率。
可选的，本实施例中，发光功能层32在基板1上的正投影至少部分覆盖阴极33的镂空区330在基板1上的正投影区域。即，发光功能层32至少部分覆盖阳极31沿第一方向L的相对两端，但是发光功能层32的对应阳极31沿第一 方向L相对两端的部分不会再发光，因为阴极33对应部分设置为镂空区330。
需要说明的是，本公开不限于此，发光功能层也可以不覆盖阳极沿第一方向相对两端的部分。阳极31的未被发光功能层覆盖的部分可以由像素界定层填充。
在一个实施例中，显示基板还可以包括多个隔垫物4，如图3A和图3B以及图4A和图4B所示，多个隔垫物4对应设置于像素界定层2所在区域的表面上，且位于像素界定层2的背离基板1的一侧。多个隔垫物4能够对用于封装像素单元3的封装层进行支撑，从而更好地保护像素单元3。
在图3A和图3B所示的实施例中，多个隔垫物4紧邻像素界定层2的边缘设置在像素界定层2的表面上，从而如图3B所示，阴极33的镂空区域330设置在发光功能层32上。即，如图3A所示，在整个显示基板的阳极33中，仅仅在阴极31的沿着第一方向L的相对两端上未设置阳极材料，而其他区域的阳极材料形成为一体结构的阳极33。如图3B所示，为了进一步确保沿着第一方向L的两端存在翘曲的阳极31和阴极33之间不存在短接，在本公开实施例中，在隔垫物4的沿着第一方向L的两个侧面上也不设置阳极材料。然而，本公开不限于此，可以仅仅针对多个像素单元中的一个像素单元的阳极33的沿着第一方向L的两个端部中的一个端部设置镂空区域，就可以获得相对于相关技术性能更好的显示基板。
与图3A和图3B所示的实施例不同的是，在图4A和图4B所示的实施例中，多个隔垫物4并没有紧邻像素界定层的边缘设置，而是在第一方向L上与发光功能层32不邻接，而是隔开一定距离，即多个隔垫物4在第一方向L上会暴露像素界定层2的部分表面，以进一步扩大形成在隔垫物4上表面上的阴极材料与阳极31沿着第一方向L的两个端部之间的距离，从而进一步确保阴极材料不会与阳极31发生短接。
本实施例中，如图3B和图4B所示，基板1包括基底11和设置于基底11上的像素驱动电路12，像素界定层2和像素单元3位于像素驱动电路12的背离基底11的一侧，像素驱动电路12与像素界定层2和像素单元3之间还设置有 平坦化层13。像素驱动电路12通过开设在平坦化层13中的过孔130与像素单元3的阳极31电连接，用于驱动像素单元3发光。平坦化层13的设置，有利于使基板1表面平整，以通过蒸镀的方法在基板1上形成像素界定层2和像素单元3。
本实施例中，像素单元3可以为OLED(Organic Light-Emitting Diode，有机发光二极管)或者LED(Light Emitting Diode，发光二极管)。阳极31可以采用透明金属氧化物材料，如氧化铟锡等，阴极33可以采用导电金属或导电金属合金材料，如铝、银、镁合金、钙等金属。发光功能层32例如可以包括电子传输层、发光层和空穴传输层。
基于显示基板的上述结构，本实施例还提供一种该显示基板的制备方法，包括在基板上形成多个像素单元，多个像素单元阵列排布；形成多个像素单元包括依次在基板上形成每个像素单元的阳极、发光功能层和阴极的步骤；制备方法还包括在基板上形成像素界定层及像素界定层中的开口，开口处暴露部分阳极；发光功能层位于开口中阳极的暴露部分上；阴极还延伸至覆盖像素界定层，阳极沿第一方向的相对两端的至少局部向靠近阴极的方向翘曲，阳极的翘曲部分在基板上的正投影与阴极在基板上的正投影不交叠，阴极至少在对应阳极翘曲的位置形成为镂空区。
本实施例中，形成阴极包括：采用包括阴极图形的掩膜板蒸镀形成阴极。其中，阳极沿第一方向的相对两端的部分在阴极上的正投影与镂空区重合。
需要说明的是，阴极也可以采用传统构图工艺(包括沉积阴极膜层、光刻胶涂覆、曝光、显影、刻蚀等步骤)制备形成，曝光时所采用的掩膜板为包括阴极图形的掩膜板。具体制备工艺为比较成熟的工艺，这里不再赘述。
本实施例显示基板的制备方法中，在基板上形成像素界定层和像素单元的具体过程为：
S1：在基板上形成阳极的图形；阳极可以采用构图工艺形成，也可以采用蒸镀工艺形成，在该步骤中，对于多个像素单元而言，在基板上形成针对多个像素单元的多个阳极，多个阳极为分立的阳极，彼此之间电绝缘并且间隔开， 以单独控制各个像素单元发光。
S2：在完成S1的基板上形成包括多个开口的像素界定层的图形；像素界定层采用膜层涂布、曝光、显影工艺形成，或者采用蒸镀工艺形成。其中，阳极的边缘通常位于像素界定层下方。在该步骤中，基于所形成的多个阳极的图形，形成包括多个开口的像素界定层的图形，像素界定层的图形可以覆盖多个阳极的图形的各个边缘而暴露出阳极的大部分区域，用作多个像素单元的多个像素区域，例如可以覆盖每个阳极的边缘区域而暴露其中心区域。
S3：在完成S2的基板上形成发光功能层；发光功能层中的各膜层(电子传输层、发光层、空穴传输层等)均通过蒸镀工艺形成。在该步骤中，在像素界定层界定出的多个开口中形成各发光功能层的发光材料。
S4：在完成S3的基板上形成阴极；阴极采用蒸镀工艺或者传统构图工艺形成。在该步骤中，所形成的针对多个像素单元的阴极可以为一体结构。
本实施例中，显示基板的制备方法在形成像素界定层之后且在形成发光功能层之前还可以包括形成多个隔垫物的步骤，多个隔垫物可以形成在像素界定层的表面上，且位于像素界定层的背离基板的一侧。多个隔垫物可以采用膜层涂布、曝光、显影的工艺形成。多个隔垫物用于对后续形成的封装像素单元的封装层进行支撑。
本实施例中，形成基板包括在基底上形成像素驱动电路，像素界定层和多个像素单元位于像素驱动电路的背离基底的一侧；在形成像素驱动电路之后且在形成像素界定层和多个像素单元之前还包括在像素驱动电路的背离基底的一侧形成平坦化层的步骤。像素驱动电路的各膜层可以采用传统构图工艺形成，平坦化层可以采用膜层涂布、曝光、显影的工艺形成。平坦化层能使在基板上形成有像素驱动电路后的基板表面平齐，从而有利于在其上形成多个像素单元。
本发明实施例还提供一种显示基板，与上述实施例中不同的是，如图5所示，为了降低制备阴极33的掩膜图形的复杂度，阴极33的镂空区330可以设置为在阳极31沿第一方向L的相对两端处沿着整个显示基板的列方向延伸。在 图3A和图4A的实施例中，针对每个像素单元而言，在阴极33的与阳极31的沿第一方向L的两端对应的区域均设置有镂空区330，而列方向上相邻的两个像素单元的镂空区330是分离的。与图3A和图4A所示的实施例不同，在图5所示的实施例中，在列方向上相邻的两个像素单元对应的镂空区330在列方向上是相通的(即，一体结构)。
在图5所示的实施例中，阳极31沿第一方向L的相对两端的部分分别沿第二方向M等宽度延伸的区域在阴极33上的正投影与镂空区330重合；其中，所述宽度为阳极31沿第一方向L的相对两端的区域各自沿第一方向L的尺寸，第一方向L为阵列的行方向，第二方向M为阵列的列方向。
本实施例中显示基板的上述设置，同样能够使得阳极31沿第一方向L的相对两端的部分如果存在翘曲卷起，由于其对应区域未设置阴极材料，因此不会与对应阴极33发生接触和短接，从而避免显示基板出现暗点不良；同时，由于本实施例中阴极33的镂空区330面积相对于图3A和图4A中的实施例的镂空区面积增大，所以相比于上述实施例，能够节约材料成本，降低制备复杂度，从而降低生产成本。
本实施例中显示基板的其他结构与上述实施例中相同，这里不再赘述。
本实施例中显示基板的制备方法，与针对图3A和图4A所示的实施例不同的只是形成阴极时所采用的掩膜板上阴极的图形不同，其他制备方法均相同，这里不再赘述。
本公开实施例还提供一种显示基板，与上述实施例中不同的是，如图6A和图6B所示，阳极31沿第一方向L的相对两端的区域以及沿第一方向L相邻的两阳极31之间的间隔区域在阴极33上的正投影与镂空区330重合。即，在第一方向L上，在与阳极31的相对两端以及第一方向L上相邻的两个阳极31之间对应的区域上均未设置阴极材料。如图6A所示，在第一方向L(行方向)上，相邻的阳极31上的阴极材料之间的间隔更大，可以进一步避免阴极33和阳极31之间的短接。
如此设置，同样能够使得阳极31沿第一方向L的相对两端存在翘曲卷起时，阳极31都不会与阴极33发生接触和短接，从而避免显示基板出现暗点不良；同时，相比于显示基板的上述实施例，由于本实施例中阴极33的镂空区330面积进一步增大，所以能够节约材料成本，降低工艺复杂度，从而降低生产成本。
本实施例中显示基板的其他结构与上述实施例中相同，这里不再赘述。
本实施例中显示基板的制备方法，只是形成阴极时所采用的掩膜板上阴极的图形不同，其他制备方法均相同，这里不再赘述。
本公开实施例还提供一种显示基板，与上述实施例中不同的是，如图7所示，第一方向L为阵列的行方向，阳极31沿第一方向L的相对两端的区域以及相邻两列像素单元3的阳极31之间的间隔区域在阴极33上的正投影与镂空区330重合。在该实施例中，为了降低制备阴极33的掩膜图形的复杂度，阴极33的镂空区330可以设置为以覆盖阳极31沿第一方向L的相对两端以及第一方向L上相邻的两列像素单元的阳极31之间的区域的宽度而沿着整个显示基板的列方向延伸(但是，如图7所示，边缘区域可以除外)。在图7所示的实施例中，镂空区330在列方向上是相通的(即，一体结构)，其在行方向上的宽度可以包括阳极的相对两端在第一方向L未被阴极33覆盖的部分的宽度和第一方向L上的相邻两个阳极31之间的距离，其在列方向M上的长度可以包括第一行像素单元的阳极31靠近显示基板的一个边缘的一端与最后一行像素单元的阴极31靠近显示基板的另一个边缘的一端之间的距离。但是本公开不限于此，例如可以根据需要在一体结构的阴极图形中设置镂空区域。
如此设置，同样能够使得阳极31沿第一方向L的相对两端的部分存在翘曲卷起时，不会与阴极33发生接触和短接，从而避免显示基板出现暗点不良；同时，相比于显示基板的上述实施例，由于本实施例中阴极33的镂空区330面积增大，所以能够节约材料成本，减少制备阴极33的掩膜图形的复杂度，从而降低生产成本。
本实施例中显示基板的其他结构与上述实施例中相同，这里不再赘述。
本实施例中显示基板的制备方法，只是形成阴极时所采用的掩膜板上阴极的图形不同，其他制备方法均相同，这里不再赘述。
本公开上述实施例中所提供的显示基板中，通过将阴极的至少对应阳极翘曲位置的区域设置为镂空区(即，至少在阳极翘曲位置所对应的区域不设置阴极材料)，能够避免翘曲的阳极与阴极相接触而发生短接，从而避免阳极与阴极之间发生短路，进而避免在阳极与阴极发生短路的位置出现暗点不良，提升了显示基板的良率和品质。
本公开实施例还提供一种显示面板，包括上述任一实施例中的显示基板和封装层，所述封装层与所述显示基板对盒，以对显示基板中的多个像素单元进行封装。
通过采用上述任一实施例中的显示基板，本公开的显示面板能够避免该显示面板出现阳极与阴极发生短路的情况，从而避免该显示面板出现由此导致的暗点不良，提升了该显示面板的良率和品质。
本发明实施例还提供一种显示装置，包括上述实施例中的显示面板。
通过采用上述实施例中的显示面板，能够提升该显示装置的良率和品质。
本公开实施例所提供的显示装置可以为OLED面板、OLED电视、LED面板、LED电视、显示器、手机、导航仪等任何具有显示功能的产品或部件。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (20)

  1. 一种显示基板，包括基板和设置在所述基板上的阵列排布的多个像素单元，所述多个像素单元中的每个像素单元包括依次叠置于所述基板上的阳极、发光功能层和阴极，所述基板上还设置有像素界定层，所述像素界定层中开设有与所述多个像素单元一一对应的多个开口，所述多个开口中的每个开口暴露对应像素单元的阳极的一部分；所述发光功能层位于所述开口中的阳极的暴露部分上；所述阴极还延伸至覆盖所述像素界定层的部分表面，
    其中，对于所述多个像素单元中的至少一个像素单元，所述阳极沿第一方向的相对两个端部中的至少一个端部在所述基板上的正投影与所述阴极在所述基板上的正投影不交叠，以及所述阴极至少在对应所述阳极的至少一个端部的区域设置为镂空区。
  2. 根据权利要求1所述的显示基板，其中，所述阳极的至少一个端部的至少靠近该端部边缘的一部分向靠近所述阴极的方向翘曲。
  3. 根据权利要求1或2所述的显示基板，其中，所述多个像素单元的阴极为一体结构。
  4. 根据权利要求3所述的显示基板，其中，对于所述多个像素单元中的每个像素单元，其阳极沿第一方向的相对两个端部在所述基板上的正投影与所述阴极在所述基板上的正投影不交叠，以及所述阴极至少在对应所述阳极的相对两个端部的区域设置为镂空区；以及
    所述第一方向为所述阵列的行方向或列方向。
  5. 根据权利要求4所述的显示基板，其中，所述阳极沿所述第一方向的相对两个端部的区域在所述阴极上的正投影与所述镂空区重合；或
    所述阴极的镂空区还覆盖所述像素界定层的与所述发光功能层接触的一部分的表面。
  6. 根据权利要求4所述的显示基板，其中，所述阴极的镂空区包括多个镂空子区，每个镂空子区沿着与第一方向正交的第二方向以等宽度延伸，其宽度等于所述阳极沿所述第一方向的一个端部的宽度；以及
    当所述第一方向为所述阵列的行方向时，所述第二方向为所述阵列的列方向；或者，当所述第一方向为所述阵列的列方向时，所述第二方向为所述阵列的行方向。
  7. 根据权利要求4所述的显示基板，其中，所述阴极的镂空区包括多个镂空子区，每个镂空子区沿着与第一方向正交的第二方向以等宽度延伸，其宽度等于所述阳极沿所述第一方向的一个端部的宽度和所述像素界定层的与所述发光功能层接触的一部分的表面的宽度之和；以及
    当所述第一方向为所述阵列的行方向时，所述第二方向为所述阵列的列方向；或者，当所述第一方向为所述阵列的列方向时，所述第二方向为所述阵列的行方向。
  8. 根据权利要求5至7中任一项所述的显示基板，还包括多个隔垫物，所述多个隔垫物设置于所述像素界定层的背离所述基板的一侧的表面上。
  9. 根据权利要求8所述的显示基板，其中，所述多个隔垫物的远离基板的表面上形成有所述阴极的一部分。
  10. 根据权利要求8所述的显示基板，其中，所述多个隔垫物中位于所述 显示基板的边缘的隔垫物的表面上形成有所述阴极的一部分，而所述多个隔垫物中除了位于所述显示基板的边缘的隔垫物之外的隔垫物的表面上未形成所述阴极的一部分。
  11. 根据权利要求1至10中任一项所述的显示基板，其中，所述基板包括基底和设置于所述基底上的像素驱动电路，所述像素界定层和所述多个像素单元位于所述像素驱动电路的背离所述基底的一侧，所述像素驱动电路与所述像素界定层和所述像素单元之间还设置有平坦化层。
  12. 根据权利要求1至11中任一项所述的显示基板，其中，所述阳极采用透明金属氧化物材料，所述阴极采用导电金属或导电金属合金材料。
  13. 一种显示面板，包括权利要求1-9任一项所述的显示基板，还包括封装层，所述封装层与所述显示基板对盒，以对所述显示基板中的多个像素单元进行封装。
  14. 一种显示装置，包括权利要求13所述的显示面板。
  15. 一种显示基板的制备方法，包括在基板上形成多个像素单元，所述多个像素单元阵列排布；形成所述多个像素单元包括：
    制备基板；
    在所述基板上形成多个像素单元的多个阳极；
    形成像素限定层，所述像素限定层包括与所述多个像素单元一一对应的多个开口，所述多个开口中的每个开口暴露对应像素单元的阳极的一部分；
    在所述发光功能层位于所述多个开口中的各阳极的暴露部分上形成所述多个像素单元的发光功能层；以及
    至少在所述多个像素单元的发光功能层上形成阴极，所述阴极还延伸至覆 盖所述像素界定层的部分表面，
    其中，对于所述多个像素单元中的至少一个像素单元，所述阳极沿第一方向的相对两个端部中的至少一个端部在所述基板上的正投影与所述阴极在所述基板上的正投影不交叠，以及所述阴极至少在对应所述阳极的至少一个端部的区域形成为镂空区。
  16. 根据权利要求15所述的显示基板的制备方法，其中，在所述基板上形成多个像素单元的多个阳极包括用高压水持续冲洗所述基板。
  17. 根据权利要求15或16所述的显示基板的制备方法，其中，在所述多个像素单元的发光功能层上形成阴极包括采用包括所述阴极图形的掩膜板蒸镀形成所述阴极。
  18. 根据权利要求15或16所述的显示基板的制备方法，其中，在形成所述像素界定层之后且在形成所述发光功能层之前还包括形成多个隔垫物的步骤，所述多个隔垫物设置于所述像素界定层的背离所述基板的一侧的表面上；
    制备所述基板包括在基底上形成像素驱动电路；以及
    所述制备方法还包括在形成所述像素驱动电路之后且在形成所述像素界定层之前还包括在所述像素驱动电路的背离所述基底的一侧形成平坦化层的步骤。
  19. 根据权利要求18所述的显示基板的制备方法，其中，
    至少在所述多个像素单元的发光功能层上形成阴极还包括在所述多个隔垫物的远离所述基板的表面上形成阴极。
  20. 根据权利要求19所述的显示基板的制备方法，其中，所述多个隔垫物设置为与所述发光功能层接触或者所述多个隔垫物设置为与所述发光功能层之 间隔开预定距离。
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