WO2021175312A1 - 显示基板及其制备方法、显示装置 - Google Patents

显示基板及其制备方法、显示装置 Download PDF

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Publication number
WO2021175312A1
WO2021175312A1 PCT/CN2021/079281 CN2021079281W WO2021175312A1 WO 2021175312 A1 WO2021175312 A1 WO 2021175312A1 CN 2021079281 W CN2021079281 W CN 2021079281W WO 2021175312 A1 WO2021175312 A1 WO 2021175312A1
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Prior art keywords
substrate
pattern
sub
area
display
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PCT/CN2021/079281
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English (en)
French (fr)
Inventor
李彦松
暴营
吴海东
樊星
杜小波
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京东方科技集团股份有限公司
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Priority to US17/778,891 priority Critical patent/US20230006004A1/en
Publication of WO2021175312A1 publication Critical patent/WO2021175312A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/166—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display substrate, a preparation method thereof, and a display device.
  • Organic light emitting diodes (Organic Light Emitting Diode, referred to as OLED) have attracted much attention due to their advantages of high brightness, full viewing angle, fast response speed, and flexible display.
  • OLED Organic Light Emitting Diode
  • AMOLED Active Matrix OLED, Active Matrix Organic Light Emitting Diode
  • AMOLED Active Matrix Organic Light Emitting Diode
  • a display substrate has a display area.
  • the display area includes at least a first area, and the first area includes a plurality of first sub-pixel areas.
  • the display substrate includes: a substrate; a plurality of first sub-pixels arranged on one side of the substrate and respectively located in the plurality of first sub-pixel regions; each of the first sub-pixels includes a first sub-pixel stacked in sequence An anode, a first light-emitting layer, and a first cathode; and a pattern layer disposed on the side of the plurality of first sub-pixels away from the substrate.
  • the pattern layer includes: a first pattern and a plurality of second patterns, the first pattern has a plurality of openings arranged at intervals, and the plurality of second patterns are respectively arranged in the plurality of openings; the first pattern
  • the material of the pattern is a conductive material, and the material of the second pattern is a transparent insulating material.
  • the boundary of the orthographic projection of the portion of the plurality of second patterns located in the first region on the substrate coincides with the boundary of the plurality of first sub-pixel regions; or, the plurality of second patterns
  • the boundary of a sub-pixel area is located within the boundary range of the orthographic projection of the portion of the first area in the plurality of second patterns on the substrate.
  • the portion of the first pattern located in the first region is electrically connected to the first cathode.
  • the orthographic projection of each second pattern on the substrate at least partially overlaps the orthographic projection of the corresponding opening on the substrate.
  • the material of the first pattern and the material of each second pattern are mutually exclusive.
  • the material of each second pattern is a lithium quinoline complex
  • the material of the first pattern is magnesium
  • a part of the first pattern located in the first region is close to a surface of the substrate, and is in direct contact with a surface of the first cathode away from the substrate.
  • the thickness of the portion of the first pattern located in the first region is greater than or equal to 100 nm.
  • the plurality of second patterns are on a side surface away from the substrate, which is lower than the first pattern on a side surface away from the substrate.
  • the thickness of the plurality of second patterns is about 5 nm.
  • the display area further includes a second area located beside the first area, and the second area includes a plurality of second sub-pixel areas.
  • the portion of the display substrate located between two adjacent second sub-pixel regions is configured to allow light to pass through itself from one side and to be directed to the opposite side.
  • the display substrate further includes: a plurality of second sub-pixels arranged on one side of the substrate and respectively located in the plurality of second sub-pixel regions; each second sub-pixel includes The second anode and the second light-emitting layer are stacked in sequence.
  • the boundaries of the plurality of second sub-pixel regions are located within the orthographic projection range of the portion of the second region in the first pattern on the substrate, and each of the second light-emitting layers is It is electrically connected to a part of the first pattern located in the second area.
  • the orthographic projections of the portions of the second regions in the second regions on the substrate do not overlap with the boundaries of the second sub-pixel regions.
  • the part of the first pattern located in the second region is close to the surface of one side of the substrate and directly contacts the surface of the side of each of the second light-emitting layers away from the substrate.
  • the part of the first pattern located in the second area serves as the second cathode of each of the second sub-pixels.
  • the thickness of the portion of the first pattern located in the second region ranges from 10 nm to 15 nm.
  • a method for preparing a display substrate includes: providing a substrate; the substrate has a display area; the display area includes at least a first area, and the first area includes a plurality of first sub-pixel areas; A plurality of first sub-pixels are formed on one side of the first sub-pixel; the plurality of first sub-pixels are respectively located in the plurality of first sub-pixel regions; each first sub-pixel includes a first anode, a first light-emitting layer, and a A first cathode; a pattern layer is formed on the side of the plurality of first sub-pixels away from the substrate; the pattern layer includes: a first pattern and a plurality of second patterns, the first patterns having spaced apart A plurality of openings, the plurality of second patterns are respectively arranged in the plurality of openings; the material of the first pattern is a conductive material, and the material of the second pattern is a transparent insulating material.
  • the forming a pattern layer on the side of the plurality of first sub-pixels away from the substrate includes: forming the spaced apart layers on the side of the plurality of first sub-pixels away from the substrate.
  • the first pattern is formed in the gap therebetween; a portion of the first pattern located in the first region is electrically connected to the first cathode.
  • the forming the plurality of second patterns arranged at intervals on a side of the plurality of first sub-pixels away from the substrate includes: A fine metal mask is provided on one side of the substrate; through the fine metal mask and an evaporation process, the transparent insulating material is evaporated to the plurality of first sub-pixels away from the substrate On one side of the bottom, a plurality of second patterns arranged at intervals are formed.
  • the forming the first pattern in the gap between the plurality of second patterns includes: arranging an opening mask on a side of the plurality of second patterns away from the substrate; passing through the opening The mask plate and the evaporation process are used to evaporate the conductive material into the gaps between the plurality of second patterns to form the first pattern; the conductive material and the transparent insulating material have mutually exclusive
  • the shape of the orthographic projection of the first pattern on the substrate is complementary to the shape of the orthographic projection of the plurality of second patterns on the substrate.
  • a display device in another aspect, includes: the display substrate as described in any of the above embodiments.
  • the display device further includes: a substrate disposed on a side of the display substrate away from the pattern layer of the display substrate , And at least one optical sensor located in the second area.
  • Fig. 1 is a structural diagram of a display device according to some embodiments of the present disclosure
  • FIG. 2 is a structural diagram of another display device according to some embodiments of the present disclosure.
  • Fig. 3 is a structural diagram of a display substrate according to some embodiments of the present disclosure.
  • Fig. 4 is a structural diagram of a pattern layer in some embodiments of the present disclosure.
  • Fig. 5 is a structural diagram of another display substrate according to some embodiments of the present disclosure.
  • FIG. 6 is a structural diagram of still another display substrate according to some embodiments of the present disclosure.
  • FIG. 7 is a cross-sectional view of the display substrate shown in FIG. 6 along the M-M' direction;
  • FIG. 8 is a schematic diagram of a partial structure in the structure shown in FIG. 7;
  • FIG. 9 is a cross-sectional view of the display substrate shown in FIG. 6 along the N-N' direction;
  • FIG. 10 is a schematic diagram of a partial structure in the structure shown in FIG. 9;
  • FIG. 11 is a schematic diagram of another partial structure in the structure shown in FIG. 9;
  • FIG. 12 is a structural diagram of still another display substrate according to some embodiments of the present disclosure.
  • FIG. 13 is a structural diagram of still another display substrate according to some embodiments of the present disclosure.
  • FIG. 14 is a flowchart of a method for manufacturing a display substrate according to some embodiments of the present disclosure.
  • FIG. 15 is a flow chart of S300 in the flow chart shown in FIG. 14;
  • FIG. 16 is a flow chart of S310 in the flow chart shown in FIG. 15;
  • FIG. 17 is a flow chart of S320 in the flow chart shown in FIG. 15;
  • 18a to 18b are diagrams of a step of preparing a pattern layer in S300 in the flowchart shown in FIG. 14.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined with “first” and “second” may explicitly or implicitly include one or more of these features. In the description of the embodiments of the present disclosure, unless otherwise specified, “plurality” means two or more.
  • the expression “connected” and its extensions may be used.
  • the term “connected” may be used when describing some embodiments to indicate that two or more components are in direct physical or electrical contact with each other.
  • the term “coupled” may be used when describing some embodiments to indicate that two or more components have direct physical or electrical contact.
  • the term “coupled” or “communicatively coupled” may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other.
  • the embodiments disclosed herein are not necessarily limited to the content of this document.
  • the term “if” is optionally interpreted as meaning “when” or “when” or “in response to determination” or “in response to detection.”
  • the phrase “if it is determined" or “if [the stated condition or event] is detected” is optionally interpreted to mean “when determining" or “in response to determining" Or “when [stated condition or event] is detected” or “in response to detecting [stated condition or event]”.
  • the exemplary embodiments are described herein with reference to cross-sectional views and/or plan views as idealized exemplary drawings.
  • the thickness of layers and regions are exaggerated for clarity. Therefore, variations in the shape with respect to the drawings due to, for example, manufacturing technology and/or tolerances can be envisaged. Therefore, the exemplary embodiments should not be construed as being limited to the shape of the area shown herein, but include shape deviations due to, for example, manufacturing.
  • an etched area shown as a rectangle will generally have curved features. Therefore, the areas shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shape of the area of the device, and are not intended to limit the scope of the exemplary embodiments.
  • the cathode layer of the light-emitting device in the electroluminescent display panel is vapor-deposited on the entire surface (that is, the entire cathode layer is shared by multiple light-emitting devices), and in order to ensure the light-emitting efficiency of the light-emitting device, the cathode layer is usually made It is thinner, resulting in a larger square resistance of the cathode layer.
  • the brightness of the electroluminescent display panel near the integrated circuit side will be higher than the brightness far away from the integrated circuit side, which will cause uneven display.
  • some embodiments of the present disclosure provide a display substrate 100. As shown in FIGS. 5 and 6, the display substrate 100 has a display area A.
  • the display area A includes at least the first area A1. That is, as shown in FIG. 5, the display area A may include only the first area A1; or, the display area A may include the first area A1 and other areas. For example, as shown in FIG. 6, the display area A may include a first area A1 and a second area A2. For the second area A2, reference may be made to the following description, which will not be repeated here.
  • the first area A1 may include a plurality of first sub-pixel areas P1.
  • the plurality of first sub-pixel regions P1 may be arranged in an array, for example.
  • the above-mentioned display substrate 100 may include: a substrate 1.
  • the aforementioned substrate 1 may be a rigid substrate.
  • the rigid substrate may be a glass substrate or a PMMA (Polymethyl methacrylate) substrate or the like.
  • the aforementioned substrate 1 may be a flexible substrate.
  • the flexible substrate may be a PET (Polyethylene terephthalate, polyethylene terephthalate) substrate, a PEN (Polyethylene naphthalate two formal acid glycol ester, polyethylene naphthalate) substrate, or a PI (polyethylene naphthalate) substrate.
  • PET Polyethylene terephthalate, polyethylene terephthalate
  • PEN Polyethylene naphthalate two formal acid glycol ester, polyethylene naphthalate
  • PI polyethylene naphthalate
  • the above-mentioned display substrate 100 may further include: a plurality of first sub-pixels 2 arranged on one side of the substrate 1.
  • the plurality of first sub-pixels 2 include, for example, at least one of red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels.
  • the plurality of first sub-pixels 2 are respectively located in the plurality of first sub-pixel regions P1.
  • the plurality of first sub-pixels 2 and the plurality of first sub-pixel regions P1 are arranged in a one-to-one correspondence.
  • the first sub-pixel 2 includes: a pixel driving circuit, and a first anode 21, a first light-emitting layer 22 and a first cathode 23 that are sequentially stacked and arranged.
  • the first cathode 23 is farther away from the substrate 1 than the first anode 21.
  • the first cathodes 23 of the plurality of first sub-pixels 2 may be connected to each other to form an integral structure.
  • the display substrate 100 may further include: a pixel defining layer 3 disposed between the first anode 21 and the first light-emitting layer 22.
  • the pixel defining layer 3 has a plurality of openings, and at least a part of each first light-emitting layer 22 is electrically connected to the corresponding first anode 21 through one opening.
  • the opening of the pixel defining layer 3 is used to define a plurality of first sub-pixel regions P1.
  • the above-mentioned pixel driving circuit includes various structures, which are not limited in the present disclosure.
  • the structure of the pixel driving circuit may be "6T1C", “7T1C”, “6T2C”, or "7T2C".
  • T means thin film transistor
  • the number before “T” means the number of thin film transistors
  • C means storage capacitor
  • the number before “C” means the number of storage capacitors.
  • the pixel driving circuit in each first sub-pixel 2 is electrically connected to the first anode 21.
  • the thin film transistor electrically connected to the first anode 21 may be a driving transistor DT in the pixel driving circuit, and the driving transistor DT may be electrically connected to the first anode 21 through a via hole on the insulating layer (or flat portion).
  • the display substrate 100 may further include: a pattern layer 4 disposed on a side of the plurality of first sub-pixels 2 away from the substrate 1.
  • the pattern layer 4 may include: a first pattern 41 and a plurality of second patterns 42.
  • the first pattern 41 may have an integral structure, for example.
  • the above-mentioned first pattern 41 has a plurality of openings K arranged at intervals.
  • the plurality of second patterns 42 described above are respectively provided in the plurality of openings K.
  • the plurality of second patterns 42 are arranged in the plurality of openings K in a one-to-one correspondence.
  • the material of the first pattern 41 is a conductive material
  • the material of the second pattern 42 is a transparent insulating material
  • the orthographic projection boundary of the portion of the plurality of second patterns 42 located in the first area A1 on the substrate 1, and the boundary of the plurality of first sub-pixel areas P1 Overlap; or, the boundary of the plurality of first sub-pixel regions P1 is located within the boundary range of the orthographic projection of the portion of the plurality of second patterns 42 located in the first area A1 on the substrate 1. That is, the area of the orthographic projection of the second pattern 42 located in the first area A1 on the substrate 1 is greater than or equal to the area of the first sub-pixel area P1.
  • a second pattern 42 is located on a side of a first sub-pixel 2 away from the substrate 1.
  • the second pattern 42 is close to the side surface of the substrate 1 and directly contacts the side surface of the first cathode 23 in the corresponding first sub-pixel 2 away from the substrate 1.
  • the material of the second pattern 42 is a transparent insulating material, and the area of the orthographic projection of each second pattern 42 in the first area A1 on the substrate 1 is greater than or equal to the area of the corresponding first sub-pixel area P1 This can also avoid affecting the electrical performance of the first sub-pixel 2 and also avoiding adverse effects on the light output efficiency of the first sub-pixel 2.
  • the plurality of second patterns 42 are all located in the first area A1; in the case where the display area A includes the first area A1 and the second area A2 A part of the plurality of second patterns 42 is located in the first area A1, and the other part is located in the second area A2.
  • the “part of the second pattern 42” and “the other part of the second pattern 42” are quantitative limitations.
  • the portion of the first pattern 41 located in the first area A1 is electrically connected to the first cathode 23.
  • the first pattern 41 may cover a part of the first cathode 23 in the plurality of first sub-pixels 2 described above.
  • the area of the orthographic projection of each second pattern 42 on the substrate 1 is less than or equal to that of the corresponding opening K. area.
  • the part of the first pattern 41 located in the first area A1 will not shield the first sub-pixel area P1, so as to avoid affecting the light extraction efficiency of the first sub-pixel 2.
  • the part of the first pattern 41 located in the first area A1 and the first cathode 23 in the first sub-pixel 2 can be connected in parallel, which is also beneficial to reduce the square resistance of the first cathode 23.
  • the above-mentioned first patterns 41 are all located in the first area A1; in the case where the display area A includes the first area A1 and the second area A2, the above A part of the first pattern 41 is located in the first area A1, and the other part is located in the second area A2.
  • the "part of the first pattern 41" and “the other part of the first pattern 41" are the overall definition of the film layer.
  • the pattern layer 4 is provided on the side of the plurality of first sub-pixels 2 away from the substrate 1, and the second pattern formed by a transparent insulating material is used. 42. Corresponding to the position of the first sub-pixel area P1, so that the orthographic projection of the portion of the second pattern 42 located in the first area A1 on the substrate 1 is greater than or equal to the area of the corresponding first sub-pixel area P1.
  • the conductive material forms the first pattern 41, which is electrically connected to the first cathode 23 of each first sub-pixel 2, so that the portion of the first pattern 41 located in the first area A1 is connected in parallel with the first cathode 23 of each first sub-pixel 2 In this way, not only can the luminous efficiency of the first sub-pixel 2 not be affected, but also the square resistance of the first cathode 23 can be reduced.
  • the phenomenon that the brightness near the integrated circuit end in the display substrate 100 is higher than the brightness far away from the integrated circuit end in the display substrate 100 can be effectively improved, thereby improving display uniformity and improving display quality.
  • the material of the first pattern 41 and the material of the second pattern 42 are mutually exclusive.
  • the material of the first pattern 41 will not be formed in the second pattern 42.
  • the material of the first pattern 41 will not be formed in the second pattern 42.
  • the material of the first pattern 41 can be prevented from being formed in the first sub-pixel region P1, which affects the light-emitting efficiency of the first sub-pixel 2, and the process of preparing and forming the first pattern 41 can be simplified, and the process of preparing the display substrate 100 can be simplified.
  • the orthographic projection of each second pattern 42 on the substrate 1 at least partially overlaps the orthographic projection of the corresponding opening K on the substrate 1. That is, the side surface of each opening K in the first pattern 41 is at least partially in contact with the side surface of the corresponding second pattern 42.
  • the side surface of each opening K in the above-mentioned first pattern 41 refers to the surface of each opening K opposite to the second pattern 42.
  • the side surface of the second pattern 42 refers to the surface of the second pattern 42 opposite to the first pattern 41 (or the corresponding opening K).
  • the transparent insulating material may be a lithium quinoline complex.
  • the conductive material may be magnesium.
  • Lithium quinoline complexes and magnesium are commonly used materials in the existing manufacturing process of display panels, so there is no need to add additional types of materials in the existing manufacturing process.
  • the orthographic projection shape of the second pattern 42 on the substrate 1 may include multiple types, and the corresponding shape of the opening K may include multiple types, which can be selected and set according to actual needs.
  • the orthographic projection shape of the second pattern 42 on the substrate 1 shown in FIG. 4 is a rectangle, and the shape of the corresponding opening K is also a rectangle.
  • the orthographic projection shape of the second pattern 42 on the substrate 1 and the shape of the corresponding opening K may also be other shapes, which are not limited in the embodiment of the present disclosure.
  • the shape and size of the orthographic projection of the second pattern 42 on the substrate 1 may be the same or different, which is not limited in the embodiment of the present invention.
  • the plurality of second patterns 42 in the pattern layer 4 are far away from the surface of the substrate 1, which is lower than the surface of the first pattern 41 away from the substrate 1.
  • the thickness of the plurality of second patterns 42 in the pattern layer 4 is smaller than the thickness of the first pattern 41. This is beneficial to reduce the amount of material used for the second pattern 42 and reduce the manufacturing cost of the display substrate 100.
  • the thickness of the second pattern 42 may be about 5 nm. Taking into account the process error of preparing and forming the second pattern 42, the thickness of the second pattern 42 may be changed, slightly increased or decreased.
  • the thickness of the portion of the first pattern 41 located in the first area A1 is greater than or equal to 100 nm.
  • the square resistance of the metal structure formed by the part of the first pattern 41 located in the first area A1 and the first cathode 23 can be effectively reduced.
  • the square resistance can be reduced to at least 1 ⁇ / ⁇ .
  • the electrical connection between the portion of the first pattern 41 located in the first area A1 and the first cathode 23 in each first sub-pixel 2 includes a variety of ways, which can be selected and set according to actual needs.
  • another film layer (for example, an insulating layer) may be provided between the portion of the first pattern 41 located in the first area A1 and the first cathode 23 in each first sub-pixel 2, and the film layer has a via hole. .
  • the portion of the first pattern 41 located in the first area A1 and the first cathode 23 in each first sub-pixel 2 may be electrically connected through vias provided on the other film layer.
  • no other film layer is provided between the portion of the first pattern 41 located in the first area A1 and the first cathode 23 in each first sub-pixel 2.
  • the part of the first pattern 41 located in the first area A1 is close to the surface of the substrate 1 and directly contacts the surface of the first cathode 23 in each first sub-pixel 2 away from the substrate 1. That is, the part of the first pattern 41 located in the first area A1 is directly fabricated and formed on the surface of the first cathode 23, and electrical connection is achieved through the surfaces of the two.
  • the part of the first pattern 41 located in the first area A1 close to the side surface of the substrate 1 and directly contacting the side surface of the first cathode 23 in each first sub-pixel 2 away from the substrate 1, it is beneficial to increase the size.
  • the contact area between the part of the first pattern 41 located in the first area A1 and the first cathode 23 of each first sub-pixel 2 makes the electrical connection between the two better.
  • the display area A further includes a second area A2 located beside the first area A1, and the second area A2 includes a plurality of second sub-pixel areas P2.
  • the plurality of second sub-pixel regions P2 may be arranged in an array, for example.
  • the above-mentioned “side” may refer to one side, two sides, or three sides of the first area A1.
  • the first area A1 surrounds the second area A2.
  • the second area A2 is an area in the display area A excluding the first area A1.
  • the portion of the display substrate 1 located between two adjacent second sub-pixel regions P2 is configured to enable light to pass through itself from one side to the opposite side. That is, the part of the display substrate 1 located between two adjacent second sub-pixel regions P2 may be in a semi-transparent state.
  • an optical sensor (such as a camera) can be arranged in the second area A2.
  • the optical sensor can be arranged on the side of the substrate 1 away from the pattern layer 4, and external light can enter the optical sensor through the portion of the display substrate 100 located between two adjacent second sub-pixel regions P2, so that the optical sensor can normal work. This is beneficial to enable the above-mentioned display device 1000 to realize a full-screen design.
  • the display substrate 100 further includes: a plurality of second sub-sub-regions disposed on one side of the substrate 1 and respectively located in the plurality of second sub-pixel regions P2. Pixel 5.
  • the plurality of second sub-pixels 5 include, for example, at least one of red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels.
  • the second sub-pixel 5 includes: a pixel driving circuit, and a second anode 51 and a second light-emitting layer 52 stacked in sequence. Among them, the second light-emitting layer 52 is farther away from the substrate 1 than the second anode 51.
  • the structure of the pixel driving circuit in the second sub-pixel 5 and the pixel driving circuit in the first sub-pixel 2 may be the same.
  • each second light-emitting layer 52 is electrically connected to the corresponding second anode 51 through an opening.
  • the opening of the pixel defining layer 3 is also used to define a plurality of second sub-pixel regions P2.
  • the boundary of the plurality of second sub-pixel regions P2 is located within the orthographic projection range of the portion of the first pattern 41 located in the second area A2 on the substrate 1, and Each second light-emitting layer 52 is electrically connected to a portion of the first pattern 41 located in the second area A2.
  • the orthographic projection of the portion of the plurality of second patterns 42 located in the second area A2 on the substrate 1 does not overlap with the boundary of the plurality of second sub-pixel areas P2.
  • the part of the first pattern 41 located in the second area A2 will cover the second light-emitting layer 52 of each second sub-pixel 5.
  • the portion of the second pattern 42 located in the second area A2 is located in a portion of the second area A2 excluding the second sub-pixel area P2.
  • the second pattern 42 is formed of a light-transmitting insulating material, by disposing the second pattern 42 in the second area A2 in a part of the second area A2 except for the second sub-pixel area P2, it is possible to avoid affecting the display The light transmittance of the portion of the substrate 100 located in the second area A2.
  • the orthographic projection shape of the second pattern 42 located in the second area A2 on the substrate 1 includes a variety of shapes, which can be selected and set according to actual needs.
  • the orthographic projection shape of the second pattern 42 located in the second area A2 on the substrate 1 may be a hexagon as shown in FIG. 13, and each second pattern 42 located in the second area A2 is located adjacent to each other. Between the two second sub-pixels 5.
  • the orthographic projection shape of the second pattern 42 located in the second area A2 on the substrate 1 may be a bar shape, and each second pattern 42 located in the second area A2 may be located in two adjacent rows or two columns. Between the second sub-pixels 5.
  • the orthographic projection shape of the second pattern 42 located in the second area A2 on the substrate 1 may be a grid shape, and the second pattern 42 is adjacent to the plurality of second sub-pixels 5.
  • the second pattern 42 located in the second area A2 By defining the orthographic projection shape of the second pattern 42 located in the second area A2 on the substrate 1 and the positional relationship with the second sub-pixel 5, it is possible to ensure that the first pattern 41 is located in the second area A2. While the part is a continuous film, the second pattern 42 located in the second area A2 has a larger orthographic projection area on the substrate 1, ensuring that the light of the portion of the display substrate 100 located in the second area A2 is transmitted through Rate.
  • the portion of the first pattern 41 located in the second area A2 is close to the side surface of the substrate 1, and is opposite to the side surface of each second light-emitting layer 52 away from the substrate 1. direct contact.
  • the portion of the first pattern 41 located in the second area A2 is used as the second cathode of each second sub-pixel 5.
  • the optical sensor in order to achieve a full screen, the optical sensor needs to be arranged on the side of the electroluminescent display panel away from the light-emitting surface, so external light needs to pass through the electroluminescent display panel and enter the optical sensor.
  • the cathode of each sub-pixel in the electroluminescent display panel is vapor deposited on the entire surface. In this way, the entire surface of the vapor-deposited cathode will cause most of the light incident on the electroluminescent display panel from the outside to be lost when incident on the optical sensor.
  • the display substrate 100 provided by some embodiments of the present disclosure is electrically connected to the second light-emitting layer 52 of each second sub-pixel 5 by electrically connecting the portion of the first pattern 41 located in the second area A2 to connect the first
  • the part of the pattern 41 located in the second area A2 is used as the second cathode of each second sub-pixel 5, and the part of the plurality of second patterns 42 located in the second area A2 is arranged in two adjacent second sub-pixels.
  • this is beneficial to increase the light transmittance of the portion of the display substrate 100 located in the second area A2.
  • the display substrate 100 is applied to the display device 1000, and the display device 1000 further includes an optical sensor disposed in the second area A2, more light can pass through the display substrate 100 from the outside and enter the optical sensor. sensor.
  • the transmittance of the display substrate 100 for the visible light band can be increased by 20% or more, and the transmittance for the infrared light band can be increased by 100% or more.
  • the thickness of the portion of the first pattern 41 located in the second area A2 ranges from 10 nm to 15 nm.
  • the thickness of the portion of the first pattern 41 located in the second area A2 may be 10 nm, 11 nm, 12.5 nm, 13.7 nm, 15 nm, or the like.
  • each second sub-pixel 5 After setting the portion of the first pattern 41 located in the second area A2 as the second cathode of each second sub-pixel 5, by setting the thickness of the portion located in the second area A2 of the first pattern 41 to the above range, it can be guaranteed The light emitted by the second light-emitting layer 52 of each second sub-pixel 5 can pass through the portion of the first pattern 41 located in the second area A2, thereby ensuring that each second sub-pixel 5 can work normally and perform image display.
  • a portion of the pixel defining layer 3 located in the second area A2 is provided with a plurality of grooves, and the second patterns 42 located in the second area A2 may be respectively located in the plurality of grooves.
  • the side surface of the second pattern 42 located in the second area A2 is at least partially in contact with the side surface of the opening in the first pattern 41 located in the second area A2.
  • Some embodiments of the present disclosure provide a method for preparing a display substrate. As shown in Figure 14, the preparation method includes: S100-S300.
  • the substrate 1 has a display area A.
  • the display area A includes at least a first area A1, and the first area A1 includes a plurality of first sub-pixel areas P1.
  • the type of the above-mentioned substrate 1, the arrangement of the first area A1, and the arrangement of the first sub-pixel region P1 may be the same as those in some of the above embodiments.
  • each first sub-pixel 2 includes a first anode 21, a first light-emitting layer 22, and a first cathode 23 stacked in sequence.
  • the present disclosure may use a photolithography process to prepare the first anode 21 of each first sub-pixel 2, and may use an evaporation process or an inkjet printing process to prepare the first light-emitting layer 22 of each first sub-pixel 2 ,
  • the first cathode 23 of each first sub-pixel 2 can be formed by an evaporation process.
  • first cathodes 23 of the above-mentioned first sub-pixels 2 are connected to each other to form an integral structure.
  • the above S200 further includes: forming a plurality of second sub-pixels 5 on one side of the substrate 1.
  • the plurality of second sub-pixels 5 are respectively located in the plurality of second sub-pixel regions P2.
  • the first anode 21 of each first sub-pixel 2 and the second anode 51 of each second sub-pixel 5 are arranged in the same layer, and the first light-emitting layer 22 of each first sub-pixel 2 and the second light-emitting layer 22 of each second sub-pixel 5 are arranged in the same layer.
  • Layer 52 is set on the same layer.
  • the "same layer” mentioned in this article refers to a layer structure formed by using the same film forming process to form a film layer for forming a specific pattern, and then using the same mask plate to form a patterning process.
  • a patterning process may include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights. Or have different thicknesses.
  • a pattern layer 4 is formed on the side of the plurality of first sub-pixels 2 away from the substrate 1.
  • the pattern layer 4 includes a first pattern 41 and a plurality of second patterns 42.
  • the first pattern 41 has a plurality of openings K arranged at intervals, and the plurality of second patterns 42 are respectively arranged in the plurality of openings K.
  • the material of the first pattern 41 is a conductive material, and the material of the second pattern 42 is a transparent insulating material.
  • the first pattern 41 and the second pattern 42 please refer to the description in some of the above-mentioned embodiments, which will not be repeated here.
  • the pattern layer 4 is formed on the side of the plurality of first sub-pixels 2 away from the substrate 1, including: S310-S320.
  • a plurality of second patterns 42 arranged at intervals are formed on a side of the plurality of first sub-pixels 2 away from the substrate 1.
  • the boundary of the orthographic projection of the portion of the plurality of second patterns 42 located in the first region A1 on the substrate 1 coincides with the boundary of the plurality of first sub-pixel regions P1; or, the boundary of the plurality of first sub-pixel regions P1
  • the boundary is located within the boundary range of the orthographic projection of the portion of the plurality of second patterns 42 located in the first area A1 on the substrate 1.
  • the display area A further includes the second area A2
  • a part of the plurality of second patterns 42 may be located in the second area A2.
  • the second pattern 42 located in the second area A2 is arranged between two adjacent second sub-pixel areas P2, and the orthographic projection of the second pattern 42 located in the second area A2 on the substrate 1, and The boundaries of the plurality of second sub-pixel regions P2 do not overlap.
  • a plurality of second patterns 42 arranged at intervals are formed on the side of the plurality of first sub-pixels 2 away from the substrate 1, including: S311 to S312.
  • S311 Disposing a fine metal mask (Fine Metal Mask, FMM for short) on the side of the plurality of first sub-pixels 2 away from the substrate 1.
  • FMM Fine Metal Mask
  • the above-mentioned FMM has a plurality of patterns, and the shapes and positions of the plurality of patterns are the same as the shapes and positions of the second pattern 42 to be formed.
  • a transparent insulating material is vapor-deposited on the side of the plurality of first sub-pixels 2 away from the substrate 1, forming a plurality of spaces arranged at intervals.
  • a second pattern 42 is a transparent insulating material vapor-deposited on the side of the plurality of first sub-pixels 2 away from the substrate 1, forming a plurality of spaces arranged at intervals.
  • the above-mentioned transparent insulating material may be a lithium quinoline complex.
  • the second pattern 42 of a desired shape and position can be directly formed, which is beneficial to simplify the process flow of preparing and forming the display substrate 100.
  • a first pattern 41 is formed in the gap between the plurality of second patterns 42.
  • the portion of the first pattern 41 located in the first area A1 is electrically connected to the first cathode 23.
  • each second sub-pixel area P2 is located in the area of the orthographic projection of the second area A2 in the first pattern 41 on the substrate 1, and each second light-emitting layer 52 is in line with the first pattern 41.
  • the part located in the second area A2 is electrically connected.
  • the first pattern 41 is formed in the gap between the plurality of second patterns 42, including: S321 to S322.
  • the above-mentioned opening mask has a pattern, and the shape and setting position of the pattern are the same as the shape and setting position of at least a part of the second pattern 41 to be formed.
  • the conductive material is vapor-deposited into the gap between the plurality of second patterns 42 through the opening mask and the vapor deposition process is used to form the first pattern 41.
  • the conductive material and the transparent insulating material are mutually exclusive; the orthographic projection shape of the first pattern 41 on the substrate 1 is complementary to the orthographic projection shape of the plurality of second patterns 42 on the substrate 1.
  • the aforementioned conductive material may be magnesium.
  • the magnesium and lithium quinoline complexes are mutually exclusive.
  • the conductive material will be formed between any two adjacent second patterns 42 and located in any two adjacent second patterns 42 The conductive materials between them will be connected to each other to form a one-piece structure.
  • a plurality of openings K can be naturally formed in the first pattern 41, and a second pattern 42 is located in one opening K.
  • the conductive material can be prevented from being formed on the surface of the second pattern 42 away from the substrate 1 during the process of evaporating the conductive material.
  • the portion of the first pattern 41 located in the second area A2 serves as the second cathode of each second sub-pixel P2.
  • the thickness of the portion of the first pattern 41 located in the second area A2 is small.
  • the thickness of the portion of the first pattern 41 located in the first area A1 for example, 100 nm
  • the thickness of the portion of the first pattern 41 located in the second area A2 for example, 15 nm
  • the first area A1 and the second area A2 can be vapor-deposited to form a thin film with a thickness of 15 nm, and then the conductive material can be vapor-deposited in the first area A1, so that The thickness of the portion of the first pattern 41 located in the first area A1 is 100 nm.
  • the beneficial effects that can be achieved by the manufacturing method of the display substrate provided by some embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the display substrate 100 provided in some of the above-mentioned embodiments, and will not be repeated here.
  • a person of ordinary skill in the art can understand that all or part of the steps in the above method embodiments can be implemented by a program instructing relevant hardware.
  • the foregoing program can be stored in a computer readable storage medium. When the program is executed, it is executed. Including the steps of the foregoing method embodiment; and the foregoing storage medium includes: ROM, RAM, magnetic disk, or optical disk and other media that can store program codes.
  • the display device 1000 includes the display substrate 100 as described in any of the above-mentioned embodiments.
  • the display device 1000 may further include: a frame 200 and a circuit board 300 and other electronic accessories.
  • the display device 1000 may also include a cover plate arranged above the display substrate 100, such as cover glass.
  • the longitudinal section of the frame 200 is, for example, U-shaped, the display substrate 100, the circuit board 300 and other electronic accessories are all disposed in the frame 200, and the circuit board 300 is disposed under the display substrate 100.
  • the display device 1000 may be an electroluminescence display device, and the electroluminescence display device may be an OLED (Organic Light-Emitting Diode) display device or a QLED (Quantum Dot Light Emitting Diodes) Light-emitting diode) display device.
  • OLED Organic Light-Emitting Diode
  • QLED Quadantum Dot Light Emitting Diodes
  • the beneficial effects that can be achieved by the display device 1000 provided by some embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the display substrate 100 provided in some of the foregoing embodiments, and will not be repeated here.
  • the display device 1000 further includes: a substrate 1 disposed on the display substrate 100 away from the display substrate 100 At least one optical sensor 400 on one side of the pattern layer 4 and located in the second area A2.
  • optical sensor 400 There are many types of the above-mentioned optical sensor 400, which can be selected and set according to actual needs.
  • the above-mentioned optical sensor 400 may be a camera, an infrared sensor, or the like.
  • the above-mentioned display device 1000 may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.

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Abstract

一种显示基板，具有显示区。显示区至少包括第一区域，第一区域包括多个第一亚像素区。显示基板包括：衬底；设置在衬底的一侧、且分别位于多个第一亚像素区的多个第一亚像素；各第一亚像素包括依次层叠设置的第一阳极、第一发光层和第一阴极；以及设置在多个第一亚像素远离衬底一侧的图案层。图案层包括：第一图案和多个第二图案；第一图案的材料为导电材料，第二图案的材料为透明的绝缘材料。多个第二图案中位于第一区域的部分在衬底上的正投影边界，与多个第一亚像素区的边界重合；或者多个第一亚像素区的边界，位于多个第二图案中位于第一区域的部分在衬底上的正投影边界范围内。第一图案中位于第一区域的部分与第一阴极电连接。

Description

显示基板及其制备方法、显示装置
本申请要求于2020年03月05日提交的、申请号为202010148067.5的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，尤其涉及一种显示基板及其制备方法、显示装置。
背景技术
有机发光二极管(Organic Light Emitting Diode，简称OLED)因具有高亮度、全视角、响应速度快以及可柔性显示等优点，而备受关注。其中，AMOLED(Active matrix OLED，主动矩阵有机发光二极体)因驱动电压较低、发光器件寿命较长等优点，被较为广泛地应用于显示领域中。
发明内容
一方面，提供一种显示基板。所述显示基板具有显示区。所述显示区至少包括第一区域，所述第一区域包括多个第一亚像素区。所述显示基板包括：衬底；设置在所述衬底的一侧、且分别位于所述多个第一亚像素区的多个第一亚像素；各第一亚像素包括依次层叠设置的第一阳极、第一发光层和第一阴极；以及，设置在所述多个第一亚像素远离所述衬底一侧的图案层。所述图案层包括：第一图案和多个第二图案，所述第一图案具有间隔设置的多个开口，所述多个第二图案分别设置在所述多个开口内；所述第一图案的材料为导电材料，所述第二图案的材料为透明的绝缘材料。其中，所述多个第二图案中位于所述第一区域的部分在所述衬底上的正投影边界，与所述多个第一亚像素区的边界重合；或者，所述多个第一亚像素区的边界，位于所述多个第二图案中位于所述第一区域的部分在所述衬底上的正投影边界范围内。所述第一图案中位于所述第一区域的部分与所述第一阴极电连接。
在一些实施例中，各第二图案在所述衬底上的正投影，与相应的开口在所述衬底上的正投影至少部分重叠。
在一些实施例中，所述第一图案的材料和各第二图案的材料具有互斥性。
在一些实施例中，各第二图案的材料为锂喹啉配合物，所述第一图案的材料为镁。
在一些实施例中，所述第一图案中位于所述第一区域的部分靠近所述衬底的一侧表面，与所述第一阴极远离所述衬底的一侧表面直接接触。
在一些实施例中，所述第一图案中位于所述第一区域的部分的厚度大于 或等于100nm。
在一些实施例中，相对于所述衬底，所述多个第二图案远离所述衬底的一侧表面，低于所述第一图案远离所述衬底的一侧表面。
在一些实施例中，所述多个第二图案的厚度大约为5nm。
在一些实施例中，所述显示区还包括位于所述第一区域旁侧的第二区域，所述第二区域包括多个第二亚像素区。所述显示基板的位于相邻两个第二亚像素区之间的部分，被配置为能够使得光线从一侧穿过自身，射向相对的另一侧。
在一些实施例中，所述显示基板，还包括：设置在所述衬底的一侧、且分别位于所述多个第二亚像素区的多个第二亚像素；各第二亚像素包括依次层叠设置的第二阳极和第二发光层。其中，所述多个第二亚像素区的边界，位于所述第一图案中位于所述第二区域的部分在所述衬底上的正投影范围内，且各所述第二发光层均与所述第一图案中位于所述第二区域的部分电连接。所述多个第二图案中位于所述第二区域的部分在所述衬底上的正投影，与所述多个第二亚像素区的边界无交叠。
在一些实施例中，所述第一图案中位于所述第二区域的部分靠近所述衬底的一侧表面，与各所述第二发光层远离所述衬底的一侧表面直接接触。所述第一图案中位于所述第二区域的部分，作为各所述第二亚像素的第二阴极。
在一些实施例中，所述第一图案中位于所述第二区域的部分的厚度的范围为10nm～15nm。
另一方面，提供一种显示基板的制备方法。所述显示基板的制备方法包括：提供衬底；所述衬底具有显示区；所述显示区至少包括第一区域，所述第一区域包括多个第一亚像素区；在所述衬底的一侧形成多个第一亚像素；所述多个第一亚像素分别位于所述多个第一亚像素区；各第一亚像素包括依次层叠设置的第一阳极、第一发光层和第一阴极；在所述多个第一亚像素远离所述衬底的一侧形成图案层；所述图案层包括：第一图案和多个第二图案，所述第一图案具有间隔设置的多个开口，所述多个第二图案分别设置在所述多个开口内；所述第一图案的材料为导电材料，所述第二图案的材料为透明的绝缘材料。其中，所述在所述多个第一亚像素远离所述衬底的一侧形成图案层，包括：在所述多个第一亚像素远离所述衬底的一侧形成间隔设置的所述多个第二图案；所述多个第二图案中位于所述第一区域的部分在所述衬底上的正投影边界，与所述多个第一亚像素区的边界重合；或者，所述多个第一亚像素区的边界，位于所述多个第二图案中位于所述第一区域的部分在所 述衬底上的正投影边界范围内；在所述多个第二图案之间的间隙内形成所述第一图案；所述第一图案中位于所述第一区域的部分与所述第一阴极电连接。
在一些实施例中，所述在所述多个第一亚像素远离所述衬底的一侧形成间隔设置的所述多个第二图案，包括：在所述多个第一亚像素远离所述衬底的一侧设置精细金属掩膜板；通过所述精细金属掩膜板、并采用蒸镀工艺，将所述透明的绝缘材料蒸镀到所述多个第一亚像素远离所述衬底的一侧，形成间隔设置的多个第二图案。所述在所述多个第二图案之间的间隙内形成所述第一图案，包括：在所述多个第二图案远离所述衬底的一侧设置开口掩膜板；通过所述开口掩膜板、并采用蒸镀工艺，将所述导电材料蒸镀到所述多个第二图案之间的间隙内，形成第一图案；所述导电材料和所述透明的绝缘材料具有互斥性；所述第一图案在所述衬底上的正投影形状与所述多个第二图案在所述衬底上的正投影形状互补。
又一方面，提供一种显示装置。所述显示装置包括：如上述任一实施例中所述的显示基板。
在一些实施例中，在所述显示基板的显示区域还包括第二区域的情况下，所述显示装置还包括：设置在所述显示基板的衬底远离所述显示基板的图案层的一侧、且位于所述第二区域内的至少一个光学传感器。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程等的限制。
图1为根据本公开一些实施例中的一种显示装置的结构图；
图2为根据本公开一些实施例中的另一种显示装置的结构图；
图3为根据本公开一些实施例中的一种显示基板的结构图；
图4为根据本公开一些实施例中的一种图案层的结构图；
图5为根据本公开一些实施例中的另一种显示基板的结构图；
图6为根据本公开一些实施例中的又一种显示基板的结构图；
图7为图6所示的显示基板沿M-M＇向的一种剖视图；
图8为图7所示结构中的一种局部结构示意图；
图9为图6所示的显示基板沿N-N＇向的一种剖视图；
图10为图9所示结构中的一种局部结构示意图；
图11为图9所示结构中的另一种局部结构示意图；
图12为根据本公开一些实施例中的又一种显示基板的结构图；
图13为根据本公开一些实施例中的又一种显示基板的结构图；
图14为根据本公开一些实施例中的一种显示基板的制备方法的流程图；
图15为图14所示流程图中S300的一种流程图；
图16为图15所示流程图中S310的一种流程图；
图17为图15所示流程图中S320的一种流程图；
图18a～图18b为图14所示流程图中S300的制备图案层的一种步骤图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“连接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接物理接触或电接触。又如，描述一些实施例时可能使用了术语“耦接”以表明两个或两个以上部件有直接物理接触或电接触。然而，术语“耦接”或“通信耦合(communicatively coupled)”也可能指两个或两个以上部件彼此 间并无直接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
如本文中所使用，根据上下文，术语“如果”任选地被解释为意思是“当……时”或“在……时”或“响应于确定”或“响应于检测到”。类似地，根据上下文，短语“如果确定……”或“如果检测到[所陈述的条件或事件]”任选地被解释为是指“在确定……时”或“响应于确定……”或“在检测到[所陈述的条件或事件]时”或“响应于检测到[所陈述的条件或事件]”。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。
如本文所使用的那样，“约”、“大致”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层和区域的厚度。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
在相关技术中，对于车载或者笔记本等大尺寸的显示面板，由于显示面板的发光面积较大，进而需要较大的电流来驱动发光器件。在此基础上，电致发光显示面板中发光器件的阴极层为整面蒸镀(也即多个发光器件共用整层阴极层)，且为了保证发光器件的出光效率，通常将阴极层制作的较薄，从而导致阴极层的方阻较大。这样一来，电致发光显示面板中靠近集成电路端的亮度就会比远离集成电路端的亮度高，进而造成显示不均匀的现象。
基于此，本公开的一些实施例提供了一种显示基板100。如图5和图6所示，该显示基板100具有显示区A。
示例性的，显示区A至少包括第一区域A1。也即，如图5所示，显 示区A可以仅包括第一区域A1；或者，显示区A可以包括第一区域A1以及其他区域。例如，如图6所示，显示区A可以包括第一区域A1和第二区域A2。关于第二区域A2可以参照下文中的说明，此处不再赘述。
示例性的，如图5所示，第一区域A1可以包括多个第一亚像素区P1。该多个第一亚像素区P1例如可以呈阵列状排布。
在一些示例中，如图3及图7～图11所示，上述显示基板100可以包括：衬底1。
上述衬底1的类型包括多种，可以根据实际需要选择设置。
示例性的，上述衬底1可以为刚性衬底。其中，该刚性衬底可以为玻璃衬底或PMMA(Polymethyl methacrylate，聚甲基丙烯酸甲酯)衬底等。
示例性的，上述衬底1可以为柔性衬底。其中，该柔性衬底可以为PET(Polyethylene terephthalate，聚对苯二甲酸乙二醇酯)衬底、PEN(Polyethylene naphthalate two formic acid glycol ester，聚萘二甲酸乙二醇酯)衬底或PI(Polyimide，聚酰亚胺)衬底等。
在一些示例中，如图5所示，上述显示基板100还可以包括：设置在衬底1的一侧的多个第一亚像素2。该多个第一亚像素2例如包括红色亚像素、绿色亚像素、蓝色亚像素和白色亚像素中的至少一种。
示例性的，上述多个第一亚像素2分别位于上述多个第一亚像素区P1。例如，该多个第一亚像素2和多个第一亚像素区P1一一对应设置。
示例性的，如图8所示，第一亚像素2包括：像素驱动电路，以及依次层叠设置的第一阳极21、第一发光层22和第一阴极23。其中，第一阴极23相比于第一阳极21远离衬底1。多个第一亚像素2的第一阴极23可以相互连接，呈一体结构。
可选的，如图8所示，显示基板100还可以包括：设置在第一阳极21与第一发光层22之间的像素界定层3。该像素界定层3具有多个开口，每个第一发光层22的至少一部分通过一个开口与相应的第一阳极21电连接。
例如，像素界定层3的开口用于限定出多个第一亚像素区域P1。
上述像素驱动电路的结构包括多种，本公开对此不作限定。例如，例如像素驱动电路的结构可以为“6T1C”、“7T1C”、“6T2C”或“7T2C”等结构。此处，“T”表示为薄膜晶体管，位于“T”前面的数字表示为薄膜晶体管的个数，“C”表示为存储电容器，“C”前面的数字表示为 存储电容器的个数。
每个第一亚像素2中的像素驱动电路与第一阳极21电连接。其中，与第一阳极21电连接的薄膜晶体管可以为像素驱动电路中的驱动晶体管DT，该驱动晶体管DT可以通过绝缘层(或平坦处)上的过孔与第一阳极21电连接。
在一些示例中，如图7和图8所示，上述显示基板100还可以包括：设置在上述多个第一亚像素2远离衬底1一侧的图案层4。
示例性的，如图4所示，图案层4可以包括：第一图案41和多个第二图案42。第一图案41例如可以呈一体结构。
上述第一图案41具有间隔设置的多个开口K。上述多个第二图案42分别设置在该多个开口K中。例如，该多个第二图案42一一对应地设置在该多个开口K内。
需要说明的是，第一图案41的材料为导电材料，第二图案42的材料为透明的绝缘材料。
在一些示例中，如图7和图8所示，上述多个第二图案42中位于第一区域A1的部分在衬底1上的正投影边界，与多个第一亚像素区P1的边界重合；或者，上述多个第一亚像素区P1的边界，位于上述多个第二图案42中位于第一区域A1的部分在衬底1上的正投影边界范围内。也即，位于第一区域A1中的第二图案42在衬底1上的正投影的面积，大于或等于第一亚像素区P1的面积。
示例性的，在第一区域A1中，一个第二图案42位于一个第一亚像素2远离衬底1的一侧。例如，第二图案42靠近衬底1的一侧表面，与相应的第一亚像素2中第一阴极23远离衬底1的一侧表面直接接触。
由于第二图案42的材料为透明的绝缘材料，且位于第一区域A1中的各第二图案42在衬底1上的正投影的面积，大于或等于相应的第一亚像素区P1的面积，这也既可以避免影响第一亚像素2的电学性能，又可以避免对第一亚像素2的出光效率产生不良影响。
此处，在显示区A仅包括第一区域A1的情况下，上述多个第二图案42则全部位于第一区域A1内；在显示区A包括第一区域A1和第二区域A2的情况下，上述多个第二图案42中的一部分则位于第一区域A1内，另一部分则位于第二区域A2内。其中，该“第二图案42中的一部分”和“第二图案42中的另一部分”为数量上的限定。
在一些示例中，如图8所示，第一图案41中位于第一区域A1的部 分与第一阴极23电连接。
示例性的，第一图案41可以覆盖上述多个第一亚像素2中第一阴极23的一部分。
由于上述多个第二图案42分为位于第一图案41中的多个开口K内，因此，每个第二图案42在衬底1上的正投影的面积，小于或等于相应的开口K的面积。这样也就使得第一图案41中位于第一区域A1的部分不会对第一亚像素区P1进行遮挡，避免影响第一亚像素2的出光效率。此外，第一图案41中位于第一区域A1的部分和第一亚像素2中的第一阴极23能够形成并联，这也有利于降低第一阴极23的方阻。
此处，在显示区A仅包括第一区域A1的情况下，上述第一图案41则全部位于第一区域A1内；在显示区A包括第一区域A1和第二区域A2的情况下，上述第一图案41中的一部分则位于第一区域A1内，另一部分则位于第二区域A2内。其中，该“第一图案41中的一部分”和“第一图案41中的另一部分”为膜层整体上的限定。
由此，本公开的一些实施例所提供的显示基板100，通过在上述多个第一亚像素2远离衬底1的一侧设置图案层4，并将采用透明的绝缘材料形成的第二图案42，与第一亚像素区P1的位置相对应，使得第二图案42中位于第一区域A1的部分在衬底1上的正投影大于或等于相应第一亚像素区P1的面积，将采用导电材料形成第一图案41，与各第一亚像素2的第一阴极23电连接，使得第一图案41中位于第一区域A1的部分与各第一亚像素2的第一阴极23形成并联，这样不仅可以保证第一亚像素2的发光效率不受影响，还可以降低第一阴极23的方阻。在显示基板100进行图像显示的过程中，可以有效改善显示基板100中靠近集成电路端的亮度比远离集成电路端的亮度高的现象，提高显示均匀性，提高显示质量。
在一些实施例中，第一图案41的材料和第二图案42的材料具有互斥性。
示例性的，如果在先制备形成第二图案42，在后续制备形成第一图案41的过程中，基于两者的材料具有互斥性，第一图案41的材料不会形成在第二图案42远离衬底1的一侧表面上。
这样既可以避免第一图案41的材料形成在第一亚像素区P1，影响第一亚像素2的出光效率，又可以简化制备形成第一图案41的工艺，简化显示基板100的制备工艺。
在一些示例中，如图4所示，各第二图案42在衬底1上的正投影，与相应的开口K在衬底1上的正投影至少部分重叠。也即，第一图案41中各开口K的侧面与相应的第二图案42的侧面至少部分接触。
示例性的，上述第一图案41中各开口K的侧面指的是，各开口K中与第二图案42相对的表面。第二图案42的侧面指的是，第二图案42中与第一图案41(或相应的开口K)相对的表面。
可选的，上述各第二图案42中，透明的绝缘材料可以为锂喹啉配合物。第一图案41中，导电材料可以为镁。
锂喹啉配合物和镁为现有显示面板的制程中常用的材料，因此在现有的工艺制程中无需额外增加材料的种类。
需要说明的是，第二图案42在衬底1上的正投影形状可以包括多种，相应的开口K的形状可以包括多种，具体可以根据实际需要选择设置。示例性的，图4中所示的第二图案42在衬底1上的正投影形状为矩形，相应开口K的形状也为矩形。当然，如图12所示，第二图案42在衬底1上的正投影形状及相应的开口K的形状也可以为其他形状，本公开实施例对此不做限定。其中，第二图案42在衬底1上的正投影形状和大小可以相同，也可以不同，本发明实施例对此不做限定。
在一些示例中，相对于衬底1，图案层4中的多个第二图案42远离衬底1的一侧表面，低于第一图案41远离衬底1的一侧表面。
例如，图案层4中的多个第二图案42的厚度小于第一图案41的厚度。这样有利于减小第二图案42的材料的用量，减小显示基板100的制备成本。
可选的，第二图案42的厚度可以大约为5nm。考虑到制备形成第二图案42的工艺误差，第二图案42的厚度可能会发生变化，略有增大或减小。
在一些示例中，第一图案41中位于第一区域A1的部分的厚度大于或等于100nm。
在此基础上，可以有效减小由第一图案41中位于第一区域A1的部分与第一阴极23共同构成的金属结构的方阻。例如，该方阻至少可以减小至1Ω/□。
上述第一图案41中位于第一区域A1的部分，与各第一亚像素2中第一阴极23之间的电连接方式包括多种，可以根据实际需要选择设置。
在一些示例中，第一图案41中位于第一区域A1的部分与各第一亚 像素2中第一阴极23之间还可以设置有其他膜层(例如绝缘层)，该膜层具有过孔。第一图案41中位于第一区域A1的部分与各第一亚像素2中第一阴极23之间可以通过设置在该其他膜层上的过孔实现电连接。
在另一些示例中，如图8所示，第一图案41中位于第一区域A1的部分与各第一亚像素2中第一阴极23之间未设置有其他膜层。第一图案41中位于第一区域A1的部分靠近衬底1的一侧表面，与各第一亚像素2中的第一阴极23远离衬底1的一侧表面直接接触。也即，第一图案41中位于第一区域A1的部分直接制作形成在第一阴极23的表面上，并通过两者的表面实现电连接。
通过将第一图案41中位于第一区域A1的部分靠近衬底1的一侧表面，与各第一亚像素2中第一阴极23远离衬底1的一侧表面直接接触，有利于增大第一图案41中位于第一区域A1的部分与各第一亚像素2的第一阴极23的接触面积，使得两者更好地实现电连接。
在一些实施例中，如图6所示，显示区A还包括位于第一区域A1旁侧的第二区域A2，第二区域A2包括多个第二亚像素区P2。该多个第二亚像素区P2例如可以呈阵列状排布。
示例性的，上述“旁侧”可以指的是，第一区域A1的一侧、两侧或三侧等。例如，第一区域A1对第二区域A2形成包围。
在显示区A仅包括第一区域A1和第二区域A2的情况下，第二区域A2则为显示区A中除第一区域A1以外的区域。
在一些示例中，显示基板1的位于相邻两个第二亚像素区P2之间的部分，被配置为能够使得光线从一侧穿过自身，射向相对的另一侧。也即，显示基板1的位于相邻两个第二亚像素区P2之间的部分，可以为半透明状态。
这样一来，在将显示基板100应用至显示装置1000中的情况下，便可以在第二区域A2内设置光学传感器(例如摄像头)。该光学传感器可以设置在衬底1远离图案层4的一侧，外界光线便可以通过显示基板100中位于相邻两个第二亚像素区P2之间的部分入射至光学传感器，使得光学传感器能够正常工作。这样有利于使得上述显示装置1000实现全面屏设计。
在一些示例中，如图6、图10和图11所示，显示基板100还包括：设置在衬底1的一侧、且分别位于上述多个第二亚像素区P2的多个第二亚像素5。该多个第二亚像素5例如包括红色亚像素、绿色亚像素和、蓝色亚像素和白色亚像素中的至少一种。
示例性的，如图10和图11所示，第二亚像素5包括：像素驱动电路，以及依次层叠设置的第二阳极51和第二发光层52。其中，第二发光层52相比于第二阳极51远离衬底1。第二亚像素5中的像素驱动电路与第一亚像素2中的像素驱动电路的结构可以相同。
需要说明的是，上述像素界定层3也位于第二阳极51和第二发光层52之间。每个第二发光层52的至少一部分通过一个开口与相应的第二阳极51电连接。像素界定层3的开口还用于限定出多个第二亚像素区域P2。
示例性的，如图10和图11所示，上述多个第二亚像素区P2的边界，位于第一图案41中位于第二区域A2的部分在衬底1上的正投影范围内，且各第二发光层52均与第一图案41中位于第二区域A2的部分电连接。上述多个第二图案42中位于第二区域A2的部分在衬底1上的正投影，与多个第二亚像素区P2的边界无交叠。
也即，第一图案41中位于第二区域A2的部分，会对各第二亚像素5的第二发光层52进行遮盖。第二图案42中位于第二区域A2的部分，位于第二区域A2中除去第二亚像素区P2以外的部分区域内。
由于第二图案42采用透光的绝缘材料形成，通过将位于第二区域A2内的第二图案42设置在第二区域A2中除去第二亚像素区P2以外的部分区域内，可以避免影响显示基板100位于第二区域A2内的部分的光线透过率。
示例性的，位于第二区域A2内的第二图案42在衬底1上的正投影形状包括多种，可以根据实际需要选择设置。
例如，位于第二区域A2内的第二图案42在衬底1上的正投影形状可以为如图13所示的六边形，位于第二区域A2内的每个第二图案42位于相邻的两个第二亚像素5之间。当然，位于第二区域A2内的第二图案42在衬底1上的正投影形状可以为条形，位于第二区域A2内的每个第二图案42可以位于相邻的两行或两列第二亚像素5之间。或者，位于第二区域A2内的第二图案42在衬底1上的正投影形状可以为网格状，该第二图案42与多个第二亚像素5相邻。
通过对位于第二区域A2内的第二图案42在衬底1上的正投影形状以及与第二亚像素5之间的位置关系进行限定，可以在确保第一图案41中位于第二区域A2的部分为连续的薄膜的同时，使得位于第二区域A2内的第二图案42在衬底1上具有较大的正投影面积，确保显示基板100 位于第二区域A2内的部分的光线透过率。
在一些示例中，如图10和图11所示，第一图案41中位于第二区域A2的部分靠近衬底1的一侧表面，与各第二发光层52远离衬底1的一侧表面直接接触。第一图案41中位于第二区域A2的部分，用作各第二亚像素5的第二阴极。
这也就是说，第一图案41中位于第二区域A2的部分，和各第二亚像素5的第二发光层52之间未设置其他薄膜。
需要说明的是，在相关技术中，为了实现全面屏，需要将光学传感器设置在电致发光显示面板背离出光面的一侧，因此外界的光则需要穿过电致发光显示面板入射至光学传感器。在此基础上，电致发光显示面板中各子像素的阴极为整面蒸镀。这样一来，整面蒸镀的阴极会使得从外界入射至电致发光显示面板的光线在入射至光学传感器时损失掉大部分。
基于上述，本公开的一些实施例提供的显示基板100，通过将第一图案41中位于第二区域A2中的部分与各第二亚像素5的第二发光层52电连接，以将第一图案41中位于第二区域A2内的部分用作各第二亚像素5的第二阴极，并将多个第二图案42中位于第二区域A2中的部分设置在相邻两个第二亚像素区P2之间的区域内，且第二图案42处于透明状态，这样一来，有利于增大显示基板100中位于第二区域A2内的部分的光线透过率。在将显示基板100应用至显示装置1000中，且该显示装置1000还包括设置在第二区域A2内的光学传感器的情况下，可以使得更多的光线能够从外界穿过显示基板100入射至光学传感器。
经验证，采用本公开实施例提供的上述设置方式，显示基板100对于可见光波段的透过率可提升20％及以上，对于红外光波段的透过率可提升100％及以上。
在一些示例中，第一图案41中位于第二区域A2的部分的厚度的范围为10nm～15nm。例如，第一图案41中位于第二区域A2的部分的厚度可以为10nm、11nm、12.5nm、13.7nm或15nm等。
在将第一图案41中位于第二区域A2的部分作为各第二亚像素5的第二阴极后，通过将第一图案41中位于第二区域A2的部分的厚度设置为上述范围，可以保证各第二亚像素5的第二发光层52发出的光能够透过第一图案41中位于第二区域A2的部分，进而保证各第二亚像素5能够正常工作、进行图像显示。
在一些示例中，如图11所示，像素界定层3中位于第二区域A2的部分设置有多个凹槽，位于第二区域A2内的第二图案42可以分别位于该多个凹槽内。其中，位于第二区域A2中的第二图案42的侧面与第一图案41中位于第二区域A2内的开口的侧面至少部分接触。
本公开的一些实施例提供了一种显示基板的制备方法。如图14所示，该制备方法包括：S100～S300。
S100，提供衬底1。衬底1具有显示区A。显示区A至少包括第一区域A1，第一区域A1包括多个第一亚像素区P1。
示例性的，上述衬底1的类型、第一区域A1的设置方式、第一亚像素区P1的设置方式，可以与上述一些实施例中的相同，具体可以参照上述一下实施例中的说明，此处不再赘述。
S200，在衬底1的一侧形成多个第一亚像素2。该多个第一亚像素2分别位于上述多个第一亚像素区P1；各第一亚像素2包括依次层叠设置的第一阳极21、第一发光层22和第一阴极23。
示例性的，本公开可以采用光刻工艺制备形成各第一亚像素2的第一阳极21，可以采用蒸镀工艺或喷墨打印工艺等制备形成各第一亚像素2的第一发光层22，可以采用蒸镀工艺形成各第一亚像素2的第一阴极23。
例如，上述各第一亚像素2的第一阴极23相互连接，呈一体结构。
需要说明的是，在显示区A还包括第二区域A2的情况下，上述S200还包括：在衬底1的一侧形成多个第二亚像素5。该多个第二亚像素5分别位于多个第二亚像素区P2内。各第一亚像素2的第一阳极21和各第二亚像素5的第二阳极51同层设置，各第一亚像素2的第一发光层22和各第二亚像素5的第二发光层52同层设置。
此处，本文中提及的“同层”指的是采用同一成膜工艺形成用于形成特定图形的膜层，然后利用同一掩模板通过一次构图工艺形成的层结构。根据特定图形的不同，一次构图工艺可能包括多次曝光、显影或刻蚀工艺，而形成的层结构中的特定图形可以是连续的也可以是不连续的，这些特定图形还可能处于不同的高度或者具有不同的厚度。
S300，如图18b所示，在上述多个第一亚像素2远离衬底1的一侧形成图案层4。该图案层4包括：第一图案41和多个第二图案42，第一图案41具有间隔设置的多个开口K，该多个第二图案42分别设置在该多个开口K内。第一图案41的材料为导电材料，第二图案42的材料为透明的绝缘材料。
关于图案层4、第一图案41和第二图案42的结构的说明，可以参照上述一些实施例中的说明，此处不再赘述。
在一些示例中，如图15所示，在上述S300中，在多个第一亚像素2远离衬底1的一侧形成图案层4，包括：S310～S320。
S310，如图18a所示，在多个第一亚像素2远离衬底1的一侧形成间隔设置的多个第二图案42。该多个第二图案42中位于第一区域A1的部分在衬底1上的正投影边界，与多个第一亚像素区P1的边界重合；或者，该多个第一亚像素区P1的边界，位于多个第二图案42中位于第一区域A1的部分在衬底1上的正投影边界范围内。
需要说明的是，如图18a所示，在显示区A还包括第二区域A2的情况下，上述多个第二图案42中的一部分可以位于第二区域A2内。其中，位于第二区域A2内的第二图案42设置在相邻两个第二亚像素区P2之间，且位于第二区域A2内的第二图案42在衬底1上的正投影，与该多个第二亚像素区P2的边界无交叠。
示例性的，如图16所示，在上述S310中，在多个第一亚像素2远离衬底1的一侧形成间隔设置的多个第二图案42，包括：S311～S312。
S311，在上述多个第一亚像素2远离衬底1的一侧设置精细金属掩膜板(Fine Metal Mask，简称FMM)。
示例性的，上述FMM具有多个图案，该多个图案的形状、设置位置，与待形成的第二图案42的形状、设置位置相同。
S312，如图18a所示，通过精细金属掩膜板、并采用蒸镀工艺，将透明的绝缘材料蒸镀到上述多个第一亚像素2远离衬底1的一侧，形成间隔设置的多个第二图案42。
示例性的，上述透明的绝缘材料可以为锂喹啉配合物。采用蒸镀工艺蒸镀该透明的绝缘材料，可以直接形成所需形状及位置的第二图案42，有利于简化制备形成显示基板100的工艺流程。
S320，如图18b所示，在上述多个第二图案42之间的间隙内形成第一图案41。第一图案41中位于第一区域A1的部分与第一阴极23电连接。
需要说明的是，在显示区A还包括第二区域A2的情况下，上述多个第二图案42中的一部分可以位于第二区域A2内。其中，各第二亚像素区P2的边界，位于第一图案41中位于第二区域A2的部分在衬底1上的正投影范围内，且各第二发光层52均与第一图案41中位于第二区域A2的部分电连接。
示例性的，如图17所示，在上述S320中，在上述多个第二图案42之 间的间隙内形成第一图案41，包括：S321～S322。
S321，在上述多个第二图案42远离衬底1的一侧设置开口掩膜板(Open Mask)。
示例性的，上述开口掩膜板具有图案，该图案的形状、设置位置，与待形成的第二图案41的至少一部分的形状、设置位置相同。
S322，如图18b所示，通过开口掩膜板、并采用蒸镀工艺，将导电材料蒸镀到上述多个第二图案42之间的间隙内，形成第一图案41。导电材料和透明的绝缘材料具有互斥性；第一图案41在衬底1上的正投影形状与上述多个第二图案42在衬底1上的正投影形状互补。
示例性的，上述导电材料可以为镁。镁和锂喹啉配合物之间具有互斥性。
在通过开口掩膜板蒸镀导电材料、形成第一图案41的过程中，该导电材料会形成在任意相邻的两个第二图案42之间，位于任意相邻的两个第二图案42之间的导电材料会相互连接，呈一体结构。在形成第一图案41后，第一图案41中便可以自然而然地形成多个开口K，一个第二图案42位于一个开口K内。
由于第一图案41的材料和第二图案42的材料具有互斥性，在蒸镀导电材料的过程中，导电材料可以避免形成在第二图案42远离衬底1的一侧表面上。
需要说明的是，在显示区A还包括的第二区域A2的情况下，第一图案41中位于第二区域A2内的部分用作各第二亚像素P2的第二阴极。为了确保各第二亚像素P2的出光效率，第一图案41中位于第二区域A2内的部分的厚度较小。也就是说，第一图案41中位于第一区域A1内的部分的厚度(例如100nm)和第一图案41中位于第二区域A2内的部分的厚度(例如15nm)是不同的，两者之间的差异较大。
因此，在制备形成第一图案41的过程中，可以内在第一区域A1和第二区域A2先蒸镀形成厚度为15nm的薄膜，然后再第一区域A1内蒸镀继续蒸镀导电材料，使得第一图案41中位于第一区域A1内的部分的厚度为100nm。
本公开的一些实施例所提供的显示基板的制备方法所能实现的有益效果，与上述一些实施例中提供的显示基板100所能实现的有益效果相同，此处不再赘述。
本领域普通技术人员可以理解：实现上述方法实施例的全部或部分 步骤可以通过程序指令相关的硬件来完成，前述的程序可以存储于一计算机可读取存储介质中，该程序在执行时，执行包括上述方法实施例的步骤；而前述的存储介质包括：ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
本公开的一些实施例提供了一种显示装置1000。如图1所示，该显示装置1000包括如上述任一实施例中所述的显示基板100。
在一些示例中，如图2所示，显示装置1000还可以包括：框架200以及电路板300等其它电子配件。当然，显示装置1000还可以包括设置在显示基板100上方的盖板，例如盖板玻璃。
其中，框架200的纵截面例如呈U型，显示基板100、电路板300以及其它电子配件均设置于框架200内，电路板300设置于显示基板100的下方。
需要说明的是，显示装置1000可以为电致发光显示装置，电致发光显示装置可以为OLED(Organic Light-Emitting Diode，有机电致发光二极管)显示装置或QLED(Quantum Dot Light Emitting Diodes，量子点发光二极管)显示装置。
本公开的一些实施例所提供的显示装置1000所能实现的有益效果，与上述一些实施例中所提供的显示基板100所能实现的有益效果相同，此处不再赘述。
在一些实施例中，如图1所示，在上述显示基板100的显示区A还包括第二区域A2的情况下，显示装置1000还包括：设置在显示基板100的衬底1远离显示基板100的图案层4的一侧、且位于第二区域A2内的至少一个光学传感器400。
上述光学传感器400的类型包括多种，可以根据实际需要选择设置。
示例性的，上述光学传感器400可以为摄像头、红外传感器等。
在一些实施例中，上述显示装置1000可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (16)

  1. 一种显示基板，具有显示区；所述显示区至少包括第一区域，所述第一区域包括多个第一亚像素区；所述显示基板包括：
    衬底；
    设置在所述衬底的一侧、且分别位于所述多个第一亚像素区的多个第一亚像素；各第一亚像素包括依次层叠设置的第一阳极、第一发光层和第一阴极；以及，
    设置在所述多个第一亚像素远离所述衬底一侧的图案层；所述图案层包括：第一图案和多个第二图案，所述第一图案具有间隔设置的多个开口，所述多个第二图案分别设置在所述多个开口内；所述第一图案的材料为导电材料，所述第二图案的材料为透明的绝缘材料；
    其中，所述多个第二图案中位于所述第一区域的部分在所述衬底上的正投影边界，与所述多个第一亚像素区的边界重合；或者，所述多个第一亚像素区的边界，位于所述多个第二图案中位于所述第一区域的部分在所述衬底上的正投影边界范围内；
    所述第一图案中位于所述第一区域的部分与所述第一阴极电连接。
  2. 根据权利要求1所述的显示基板，其中，各第二图案在所述衬底上的正投影，与相应的开口在所述衬底上的正投影至少部分重叠。
  3. 根据权利要求1或2所述的显示基板，其中，所述第一图案的材料和各第二图案的材料具有互斥性。
  4. 根据权利要求1～3中任一项所述的显示基板，其中，各第二图案的材料为锂喹啉配合物，所述第一图案的材料为镁。
  5. 根据权利要求1～4中任一项所述的显示基板，其中，所述第一图案中位于所述第一区域的部分靠近所述衬底的一侧表面，与所述第一阴极远离所述衬底的一侧表面直接接触。
  6. 根据权利要求1～5中任一项所述的显示基板，其中，所述第一图案中位于所述第一区域的部分的厚度大于或等于100nm。
  7. 根据权利要求1～6中任一项所述的显示基板，其中，相对于所述衬底，所述多个第二图案远离所述衬底的一侧表面，低于所述第一图案远离所述衬底的一侧表面。
  8. 根据权利要求1～7中任一项所述的显示基板，其中，所述多个第二图案的厚度大约为5nm。
  9. 根据权利要求1～8中任一项所述的显示基板，其中，所述显示区还包 括位于所述第一区域旁侧的第二区域，所述第二区域包括多个第二亚像素区；
    所述显示基板的位于相邻两个第二亚像素区之间的部分，被配置为能够使得光线从一侧穿过自身，射向相对的另一侧。
  10. 根据权利要求9所述的显示基板，还包括：设置在所述衬底的一侧、且分别位于所述多个第二亚像素区的多个第二亚像素；各第二亚像素包括依次层叠设置的第二阳极和第二发光层；
    其中，所述多个第二亚像素区的边界，位于所述第一图案中位于所述第二区域的部分在所述衬底上的正投影范围内，且各所述第二发光层均与所述第一图案中位于所述第二区域的部分电连接；
    所述多个第二图案中位于所述第二区域的部分在所述衬底上的正投影，与所述多个第二亚像素区的边界无交叠。
  11. 根据权利要求10所述的显示基板，其中，所述第一图案中位于所述第二区域的部分靠近所述衬底的一侧表面，与各所述第二发光层远离所述衬底的一侧表面直接接触；
    所述第一图案中位于所述第二区域的部分，作为各所述第二亚像素的第二阴极。
  12. 根据权利要求9～11中任一项所述的显示基板，其中，所述第一图案中位于所述第二区域的部分的厚度的范围为10nm～15nm。
  13. 一种显示基板的制备方法，包括：
    提供衬底；所述衬底具有显示区；所述显示区至少包括第一区域，所述第一区域包括多个第一亚像素区；
    在所述衬底的一侧形成多个第一亚像素；所述多个第一亚像素分别位于所述多个第一亚像素区；各第一亚像素包括依次层叠设置的第一阳极、第一发光层和第一阴极；
    在所述多个第一亚像素远离所述衬底的一侧形成图案层；所述图案层包括：第一图案和多个第二图案，所述第一图案具有间隔设置的多个开口，所述多个第二图案分别设置在所述多个开口内；所述第一图案的材料为导电材料，所述第二图案的材料为透明的绝缘材料；
    其中，所述在所述多个第一亚像素远离所述衬底的一侧形成图案层，包括：
    在所述多个第一亚像素远离所述衬底的一侧形成间隔设置的所述多个第二图案；所述多个第二图案中位于所述第一区域的部分在所述衬底上的正投影边界，与所述多个第一亚像素区的边界重合；或者，所述多个第一亚像素 区的边界，位于所述多个第二图案中位于所述第一区域的部分在所述衬底上的正投影边界范围内；
    在所述多个第二图案之间的间隙内形成所述第一图案；所述第一图案中位于所述第一区域的部分与所述第一阴极电连接。
  14. 根据权利要求13所述的显示基板的制备方法，其中，所述在所述多个第一亚像素远离所述衬底的一侧形成间隔设置的所述多个第二图案，包括：
    在所述多个第一亚像素远离所述衬底的一侧设置精细金属掩膜板；
    通过所述精细金属掩膜板、并采用蒸镀工艺，将所述透明的绝缘材料蒸镀到所述多个第一亚像素远离所述衬底的一侧，形成间隔设置的多个第二图案；
    所述在所述多个第二图案之间的间隙内形成所述第一图案，包括：
    在所述多个第二图案远离所述衬底的一侧设置开口掩膜板；
    通过所述开口掩膜板、并采用蒸镀工艺，将所述导电材料蒸镀到所述多个第二图案之间的间隙内，形成第一图案；所述导电材料和所述透明的绝缘材料具有互斥性；所述第一图案在所述衬底上的正投影形状与所述多个第二图案在所述衬底上的正投影形状互补。
  15. 一种显示装置，包括：如权利要求1～12中任一项所述的显示基板。
  16. 根据权利要求15所述的显示装置，其中，在所述显示基板的显示区域还包括第二区域的情况下，
    所述显示装置还包括：设置在所述显示基板的衬底远离所述显示基板的图案层的一侧、且位于所述第二区域内的至少一个光学传感器。
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