WO2021152703A1

WO2021152703A1 - Inverter controller and motor drive unit

Info

Publication number: WO2021152703A1
Application number: PCT/JP2020/003020
Authority: WO
Inventors: 西尾　直樹; 伸翼角井
Original assignee: 三菱電機株式会社
Priority date: 2020-01-28
Filing date: 2020-01-28
Publication date: 2021-08-05
Also published as: JPWO2021152703A1; DE112020006657T5; JP7221424B2

Abstract

An inverter controller (5) comprises: a carrier-wave generation unit (8) for generating a three-phase carrier wave; and a PWM control unit (7) for controlling a switching state of an inverter by comparing the carrier wave and a modulated wave. The carrier-wave generation unit (8) comprises: a phase arithmetic unit (81) for calculating first to third carrier-wave phases on the basis of a carrier-wave frequency command and a motor frequency; and a carrier-wave output unit (82) for outputting the three-phase carrier wave on the basis of the first to third carrier-wave phases. The first to third carrier-wave phases have phase differences that vary continuously according to a change in motor frequency.

Description

Inverter control device and motor drive device

The present disclosure relates to an inverter control device that controls an inverter and an electric motor drive device including the inverter control device.

The electric motor that gives propulsion to the electric vehicle is driven by an inverter. Ground elements, which are receivers for various traffic lights, are placed on the track on which the electric vehicle travels. To prevent these ground elements from malfunctioning, electric vehicles have regulations on leakage noise. Patent Document 1 below describes that a hollow core made of a ferromagnetic material such as ferrite or amorphous metal is arranged around a wiring connecting an inverter and an electric motor in order to suppress common mode noise. Has been done.

Japanese Unexamined Patent Publication No. 2004-187368

However, the space under the floor of the electric car is limited. Therefore, there may be insufficient space for adding a filter component such as the core described in Patent Document 1. In such a case, the specifications of the inverter control device may have to be reviewed in order to secure a space for adding the filter parts.

In addition, the filter characteristics of the filter parts need to be determined according to the impedance including the motor. However, the manufacturer of the electric motor and the manufacturer of the inverter control device are not always the same. In this case, relying on the additional filter parts increases the design man-hours in the manufacturer of the inverter control device and increases the adjustment work in the actual vehicle. Therefore, it is desired to suppress leakage noise without relying on the addition of filter parts.

The present disclosure has been made in view of the above, and an object of the present disclosure is to obtain an inverter control device capable of suppressing leakage noise without relying on the addition of filter parts.

In order to solve the above-mentioned problems and achieve the object, the present disclosure is an inverter control device that controls an inverter that drives a three-phase motor by pulse width modulation. The inverter control device includes a carrier wave generation unit that generates a three-phase carrier wave, and a pulse width modulation control unit that controls the switching state of the inverter by comparing the carrier wave with the modulated wave. The carrier generation unit includes a phase calculation unit that calculates the first to third carrier phases based on the carrier frequency command and the motor frequency, and a carrier that outputs three-phase carriers based on the first to third carrier phases. It has an output unit. The first to third carrier phases have a phase difference from each other, and the phase difference also changes continuously as the motor frequency changes.

According to the inverter control device according to the present disclosure, there is an effect that leakage noise can be suppressed without relying on the addition of filter parts.

The figure which shows the structural example of the electric motor drive device which includes the inverter control device which concerns on Embodiment 1. Diagram showing a configuration example of a general inverter main circuit The figure which shows the equivalent circuit of FIG. 1 used to explain the leakage current. The figure used for explaining the method of generating the pulse width modulation (PWM) control signal given to the semiconductor element of each arm shown in FIG. The figure which shows the PWM control signal generated by each phase voltage command shown in FIG. The figure which shows the common mode voltage generated by the PWM control signal shown in FIG. The figure which shows the example of each phase voltage command of the modulation factor different from FIG. The figure which shows the PWM control signal generated by each phase voltage command shown in FIG. The figure which shows the common mode voltage generated by the PWM control signal shown in FIG. The figure which shows the waveform example when the carrier wave phase of each phase is shifted 120 ° from each other in each phase voltage command and the carrier wave shown in FIG. The figure which shows the PWM control signal generated by each phase voltage command and each phase carrier wave shown in FIG. The figure which shows the example of the common mode voltage waveform generated by the PWM control signal shown in FIG. The figure which shows the example of the harmonic distribution of the motor current which concerns on the conventional control when the carrier wave of each phase is the same. The figure which shows the example of the harmonic distribution of the motor current which concerns on the conventional control when the carrier phase of each phase is shifted 120 ° from each other. The figure which shows the example of the common mode voltage waveform which concerns on the conventional control when the carrier phase of each phase is shifted 120 ° from each other. The figure used for explaining the concept of the control method in Embodiment 1. The figure which shows the structural example of the carrier wave generation part which concerns on Embodiment 1. The figure which shows the structural example of the carrier wave generation part which concerns on the modification of Embodiment 1. A block diagram showing an example of a hardware configuration that realizes the function of the inverter control device according to the first embodiment. A block diagram showing another example of a hardware configuration that realizes the function of the inverter control device according to the first embodiment. The figure which shows the structural example of the carrier wave generation part which concerns on Embodiment 2. The figure which shows the structural example of the carrier wave generation part which concerns on Embodiment 3. The figure which shows the detailed structure of the frequency modulation part shown in FIG. 22 The figure which shows the output image of the frequency modulation amount output from the frequency modulation part shown in FIG.

The inverter control device and the motor drive device according to the embodiment of the present disclosure will be described in detail with reference to the accompanying drawings below. In the following embodiments, the motor drive device applied to the railway system will be described as an example, but it is not intended to exclude the application to other uses.

Embodiment 1.
FIG. 1 is a diagram showing a configuration example of an electric motor drive device 1 including an inverter control device 5 according to the first embodiment. As shown in FIG. 1, the motor drive device 1 according to the first embodiment includes a filter capacitor 3, an inverter 4, and an inverter control device 5. The inverter 4 is connected to the motor 105. The electric motor 105 is a three-phase electric motor mounted on an electric vehicle.

The DC power supplied from the overhead wire 101 is supplied to the motor drive device 1 via the current collector 102 and the filter reactor 2. There is a substation (not shown) at the end of the overhead wire 101, and the overhead wire 101 is positioned as an external power source when viewed from the motor drive device 1. The overhead wire voltage, which is the voltage of the overhead wire 101 applied to the current collector 102, and the conversion capacity of the inverter 4 differ depending on the drive system. The overhead line voltage range is approximately 600 to 3,000 [V]. The conversion capacity range is from several tens to several hundreds [kVA].

The positive terminal P of the motor drive device 1 is connected to the filter reactor 2. The negative terminal N of the motor drive device 1 is connected to the rail 104 via the wheel 103. As a result, the direct current due to the direct current supplied from the overhead wire 101 flows through the filter reactor 2, the motor drive device 1, the motor 105, the wheels 103, and the rail 104, and returns to the substation.

Note that, in FIG. 1, an overhead electric wire is shown as an overhead wire 101, and a pantograph-shaped current collector is shown as a current collector 102, but the present invention is not limited thereto. The overhead line 101 may be a third rail used in a subway or the like, and the current collector 102 may use a current collector for the third rail in accordance with this. Further, although FIG. 1 shows a case where the overhead wire 101 is a DC overhead wire, the overhead wire 101 may be an AC overhead wire. When the overhead wire 101 is an AC overhead wire, a transformer for stepping down the AC voltage received is provided instead of the filter reactor 2, and the AC voltage output from the transformer is a DC voltage in the subsequent stage of the transformer. A converter is provided to convert to.

Further, in FIG. 1, the filter reactor 2 is shown as an external component of the motor drive device 1, but the present invention is not limited to this. The filter reactor 2 may be provided inside the motor drive device 1.

The filter capacitor 3 is connected between the positive terminal P and the negative terminal N inside the motor drive device 1. As a result, the filter capacitor 3 is connected in parallel to both ends of the inverter 4 on the input side of the inverter 4.

The filter capacitor 3 smoothes the applied DC voltage. Further, the filter capacitor 3 is connected to the filter reactor 2 and constitutes an LC filter circuit together with the filter reactor 2. This LC filter circuit suppresses the surge voltage flowing in from the overhead wire 101 side. Further, the LC filter circuit suppresses the magnitude of the ripple component of the current flowing through the inverter 4. The inverter 4 is a power conversion circuit that supplies electric power to the electric motor 105.

The operation of the inverter 4 is controlled by the inverter control device 5. The inverter 4 converts the DC voltage of the filter capacitor 3 into an AC voltage of an arbitrary frequency having an arbitrary voltage value and applies it to the motor 105.

The inverter control device 5 includes a voltage command calculation unit 6, a PWM control unit 7, and a carrier wave generation unit 8. Information on the torque command and information on the motor frequency are input to the inverter control device 5. The voltage command calculation unit 6 calculates the voltage command based on the torque command and the motor frequency. The carrier wave generation unit 8 generates a carrier wave based on the motor frequency. The PWM control unit 7 generates a PWM control signal for controlling the switching element of the inverter 4 based on the voltage command and the carrier wave, and outputs the PWM control signal to the inverter 4. The PWM control signal is generated by comparing the amplitude of the voltage command and the carrier wave. The method for generating the PWM control signal will be described later.

FIG. 2 is a diagram showing a configuration example of a general inverter main circuit. The inverter main circuit includes semiconductor elements UPI, VPI, WPI of the upper arm and semiconductor elements UNI, VNI, WNI of the lower arm.

The semiconductor element UPI and the semiconductor element UNI are connected in series to form a U-phase leg. The semiconductor element VPI and the semiconductor element VNI are connected in series to form a V-phase leg. The semiconductor element WPI and the semiconductor element WNI are connected in series to form a W-phase leg. The U-phase, V-phase, and W-phase legs are connected in parallel to each other to form a three-phase bridge circuit.

FIG. 3 is a diagram showing an equivalent circuit of FIG. 1 used for explaining the leakage current. In FIG. 3, the motor 105 is represented by an inductance circuit symbol. When a three-phase motor is driven by a three-phase inverter regardless of the type of motor, the neutral point potential of the three-phase motor fluctuates. Therefore, as shown in FIG. 3, an equivalent circuit is formed in which the stray capacitance 34 is connected between the neutral point potential 32 of the motor 105 and the reference potential 31 which is the ground potential. The neutral point potential 32 contains a high frequency component due to PWM control. Therefore, when the U-phase voltage 33U, the V-phase voltage 33V, and the W-phase voltage 33W are applied to the motor 105, the leakage current 35 flows through the floating capacity 34.

The potential difference between the neutral point potential 32 and the reference potential 31 is called "common mode voltage". In the case of a three-phase inverter, the common mode voltage is calculated as (Vu + Vv + Vw) / 3. However, Vu has a U-phase voltage of 33U, Vv has a V-phase voltage of 33V, and Vw has a W-phase voltage of 33W.

FIG. 4 is a diagram used for explaining a method for generating a PWM control signal given to the semiconductor element of each arm shown in FIG. FIG. 4 shows a U-phase voltage command 26U, a V-phase voltage command 26V, and a W-phase voltage command 26W, which are sine waves, and a carrier wave 28, which is a triangular wave. The horizontal axis represents the phase angle, and the vertical axis represents the amplitude value. 1 [Vpu] on the vertical axis corresponds to 1/2 of the voltage amplitude applied to the inverter 4, in other words, 1/2 of the DC voltage which is the voltage of the filter capacitor 3.

FIG. 5 is a diagram showing a PWM control signal generated by each phase voltage command shown in FIG. From the upper side, the U-phase PWM control signal, the V-phase PWM control signal, and the W-phase PWM control signal are shown in this order. The horizontal axis of FIG. 5 has the same phase angle as that of FIG. FIG. 5 shows the waveform of the PWM control signal when the modulation factor is 0.8. In the present specification, the modulation factor is defined as the ratio of 1/2 of the DC voltage applied to the inverter 4 to the amplitude of the AC phase voltage applied to the motor 105 by the inverter 4. The definition here is an example, and the modulation factor may be defined in any way.

The PWM control unit 7 compares the U-phase voltage command 26U with the carrier wave 28 which is a triangular wave signal. When the U-phase voltage command 26U is larger than the carrier wave 28, it is “ON”, and when the U-phase voltage command 26U is the carrier wave 28 or less, it is “OFF”. In this way, the U-phase PWM control signal shown in the upper part of FIG. 5 is generated. Similar to the U-phase PWM control signal, the V-phase PWM control signal and the W-phase PWM control signal are also generated by comparing each of the V-phase voltage command 26V and the W-phase voltage command 26W with the carrier wave 28. The V-phase PWM control signal and the W-phase PWM control signal generated at this time are shown in the middle and lower stages of FIG. 5, respectively.

FIG. 6 is a diagram showing a common mode voltage generated by the PWM control signal shown in FIG. In FIG. 6, the horizontal axis represents the phase angle and the vertical axis represents the amplitude of the common mode voltage. As shown in FIG. 6, the common mode voltage when the modulation factor is relatively large has a waveform that changes step by step between the levels of ± 1 [Vpu] or ± 1/3 [Vpu].

Leakage current flows every time there is a change in the common mode voltage. Further, the larger the amount of change (voltage change rate) per unit time of the common mode voltage, the larger the amplitude of the leakage current. Therefore, in order to suppress the leakage current 35 flowing through the stray capacitance 34, it is important to reduce the rate of change in the common mode.

FIG. 7 is a diagram showing an example of each phase voltage command having a modulation factor different from that of FIG. FIG. 7 shows each phase voltage command when the modulation factor is 0.1. The distinction between the solid line, the broken line and the alternate long and short dash line is the same as in FIG. That is, the solid line indicates the U-phase voltage command 26U, the broken line indicates the V-phase voltage command 26V, and the alternate long and short dash line indicates the W-phase voltage command 26W.

FIG. 8 is a diagram showing PWM control signals generated by each phase voltage command shown in FIG. 7. FIG. 8 shows the waveform of the PWM control signal when the modulation factor is 0.1. The arrangement of the PWM control signals is the same as that in FIG. 5, and the U-phase PWM control signal, the V-phase PWM control signal, and the W-phase PWM control signal are shown in this order from the upper side.

When the modulation factor is close to 0, as shown in FIG. 8, the difference between the PWM control signals of each phase becomes small, and the output of the inverter 4 is mostly in the state of zero voltage vector. Here, the state of the zero voltage vector means that either all the upper arm side elements are turned on or all the lower arm elements are turned on.

FIG. 9 is a diagram showing a common mode voltage generated by the PWM control signal shown in FIG. As shown in FIG. 9, when the modulation factor is close to 0, the waveform becomes a waveform that moves back and forth between the levels of the common mode voltage of ± 1 [Vpu] in a short time. Therefore, the voltage change rate becomes larger and the leakage current 35 flowing through the stray capacitance 34 becomes larger than in the case of 0.8 in which the modulation factor is relatively large.

FIG. 10 is a diagram showing an example of waveforms when the carrier phases of each phase are shifted by 120 ° from each other in each phase voltage command and carrier shown in FIG. 7. In the example shown in FIG. 10, the V-phase carrier 28V shown by the broken line is 120 ° out of phase with the U-phase carrier 28U shown by the solid line. Further, the phase of the W-phase carrier wave 28W indicated by the alternate long and short dash line is 120 ° ahead of the U-phase carrier wave 28U. It should be noted that the fact that the phase is advanced by 120 ° and that the phase is delayed by 240 ° are equivalent.

FIG. 11 is a diagram showing PWM control signals generated by each phase voltage command and each phase carrier wave shown in FIG. According to the waveform shown in FIG. 11, it is shown that the ON or OFF timings of the PWM control signals of each phase are deviated from each other. Therefore, it can be understood that when the carrier phases of each phase are shifted by 120 ° from each other, a zero voltage vector is not generated even when the modulation factor takes a value close to 0, unlike in FIG.

FIG. 12 is a diagram showing an example of a common mode voltage waveform generated by the PWM control signal shown in FIG. According to FIG. 12, even when the modulation factor is close to 0, the common mode voltage has a waveform that goes back and forth between the levels of ± 1/3 [Vpu]. Therefore, as compared with the example of FIG. 9 in which the carrier phase of each phase is the same, the voltage change rate is smaller, so that the leakage current 35 flowing through the stray capacitance 34 is reduced.

FIG. 13 is a diagram showing an example of the harmonic distribution of the motor current related to the conventional control when the carrier waves of each phase are the same. The vertical axis of FIG. 13 represents the current amplitude. The waveform control parameters of FIG. 13 are a carrier frequency of 800 Hz, a drive frequency of 20 Hz, and a modulation factor of 0.2. According to FIG. 13, the 20 Hz component of the drive frequency appears large, and the 2f component (1600 Hz) of the carrier frequency appears, although the amplitude is relatively small.

FIG. 14 is a diagram showing an example of the harmonic distribution of the motor current according to the conventional control when the carrier phases of each phase are shifted by 120 ° from each other. The control parameters other than the carrier phase are the same as those in FIG. According to FIG. 14, it is shown that the 1f component (800 Hz) of the carrier frequency is significantly increased. As can be understood from this result, when the carrier phase of each phase is shifted by 120 ° from each other, there arises a problem that the electromagnetic noise emitted from the motor increases.

In FIG. 12, it has been explained that when the carrier phase of each phase is shifted by 120 ° from each other, the leakage current 35 flowing through the stray capacitance 34 is reduced. However, when the carrier phases of each phase are shifted by 120 ° from each other and the value of the modulation factor is relatively large, the effect of reducing the leakage current 35 flowing through the stray capacitance 34 is reduced. Found by the disclosers. This point will be described below.

FIG. 15 is a diagram showing an example of a common mode voltage waveform according to conventional control when the carrier phase of each phase is shifted by 120 ° from each other. The control parameters other than the carrier phase in the waveform of FIG. 15 are a carrier frequency of 800 Hz, a drive frequency of 20 Hz, and a modulation factor of 0.8. According to FIG. 15, even when the carrier phase is shifted by 120 °, the common mode voltage waveform changes to a level of ± 1 [Vpu] as the modulation factor increases, and the leakage current 35 is reduced. Can be understood to be smaller.

FIG. 16 is a diagram used for explaining the concept of the control method in the first embodiment. The horizontal axis represents the modulation factor and the vertical axis represents the noise level. Since the modulation factor increases as the speed of the motor increases, the modulation factor on the horizontal axis may be read as the speed of the motor. The noise level on the vertical axis means the noise level caused by the leakage current 35. The thick solid line K1 represents the noise level when there is a carrier phase difference, that is, when there is a phase difference in the carrier phase of each phase. The thick broken line K2 represents the noise level when there is no carrier phase difference, that is, when there is no phase difference in the carrier phase of each phase. The thin broken line K3 drawn parallel to the horizontal axis represents the noise level limit value. The limit value is a value that changes depending on the vehicle type and route of the electric vehicle.

According to FIG. 16, it is shown that when there is no carrier phase difference, the noise level caused by the leakage current 35 becomes smaller as the modulation factor becomes larger. On the other hand, when there is a carrier phase difference, it is shown that the noise level caused by the leakage current 35 increases as the modulation factor increases. Therefore, it can be said that it is desirable from the viewpoint of noise to select a conventional modulation method having no carrier phase difference within a range in which the noise level limit value can be satisfied without the carrier phase difference.

Based on the matters described above, in the inverter control device 5 according to the first embodiment, the carrier wave generation unit 8 is configured as shown in FIG. FIG. 17 is a diagram showing a configuration example of the carrier wave generation unit 8 according to the first embodiment. As shown in FIG. 17, the carrier wave generation unit 8 according to the first embodiment includes a phase calculation unit 81 and a carrier wave output unit 82.

The phase calculation unit 81 includes an integrator 811, a phase difference calculation unit 812, a subtractor 813, and an adder 814. The integrator 811 calculates the first carrier phase theta _cu based on the carrier frequency command f _c. The phase difference calculation unit 812 calculates the phase difference Δθ _c based on the motor frequency. The subtractor 813 calculates the second carrier phase θ _cv by subtracting the phase difference Δθ _c from the first carrier phase θ _cu. The adder 814 calculates the third carrier phase θ _cw by adding the phase difference Δθ _c to the first carrier phase θ _cu. In FIG. 17, the input signal of the phase difference calculation unit 812 is used as the motor frequency, but the frequency is not limited to this. Instead of the motor frequency, the modulation factor or the speed information of the electric train may be used. The phase difference calculation unit 812 may be configured to output a phase difference [Delta] [theta] _c in accordance with the reference table may be configured to output a phase difference [Delta] [theta] _c by the function calculation.

In the process of FIG. 17, the phase difference Δθ _c means the shift width of the carrier wave phase. As described with reference to FIG. 16, the shift width of the carrier wave phase between each phase causes a noise problem in relation to the modulation factor. Therefore, it is desirable that the shift width of the carrier phase is minimized. It is also conceivable to provide an operation mode and control the shift width of the carrier wave phase by switching the operation mode. However, in the configuration of switching the operation mode, there is a concern that torque shock may occur. Therefore, in the first embodiment, the shift width of the carrier wave phase is continuously changed, and the shift width of the carrier wave phase is gradually reduced as the motor frequency increases.

_{The first carrier wave phase θ cu} , the second carrier wave phase θ _cv, and the third carrier wave phase θ _cw calculated by the phase calculation unit 81 are input to the carrier wave output unit 82. Carrier wave output unit 82 generates and outputs a U-phase carrier c _u using a first carrier phase theta _cu. Carrier wave output unit 82 generates a V-phase carrier c _v outputs using a second carrier phase theta _cv. Carrier wave output unit 82 generates a W-phase carrier c _w to output using the third carrier phase theta _cw.

As described above, the phase calculation unit 81 calculates the first carrier phase theta _cu, second carrier phase theta _cv and third carrier phase theta _cw based on the carrier frequency command f _c and the motor frequency. Further, the carrier wave output unit 82, the first carrier phase theta _cu, second carrier phase theta _cv and third is the carrier of the three-phase based on the carrier phase theta _cw U-phase carrier c _u, V-phase carrier c _{The v} and W phase carrier waves c _w are output. According to the carrier wave generation unit 8 configured in this way, it is possible to achieve both the suppression of common mode noise in the low speed range and the suppression of noise in the medium to high speed range. In addition, control that does not cause torque shock in the mode transition can be realized.

In FIG. 17, the phase difference between the first carrier wave phase θ _cu and the second carrier wave phase θ _cv and the phase difference between the first carrier wave phase θ _cu and the third carrier wave phase θ _cw. Are configured to be equal, but their phase differences may be different. Essential point is that the first carrier phase theta _cu, the second carrier phase theta _cv and third carrier phase theta _cw have a phase difference from each other, the phase difference changes in response to changes in the motor frequency It is in. If this point is ensured, it is possible to obtain the effect of the first embodiment described here.

Further, the carrier wave generation unit 8 shown in FIG. 17 may be configured as shown in FIG. FIG. 18 is a diagram showing a configuration example of the carrier wave generation unit 8A according to the modified example of the first embodiment. In the carrier wave generation unit 8A shown in FIG. 18, the phase calculation unit 81 is replaced with the phase calculation unit 81A in the configuration of the carrier wave generation unit 8 shown in FIG. Further, in the phase calculation unit 81A,

integrators

815 and 816 are added in the configuration of the phase calculation unit 81 shown in FIG. Other configurations are the same as those of the phase calculation unit 81 shown in FIG. 17, and the same reference numerals are given to the equivalent components, and duplicate description will be omitted.

In FIG. 18, the input carrier frequency command f _c is the carrier frequency command of each phase inside the phase calculation unit 81A, that is, the U-phase carrier frequency command f _cu , the V-phase carrier frequency command f _cv , and the W-phase carrier frequency command. It is configured to be branched into three as f _cw and input to individual integrators provided for each phase. Since the signals input to the

integrators

811, 815, and 816 are the same, the operation equivalent to that in FIG. 17 is performed.

As described above, the inverter control device according to the first embodiment includes a carrier wave generation unit that generates a three-phase carrier wave, and the carrier wave generation unit is the first to third based on the carrier wave frequency command and the electric motor frequency. Calculate the carrier phase of. The first to third carrier phases have a phase difference from each other, and this phase difference changes continuously according to a change in the motor frequency. Thereby, the common mode voltage generated by the PWM control signal can be reduced. As a result, the leakage current that can flow through the stray capacitance can be reduced, so that leakage noise can be suppressed without relying on the addition of filter components.

It is desirable that the second and third carrier phases each have a phase difference having the opposite sign and the same magnitude with respect to the first carrier phase. In this way, it is possible to enhance the effect of reducing common mode noise.

Further, when the motor frequency is zero, it is desirable that the mutual phase difference between the first to third carrier phases is 120 °. By doing so, it is possible to further enhance the effect of reducing common mode noise.

Next, the hardware configuration for realizing the function of the inverter control device 5 in the first embodiment will be described with reference to the drawings of FIGS. 19 and 20. FIG. 19 is a block diagram showing an example of a hardware configuration that realizes the function of the inverter control device 5 according to the first embodiment. FIG. 20 is a block diagram showing another example of a hardware configuration that realizes the function of the inverter control device 5 according to the first embodiment.

When a part or all of the functions of the inverter control device 5 according to the first embodiment are realized, as shown in FIG. 20, the processor 200 that performs the calculation and the memory 202 in which the program read by the processor 200 is stored. , And the interface 204 for inputting and outputting signals can be included.

The processor 200 may be a computing means such as an arithmetic unit, a microprocessor, a microcomputer, a CPU (Central Processing Unit), or a DSP (Digital Signal Processor). Further, the memory 202 includes a non-volatile or volatile semiconductor memory such as a RAM (Random Access Memory), a ROM (Read Only Memory), a flash memory, an EPROM (Erasable Program ROM), and an EEPROM (registered trademark) (Electrically EPROM). Examples thereof include magnetic disks, flexible disks, optical disks, compact disks, mini disks, and DVDs (Digital Versailles Disc).

The memory 202 stores a program that executes the function of the inverter control device 5 according to the first embodiment. The processor 200 sends and receives necessary information via the interface 204, the processor 200 executes a program stored in the memory 202, and the processor 200 refers to a table stored in the memory 202 to perform the above-described processing. It can be carried out. The calculation result by the processor 200 can be stored in the memory 202.

Further, when a part of the functions of the inverter control device 5 in the first embodiment is realized, the processing circuit 203 shown in FIG. 24 can also be used. The processing circuit 203 corresponds to a single circuit, a composite circuit, an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a combination thereof. The information input to the processing circuit 203 and the information output from the processing circuit 203 can be obtained via the interface 204.

Note that some processing in the inverter control device 5 may be performed by the processing circuit 203, and processing that is not performed by the processing circuit 203 may be performed by the processor 200 and the memory 202.

Embodiment 2.
FIG. 21 is a diagram showing a configuration example of the carrier wave generation unit 8B according to the second embodiment. In the carrier wave generation unit 8B shown in FIG. 21, in the configuration of the carrier wave generation unit 8 shown in FIG. 17, a frequency modulation unit 83 and an adder 84 are provided in front of the phase calculation unit 81. The frequency modulation unit 83 is provided for noise reduction.

The frequency modulation unit 83 includes a random number generator 831 and an amplifier 832. The adder 84 is configured to input the basic carrier frequency command f _c0 and the output of the frequency modulation unit 83. Other configurations are the same as those of the phase calculation unit 81 shown in FIG. 17, and the same reference numerals are given to the equivalent components, and duplicate description will be omitted.

In FIG. 21, in the frequency modulation unit 83, a gain is applied by the amplifier 832 to the output of the random number generator 831. The output of the amplifier 832 is input to the adder 84 as the frequency modulation amount Delta] f _c. Frequency modulation unit 83 is a component that performs so-called random modulation, calculates the amount of frequency modulation Delta] f _c on the basis of the output of the random number generator 831. The adder 84 adds the carrier frequency command f _c and the frequency modulation amount Δf _c, and outputs the addition result to the phase calculation unit 81 as a new carrier frequency command f _c1.

According to the carrier generating unit 8B shown in Figure 21, the frequency modulation amount Delta] f _c is generated based on the random number generated by the random number generator 831. Then, the generated amount of frequency modulation Delta] f _c is added to a common carrier frequency instruction f _c in each phase. Therefore, even if there is a phase difference between each carrier, all carriers are frequency modulated based on a random number generated from a single seed. As a result, the carrier waves of each phase are frequency-modulated while maintaining a state in which the waveforms maintain a phase difference from each other. Therefore, it is possible to suppress deterioration of the common mode noise reduction effect.

As described above, according to the inverter control device according to the second embodiment, the carrier wave generator calculates the frequency modulation amount based on the output of the random number generator, and inputs the calculated frequency modulation amount to the phase calculation unit. Add to all carrier frequency commands that are issued. This makes it possible to reduce noise while suppressing deterioration of the common mode noise reduction effect.

Embodiment 3.
FIG. 22 is a diagram showing a configuration example of the carrier wave generation unit 8C according to the third embodiment. In the carrier wave generation unit 8C shown in FIG. 22, in the configuration of the carrier wave generation unit 8A shown in FIG. 18, a frequency modulation unit 85 is provided in front of the phase calculation unit 81A, and the phase calculation unit 81A is replaced with the phase calculation unit 81B. Has been done. In the phase calculation unit 81B shown in FIG. 22,

adders

817a, 817b, and 817c are added to the preceding stages of the integrators 811,815,816 in the configuration of the phase calculation unit 81A shown in FIG. The frequency modulation unit 85 is provided in order to effectively reduce noise as compared with the frequency modulation unit 83 of the second embodiment shown in FIG. Other configurations are the same as those of the carrier wave generation unit 8A shown in FIG. 18, and the same components are designated by the same reference numerals and duplicate description will be omitted.

FIG. 23 is a diagram showing a detailed configuration of the frequency modulation unit 85 shown in FIG. 22. The frequency modulation unit 85 includes a list 851, an order control unit 852, and switching

units

853a, 853b, 853c. The frequency values of a plurality of data points are stored in the list 851. More particularly, the list 851, -f _L or more and + _{f H} have the following values frequency values of arbitrarily chosen by n + 1 points _{_{_{f i (f_ 0, f_ 1}}} , ..., f_ n) Is stored. n + 1 is the number of data points. n, f _L , and f _H are arbitrary set values. Desirably, f _L = f _H. Further, that the frequency values f _i of the n + 1 points are equally spaced, i.e., when the frequency value f _i are arranged in ascending or descending order, it is desirable that the difference between adjacent frequency values f _i are all such values. Further, in FIG. 23, _{although it is shown that n, f L} , and f _H are applied from the outside of the frequency modulation unit 85, the configuration may be set inside the frequency modulation unit 85.

The sequence control unit 852 controls the switching

units

853a, 853b, and 853c to randomly select one element from each element stored in the list 851 without duplication, and selects the selected element as the first frequency modulation amount Δf _cu. outputs a second amount of frequency modulation Delta] f _cv, and a third frequency modulation amount Delta] f _cw. After selecting all the elements in the list 851, the elements in the list are selected in a random order different from the previous one, and this selection operation is repeated.

From the frequency modulation unit 85, the elements selected one by one from each element stored in the list 851 in a random first order without duplication are _{output as the first frequency modulation amount Δf cu, and} are output to the adder 817a. Entered. Further, the frequency modulation unit 85 outputs elements selected one by one from each element stored in the list 851 in a random second order without duplication as a second frequency modulation amount Δf _cv , and is an adder. It is input to 817b. Further, the frequency modulation unit 85 outputs elements selected one by one from each element stored in the list 851 in a random third order without duplication as a third frequency modulation amount Δf _cw , and is an adder. It is input to 817c.

In FIG. 22, in the adder 817a, the carrier frequency command f _c and the first frequency modulation amount Δf _cu are added, and the addition result is input to the integrator 811 as the _{U-phase carrier frequency command f cu.} The adder 817b, is added to the carrier frequency command _{f c} and a second amount of frequency modulation Delta] f _cv, the addition result is input to the integrator 815 as V-phase carrier frequency command _{f cv.} In the adder 817c, the carrier frequency command f _c and the third frequency modulation amount Δf _cw are added, and the addition result is input to the integrator 816 as the _{W phase carrier frequency command f cw.} Subsequent operations are as described above, and description thereof will be omitted here.

Figure 24 is a diagram showing an output image of the frequency modulation amount Delta] f _c which is output from the frequency modulating unit 85 shown in FIG. 23. Frequency modulation amount Delta] f _c represents any of the first amount of frequency modulation Delta] f _cu, the second frequency modulation amount Delta] f _cv and third frequency modulation amount Delta] f _cw. In the upper part of FIG. 24, the frequency modulation amount Δf _c output from the frequency modulation unit 85 is a sequence {f _xi } = {f _x0 , f _x1 , f _x2 , ..., F _xn } (i = 0, 1). , 2, ..., N). Further, in the lower part of FIG. 24, the _{time when each element of the sequence {fx} } is output is shown. The output time of each element may be rephrased as the time required for switching the output. According to FIG. 24, the output time of the element _{f xi} is the reciprocal of the element _{f xi.} That is, the time from the selection of the i-th element to the switching to the i + 1-th element is the reciprocal of the i-th element. _{In Listing 851, assuming} that the time from the output of the first element to the output of the last element is T cyc, the time T _cyc can be expressed by the following equation (1).

Frequency modulation amount Delta] f _c is different for each phase, are different only order in which the elements are selected from the list 851. Therefore, no matter what order the elements stored in the list 851 are selected, the time T _cyc required to complete the selection of all the elements in the list 851 is always equal. That is, the carrier frequency of each phase is modulated by a different random number, but the carrier phase difference returns to the set value every _{time T cyc.} Therefore, if the frequency modulation unit 85 according to the third embodiment is used, it is possible to achieve both reduction of common mode noise and improvement of audibility. Specifically, the smaller the number of data points n + 1 and the narrower the range of the frequency value stored in the list 851, the priority is given to the effect of reducing common mode noise. On the contrary, the larger the number of data points n + 1 and the wider the range of the frequency value stored in the list 851, the more priority is given to the improvement of the hearing sensation.

As described above, according to the inverter control device according to the third embodiment, carrier wave generating unit comprises a first amount of frequency modulation Delta] f _cu, the second frequency modulation amount Delta] f _cv and third frequency-modulated amount Delta] f _cw It is provided with a frequency modulator that outputs. The first frequency modulation amount Δf _cu is an element selected one by one from each element stored in the list of first phases in a random first order without duplication. Further, the second frequency modulation amount Δf _cv is an element selected one by one from each element stored in the list of the second phase in a random second order without duplication. The third frequency modulation amount Δf _cw is an element selected one by one from each element stored in the list of the third phase in a random third order without duplication. The first frequency modulation amount Δf _cu , the second frequency modulation amount Δf _cv, and the third frequency modulation amount Δf _cw are added one-to-one with respect to the carrier frequency command. Further, when these first frequency modulation amount Δf _cu , second frequency modulation amount Δf _cv and third frequency modulation amount Δf _cw are selected from the list of each phase and output, the i-th element is selected. The time from being performed until switching to the i + 1th element is the reciprocal of the i-th element. As a result, it is possible to achieve both reduction of common mode noise and improvement of hearing sensation.

The number of data points in the list of each phase may be changed according to the motor frequency. Further, when the minimum value of the element stored in the list of each phase is set as the first value and the maximum value is set as the second value, at least one of these first and second values is the motor frequency. It may be changed according to. By changing the number of data points, the first value, or the second value according to the motor frequency, it is possible to control according to the priority between the effect of reducing common mode noise and the degree of improvement in hearing sensation.

Further, it is desirable that the first value and the second value in the list of each phase have the same absolute value and different signs, and each element in the list has values at equal intervals. With this setting, it is possible to control according to the priority between the reduction of common mode noise and the improvement of hearing without changing the total amount of switching loss generated in the inverter 4.

The configuration shown in the above embodiments is an example, and can be combined with another known technique, can be combined with each other, and deviates from the gist. It is also possible to omit or change a part of the configuration as long as it is not.

For example, the inverter control device has been described as a device included inside the motor drive device, but the present invention is not limited to this. As long as the inverter control device and the inverter are electrically connected, the inverter control device may be configured as a device outside the motor drive device.

1 Electric drive device, 2 Filter reactor, 3 Filter capacitor, 4 Inverter, 5 Inverter control device, 6 Voltage command calculation unit, 7 PWM control unit, 8,8A, 8B, 8C carrier generator, 26U U phase voltage command, 26V V-phase voltage command, 26W W-phase voltage command, 28 carrier, 28U U-phase carrier, 28V V-phase carrier, 28W W-phase carrier, 31 reference potential, 32 neutral point potential, 33U U-phase voltage, 33V V-phase voltage, 33W W phase voltage, 34 stray capacitance, 35 leakage current, 81, 81A, 81B phase calculation unit, 82 carrier output unit, 83, 85 frequency modulation unit, 84,814,817a, 817b, 817c adder, 101 overhead wire, 102 collection Electric device, 103 wheels, 104 rails, 105 electric motor, 200 processor, 202 memory, 203 processing circuit, 204 interface, 811,815,816 integrator, 812 phase difference calculation unit, 813 subtractor, 831 random number generator, 832 amplifier , 851 list, 852 order control unit, 853a, 853b, 853c switching unit, N negative side terminal, P positive side terminal, UNI, UPI, VNI, VPI, WNI, WPI semiconductor element.

Claims

An inverter control device that controls an inverter that drives a three-phase motor by pulse width modulation.
A carrier wave generator that generates a three-phase carrier wave,
A pulse width modulation control unit that controls the switching state of the inverter by comparing the carrier wave with the modulated wave is provided.
The carrier wave generator
A phase calculation unit that calculates the first to third carrier phases based on the carrier frequency command and the motor frequency,
A carrier output unit for outputting the three-phase carrier based on the first to third carrier phases is provided.
The first to third carrier phases have a phase difference from each other and
An inverter control device characterized in that the phase difference also changes continuously in response to a change in the motor frequency.
The inverter control device according to claim 1, wherein each of the second and third carrier phases has a phase difference having the opposite sign and the same magnitude with respect to the first carrier phase.
The inverter control device according to claim 2, wherein the phase difference is 120 ° when the motor frequency is zero.
The carrier wave generation unit includes a frequency modulation unit that calculates a frequency modulation amount based on the output of a random number generator, and adds the frequency modulation amount to all the carrier wave frequency commands input to the phase calculation unit. The inverter control device according to any one of claims 1 to 3, wherein the inverter control device is characterized.
The carrier wave generation unit includes a frequency modulation unit that calculates the first to third frequency modulation amounts.
The frequency modulator includes a list in which frequency values of a plurality of data points are stored.
Each element stored in the list is greater than or equal to the first value and less than or equal to the second value.
Elements selected one by one from each element stored in the list in a random first order without duplication are output as the first frequency modulation amount.
The elements selected one by one from each element stored in the list in a second order without duplication are output as the second frequency modulation amount.
Elements selected one by one from each element stored in the list in a random third order without duplication are output as the third frequency modulation amount.
When the number of data points is n + 1 and i is an integer of 1 or more and n or less,
The time from the selection of the i-th element to the switching to the i + 1-th element is the reciprocal of the i-th element.
The inverter control device according to any one of claims 1 to 3, wherein the first to third frequency modulation amounts are added one-to-one to the carrier frequency command.
The inverter control device according to claim 5, wherein the number of data points in the list is changed according to the frequency of the motor.
The inverter control device according to claim 5 or 6, wherein at least one of the first value and the second value is changed according to the motor frequency.
Any of claims 5 to 7, wherein the first value and the second value in the list have equal absolute values and different signs, and each element in the list has values at equal intervals. The inverter control device according to item 1.
The inverter control device according to any one of claims 1 to 8.
The inverter controlled by the inverter control device and
Motor drive device equipped with.