WO2021142881A1 - 显示背板、显示设备以及拼接显示设备 - Google Patents

显示背板、显示设备以及拼接显示设备 Download PDF

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Publication number
WO2021142881A1
WO2021142881A1 PCT/CN2020/076062 CN2020076062W WO2021142881A1 WO 2021142881 A1 WO2021142881 A1 WO 2021142881A1 CN 2020076062 W CN2020076062 W CN 2020076062W WO 2021142881 A1 WO2021142881 A1 WO 2021142881A1
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WO
WIPO (PCT)
Prior art keywords
area
sub
display
backplane
region
Prior art date
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PCT/CN2020/076062
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English (en)
French (fr)
Inventor
王英琪
陈柏辅
曹江
刘政明
Original Assignee
重庆康佳光电技术研究院有限公司
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Application filed by 重庆康佳光电技术研究院有限公司 filed Critical 重庆康佳光电技术研究院有限公司
Priority to US17/256,580 priority Critical patent/US20220344555A1/en
Publication of WO2021142881A1 publication Critical patent/WO2021142881A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
    • G09F9/3026—Video wall, i.e. stackable semiconductor matrix display modules
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the invention relates to the technical field of displays, in particular to a display backplane, a display device and a splicing display device.
  • the backplane of an LED display includes several pixel areas, and each pixel point in the pixel area includes a red LED, a blue LED, and a green LED.
  • the RGB pixel area is the display area, and the area on both sides outside the display area is the boundary area. Since the LED driver is driven by each LED individually and there are thousands of data lines, the width of the boundary area is relatively wide, resulting in a display The boundary will be huge.
  • the border of the display will affect the splicing effect, thereby further affecting the display effect.
  • the present invention provides a display backplane.
  • the display backplane includes a backplane, a plurality of micro light-emitting diodes arranged on the backplane and arranged in a matrix, a plug-in circuit board at one end of the backplane, and a number of electrical connection with the micro light-emitting diodes in a one-to-one correspondence.
  • a signal line, the plurality of signal lines are electrically connected to the plug-in circuit board, the backplane includes a front surface and a back surface opposite to the front surface; the plurality of miniature light emitting diodes are provided and located in the light emitting area of the front surface ; The first wiring area and the second wiring area located on opposite sides of the light-emitting area, and the third wiring area located on one side of the light-emitting area and between the opposite sides, the third The routing area is located between the first routing area and the second routing area; the plurality of signal lines include a first signal line and a second signal line, and the first signal line runs from the first The wiring area and the second wiring area are routed and are electrically connected to the plug-in circuit board through the third wiring area, and the second signal line is from the first wiring area and the second wiring area.
  • the wiring area is arranged around the third wiring area along the back surface, and the wiring is routed from the third wiring area and electrically connected to the plug-in circuit board.
  • the present invention provides a display device, the display device including a housing and the above-mentioned display backplane arranged in the housing.
  • the present invention provides a spliced display device.
  • the spliced display device includes a housing and a plurality of the above-mentioned display backplanes arranged in the housing, and the plurality of display backplanes are spliced together.
  • the first signal line is routed from the first wiring area and the second wiring area and is electrically connected to the plug-in circuit board
  • the second signal line is routed from the first The wire area and the second wire area are wound around the third wire area along the back surface.
  • FIG. 1 is a schematic diagram of the display backplane of the first embodiment of the present invention.
  • FIG. 2 is a schematic diagram of the display backplane of the second embodiment of the present invention.
  • FIG. 3 is a schematic diagram of the display backplane of the third embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the display backplane of the fourth embodiment of the present invention.
  • FIG. 5 is a schematic diagram of the display backplane of the fifth embodiment of the present invention.
  • FIG. 6 is a schematic diagram of the display backplane of the sixth embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a display device using the display backplane in the first embodiment of the present invention.
  • Fig. 8 is a schematic diagram of a spliced display device using a display device in the first embodiment of the present invention.
  • FIG. 1 is a schematic diagram of the display backplane 6 of the first embodiment.
  • the display backplane 6 includes a backplane 1, a plurality of miniature light-emitting diodes 111 arranged on the backplane 1, a plug-in circuit board 2 located at one end of the backplane 1, and a number of signal lines electrically connected to the plurality of miniature light-emitting diodes 111 in a one-to-one correspondence.
  • the back plate 1 includes a front surface 88 and a back surface opposite to the front surface 88 (not shown in the figure).
  • the front surface 88 includes a light-emitting area 11 where a number of light-emitting diodes are installed.
  • the areas located on opposite sides of the light-emitting area 11 are respectively a first wiring area 12 and a second wiring area 13, which are located on one side of the light-emitting area 11 and located on opposite sides.
  • the area between is the third wiring area 14.
  • the third wiring area 14 is located between the first wiring area 12 and the second wiring area 13.
  • miniature light emitting diodes 111 are arranged in a matrix.
  • the number of the micro light emitting diodes 111 can be determined according to the size of the micro light emitting diodes 111 and the size of the back plate 1.
  • the size of a single micro light emitting diode 111 is 20 microns
  • the distance between two adjacent micro light emitting diodes 111 is 20 microns
  • the length of the light emitting area 11 on the front surface 88 is 50 cm
  • the width is 32 cm
  • the light emitting area The area of 11 is 1600 square centimeters.
  • Each miniature light emitting diode 111 is provided with two signal wires 3, so there are 80 million signal wires 3.
  • the plug-in circuit board 2 is located at an end of the third wiring area 14 away from the light-emitting area 11, and the plug-in circuit board 2 is electrically connected to the signal line 3 of the micro light-emitting diode 111.
  • a driving circuit board 100 is connected to one end of the plug-in circuit board 2 away from the light-emitting area 11. The driving circuit board 100 is used to control the micro light emitting diode 111.
  • the plug-in circuit board 2 is a flexible circuit board for plugging the display backplane 6 and the driving circuit board 100 together.
  • the plurality of signal lines 3 include a first signal line 31 and a second signal line 32.
  • the first signal line 31 is routed from the first wiring area 12 and the second wiring area 13 and electrically connected to the plug-in circuit board 2.
  • the second signal line 32 is routed from the first wiring area 12 and the second wiring area 13 to the third wiring area 14 along the back surface, and is routed from the third wiring area 14 and connected to the circuit board 2 Electric connection.
  • the number of signal lines is set according to actual requirements, and there is no specific limitation here.
  • the areas of the first wiring area 12 and the second wiring area 13 are the same.
  • the length of the first wiring area 12 and the second wiring area 13 is 32 cm, and the width is 2 cm. Therefore, the areas of the first wiring area 12 and the second wiring area 13 are both 64 square centimeters.
  • the first wiring area 12 includes a first sub-area 121 and a second sub-area 122, the first sub-area 121 is close to the plug-in circuit board 2 side, and the second sub-area 122 is away from the plug-in circuit board 2 side. , And the first sub-region 121 and the second sub-region 122 are connected.
  • the second wiring area 13 includes a third sub-area 131 and a fourth sub-area 132, the third sub-area 131 is close to the plug-in circuit board 2 side, the fourth sub-area 132 is far away from the plug-in circuit board 2, and the third sub-area The sub-region 131 and the fourth sub-region 132 are connected.
  • the first signal line 31 is distributed to the first sub-region 121 and the third sub-region 131.
  • the second signal line 32 is arranged in the second sub-area 122 and the fourth sub-area 132, and is wound from the second sub-area 122 and the fourth sub-area 132 to the back surface.
  • the second sub-region 122 and the fourth sub-region 132 are both provided with the first contact 4, and the first contact 4 in the second sub-region 122 and the first contact 4 in the fourth sub-region 132 are respectively located far away from the The second sub-region 122 and the fourth sub-region 132 are away from the side of the light-emitting area 11.
  • the second signal line 32 is transferred from the first contact 4 to the back side.
  • the first sub-area 121 and the third sub-area 131 are both provided with a second contact 5, and the second contact 5 is close to the side of the plug-in circuit board 2.
  • the second signal line 32 is provided on the front surface 88 from the back side through the second contact 5.
  • the first contact 4 is the adhesive layer 41
  • the second signal lines 32 in the second sub-region 122 and the fourth sub-region 132 are made into gold fingers, and the gold fingers are connected to the adhesive layer 41.
  • the second signal line 32 is turned over to the back surface through the adhesive layer 41 and is attached to the back surface.
  • the end of the second signal line 32 from the first sub-area 121 and the third sub-area 131 away from the second sub-area 122 and the fourth sub-area 132 is wound on the front surface 88, and is routed to the third wiring area 14 and the insertion area.
  • the circuit board 2 is electrically connected.
  • the first signal line 31 is routed to the first sub-region 121 and the third sub-region 131 respectively.
  • the first signal lines 31 of the first sub-area 121 and the third sub-area 131 are routed from the front surface 88 to the third wiring area 14, and are electrically connected to the plug-in circuit board 2.
  • the second signal lines 32 of the second sub-area 122 and the fourth sub-area 132 are wound on the back surface, thereby reducing the second sub-area 122 and the fourth sub-area 132 from the front surface 88.
  • the width of the first wiring area 12 and the second wiring area 13 can be set smaller. Further, the frame of the display backplane can be reduced, thereby improving the display effect.
  • the gold finger may be, but not limited to, a material with copper as the main component.
  • the gold finger may also be made of gold plating.
  • FIG. 2 is the display backplane 61 of the second embodiment.
  • the difference between the display backplane 6 of the second embodiment and the display backplane 6 of the first embodiment is that all the signal lines 3 of the second sub-region 122 and the fourth sub-region 132 correspond to the first conductive holes 42 one-to-one. All the signal lines 3 in the second sub-region 122 and the fourth sub-region 132 pass through the back surface through the second contact 5, and the first contact 4 is a second conductive hole 51 corresponding to the back signal line 3 one-to-one.
  • the signal line 3 on the back side passes through the front surface 88 through the second conductive hole 51 and is connected to the third wiring area 14, and is electrically connected to the plug-in circuit board 2. All the signal lines 3 of the first sub-region 121 and the third sub-region 131 are only routed from the front surface 88 to the third wiring region 14 and are electrically connected to the plug-in circuit board 2.
  • both the first conductive hole 42 and the second conductive hole 51 are filled with conductive material.
  • the conductive material may be, but is not limited to, a material whose main component is metal.
  • the conductive material may also be: metal elements, alloys (copper alloys, aluminum alloys, etc.), composite metals, and other special-purpose conductive materials that do not take conductivity as the main function.
  • Commonly used conductive fillers include nickel-coated graphite powder, nickel-coated carbon fiber carbon black, metal powder, metal foil, metal fiber, carbon fiber and so on.
  • the electrical properties of conductive materials are mainly characterized by resistivity. The factors that affect the resistivity include temperature, impurity content, cold deformation, heat treatment and so on. The effect of temperature is often expressed by the temperature coefficient of the resistivity of conductive materials. Except close to the melting point and ultra-low temperature, in the general temperature range, the electrical resistivity has a linear relationship with temperature.
  • the first conductive hole 42 and the second conductive hole 51 may be, but not limited to, conductive holes made by etching or laser, and the first conductive hole 42 and the second conductive hole 51 are filled with conductive material .
  • the front surface 88 and the back surface are electrically connected through the first conductive hole 42 and the second conductive hole 51.
  • the conductive material may be, but is not limited to, a material whose main component is metal.
  • the conductive material may also be an alloy material, a composite metal material, and a conductive material with special functions.
  • the electrical properties of conductive materials are mainly characterized by resistivity. The factors that affect the resistivity include temperature, impurity content, cold deformation, heat treatment and so on. The effect of temperature is often expressed by the temperature coefficient of the resistivity of conductive materials. Except close to the melting point and ultra-low temperature, in the general temperature range, the electrical resistivity has a linear relationship with temperature.
  • FIG. 3 is a schematic diagram of the display backplane of the third embodiment.
  • the difference between the display backplane 6 of the third embodiment and the first embodiment is that the second contact 5 is close to the side of the plug-in circuit board 2.
  • the second sub-region 122 and the fourth sub-region 132 are both provided with the first contact 4, and the first contact 4 in the second sub-region 122 is located on the side away from the first sub-region 121.
  • the first contact 4 in the fourth sub-region 132 is located on the side away from the third sub-region 131, and the second signal line 32 is transferred from the first contact 4 to the back surface.
  • the second signal line 32 in the second sub-area 122 and the fourth sub-area 132 is wound on the back side from the side far away from the plug-in circuit board 2, and there is no need to route wires from the first sub-area 121 and the first sub-area 121 and the second sub-area.
  • the three sub-regions 131 can further make the widths of the first wiring area 12 and the second wiring area 13 smaller. Further, the frame of the display backplane can be reduced, thereby improving the display effect.
  • FIG. 4 is a schematic diagram of the display backplane 63 of the fourth embodiment.
  • the difference between the display backplane 63 of the fourth embodiment and the display backplane 6 of the first embodiment is that the second signal lines 32 in the second sub-area 122 and the fourth sub-area 132 are wound on the back, and are separated from the first sub-area.
  • One end of the area 121 and the third sub-area 131 away from the second sub-area 122 and the fourth sub-area 132 is wound around the front surface 88 and is routed to the third wiring area 14 and electrically connected to the plug-in circuit board 2.
  • the first signal line 31 in the first sub-area 121 and the third sub-area 131 is routed from the front surface 88 to the third wiring area 14, and is electrically connected to the plug-in circuit board 2.
  • both the first contact 4 and the second contact 5 are arranged as an adhesive layer 41.
  • FIG. 5 is a schematic diagram of the display back plate 64 of the fifth embodiment.
  • the difference between the display backplane 64 of the fifth embodiment and the display backplane 63 of the fourth embodiment is that the first contact 4 is the third conductive hole 43 corresponding to the back signal line 3 one-to-one.
  • the third conductive hole 43 and the first conductive hole 42 are the same conductive hole, and the other parts are the same as the fourth embodiment, which will not be repeated here.
  • FIG. 6 is a schematic diagram of the display back plate 65 of the sixth embodiment.
  • the difference between the display backplane 65 of the sixth embodiment and the display backplane 63 of the fourth embodiment is that the second contact 5 is a fourth conductive hole 52 corresponding to the back signal line 3 one-to-one.
  • the fourth conductive hole 52 is filled with conductive material, and the conductive material in the fourth conductive hole 52 is the same as the conductive material in the second conductive hole 51.
  • the signal line 3 on the back side passes through the front surface 88 through the fourth conductive hole 52, and is routed to the third wiring area 14 and electrically connected to the plug-in circuit board 2.
  • the first sub-region 121, the second sub-region 122, the third sub-region 131, and the fourth sub-region 132 have the same size and are arranged in the first sub-region 121, the second sub-region 122, and the third sub-region.
  • the number of signal lines in 131 and the fourth sub-region 132 is the same.
  • the number of signal lines arranged in the second sub-region 122 and the fourth sub-region 132 may be larger than the number in the first sub-region 121 and the second sub-region 122.
  • the number of the second sub-region 122 and the fourth sub-region 132 is equal, and the signal lines of the second sub-region 122 and the fourth sub-region 132 account for 2/3, 3/4, etc. of all signal lines, which are not limited here.
  • the widths of the first sub-region 121 and the second sub-region 122 are the same, and the widths in the third sub-region 131 and the fourth sub-region 132 are the same, but smaller than those of the first sub-region 121 and the second sub-region.
  • the width of the area 122 The width of the area 122.
  • the signal lines arranged in the first sub-region 121 and the third sub-region 131 account for 2/3, 3/4, etc. of all signal lines. It is understandable that the signal line of each area can be set according to the actual situation, and is not limited to the above examples.
  • FIG. 7 is a schematic diagram of the display device 7 using the above-mentioned display backplane in the first embodiment.
  • the display device 7 includes a display back plate 6 (for example, the display back plate 6 may be a display back plate 61, a display back plate 62, a display back plate 63, a display back plate 64 and/or a display back plate 65) and a fixed display back plate 6 It is understood that the display device 7 has a display function.
  • the display device 7 includes, but is not limited to, a monitor, a television, a computer, a notebook computer, a tablet computer, a wearable device, and the like.
  • the above-mentioned display device 7 adopts the above-mentioned display backplane 6, and due to the wiring method in the display backplane 6, the utilization rate of the backplane 1 is improved, so that the first wiring area 12 and the second wiring area 13 are reduced, and further Therefore, the frame of the display device 7 can be made smaller. And does not affect the display effect.
  • FIG. 8 is a schematic diagram of the spliced display device 8 using the display device 7 in the first embodiment.
  • a spliced display device 8 where multiple display backplanes 6 (for example, display backplane 6 may be display backplane 61, display backplane 62, display backplane 63, display backplane 64, and/or display backplane 65) spliced together,
  • the display backplanes 6 in the spliced display device 8 can be two, three, four, etc., which are not limited here. The more the number of display backplanes 6 is, the larger the display area of the spliced display device 8 is. Since the spliced display device 8 adopts the display backplane 6 described above, the boundary of the display device 7 can be reduced, so that the display effect of the display device 7 is better.

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Abstract

一种显示背板（6）、显示设备以及拼接显示设备，显示背板（6）包括背板（1）、设置于背板（1）且呈矩阵排列的若干微型发光二极管（111）、插接电路板（2）、若干信号线（3）。若干信号线（3）电连接于插接电路板（2）。背板（1）包括正面和与正面背相的背面。设置有若干微型发光二极管（111）且位于正面的发光区（11），位于发光区（11）相对两侧的第一走线区（12）和第二走线区（13），以及位于发光区（11）一侧且在相对两侧之间的第三走线区（14）。若干信号线（3）包括第一信号线（31）和第二信号线（32），第一信号线（31）从第一走线区（12）和第二走线区（13）走线并通过第三走线区（14）与插接电路板（2）电连接，第二信号线（32）自第一走线区（12）和第二走线区（13）沿着背面绕设于第三走线区（14），且从第三走线区（14）进行走线并与插接电路板（2）电连接。

Description

显示背板、显示设备以及拼接显示设备 技术领域
本发明涉及显示器技术领域，尤其涉及一种显示背板、显示设备以及拼接显示设备。
 背景技术
在现有技术中，LED显示器背板上包括了若干像素区域，像素区域内的每个像素点包括有红色LED、蓝色LED和绿色LED。该RGB像素区域为显示区域，显示区域以外的两侧区域为边界区域，由于LED驱动是每一颗LED单独电流驱动且数据线多达成千上万根，所以边界区域宽度较宽，从而导致显示器的边界会很大。
当要做显示屏拼接时，显示器的边界会影响拼接效果，从而进一步影响显示效果。
 技术问题
有鉴于此，有必要提供一种显示背板、显示设备以及拼接显示设备，可以减小显示设备边界，使得显示设备的显示效果更好。
 技术解决方案
为解决上述技术问题，本发明的技术方案为：
第一方面，本发明提供一种显示背板。该显示背板包括背板、设置于所述背板且呈矩阵排列若干微型发光二极管、位于所述背板一端的插接电路板、与所述若干微型发光二极管一一对应电性连接的若干信号线，所述若干信号线电连接于所述插接电路板，所述背板包括正面和与所述正面背相的背面；设置有所述若干微型发光二极管且位于所述正面的发光区；位于所述发光区相对两侧的第一走线区和第二走线区，以及位于所述发光区一侧且在所述相对两侧之间的第三走线区，所述第三走线区位于所述第一走线区和所述第二走线区之间；所述若干信号线包括第一信号线和第二信号线，所述第一信号线从所述第一走线区和所述第二走线区走线并通过所述第三走线区与所述插接电路板电连接，所述第二信号线自所述第一走线区和所述第二走线区沿着所述背面绕设于所述第三走线区，且从所述第三走线区进行走线并与所述插接电路板电连接。
第二方面，本发明提供一种显示设备，所述显示设备包括壳体以及设置于所述壳体内的上述显示背板。
第三方面，本发明提供一种拼接显示设备，所述拼接显示设备包括壳体以及设置于所述壳体内的多个上述显示背板，所述多个显示背板拼接在一起。
 有益效果
上述显示背板、显示设备以及拼接显示设备，由于第一信号线从第一走线区和第二走线区走线并与所述插接电路板电连接，第二信号线自第一走线区和第二走线区沿着背面绕设于所述第三走线区。
 附图说明
面将通过参照附图详细描述本发明的示例性实施例，使本领域的普通技术人员更清楚本发明的上述特征和优点，附图中：
图1为本发明中第一实施例的显示背板示意图。
图2为本发明中第二实施例的显示背板示意图。
图3为本发明中第三实施例的显示背板示意图。
图4为本发明中第四实施例的显示背板示意图。
图5为本发明中第五实施例的显示背板示意图。
图6为本发明中第六实施例的显示背板示意图。
图7为本发明中第一实施例应用该显示背板的显示设备示意图。
图8为本发明中第一实施例应用显示设备的拼接显示设备示意图。
 本发明的最佳实施方式
为使得对本发明的内容有更清楚及更准确的理解，现将结合幅图详细说明。说明书附图示出本发明的实施例的示例，其中，相同的标号表示相同的元件。可以理解的是，说明书附图示出的比例并非本发明实际实施的比例，其仅为示意说明为目的，并非依照原尺寸作图。
请参看图1，其为第一实施例的显示背板6示意图。显示背板6包括背板1、设置于背板1的若干微型发光二极管111、位于背板1一端的插接电路板2、以及与若干微型发光二极管111一一对应电性连接的若干信号线3。背板1包括正面88和与正面88背相的背面（图未示）。正面88包括供若干发光二极管安装的发光区11、位于发光区11相对两侧的区域分别为第一走线区12和第二走线区13、位于发光区11一侧且位于相对两侧之间的区域为第三走线区14。其中，第三走线区14位于第一走线区12和第二走线区13之间。
若干微型发光二极管111呈矩阵排列。其中微型发光二极管111的数量可以是根据微型发光二极管111的尺寸以及背板1的尺寸来决定。
举例来说，假设单个微型发光二极管111的尺寸为20微米，相邻俩微型发光二极管111之间的间距为20微米，正面88的发光区11的长度为50厘米，宽度为32厘米，发光区11的面积为1600平方厘米。则发光区11内的微型发光二极管111有4千万个。每个微型发光二极管111设有两根信号线3，则信号线3有8千万根。
应理解，上述仅为示例而非限定。
可选地，插接电路板2位于第三走线区14远离发光区11一端，插接电路板2与微型发光二极管111的信号线3电性连接。插接电路板2远离发光区11一端连接有驱动电路板100。驱动电路板100用于控制微型发光二极管111。
可选地，插接电路板2为柔性电路板，用于将显示背板6与驱动电路板100插接在一起。
若干信号线3包括第一信号线31和第二信号线32，第一信号线31从第一走线区12和第二走线区13走线并与插接电路板2电连接。第二信号线32自第一走线区12和第二走线区13沿着背面绕设于第三走线区14，且从第三走线区14进行走线并与插接电路板2电连接。
可选地，信号线的数量根据实际需求进行设置，在此，不作具体限定。
可选地，第一走线区12和第二走线区13的面积相同。举例来说，假设第一走线区12和第二走线区13的长度为32厘米，宽度为2厘米。则第一走线区12和第二走线区13的面积均为64平方厘米。
应理解，上述举例仅为示例而非限定。
可选地，第一走线区12包括第一子区域121和第二子区域122，第一子区域121靠近插接电路板2一侧，第二子区域122远离插接电路板2一侧，且第一子区域121和第二子区域122相连接。第二走线区13包括第三子区域131和第四子区域132，第三子区域131靠近插接电路板2一侧，第四子区域132远离插接电路板2一侧，且第三子区域131和第四子区域132相连接。具体地，第一信号线31分布至第一子区域121和第三子区域131。第二信号线32布设于第二子区域122和第四子区域132，并自第二子区域122和第四子区域132绕至背面。
第二子区域122和第四子区域132内均设置有第一触点4，第二子区域122内的第一触点4和第四子区域132中的第一触点4分别位于远离第二子区域122和第四子区域132远离发光区11的一侧。第二信号线32从第一触点4转线至背面。第一子区域121和第三子区域131内均设置有第二触点5，且第二触点5靠近插接电路板2一侧。第二信号线32经过第二触点5从背面饶设于正面88。
在本实施例中，第一触点4为粘接层41，第二子区域122和第四子区域132中的第二信号线32制作成金手指，且金手指与粘接层41相连接。第二信号线32通过粘接层41翻转至背面且与背面相贴合。第二信号线32对应的从第一子区域121和第三子区域131远离第二子区域122和第四子区域132一端绕设于正面88，且走线至第三走线区14与插接电路板2电性连接。第一信号线31分别走线至第一子区域121和第三子区域131。第一子区域121和第三子区域131的第一信号线31从正面88走线至第三走线区14，并与插接电路板2电性连接。
在本实施例中，将第二子区域122和第四子区域132的第二信号线32绕设于背面，从而减小第二子区域122和第四子区域132从正面88走线，进而可以使得第一走线区12和第二走线区13的宽度可以设置的更小。进一步地，可以减小显示背板的边框，从而提高显示效果。
可选地，金手指可以为但不限于以铜为主要成分的材料，在一些可行的实施例中，金手指还可以采用镀金制成。
请参看图2，其为第二实施例的显示背板61。第二实施例的显示背板6与第一实施例的显示背板6的差异在于：第二子区域122和第四子区域132的全部信号线3一一对应的第一导电孔42。第二子区域122和第四子区域132的全部信号线3通过第二触点5穿设于背面，且第一触点4为与背面信号线3一一对应的第二导电孔51。背面的信号线3通过第二导电孔51穿设于正面88且连接于第三走线区14，与插接电路板2电性连接。第一子区域121和第三子区域131的全部信号线3仅从正面88走线至第三走线区14，并与插接电路板2电性连接。
可选地，第一导电孔42和第二导电孔51内均填充有导电材料。导电材料可以为但不限于以金属为主要成分的材料。在一些可行的实施例中，导电材料还可以为：金属元素、合金（铜合金、铝合金等）、复合金属以及不以导电为主要功能的其他特殊用途的导电材料。常用的导电填料有镍包石墨粉、镍包碳纤维炭黑、金属粉、金属箔片、金属纤维、碳纤维等。导电材料的电特性主要用电阻率表征。影响电阻率的因素有温度、杂质含量、冷变形、热处理等。温度的影响常以导电材料电阻率的温度系数表示。除接近熔点和超低温以外，在一般温度范围，电阻率随温度变化呈线性关系。
可选地，第一导电孔42和第二导电孔51可以为但不限于以采用刻蚀或者镭射的方式做的导电孔，且第一导电孔42和第二导电孔51内填充有导电材料。使得正面88和背面通过第一导电孔42和第二导电孔51导电连接。
可选地，导电材料可以为但不限于以金属为主要成分的材料，在一些可行的实施例中，导电材料还可以为合金材料、复合金属材料以及特殊功能导电材料。导电材料的电特性主要用电阻率表征。影响电阻率的因素有温度、杂质含量、冷变形、热处理等。温度的影响常以导电材料电阻率的温度系数表示。除接近熔点和超低温以外，在一般温度范围，电阻率随温度变化呈线性关系。
请参看图3，其为第三实施例的显示背板的示意图。第三实施例和第一实施例的显示背板6差异在于：第二触点5靠近插接电路板2一侧。第二子区域122和第四子区域132内均设置有第一触点4，第二子区域122内的第一触点4位于远离第一子区域121一侧。第四子区域132内的第一触点4位于远离第三子区域131一侧，第二信号线32从第一触点4转线至背面。在本实施例中，第二子区域122和第四子区域132中的第二信号线32从远离插接电路板2的一侧绕设于背面，无需走线自第一子区域121和第三子区域131，进而可以使得第一走线区12和第二走线区13的宽度可以设置的更小。进一步地，可以减小显示背板的边框，从而提高显示效果。
请参看图4，其为第四实施例的显示背板63示意图。第四实施例显示背板63和第一实施例的显示背板6的差异在于：第二子区域122和第四子区域132中第二信号线32绕设于背面，并分别从第一子区域121和第三子区域131远离第二子区域122和第四子区域132一端绕设于正面88，且走线至第三走线区14并与插接电路板2电性连接。第一子区域121和第三子区域131中的第一信号线31从正面88走线至第三走线区14，并与插接电路板2电性连接。
可选地，第一触点4和第二触点5皆设置成粘接层41。
需要说明的是，第四实施例中的显示背板63的其他结构与第一实施例中的结构相同，在此不再赘述。
请参看图5，其为第五实施例的显示背板64示意图。在本实施例中，第五实施例的显示背板64和第四实施例的显示背板63的差异在于，第一触点4为与背面信号线3一一对应的第三导电孔43，且第三导电孔43与第一导电孔42为同一导电孔，其他的部分与第四实施实施例相同，在此不再赘述。
请参看图6，其为第六实施例的显示背板65示意图。第六实施例方式的显示背板65与第四实施例中的显示背板63差异在于：第二触点5为与背面信号线3一一对应的第四导电孔52。第四导电孔52内填充有导电材料，第四导电孔52内的导电材料与第二导电孔51内的导电材料一致。背面的信号线3通过第四导电孔52穿设于正面88，且走线至第三走线区14并与插接电路板2电性连接。
需要说明的是，第六实施例中的显示背板65的其他结构与第四实施例中显示背板63的其他结构相同，在此不再赘述。
可选地，第一子区域121、第二子区域122、第三子区域131和第四子区域132的尺寸相同，布设于，第一子区域121、第二子区域122、第三子区域131和第四子区域132中信号线数量相同。
在一些可行实施例中，第二子区域122和第四子区域132中布设的信号线数量可相对于第一子区域121、和第二子区域122中的数量多。例如，第二子区域122和第四子区域132的数量相等，第二子区域122和第四子区域132的信号线占所有信号线的2/3，3/4等，在此不做限定。在一些可行的实施例中，第一子区域121和第二子区域122的宽度相同，第三子区域131和第四子区域132中的宽度相同，但是小于第一子区域121和第二子区域122的宽度。第一子区域121和第三子区域131中布设的信号线占所有信号线的2/3，3/4等。可以理解地，每个区域的信号线可以根据实际情况设置，不仅限于 以上的举例。
请参看图7，其为第一实施例应用上述显示背板的显示设备7示意图。显示设备7包括显示背板6（例如，显示背板6可以是显示背板61、显示背板62、显示背板63、显示背板64和/或显示背板65）以及固定显示背板6的壳体99，可以理解地，显示设备7具有显示功能。其中，显示设备7包括但不限于显示器、电视机、计算机、笔记本电脑、平板电脑、穿戴式设备等。上述显示设备7由于采用了上述显示背板6，由于显示背板6中的走线方式，提高背板1的利用率，使得第一走线区12和第二走线区13减小，进一步地，本显示设备7的边框可以制成更小。且不影响显示效果。
请参看图8，其为第一实施例应用显示设备7的拼接显示设备8示意图。多个显示背板6（例如，显示背板6可以是显示背板61、显示背板62、显示背板63、显示背板64和/或显示背板65）拼接的拼接显示设备8，在本发明中，拼接显示设备8中的显示背板6可以为两个、三个、四个等，在此不在限定。显示背板6的数量越多，拼接显示设备8的显示区域越大。上述拼接显示设备8由于采用了上述显示背板6，可以减小显示设备7边界，使得显示设备7的显示效果更好。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘且本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。
以上所列举的仅为本发明较佳实施例而已，当然不能以此来限定本发明之权利范围，因此依本发明权利要求所作的等同变化，仍属本发明所涵盖的范围。

Claims (2)

  1. 一种显示背板，包括背板、设置于所述背板且呈矩阵排列的若干微型发光二极管、位于所述背板一端的插接电路板、与所述若干微型发光二极管一一对应电性连接的若干信号线，所述若干信号线电连接于所述插接电路板，其特征在于：所述背板包括正面和与所述正面背相的背面；设置有所述若干微型发光二极管且位于所述正面的发光区；位于所述发光区相对两侧的第一走线区和第二走线区，以及位于所述发光区一侧且在所述相对两侧之间的第三走线区，所述第三走线区位于所述第一走线区和所述第二走线区之间；所述若干信号线包括第一信号线和第二信号线，所述第一信号线从所述第一走线区和所述第二走线区走线并通过所述第三走线区与所述插接电路板电连接，所述第二信号线自所述第一走线区和所述第二走线区沿着所述背面绕设于所述第三走线区，且从所述第三走线区进行走线并与所述插接电路板电连接。
  2. 如权利要求1所述的显示背板，其特征在于：所述第一走线区划分为第一子区域和第二子区域，所述第一子区域位于所述第一走线区靠近所述插接电路板一侧，所述第二子区域位于所述第一走线区远离所述插接电路板一侧；所述第二走线区划分为第三子区域和第四子区域，所述第三子区域位于所述第二走线区靠近所述插接电路板一侧；所述第四子区域位于所述第二走线区远离所述插接电路板一侧，所述第二信号线布设于所述第二子区域和所述第四子区域，并绕至所述背面；所述第一信号线自所述第一子区域和所述第三子区域走线并通过所述第三走线区与所述插接电路板电连接。
    3.如权利要求2所述的显示背板，其特征在于：所述第二子区域和所述第四子区域均设置有第一触点，所述第二信号线从所述第一触点转线至所述背面。
    4.如权利要求3所述的显示背板，其特征在于：所述第一触点为设置于所述第二子区域和所述第四子区域远离所述发光区一侧且用于翻转信号线的粘接层，所述第二信号线对应从所述第一子区域和所述第三子区域远离所述第二子区域和所述第四子区域一端绕设于所述正面且走线至所述第三走线区。
    5.如权利要求3所述的显示背板，其特征在于：所述第一触点为第一导电孔，所述第一导电孔内填充有导电材料，所述第二子区域和所述第四子区域的信号线通过所述第一触点穿设于所述背面。
    6.如权利要求4或者5所述的显示背板，其特征在于：所述第一触点位于所述第二子区域和所述第四子区域远离所述发光区的第一侧，且靠近所述显示背板的一边缘。
    7.如权利要求4或者5所述的显示背板，其特征在于：所述第一触点位于所述第二子区域和所述第四子区域分别远离所述第一子区域和所述第三子区域的一侧，且靠近所述背板的另一边缘。
    8.如权利要求2所述的显示背板，其特征在于：所述第一子区域和所述第三子区域均设有第二触点，所述第二信号线从所述背面绕设于所述正面并经所述第二触点转线至所述第三走线区。
    9.一种显示设备，其特征在于，包括：壳体以及设置于所述壳体内的如权利要求1-8任意一项所述的显示背板。
    10.一种拼接显示设备，其特征在于，包括：壳体以及设置于所述壳体内的多个如权利要求1-8任意一项所述的显示背板，所述多个显示背板拼接在一起。
PCT/CN2020/076062 2020-01-16 2020-02-20 显示背板、显示设备以及拼接显示设备 WO2021142881A1 (zh)

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