WO2021139050A1 - 一种阵列基板、膜层应力测试方法和显示面板 - Google Patents

一种阵列基板、膜层应力测试方法和显示面板 Download PDF

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Publication number
WO2021139050A1
WO2021139050A1 PCT/CN2020/087398 CN2020087398W WO2021139050A1 WO 2021139050 A1 WO2021139050 A1 WO 2021139050A1 CN 2020087398 W CN2020087398 W CN 2020087398W WO 2021139050 A1 WO2021139050 A1 WO 2021139050A1
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Prior art keywords
strain sensor
layer
film layer
array substrate
film
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PCT/CN2020/087398
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English (en)
French (fr)
Inventor
何家庆
彭浩
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/261,389 priority Critical patent/US20220109010A1/en
Publication of WO2021139050A1 publication Critical patent/WO2021139050A1/zh

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/14—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
    • G01L1/142—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors
    • G01L1/146—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors for measuring force distributions, e.g. using force arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/04—Measuring force or stress, in general by measuring elastic deformation of gauges, e.g. of springs
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/12—Measuring force or stress, in general by measuring variations in the magnetic properties of materials resulting from the application of stress
    • G01L1/127—Measuring force or stress, in general by measuring variations in the magnetic properties of materials resulting from the application of stress by using inductive means
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/14—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/14—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
    • G01L1/142—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/20—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress
    • G01L1/205—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using distributed sensing elements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/20—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress
    • G01L1/22—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/20—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress
    • G01L1/22—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges
    • G01L1/2287—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges constructional details of the strain gauges
    • G01L1/2293—Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids; by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges constructional details of the strain gauges of the semi-conductor type
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/24—Measuring force or stress, in general by measuring variations of optical properties of material when it is stressed, e.g. by photoelastic stress analysis using infrared, visible light, ultraviolet
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0414—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using force sensing means to determine a position
    • G06F3/04144—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using force sensing means to determine a position using an array of force sensing means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/13—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Definitions

  • This application relates to the field of display technology, and in particular to an array substrate, a film stress test method, and a display panel.
  • a flexible display screen generally includes a substrate, a thin film transistor structure, a light-emitting layer, an encapsulation layer, and a module structure, etc.
  • the laminated structure inside the flexible display screen is subject to stress. There may be phenomena such as film breakage, peeling, poor electrical properties, uneven brightness, etc., which may lead to different degrees of device damage such as poor display or failure.
  • the present application provides an array substrate, a film stress testing method, and a display panel to quantitatively test the stress of the internal film of the flexible display panel in a curled or bent state, so as to provide early warning of damage to the flexible display panel in time.
  • an embodiment of the present application provides an array substrate, the array substrate includes: a substrate; a first film layer on the substrate, the first film layer is provided with a first mounting groove; A strain sensor, wherein the first strain sensor is used to detect the stress of the first film layer.
  • the first strain sensor includes a resistive strain sensor, a capacitive strain sensor, an inductive strain sensor or an optical strain sensor.
  • the material of the first strain sensor is the same as the material of the first film layer.
  • the first film layer is a low-temperature polysilicon layer, a gate layer, a source and drain layer, or an anode layer.
  • the base body includes a bending area
  • the number of first strain sensors is one or more
  • at least one first strain sensor is located on the bending area.
  • the number of the first strain sensors is multiple, and the multiple first strain sensors are arranged in an array on the substrate.
  • the array substrate further includes an insulating layer, a second film layer and a second strain sensor, the insulating layer is located on the first film layer and the first strain sensor, the second film layer is located on the insulating layer, and the second film layer is provided with a Two mounting slots, the second strain sensor is located in the second mounting slot, and the second strain sensor is used to detect the stress of the second film layer.
  • the first strain sensor includes an input end and an output end.
  • the input end is electrically connected to an external circuit board, the circuit board is used to provide working voltage to the first strain sensor, and the output end is electrically connected to an external sensor control unit .
  • the array substrate further includes a first connection line and a second connection line.
  • the first connection line and the second connection line are arranged on the same layer as the first strain sensor.
  • the first connection line is used to realize the connection between the input end and the circuit board.
  • Electrical connection, and the second connection line is used to realize electrical connection between the first output end and the sensor control unit.
  • the embodiments of the present application also provide a film stress testing method, which is applied to an array substrate.
  • the array substrate includes: a substrate; a first film layer on the substrate, and a first film layer on the first film layer.
  • the film stress testing method includes: activating the first strain sensor; The substrate is bent or curled, and the change amount of the detection parameter of the first strain sensor is obtained; the stress of the first film layer is determined according to the change amount.
  • determining the stress of the first film layer according to the amount of change specifically includes: converting the amount of change into a corresponding amount of current change or voltage change; determining the amount of strain of the first film layer according to the amount of current change or voltage change; The amount of strain of one film layer determines the stress of the first film layer.
  • an embodiment of the present application also provides a display panel.
  • the display panel includes an array substrate.
  • the array substrate includes: a base; a first film layer on the base, and a first mounting groove is provided on the first film layer; The first strain sensor in the first installation groove, wherein the first strain sensor is used to detect the stress of the first film layer.
  • the first strain sensor includes a resistive strain sensor, a capacitive strain sensor, an inductive strain sensor or an optical strain sensor.
  • the material of the first strain sensor is the same as the material of the first film layer.
  • the first film layer is a low-temperature polysilicon layer, a gate layer, a source and drain layer, or an anode layer.
  • the base body includes a bending area
  • the number of first strain sensors is one or more
  • at least one first strain sensor is located on the bending area.
  • the number of the first strain sensors is multiple, and the multiple first strain sensors are arranged in an array on the substrate.
  • the array substrate further includes an insulating layer, a second film layer and a second strain sensor, the insulating layer is located on the first film layer and the first strain sensor, the second film layer is located on the insulating layer, and the second film layer is provided with a Two mounting slots, the second strain sensor is located in the second mounting slot, and the second strain sensor is used to detect the stress of the second film layer.
  • the first strain sensor includes an input end and an output end.
  • the input end is electrically connected to an external circuit board, the circuit board is used to provide working voltage to the first strain sensor, and the output end is electrically connected to an external sensor control unit .
  • the array substrate further includes a first connection line and a second connection line.
  • the first connection line and the second connection line are arranged on the same layer as the first strain sensor.
  • the first connection line is used to realize the connection between the input end and the circuit board.
  • Electrical connection, and the second connection line is used to realize electrical connection between the first output end and the sensor control unit.
  • the array substrate provided in the present application includes a substrate, and a first film layer and a first strain sensor on the substrate, wherein the first strain sensor is used to detect the stress of the first film layer.
  • a stress sensor is provided in the film structure of the array substrate of the flexible display panel, which can quantitatively test the stress of the internal film layer of the flexible display panel in a curled or bent state, and thereby can make timely damage to the flexible display panel. Early warning.
  • FIG. 1 is a schematic diagram of the structure of an array substrate provided by an embodiment of the present application.
  • FIG. 2 is another schematic diagram of the structure of the array substrate provided by the embodiment of the present application.
  • FIG. 3 is a schematic diagram of another structure of an array substrate provided by an embodiment of the present application.
  • FIG. 4 is another schematic diagram of the structure of the array substrate provided by the embodiment of the present application.
  • FIG. 5 is another schematic diagram of the structure of the array substrate provided by the embodiment of the present application.
  • FIG. 6 is a schematic diagram of the distribution of first strain sensors in the array substrate provided by an embodiment of the present application.
  • FIG. 7 is another schematic diagram of the distribution of the first strain sensors in the array substrate provided by the embodiment of the present application.
  • FIG. 8 is another schematic diagram of the distribution of the first strain sensors in the array substrate provided by the embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of an optical strain sensor provided by an embodiment of the present application.
  • FIG. 10 is a schematic flowchart of a film stress testing method provided by an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • the technical solution adopted in the present application is to provide a stress sensor in the film structure of the array substrate of the flexible display panel to quantitatively test the stress of the internal film of the flexible display panel in a curled or bent state, and then It can give early warning of damage to the flexible display panel in time.
  • FIG. 1 is a schematic structural diagram of an array substrate provided by an embodiment of the present application.
  • the array substrate 100 includes a base 101, and a first film layer 102 and a first strain sensor 103 on the base 101.
  • the first film layer 102 is provided with a first mounting groove 102a.
  • the sensor 103 is located in the first mounting groove 102 a and is used to detect the stress of the first film layer 102.
  • the base 101 may be a flexible base, and its material may be one of organic polymers such as polyimide, polycarbonate, polyethylene terephthalate, and polyethersulfone substrate.
  • the above-mentioned base body 101 may also be a laminated structure.
  • the base body 101 may include a polyimide substrate, a barrier layer, and a buffer layer stacked from bottom to top.
  • the material of the barrier layer may be silicon oxide and a buffer layer.
  • the material of the layer can be SiNx, SiOx or other suitable dielectric materials.
  • the first film layer 102 can be a low-temperature polysilicon layer, a gate layer, a source-drain layer, or an anode layer of the array substrate 100, and due to the low-temperature polysilicon layer, the gate layer, the source-drain layer, and the anode layer of the existing array substrate Generally, all are patterned film layers, so the above-mentioned first mounting groove 102a can be an opening on the patterned film layer where it is located, so there is no need to change the existing film preparation process of the array substrate.
  • the substrate 101 located under the first film layer 102 can be exposed through the first mounting groove 102a, that is, the first strain sensor 103 is disposed on the area of the substrate 101 that is not covered by the first film layer 102.
  • the upper and lower film structure of the first strain sensor 103 can be completely consistent with the upper and lower film structure of the first film 102, so that the first strain sensor 103 can more truly reflect that the first film 102 is in the array
  • the actual strain and stress experienced inside the substrate 100 Specifically, when the array substrate 100 is deformed such as curling, bending, etc., the first strain sensor 103 will be deformed by force, and the generated deformation will be converted into other types of physical signals (for example, resistance change, capacitance change, etc.).
  • the converted physical signal can be transferred to the external sensor control unit, so that the sensor control unit can convert the converted physical signal into a readable signal.
  • the stress level of the first film layer 102 can be determined.
  • the aforementioned first strain sensor 103 may include one or more of a resistive strain sensor, a capacitive strain sensor, an inductive strain sensor, or an optical strain sensor.
  • resistive strain sensors can convert deformation into resistance changes
  • capacitive strain sensors can convert deformation into capacitance changes
  • inductive strain sensors can convert deformation into inductance change rates
  • optical strain sensors can convert The amount of deformation is converted into the amount of change in optical parameters (for example, optical power, phase, wavelength, etc.).
  • the above-mentioned first film layer 102 may be a low-temperature polysilicon layer 104 of the array substrate 100.
  • the above-mentioned array substrate 100 may further include a low-temperature polysilicon layer 104 (the first film layer 102).
  • the above-mentioned first film layer 102 may also be the gate layer 106 (as shown in FIG. 3 ), the source and drain layer 108 or the anode layer 110 of the array substrate 100.
  • the above-mentioned array substrate 100 may further include an insulating layer 112, a second film layer 113, and a second strain sensor 114, wherein the insulating layer 112 is located between the first film layer 102 and the first film layer 113.
  • the second film layer 113 and the second sensor 114 are located on the insulating layer 112, wherein the second film layer 113 is provided with a second mounting groove 113b, and the second strain sensor 114 is located in the second mounting groove 113b, The second strain sensor 114 is used to detect the stress of the second film layer 113.
  • the insulating layer 112 located under the second film layer 113 can be exposed through the second mounting groove 113b, that is, the second strain sensor 114 is disposed on the area of the insulating layer 112 that is not covered by the second film layer 113, and
  • the working principle of the second strain sensor 114 is the same as the working principle of the above-mentioned first strain sensor 103, so it will not be repeated here.
  • the second strain sensor 114 may also include one or more of a resistive strain sensor, a capacitive strain sensor, an inductive strain sensor, or an optical strain sensor.
  • the first film layer 102 and the second film layer 113 may be any two of the low-temperature polysilicon layer 104, the gate layer 106, the source drain layer 108 and the anode layer 110 of the array substrate 100, for example, as shown in FIG. As shown in 5, the first film layer 102 may be the gate layer 106, the second film layer 113 may be the source and drain layer 108, and the above-mentioned insulating layer 112 may be the interlayer dielectric layer 107.
  • the first film layer 102 or the second film layer 113 is not limited to one of the low-temperature polysilicon layer 104, the gate layer 106, the source drain layer 108 and the anode layer 110 of the array substrate 100.
  • a stress sensor can be provided in any film layer of the above-mentioned array substrate 100 according to the actual needs of the stress test to detect the stress of the corresponding film layer, and the film layer provided with the strain sensor is not limited to For the above-mentioned first film layer and the second film layer, in specific implementation, the number of film layers provided with strain sensors can also be increased according to the actual needs of the stress test.
  • the low-temperature polysilicon layer 104 of the above-mentioned array substrate 100 can be increased accordingly.
  • At least three of the gate insulating layer 105, the gate layer 106, the interlayer dielectric layer 107, the source and drain layer 108, the flat layer 109, the anode layer 110, and the pixel defining layer 111 are provided with strain sensors.
  • the gate layer 106, the source and drain layer 108, and the anode layer 110 are generally patterned film layers, so the first mounting groove 102a or the second mounting groove 113b may be an opening on the patterned film layer where it is located. That is, the first strain sensor 103 or the second strain sensor 114 can be directly disposed in the openings on the patterned low-temperature polysilicon layer 104, the gate layer 106, the source and drain layer 108, or the anode layer 110.
  • the etching process can be performed first
  • the gate insulating layer 105, the interlayer dielectric layer 107, the planarization layer 109 or the pixel defining layer 111 are patterned to obtain the first mounting groove 102a or the second mounting groove 113b, and then the first mounting groove 102a or the second mounting groove 113b is obtained.
  • the first strain sensor 103 or the second strain sensor 114 described above is arranged in the mounting groove 113b.
  • the first strain sensor 103 and the second strain sensor 114 can be prepared by 3D printing, template method, self-assembly, controllable assembly, sol-gel method, compression molding method, etc., or they can be prepared by existing methods. Some array substrate film preparation processes are prepared. In addition, the first strain sensor 103 and the second strain sensor 114 can be prepared by using existing array substrate film materials, or by using other metal materials, non-metal materials, composite materials, and the like.
  • the material of the first strain sensor 103 and the material of the first film layer 102 may be the same or different.
  • the material of the first strain sensor 103 and the low-temperature polysilicon layer 104 may be the same or different.
  • the first strain sensor 103 can be a resistive strain sensor composed of a semiconductor resistor or an optical strain sensor composed of a semiconductor grating, and the first strain sensor 103 is compatible with the low-temperature polysilicon layer 104.
  • the polysilicon layer 104 can be prepared by the same patterning process.
  • the material of the first strain sensor 103 and the material of the gate layer 106 may be the same or different.
  • the first strain sensor 103 can be a resistive strain sensor composed of a metal resistor, an optical strain sensor composed of a metal grating, or an inductive strain sensor composed of metal traces.
  • the sensor, and the first strain sensor 103 and the gate layer 106 can also be prepared by the same patterning process.
  • the material of the second strain sensor 114 and the material of the second film layer 113 may be the same or different, and the specific implementation can refer to the above description of the material of the first strain sensor 103, so it will not be omitted here. Go into details.
  • the base 101 may include a bending area W
  • the number of the first strain sensors 103 may be one or more, and at least one first strain sensor 103 is located on the bending area W
  • the number of the aforementioned second strain sensors 114 may also be one or more, and at least one second strain sensor 114 is located on the bending area W, so that the bending area W can be monitored in real time when bending or curling.
  • the stress of the upper film layer please continue to refer to FIG.
  • the above-mentioned base body 101 may also include a display area C1 and a non-display area C2 located at the periphery of the display area C1, wherein the above-mentioned first strain sensor 103 and the second strain sensor 114 may be located on the display area C1, It may also be located on the non-display area C2.
  • the above-mentioned first strain sensor 103 or/and the second strain sensor 114 may be located on the overlapping area between the display area C1 and the bending area W (as shown in FIG. 6), it can also be located on the overlapping area between the non-display area C2 and the bending area W (as shown in FIG. 7).
  • the multiple first strain sensors 103 when the number of the above-mentioned first strain sensors 103 is multiple, the multiple first strain sensors 103 may be arranged in an array on the substrate 101.
  • the second strain sensor 114 when the number is multiple, the multiple second strain sensors 114 may also be arranged in an array on the substrate 101, so that the strain distribution of the entire film or a local area of the film can be monitored in real time during bending or curling. happening.
  • the first strain sensor 103 and the second strain sensor 114 may include an input end and an output end.
  • the optical strain sensor in addition to the grating structure 1031, can also include an input end 1032 and an output end 1033.
  • the input end 1032 can be electrically connected to an external circuit board, and the external The circuit board can provide the working voltage to the above-mentioned optical strain sensor, and the output end 1033 can be electrically connected to the external sensor control unit, so that the above-mentioned optical strain sensor can convert the transformed deformation into a physical signal.
  • the physical signal is transmitted to the sensor control unit, so that the sensor control unit can convert the converted physical signal into a corresponding readable signal (for example, a voltage signal, a current signal, etc.), thereby determining the optical strain sensor The magnitude of the stress of the film.
  • a corresponding readable signal for example, a voltage signal, a current signal, etc.
  • the above-mentioned array substrate 100 may further include a first connection line and a second connection line.
  • the first connection line and the second connection line may be provided on the same layer as the first strain sensor 103, and the first connection line may be used
  • the second connection line can be used to realize the electrical connection between the output end of the first strain sensor 103 and the external sensor control unit. Electric connection.
  • the array substrate 100 may further include at least one solder pad 115.
  • the at least one solder pad 115 may be disposed at the edge of the non-display area C2 and may be connected to the outside through the flip chip film 200.
  • the driving chip 300 is electrically connected, and the driving chip 300 can provide scan signals and data signals to the thin film transistors in the array substrate 100, and provide working voltages to the first strain sensor 103 and the second strain sensor 114.
  • the pad 115 may include a connecting end S.
  • the pad 115 is electrically connected to the flip chip 200 at the connecting end S, and, in a specific implementation, the pad 115 may also be bent In order to bend the connection end S of the solder pad 115, the chip on film 200, and the driving chip 300 to the non-light emitting surface of the array substrate 100 described above, thereby facilitating the realization of a narrow frame of the display panel.
  • the array substrate in this embodiment can quantitatively test the stress condition of the inner film layer of the flexible display panel in a curled or bent state by arranging a stress sensor in the film structure of the array substrate of the flexible display panel. In turn, it is possible to give an early warning of damage to the flexible display panel in time.
  • FIG. 10 is a schematic flowchart of a film stress testing method provided by an embodiment of the present application.
  • the film stress testing method can be applied to the array substrate of any of the above embodiments.
  • the array substrate includes a base, and a first film layer and a first strain sensor located on the base, wherein the first film layer is provided with The first installation groove, the first strain sensor is located in the first installation groove, and is used for detecting the stress of the first film layer.
  • the film stress testing method may include the following steps:
  • an external driving circuit for example, a flexible circuit board
  • a working voltage may be used to provide a working voltage to the first strain sensor, so that the first strain sensor is activated and enters the working state.
  • S82 Bend or curl the array substrate, and obtain the change amount of the detection parameter of the first strain sensor.
  • the first strain sensor is arranged on the area of the substrate that is not covered by the first film layer, so that the upper and lower film structure where the first strain sensor is located and the upper and lower film structure where the first film layer is located can be They are completely consistent, so that the first strain sensor can more truly reflect the actual strain and stress experienced by the first film layer inside the array substrate. Specifically, when the array substrate is deformed such as curling, bending, etc., the first strain sensor will be forced to deform, and the generated deformation will be converted into the detected detection parameters (for example, resistance change, capacitance, inductance or The amount of change in optical parameters, etc.).
  • the detected detection parameters for example, resistance change, capacitance, inductance or The amount of change in optical parameters, etc.
  • the aforementioned first strain sensor may include one or more of a resistive strain sensor, a capacitive strain sensor, an inductive strain sensor, or an optical strain sensor.
  • resistive strain sensors can convert deformation into resistance changes
  • capacitive strain sensors can convert deformation into capacitance changes
  • inductive strain sensors can convert deformation into inductance change rates
  • optical strain sensors can convert The amount of deformation is converted into the amount of change in optical parameters (for example, optical power, phase, wavelength, etc.).
  • S83 Determine the stress of the first film layer according to the amount of change.
  • the above S83 may specifically include:
  • an external sensor control unit may be used to convert the change amount of the detection parameter of the first sensor into a readable electrical signal, such as a current change amount or a voltage change amount.
  • S832 Determine the strain amount of the first film layer according to the current change amount or the voltage change amount.
  • a Wheatstone bridge can be used to convert the amount of current change or voltage change into the amount of strain of the first film layer.
  • S833 Determine the stress of the first film layer according to the amount of strain of the first film layer.
  • a data table can be established in advance to store the one-to-one correspondence between the strain of the first film and the stress, and then the stress corresponding to the current strain of the first film can be obtained by referring to the data table.
  • the film stress test method in this embodiment uses the stress sensor provided in the film structure of the array substrate of the flexible display panel to quantitatively test the internal film of the flexible display panel in a curled or bent state.
  • the stress situation of the flexible display panel can be timely warning of damage to the flexible display panel.
  • FIG. 11 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • the display panel 90 includes the array substrate 91 of any one of the above embodiments, wherein the array substrate 91 includes a base, and a first film layer and a first strain sensor on the base, wherein the first film layer is provided with a first mounting Slot, the first strain sensor is located in the first installation slot, and is used to detect the stress of the first film layer.
  • the display panel in this embodiment can quantitatively test the stress of the internal film layer of the flexible display panel in a curled or bent state by arranging a stress sensor in the film structure of the array substrate of the flexible display panel. In turn, it is possible to give early warning of damage to the flexible display panel in time.

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Abstract

一种阵列基板（100）、膜层应力测试方法和显示面板（90），该阵列基板（100）包括：基体（101）；位于基体（101）上的第一膜层（102），第一膜层（102）上设有第一安装槽（102a）；位于第一安装槽（102a）内的第一应变传感器（103），其中，第一应变传感器（103）用于检测第一膜层（102）的应力。

Description

一种阵列基板、膜层应力测试方法和显示面板
本申请要求于2020年01月07日提交中国专利局、申请号为202010012504.0、发明名称为“一种阵列基板、膜层应力测试方法和显示面板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，特别涉及一种阵列基板、膜层应力测试方法和显示面板。
 背景技术
目前，柔性显示屏，如卷曲屏、折叠屏等已经成为显示领域的热点。
现有技术中，柔性显示屏一般包括基板、薄膜晶体管结构、发光层、封装层、以及模组结构等，且在进行卷曲或弯折时，柔性显示屏内部的叠层结构由于受到应力，将可能出现膜层断裂、剥离、电性不良、亮度不均匀等现象，进而导致显示不良或失效等不同程度的器件损坏。
但是，在柔性显示屏的开发、测试、膜层优化以及产品应用过程中，对于不同卷曲、弯折状态下柔性显示屏内部膜层的应力情况，目前仍缺少定量测试的手段，进而无法实时监测柔性显示面板使用过程中的受力情况，以及对柔性显示面板的损伤作出预警。
 技术问题
本申请提供一种阵列基板、膜层应力测试方法和显示面板，以定量测试柔性显示面板内部膜层在卷曲或弯折状态下的应力情况，进而能够及时对柔性显示面板的损伤作出预警。
 技术解决方案
第一方面，本申请实施例提供一种阵列基板，该阵列基板包括：基体；位于基体上的第一膜层，第一膜层上设有第一安装槽；位于第一安装槽内的第一应变传感器，其中，第一应变传感器用于检测第一膜层的应力。
其中，第一应变传感器包括电阻式应变传感器、电容式应变传感器、电感式应变传感器或光学式应变传感器。
其中，第一应变传感器的材质与第一膜层的材质相同。
其中，第一膜层为低温多晶硅层、栅极层、源漏极层或阳极层。
其中，基体包括弯折区域，第一应变传感器的数量为一个或多个，且至少一个第一应变传感器位于弯折区域上。
其中，第一应变传感器的数量为多个，多个第一应变传感器在基体上呈阵列排布。
其中，阵列基板还包括绝缘层、第二膜层和第二应变传感器，绝缘层位于第一膜层和第一应变传感器上，第二膜层位于绝缘层上，第二膜层上设有第二安装槽，第二应变传感器位于第二安装槽内，其中，第二应变传感器用于检测第二膜层的应力。
其中，第一应变传感器包括输入端部和输出端部，输入端部与外界的电路板电连接，电路板用于向第一应变传感器提供工作电压，输出端部与外界的传感器控制单元电连接。
其中，阵列基板还包括第一连接线路和第二连接线路，第一连接线路和第二连接线路与第一应变传感器同层设置，第一连接线路用于实现输入端部与电路板之间的电连接，第二连接线路用于实现第一输出端部与传感器控制单元之间的电连接。
第二方面，本申请实施例还提供一种膜层应力测试方法，该膜层应力测试方法应用于阵列基板，阵列基板包括：基体；位于基体上的第一膜层，第一膜层上设有第一安装槽；位于第一安装槽内的第一应变传感器，其中，第一应变传感器用于检测第一膜层的应力；该膜层应力测试方法包括：启动第一应变传感器；对阵列基板进行弯折或卷曲，并获取第一应变传感器的检测参数的变化量；根据变化量确定第一膜层的应力。
其中，根据变化量确定第一膜层的应力，具体包括：将变化量转换为对应的电流变化量或电压变化量；根据电流变化量或电压变化量确定第一膜层的应变量；根据第一膜层的应变量确定第一膜层的应力。
第三方面，本申请实施例还提供一种显示面板，该显示面板包括阵列基板，阵列基板包括：基体；位于基体上的第一膜层，第一膜层上设有第一安装槽；位于第一安装槽内的第一应变传感器，其中，第一应变传感器用于检测第一膜层的应力。
其中，第一应变传感器包括电阻式应变传感器、电容式应变传感器、电感式应变传感器或光学式应变传感器。
其中，第一应变传感器的材质与第一膜层的材质相同。
其中，第一膜层为低温多晶硅层、栅极层、源漏极层或阳极层。
其中，基体包括弯折区域，第一应变传感器的数量为一个或多个，且至少一个第一应变传感器位于弯折区域上。
其中，第一应变传感器的数量为多个，多个第一应变传感器在基体上呈阵列排布。
其中，阵列基板还包括绝缘层、第二膜层和第二应变传感器，绝缘层位于第一膜层和第一应变传感器上，第二膜层位于绝缘层上，第二膜层上设有第二安装槽，第二应变传感器位于第二安装槽内，其中，第二应变传感器用于检测第二膜层的应力。
其中，第一应变传感器包括输入端部和输出端部，输入端部与外界的电路板电连接，电路板用于向第一应变传感器提供工作电压，输出端部与外界的传感器控制单元电连接。
其中，阵列基板还包括第一连接线路和第二连接线路，第一连接线路和第二连接线路与第一应变传感器同层设置，第一连接线路用于实现输入端部与电路板之间的电连接，第二连接线路用于实现第一输出端部与传感器控制单元之间的电连接。
 有益效果
相较于现有技术，本申请提供的阵列基板，包括基体、以及位于基体上的第一膜层和第一应变传感器，其中，第一应变传感器用于检测第一膜层的应力。通过这种方式，在柔性显示面板的阵列基板膜层结构中设置应力传感器，能够定量测试柔性显示面板内部膜层在卷曲或弯折状态下的应力情况，进而能够及时对柔性显示面板的损伤作出预警。
 附图说明
图1是本申请实施例提供的阵列基板的结构示意图；
图2是本申请实施例提供的阵列基板的另一结构示意图；
图3是本申请实施例提供的阵列基板的另一结构示意图；
图4是本申请实施例提供的阵列基板的另一结构示意图；
图5是本申请实施例提供的阵列基板的另一结构示意图；
图6是本申请实施例提供的阵列基板中第一应变传感器的分布示意图；
图7是本申请实施例提供的阵列基板中第一应变传感器的另一分布示意图；
图8是本申请实施例提供的阵列基板中第一应变传感器的又一分布示意图；
图9是本申请实施例提供的光学式应变传感器的结构示意图；
图10是本申请实施例提供的膜层应力测试方法的流程示意图；
图11是本申请实施例提供的显示面板的结构示意图。
 本发明的实施方式
下面结合附图和实施例，对本申请作进一步的详细描述。特别指出的是，以下实施例仅用于说明本申请，但不对本申请的范围进行限定。同样的，以下实施例仅为本申请的部分实施例而非全部实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本申请保护的范围。
目前，柔性显示面板在进行卷曲或弯折时，其内部的叠层结构由于受到应力，将可能出现膜层断裂、剥离、电性不良、亮度不均匀等现象，进而导致显示不良或失效等不同程度的器件损坏，但是，在柔性显示面板的开发、测试、膜层优化以及产品应用过程中，对于不同卷曲、弯折状态下柔性显示屏内部膜层的应力情况，目前仍缺少定量测试的手段，进而无法实时监测柔性显示面板使用过程中的受力情况，以及对柔性显示面板的损伤作出预警。为解决上述技术问题，本申请采用的技术方案是通过在柔性显示面板的阵列基板膜层结构中设置应力传感器，以定量测试柔性显示面板内部膜层在卷曲或弯折状态下的应力情况，进而能够及时对柔性显示面板的损伤作出预警。
请参阅图1，图1是本申请实施例提供的阵列基板的结构示意图。如图1所示，阵列基板100包括基体101、以及位于基体101上的第一膜层102和第一应变传感器103，其中，第一膜层102上设有第一安装槽102a，第一应变传感器103位于该第一安装槽102a内，且用于检测第一膜层102的应力。
其中，基体101可以为柔性基体，其材质可以为聚酰亚胺、聚碳酸酯、聚对苯二甲酸乙二醇酯、聚醚砜基板等有机聚合物中的一种，在其他实施例中，上述基体101还可以为叠层结构，例如，该基体101可以包括由下至上依次层叠设置的聚酰亚胺衬底、阻挡层和缓存层，其中，阻挡层的材质可以为氧化硅，缓冲层的材质可以为SiNx、SiOx或者其他适合的介电材料。第一膜层102可以为阵列基板100的低温多晶硅层、栅极层、源漏极层或阳极层，并且，由于现有阵列基板的低温多晶硅层、栅极层、源漏极层和阳极层一般均为图案化膜层，故上述第一安装槽102a可以为其所在的图案化膜层上的开口，从而无需改变现有阵列基板的膜层制备工艺。
在本实施例中，位于第一膜层102下的基体101可以通过上述第一安装槽102a暴露出来，也即上述第一应变传感器103设置于基体101未被第一膜层102覆盖的区域上，以使第一应变传感器103所处的上下膜层结构与第一膜层102所处的上下膜层结构能够完全一致，从而第一应变传感器103能够比较真实地反映第一膜层102在阵列基板100内部实际所受的应变和应力情况。具体地，当阵列基板100发生卷曲、弯折等变形时，第一应变传感器103会受力产生形变，并将所产生的变形量转化为其他类型的物理信号（比如，电阻变化量、电容变化量、电感变化率或光参数变化量等），接着可以将转换后的物理信号传递到外部的传感器控制单元中，以使该传感器控制单元可以将上述转换后的物理信号转换为可读取信号（比如，电压信号、电流信号等），进而能够确定上述第一膜层102的应力大小。
具体地，上述第一应变传感器103可以包括电阻式应变传感器、电容式应变传感器、电感式应变传感器或光学式应变传感器中的一种或多种。其中，电阻式应变传感器可以将变形量转化为电阻变化量，电容式应变传感器可以将变形量转化为电容变化量，电感式应变传感器可以将变形量转化为电感变化率，光学式应变传感器可以将变形量转化为光参数变化量（比如，比如，光功率、相位、波长等）。
在一个实施例中，如图2所示，上述第一膜层102可以为阵列基板100的低温多晶硅层104，具体地，上述阵列基板100还可以包括位于低温多晶硅层104（第一膜层102）和第一应变传感器103上的栅绝缘层105、以及在栅绝缘层105上依次设置的栅极层106、层间介质层107、源漏极层108、平坦层109、阳极层110和像素界定层111。在一些替代实施例中，上述第一膜层102还可以为阵列基板100的栅极层106（如图3所示）、源漏极层108或阳极层110。
在一些实施例中，如图4所示，上述阵列基板100还可以包括绝缘层112、第二膜层113、以及第二应变传感器114，其中，绝缘层112位于第一膜层102和第一应变传感器103上，第二膜层113和第二传感器114位于绝缘层112上，其中，第二膜层113上设有第二安装槽113b，第二应变传感器114位于第二安装槽113b内，第二应变传感器114用于检测第二膜层113的应力。
其中，位于第二膜层113下的绝缘层112可以通过上述第二安装槽113b暴露出来，也即上述第二应变传感器114设置于绝缘层112未被第二膜层113覆盖的区域上，且第二应变传感器114的工作原理与上述第一应变传感器103的工作原理相同，故在此不再赘述。另外，第二应变传感器114也可以包括电阻式应变传感器、电容式应变传感器、电感式应变传感器或光学式应变传感器中的一种或多种。
具体地，上述第一膜层102和第二膜层113可以为阵列基板100的低温多晶硅层104、栅极层106、源漏极层108和阳极层110中的任意两层，比如，如图5所示，第一膜层102可以为栅极层106，第二膜层113可以为源漏极层108，则上述绝缘层112可以为层间介质层107。
需要说明的是，上述第一膜层102或第二膜层113并不仅仅限于为阵列基板100的低温多晶硅层104、栅极层106、源漏极层108和阳极层110中的其中一层，具体实施时，可以根据应力测试的实际需要，而在上述阵列基板100的任意一膜层中设置应力传感器，以检测对应膜层的应力，并且，设置有应变传感器的膜层并不仅仅限于为上述第一膜层和第二膜层，具体实施时，还可以根据应力测试的实际需要而对应增加设置有应变传感器的膜层的数量，例如，可以在上述阵列基板100的低温多晶硅层104、栅绝缘层105、栅极层106、层间介质层107、源漏极层108、平坦层109、阳极层110和像素界定层111中的至少三层中设置应变传感器。
其中，当上述第一膜层102或第二膜层113为阵列基板100的低温多晶硅层104、栅极层106、源漏极层108和阳极层110中的其中一层时，由于低温多晶硅层104、栅极层106、源漏极层108和阳极层110一般均为图案化膜层，故上述第一安装槽102a或第二安装槽113b可以为其所在的图案化膜层上的开口，也即上述第一应变传感器103或第二应变传感器114可以直接设置在图案化的低温多晶硅层104、栅极层106、源漏极层108或阳极层110上的开口内。当上述第一膜层102或第二膜层113为阵列基板100的栅绝缘层105、层间介质层107、平坦层109和像素界定层111中的其中一层时，可以先通过刻蚀工艺将栅绝缘层105、层间介质层107、平坦层109或像素界定层111图案化，以得到上述第一安装槽102a或第二安装槽113b，然后在得到的第一安装槽102a或第二安装槽113b内设置上述第一应变传感器103或第二应变传感器114。
在上述实施例中，第一应变传感器103和第二应变传感器114可以采用3D打印、模板法、自组装、可控组装、溶胶凝胶法、压制成型法等工艺方法制备得到，也可以采用现有的阵列基板膜层制备工艺制备得到。并且，第一应变传感器103和第二应变传感器114可以采用现有的阵列基板膜层材料制备得到，也可以采用其他金属材料、非金属材料、复合材料等制备得到。
在上述实施例中，第一应变传感器103的材质与第一膜层102的材质可以相同也可以不同。例如，请继续参阅图2，若第一膜层102为阵列基板100的低温多晶硅层104，则第一应变传感器103的材质与低温多晶硅层104的材质可以相同也可以不同，并且，当第一应变传感器103的材质与低温多晶硅层104的材质相同时，第一应变传感器103可以为半导体电阻构成的电阻式应变传感器、或半导体光栅构成的光学式应变传感器，且该第一应变传感器103和低温多晶硅层104可以采用同一次构图工艺制备得到。
又例如，请继续参阅图3，若第一膜层102为阵列基板100的栅极层106，则第一应变传感器103的材质与栅极层106的材质可以相同也可以不同，并且，当第一应变传感器103的材质与栅极层106的材质相同时，第一应变传感器103可以为金属电阻构成的电阻式应变传感器、金属光栅构成的光学式应变传感器、或金属走线构成的电感式应变传感器，且该第一应变传感器103和栅极层106也可以采用同一次构图工艺制备得到。
需要说明的是，上述第二应变传感器114的材质与第二膜层113的材质可以相同也可以不同，且具体实施方式可以参见上述有关第一应变传感器103的材质的描述，故在此不再赘述。
在上述实施例中，如图6所示，基体101可以包括弯折区域W，第一应变传感器103的数量可以为一个或多个，且至少一个第一应变传感器103位于弯折区域W上，对应地，上述第二应变传感器114的数量也可以为一个或多个，且至少一个第二应变传感器114位于弯折区域W上，如此，以在弯折或卷曲时能够实时监测弯折区域W上膜层的应力情况。另外，请继续参阅图6，上述基体101还可以包括显示区域C1和位于显示区域C1周边的非显示区域C2，其中，上述第一应变传感器103和第二应变传感器114可以位于显示区域C1上，也可以位于非显示区域C2上，另外，在一些实施例中，上述第一应变传感器103或/和第二应变传感器114可以位于显示区域C1与弯折区域W之间的重叠区域上（如图6所示），也可以位于非显示区域C2与弯折区域W之间的重叠区域上（如图7所示）。
具体地，如图8所示，当上述第一应变传感器103的数量为多个时，该多个第一应变传感器103可以在基体101上呈阵列排布，对应地，当第二应变传感器114的数量为多个时，该多个第二应变传感器114也可以在基体101上呈阵列排布，如此，以在进行弯折或卷曲时能够实时监测整个膜层或者膜层局部区域的应变分布情况。
在上述实施例中，第一应变传感器103和第二应变传感器114可以包括输入端部和输出端部，例如，如图9所示，当第一应变传感器103为由半导体光栅或金属光栅构成的光学式应变传感器时，该光学式应变传感器除了包括光栅结构1031之外，还可以包括输入端部1032和输出端部1033，其中，输入端部1032可以与外界的电路板电连接，且该外界的电路板能够向上述光学式应变传感器提供工作电压，输出端部1033可以与外界的传感器控制单元电连接，以使上述光学式应变传感器在将变形量转化为物理信号后，能够将转换后的物理信号传递到上述传感器控制单元中，进而使该传感器控制单元能够将上述转换后的物理信号转换为对应的可读取信号（比如，电压信号、电流信号等），从而确定该光学式应变传感器所在膜层的应力大小。
具体地，上述阵列基板100还可以包括第一连接线路和第二连接线路，该第一连接线路和第二连接线路可以与上述第一应变传感器103同层设置，并且，第一连接线路可以用于实现上述第一应变传感器103的输入端部与外界的电路板之间的电连接，第二连接线路可以用于实现上述第一应变传感器103的输出端部与外界的传感器控制单元之间的电连接。
另外，请继续参阅图6至图8，上述阵列基板100还可以包括至少一个焊垫115，该至少一个焊垫115可以设置于非显示区域C2的边缘处，且可以通过覆晶薄膜200与外界的驱动芯片300电连接，该驱动芯片300能够向上述阵列基板100中的薄膜晶体管提供扫描信号和数据信号、以及向上述第一应变传感器103和第二应变传感器114提供工作电压。具体地，上述衬垫115可以包括连接端部S，衬垫115在该连接端部S处与上述覆晶薄膜200实现电连接，并且，具体实施时，还可以对上述焊垫115进行弯折，以将焊垫115的连接端部S、覆晶薄膜200以及驱动芯片300弯折至上述阵列基板100的非出光面，从而有利于实现显示面板的窄边框化。
区别于现有技术，本实施例中的阵列基板，通过在柔性显示面板的阵列基板膜层结构中设置应力传感器，能够定量测试柔性显示面板内部膜层在卷曲或弯折状态下的应力情况，进而能够及时对柔性显示面板的损伤作出预警。
请参阅图10，图10是本申请实施例提供的膜层应力测试方法的流程示意图。该膜层应力测试方法可以应用于上述任一实施例的阵列基板，具体地，阵列基板包括基体、以及位于基体上的第一膜层和第一应变传感器，其中，第一膜层上设有第一安装槽，第一应变传感器位于该第一安装槽内，且用于检测第一膜层的应力。
如图8所示，该膜层应力测试方法可以包括以下步骤：
S81：启动第一应变传感器。
具体地，可以通过外部的驱动电路（比如，柔性电路板）向第一应变传感器提供工作电压,以使该第一应变传感器启动并进入工作状态。
S82：对阵列基板进行弯折或卷曲，并获取第一应变传感器的检测参数的变化量。
在本实施例中，第一应变传感器设置于基体未被第一膜层覆盖的区域上，以使第一应变传感器所处的上下膜层结构与第一膜层所处的上下膜层结构能够完全一致，从而第一应变传感器能够比较真实地反映第一膜层在阵列基板内部实际所受的应变和应力情况。具体地，当阵列基板发生卷曲、弯折等变形时，第一应变传感器会受力产生形变，并将所产生的变形量转化为其所检测的检测参数（比如，电阻变、电容、电感或光参数等）的变化量。
具体地，上述第一应变传感器可以包括电阻式应变传感器、电容式应变传感器、电感式应变传感器或光学式应变传感器中的一种或多种。其中，电阻式应变传感器可以将变形量转化为电阻变化量，电容式应变传感器可以将变形量转化为电容变化量，电感式应变传感器可以将变形量转化为电感变化率，光学式应变传感器可以将变形量转化为光参数变化量（比如，比如，光功率、相位、波长等）。
S83：根据变化量确定第一膜层的应力。
其中，上述S83可以具体包括：
S831：将变化量转换为对应的电流变化量或电压变化量。
其中，可以通过外部的传感器控制单元将上述第一传感器的检测参数的变化量转换为可读取的电信号，比如，电流变化量或电压变化量。
S832：根据电流变化量或电压变化量确定第一膜层的应变量。
具体地，可以利用惠斯通电桥将上述电流变化量或电压变化量转换为上述第一膜层的应变量。
S833：根据第一膜层的应变量确定第一膜层的应力。
具体地，可以预先建立数据表，以存储第一膜层的应变量与应力的一一对应关系，然后可以通过查阅数据表即可获取上述第一膜层的当前应变量对应的应力。
区别于现有技术，本实施例中的膜层应力测试方法，通过利用柔性显示面板的阵列基板膜层结构中设置的应力传感器，能够定量测试柔性显示面板内部膜层在卷曲或弯折状态下的应力情况，进而能够及时对柔性显示面板的损伤作出预警。
请参阅图11，图11是本申请实施例提供的显示面板的结构示意图。该显示面板90包括上述任一实施例的阵列基板91，其中，阵列基板91包括基体、以及位于基体上的第一膜层和第一应变传感器，其中，第一膜层上设有第一安装槽，第一应变传感器位于该第一安装槽内，且用于检测第一膜层的应力。
区别于现有技术，本实施例中的显示面板，通过在柔性显示面板的阵列基板膜层结构中设置应力传感器，能够定量测试柔性显示面板内部膜层在卷曲或弯折状态下的应力情况，进而能够及时对柔性显示面板的损伤作出预警。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (20)

  1. 一种阵列基板，其包括：
    基体；
    位于所述基体上的第一膜层，所述第一膜层上设有第一安装槽；
    位于所述第一安装槽内的第一应变传感器，其中，所述第一应变传感器用于检测所述第一膜层的应力。
  2. 根据权利要求1所述的阵列基板，其中，所述第一应变传感器包括电阻式应变传感器、电容式应变传感器、电感式应变传感器或光学式应变传感器。
  3. 根据权利要求1所述的阵列基板，其中，所述第一应变传感器的材质与所述第一膜层的材质相同。
  4. 根据权利要求1所述的阵列基板，其中，所述第一膜层为低温多晶硅层、栅极层、源漏极层或阳极层。
  5. 根据权利要求1所述的阵列基板，其中，所述基体包括弯折区域，所述第一应变传感器的数量为一个或多个，且至少一个所述第一应变传感器位于所述弯折区域上。
  6. 根据权利要求5所述的阵列基板，其中，所述第一应变传感器的数量为多个，所述多个第一应变传感器在所述基体上呈阵列排布。
  7. 根据权利要求1所述的阵列基板，其中，所述第一应变传感器包括输入端部和输出端部，所述输入端部与外界的电路板电连接，所述电路板用于向所述第一应变传感器提供工作电压，所述输出端部与外界的传感器控制单元电连接。
  8. 根据权利要求7所述的阵列基板，其中，所述阵列基板还包括第一连接线路和第二连接线路，所述第一连接线路和第二连接线路与所述第一应变传感器同层设置，所述第一连接线路用于实现所述输入端部与所述电路板之间的电连接，所述第二连接线路用于实现所述输出端部与所述传感器控制单元之间的电连接。
  9. 根据权利要求1所述的阵列基板，其中，所述阵列基板还包括绝缘层、第二膜层和第二应变传感器，所述绝缘层位于所述第一膜层和第一应变传感器上，所述第二膜层位于所述绝缘层上，所述第二膜层上设有第二安装槽，所述第二应变传感器位于所述第二安装槽内，其中，所述第二应变传感器用于检测所述第二膜层的应力。
  10. 一种膜层应力测试方法，其应用于阵列基板，所述阵列基板包括：基体；位于所述基体上的第一膜层，所述第一膜层上设有第一安装槽；位于所述第一安装槽内的第一应变传感器，其中，所述第一应变传感器用于检测所述第一膜层的应力；所述膜层应力测试方法包括：
    启动所述第一应变传感器；
    对所述阵列基板进行弯折或卷曲，并获取所述第一应变传感器的检测参数的变化量；
    根据所述变化量确定所述第一膜层的应力。
  11. 根据权利要求10所述的膜层应力测试方法，其中，所述根据所述变化量确定所述第一膜层的应力，具体包括：
    将所述变化量转换为对应的电流变化量或电压变化量；
    根据所述电流变化量或电压变化量确定所述第一膜层的应变量；
    根据所述第一膜层的应变量确定所述第一膜层的应力。
  12. 一种显示面板，其包括阵列基板，所述阵列基板包括：
    基体；
    位于所述基体上的第一膜层，所述第一膜层上设有第一安装槽；
    位于所述第一安装槽内的第一应变传感器，其中，所述第一应变传感器用于检测所述第一膜层的应力。
  13. 根据权利要求12所述的显示面板，其中，所述第一应变传感器包括电阻式应变传感器、电容式应变传感器、电感式应变传感器或光学式应变传感器。
  14. 根据权利要求12所述的显示面板，其中，所述第一应变传感器的材质与所述第一膜层的材质相同。
  15. 根据权利要求12所述的显示面板，其中，所述第一膜层为低温多晶硅层、栅极层、源漏极层或阳极层。
  16. 根据权利要求12所述的显示面板，其中，所述基体包括弯折区域，所述第一应变传感器的数量为一个或多个，且至少一个所述第一应变传感器位于所述弯折区域上。
  17. 根据权利要求16所述的显示面板，其中，所述第一应变传感器的数量为多个，所述多个第一应变传感器在所述基体上呈阵列排布。
  18. 根据权利要求12所述的显示面板，其中，所述第一应变传感器包括输入端部和输出端部，所述输入端部与外界的电路板电连接，所述电路板用于向所述第一应变传感器提供工作电压，所述输出端部与外界的传感器控制单元电连接。
  19. 根据权利要求17所述的显示面板，其中，所述阵列基板还包括第一连接线路和第二连接线路，所述第一连接线路和第二连接线路与所述第一应变传感器同层设置，所述第一连接线路用于实现所述输入端部与所述电路板之间的电连接，所述第二连接线路用于实现所述输出端部与所述传感器控制单元之间的电连接。
  20. 根据权利要求12所述的显示面板，其中，所述阵列基板还包括绝缘层、第二膜层和第二应变传感器，所述绝缘层位于所述第一膜层和第一应变传感器上，所述第二膜层位于所述绝缘层上，所述第二膜层上设有第二安装槽，所述第二应变传感器位于所述第二安装槽内，其中，所述第二应变传感器用于检测所述第二膜层的应力。
PCT/CN2020/087398 2020-01-07 2020-04-28 一种阵列基板、膜层应力测试方法和显示面板 WO2021139050A1 (zh)

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