WO2021135541A1 - 一种预失真处理方法、装置、设备和存储介质 - Google Patents

一种预失真处理方法、装置、设备和存储介质 Download PDF

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Publication number
WO2021135541A1
WO2021135541A1 PCT/CN2020/122937 CN2020122937W WO2021135541A1 WO 2021135541 A1 WO2021135541 A1 WO 2021135541A1 CN 2020122937 W CN2020122937 W CN 2020122937W WO 2021135541 A1 WO2021135541 A1 WO 2021135541A1
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Prior art keywords
radio frequency
signal
envelope
current
input signal
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PCT/CN2020/122937
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English (en)
French (fr)
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陈松坤
张哲远
宁东方
戴征坚
武晓芳
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中兴通讯股份有限公司
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Priority to EP20909213.9A priority Critical patent/EP4087203A4/en
Priority to US17/790,158 priority patent/US20230043352A1/en
Publication of WO2021135541A1 publication Critical patent/WO2021135541A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/497—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems by correlative coding, e.g. partial response coding or echo modulation coding transmitters and receivers for partial response systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0475—Circuits with means for limiting noise, interference or distortion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0408—Circuits with power amplifiers
    • H04B2001/0425—Circuits with power amplifiers with linearisation using predistortion

Definitions

  • This application relates to the field of wireless communication networks and digital signal processing, and in particular to a predistortion processing method, device, equipment, and storage medium.
  • the envelope tracking (ET) technology stands out due to its high efficiency, reliability, and easy implementation.
  • the core idea of the ET technology solution is to adjust the drain or source voltage of the PA according to the envelope signal of the RF input signal, so that it changes with the envelope signal of the RF input signal, and reduces the PA input in low-power signals. The power loss at the time, thereby improving efficiency.
  • the working state of the envelope link will be affected by the radio frequency link and distortion will occur. This distortion will in turn cause the distortion of the PA output signal of the radio frequency link and reduce the linearity of the PA.
  • This application provides a method, device, device, and storage medium for predistortion processing.
  • an embodiment of the present application provides a predistortion processing method, including: determining a current envelope signal corresponding to a current radio frequency input signal; correcting the current envelope signal by using an envelope correction parameter table to obtain a corrected Envelope signal; determine the radio frequency input signal after DPD processing based on the current envelope signal, the current radio frequency input signal, and radio frequency digital predistortion DPD parameter table; perform the DPD processing on the DPD based on the corrected envelope signal The radio frequency input signal is controlled to obtain the current radio frequency output signal.
  • an embodiment of the present application provides a predistortion processing device, including: an envelope signal determination module, an envelope correction module, a radio frequency DPD module, and a radio frequency signal output module.
  • the envelope signal determination module is configured to determine The current envelope signal corresponding to the current radio frequency input signal;
  • the envelope signal correction module is configured to correct the current envelope signal using the envelope correction parameter table to obtain the corrected envelope signal;
  • the radio frequency DPD module is configured To determine the radio frequency input signal after DPD processing based on the current envelope signal, the current radio frequency input signal, and the radio frequency digital predistortion DPD parameter table;
  • the radio frequency signal output module is configured to be based on the corrected envelope signal pair The radio frequency input signal processed by the DPD is controlled to obtain the current radio frequency output signal.
  • an embodiment of the present application provides a device, including: one or more processors; a memory, configured to store one or more programs; when the one or more programs are used by the one or more processors Execution, so that the one or more processors implement any one of the methods in the embodiments of the present application.
  • the embodiments of the present application provide a storage medium that stores a computer program that implements any one of the methods in the embodiments of the present application when the computer program is executed by a processor.
  • Figure 1 is a structural diagram of an envelope tracking power amplifier system in the prior art
  • 2a and 2b are schematic diagrams of two-channel signal output caused by mutual coupling between the RF input signal and the envelope signal of the existing ET-PA system;
  • FIG. 3 is a flowchart of a predistortion processing method provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a predistortion processing apparatus provided by an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of an ET-PA system that takes into account both high efficiency and high linearity provided by an embodiment of the present application;
  • 6a, 6b, and 6c are schematic diagrams of two output signals after removing the coupling effect of the radio frequency input signal and the envelope signal according to an embodiment of the present application;
  • FIG. 7 is a working flowchart of an ET-PA system that takes into account both high efficiency and high linearity provided by an embodiment of the present application;
  • FIG. 8 is an internal structure diagram of an envelope correction module proposed in an embodiment of the present application.
  • FIG. 9 is an internal structure diagram of a radio frequency DPD module proposed in an embodiment of the present application.
  • FIG. 10 is an internal structure diagram of a delay control module proposed in an embodiment of the present application.
  • FIG. 11 is an internal structure diagram of a fractional delay filter proposed in an embodiment of the present application.
  • FIG. 12 is a schematic structural diagram of the ET-PA system provided by an embodiment of the present application applied to a GSM scenario
  • FIG. 13 is a schematic structural diagram of an ET-PA system provided by an embodiment of the present application applied to a low-frequency scene;
  • FIG. 14 is a schematic structural diagram of an ET-PA system provided by an embodiment of the present application applied to a 5G millimeter wave scenario;
  • FIG. 15 is a schematic structural diagram of a device provided by an embodiment of the present application.
  • FIG. 1 is a structural diagram of an envelope tracking power amplifier system in the prior art.
  • the data in the system includes: radio frequency input signal X, envelope signal E, and digital pre-distortion (Digital Pre-Distortion) according to different processing links.
  • DPD digital pre-distortion
  • the processed radio frequency input signal Y the voltage signal Ev modulated by the power demodulator EA, and the radio frequency output signal Z amplified by the PA.
  • the envelope shaping module 001 is used to extract and shape the envelope of the radio frequency input signal X to obtain the envelope signal E; the DPD module 002 is used to perform DPD on the radio frequency input signal X of the radio frequency link Process to obtain the radio frequency input signal Y after DPD processing; the DAC module 003 is used for the digital-to-analog conversion of the radio frequency input signal Y and the envelope signal E after DPD processing, and the EA modulation module 004 outputs the modulated signal according to the input envelope signal E Voltage signal Ev; PA module 005 amplifies the input radio frequency input signal Y that has undergone DPD processing to obtain radio frequency output signal Z; DPD training module 006 collects and preprocesses the radio frequency output signal Z output by PA, and based on the radio frequency input signal The equivalent baseband information fed back by X and RF output signal Z completes DPD parameter training and LUT data generation.
  • FIGS. 2a and 2b are schematic diagrams of two-channel signal output caused by mutual coupling between the RF input signal and the envelope signal of the existing ET-PA system.
  • the frequency points of the envelope signal are 0MHz and 3MHz
  • the frequency points of the RF input signal are 5MHz and 23MHz.
  • the EA output signal has high-order modulation distortion of the RF input signal differential frequency of 18MHz and intermodulation distortion with the envelope signal, which seriously affects the accuracy of the EA output voltage Ev.
  • FIG. 3 is a flowchart of a predistortion processing method provided by an embodiment of the present application.
  • the method may be suitable for processing the predistortion of ET-PA.
  • the method may be executed by the predistortion processing device provided in the present application, and the predistortion processing device may be implemented by software and/or hardware.
  • the predistortion processing method provided by the embodiment of the present application mainly includes steps S11, S12, S13, and S14.
  • the current radio frequency input signal refers to the radio frequency signal input to the ET-PA system at the current moment.
  • the controlling the DPD-processed radio frequency input signal based on the corrected envelope signal to obtain the current radio frequency output signal includes: adjusting the corrected envelope signal Perform integer point delay and fractional multiple delay to obtain the delayed envelope signal; perform integer point delay and fractional multiple delay on the radio frequency input signal processed by the DPD; obtain the delayed RF input Signal; converting the delayed envelope signal into an analog envelope signal, and converting the delayed radio frequency input signal into an analog radio frequency input signal; using the analog envelope signal to control the analog radio frequency input signal Perform power modulation to obtain the current radio frequency output signal that meets the power requirement.
  • the step of controlling the DPD-processed radio frequency input signal based on the corrected envelope signal to obtain the current radio frequency output signal further includes: adding the current radio frequency input signal , The corrected radio frequency input signal, the current radio frequency output signal, and multiple historical radio frequency input signals are substituted into a preset envelope model expression to determine the envelope correction parameters corresponding to the current envelope signal; based on the current The envelope signal and the envelope correction parameter corresponding to the current envelope signal update the envelope correction parameter table.
  • the preset envelope model expression is:
  • a km is the envelope correction parameter corresponding to the envelope signal at the nth time
  • X′(n) is the radio frequency input signal corrected by the radio frequency input signal at the nth time
  • X(n) is the radio frequency input at the nth time Signal
  • Z(n) is the radio frequency output signal at the nth time
  • X(nm) is the radio frequency input signal at the nmth time
  • L is the number of historical radio frequency input signals
  • K is any positive integer
  • m is greater than or equal to 0 N is a positive integer greater than m.
  • the value of the current radio frequency input signal is substituted into the preset envelope model expression
  • K can be set according to the actual operating conditions of the system.
  • K can be any positive integer between 1-10.
  • k are all a matrix of numbers. In this application, for the convenience of description, it is described in numerical form.
  • the method further includes: outputting multiple historical radio frequency signals
  • the feedback equivalent baseband signal, multiple historical RF input signals, multiple historical envelope signals, and the current RF input signal are substituted into the preset DPD model expression to determine that the current RF input signal and the current envelope signal are common Corresponding radio frequency DPD parameters; update the radio frequency DPD parameter table based on the current radio frequency input signal, the current envelope signal, and the radio frequency DPD parameters corresponding to the current radio frequency input signal and the current envelope signal.
  • the DPD model expression is:
  • C km is the radio frequency DPD parameter corresponding to the radio frequency input signal at the nth time and the current envelope signal
  • X(n) is the radio frequency input signal at the nth time
  • X(nm 1 ) is the radio frequency input signal at the nm 1st time.
  • RF input signal Z′(nm 2 ) is the equivalent baseband signal of the historical output RF signal fed back at time nm 2
  • E(nm 3 ) is the envelope signal at time nm 3
  • L is the historical RF input signal
  • K is any positive integer
  • m 1 , m 2 and m 3 are all positive integers smaller than n.
  • m 1 , m 2 and m 3 may be equal or unequal, which is not limited in this embodiment.
  • the value of the equivalent baseband signal after feedback of multiple historical output radio frequency signals is substituted into Z′(nm 2 ) in the preset DPD model expression, and the value of the current radio frequency output signal is substituted into the preset DPD model expression.
  • in the DPD model expression multiple historical RF input signals are substituted into X(nm 1 ) in the preset DPD model expression, and multiple historical envelope signals are substituted into the preset DPD model expression.
  • the calculation is performed to obtain the radio frequency DPD parameter C km corresponding to the current radio frequency input signal and the current envelope signal.
  • K can be set according to the actual operating conditions of the system.
  • K can be any positive integer between 1-10.
  • the correcting the current envelope signal by using the envelope correction parameter table to obtain the corrected envelope signal includes: correcting the current envelope signal based on the current envelope signal. Query in the parameter table to determine the current correction parameter corresponding to the current envelope signal; use the current correction parameter to correct the current envelope signal to obtain the corrected envelope signal.
  • the determining the radio frequency input signal after DPD processing based on the current envelope signal, the current radio frequency input signal, and the radio frequency digital predistortion DPD parameter table includes: inputting the current radio frequency Signal modulus calculation to obtain the current radio frequency input signal modulus; based on the current envelope signal and the current radio frequency input signal modulus, query in the radio frequency DPD parameter table to obtain the current DPD parameters; use the current The DPD parameter processes the current radio frequency input signal to obtain the radio frequency input signal processed by the DPD.
  • the above embodiment directly uses the envelope signal to control the radio frequency input signal after DPD processing to obtain the current output signal.
  • the voltage control signal after envelope signal conversion is used to control the radio frequency input signal after DPD processing to obtain the current output signal.
  • the steps of using the voltage control signal converted from the envelope signal to control the RF input signal after DPD processing mainly include: determining the current envelope signal corresponding to the current RF input signal; determining synchronization with the current RF input signal by means of a look-up table index Using the voltage correction parameter table to correct the synchronized voltage control signal to obtain a corrected voltage control signal; based on the synchronized voltage control signal, the current radio frequency input signal, and radio frequency digital predistortion DPD The parameter table determines the RF input signal after DPD processing;
  • the radio frequency input signal processed by the DPD is controlled based on the corrected voltage control signal to obtain a current radio frequency output signal.
  • FIG. 4 is a schematic structural diagram of a predistortion processing apparatus provided by an embodiment of the present application. This method may be suitable for processing the predistortion of ET-PA.
  • the predistortion processing device can be implemented by software and/or hardware.
  • the predistortion processing device mainly includes an envelope signal determination module 41, an envelope correction module 42, a radio frequency DPD module 43, and a radio frequency signal output module 44, among which,
  • the envelope signal determining module 41 is configured to determine the current envelope signal corresponding to the current radio frequency input signal
  • the envelope signal correction module 42 is configured to correct the current envelope signal by using an envelope correction parameter table to obtain a corrected envelope signal;
  • the radio frequency DPD module 43 is configured to determine the radio frequency input signal processed by the DPD based on the current envelope signal, the current radio frequency input signal, and the radio frequency digital predistortion DPD parameter table;
  • the radio frequency signal output module 44 is configured to control the DPD processed radio frequency input signal based on the corrected envelope signal to obtain a current radio frequency output signal.
  • the radio frequency signal output module 44 is configured to perform integer point delay and fractional delay on the corrected envelope signal to obtain the delayed envelope signal;
  • the radio frequency input signal after the DPD processing is subjected to integer point delay and fractional delay; the delayed radio frequency input signal is obtained; the delayed envelope signal is converted into an analog envelope signal, and the delayed envelope signal is converted into an analog envelope signal.
  • the timed radio frequency input signal is converted into an analog radio frequency input signal; the analog envelope signal is used to control the analog radio frequency input signal to perform power modulation to obtain the current radio frequency output signal that meets the power requirement.
  • the device further includes: an envelope correction parameter table update module configured to combine the current radio frequency input signal, the corrected radio frequency input signal, the current radio frequency output signal, and Multiple historical radio frequency input signals are substituted into a preset envelope model expression to determine the envelope correction parameter corresponding to the current envelope signal; update based on the current envelope signal and the envelope correction parameter corresponding to the current envelope signal The envelope correction parameter table.
  • an envelope correction parameter table update module configured to combine the current radio frequency input signal, the corrected radio frequency input signal, the current radio frequency output signal, and Multiple historical radio frequency input signals are substituted into a preset envelope model expression to determine the envelope correction parameter corresponding to the current envelope signal; update based on the current envelope signal and the envelope correction parameter corresponding to the current envelope signal The envelope correction parameter table.
  • the preset envelope model expression is:
  • a km is the envelope correction parameter corresponding to the envelope signal at the nth time
  • X′(n) is the radio frequency input signal corrected by the radio frequency input signal at the nth time
  • X(n) is the radio frequency input at the nth time Signal
  • Z(n) is the RF output signal at the nth moment
  • X(nm) is the RF input signal at the nmth moment
  • L is the number of historical RF input signals
  • K is any positive integer
  • n is greater than m Positive integer.
  • the device further includes: a radio frequency DPD parameter table update module, which feeds back equivalent baseband signals of multiple historical output radio frequency signals, multiple historical radio frequency input signals, and multiple historical envelope signals Substituting the current radio frequency input signal into a preset DPD model expression to determine the radio frequency DPD parameters corresponding to the current radio frequency input signal and the current envelope signal; based on the current radio frequency input signal, the current envelope signal and The radio frequency DPD parameter table corresponding to the current radio frequency input signal and the current envelope signal is updated.
  • a radio frequency DPD parameter table update module which feeds back equivalent baseband signals of multiple historical output radio frequency signals, multiple historical radio frequency input signals, and multiple historical envelope signals Substituting the current radio frequency input signal into a preset DPD model expression to determine the radio frequency DPD parameters corresponding to the current radio frequency input signal and the current envelope signal; based on the current radio frequency input signal, the current envelope signal and The radio frequency DPD parameter table corresponding to the current radio frequency input signal and the current envelope signal is updated.
  • the preset DPD model expression is:
  • C km is the radio frequency DPD parameter corresponding to the radio frequency input signal at the nth time and the current envelope signal
  • X(n) is the radio frequency input signal at the nth time
  • X(nm 1 ) is the radio frequency input signal at the nm 1st time.
  • RF input signal Z′(nm 2 ) is the equivalent baseband signal of the historical output RF signal fed back at time nm 2
  • E(nm 3 ) is the envelope signal at time nm 3
  • L is the historical RF input signal
  • K is any positive integer
  • m 1 , m 2 and m 3 are all positive integers smaller than n.
  • the envelope signal correction module 42 is configured to query the envelope correction parameter table based on the current envelope signal to determine the current correction parameter corresponding to the current envelope signal ; Use the current correction parameter to correct the current envelope signal to obtain the corrected envelope signal.
  • the radio frequency DPD module 43 is configured to perform modulo calculation on the current radio frequency input signal to obtain the current radio frequency input signal modulus; based on the current envelope signal and the current radio frequency input The signal modulus is queried in the radio frequency DPD parameter table to obtain current DPD parameters; the current DPD parameter is used to process the current radio frequency input signal to obtain the radio frequency input signal processed by the DPD.
  • FIG. 5 is a schematic structural diagram of an ET-PA system that provides both high efficiency and high linearity according to an embodiment of the application, as shown in FIG. 5
  • the ET-PA system that takes into account both high efficiency and high linearity includes: an envelope extraction module, an envelope shaping module 101, an envelope correction module 102, an envelope link delay control module 104, an EA modulation module 106, The radio frequency DPD module 103, the radio frequency link delay control module 104, the Digital Analog Converter (DAC) module 105, the PA module 107, the DPD parameter training module 108, and so on.
  • DAC Digital Analog Converter
  • the envelope extraction module is used to detect, track, and extract the envelope information of the current radio frequency input signal X, convert it into a corresponding current envelope signal E and output it to the envelope shaping module 101.
  • the envelope shaping module 101 is used to receive the current envelope signal E output by the envelope extraction module.
  • the envelope correction module 102 is used to correct the current envelope signal E to obtain the corrected envelope signal Es, so as to reduce the influence of the radio frequency link signal on the output voltage Ev of the EA modulation module 106 in the envelope link , To ensure that the error of the output voltage Ev of the EA modulation module 106 is within the allowable range.
  • the envelope link delay control module 104 is used for the envelope signal Es after delay or advance correction to obtain the envelope signal Es-t after delay control, wherein the coarse delay correction can ensure the DPD processed envelope signal Es-t
  • the synchronization delay difference between the RF input signal Y and the corrected envelope signal Es is controlled within the unit sampling point; the fractional interpolation (Farrow) filter module is used to fine-tune the voltage control signal delay amount to ensure DPD
  • the synchronization delay difference between the processed radio frequency input signal Y and the corrected envelope signal Es and the current envelope signal is reduced to within the fractional multiple sampling point.
  • the Digital Analog Converter (DAC) module 105 is used to convert the current envelope signal Es-t after the delay control from the digital domain to the analog domain, and transmit it to the EA modulation module 106.
  • DAC Digital Analog Converter
  • the EA modulation module 106 is configured to receive and process the envelope signal Es-t after the delay control to obtain the output voltage Ev, and set the output voltage Ev as the voltage provided by the drain of the PA.
  • the radio frequency DPD module 103 is used to perform DPD processing on the current radio frequency input signal X to obtain the radio frequency input signal Y after DPD processing, so as to reduce the influence of other devices in the radio link on the radio frequency input signal and ensure the linearity of the PA output signal .
  • the radio frequency link delay control module 104 is used to lag or advance the current radio frequency input signal Y after DPD processing to the radio frequency input signal Yt after delay control, wherein the coarse delay correction is used to ensure the radio frequency input after DPD processing
  • the synchronization delay difference between the signal Y and the corrected envelope signal Es is reduced to within the unit sampling point.
  • the Farrow filter module is used to fine-tune the RF input signal delay amount to ensure that the DPD processed RF input signal Y and correction
  • the synchronization delay difference between the subsequent envelope signals Es is reduced to within the fractional sampling point.
  • the DAC (Digital Analog Converter, DAC) module 105 is also used to convert the time-delay controlled radio frequency input signal Y-t in the radio frequency link from the digital domain to the analog domain, and transmit it to the PA module 107.
  • DAC Digital Analog Converter
  • the PA module 107 is used to amplify the radio frequency input signal Y-t after the time delay control of the analog domain after the radio frequency link passes through the DAC, and output the current radio frequency input signal that meets the power requirement.
  • the drain or source power supply of the PA is completed by the output voltage Ev of the aforementioned EA modulation module.
  • the DPD parameter training module 108 is used to collect and process the radio frequency output signal Z output from the PA module 107, the equivalent baseband signal Z'obtained after the analog-to-digital converter, and complete the envelope correction parameter extraction, and the radio frequency DPD The parameters are extracted, and the extracted parameters are mapped into a look-up table and then passed to the envelope correction module and the radio frequency DPD module.
  • the function of the DPD parameter training module 108 includes data preprocessing operations such as the equivalent baseband signal fed back by the RF output signal and the current RF input signal, the current envelope signal delay alignment, energy alignment, phase alignment, etc., with the help of the current RF input signal , The corrected RF input signal, the current RF output signal and multiple historical RF input signals to extract the envelope correction module parameters, and the equivalent baseband signal after feedback from multiple historical output RF signals, multiple historical RF input signals, multiple A historical envelope signal and the current radio frequency input signal extract radio frequency DPD parameters.
  • the extraction of envelope correction parameters in the DPD parameter training module can be done but not limited to the following ways: take
  • the preset envelope model expression can be expressed as:
  • a km is the envelope correction parameter corresponding to the envelope signal at the nth time, that is, the envelope correction parameter to be obtained
  • X′(n) is the radio frequency input signal after the radio frequency input signal correction at the nth time
  • X (n) is the radio frequency input signal at time n
  • Z(n) is the radio frequency output signal at time n
  • X(nm) is the radio frequency input signal at time nm
  • L is the number of historical radio frequency input signals
  • K is Any positive integer
  • n is a positive integer greater than m.
  • the calculation can be realized with the help of LS algorithm or LMS algorithm, and LUT data LUTE[m] is generated through a look-up table and passed to the envelope correction module.
  • the equivalent baseband signal Z′ of the current radio frequency output signal Z can use historical radio frequency input signals, historical envelope signals after envelope shaping, and current radio frequency
  • the input signal is fitted with the current envelope signal. Taking a polynomial as an example, it can be expressed as:
  • C km is the radio frequency DPD parameter corresponding to the radio frequency input signal at time n and the current envelope signal, that is, the radio frequency DPD parameter with the ball
  • X(n) is the radio frequency input signal at time n
  • X(nm 1 ) is the radio frequency input signal at time nm 1
  • Z′(nm 2 ) is the equivalent baseband signal after feedback of the historical output radio frequency signal at time nm 2
  • E(nm 3 ) is the envelope signal at time nm 3
  • L is the number of historical RF input signals
  • K is any positive integer
  • m 1 , m 2 and m 3 are all positive integers less than n.
  • the 2D-LUT data LUTR[m,n] (where m and n are 0, 1,..., L-1) obtained through the above method is passed to the DPD module to update its internal LUT data
  • the envelope correction module is introduced in the envelope link, which can continuously and closely complete the envelope tracking, and by adjusting the envelope shaping and envelope correction modules Implementation strategy to reduce the influence of RF link signals on envelope link signals, so that PA can maintain high efficiency in various working modes; use the envelope output signal after envelope link shaping as the RF link DPD module One of the input signals, to improve the completeness of the radio frequency DPD model, enhance its linearization ability, and effectively improve the linearity of the PA output signal; realize the coarse delay of the two-channel signal integer point level, and use the fractional delay filter to achieve The dynamically adjustable fractional delay configuration effectively improves the delay alignment accuracy of the envelope signal and the RF input signal.
  • Figures 6a, 6b, and 6c are schematic diagrams of two output signals after removing the coupling effect of the RF input signal and the envelope signal provided by the application embodiment.
  • the corrected EA output signal is shown in Figure 6a, and the RF input signal interference in the EA output signal is effectively removed.
  • the PA output signal after DPD modeling considering the envelope signal is shown in Figure 6b
  • the PA output signal after DPD modeling without considering the envelope signal is shown in Figure 6c.
  • the radio frequency output index of the system can be effectively improved.
  • Fig. 7 is a working flow chart of an ET-PA system with high efficiency and high linearity provided by the application embodiment, which mainly includes steps S701, S702, S703, S704, and S705.
  • S701 Perform delay alignment on the radio frequency and envelope link to ensure the synchronization of the radio frequency and envelope link;
  • S702 The radio frequency DPD module and the envelope correction module are initialized, and preset or iteratively stable coefficients are written, and the LUT data of the envelope shaping module 101 is initialized to a preset mapping table of a certain shaping function.
  • the delay control modules 104(1) and 104(2) By adjusting the delay control modules 104(1) and 104(2), the voltage Ev output by the EA modulation module and the RF input signal Y_t processed by the DPD reach the PA at the same time, and then the PA module 107 outputs the amplified RF output signal Z.
  • the DPD training module 108 collects the RF output signal Z and performs data preprocessing on it to obtain the feedback signal Z'synchronized with the RF input signal X; extract the envelope with the help of the envelope signal of the RF input signal X and the feedback signal Z' Correct the module parameters, and extract the RF DPD parameters with the help of the RF input signal X, the feedback signal Z', and the envelope signal E after envelope shaping, and pass the parameters to the envelope correction module 102 and the RF DPD module 103 respectively for implementation Corresponding to the update of the module coefficient.
  • the manner of extracting envelope correction parameters and DPD parameters can refer to the description in the foregoing embodiment, and details are not described in this embodiment.
  • S705 Repeat S703 and S704 to continuously update the LUT tables of the envelope correction module and the RF DPD module until the DPD performance is stable, and monitor the system status in real time. If the RF link and the envelope link are synchronized during system operation Abnormal need to go back to S701 again.
  • Fig. 8 is an internal structure diagram of an envelope correction module proposed in an embodiment of the present application.
  • Z- dn 0,1,...N
  • the LUT data LUTE of the envelope correction model is stored in the LUT, which is obtained by the DPD training module 108 and passed to the envelope correction module 102.
  • the corrected envelope signal Es is output.
  • Fig. 9 is an internal structure diagram of a radio frequency DPD module proposed in an embodiment of the present application.
  • the current radio frequency input signal X passes through the modulus module 1030 to obtain the modulus value and the envelope signal E after the envelope shaping 101 passes through the signal delay module 1032 and then passes through the 2D-LUT module 1031 to obtain the index output DPD processed radio frequency input signal Y.
  • 1302 is a signal delay module, which is the delay configuration of the radio frequency input signal, the modulus of the radio frequency input signal, and the envelope signal respectively.
  • the data LUTR[m,n] in the 2D-LUT module (where m and n take 0, 1,..., L-1) is extracted and transmitted by the DPD training module 108.
  • Fig. 10 is an internal structure diagram of a delay control module proposed in an embodiment of the present application. It includes two parts: coarse delay 1040 and fine delay 1041. The coarse delay is realized by delaying the integer point clock, and the fine delay is realized by the fractional delay filter. The specific implementation structure is shown in Figure 11.
  • FIG. 11 is an internal structure diagram of the fractional delay filter proposed in an embodiment of the present application. In FIG. 11, the input signal passes through a series of delay configurations 10410, multiplier 10411, and adder 10412 to obtain the final fractional multiple Delayed output.
  • Fig. 12 is a schematic structural diagram of the ET-PA system provided by an embodiment of the present application applied to a GSM scenario, that is, the ET architecture is used in a GSM system scenario.
  • the figure shows a 4-carrier 6M signal configuration, and one envelope modulator supplies power for one PA.
  • the figure shows the state of each node's signal in the form of a power spectrum.
  • the gray dashed line in Figure 1013 is the envelope signal power spectrum without envelope correction
  • the black solid line is the envelope signal power spectrum with envelope correction
  • the gray dashed line in Figure 1014 is the EA output signal power spectrum without envelope correction.
  • the black solid line is the power spectrum of the EA output signal for envelope correction.
  • FIG. 13 is a schematic structural diagram of the ET-PA system provided by an embodiment of the application applied to a 5G low-frequency scenario.
  • the ET-PA system architecture is used in a 5G low-frequency scenario.
  • the scenario provided in this embodiment is a mixed mode configuration of 5G NR100M and LTE20M.
  • the envelope modulator powers a PA.
  • Figure 13 shows the state of each node's signal in the form of a power spectrogram.
  • the gray dashed line in Figure 1113 is the envelope signal power spectrum without envelope correction
  • the black solid line is the envelope signal power spectrum with envelope correction
  • the gray dashed line in Figure 1114 is the EA output signal power spectrum without envelope correction.
  • the black solid line is the power spectrum of the EA output signal for envelope correction.
  • FIG. 14 is a schematic structural diagram of the ET-PA system provided by an embodiment of the present application applied to a 5G millimeter wave scene.
  • the ET-PA system architecture is used in a 5G millimeter wave scene.
  • the envelope modulator supplies power to the PA in the MIMO state.
  • one envelope modulator corresponds to multiple PAs.
  • the signal in the figure is a single-carrier 400M signal that meets the 5G high-frequency protocol, and shows the state of each node signal in the form of a power spectrum.
  • the gray dashed line in Figure 1215 is the envelope signal power spectrum without envelope correction
  • the black solid line is the envelope signal power spectrum with envelope correction
  • the gray dashed line in Figure 1216 is the EA output signal power spectrum without envelope correction
  • the black solid line is the power spectrum of the EA output signal for envelope correction.
  • FIG. 15 is a schematic structural diagram of a device provided by the present application.
  • the device provided by the present application includes one or more processors 151 and a memory 152; There may be one or more processors 151 in the device.
  • One processor 151 is taken as an example in FIG. 15; the memory 152 is used to store one or more programs; the one or more programs are processed by the one or more programs.
  • the processor 151 executes, so that the one or more processors 151 implement the method described in the embodiment of the present application.
  • the device also includes: an input device 153 and an output device 154.
  • the processor 151, the memory 152, the input device 153, and the output device 154 in the device may be connected through a bus or other methods.
  • the connection through a bus is taken as an example.
  • the input device 153 can be used to receive inputted digital or character information, and generate key signal input related to user settings and function control of the device.
  • the output device 154 may include a display device such as a display screen.
  • the memory 152 can be configured to store software programs, computer-executable programs, and modules, such as program instructions/modules corresponding to the predistortion processing method described in the embodiments of the present application (for example, in the predistortion processing device). Envelope signal determination module 11, envelope correction module 12, radio frequency DPD module 13, output module 14).
  • the memory 152 may include a program storage area and a data storage area.
  • the program storage area may store an operating system and an application program required by at least one function; the data storage area may store data created according to the use of the device, and the like.
  • the memory 152 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other non-volatile solid-state storage devices.
  • the storage 152 may further include a storage remotely provided with respect to the processor 151, and these remote storages may be connected to the device through a network. Examples of the aforementioned networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.
  • An embodiment of the present application further provides a storage medium that stores a computer program, and the computer program implements the predistortion processing method described in any of the embodiments of the present application when the computer program is executed by a processor.
  • the method includes:
  • the radio frequency input signal processed by the DPD is controlled based on the corrected envelope signal to obtain a current radio frequency output signal.
  • a storage medium containing computer-executable instructions provided in the embodiments of the present application and the computer-executable instructions are not limited to the method operations described above, and can also execute the predistortion processing methods provided in any embodiment of the present application. Related operations.
  • ROM Read-Only Memory
  • RAM Random Access Memory
  • FLASH Flash memory
  • hard disk or optical disk etc., including several instructions to make a computer device (which can be a personal computer) , A server, or a network device, etc.) execute the method described in each embodiment of the present application.
  • user terminal encompasses any suitable type of wireless user equipment, such as a mobile phone, a portable data processing device, a portable web browser, or a vehicle-mounted mobile station.
  • the various embodiments of the present application can be implemented in hardware or dedicated circuits, software, logic or any combination thereof.
  • some aspects may be implemented in hardware, while other aspects may be implemented in firmware or software that may be executed by a controller, microprocessor, or other computing device, although the present application is not limited thereto.
  • Computer program instructions can be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code written in any combination of one or more programming languages or Object code.
  • ISA instruction set architecture
  • the block diagram of any logic flow in the drawings of the present application may represent program steps, or may represent interconnected logic circuits, modules, and functions, or may represent a combination of program steps and logic circuits, modules, and functions.
  • the computer program can be stored on the memory.
  • the memory can be of any type suitable for the local technical environment and can be implemented using any suitable data storage technology, such as but not limited to read only memory (ROM), random access memory (RAM), optical storage devices and systems (digital multi-function optical discs) DVD or CD) etc.
  • Computer-readable media may include non-transitory storage media.
  • the data processor can be any type suitable for the local technical environment, such as but not limited to general-purpose computers, special-purpose computers, microprocessors, digital signal processors (DSP), application-specific integrated circuits (ASIC), programmable logic devices (FGPA) And processors based on multi-core processor architecture.
  • DSP digital signal processors
  • ASIC application-specific integrated circuits
  • FGPA programmable logic devices

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Abstract

本申请提出一种预失真处理方法、装置、设备和存储介质，所述方法包括：确定当前射频输入信号对应的当前包络信号；利用包络校正参数表对所述当前包络信号进行校正，得到校正后的包络信号；基于所述当前包络信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号；基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号。

Description

一种预失真处理方法、装置、设备和存储介质
相关申请的交叉引用
本申请基于申请号为201911400195.8、申请日为2019年12月30日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此以引入方式并入本申请。
技术领域
本申请涉及无线通信网络和数字信号处理领域，具体涉及一种预失真处理方法、装置、设备和存储介质。
背景技术
随着无线通信技术的发展，各种高阶调制方式的应用使得无线发射信号的峰均比(Peak-Average Ratio，PAR)逐步增大。为了解决功率放大器(Power Amplifier，PA)PAR逐步增大的问题，包络追踪(Envelope Tracking，ET)技术以其高效率、可靠、易实现等优点脱颖而出。ET技术解决方案的核心思路是根据射频输入信号的包络信号来调节PA的漏极或源极电压，使其跟随射频输入信号的包络信号的变化而变化，减小PA在小功率信号输入时的功率损耗从而提高效率。
而现有的ET技术中，包络链路的工作状态会受到射频链路的影响而出现失真，这种失真随之又会造成射频链路PA输出信号的失真，降低PA的线性。
发明内容
本申请提供一种用于预失真处理方法、装置、设备和存储介质。
第一方面，本申请实施例提供一种预失真处理方法，包括：确定当前射频输入信号对应的当前包络信号；利用包络校正参数表对所述当前包络信号进行 校正，得到校正后的包络信号；基于所述当前包络信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号；基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号。
第二方面，本申请实施例提供一种预失真处理装置，包括：包络信号确定模块、包络校正模块、射频DPD模块、射频信号输出模块，其中，包络信号确定模块，被配置为确定当前射频输入信号对应的当前包络信号；包络信号校正模块，被配置为利用包络校正参数表对所述当前包络信号进行校正，得到校正后的包络信号；射频DPD模块，被配置为基于所述当前包络信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号；射频信号输出模块，被配置为基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号。
第三方面，本申请实施例提供一种设备，包括：一个或多个处理器；存储器，用于存储一个或多个程序；当所述一个或多个程序被所述一个或多个处理器执行，使得所述一个或多个处理器实现如本申请实施例中的任意一种方法。
第四方面，本申请实施例提供本申请实施例提供了一种存储介质，所述存储介质存储有计算机程序，所述计算机程序被处理器执行时实现本申请实施例中的任意一种方法。
关于本申请的以上实施例和其他方面以及其实现方式，在附图说明、具体实施方式和权利要求中提供更多说明。
附图说明
图1是现有技术中的包络追踪功率放大器系统的结构图；
图2a和图2b是现有ET-PA系统射频输入信号与包络信号互耦引起的两路信号输出示意图；
图3是本申请实施例提供的预失真处理方法的流程图；
图4是本申请实施例提供的预失真处理装置的结构示意图；
图5是本申请实施例提供的兼顾高效率和高线性的ET-PA系统的结构示意图；
图6a，6b，6c是本申请实施例提供的去除射频输入信号与包络信号耦合作用后的两路输出信号示意图；
图7是本申请实施例提供的兼顾高效率和高线性的ET-PA系统的工作流程图；
图8是本申请实施例提出的包络校正模块的内部结构图；
图9是本申请实施例提出的射频DPD模块的内部结构图；
图10是本申请实施例提出的时延控制模块的内部结构图；
图11是本申请实施例提出的分数倍时延滤波器的内部结构图；
图12是本申请实施例提供的ET-PA系统应用于GSM场景的结构示意图
图13是本申请实施例提供的ET-PA系统应用于低频场景的结构示意图；
图14是本申请实施例提供的ET-PA系统应用于5G毫米波场景的结构示意图；
图15是本申请实施例提供的一种设备的结构示意图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚明白，下文中将结合附图对本申请的实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行。并且，虽然在流程图中示出了逻辑顺序，但是在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤。
图1是现有技术中的包络追踪功率放大器系统的结构图，该系统中的数据依据其处理环节的不同包括：射频输入信号X、包络信号E、经过数字预失真(Digital Pre-Distortion，DPD)处理的射频输入信号Y、经过电源解调器EA调制后的电压信号Ev，经过PA放大后的射频输出信号Z。
在包络追踪功率放大器系统中，包络成型模块001用于对射频输入信号X进行包络提取和成型，得到包络信号E；DPD模块002用于对射频链路的射频输入信号X进行DPD处理得到经过DPD处理的射频输入信号Y；DAC模块003用于对经过DPD处理的射频输入信号Y和包络信号E的数模转换，EA调制模块004根据输入的包络信号E输出调制后的电压信号Ev；PA模块005对输入的经过DPD处理的射频输入信号Y进行放大，得到射频输出信号Z；DPD训练模块006对PA输出的射频输出信号Z进行采集和预处理，并根据射频输入信号X和射频输出信号Z反馈后的等效基带信息完成DPD参数训练和LUT数据生成。
图2a和图2b是现有ET-PA系统射频输入信号与包络信号互耦引起的两路信号输出示意图。以单音信号为例，包络信号频点为0MHz和3MHz，射频输入信号频点为5MHz和23MHz。如图2a所示，在未进行包络校正前，EA输出信号存在射频输入信号差分频率18MHz的高阶调制失真以及与包络信号的互调失真，严重影响了EA输出电压Ev的准确度。进一步的，如图2b所示，经过DPD处理的射频输入信号Y经过PA后除出现了原始频点的互调失真外(如-31MHz、-13MHz、41MHz、59MHz)，还产生了与包络信号相关的互调失真(如-34MHz、-28MHz、-16MHz、-19MHz等。
如上所述，包络链路的工作状态会受到射频链路的影响而出现失真，而这种失真随之又会造成射频链路PA输出的射频输出信号Z的失真——这是传统的包络追踪功率放大器(Envelope Tracking Power Amplifier，ET-PA)架构难以解决的问题。
图3是本申请实施例提供的预失真处理方法的流程图，该方法可以适用于对ET-PA的预失真进行处理的情况。该方法可以由本申请提供的预失真处理装置执行，该预失真处理装置可以由软件和/或硬件实现。
如图3所示，本申请实施例提供的预失真处理方法主要包括步骤S11、S12S13和S14。
S11、确定当前射频输入信号对应的当前包络信号。
S12、利用包络校正参数表对当前包络信号进行校正，得到校正后的包络信号。
S13、基于当前包络信号、当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号。
S14、基于校正后的包络信号对DPD处理后的射频输入信号进行控制，得到当前射频输出信号。
在本实施例中，当前射频输入信号是指当前时刻输入至ET-PA系统的射频信号。
在一个示例性的实施方式中，所述基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号，包括：对所述校正后的包络信号进行整数点延时和分数倍延时，得到延时后的包络信号；对所述DPD处理后的射频输入信号进行整数点延时和分数倍延时；得到延时后的射频输入信号；将所述延时后的包络信号转换为模拟包络信号，将所述延时后的射频输入信号转换为模拟射频输入信号；利用所述模拟包络信号控制所述模拟射频输入信号进行电源调制，得到满足功率要求的所述当前射频输出信号。
在一个示例性的实施方式中，所述基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号之后，还包括：将所述当前射频输入信号、所述校正后的射频输入信号、所述当前射频输出信号和多个历史射频输入信号代入预设的包络模型表达式确定所述当前包络信号对应的包络校正参数；基于所述当前包络信号和所述当前包络信号对应的包络校正参数更新所述包络校正参数表。
在一个示例性的实施方式中，所述预设的包络模型表达式是：
Figure PCTCN2020122937-appb-000001
其中，A km是第n时刻的包络信号对应的包络校正参数，X′(n)是第n时刻的射频输入信号校正后的射频输入信号，X(n)是第n时刻的射频输入信号，Z(n)是所述第n时刻射频输出信号，X(n-m)是第n-m时刻的射频输入信号，L是历史 射频输入信号的数量，K是任一正整数，m为大于等于0的整数，n是大于m的正整数。
在本实施例中，将当前射频输入信号的取值代入预设的包络模型表达式中的|X(n)|、所述校正后的射频输入信号的取值代入预设的包络模型表达式中的|X′(n)|、所述当前射频输出信号的取值代入预设的包络模型表达式中的|Z(n)|，多个历史射频输入信号代入预设的包络模型表达式中的
Figure PCTCN2020122937-appb-000002
进行计算得到，当前射频输入信号对应的包络校正参数A km。
其中，K的取值可以根据系统的实际运行情况进行设置，在本实施例中，K可以是1-10之间的任一正整数。
需要说明的是，所述当前射频输入信号、所述校正后的射频输入信号、所述当前射频输出信号、多个历史射频输入信号以及预设的包络模型表达式中的|X(n)|、|X′(n)|、|Z(n)|、|X(n-m)| k均是一个数列矩阵，本申请中为了描述方便，将其用数值的形式进行描述。
在一个示例性的实施方式中，所述基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号之后，还包括：将多个历史输出射频信号反馈后的等效基带信号、多个历史射频输入信号、多个历史包络信号和所述当前射频输入信号代入预设DPD模型表达式确定所述当前射频输入信号和所述当前包络信号共同对应的射频DPD参数；基于所述当前射频输入信号、所述当前包络信号和所述当前射频输入信号和所述当前包络信号共同对应的射频DPD参数更新射频DPD参数表。
在一个示例性的实施方式中，所述DPD模型表达式是：
Figure PCTCN2020122937-appb-000003
其中，C km是第n时刻的射频输入信号和所述当前包络信号共同对应的射频DPD参数，X(n)是第n时刻的射频输入信号，X(n-m 1)是第n-m 1时刻的射频输 入信号，Z′(n-m 2)是第n-m 2时刻的历史输出射频信号反馈后的等效基带信号，E(n-m 3)是第n-m 3时刻的包络信号，L是历史射频输入信号的数量，K是任一正整数，m 1、m 2和m 3均是小于n的正整数。m 1、m 2和m 3可以是相等的，也可以是不相等的，本实施例不进行限定。
在本实施例中，将多个历史输出射频信号反馈后的等效基带信号的取值代入预设DPD模型表达式中的Z′(n-m 2)、所述当前射频输出信号的取值代入预设DPD模型表达式中的|X(n)|，多个历史射频输入信号代入预设DPD模型表达式中的X(n-m 1)，多个历史包络信号代入预设DPD模型表达式中的
Figure PCTCN2020122937-appb-000004
进行计算得到，当前射频输入信号和所述当前包络信号共同对应的射频DPD参数C km。
其中，K的取值可以根据系统的实际运行情况进行设置，在本实施例中，K可以是1-10之间的任一正整数。
需要说明的是，多个历史输出射频信号反馈后的等效基带信号、多个历史射频输入信号、多个历史包络信号和所述当前射频输入信号以及预预设DPD模型表达式的|X(n)|、X(n-m 1)、Z′(n-m 2)、
Figure PCTCN2020122937-appb-000005
均是一个数列矩阵，本申请中为了描述方便，将其用数值的形式进行描述。
在一个示例性的实施方式中，所述利用包络校正参数表对所述当前包络信号进行校正，得到校正后的包络信号，包括：基于所述当前包络信号在所述包络校正参数表中进行查询，确定所述当前包络信号对应的当前校正参数；利用所述当前校正参数对所述当前包络信号进行校正，得到所述校正后的包络信号。
在一个示例性的实施方式中，所述基于所述当前包络信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号，包括：对所述当前射频输入信号进行求模计算，得到当前射频输入信号模值；基于所述当前包络信号和所述当前射频输入信号模值在所述射频DPD参数表中进行查询，得到当前DPD参数；利用所述当前DPD参数对所述当前射频输入信号进行处理，得到所述DPD处理后的射频输入信号。
需要说明的是，上述实施例是直接利用包络信号对DPD处理之后的射频输入信号进行控制得到当前输出信号。本申请实施例中，提供另外一种实施例方式，利用包络信号转换后的电压控制信号对DPD处理之后的射频输入信号进行控制得到当前输出信号。
利用包络信号转换后的电压控制信号对DPD处理之后的射频输入信号进行控制的步骤主要包括：确定当前射频输入信号对应的当前包络信号；通过查找表索引的方式确定与当前射频输入信号同步的电压控制信号，利用电压校正参数表对所述同步的电压控制信号进行校正，得到校正后的电压控制信号；基于所述同步的电压控制信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号；
基于所述校正后的电压控制信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号。
需要说明的是，电压校正参数表和射频DPD参数表的确定步骤与上述实施例中的包络校正参数表和射频DPD参数表的步骤相似，具体可以参照上述实施例中的描述，本实施例中不再进行赘述。
图4是本申请实施例提供的预失真处理装置的结构示意图，该方法可以适用于对ET-PA的预失真进行处理的情况。该预失真处理装置可以由软件和/或硬件实现。
如图4所示，本申请实施例提供的预失真处理装置主要包括包络信号确定模块41、包络校正模块42、射频DPD模块43、射频信号输出模块44，其中，
包络信号确定模块41，被配置为确定当前射频输入信号对应的当前包络信号；
包络信号校正模块42，被配置为利用包络校正参数表对所述当前包络信号进行校正，得到校正后的包络信号；
射频DPD模块43，被配置为基于所述当前包络信号、所述当前射频输入 信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号；
射频信号输出模块44，被配置为基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号。
在一个示例性的实施方式中，射频信号输出模块44，被配置为对所述校正后的包络信号进行整数点延时和分数倍延时，得到延时后的包络信号；对所述DPD处理后的射频输入信号进行整数点延时和分数倍延时；得到延时后的射频输入信号；将所述延时后的包络信号转换为模拟包络信号，将所述延时后的射频输入信号转换为模拟射频输入信号；利用所述模拟包络信号控制所述模拟射频输入信号进行电源调制，得到满足功率要求的所述当前射频输出信号。
在一个示例性的实施方式中，所述装置还包括：包络校正参数表更新模块，被设置为将所述当前射频输入信号、所述校正后的射频输入信号、所述当前射频输出信号和多个历史射频输入信号代入预设的包络模型表达式确定所述当前包络信号对应的包络校正参数；基于所述当前包络信号和所述当前包络信号对应的包络校正参数更新所述包络校正参数表。
在一个示例性的实施方式中，所述预设的包络模型表达式是：
Figure PCTCN2020122937-appb-000006
其中，A km是第n时刻的包络信号对应的包络校正参数，X′(n)是第n时刻的射频输入信号校正后的射频输入信号，X(n)是第n时刻的射频输入信号，Z(n)是所述第n时刻射频输出信号，X(n-m)是第n-m时刻的射频输入信号，L是历史射频输入信号的数量，K是任一正整数，n是大于m的正整数。
在一个示例性的实施方式中，所述装置还包括：射频DPD参数表更新模块，将多个历史输出射频信号反馈后的等效基带信号、多个历史射频输入信号、多个历史包络信号和所述当前射频输入信号代入预设DPD模型表达式确定所述当前射频输入信号和所述当前包络信号共同对应的射频DPD参数；基于所述当前射频输入信号、所述当前包络信号和所述当前射频输入信号和所述当前包络信号共同对应的射频DPD参数更新射频DPD参数表。
在一个示例性的实施方式中，所述预设DPD模型表达式是：
Figure PCTCN2020122937-appb-000007
其中，C km是第n时刻的射频输入信号和所述当前包络信号共同对应的射频DPD参数，X(n)是第n时刻的射频输入信号，X(n-m 1)是第n-m 1时刻的射频输入信号，Z′(n-m 2)是第n-m 2时刻的历史输出射频信号反馈后的等效基带信号，E(n-m 3)是第n-m 3时刻的包络信号，L是历史射频输入信号的数量，K是任一正整数，m 1、m 2和m 3均是小于n的正整数。
在一个示例性的实施方式中，包络信号校正模块42，被配置为基于所述当前包络信号在所述包络校正参数表中进行查询，确定所述当前包络信号对应的当前校正参数；利用所述当前校正参数对所述当前包络信号进行校正，得到所述校正后的包络信号。
在一个示例性的实施方式中，射频DPD模块43，被配置为对所述当前射频输入信号进行求模计算，得到当前射频输入信号模值；基于所述当前包络信号和所述当前射频输入信号模值在所述射频DPD参数表中进行查询，得到当前DPD参数；利用所述当前DPD参数对所述当前射频输入信号进行处理，得到所述DPD处理后的射频输入信号。
在一个应用性实例中，本申请提供一种兼顾高效率和高线性的ET-PA系统，图5是本申请实施例提供兼顾高效率和高线性的ET-PA系统的结构示意图，如图5所示，所述兼顾高效率和高线性的ET-PA系统包括：包络提取模块、包络成型模块101、包络校正模块102、包络链路时延控制模块104、EA调制模块106、射频DPD模块103、射频链路时延控制模块104、数模转换器(Digital Analog Convertor，DAC)模块105、PA模块107、DPD参数训练模块108等。
所述包络提取模块，用于检测、跟踪、提取当前射频输入信号X的包络信息，并将其转换为相应的当前包络信号E输出至包络成型模块101。
所述包络成型模块101，用于接受上述包络提取模块输出的当前包络信号E。
所述包络校正模块102，用于对当前包络信号E进行校正处理，得到校正后的包络信号Es，以降低射频链路信号对包络链路中EA调制模块106输出电压Ev的影响，确保EA调制模块106输出电压Ev的误差在容许范围之内。
所述包络链路时延控制模块104，用于迟滞或提前校正后的包络信号Es，得到时延控制后的包络信号Es-t，其中，粗时延校正可以保证DPD处理后的射频输入信号Y和校正后的包络信号Es之间的同步时延差控制在单位采样点内；分数倍内插(Farrow)滤波模块用于精调电压控制信号时延量，可以保证DPD处理后的射频输入信号Y和校正后的包络信号Es和当前包络信号之间的同步时延差缩小到分数倍级采样点内。
所述数模转换器(Digital Analog Convertor，DAC)模块105，用于将时延控制后的当前包络信号Es-t从数字域转换到模拟域，并传输给EA调制模块106。
所述EA调制模块106，用于接收、处理上述时延控制后的包络信号Es-t得到输出电压Ev，并将上述输出电压Ev设置为PA漏极提供电压。
所述射频DPD模块103，用于对当前射频输入信号X进行DPD处理，得到DPD处理后的射频输入信号Y，以降低射频链路其他器件对射频输入信号的影响，保证PA输出信号的线性度。
所述射频链路时延控制模块104，用于迟滞或提前DPD处理后的当前射频输入信号Y，到时延控制后的射频输入信号Y-t，其中粗时延校正以保证DPD处理后的射频输入信号Y和校正后的包络信号Es之间的同步时延差缩小到单位采样点内，Farrow滤波模块用于精调射频输入信号时延量，可以保证DPD处理后的射频输入信号Y和校正后的包络信号Es之间的同步时延差缩小到分数倍采样点内。
所述数模转换器(Digital Analog Convertor，DAC)模块105，还用于将射频链路中时延控制后的射频输入信号Y-t从数字域转换到模拟域，并传输给PA模块107。
所述PA模块107，用于对射频链路经过DAC后的模拟域的时延控制后的 射频输入信号Y-t进行放大，输出满足功率要求的当前射频输入信号。PA的漏极或源极供电由前述EA调制模块的输出电压Ev来完成。
所述DPD参数训练模块108，用于采集、处理PA模块107的输出的射频输出信号Z，经过模数转换器后得到的等效基带信号Z’，并完成包络校正参数提取，以及射频DPD参数提取，并将提取的参数映射成查找表后传递给包络校正模块和射频DPD模块。
该DPD参数训练模块108的功能包括射频输出信号反馈后的等效基带信号与当前射频输入信号、当前包络信号的时延对齐、能量对齐、相位对齐等数据预处理操作，借助当前射频输入信号、校正后的射频输入信号、当前射频输出信号和多个历史射频输入信号提取包络校正模块参数，以及借助多个历史输出射频信号反馈后的等效基带信号、多个历史射频输入信号、多个历史包络信号和所述当前射频输入信号提取射频DPD参数。
DPD参数训练模块中包络校正参数的提取可以但不限于通过以下方式完成：以|X(n)|-|Z(n)|为目标函数，其中X(n)是第n时刻的射频输入信号，Z(n)是所述第n时刻射频输出信号，X(n-m)是第n-m时刻的射频输入信号，并以|X(n-m)|为自变量进行多项式建模，当|X(n)|-|Z(n)|的值小于门限值时停止系数更新，预设的包络模型表达式可以表述为：
Figure PCTCN2020122937-appb-000008
其中，A km是第n时刻的包络信号对应的包络校正参数，即为待求的包络校正参数，X′(n)是第n时刻的射频输入信号校正后的射频输入信号，X(n)是第n时刻的射频输入信号，Z(n)是所述第n时刻射频输出信号，X(n-m)是第n-m时刻的射频输入信号，L是历史射频输入信号的数量，K是任一正整数，n是大于m的正整数。
其计算可以借助LS算法或LMS算法实现，并通过查找表方式生成LUT数据LUTE[m]传递给包络校正模块。
DPD参数训练模块中射频DPD参数的提取可以但不限于通过以下方式完 成：当前射频输出信号Z的等效基带信号Z′可以借助历史射频输入信号、包络成型后的历史包络信号、当前射频输入信号和当前包络信号拟合得到，以多项式为例，可以表述为：
Figure PCTCN2020122937-appb-000009
同理可得预设DPD模型系数的多项式模型表达式：
Figure PCTCN2020122937-appb-000010
其中，C km是第n时刻的射频输入信号和所述当前包络信号共同对应的射频DPD参数，即为带球射频DPD参数，X(n)是第n时刻的射频输入信号，X(n-m 1)是第n-m 1时刻的射频输入信号，Z′(n-m 2)是第n-m 2时刻的历史输出射频信号反馈后的等效基带信号，E(n-m 3)是第n-m 3时刻的包络信号，L是历史射频输入信号的数量，K是任一正整数，m 1、m 2和m 3均是小于n的正整数。
其计算可以借助LS算法或LMS算法实现。因为前向信号模值|X|和包络成型后信号E阶数可配，所以本申请中采取以X和E为索引量的2D-LUT方式作为硬件实现。
通过上述方式获取的2D-LUT数据LUTR[m,n](其中m、n取0，1，...，L-1)传递给DPD模块以更新其内部LUT数据
本申请提供一种兼顾高效率和高线性的ET-PA系统，在包络链路引入包络校正模块，可以连续、紧密地完成包络跟踪，并且通过调节包络成型和包络校正模块的实现策略，降低射频链路信号对包络链路信号的影响，使PA在各种工作模式下均能保持高效率；将包络链路成型后的包络输出信号作为射频链路DPD模块的输入信号之一，提升射频DPD模型的完备性，增强其线性化能力，有效提升PA输出信号的线性度；实现两路信号整数点级的粗延时外，借助分数倍时延滤波器实现动态可调的分数倍时延配置，从而有效提升包络信号和射频输入信号的时延对齐精度。
图6a，6b，6c是申请实施例提供的去除射频输入信号与包络信号耦合作用 后的两路输出信号示意图。以单音信号为例，校正后的EA输出信号如图6a所示，EA输出信号中的射频输入信号干扰得到有效去除，考虑包络信号进行DPD建模后的PA输出信号如图6b所示，未考虑包络信号进行DPD建模后的PA输出信号如图6c所示。并且从图6b和6c在DPD建模时考虑包络信号E的调制作用可以有效提升系统的射频输出指标。
图7是申请实施例提供的兼顾高效率和高线性的ET-PA系统的工作流程图，主要包括步骤S701、S702、S703、S704和S705。
S701：对射频、包络链路进行时延对齐，确保射频、包络链路的同步性；
S702：射频DPD模块、包络校正模块进行初始化，写入预置的或迭代稳定得到的系数，包络成型模块101的LUT数据初始化为预设的某种成型函数的映射表。通过调节时延控制模块104(1)和104(2)，使EA调制模块输出的电压Ev和DPD处理后的射频输入信号Y_t同时到达PA，随后PA模块107输出放大后的射频输出信号Z。
S703：DPD训练模块108采集射频输出信号Z，并对其进行数据预处理，得到与射频输入信号X同步的反馈信号Z’；借助射频输入信号X和反馈信号Z’的包络信号提取包络校正模块参数，以及借助射频输入信号X、反馈信号Z’、包络成型后的包络信号E提取射频DPD参数，并将参数分别传递给包络校正模块102和射频DPD模块103，用于实现对应模块系数的更新。包络校正参数和DPD参数的提取方式可以参考上述实施例中的描述，本实施例不再赘述。
S704：对于射频DPD模块103，需要以当前射频输入信号、包络成型后的当前包络信号作为输入信号进行2D-LUT(即LUTR[m,n])检索，其中将检索结果与模型中其他输入项进行运算后生成DPD处理后的射频输入信号；对于包络校正模块102，需要将包络成型后的信号E进行LUT表(即LUTE[m])检索后计算得到校正后的包络信号Es。
S705：重复S703、S704，对包络校正模块、射频DPD模块的LUT表不断进行迭代更新，直至DPD性能稳定，并实时监测系统状态，如果系统运行过程中出现射频链路和包络链路同步异常需要再次回到S701。
图8是本申请实施例提出的包络校正模块的内部结构图。信号延迟模块1020，用于根据校正模型中信号记忆项配置进行恰当的延迟，其中Z -dn(n＝0,1,...N)为LUT表中各表项的延迟配置。过表模块1021，LUT中储存着包络校正模型的LUT数据LUTE，其是由DPD训练模块108获取并传递给包络校正模块102的。包络成型101后的信号E经过LUT表格数据索引以及一系列乘加运算后，输出校正后的包络信号Es。
图9是本申请实施例提出的射频DPD模块的内部结构图。当前射频输入信号X经过求模模块1030得到模值并与包络成型101后的包络信号E经过信号延迟模块1032后过2D-LUT模块1031得到索引输出DPD处理后的射频输入信号Y。1302为信号延迟模块，其中，分别为射频输入信号、射频输入信号模值及包络信号的延迟配置量。将各表索引得到的数据与模型中其他部分进行一系列的乘加运算得到最终的输出DPD处理后的射频输入信号Y。2D-LUT模块中数据LUTR[m,n](其中m、n取0，1，...，L-1)是由DPD训练模块108提取并传递的。
图10是本申请实施例提出的时延控制模块的内部结构图。其中包括粗延时1040和精延时1041两部分，粗延时通过延迟整数点时钟实现，精延时通过分数倍时延滤波器实现，具体的实现结构如图11所示。图11是本申请实施例提出的分数倍时延滤波器的内部结构图，在图11中，输入信号经过一系列的延迟配置10410、乘法器10411和加法器10412后，得到最终分数倍延迟后的输出。
图12是本申请实施例提供的ET-PA系统应用于GSM场景的结构示意图，即该ET架构用于GSM系统场景，图中为4载波6M信号配置，一个包络调制器为一个PA供电。图中以功率谱图的形式表现了各个节点信号的状态。图1013中灰色虚线为未进行包络校正的包络信号功率谱，黑色实线为进行包络校正的包络信号功率谱；图1014中灰色虚线为未进行包络校正的EA输出信号功率谱，黑色实线为进行包络校正的EA输出信号功率谱。
图13是本申请实施例提供的ET-PA系统应用于5G低频场景的结构示意图， 该ET-PA系统架构用于5G低频场景，本实施例提供的场景为5G NR100M与LTE20M混模配置，一个包络调制器为一个PA供电。图13中以功率谱图的形式表现了各个节点信号的状态。图1113中灰色虚线为未进行包络校正的包络信号功率谱，黑色实线为进行包络校正的包络信号功率谱；图1114中灰色虚线为未进行包络校正的EA输出信号功率谱，黑色实线为进行包络校正的EA输出信号功率谱。
图14是本申请实施例提供的ET-PA系统应用于5G毫米波场景的结构示意图，该ET-PA系统架构用于5G毫米波场景，由于5G毫米波采用数模混合波束赋形架构，包络调制器为MIMO状态下的PA供电，此时一个包络调制器对应多个PA。图中信号为满足5G高频协议的单载波400M信号，以功率谱图的形式表现了各个节点信号的状态。图1215中灰色虚线为未进行包络校正的包络信号功率谱，黑色实线为进行包络校正的包络信号功率谱；图1216中灰色虚线为未进行包络校正的EA输出信号功率谱，黑色实线为进行包络校正的EA输出信号功率谱。
本申请实施例还提供了一种设备，图15是本申请提供的一种设备的结构示意图，如图15所示，本申请提供的设备，包括一个或多个处理器151和存储器152；该设备中的处理器151可以是一个或多个，图15中以一个处理器151为例；存储器152用于存储一个或多个程序；所述一个或多个程序被所述一个或多个处理器151执行，使得所述一个或多个处理器151实现如本申请实施例中所述的方法。
设备还包括：输入装置153和输出装置154。
设备中的处理器151、存储器152、输入装置153和输出装置154可以通过总线或其他方式连接，图15中以通过总线连接为例。
输入装置153可用于接收输入的数字或字符信息，以及产生与设备的用户设置以及功能控制有关的按键信号输入。输出装置154可包括显示屏等显示设备。
存储器152作为一种计算机可读存储介质，可设置为存储软件程序、计算机可执行程序以及模块，如本申请实施例所述预失真处理方法对应的程序指令/模块(例如，预失真处理装置中包络信号确定模块11、包络校正模块12、射频DPD模块13、输出模块14)。存储器152可包括存储程序区和存储数据区，其中，存储程序区可存储操作系统、至少一个功能所需的应用程序；存储数据区可存储根据设备的使用所创建的数据等。此外，存储器152可以包括高速随机存取存储器，还可以包括非易失性存储器，例如至少一个磁盘存储器件、闪存器件、或其他非易失性固态存储器件。在一些实例中，存储器152可进一步包括相对于处理器151远程设置的存储器，这些远程存储器可以通过网络连接至设备。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
本申请实施例还提供一种存储介质，所述存储介质存储有计算机程序，所述计算机程序被处理器执行时实现本申请实施例中任一所述的预失真处理方法。所述方法包括：
确定当前射频输入信号对应的当前包络信号；
利用包络校正参数表对所述当前包络信号进行校正，得到校正后的包络信号；
基于所述当前包络信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号；
基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号。
当然,本申请实施例所提供的一种包含计算机可执行指令的存储介质,其计算机可执行指令不限于如上所述的方法操作,还可以执行本申请任意实施例所提供的预失真处理方法中的相关操作.
通过以上关于实施方式的描述，所属领域的技术人员可以清楚地了解到，本申请可借助软件及必需的通用硬件来实现，当然也可以通过硬件实现，但很 多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品可以存储在计算机可读存储介质中，如计算机的软盘、只读存储器(Read-Only Memory,ROM)、随机存取存储器(Random Access Memory,RAM)、闪存(FLASH)、硬盘或光盘等，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述的方法。
值得注意的是，上述预失真处理装置的实施例中，所包括的各个单元和模块只是按照功能逻辑进行划分的，但并不局限于上述的划分，只要能够实现相应的功能即可；另外，各功能单元的具体名称也只是为了便于相互区分，并不用于限制本申请的保护范围。
以上所述，仅是本申请的示例性实施例而已，并非用于限定本申请的保护范围。
本领域内的技术人员应明白，术语用户终端涵盖任何适合类型的无线用户设备，例如移动电话、便携数据处理装置、便携网络浏览器或车载移动台。
一般来说，本申请的多种实施例可以在硬件或专用电路、软件、逻辑或其任何组合中实现。例如，一些方面可以被实现在硬件中，而其它方面可以被实现在可以被控制器、微处理器或其它计算装置执行的固件或软件中，尽管本申请不限于此。
本申请的实施例可以通过移动装置的数据处理器执行计算机程序指令来实现，例如在处理器实体中，或者通过硬件，或者通过软件和硬件的组合。计算机程序指令可以是汇编指令、指令集架构(ISA)指令、机器指令、机器相关指令、微代码、固件指令、状态设置数据、或者以一种或多种编程语言的任意组合编写的源代码或目标代码。
本申请附图中的任何逻辑流程的框图可以表示程序步骤，或者可以表示相互连接的逻辑电路、模块和功能，或者可以表示程序步骤与逻辑电路、模块和 功能的组合。计算机程序可以存储在存储器上。存储器可以具有任何适合于本地技术环境的类型并且可以使用任何适合的数据存储技术实现，例如但不限于只读存储器(ROM)、随机访问存储器(RAM)、光存储器装置和系统(数码多功能光碟DVD或CD光盘)等。计算机可读介质可以包括非瞬时性存储介质。数据处理器可以是任何适合于本地技术环境的类型，例如但不限于通用计算机、专用计算机、微处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、可编程逻辑器件(FGPA)以及基于多核处理器架构的处理器。
通过示范性和非限制性的示例，上文已提供了对本申请的示范实施例的详细描述。但结合附图和权利要求来考虑，对以上实施例的多种修改和调整对本领域技术人员来说是显而易见的，但不偏离本申请的范围。因此，本申请的恰当范围将根据权利要求确定。

Claims (11)

  1. 一种预失真处理方法，包括：
    确定当前射频输入信号对应的当前包络信号；
    利用包络校正参数表对所述当前包络信号进行校正，得到校正后的包络信号；
    基于所述当前包络信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号；
    基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号。
  2. 根据权利要求1所述方法，其中，所述基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号，包括：
    对所述校正后的包络信号进行整数点延时和分数倍延时，得到延时后的包络信号；
    对所述DPD处理后的射频输入信号进行整数点延时和分数倍延时；得到延时后的射频输入信号；
    将所述延时后的包络信号转换为模拟包络信号，将所述延时后的射频输入信号转换为模拟射频输入信号；
    利用所述模拟包络信号控制所述模拟射频输入信号进行电源调制，得到满足功率要求的所述当前射频输出信号。
  3. 根据权利要求1所述方法，其中，所述基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号之后，还包括：
    将所述当前射频输入信号、所述校正后的射频输入信号、所述当前射频输出信号和多个历史射频输入信号代入预设的包络模型表达式确定所述当前包络信号对应的包络校正参数；
    基于所述当前包络信号和所述当前包络信号对应的包络校正参数更新所述包络校正参数表。
  4. 根据权利要求3所述的方法，其中，所述预设的包络模型表达式是：
    Figure PCTCN2020122937-appb-100001
    其中，A km是第n时刻的包络信号对应的包络校正参数，X′(n)是第n时刻的射频输入信号校正后的射频输入信号，X(n)是第n时刻的射频输入信号，Z(n)是第n时刻的射频输出信号，X(n-m)是第n-m时刻的射频输入信号，L是历史射频输入信号的数量，K是任一正整数，m为大于等于0的整数，n是大于m的正整数。
  5. 根据权利要求1所述方法，其中，所述基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号之后，还包括：
    将多个历史输出射频信号反馈后的等效基带信号、多个历史射频输入信号、多个历史包络信号和所述当前射频输入信号代入预设DPD模型表达式确定所述当前射频输入信号和所述当前包络信号共同对应的射频DPD参数；
    基于所述当前射频输入信号、所述当前包络信号和所述当前射频输入信号和所述当前包络信号共同对应的射频DPD参数更新射频DPD参数表。
  6. 根据权利要求5所述的方法，其中，所述预设DPD模型表达式是：
    Figure PCTCN2020122937-appb-100002
    其中，C km是第n时刻的射频输入信号和所述当前包络信号共同对应的射频DPD参数，X(n)是第n时刻的射频输入信号，X(n-m 1)是第n-m 1时刻的射频输入信号，Z′(n-m 2)是第n-m 2时刻的历史输出射频信号反馈后的等效基带信号，E(n-m 3)是第n-m 3时刻的包络信号，L是历史射频输入信号的数量，K是任一正整数，m 1、m 2和m 3均是小于n的正整数。
  7. 根据权利要求1所述的方法，其中，所述利用包络校正参数表对所述当前包络信号进行校正，得到校正后的包络信号，包括：
    基于所述当前包络信号在所述包络校正参数表中进行查询，确定所述当前包络信号对应的当前校正参数；
    利用所述当前校正参数对所述当前包络信号进行校正，得到所述校正后的包络信号。
  8. 根据权利要求1所述的方法，其中，所述基于所述当前包络信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号，包括：
    对所述当前射频输入信号进行求模计算，得到当前射频输入信号模值；
    基于所述当前包络信号和所述当前射频输入信号模值在所述射频DPD参数表中进行查询，得到当前DPD参数；
    利用所述当前DPD参数对所述当前射频输入信号进行处理，得到所述DPD处理后的射频输入信号。
  9. 一种预失真处理装置，包括：包络信号确定模块、包络校正模块、射频DPD模块、射频信号输出模块，其中，
    包络信号确定模块，被配置为确定当前射频输入信号对应的当前包络信号；
    包络信号校正模块，被配置为利用包络校正参数表对所述当前包络信号进行校正，得到校正后的包络信号；
    射频DPD模块，被配置为基于所述当前包络信号、所述当前射频输入信号以及射频数字预失真DPD参数表确定DPD处理后的射频输入信号；
    射频信号输出模块，被配置为基于所述校正后的包络信号对所述DPD处理后的射频输入信号进行控制，得到当前射频输出信号。
  10. 一种设备，包括：
    一个或多个处理器；
    存储器，用于存储一个或多个程序；
    当所述一个或多个程序被所述一个或多个处理器执行，使得所述一个或多个处理器实现如权利要求1-8任一项所述的方法。
  11. 一种存储介质，所述存储介质存储有计算机程序，所述计算机程序被处理器执行时实现权利要求1-8任一项所述的方法。
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