WO2021134783A1 - 晶体校准的方法、芯片和蓝牙耳机 - Google Patents

晶体校准的方法、芯片和蓝牙耳机 Download PDF

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Publication number
WO2021134783A1
WO2021134783A1 PCT/CN2020/070263 CN2020070263W WO2021134783A1 WO 2021134783 A1 WO2021134783 A1 WO 2021134783A1 CN 2020070263 W CN2020070263 W CN 2020070263W WO 2021134783 A1 WO2021134783 A1 WO 2021134783A1
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Prior art keywords
pulse signal
count difference
parameter
difference value
chip
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PCT/CN2020/070263
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English (en)
French (fr)
Inventor
林飞
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深圳市汇顶科技股份有限公司
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Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2020/070263 priority Critical patent/WO2021134783A1/zh
Priority to CN202080001624.9A priority patent/CN111819787B/zh
Publication of WO2021134783A1 publication Critical patent/WO2021134783A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/02—Details
    • H03B5/04—Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones

Definitions

  • the embodiments of the present application relate to the field of electronics, and more specifically, to a method for crystal calibration, a chip, and a Bluetooth headset.
  • the single-chip microcomputer When the single-chip microcomputer is running, it needs a pulse signal as the trigger signal to execute instructions by itself.
  • a crystal connected to the application circuit of the single-chip microcomputer and an external capacitor connected to the crystal are used to generate the pulse signal.
  • the crystal has a nominal load capacitance value. When the load capacitance value is close to or equal to the real capacitance value of the external capacitor, the frequency of the pulse signal generated by the crystal is the most accurate.
  • the material parameters of the same batch will not be completely consistent.
  • the fluctuation of the material parameters will cause the load capacitance of the same batch of crystals produced by the same manufacturer and the capacitance value of the same batch of external capacitors produced by the same manufacturer to be in a certain range. Internal changes, which in turn causes the frequency of the pulse signal generated by the crystal to be insufficiently accurate.
  • a crystal calibration method, chip and Bluetooth headset are provided, which can realize automatic crystal calibration.
  • a method for crystal calibration which is suitable for a chip with a crystal, and the method includes:
  • the at least one pulse signal includes a pulse signal generated by the crystal based on at least one of a plurality of parameters, and the count difference value of each pulse signal in the at least one pulse signal is Use the difference between the system tick count values based on the corresponding pulse signal obtained by the two external interrupts triggered by the reference pulse signal;
  • the pulse signal generated based on the target parameter is determined as the pulse signal after crystal calibration.
  • Determining the target parameter by the count difference of the at least one pulse signal can not only realize the automatic calibration of the pulse signal and reduce the labor cost, but also improve the calibration efficiency while reducing the complexity of the calibration mechanism.
  • the obtaining the count difference of at least one pulse signal includes:
  • the dichotomy method is used to obtain the count difference of the at least one pulse signal.
  • Obtaining the count difference of at least one pulse signal through two-differentiation avoids obtaining the count difference of all pulse signals, reduces the total amount of count difference that needs to be obtained, and improves the calibration efficiency while ensuring the accuracy of the calibration. Reduce time cost.
  • the obtaining the count difference of the at least one pulse signal by using a dichotomy method includes:
  • determining the target parameter based on the count difference of the at least one pulse signal includes:
  • the target parameter is determined based on the first count difference value and the second count difference value.
  • the determining the target parameter based on the first count difference and the second count difference includes:
  • the average value of the minimum parameter and the maximum parameter is determined as the target parameter.
  • the determining the target parameter based on the first count difference and the second count difference includes:
  • the average value of the first count difference value and the second count difference value is greater than the preset count difference value, the average value of the minimum parameter and the maximum parameter plus 1 is determined to be the first parameter;
  • the target parameter is determined based on the third count difference value and the second count difference value.
  • the determining the target parameter based on the first count difference and the second count difference includes:
  • the average value of the first count difference value and the second count difference value is less than the preset count difference value
  • the average value of the minimum parameter and the maximum parameter minus one is determined to be the second parameter
  • the target parameter is determined based on the fourth count difference value and the first count difference value.
  • the obtaining the count difference of at least one pulse signal includes:
  • the determining the target parameter based on the count difference of the at least one pulse signal includes:
  • the parameter corresponding to the target count difference is determined as the target parameter.
  • Obtaining the target count difference value through the dichotomy method avoids the ergodic comparison of the preset count difference value and the count difference value of each pulse signal, reduces the calculation amount of the chip, improves the calibration efficiency and reduces the time cost.
  • the method further includes:
  • the multiple count difference values are sorted in ascending order or descending order.
  • the parameter values of the multiple parameters decrease as the frequency of the pulse signal increases.
  • the obtained difference counts can be automatically sorted in ascending order or descending to larger order, which avoids recounting the multiple counts after obtaining the multiple count differences.
  • the step of reordering the difference value effectively reduces the time cost of calibrating the pulse signal on the basis of obtaining the target parameter or target count difference value through the dichotomy method.
  • the parameter values of the multiple parameters are inversely proportional to the frequency of the pulse signal.
  • the obtaining the count difference of at least one pulse signal includes:
  • the method further includes:
  • the universal serial bus USB to serial port and the universal asynchronous receiver transmitter UART hub HUB are used to receive the calibration signaling sent by the test equipment, the calibration signaling is used to trigger the chip to perform crystal calibration.
  • the calibration signaling includes the multiple parameters.
  • the method further includes:
  • the plurality of parameters are stored in a register so as to send the plurality of parameters to the crystal by controlling the register.
  • the register triggers the crystal to generate the pulse signal to be calibrated, that is, the register is responsible for and controls the operation of the crystal to generate the signal to be calibrated, which reduces the workload of the chip and effectively improves the efficiency of the chip for pulse signal calibration.
  • the method further includes:
  • the calibration result is stored in the register, and the calibration result is used to indicate the target parameter.
  • the method further includes:
  • the universal serial bus USB to serial port and the universal asynchronous receiver transmitter UART hub HUB are used to send the calibration result and/or the count difference of the at least one pulse signal to the test equipment, and the calibration result is used to indicate the target parameter, so The count difference of the at least one pulse signal is used for comparison between the test device and the preset count difference on the display interface.
  • the user can observe the sum of each count difference in the count difference of the at least one pulse signal on the display interface of the test device.
  • the corresponding relationship between the preset count difference is convenient for the user to manually adjust the target count difference, so as to realize the calibration mechanism of automatic calibration and manual calibration.
  • the calibration result is convenient for designers to perform batch calibration and adjust parameter design.
  • the obtaining the count difference of at least one pulse signal includes:
  • the at least one count difference value that is later in time among the multiple count difference values of each pulse signal in the at least one pulse signal is determined as the count difference value of the corresponding pulse signal.
  • the count difference corresponding to each pulse signal can be accurately obtained, and accordingly, the calibration accuracy of the pulse signal can be improved.
  • the count difference corresponding to each pulse signal can be accurately obtained, and accordingly, the calibration accuracy of the pulse signal can be improved.
  • the difference is not accurate, which can improve the accuracy of the count difference and the calibration accuracy of the pulse signal.
  • the method further includes:
  • the structure of the chip can be simplified and the hardware cost can be reduced.
  • the reference pulse signal is a pulse width modulated PWM signal.
  • the chip is a Bluetooth low energy BLE chip.
  • a chip in a second aspect, includes:
  • a processing unit the processing unit is connected to the crystal, and the processing unit is used for:
  • the count difference of the at least one pulse signal and the count difference of each pulse signal in the at least one pulse signal is a system tick count value based on the corresponding pulse signal obtained by using two external interrupts triggered by the reference pulse signal.
  • the pulse signal generated based on the target parameter is determined as the pulse signal after crystal calibration.
  • the processing unit is specifically configured to:
  • the dichotomy is used to obtain the count difference of the at least one pulse signal.
  • the processing unit is more specifically configured to:
  • the target parameter is determined based on the first count difference value and the second count difference value.
  • the processing unit is more specifically configured to:
  • the average value of the minimum parameter and the maximum parameter is determined as the target parameter.
  • the processing unit is more specifically configured to:
  • the average value of the first count difference value and the second count difference value is greater than the preset count difference value, the average value of the minimum parameter and the maximum parameter plus 1 is determined to be the first parameter;
  • the target parameter is determined based on the third count difference value and the second count difference value.
  • the processing unit is more specifically configured to:
  • the average value of the first count difference value and the second count difference value is less than the preset count difference value
  • the average value of the minimum parameter and the maximum parameter minus one is determined to be the second parameter
  • the target parameter is determined based on the fourth count difference value and the first count difference value.
  • the processing unit is specifically configured to:
  • the parameter corresponding to the target count difference is determined as the target parameter.
  • the processing unit is further configured to:
  • the multiple count difference values are sorted in ascending order or descending order.
  • the parameter values of the multiple parameters decrease as the frequency of the pulse signal increases.
  • the parameter values of the multiple parameters are inversely proportional to the frequency of the pulse signal.
  • the processing unit is specifically configured to:
  • the chip further includes:
  • USB-to-serial and Universal Asynchronous Receiver Transmitter UART Hub HUB the USB-to-serial port is connected to the processing unit through the UART HUB, and the processing unit receives the USB-to-serial port and the UART HUB Calibration signaling sent by the test equipment, where the calibration signaling is used to trigger the chip to perform crystal calibration.
  • the calibration signaling includes the multiple parameters.
  • the chip further includes:
  • the processing unit is connected to the crystal through the register, and the processing unit is configured to store the plurality of parameters in the register, so as to send the plurality of parameters to the crystal by controlling the register.
  • the processing unit is further configured to store a calibration result in the register, and the calibration result is used to indicate the target parameter.
  • the chip further includes:
  • USB-to-serial port is connected to the processing unit through the UART HUB
  • the processing unit is connected to the processing unit through the USB-to-serial port and the UART HUB
  • the test device sends a calibration result and/or the count difference of the at least one pulse signal, the calibration result is used to indicate the target parameter, and the count difference of the at least one pulse signal is used by the test device on the display interface Compare with the preset count difference.
  • the processing unit is specifically configured to:
  • the at least one count difference value that is later in time among the multiple count difference values of each pulse signal in the at least one pulse signal is determined as the count difference value of the corresponding pulse signal.
  • the processing unit is specifically configured to:
  • the reference pulse signal is a pulse width modulated PWM signal.
  • the chip is a Bluetooth low energy BLE chip.
  • a Bluetooth headset including:
  • Fig. 1 is a schematic diagram of the system architecture of an embodiment of the present application.
  • FIG. 2 is a schematic flowchart of a method for crystal calibration according to an embodiment of the present application.
  • FIG. 3 is another schematic flowchart of the method for crystal calibration according to an embodiment of the present application.
  • Fig. 4 is a schematic block diagram of a chip of an embodiment of the present application.
  • the methods involved in the embodiments of the present application can be applied to various crystals (also called resonators), and can also be applied to various chips or electronic devices with crystals. For example, adding IC inside the package to form a crystal element of the oscillator circuit.
  • the method can also be applied to crystal oscillators (also called oscillators).
  • the crystal may also be referred to as a passive crystal oscillator, and the crystal oscillator may also be referred to as an active crystal oscillator.
  • a crystal oscillator can be understood as a combination device of the crystal and the capacitor connected to the crystal.
  • the chip may be a single-chip (Single-Chip Microcomputer) or an integrated circuit chip.
  • the chip may be a central processing unit (Central Processing Unit, CPU), random access memory (RAM), read only memory (Read Only Memory, ROM) with data processing capabilities using VLSI technology.
  • CPU Central Processing Unit
  • RAM random access memory
  • ROM Read Only Memory
  • I/O ports and interrupt systems, and functions such as timers/counters (may also include display drive circuits, pulse width modulation circuits, analog multiplexers, A/D converters and other circuits) integrated into a silicon chip
  • timers/counters may also include display drive circuits, pulse width modulation circuits, analog multiplexers, A/D converters and other circuits integrated into a silicon chip The above constitutes a small and complete microcomputer system.
  • the crystal can generate a pulse signal through the cooperation of a capacitor connected to the crystal.
  • the capacitor connected to the crystal can be integrated into the chip, and the value of the capacitor can be made into a configurable state.
  • the capacitance value is made into a plurality of configured parameters for representing the capacitance value, so that the crystal in the chip can respectively generate a plurality of pulse signals based on the plurality of parameters.
  • the crystal in the chip can generate pulse signals of multiple frequencies based on multiple configured parameters.
  • the user can adjust the frequency of the pulse signal by modifying the capacitance value (that is, modifying the configuration parameter).
  • each product needs to be individually set with an optimal capacitance value before it is put into use, so that the frequency of the pulse signal meets the application requirements.
  • the crystal calibration involved in the embodiments of the present application may refer to the process of obtaining the optimal capacitance value (or optimal parameter) before the chip is put into use.
  • the above-mentioned crystal calibration may include a calibration or test after repair to determine whether the product performs or runs its functions in accordance with the original product specifications.
  • Fig. 1 is a schematic block diagram of a system architecture of an embodiment of the present application.
  • the system architecture 100 may include a test device 110, an intermediate device or system 120 and a chip 130.
  • the test device 110 can be used to start or trigger the entire calibration process, for example, to send the parameters used to generate the pulse signal to the intermediate device or system 120, so that the intermediate device or system forwards it to the entire calibration process.
  • the test device 110 can also be used to display the calibration result.
  • the intermediate device or system 120 can also be used to generate a reference pulse signal.
  • the chip 130 may compare the reference pulse signal generated by the intermediate device or system 120 with the pulse signal to be calibrated generated by the crystal in the chip 130 to determine the calibration result.
  • the chip 130 may also send the calibration result to the testing device 110 through the intermediate device or system 120, so that the testing device 110 can display the calibration result.
  • the test equipment 110 may also be referred to as a calibration tool or a test platform.
  • the test device may be a personal computer or a personal computer (PC).
  • PC personal computer
  • the test device 110 may include a Universal Asynchronous Receiver/Transmitter (UART) 111.
  • the UART 111 converts the information or data to be transmitted between serial communication and parallel communication.
  • a chip that converts parallel input signals into serial output signals the UART 111 may be integrated on the connection of the communication interface of the test device 110.
  • the test device 110 may send a reference pulse signal trigger command to the intermediate device or system 120 through the UART 111, and the reference pulse signal trigger command is used to trigger the intermediate device or system 120 to generate at least one reference pulse signal.
  • the reference pulse signal trigger command is used to trigger the intermediate device or system 120 to generate a reference pulse signal.
  • the intermediate device or system 120 may be a physical device independent of the test device 110 and the chip 130, or may be a device or application integrated on the test device 110 or chip.
  • the intermediate device or system 120 may further include an application system 121 for generating a reference pulse signal.
  • the application system 121 can generate 16 reference pulse signals.
  • the reference pulse signal may be a clock signal (clock signal, CLK), that is, CLK...CLK16.
  • the intermediate device or system 120 may include a universal serial bus (USB) to serial port 122, which is used to convert the USB interface of the test device 110 into a universal serial port, so that the test can be quickly received.
  • Information or data sent by the device 110 For example, the USB to serial port 122 can convert one serial port into four serial ports.
  • the test equipment may further include a Universal Asynchronous Receiver/Transmitter Hub (UART HUB) 123, and the UART HUB 123 may be used to divide the received signal into multiple serial ports.
  • UART HUB 123 can be used to convert the received 4 serial ports into 16 serial ports on the layer. That is, the UART HUB 123 can be connected to the UART 1...UART 16 serial port.
  • the intermediate device or system 120 may broadcast the information to be sent to the chip 130 through the UART 1...UART 16 serial port.
  • the serial port can also be called a serial interface, a serial communication interface, or a serial communication interface (such as a COM interface), and is an extended interface that uses a serial communication method.
  • the serial interface (Serial Interface) transmits data sequentially, one by one, and its communication line is simple, and two-way communication can be realized (the telephone line can be directly used as the transmission line).
  • the chip 130 may be called a device under test (DUT), and the device under test is also called a device under test (EUT) and a unit under test (UUT).
  • the device under test may be a manufactured product that is tested at the time of first manufacturing or later in its life cycle.
  • the aforementioned chip 130 may be any type of chip including a crystal or a crystal oscillator.
  • the chip 130 may be a Bluetooth Low Energy (BLE) chip, and the BLE chip may also be referred to as a Bluetooth low energy chip.
  • BLE Bluetooth Low Energy
  • the chip 130 may include a crystal 131, and the crystal 131 is used to generate a pulse signal so that the chip 130 can operate normally.
  • the chip 130 may further include a processing unit 132, which may be used to perform a crystal calibration process, that is, to determine whether the pulse signal to be calibrated can reach the expected frequency, or to compare the pulse signal to be calibrated with a reference Pulse signal.
  • the chip 130 may further include a register 133, and the register 133 is used to store parameters for generating the pulse signal.
  • the processing unit 132 may send the parameters to be calibrated to the crystal by controlling the register 133, so that the crystal generates a corresponding pulse signal.
  • the intermediate device or system 120 can generate 16 reference signals (ie CLK1...CLK16) at the same time, and the intermediate device or system 120 can also use 16 serial ports (UART 1... UART 16 serial port) to send information or data.
  • the frame 100 shown in FIG. 1 can be used to calibrate 16 chips at the same time, and the chip 130 can be one of the 16 chips.
  • one or more chips can be calibrated according to requirements, and less than 16 or more than 16 reference pulse signals (or UART serial ports) can also be set, which is not limited in the embodiment of the present application.
  • FIG. 2 is a schematic flow chart of a method 200 of crystal calibration according to its own embodiment.
  • the method 200 is applicable to the crystal 131 or the chip 130 shown in FIG. 1 and is also applicable to the system framework 100.
  • the method 200 is described below by taking the chip as the execution body as an example.
  • a Bluetooth Low Energy (BLE) chip for example, a Bluetooth Low Energy (BLE) chip.
  • the above method 200 may include:
  • a count difference value of at least one pulse signal includes a pulse signal generated by the crystal based on at least one of a plurality of parameters, and the count difference of each pulse signal in the at least one pulse signal The value is the difference between the system tick count values based on the corresponding pulse signal obtained by using two external interrupts triggered by the reference pulse signal.
  • S220 Determine a target parameter based on the count difference of the at least one pulse signal.
  • S230 Determine a pulse signal generated based on the target parameter as a pulse signal after crystal calibration.
  • the processing unit of the chip can determine the at least one pulse signal by comparing the at least one pulse signal with a reference pulse signal.
  • the signal count difference that is, each pulse signal in the at least one pulse signal is a clock signal
  • the two external interrupts triggered by the reference pulse signal are used to obtain the two count values output by the system tick counter, and the The difference between the two count values is used as the count difference of the same pulse signal
  • the calibration result that is, the target parameter
  • the frequency of the pulse signal generated by the crystal based on the target parameter best meets the expected frequency.
  • the calibration result may be used to indicate the target parameter or a pulse signal generated based on the target parameter, or the calibration result may also be used to indicate the count difference corresponding to the target parameter.
  • Determining the target parameter by the count difference of the at least one pulse signal can not only realize the automatic calibration of the pulse signal and reduce the labor cost, but also improve the calibration efficiency while reducing the complexity of the calibration mechanism.
  • the reference pulse signal may be a pulse signal generated by triggering other calibrated chips by the application system 121 as shown in FIG. 1.
  • the method 200 may further include:
  • the chip receives the reference pulse signal generated by the calibrated application system.
  • the embodiment of the present application is not limited to this.
  • FPGA Field Programmable Gate Array
  • CPLD Complex Programmable Logic Device
  • the reference pulse signal may be a pulse signal with any accuracy that meets the conditions.
  • the reference pulse signal may be a pulse width modulation (Pulse Width Modulation, PWM) signal.
  • PWM Pulse Width Modulation
  • the signal can be modulated by an analog control method to generate the PWM signal.
  • the desired waveform (including shape and amplitude) can be equivalent by modulating the width of the pulse, and then the analog signal level can be digitally coded to generate information or data that can be used for transmission.
  • the change of signal, energy, etc. can be adjusted by adjusting the change of the duty cycle.
  • the duty cycle may refer to the percentage of the entire signal cycle when the signal is at a high level in one cycle. For example, the duty cycle of a square wave is 50%.
  • the PWM signal can be directly generated through the internal module of the chip.
  • the PWM signal can be generated by the chip 130 or the application system 121 shown in FIG. 1.
  • the I/O interface of the chip 130 may be provided with an integrated module.
  • the chip 130 may be provided with a function module with PWM signal output in the program.
  • the I/O interface may be the link between the chip 130 and the controlled object for information exchange.
  • the chip 130 can exchange data with external devices through an I/O interface.
  • the I/O interface may be a programmable interface, that is, the working mode of the I/O interface can be controlled by a program.
  • the application system 121 may be a system that has been calibrated using a spectrum analyzer before performing crystal calibration, and the clock frequency accuracy has reached a state of being more accurate than that of a standard protocol (for example, the BLE standard protocol).
  • the application system 121 can generate a precise PWM signal with a certain frequency (for example, 40 Hz) to the chip 130.
  • the chip 130 samples the PWM signal generated by the application system 121 through an I/O interface that can be used as an external interrupt input.
  • the calibration process can be executed in the chip 130 and driven by the PWM signal generated by the application system 121.
  • the chip 130 writes a parameter to the register 133 (That is, the parameters used to generate the pulse signal).
  • the parameter may be a bias value.
  • the initial value of the offset value may be zero.
  • the chip 130 can calculate and record the difference in the system tick clock count between the two external interrupts (assuming that the clock frequency of the system tick clock is set to 64M, if the crystal has been calibrated, the clock frequency of the system tick clock will be It is infinitely close to 64M.
  • the difference of the system tick count value between the two external interrupts triggered by the 40Hz PWM signal should be 1600000, that is, the preset count difference can be 1600000), then the parameters +1 and write to register 133, calculate and record the difference of the system tick clock count between the two external interrupts again, traverse all the crystal calibration parameters, and find the parameter that the system tick count difference is closest to 1600000. It is the target parameter of crystal calibration (which can be used to reflect the calibration result).
  • the register can trigger the crystal to generate a calibrated pulse signal based on the target parameter.
  • the register can modify (or adjust) the capacitance value of the capacitor connected to the crystal to the target based on the target parameter.
  • the above multiple parameters respectively correspond to multiple configured capacitance values.
  • the multiple parameters correspond to the multiple capacitance values one-to-one.
  • the target parameter is selected from the plurality of parameters as the optimal parameter, so that the pulse signal generated based on the capacitance value corresponding to the target parameter is the pulse signal that most meets expectations (ie, the most accurate).
  • the traversal method is used to test each possible parameter, and then the optimal parameter is selected as the calibration result.
  • This application takes an example to reduce the time cost, reduce the number of samples of the parameter or the count difference, and the target parameter can be determined only by the count difference of the at least one pulse signal, which can not only realize the automatic calibration of the pulse signal and reduce the labor cost, but also It can also improve the calibration efficiency while reducing the complexity of the calibration mechanism.
  • the S210 may include:
  • the dichotomy method is used to obtain the count difference of the at least one pulse signal.
  • a dichotomy method may be used to obtain at least one sampling parameter from the plurality of parameters, and then a count difference of the at least one pulse signal may be obtained based on the at least one pulse signal respectively generated by the at least one sampling parameter.
  • the chip can sample multiple parameters based on the dichotomy, then generate a pulse signal based on the sampled parameters, and then perform crystal calibration based on the count difference of the pulse signal.
  • the chip may sample the multiple parameters based on the dichotomy, and then the acquired count difference of the pulse signal determines whether to continue sampling.
  • the chip may first determine the minimum parameter and the maximum parameter among the multiple parameters; then generate the first pulse signal and the second pulse signal based on the minimum parameter and the maximum parameter; and then obtain the first pulse signal respectively.
  • the chip may determine the target parameter by comparing a preset count difference value with an average value of the first count difference value and the second count difference value.
  • the preset count difference value may be a count difference value corresponding to a preset pulse signal, that is, the preset count difference value may be a calibrated-based value obtained by using two external interrupts triggered by a reference pulse signal The difference between the system tick counts of the pulse signal.
  • the preset count difference value may be a preset count difference value or a pre-measured count difference value. Of course, it may also be a count difference value measured during the calibration process. This is not the case in the embodiment of the application. Make a limit.
  • the chip may first use the maximum parameter and the minimum parameter among the multiple parameters as sampling parameters to obtain pulse signals based on the sampling parameters, and then based on the difference between the first count and the second count. The average value is used to determine whether it is necessary to continue to obtain sampling parameters from the multiple parameters.
  • the average value of the minimum parameter and the maximum parameter may be determined as the target parameter.
  • the chip obtains the first count difference and the second count difference, there is no need to obtain sampling parameters.
  • the average value of the minimum parameter and the maximum parameter may be increased by 1. Determined as the first parameter; generate a third pulse signal based on the first parameter; obtain a third count difference of the third pulse signal; determine based on the third count difference and the second count difference The target parameters.
  • the multiple parameters are continuous parameters.
  • the multiple parameters include the first parameter.
  • the parameter values of the plurality of parameters decrease as the count difference of the pulse signal increases; or, the parameter values of the plurality of parameters increase with the count difference of the pulse signal The value decreases and increases.
  • Using the dichotomy method to determine the sampling parameters among the multiple parameters can reduce the sampling parameters while ensuring the calibration accuracy, that is, reduce the pulse signal that needs to be generated, and also reduce the count difference that needs to be measured, which can effectively improve the calibration. Efficiency and reduce calibration time.
  • the average value of the minimum parameter and the maximum parameter may be reduced by one Determined as the second parameter; generate a fourth pulse signal based on the second parameter; obtain a fourth count difference of the fourth pulse signal; determine the fourth pulse signal based on the fourth count difference and the first count difference
  • the target parameters In other words, after the chip obtains the first count difference and the second count difference, it needs to use the dichotomy to use the second parameter as a sampling parameter to obtain the fourth pulse signal.
  • the multiple parameters are continuous parameters.
  • the multiple parameters include the second parameter.
  • the parameter values of the plurality of parameters decrease as the count difference of the pulse signal increases; or, the parameter values of the plurality of parameters increase with the count difference of the pulse signal The value decreases and increases.
  • Using the dichotomy method to determine the sampling parameters among the multiple parameters can reduce the sampling parameters while ensuring the calibration accuracy, that is, reduce the pulse signal that needs to be generated, and also reduce the count difference that needs to be measured, which can effectively improve the calibration. Efficiency and reduce calibration time.
  • the use of binary differentiation to obtain the count difference of at least one pulse signal avoids obtaining the count difference of all pulse signals, reduces the total amount of count difference that needs to be obtained, and can ensure calibration accuracy at the same time , Improve calibration efficiency and reduce time cost.
  • FIG. 3 is a schematic flowchart of a method 300 for crystal calibration according to an embodiment of the present application.
  • the method 300 may include some or all of the following content:
  • the chip obtains the minimum parameter and the maximum parameter.
  • the chip generates a first pulse signal and a second pulse signal respectively based on the minimum parameter and the maximum parameter, and determines whether the first pulse signal and the second pulse signal have been triggered by the reference pulse signal. Interrupted?
  • the chip calculates the difference between the 5 counts of the first pulse signal The average value of the last three count differences in the second pulse signal is determined as the first count difference corresponding to the first pulse signal; the last three count differences among the five count differences of the second pulse signal are determined The average value is determined as the second count difference corresponding to the second pulse signal. If the chip does not obtain the 5 count difference of the first pulse signal or the 5 count difference of the second pulse signal, return to S320 and execute.
  • the S210 may include:
  • the chip may first obtain multiple count differences corresponding to the multiple pulse signals; and then use the dichotomy to obtain the target count difference that is closest to the preset count difference among the multiple count differences. Value; finally the parameter corresponding to the target count difference is determined as the target parameter.
  • Obtaining the target count difference value through the dichotomy method avoids the ergodic comparison of the preset count difference value and the count difference value of each pulse signal, reduces the calculation amount of the chip, improves the calibration efficiency and reduces the time cost.
  • the method 200 may further include:
  • the multiple count difference values are sorted in ascending order or descending order.
  • the chip obtains the plurality of count differences, it arranges the plurality of count differences in ascending or descending order, and then based on the arranged set of count differences, the dichotomy finds the difference with the preset count The closest target count difference.
  • the chip may first determine the set composed of the multiple count difference values as the first difference value set; then, within the first difference value set, use a dichotomy to determine the target count difference value.
  • the count difference values in the first difference value set are sorted in ascending order or descending order.
  • the chip may first determine the count difference value of the middle position in the first difference value set; in the case that the count difference value of the middle position is equal to the preset count difference value, the middle position The count difference of the position is determined as the target count difference. In the case that the count difference at the intermediate position is less than the preset count difference, if the first difference set is sorted in ascending order, the target is determined in the second half of the first difference set Count difference value, if the first difference value is combined in descending order, the target count difference value is determined in the first half of the first difference value set.
  • the target count difference value is determined in the first half of the first difference set.
  • the parameter values of the multiple parameters decrease as the frequency of the pulse signal increases.
  • the parameter values of the plurality of parameters are inversely proportional to the frequency of the pulse signal.
  • the parameter values of the multiple parameters decrease as the count difference of the pulse signal increases.
  • the parameter values of the plurality of parameters are inversely proportional to the count difference of the pulse signal.
  • the obtained difference counts can be automatically sorted in ascending order or descending to larger order, which avoids recounting the multiple counts after obtaining the multiple count differences.
  • the step of reordering the difference value effectively reduces the time cost of calibrating the pulse signal on the basis of obtaining the target parameter or target count difference value through the dichotomy method.
  • the parameter values of the plurality of parameters are decreased with the increase of the frequency of the pulse signal, so that the parameter values of the plurality of parameters are decreased with the increase of the count difference of the pulse signal, or all
  • the parameter values of the multiple parameters increase as the count difference of the pulse signal decreases, so that the chip uses a dichotomy to determine the target parameter or the target count difference.
  • the S210 may include:
  • the method 200 may further include:
  • USB-to-serial port and UART HUB are used to receive the calibration signaling sent by the test equipment, and the calibration signaling is used to trigger the chip to perform crystal calibration.
  • the calibration signaling includes the multiple parameters.
  • the method 200 may further include:
  • the plurality of parameters are stored in a register so as to send the plurality of parameters to the crystal by controlling the register.
  • the register triggers the crystal to generate the pulse signal to be calibrated, that is, the register is responsible for and controls the operation of the crystal to generate the signal to be calibrated, which reduces the workload of the chip and effectively improves the efficiency of the chip for pulse signal calibration.
  • the method 200 may further include:
  • the calibration result is stored in the register, and the calibration result is used to indicate the target parameter.
  • the method 200 may further include:
  • USB to serial port and UART HUB to send the calibration result and/or the count difference of the at least one pulse signal to the test device
  • the calibration result is used to indicate the target parameter
  • the count difference of the at least one pulse signal is used
  • the test device is compared with the preset count difference on the display interface.
  • the user can observe the sum of each count difference in the count difference of the at least one pulse signal on the display interface of the test device.
  • the corresponding relationship between the preset count difference is convenient for the user to manually adjust the target count difference, so as to realize the calibration mechanism of automatic calibration and manual calibration.
  • the calibration result is convenient for designers to perform batch calibration and adjust parameter design.
  • the S210 may include:
  • the at least one count difference value that is later in time among the multiple count difference values of each pulse signal in the at least one pulse signal is determined as the count difference value of the corresponding pulse signal.
  • the count difference corresponding to each pulse signal can be accurately obtained, and accordingly, the calibration accuracy of the pulse signal can be improved.
  • the count difference corresponding to each pulse signal can be accurately obtained, and accordingly, the calibration accuracy of the pulse signal can be improved.
  • the difference is not accurate, which can improve the accuracy of the count difference and the calibration accuracy of the pulse signal.
  • this application also provides a chip that can be used to execute the above-mentioned method 200 or 300.
  • FIG. 4 is a schematic block diagram of a chip 400 according to an embodiment of the present application.
  • the chip 400 may be the chip 130 shown in FIG. 1.
  • the chip 400 may include:
  • the crystal 410 is used to generate multiple pulse signals separately based on multiple parameters
  • the processing unit 420 is connected to the crystal 410, and the processing unit 420 is configured to:
  • the pulse signal generated based on the target parameter is determined as the pulse signal after the crystal 410 is calibrated.
  • the processing unit 420 is specifically configured to:
  • the dichotomy method is used to obtain the count difference of the at least one pulse signal.
  • the processing unit 420 is more specifically configured to:
  • the target parameter is determined based on the first count difference value and the second count difference value.
  • the processing unit 420 is more specifically configured to:
  • the average value of the minimum parameter and the maximum parameter is determined as the target parameter.
  • the processing unit 420 is more specifically configured to:
  • the average value of the first count difference value and the second count difference value is greater than the preset count difference value, the average value of the minimum parameter and the maximum parameter plus 1 is determined to be the first parameter;
  • the target parameter is determined based on the third count difference value and the second count difference value.
  • the processing unit 420 is more specifically configured to:
  • the average value of the first count difference value and the second count difference value is less than the preset count difference value
  • the average value of the minimum parameter and the maximum parameter minus one is determined to be the second parameter
  • the target parameter is determined based on the fourth count difference value and the first count difference value.
  • the processing unit 420 is specifically configured to:
  • the parameter corresponding to the target count difference is determined as the target parameter.
  • the processing unit 420 is further configured to:
  • the multiple count difference values are sorted in ascending order or descending order.
  • the parameter values of the multiple parameters decrease as the frequency of the pulse signal increases.
  • the parameter values of the multiple parameters are inversely proportional to the frequency of the pulse signal.
  • the processing unit 420 is specifically configured to:
  • the chip further includes:
  • USB to serial port is connected to the processing unit 420 through the UART HUB
  • processing unit 420 is connected to the processing unit 420 through the USB to serial port and the UART
  • the HUB receives the calibration signaling sent by the test equipment, and the calibration signaling is used to trigger the chip to perform crystal 410 calibration.
  • the calibration signaling includes the multiple parameters.
  • the chip further includes:
  • the processing unit 420 is connected to the crystal 410 through the register, and the processing unit 420 is configured to store the multiple parameters in the register, so as to send the multiple parameters to the crystal 410 by controlling the register. Parameters.
  • the processing unit 420 is further configured to store a calibration result in the register, and the calibration result is used to indicate the target parameter.
  • the chip further includes:
  • USB to serial port is connected to the processing unit 420 through the UART HUB
  • processing unit 420 is connected to the processing unit 420 through the USB to serial port and the UART
  • the HUB sends the calibration result and/or the count difference of the at least one pulse signal to the test device, the calibration result is used to indicate the target parameter, and the count difference of the at least one pulse signal is used for the test device
  • the display interface is compared with the preset count difference.
  • the processing unit 420 is specifically configured to:
  • the at least one count difference value that is later in time among the multiple count difference values of each pulse signal in the at least one pulse signal is determined as the count difference value of the corresponding pulse signal.
  • the processing unit 420 is specifically configured to:
  • the reference pulse signal is a pulse width modulation PWM signal.
  • the chip is a Bluetooth low energy BLE chip.
  • this application also provides a Bluetooth headset, which may include the chip 400 described above.
  • the disclosed system, device, and method can be implemented in other ways.
  • the device embodiments described above are merely illustrative.
  • the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components may be combined It can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • the functional units in the various embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium.
  • the technical solution of the present application essentially or the part that contributes to the existing technology or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disks or optical disks and other media that can store program codes. .

Abstract

提供了一种晶体校准的方法、芯片和蓝牙耳机。所述方法包括：获取至少一个脉冲信号的计数差值，所述至少一个脉冲信号包括所述晶体基于多个参数中的至少一个参数生成的脉冲信号，所述至少一个脉冲信号中每一个脉冲信号的计数差值为利用由参考脉冲信号触发的两次外部中断获取的基于相应脉冲信号的系统滴答计数值之间的差值；基于所述至少一个脉冲信号的计数差值确定目标参数；将基于所述目标参数生成的脉冲信号确定为晶体校准后的脉冲信号。通过所述至少一个脉冲信号的计数差值确定所述目标参数，不仅能够实现脉冲信号的自动校准降低了人力成本，还能够在降低校准机制的复杂度的同时提高校准效率。

Description

晶体校准的方法、芯片和蓝牙耳机 技术领域
本申请实施例涉及电子领域，并且更具体地，涉及晶体校准的方法、芯片和蓝牙耳机。
背景技术
单片机在运行的时候，需要一个脉冲信号，作为自己执行指令的触发信号。通常情况下，采用与单片机的应用电路外接的晶体以及与所述晶体连接的外部电容配合产生所述脉冲信号。所述晶体具有标称的负载电容值，当所述负载电容值与所述外部电容的真实电容值接近或者相等时，所述晶体产生的脉冲信号的频率是最准的。
但是，同一批次的物料参数不会完全一致，物料参数的波动会导致同一个厂商生产的同一批晶体的负载电容、同一个厂商生产的同一批外部电容的容值等产品参数都会在一定范围内变化，进而导致晶体产生的脉冲信号的频率不够精准。
发明内容
提供了一种晶体校准的方法、芯片和蓝牙耳机，能够实现晶体自动校准。
第一方面，提供了一种晶体校准的方法，适用于具有晶体的芯片，所述方法包括：
获取至少一个脉冲信号的计数差值，所述至少一个脉冲信号包括所述晶体基于多个参数中的至少一个参数生成的脉冲信号，所述至少一个脉冲信号中每一个脉冲信号的计数差值为利用由参考脉冲信号触发的两次外部中断获取的基于相应脉冲信号的系统滴答计数值之间的差值；
基于所述至少一个脉冲信号的计数差值确定目标参数；
将基于所述目标参数生成的脉冲信号确定为晶体校准后的脉冲信号。
通过所述至少一个脉冲信号的计数差值确定所述目标参数，不仅能够实现脉冲信号的自动校准降低了人力成本，还能够在降低校准机制的复杂度的同时提高校准效率。
在一些可能实现的方式中，所述获取至少一个脉冲信号的计数差值，包括：
利用二分法获取所述至少一个脉冲信号的计数差值。
通过二分化获取至少一个脉冲信号的计数差值，避免了获取所有的脉冲信号的计数差值，降低了需要获取的计数差值的总量，能够在保证校准准确度的同时，提高校准效率并减少时间成本。
在一些可能实现的方式中，所述利用二分法获取所述至少一个脉冲信号的计数差值，包括：
确定多个参数中的最小参数和最大参数；
基于最小参数和最大参数分别生成第一脉冲信号和第二脉冲信号；
分别获取所述第一脉冲信号的第一计数差值和第二脉冲信号的第二计数差值；
其中，基于所述至少一个脉冲信号的计数差值确定目标参数，包括：
基于所述第一计数差值和所述第二计数差值确定所述目标参数。
在一些可能实现的方式中，所述基于所述第一计数差值和所述第二计数差值确定所述目标参数，包括：
在所述第一计数差值和所述第二计数差值的平均值等于预设计数差值的情况下，将所述最小参数和所述最大参数的平均值确定为所述目标参数。
在一些可能实现的方式中，所述基于所述第一计数差值和所述第二计数差值确定所述目标参数，包括：
在所述第一计数差值和所述第二计数差值的平均值大于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值加1确定为第一参数；
基于所述第一参数生成第三脉冲信号；
获取所述第三脉冲信号的第三计数差值；
基于所述第三计数差值和所述第二计数差值确定所述目标参数。
在一些可能实现的方式中，所述基于所述第一计数差值和所述第二计数差值确定所述目标参数，包括：
在所述第一计数差值和所述第二计数差值的平均值小于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值减一确定为第二参数；
基于所述第二参数生成第四脉冲信号；
获取所述第四脉冲信号的第四计数差值；
基于所述第四计数差值和所述第一计数差值确定所述目标参数。
在一些可能实现的方式中，所述获取至少一个脉冲信号的计数差值，包括：
获取所述晶体基于所述多个参数分别生成的多个脉冲信号；
获取所述多个脉冲信号对应的多个计数差值；
其中，所述基于所述至少一个脉冲信号的计数差值确定目标参数，包括：
利用二分法，获取所述多个计数差值中的与预设计数差值最接近的目标计数差值；
将所述目标计数差值对应的参数确定为所述目标参数。
通过二分法获取目标计数差值，避免了遍历式的比较所述预设计数差值与每一个脉冲信号的计数差值，降低了芯片的计算量，提升了校准效率并减小了时间成本。
在一些可能实现的方式中，所述方法还包括：
按照升序或降序对所述多个计数差值进行排序。
在一些可能实现的方式中，所述多个参数的参数数值随着脉冲信号的频率的增大而减小。
通过定义所述多个参数的特性，能够使得获取的差值计数按照由大到小或由小到大的顺序自动排序，避免了获取所述多个计数差值后重新对所述多个计数差值重新排序的步骤，在通过二分法获取目标参数或目标计数差值的基础上，有效降低了校准脉冲信号的时间成本。
在一些可能实现的方式中，所述多个参数的参数数值与脉冲信号的频率成反比。
在一些可能实现的方式中，所述获取至少一个脉冲信号的计数差值，包括：
按照参数值升序或降序的顺序，依次获取至少一个脉冲信号的计数差值。
在一些可能实现的方式中，所述方法还包括：
利用通用串行总线USB转串口和通用异步收发传输器UART集线器HUB接收测试设备发送的校准信令，所述校准信令用于触发所述芯片进行晶体校准。
在一些可能实现的方式中，所述校准信令包括所述多个参数。
在一些可能实现的方式中，所述方法还包括：
将所述多个参数存储至寄存器，以便通过控制所述寄存器向所述晶体发送所述多个参数。
通过寄存器触发晶体生成待校准的脉冲信号，即寄存器负责并控制晶体生成待校准信号的操作，降低了芯片的工作负荷，有效提高了芯片进行脉冲信号校准的工作效率。
在一些可能实现的方式中，所述方法还包括：
将校准结果存储至所述寄存器，所述校准结果用于指示所述目标参数。
在一些可能实现的方式中，所述方法还包括：
利用通用串行总线USB转串口和通用异步收发传输器UART集线器HUB向测试设备发送校准结果和/或所述至少一个脉冲信号的计数差值，所述校准结果用于指示所述目标参数，所述至少一个脉冲信号的计数差值用于所述测试设备在显示界面与预设计数差值进行比较。
通过向测试设备发送所述至少一个脉冲信号的计数差值，使得用户能够在所述测试设备的显示界面上能够观察到所述至少一个脉冲信号的计数差值中的每一个计数差值和所述预设计数差值之间的对应关系，便于用户进行人工的调整目标计数差值，以实现自动校准配合人工校准的校准机制。类似地，通过向测试设备发送所述校准结果，有便于设计人员进行批量校准以及调整参数设计。
在一些可能实现的方式中，所述获取至少一个脉冲信号的计数差值，包括：
获取所述至少一个脉冲信号中每一个脉冲信号的多次计数差值；
将所述至少一个脉冲信号中每一个脉冲信号的多次计数差值中的在时间上靠后的至少一次计数差值，确定为所述相应脉冲信号的计数差值。
由此，能够准确获取每一个脉冲信号对应的计数差值，相应的，能够提高脉冲信号的校准精度。换言之，通过对所述至少一个脉冲信号中每一个脉冲信号进行测试后，再获取每一个脉冲信号对应的计数差值，能够避免在系统不稳定或晶体不稳定的情况下测量的脉冲信号的计数差值不准确，能够提高计数差值的准确度和脉冲信号的校准精度。
在一些可能实现的方式中，所述方法还包括：
接收利用已校准应用系统生成的所述参考脉冲信号。
通过应用系统触发已校准芯片产生所述参考脉冲信号，能够在获取所述参考脉冲信号的基础上，简化所述芯片的结构并降低硬件成本。
在一些可能实现的方式中，所述参考脉冲信号为脉冲宽度调制PWM信号。
在一些可能实现的方式中，所述芯片为蓝牙低功耗BLE芯片。
第二方面，提供了一种芯片，所述芯片包括：
晶体，用于基于多个参数中的至少一个参数生成的至少一个脉冲信号；
处理单元，所述处理单元连接至所述晶体，所述处理单元用于：
获取所述至少一个脉冲信号的计数差值，所述至少一个脉冲信号中每一个脉冲信号的计数差值为利用由参考脉冲信号触发的两次外部中断获取的基于相应脉 冲信号的系统滴答计数值之间的差值；
基于所述至少一个脉冲信号的计数差值确定目标参数；
将基于所述目标参数生成的脉冲信号确定为晶体校准后的脉冲信号。
在一些可能实现的方式中，所述处理单元具体用于：
利用二分法获取所述至少一个脉冲信号的计数差值。
在一些可能实现的方式中，所述处理单元更具体用于：
确定多个参数中的最小参数和最大参数；
基于最小参数和最大参数分别生成第一脉冲信号和第二脉冲信号；
分别获取所述第一脉冲信号的第一计数差值和第二脉冲信号的第二计数差值；
基于所述第一计数差值和所述第二计数差值确定所述目标参数。
在一些可能实现的方式中，所述处理单元更具体用于：
在所述第一计数差值和所述第二计数差值的平均值等于预设计数差值的情况下，将所述最小参数和所述最大参数的平均值确定为所述目标参数。
在一些可能实现的方式中，所述处理单元更具体用于：
在所述第一计数差值和所述第二计数差值的平均值大于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值加1确定为第一参数；
基于所述第一参数生成第三脉冲信号；
获取所述第三脉冲信号的第三计数差值；
基于所述第三计数差值和所述第二计数差值确定所述目标参数。
在一些可能实现的方式中，所述处理单元更具体用于：
在所述第一计数差值和所述第二计数差值的平均值小于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值减一确定为第二参数；
基于所述第二参数生成第四脉冲信号；
获取所述第四脉冲信号的第四计数差值；
基于所述第四计数差值和所述第一计数差值确定所述目标参数。
在一些可能实现的方式中，所述处理单元具体用于：
获取所述晶体基于所述多个参数分别生成的多个脉冲信号；
获取所述多个脉冲信号对应的多个计数差值；
利用二分法，获取所述多个计数差值中的与预设计数差值最接近的目标计数差值；
将所述目标计数差值对应的参数确定为所述目标参数。
在一些可能实现的方式中，所述处理单元还用于：
按照升序或降序对所述多个计数差值进行排序。
在一些可能实现的方式中，所述多个参数的参数数值随着脉冲信号的频率的增大而减小。
在一些可能实现的方式中，所述多个参数的参数数值与脉冲信号的频率成反比。
在一些可能实现的方式中，所述处理单元具体用于：
按照参数值升序或降序的顺序，依次获取至少一个脉冲信号的计数差值。
在一些可能实现的方式中，所述芯片还包括：
通用串行总线USB转串口和通用异步收发传输器UART集线器HUB，所述USB转串口通过所述UART HUB连接至所述处理单元，所述处理单元通过所述USB转串口和所述UART HUB接收测试设备发送的校准信令，所述校准信令用于触发所述芯片进行晶体校准。
在一些可能实现的方式中，所述校准信令包括所述多个参数。
在一些可能实现的方式中，所述芯片还包括：
寄存器，所述处理单元通过所述寄存器连接至所述晶体，所述处理单元用于将所述多个参数存储至寄存器，以便通过控制所述寄存器向所述晶体发送所述多个参数。
在一些可能实现的方式中，所述处理单元还用于将校准结果存储至所述寄存器，所述校准结果用于指示所述目标参数。
在一些可能实现的方式中，所述芯片还包括：
通用串行总线USB转串口和通用异步收发传输器UART集线器HUB，所述USB转串口通过所述UART HUB连接至所述处理单元，所述处理单元通过所述USB转串口和所述UART HUB向测试设备发送校准结果和/或所述至少一个脉冲信号的计数差值，所述校准结果用于指示所述目标参数，所述至少一个脉冲信号的计数差值用于所述测试设备在显示界面与预设计数差值进行比较。
在一些可能实现的方式中，所述处理单元具体用于：
获取所述至少一个脉冲信号中每一个脉冲信号的多次计数差值；
将所述至少一个脉冲信号中每一个脉冲信号的多次计数差值中的在时间上靠后的至少一次计数差值，确定为所述相应脉冲信号的计数差值。
在一些可能实现的方式中，所述处理单元具体用于：
接收利用已校准应用系统生成的所述参考脉冲信号。
在一些可能实现的方式中，所述参考脉冲信号为脉冲宽度调制PWM信号。
在一些可能实现的方式中，所述芯片为蓝牙低功耗BLE芯片。
第三方面，提供了一种蓝牙耳机，包括：
第二方面或第二方面中任一种可能实现的方式中所述的芯片。
附图说明
图1是本申请实施例的系统构架的示意图。
图2是本申请实施例的晶体校准的方法的示意性流程图。
图3是本申请实施例的晶体校准的方法的另一示意性流程图。
图4是本申请实施例的芯片的示意性框图。
具体实施方式
下面将结合附图，对本申请实施例中的技术方案进行描述。
本申请实施例中涉及的方法可以应用于各种晶体(又称为谐振器)，也可以应用于具有晶体的各种芯片或电子设备。例如在封装内部添加IC组成振荡电路的晶体元件。所述方法也可以应用于晶振(又称为振荡器)。所述晶体也可以称为无源晶振，所述晶振也可称为有源晶振。例如，晶振可以理解为所述晶体与所述晶体相连的电容的组合器件。
又例如，所述芯片可以是单片机(Single-Chip Microcomputer)或集成电路芯片。例如，所述芯片可以是采用超大规模集成电路技术把具有数据处理能力的中央处理器(Central Processing Unit，CPU)、随机存储器(Random Access Memory，RAM)、只读存储器(Read Only Memory，ROM)、多种I/O口和中断系统、将定时器/计数器等功能(可能还包括显示驱动电路、脉宽调制电路、模拟多路转换器、A/D转换器等电路)集成到一块硅片上构成的一个小而完善的微型计算机系统。
其中，晶体可以通过与所述晶体相连的电容的配合生成脉冲信号。本实施例中，可以将与晶体相连的电容集成到芯片内部，并且将电容值的大小做成可配置的状态。例如，将电容值做成配置的多个用于表示电容值的参数，使得芯片中的晶体可以基于所述多个参数分别生成多个脉冲信号。例如，芯片中的晶体可以基于配置的多个参数分别生成多个频率的脉冲信号。此时，用户可以通过修改电容 值(即修改配置的参数)的大小对脉冲信号的频率进行调整。由于每一个电路中元器件的一致性的问题，每一个产品在投入使用之前都需要单独设置一个最佳的电容值，使得脉冲信号的频率符合应用需求。本申请实施例的涉及的晶体校准可以指芯片在投入使用之前获取这个最佳电容值(或者最佳参数)的过程。当然，上述晶体校准可以包括修复后的校准或测试，以确定产品是否按照原始产品规格执行或运行其功能。
图1是本申请实施例的系统构架的示意性框图。
如图1所示，所述系统构架100可以包括测试设备110、中间设备或系统120以及芯片130。其中，所述测试设备110可以用于负责整个校准流程的启动或触发，例如，将用于生成脉冲信号的参数下发给中间设备或系统120，以便所述中间设备或系统将其转发给所述芯片130。所述测试设备110还可以用于显示校准结果。所述中间设备或系统120还可以用于生成参考脉冲信号。所述芯片130可以基于所述中间设备或系统120生成的参考脉冲信号和芯片130中的晶体生成的待校准的脉冲信号进行比较，以确定校准结果。所述芯片130还可以将校准结果通过中间设备或系统120发送给测试设备110，以便所述测试设备110显示所述校准结果。
所述测试设备110也可以称为校准工具或测试平台。例如，所述测试设备可以是个人计算机或者个人电脑(Personal Computer，PC)。比如传统的台式电脑、DIY电脑、笔记本电脑、以及近年来开始流行的平板电脑、一体机电脑、超级本、掌上电脑、嵌入式计算机等等。
在本申请的一些实施例中，所述测试设备110可以包括通用异步收发传输器(Universal Asynchronous Receiver/Transmitter，UART)111。所述UART 111将要传输的信息或数据在串行通信与并行通信之间加以转换。例如，将并行输入信号转成串行输出信号的芯片，所述UART 111可以被集成于所述测试设备110的通讯接口的连结上。所述测试设备110可以通过所述UART 111向所述中间设备或系统120发送参考脉冲信号触发命令，所述参考脉冲信号触发命令用于触发所述中间设备或系统120生成至少一个参考脉冲信号。例如，所述参考脉冲信号触发命令用于触发所述中间设备或系统120生成参考脉冲信号。
所述中间设备或系统120可以是独立于所述测试设备110和芯片130的物理设备，也可以是集成在所述测试设备110或芯片上的装置或应用程序。
在本申请的一些实施例中，所述中间设备或系统120还可以包括应用系统121，用于生成参考脉冲信号。例如，所述应用系统121可以生成16路参考脉冲信号。 例如，所述参考脉冲信号可以为时钟信号(clock signal，CLK)，即CLK…CLK16。可选地，所述中间设备或系统120可以包括通用串行总线(Universal Serial Bus，USB)转串口122，用于将所述测试设备110的USB接口转换成通用串口，便于快速接收所述测试设备110发送的信息或数据。例如，所述USB转串口122可以将一路串口转换成4路串口。可选地，所述测试设备还可以包括通用异步收发传输器集线器(Universal Asynchronous Receiver/Transmitter Hub，UART HUB)123，所述UART HUB 123可以用于将接收到的信号分成多路串口。例如，所述UART HUB 123可以用于将接收到的4路串口转换层16路串口。即所述UART HUB 123可以连接至UART 1…UART 16串口。例如，所述中间设备或系统120可以通过所述UART 1…UART 16串口将待发送的信息广播给芯片130。
串口也可称为串行接口、串行通信接口或串行通讯接口(例如COM接口)，是采用串行通信方式的扩展接口。串行接口(Serial Interface)将数据一位一位地顺序传送，其通信线路简单，可以实现双向通信(可以直接利用电话线作为传输线)。
所述芯片130可以称为待测设备(Device Under Test，DUT)，所述待测设备也称为被测设备(EUT)和被测单元(UUT)。所述待测设备可以是在首次制造时或在其生命周期后期进行测试的制造产品。上述芯片130可以是包括晶体或晶振的任意类型的芯片。例如，所述芯片130可以是蓝牙低功耗(Bluetooth Low Energy，BLE)芯片，所述BLE芯片也可以称为低功耗蓝牙芯片。
在本申请的一些实施例中，所述芯片130可以包括晶体131，所述晶体131用于生成脉冲信号，以便所述芯片130能够正常运行。可选地，所述芯片130还可以包括处理单元132，所述处理单元可以用于进行晶体校准过程，即判断待校准的脉冲信号是否能够达到预期的频率，或比较待校准的脉冲信号和参考脉冲信号。可选地，所述芯片130还可以包括寄存器133，所述寄存器133用于存储用于生成脉冲信号的参数。在校准过程中，所述处理单元132可以通过控制所述寄存器133将待校准的参数发送至所述晶体，以便所述晶体生成相应的脉冲信号。
需要说明的是，在图1的框架中，所述中间设备或系统120可以同时生成16路参考信号(即CLK1…CLK16)，所述中间设备或系统120也可以通过16路串口(UART 1…UART 16串口)发送信息或数据。换言之，图1所示的框架100可以用于同时对16个芯片进行校准，其中芯片130可以是所述16个芯片中的一个。当然，实际操作中，可以根据需求对一个或多个芯片进行校准，也可以设置小于 16路或大于16路的参考脉冲信号(或UART串口)，本申请实施例对此不做限定。
图2是本身实施例的晶体校准的方法200的示意性流程图。所述方法200适用于图1所示的晶体131或芯片130，也适用于系统框架100，为便于理解，下面以所述方法200的执行主体为芯片为例对所述方法进行说明。例如蓝牙低功耗(Bluetooth Low Energy，BLE)芯片。
如图2所示，上所述方法200可以包括：
S210，获取至少一个脉冲信号的计数差值，所述至少一个脉冲信号包括所述晶体基于多个参数中的至少一个参数生成的脉冲信号，所述至少一个脉冲信号中每一个脉冲信号的计数差值为利用由参考脉冲信号触发的两次外部中断获取的基于相应脉冲信号的系统滴答计数值之间的差值。
S220，基于所述至少一个脉冲信号的计数差值确定目标参数。
S230，将基于所述目标参数生成的脉冲信号确定为晶体校准后的脉冲信号。
简言之，芯片中的晶体基于获取到的至少一个参数分别生成至少一个脉冲信号后，所述芯片的处理单元可以通过比较所述至少一个脉冲信号和参考脉冲信号，确定出所述至少一个脉冲信号的计数差值(即所述至少一个脉冲信号中的每一个脉冲信号为时钟信号，通过所述参考脉冲信号触发的两次外部中断获取系统滴答计数器输出的两个计数值，并将所述两个计数值的差值作为同一个脉冲信号的计数差值)，然后基于所述至少一个脉冲信号的计数差值，确定出校准结果(即所述目标参数)。其中，所述晶体基于所述目标参数生成的脉冲信号的频率最符合预期频率。所述校准结果可以用于指示所述目标参数或基于所述目标参数生成的脉冲信号，或所述校准结果还可用于指示所述目标参数对应的计数差值。
通过所述至少一个脉冲信号的计数差值确定所述目标参数，不仅能够实现脉冲信号的自动校准降低了人力成本，还能够在降低校准机制的复杂度的同时提高校准效率。
其中，所述参考脉冲信号可以是如图1所示的应用系统121触发已校准的其他芯片生成的脉冲信号。
在本申请的一些实施例中，所述方法200还可包括：
所述芯片接收利用已校准应用系统生成的所述参考脉冲信号。
当然，本申请实施例不限于此。例如，在其他可替代实施例中，还可以通过集成有现场可编程逻辑门阵列(Field Programmable Gate Array，FPGA)或复杂可编程逻辑器件(Complex Programmable Logic Device，CPLD)的硬件电路提供一 个高精度的参考脉冲信号。
所述参考脉冲信号可以是任意精准度达到条件的脉冲信号。例如，所述参考脉冲信号可以是脉冲宽度调制(Pulse Width Modulation，PWM)信号。可以通过模拟控制方式调制信号，以生成所述PWM信号。例如，可以通过调制脉冲的宽度等效出所需要的波形(包含形状以及幅值)，进而对模拟信号电平进行数字编码，生成可以用于发送的信息或数据。例如，可以通过调节占空比的变化调节信号、能量等的变化。占空比可以是指在一个周期内，信号处于高电平的时间占据整个信号周期的百分比，例如方波的占空比就是50％。
在本申请的一些实施例中，可以直接通过芯片的内部模块生成PWM信号。例如，可以通过图1所示的芯片130或应用系统121生成PWM信号。例如，所述芯片130的I/O接口可以设置有集成模块。换言之，所述芯片130可以设置有带PWM信号输出的功能模块在程序。其中，I/O接口可以是所述芯片130与被控对象进行信息交换的纽带。所述芯片130可以通过I/O接口与外部设备进行数据交换。所述I/O接口可以是可编程接口，即所述I/O接口的工作方式可由程序进行控制。
下面对本申请实施例中芯片获取至少一个脉冲信号的计数差值的方法进行说明。
在本申请的一些实施例中，应用系统121在进行晶体校准之前可以是已使用频谱仪校准的系统，时钟频率准确度已经达到比标准协议(例如BLE标准协议)更精确的状态。实际操作中，所述应用系统121可以产生一个精准的一定频率(例如40Hz)的PWM信号给芯片130。芯片130通过一个可作为外部中断输入的I/O接口去采样应用系统121产生的PWM信号。校准的过程可以在芯片130内执行，由应用系统121产生的PWM信号驱动。
以利用遍历的方式获取所述多个脉冲信号对应的多个计数差值为例，结合图1来说，当测试设备110发送串口指令启动校准流程时，芯片130往寄存器133中写入一个参数(即用于生成脉冲信号的参数)。例如，所述参数可以是偏置值。又例如，所述偏置值的初始值可以是0。然后，所述芯片130可以计算两次外部中断之间系统嘀嗒时钟计数的差值并记录(假设系统嘀嗒时钟的时钟频率设置为64M，如果晶体已被校准的情况下系统嘀嗒时钟的时钟频率会无限接近64M，当系统嘀嗒时钟的频率为64M时，40Hz的PWM信号触发的两次外部中断之间系统嘀嗒计数值的差值应该为1600000，即预设计数差值可以为1600000)，之后参数+1并写入寄存器133，再次计算两次外部中断之间系统嘀嗒时钟计数的差值并记录，遍历 完所有晶体校准的参数，找出系统嘀嗒计数值的差值最接近1600000对应的参数，即为晶体校准的目标参数(可以用于体现校准结果)。
需要说明的是，寄存器可以基于所述目标参数触发晶体生成校准后的脉冲信号，例如，寄存器可以基于所述目标参数将与所述晶体连接的电容器的电容值修改(或调整)为所述目标参数对应的电容值，以生成校准后的脉冲信号。换言之，上述多个参数分别对应已配置的多个电容值。例如，所述多个参数与所述多个电容值一一对应。在所述多个参数中选择出所述目标参数作为最优参数，使得基于所述目标参数对应的电容值生成的脉冲信号为最符合预期(即最精准)的脉冲信号。
上述过程中，采用遍历的方法去测试每一个可能的参数，然后选出优的参数作为校准结果。本申请为例降低时间成本，减少参数或计数差值的采样数，可以只通过所述至少一个脉冲信号的计数差值确定所述目标参数，不仅能够实现脉冲信号的自动校准降低了人力成本，还能够在降低校准机制的复杂度的同时提高校准效率。
在本申请的一些实施例中，所述S210可包括：
利用二分法获取所述至少一个脉冲信号的计数差值。
例如，可以先利用二分法从所述多个参数中获取至少一个采样参数，然后基于所述至少一个采样参数分别生成的所述至少一个脉冲信号，获取至少一个脉冲信号的计数差值。
换言之，芯片可以基于二分法对多个参数进行采样，然后基于采样的参数生成脉冲信号，再基于脉冲信号的计数差值进行晶体校准。或者说，所述芯片可以基于二分法对所述多个参数进行采样，然后获取的脉冲信号的计数差值确定是否继续进行采样。
在本申请的一些实施例中，芯片可以先确定多个参数中的最小参数和最大参数；再基于最小参数和最大参数分别生成第一脉冲信号和第二脉冲信号；然后分别获取所述第一脉冲信号的第一计数差值和第二脉冲信号的第二计数差值；此时所述芯片可以基于所述第一计数差值和所述第二计数差值确定所述目标参数。
例如，所述芯片可以通过比较预设计数差值和所述第一计数差值和所述第二计数差值的平均值，确定所述目标参数。
其中，所述预设计数差值可以是基于预设的脉冲信号对应的计数差值，即所述预设计数差值可以为利用由参考脉冲信号触发的两次外部中断获取的基于已校 准的脉冲信号的系统滴答计数值之间的差值。所述预设计数差值可以是预先设定好的计数差值，也可以是预先测量的计数差值，当然，也可以是在校准过程中测量的计数差值，本申请实施例对此不做限定。
换言之，所述芯片可以先在所述多个参数中将最大参数和最小参数作为采样参数，以基于所述采样参数获取脉冲信号，再基于所述第一计数差值和所述第二计数的平均值，确定是否需要继续在所述多个参数中获取采样参数。
例如，在所述第一计数差值和所述第二计数差值的平均值等于预设计数差值的情况下，可以将所述最小参数和所述最大参数的平均值确定为所述目标参数。换言之，所述芯片在获取所述第一计数差值和所述第二计数差值之后，不需要再获取采样参数。
又例如，在所述第一计数差值和所述第二计数差值的平均值大于所述预设计数差值的情况下，可以将所述最小参数和所述最大参数的平均值加1确定为第一参数；基于所述第一参数生成第三脉冲信号；获取所述第三脉冲信号的第三计数差值；基于所述第三计数差值和所述第二计数差值确定所述目标参数。换言之，所述芯片在获取所述第一计数差值和所述第二计数差值之后，还需要利用二分法将所述第一参数作为采样参数，以获取所述第三脉冲信号。可选地，所述多个参数为连续参数。可选地，所述多个参数包括所述第一参数。可选地，在所述多个参数中，所述多个参数的参数数值随脉冲信号的计数差值的增大而减小；或者，所述多个参数的参数数值随脉冲信号的计数差值的减小而增大。
利用二分法在所述多个参数中确定采样参数，能够在保证校准精度的情况下，减少采样参数，即减少需要生成的脉冲信号，也减小了需要测量的计数差值，能够有效提高校准效率并缩小校准时间。
又例如，在所述第一计数差值和所述第二计数差值的平均值小于所述预设计数差值的情况下，可以将所述最小参数和所述最大参数的平均值减一确定为第二参数；基于所述第二参数生成第四脉冲信号；获取所述第四脉冲信号的第四计数差值；基于所述第四计数差值和所述第一计数差值确定所述目标参数。换言之，所述芯片在获取所述第一计数差值和所述第二计数差值之后，还需要利用二分法将所述第二参数作为采样参数，以获取所述第四脉冲信号。可选地，所述多个参数为连续参数。可选地，所述多个参数包括所述第二参数。可选地，在所述多个参数中，所述多个参数的参数数值随脉冲信号的计数差值的增大而减小；或者，所述多个参数的参数数值随脉冲信号的计数差值的减小而增大。
利用二分法在所述多个参数中确定采样参数，能够在保证校准精度的情况下，减少采样参数，即减少需要生成的脉冲信号，也减小了需要测量的计数差值，能够有效提高校准效率并缩小校准时间。
综上所述，利用二分化获取至少一个脉冲信号的计数差值，避免了获取所有的脉冲信号的计数差值，降低了需要获取的计数差值的总量，能够在保证校准准确度的同时，提高校准效率并减少时间成本。
图3是本申请实施例的晶体校准的方法300的示意性流程图。
如图3所示，所述方法300可包括以下中的部分或全部内容：
S310，芯片获取最小参数和最大参数。
S320，所述芯片基于所述最小参数和所述最大参数分别生成第一脉冲信号和第二脉冲信号，并判断是否已经通过参考脉冲信号触发所述第一脉冲信号和所述第二脉冲信号外部中断？
S330，若通过参考脉冲信号已分别触发所述第一脉冲信号和所述第二脉冲信号外部中断，所述芯片获取所述第一脉冲信号的计数差值和所述第二脉冲信号的计数差值。若没有通过参考脉冲信号触发所述第一脉冲信号或所述第二脉冲信号外部中断，返回到S320并执行。
S340，所述芯片是否已获取所述第一脉冲信号的5次计数差值和所述第二脉冲信号的5次计数差值？
S350，若所述芯片已获取所述第一脉冲信号的5次计数差值和所述第二脉冲信号的5次计数差值，所述芯片将所述第一脉冲信号的5次计数差值中的后3次计数差值的平均值，确定为所述第一脉冲信号对应的第一计数差值；将所述第二脉冲信号的5次计数差值中的后3次计数差值的平均值，确定为所述第二脉冲信号对应的第二计数差值。若所述芯片没有获取所述第一脉冲信号的5次计数差值或所述第二脉冲信号的5次计数差值，返回到S320并执行。
S360，所述最小参数是否小于所述最大参数？
S390，若所述最小参数等于所述最大参数，所述芯片将所述最小参数或所述最大参数确定为目标参数。
S370，若所述最小参数小于所述最大参数，判断所述第一计数差值和所述第二计数差值的平均值是否等于预设计数差值？
S371，若所述第一计数差值和所述第二计数差值的平均值等于预设计数差值，所述芯片将所述最小参数和所述最大参数的平均值确定为目标参数。
S380，若所述第一计数差值和所述第二计数差值的平均值不等于预设计数差值，判断所述第一计数差值和所述第二计数差值的平均值是否大于所述预设计数差值？
S381，若所述第一计数差值和所述第二计数差值的平均值大于所述预设计数差值，所述芯片将所述最小参数和所述最大参数的平均值加1重新确定为最小参数，返回到S320并执行。
S382，若所述第一计数差值和所述第二计数差值的平均值小于所述预设计数差值，所述芯片将所述最小参数和所述最大参数的平均值减1重新确定为所述最大参数，返回到S320并执行。
S390，校准结束。
在本申请的另一些实施例中，所述S210可包括：
获取所述晶体基于所述多个参数分别生成的多个脉冲信号；
此时，所述芯片可以先获取所述多个脉冲信号对应的多个计数差值；然后利用二分法，获取所述多个计数差值中的与预设计数差值最接近的目标计数差值；最后将所述目标计数差值对应的参数确定为所述目标参数。
通过二分法获取目标计数差值，避免了遍历式的比较所述预设计数差值与每一个脉冲信号的计数差值，降低了芯片的计算量，提升了校准效率并减小了时间成本。
在本申请的一些实施例中，所述方法200还可包括：
按照升序或降序对所述多个计数差值进行排序。
换言之，芯片获取所述多个计数差值后，将所述多个计数差值按照升序或降序排列，然后基于排列好的一组计数差值，利用二分法找到与所述预设计数差值最接近的目标计数差值。
例如，芯片可以先将所述多个计数差值组成的集合，确定为第一差值集合；然后在所述第一差值集合内，利用二分法确定所述目标计数差值。所述第一差值集合内的计数差值按升序或降序排序。
此时，所述芯片可以先确定所述第一差值集合内的中间位置的计数差值；在所述中间位置的计数差值等于所述预设计数差值的情况下，将所述中间位置的计数差值确定为所述目标计数差值。在所述中间位置的计数差值小于所述预设计数差值的情况下，若所述第一差值集合按升序排序，在所述第一差值集合的后半段中确定所述目标计数差值，若所述第一差值结合按降序排序，在所述第一差值集 合的前半段中确定所述目标计数差值。在所述中间位置的计数差值大于所述预设计数差值的情况下，若所述第一差值集合按升序排序，在所述第一差值集合的前半段中确定所述目标计数差值，若所述第一差值结合按降序排序，在所述第一差值集合的后半段中确定所述目标计数差值。
在本申请的一些实施例中，所述多个参数的参数数值随着脉冲信号的频率的增大而减小。
例如，所述多个参数的参数数值与脉冲信号的频率成反比。
换言之，所述多个参数的参数数值随着脉冲信号的计数差值的增大而减小。例如，所述多个参数的参数数值与脉冲信号的计数差值成反比。
通过定义所述多个参数的特性，能够使得获取的差值计数按照由大到小或由小到大的顺序自动排序，避免了获取所述多个计数差值后重新对所述多个计数差值重新排序的步骤，在通过二分法获取目标参数或目标计数差值的基础上，有效降低了校准脉冲信号的时间成本。
换言之，将所述多个参数的参数数值随着脉冲信号的频率的增大而减小，使得所述多个参数的参数数值随脉冲信号的计数差值的增大而减小，或者使得所述多个参数的参数数值随脉冲信号的计数差值的减小而增大，以便所述芯片利用二分法确定所述目标参数或目标计数差值。
在本申请的一些实施例中，所述S210可包括：
按照参数值升序或降序的顺序，依次获取至少一个脉冲信号的计数差值。
在本申请的一些实施例中，所述方法200还可包括：
利用USB转串口和UART HUB接收测试设备发送的校准信令，所述校准信令用于触发所述芯片进行晶体校准。
在本申请的一些实施例中，所述校准信令包括所述多个参数。
在本申请的一些实施例中，所述方法200还可包括：
将所述多个参数存储至寄存器，以便通过控制所述寄存器向所述晶体发送所述多个参数。
通过寄存器触发晶体生成待校准的脉冲信号，即寄存器负责并控制晶体生成待校准信号的操作，降低了芯片的工作负荷，有效提高了芯片进行脉冲信号校准的工作效率。
在本申请的一些实施例中，所述方法200还可包括：
将校准结果存储至所述寄存器，所述校准结果用于指示所述目标参数。
在本申请的一些实施例中，所述方法200还可包括：
利用USB转串口和UART HUB向测试设备发送校准结果和/或所述至少一个脉冲信号的计数差值，所述校准结果用于指示所述目标参数，所述至少一个脉冲信号的计数差值用于所述测试设备在显示界面与预设计数差值进行比较。
通过向测试设备发送所述至少一个脉冲信号的计数差值，使得用户能够在所述测试设备的显示界面上能够观察到所述至少一个脉冲信号的计数差值中的每一个计数差值和所述预设计数差值之间的对应关系，便于用户进行人工的调整目标计数差值，以实现自动校准配合人工校准的校准机制。类似地，通过向测试设备发送所述校准结果，有便于设计人员进行批量校准以及调整参数设计。
在本申请的一些实施例中，所述S210可包括：
获取所述至少一个脉冲信号中每一个脉冲信号的多次计数差值；
将所述至少一个脉冲信号中每一个脉冲信号的多次计数差值中的在时间上靠后的至少一次计数差值，确定为所述相应脉冲信号的计数差值。
由此，能够准确获取每一个脉冲信号对应的计数差值，相应的，能够提高脉冲信号的校准精度。换言之，通过对所述至少一个脉冲信号中每一个脉冲信号进行测试后，再获取每一个脉冲信号对应的计数差值，能够避免在系统不稳定或晶体不稳定的情况下测量的脉冲信号的计数差值不准确，能够提高计数差值的准确度和脉冲信号的校准精度。
此外，本申请还提供了一种可用于执行上述方法200或300芯片。
图4是本申请实施例的芯片400的示意性框图。所述芯片400可以是图1所示的芯片130。
如图4所示，所述芯片400可包括：
晶体410，用于基于多个参数分别生成的多个脉冲信号；
处理单元420，所述处理单元420连接至所述晶体410，所述处理单元420用于：
获取所述晶体410基于多个参数中的至少一个参数生成的至少一个脉冲信号；
获取至少一个脉冲信号的计数差值，所述至少一个脉冲信号中每一个脉冲信号的计数差值为利用由参考脉冲信号触发的两次外部中断获取的基于相应脉冲信号的系统滴答计数值之间的差值；
基于所述至少一个脉冲信号的计数差值确定目标参数；
将基于所述目标参数生成的脉冲信号确定为晶体410校准后的脉冲信号。
在本申请的一些实施例中，所述处理单元420具体用于：
利用二分法获取所述至少一个脉冲信号的计数差值。
在本申请的一些实施例中，所述处理单元420更具体用于：
确定多个参数中的最小参数和最大参数；
基于最小参数和最大参数分别生成第一脉冲信号和第二脉冲信号；
分别获取所述第一脉冲信号的第一计数差值和第二脉冲信号的第二计数差值；
基于所述第一计数差值和所述第二计数差值确定所述目标参数。
在本申请的一些实施例中，所述处理单元420更具体用于：
在所述第一计数差值和所述第二计数差值的平均值等于预设计数差值的情况下，将所述最小参数和所述最大参数的平均值确定为所述目标参数。
在本申请的一些实施例中，所述处理单元420更具体用于：
在所述第一计数差值和所述第二计数差值的平均值大于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值加1确定为第一参数；
基于所述第一参数生成第三脉冲信号；
获取所述第三脉冲信号的第三计数差值；
基于所述第三计数差值和所述第二计数差值确定所述目标参数。
在本申请的一些实施例中，所述处理单元420更具体用于：
在所述第一计数差值和所述第二计数差值的平均值小于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值减一确定为第二参数；
基于所述第二参数生成第四脉冲信号；
获取所述第四脉冲信号的第四计数差值；
基于所述第四计数差值和所述第一计数差值确定所述目标参数。
在本申请的一些实施例中，所述处理单元420具体用于：
获取所述晶体410基于所述多个参数分别生成的多个脉冲信号；
获取所述多个脉冲信号对应的多个计数差值；
利用二分法，获取所述多个计数差值中的与预设计数差值最接近的目标计数差值；
将所述目标计数差值对应的参数确定为所述目标参数。
在本申请的一些实施例中，所述处理单元420还用于：
按照升序或降序对所述多个计数差值进行排序。
在本申请的一些实施例中，所述多个参数的参数数值随着脉冲信号的频率的增大而减小。
在本申请的一些实施例中，所述多个参数的参数数值与脉冲信号的频率成反比。
在本申请的一些实施例中，所述处理单元420具体用于：
按照参数值升序或降序的顺序，依次获取至少一个脉冲信号的计数差值。
在本申请的一些实施例中，所述芯片还包括：
通用串行总线USB转串口和通用异步收发传输器UART集线器HUB，所述USB转串口通过所述UART HUB连接至所述处理单元420，所述处理单元420通过所述USB转串口和所述UART HUB接收测试设备发送的校准信令，所述校准信令用于触发所述芯片进行晶体410校准。
在本申请的一些实施例中，所述校准信令包括所述多个参数。
在本申请的一些实施例中，所述芯片还包括：
寄存器，所述处理单元420通过所述寄存器连接至所述晶体410，所述处理单元420用于将所述多个参数存储至寄存器，以便通过控制所述寄存器向所述晶体410发送所述多个参数。
在本申请的一些实施例中，所述处理单元420还用于将校准结果存储至所述寄存器，所述校准结果用于指示所述目标参数。
在本申请的一些实施例中，所述芯片还包括：
通用串行总线USB转串口和通用异步收发传输器UART集线器HUB，所述USB转串口通过所述UART HUB连接至所述处理单元420，所述处理单元420通过所述USB转串口和所述UART HUB向测试设备发送校准结果和/或所述至少一个脉冲信号的计数差值，所述校准结果用于指示所述目标参数，所述至少一个脉冲信号的计数差值用于所述测试设备在显示界面与预设计数差值进行比较。
在本申请的一些实施例中，所述处理单元420具体用于：
获取所述至少一个脉冲信号中每一个脉冲信号的多次计数差值；
将所述至少一个脉冲信号中每一个脉冲信号的多次计数差值中的在时间上靠后的至少一次计数差值，确定为所述相应脉冲信号的计数差值。
在本申请的一些实施例中，所述处理单元420具体用于：
接收利用已校准应用系统生成的所述参考脉冲信号。
在本申请的一些实施例中，所述参考脉冲信号为脉冲宽度调制PWM信号。
在本申请的一些实施例中，所述芯片为蓝牙低功耗BLE芯片。
另外，本申请还提供了一种蓝牙耳机，所述蓝牙耳机可包括上述芯片400。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应所述以权利要求的保护范围为准。

Claims (41)

  1. 一种晶体校准的方法，其特征在于，适用于具有晶体的芯片，所述方法包括：
    获取至少一个脉冲信号的计数差值，所述至少一个脉冲信号包括所述晶体基于多个参数中的至少一个参数生成的脉冲信号，所述至少一个脉冲信号中每一个脉冲信号的计数差值为利用由参考脉冲信号触发的两次外部中断获取的基于相应脉冲信号的系统滴答计数值之间的差值；
    基于所述至少一个脉冲信号的计数差值确定目标参数；
    将基于所述目标参数生成的脉冲信号确定为晶体校准后的脉冲信号。
  2. 根据权利要求1所述的方法，其特征在于，所述获取至少一个脉冲信号的计数差值，包括：
    利用二分法获取所述至少一个脉冲信号的计数差值。
  3. 根据权利要求2所述的方法，其特征在于，所述利用二分法获取所述至少一个脉冲信号的计数差值，包括：
    确定多个参数中的最小参数和最大参数；
    基于最小参数和最大参数分别生成第一脉冲信号和第二脉冲信号；
    分别获取所述第一脉冲信号的第一计数差值和第二脉冲信号的第二计数差值；
    其中，基于所述至少一个脉冲信号的计数差值确定目标参数，包括：
    基于所述第一计数差值和所述第二计数差值确定所述目标参数。
  4. 根据权利要求3所述的方法，其特征在于，所述基于所述第一计数差值和所述第二计数差值确定所述目标参数，包括：
    在所述第一计数差值和所述第二计数差值的平均值等于预设计数差值的情况下，将所述最小参数和所述最大参数的平均值确定为所述目标参数。
  5. 根据权利要求3或4所述的方法，其特征在于，所述基于所述第一计数差值和所述第二计数差值确定所述目标参数，包括：
    在所述第一计数差值和所述第二计数差值的平均值大于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值加1确定为第一参数；
    基于所述第一参数生成第三脉冲信号；
    获取所述第三脉冲信号的第三计数差值；
    基于所述第三计数差值和所述第二计数差值确定所述目标参数。
  6. 根据权利要求3至5中任一项所述的方法，其特征在于，所述基于所述第一计数差值和所述第二计数差值确定所述目标参数，包括：
    在所述第一计数差值和所述第二计数差值的平均值小于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值减一确定为第二参数；
    基于所述第二参数生成第四脉冲信号；
    获取所述第四脉冲信号的第四计数差值；
    基于所述第四计数差值和所述第一计数差值确定所述目标参数。
  7. 根据权利要求1所述的方法，其特征在于，所述获取至少一个脉冲信号的计数差值，包括：
    获取所述晶体基于所述多个参数分别生成的多个脉冲信号；
    获取所述多个脉冲信号对应的多个计数差值；
    其中，所述基于所述至少一个脉冲信号的计数差值确定目标参数，包括：
    利用二分法，获取所述多个计数差值中的与预设计数差值最接近的目标计数差值；
    将所述目标计数差值对应的参数确定为所述目标参数。
  8. 根据权利要求7所述的方法，其特征在于，所述方法还包括：
    按照升序或降序对所述多个计数差值进行排序。
  9. 根据权利要求1至8中任一项所述的方法，其特征在于，所述多个参数的参数数值随着脉冲信号的频率的增大而减小。
  10. 根据权利要求9所述的方法，其特征在于，所述多个参数的参数数值与脉冲信号的频率成反比。
  11. 根据权利要求9所述的方法，其特征在于，所述获取至少一个脉冲信号的计数差值，包括：
    按照参数值升序或降序的顺序，依次获取至少一个脉冲信号的计数差值。
  12. 根据权利要求1至11中任一项所述的方法，其特征在于，所述方法还包括：
    利用通用串行总线USB转串口和通用异步收发传输器UART集线器HUB接收测试设备发送的校准信令，所述校准信令用于触发所述芯片进行晶体校准。
  13. 根据权利要求12所述的方法，其特征在于，所述校准信令包括所述多个参数。
  14. 根据权利要求1至13中任一项所述的方法，其特征在于，所述方法还包括：
    将所述多个参数存储至寄存器，以便通过控制所述寄存器向所述晶体发送所述多个参数。
  15. 根据权利要求14所述的方法，其特征在于，所述方法还包括：
    将校准结果存储至所述寄存器，所述校准结果用于指示所述目标参数。
  16. 根据权利要求1至15中任一项所述的方法，其特征在于，所述方法还包括：
    利用通用串行总线USB转串口和通用异步收发传输器UART集线器HUB向测试设备发送校准结果和/或所述至少一个脉冲信号的计数差值，所述校准结果用于指示所述目标参数，所述至少一个脉冲信号的计数差值用于所述测试设备在显示界面与预设计数差值进行比较。
  17. 根据权利要求1至16中任一项所述的方法，其特征在于，所述获取至少一个脉冲信号的计数差值，包括：
    获取所述至少一个脉冲信号中每一个脉冲信号的多次计数差值；
    将所述至少一个脉冲信号中每一个脉冲信号的多次计数差值中的在时间上靠后的至少一次计数差值，确定为所述相应脉冲信号的计数差值。
  18. 根据权利要求1至17中任一项所述的方法，其特征在于，所述方法还包括：
    接收利用已校准应用系统生成的所述参考脉冲信号。
  19. 根据权利要求1至18中任一项所述的方法，其特征在于，所述参考脉冲信号为脉冲宽度调制PWM信号。
  20. 根据权利要求1至19中任一项所述的方法，其特征在于，所述芯片为蓝牙低功耗BLE芯片。
  21. 一种芯片，其特征在于，所述芯片包括：
    晶体，用于基于多个参数分别生成的多个脉冲信号；
    处理单元，所述处理单元连接至所述晶体，所述处理单元用于：
    获取至少一个脉冲信号的计数差值，所述至少一个脉冲信号包括所述晶体基于多个参数中的至少一个参数生成的脉冲信号，所述至少一个脉冲信号中每一个脉冲信号的计数差值为利用由参考脉冲信号触发的两次外部中断获取的基于相应脉冲信号的系统滴答计数值之间的差值；
    基于所述至少一个脉冲信号的计数差值确定目标参数；
    将基于所述目标参数生成的脉冲信号确定为晶体校准后的脉冲信号。
  22. 根据权利要求21所述的芯片，其特征在于，所述处理单元具体用于：
    利用二分法获取所述至少一个脉冲信号的计数差值。
  23. 根据权利要求22所述的芯片，其特征在于，所述处理单元更具体用于：
    确定多个参数中的最小参数和最大参数；
    基于最小参数和最大参数分别生成第一脉冲信号和第二脉冲信号；
    分别获取所述第一脉冲信号的第一计数差值和第二脉冲信号的第二计数差值；
    基于所述第一计数差值和所述第二计数差值确定所述目标参数。
  24. 根据权利要求23所述的芯片，其特征在于，所述处理单元更具体用于：
    在所述第一计数差值和所述第二计数差值的平均值等于预设计数差值的情况下，将所述最小参数和所述最大参数的平均值确定为所述目标参数。
  25. 根据权利要求23或24所述的芯片，其特征在于，所述处理单元更具体用于：
    在所述第一计数差值和所述第二计数差值的平均值大于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值加1确定为第一参数；
    基于所述第一参数生成第三脉冲信号；
    获取所述第三脉冲信号的第三计数差值；
    基于所述第三计数差值和所述第二计数差值确定所述目标参数。
  26. 根据权利要求23至25中任一项所述的芯片，其特征在于，所述处理单元更具体用于：
    在所述第一计数差值和所述第二计数差值的平均值小于所述预设计数差值的情况下，将所述最小参数和所述最大参数的平均值减一确定为第二参数；
    基于所述第二参数生成第四脉冲信号；
    获取所述第四脉冲信号的第四计数差值；
    基于所述第四计数差值和所述第一计数差值确定所述目标参数。
  27. 根据权利要求21所述的芯片，其特征在于，所述处理单元具体用于：
    获取所述晶体基于所述多个参数分别生成的多个脉冲信号；
    获取所述多个脉冲信号对应的多个计数差值；
    利用二分法，获取所述多个计数差值中的与预设计数差值最接近的目标计数 差值；
    将所述目标计数差值对应的参数确定为所述目标参数。
  28. 根据权利要求27所述的芯片，其特征在于，所述处理单元还用于：
    按照升序或降序对所述多个计数差值进行排序。
  29. 根据权利要求21至28中任一项所述的芯片，其特征在于，所述多个参数的参数数值随着脉冲信号的频率的增大而减小。
  30. 根据权利要求29所述的芯片，其特征在于，所述多个参数的参数数值与脉冲信号的频率成反比。
  31. 根据权利要求29所述的芯片，其特征在于，所述处理单元具体用于：
    按照参数值升序或降序的顺序，依次获取至少一个脉冲信号的计数差值。
  32. 根据权利要求21至31中任一项所述的芯片，其特征在于，所述芯片还包括：
    通用串行总线USB转串口和通用异步收发传输器UART集线器HUB，所述USB转串口通过所述UART HUB连接至所述处理单元，所述处理单元通过所述USB转串口和所述UART HUB接收测试设备发送的校准信令，所述校准信令用于触发所述芯片进行晶体校准。
  33. 根据权利要求32所述的芯片，其特征在于，所述校准信令包括所述多个参数。
  34. 根据权利要求21至33中任一项所述的芯片，其特征在于，所述芯片还包括：
    寄存器，所述处理单元通过所述寄存器连接至所述晶体，所述处理单元用于将所述多个参数存储至寄存器，以便通过控制所述寄存器向所述晶体发送所述多个参数。
  35. 根据权利要求34所述的芯片，其特征在于，所述处理单元还用于将校准结果存储至所述寄存器，所述校准结果用于指示所述目标参数。
  36. 根据权利要求21至35中任一项所述的芯片，其特征在于，所述芯片还包括：
    通用串行总线USB转串口和通用异步收发传输器UART集线器HUB，所述USB转串口通过所述UART HUB连接至所述处理单元，所述处理单元通过所述USB转串口和所述UART HUB向测试设备发送校准结果和/或所述至少一个脉冲信号的计数差值，所述校准结果用于指示所述目标参数，所述至少一个脉冲信号 的计数差值用于所述测试设备在显示界面与预设计数差值进行比较。
  37. 根据权利要求21至36中任一项所述的芯片，其特征在于，所述处理单元具体用于：
    获取所述至少一个脉冲信号中每一个脉冲信号的多次计数差值；
    将所述至少一个脉冲信号中每一个脉冲信号的多次计数差值中的在时间上靠后的至少一次计数差值，确定为所述相应脉冲信号的计数差值。
  38. 根据权利要求21至37中任一项所述的芯片，其特征在于，所述处理单元具体用于：
    接收利用已校准应用系统生成的所述参考脉冲信号。
  39. 根据权利要求21至38中任一项所述的芯片，其特征在于，所述参考脉冲信号为脉冲宽度调制PWM信号。
  40. 根据权利要求21至39中任一项所述的芯片，其特征在于，所述芯片为蓝牙低功耗BLE芯片。
  41. 一种蓝牙耳机，其特征在于，包括：
    根据权利要求21至40中任一项所述的芯片。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090049326A1 (en) * 2007-08-14 2009-02-19 Samsung Electronics Co., Ltd. Clock signal generator for generating stable clock signal, semiconductor memory device including the same, and methods of operating
CN102207522A (zh) * 2011-04-01 2011-10-05 广州润芯信息技术有限公司 一种基于频率测量的rc常数测量方法
CN102819282A (zh) * 2012-07-26 2012-12-12 大唐微电子技术有限公司 一种时钟恢复电路装置及相应的方法
CN103176400A (zh) * 2013-01-14 2013-06-26 杭州海兴电力科技股份有限公司 智能电表时钟校准方法
CN203759695U (zh) * 2014-03-11 2014-08-06 泰凌微电子（上海）有限公司 一种usb芯片
CN104915305A (zh) * 2014-03-11 2015-09-16 泰凌微电子（上海）有限公司 一种usb设备的芯片及其频率校准方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60206149D1 (de) * 2002-07-05 2005-10-20 St Microelectronics Sa Verfahren zum Betreiben eines Mikrokontrollerchips mit einem internen RC-Oszillator, und Mikrokontrollerchip zur Durchführung des Verfahrens

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090049326A1 (en) * 2007-08-14 2009-02-19 Samsung Electronics Co., Ltd. Clock signal generator for generating stable clock signal, semiconductor memory device including the same, and methods of operating
CN102207522A (zh) * 2011-04-01 2011-10-05 广州润芯信息技术有限公司 一种基于频率测量的rc常数测量方法
CN102819282A (zh) * 2012-07-26 2012-12-12 大唐微电子技术有限公司 一种时钟恢复电路装置及相应的方法
CN103176400A (zh) * 2013-01-14 2013-06-26 杭州海兴电力科技股份有限公司 智能电表时钟校准方法
CN203759695U (zh) * 2014-03-11 2014-08-06 泰凌微电子（上海）有限公司 一种usb芯片
CN104915305A (zh) * 2014-03-11 2015-09-16 泰凌微电子（上海）有限公司 一种usb设备的芯片及其频率校准方法

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