WO2021120276A1 - 阵列基板和液晶显示面板 - Google Patents

阵列基板和液晶显示面板 Download PDF

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Publication number
WO2021120276A1
WO2021120276A1 PCT/CN2019/128726 CN2019128726W WO2021120276A1 WO 2021120276 A1 WO2021120276 A1 WO 2021120276A1 CN 2019128726 W CN2019128726 W CN 2019128726W WO 2021120276 A1 WO2021120276 A1 WO 2021120276A1
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WO
WIPO (PCT)
Prior art keywords
via hole
color resist
substrate
resist layer
array substrate
Prior art date
Application number
PCT/CN2019/128726
Other languages
English (en)
French (fr)
Inventor
俞云
朱清永
Original Assignee
Tcl华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tcl华星光电技术有限公司 filed Critical Tcl华星光电技术有限公司
Priority to US16/627,341 priority Critical patent/US11194196B2/en
Publication of WO2021120276A1 publication Critical patent/WO2021120276A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate

Definitions

  • This application relates to the field of display technology, and in particular to an array substrate and a liquid crystal display panel.
  • the alignment film layer is usually coated by inkjet printing, but because the array substrate has been etched with lines, holes, etc. before the alignment film layer is coated, the terrain is complicated, and the droplets and droplets printed by inkjet There is a certain distance between them, which requires diffusion, spreading, drying and curing to form a uniform film on the surface of the array substrate.
  • the surface of the array substrate has complex topography, especially when there are large holes. Due to the effect of surface tension on the liquid, the alignment film will flow around when it encounters large holes and cannot flow into the holes, but accumulates around the holes, resulting in holes The surrounding film thickness is too thick, and there are abnormalities such as display unevenness (Mura).
  • the existing liquid crystal display panel has a technical problem that the alignment film tends to accumulate around the via hole when the alignment film flows, and needs to be improved.
  • the present application provides an array substrate and a liquid crystal display panel to alleviate the technical problem that the alignment film in the existing liquid crystal display panel is easy to accumulate around the via hole when it flows.
  • the application provides an array substrate, including:
  • the driving circuit layer is formed on one side of the substrate
  • the via hole includes a first via hole with an aperture greater than a threshold value, and a diversion portion is also formed in the color resist layer, and the diversion portion is connected to at least a part of the first via hole and is located in the first via hole.
  • the first via hole includes an orifice close to a side of the pixel electrode layer, the diversion portion includes a diversion surface flush with the orifice, the The guide surface is connected with a part of the edge of the orifice.
  • the first via hole is connected to at least one of the air guide portions.
  • the flow guiding part is formed on the outer side of the first via hole, and the flow guiding part is a groove.
  • the flow guide portion is formed inside the first via hole, and the flow guide portion is a solid structure.
  • the physical structure and the color resist layer are integrally formed.
  • the air guiding portion includes a first air guiding portion formed outside the first via hole and a second air guiding portion formed inside the first via hole.
  • the guide portion is a groove
  • the second guide portion is a solid structure.
  • the physical structure and the color resist layer are integrally formed.
  • the shape of the flow guide surface is at least one of a triangle, an arc shape, a rectangle, or a trapezoid.
  • the depth of the flow guide portion is less than or equal to the thickness of the color resist layer.
  • the cross section of the flow guide includes a first side and a second side, the first side is connected to the side wall of the first via, and the second side Far away from the sidewall of the first via hole, the second side has a hypotenuse or a step structure.
  • the present application also provides a liquid crystal display panel, including a first substrate and a second substrate arranged in a cell, and liquid crystal filled between the first substrate and the second substrate, and the first substrate includes:
  • the driving circuit layer is formed on one side of the substrate
  • the via hole includes a first via hole with an aperture greater than a threshold value, and a diversion portion is also formed in the color resist layer, and the diversion portion is connected to at least a part of the first via hole and is located in the first via hole.
  • the first via hole includes an orifice close to a side of the pixel electrode layer, the diversion portion includes a diversion surface flush with the orifice, the The guide surface is connected with a part of the edge of the orifice.
  • the first via hole is connected to at least one of the guide portions.
  • the flow guiding portion is formed outside the first via hole, and the flow guiding portion is a groove.
  • the flow guide portion is formed inside the first via hole, and the flow guide portion is a solid structure.
  • the physical structure and the color resist layer are integrally formed.
  • the air guiding portion includes a first air guiding portion formed outside the first via hole and a second air guiding portion formed inside the first via hole.
  • a diversion part is a groove
  • the second diversion part is a solid structure.
  • the physical structure and the color resist layer are integrally formed.
  • the shape of the flow guide surface is at least one of a triangle, an arc, a rectangle, or a trapezoid.
  • the depth of the air guide portion is less than or equal to the thickness of the color resist layer.
  • the cross section of the flow guide includes a first side and a second side, the first side is connected to the side wall of the first via, and the second side The side is far away from the side wall of the first via hole, and the second side has a hypotenuse or a step structure.
  • the application provides an array substrate and a liquid crystal display panel.
  • the array substrate includes a substrate, a driving circuit layer, a color resist layer, and a pixel electrode layer.
  • the driving circuit layer is formed on one side of the substrate; the color resist layer is formed On the side of the driving circuit layer away from the substrate, a via is formed in the color resist layer; the pixel electrode layer is formed on the side of the color resist layer away from the driving circuit layer, and the pixel electrode layer is connected to the driving circuit layer through the via;
  • the via hole includes a first via hole with an aperture greater than a threshold value, and a diversion portion is also formed in the color resist layer.
  • the diversion portion is connected to at least part of the first via hole and is located on at least one of the inner side and the outer side of the first via hole
  • the first via hole includes an orifice close to a side of the pixel electrode layer, and the diversion portion includes a diversion surface that is flush with the orifice, and the diversion surface is connected with a part of the edge of the orifice.
  • FIG. 1 is a schematic diagram of the first structure of an array substrate provided by an embodiment of the application.
  • FIG. 2 is a schematic top view of the structure of an array substrate in the prior art.
  • FIG. 3 is a schematic diagram of the state when the alignment film in the array substrate flows through the via hole in the color resist layer in the prior art.
  • FIG. 4 is a schematic diagram of the force state of the alignment film when the alignment film flows around the first via hole in the prior art.
  • FIG. 5 is a schematic top view of the structure of the array substrate provided by an embodiment of the application.
  • FIG. 6 is a first top view comparison diagram of the array substrate provided by an embodiment of the application, in which the flow guide portion is not provided and the flow guide portion is provided.
  • FIG. 7 is a second top view comparison diagram of the array substrate provided by an embodiment of the application, in which the flow guide portion is not provided and the flow guide portion is provided.
  • FIG. 8 is a third plan view comparison diagram of the array substrate provided by an embodiment of the application, in which the flow guide portion is not provided and the flow guide portion is provided.
  • FIG. 9 is a schematic top view of the entire flow guide portion and the first via hole in the array substrate provided by an embodiment of the application.
  • FIG. 10 is a comparative schematic diagram of the first cross-section of the array substrate provided by an embodiment of the application in which no flow guide portion is provided and a flow guide portion is provided.
  • FIG. 11 is a schematic diagram of a second cross-sectional comparison of the array substrate provided by an embodiment of the application, in which the flow guide portion is not provided and the flow guide portion is provided.
  • the present application provides a liquid crystal display panel, a manufacturing method thereof, and a manufacturing system.
  • a manufacturing method thereof a manufacturing system.
  • the present application will be further described in detail below with reference to the drawings and examples. It should be understood that the specific embodiments described here are only used to explain the application, and are not used to limit the application.
  • the present application provides an array substrate and a liquid crystal display panel to alleviate the technical problem that the alignment film in the existing liquid crystal display panel is easy to accumulate around the via hole when it flows.
  • FIG. 1 it is a schematic diagram of the first structure of an array substrate provided by an embodiment of this application.
  • the array substrate includes a substrate 100, a driving circuit layer 200, a color resist layer 400, and a pixel electrode layer.
  • the driving circuit layer 200 is formed on the side of the substrate 100; the color resist layer 400 is formed on the side of the driving circuit layer 200 away from the substrate 100, and the color resist layer 400 is formed with vias 700; the pixel electrode layer is formed on the color resist layer 400 On the side far away from the driving circuit layer 200, the pixel electrode layer is connected to the driving circuit layer 200 through a via 700; wherein the via 700 includes a first via 701 with an aperture greater than a threshold, and a flow guide is also formed in the color resist layer 700 900.
  • the air guide portion 900 is connected to at least a part of the first via 701 and is located on at least one of the inner and outer sides of the first via 701.
  • the first via 701 includes an aperture 71 close to the side of the pixel electrode layer.
  • the guiding portion 900 includes a guiding surface 91 flush with the orifice 71, and the guiding surface 91 is connected to a part of the edge of the orifice 71.
  • the substrate 100 may be a rigid substrate, such as glass, transparent resin, etc., or a flexible substrate, such as polyimide, polycarbonate, polyethersulfone, polyethylene terephthalate, and polyethylene naphthalate. Ethylene formate, polyarylate or glass fiber reinforced plastic, etc., the material of the substrate 100 is not limited in the present application.
  • the driving circuit layer 200 is formed on the side of the substrate 100 and includes a plurality of thin film transistors. Taking a bottom-gate thin film transistor as an example, the thin film transistor includes an active layer 201 and a first gate insulating layer 202 laminated on the substrate 100. , The first metal layer 203, the second gate insulating layer 204, the second metal layer 205, the interlayer dielectric layer 206, the source and drain layers.
  • a buffer layer (not shown) is usually formed on the substrate 100, and the material of the buffer layer may be inorganic materials such as silicon oxide and silicon nitride.
  • the active layer 201 is formed on the buffer layer, and the material of the active layer 201 is a metal oxide, such as indium gallium zinc oxide (IGZO), but not limited to this, it can also be aluminum zinc oxide (AZO), indium One or more of zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), boron-doped zinc oxide (BZO), and magnesium-doped zinc oxide (MZO).
  • the active layer 201 may also be a polysilicon material or other materials.
  • the first gate insulating layer 202 is formed on the active layer, and the material of the first gate insulating layer 202 may be inorganic materials such as silicon oxide and silicon nitride.
  • the first metal layer 203 is formed on the first gate insulating layer 202.
  • the material of the first metal layer 203 can be molybdenum, aluminum, copper, but not limited to this, and can also be chromium, tungsten, titanium, tantalum, and Their alloys and other materials are not specifically limited here.
  • the first metal layer 203 is patterned through an etching process to form the gate of each thin film transistor, the first plate of the storage capacitor, and the scan line.
  • the second gate insulating layer 204 is formed on the first metal layer 203, and the material of the second gate insulating layer 204 can be inorganic materials such as silicon oxide and silicon nitride.
  • the second metal layer 205 is formed on the second gate insulating layer 204.
  • the material of the second metal layer 205 can be molybdenum, aluminum, copper, but not limited to this, and can also be chromium, tungsten, titanium, tantalum, and Their alloys and other materials are not specifically limited here.
  • the second metal layer 205 is patterned to form a second plate of the storage capacitor.
  • the interlayer dielectric layer 206 is formed on the second metal layer 205, and the material of the interlayer dielectric layer 206 may be an inorganic material such as silicon oxide or silicon nitride.
  • the source and drain layer is formed on the interlayer dielectric layer 206.
  • the material of the source and drain layer can be molybdenum, aluminum, copper, but not limited to this, and can also be chromium, tungsten, titanium, tantalum, and alloys containing them, etc. Materials, the source and drain layers are patterned through an etching process to form the source 207, the drain 208 and the data line of each thin film transistor. The source electrode 207 and the drain electrode 208 are connected to the active layer 201 through a third via hole.
  • the color resist layer 400 is formed on the driving circuit layer 200, and the color resist layer 400 includes red, green, and blue color resists arranged in sequence.
  • a via 700 is formed in the color resist layer 400.
  • a first passivation layer 300 and a second passivation layer 500 are respectively formed above and below the color resist layer 400, and the material of the first passivation layer 300 and the second passivation layer 500 may be oxidized.
  • the via hole 700 also penetrates the first passivation layer 300 and the second passivation layer 500 at this time.
  • each film layer in the above-mentioned driving circuit layer takes a bottom-gate thin film transistor as an example.
  • the structure of the driving circuit layer 200 is not limited to this, and may also include a top-gate thin film transistor.
  • a pixel electrode layer is formed on the driving circuit layer 200.
  • the pixel electrode layer includes a plurality of pixel electrodes 600 arranged in an array and independent of each other.
  • the pixel electrodes 600 are connected to the drain 208 of the thin film transistor through a via 700.
  • the via 700 includes a first via 701 with an aperture greater than a threshold and a second via 702 with an aperture not greater than the threshold.
  • the shape of the via 700 is circular or approximately circular.
  • the via 700 may also only include the first via 701, where the aperture refers to the critical dimension (CD, Critical Dimension) of the via 700, and the threshold can be designed according to actual needs.
  • an alignment film is formed on the pixel electrode layer by inkjet printing.
  • the material of the alignment film is usually polyimide.
  • the pre-imide array substrate has been etched with lines, vias, etc., and the terrain is complex, and there is a certain distance (about 50 ⁇ 200um) between the ink-jet printed polyimide droplets and the droplets, which need to be spread and dried. Only by curing can a uniform alignment film be formed on the surface of the array substrate.
  • the surface of the array substrate has complex topography, especially the color resist layer 400 has via holes 700 of varying sizes. Because the polyimide droplets will be affected by surface tension, it will happen when they encounter via holes 700 with larger apertures. If the flow is bypassed, it cannot flow into the via 700, but will accumulate around the via 700, causing the alignment film around the via 700 to be thicker, causing abnormalities such as display unevenness (Mura).
  • the corresponding thresholds will be different.
  • concentration of the material the greater the viscosity and the higher the risk of bypassing. Therefore, through calculation and analysis, it can be concluded that the through hole 700 whose CD exceeds a certain size will cause the alignment liquid to flow around, and this size is used as the threshold.
  • the array substrate is formed with scan lines 11, data lines 12, and vias 700, wherein the via 700 includes a first via 701 with an aperture greater than a threshold and a second via 702 with an aperture not greater than the threshold.
  • the alignment liquid After 800 is sprayed on the array substrate, multiple droplets are formed. As shown in a in FIG. 3, when encountering the first via hole 701, the alignment film 800 is accumulated around the hole and cannot flow into the first via hole 701. As shown in b in FIG. When the second via hole 702 is used, the alignment film 800 can flow into the hole without accumulation.
  • FIG. 4 it is a schematic diagram of the force state of the alignment film 800 when the alignment film 800 flows around the first via 701 in the prior art.
  • the alignment film 800 encounters the first via hole 701, it presents a concave liquid surface, and the surface tension f of the alignment film 800 is along the tangential direction of the first via hole 701, so it tends to flow around the first via hole 701.
  • the air will generate atmospheric pressure P1 on the concave liquid surface of the alignment film 800, and the surface tension f will generate additional pressure P2, where P1 is directed from the center of the first via 701 to the outside, and P2 is from the outside of the first via 701 Point to the center of the circle.
  • the alignment film 800 does not easily flow into the first via hole 701.
  • the opening of the first via hole 701 is circular, and the surface tension f is along the tangential direction of the first via hole 701, so it tends to flow around the first via hole 701 rather than directly flow in; on the other hand, the additional pressure P2 is too high.
  • the angle between the surface tension f and the additional pressure P2 is ⁇ .
  • ⁇ is larger, the additional pressure P2 is smaller, and the alignment film 800 is less likely to flow into the first via 700.
  • the additional pressure P2 is greater than the atmospheric pressure P1, the inflow of the alignment film 800 can be facilitated.
  • the color resist layer 700 is further formed with a flow guide portion 900, and the flow guide portion 900 is connected to at least a part of the first via 701, and Located on at least one of the inner and outer sides of the first via 701, that is, in all the first vias 701 in the array substrate, there may be some of the first vias 701 connected to the air guide portion 900, or all of the first vias 701 may be connected to the guide portion 900.
  • the vias 701 are all connected to the guide portion 900.
  • the first via 701 includes an orifice 71 close to the side of the pixel electrode layer, and the diversion portion 900 includes a diversion surface 91 that is flush with the orifice 71, and a portion of the diversion surface 91 and the orifice 71 Edge connection.
  • the air guiding portion 900 is formed on the outer side of the first via 701, and the guiding portion 900 is a groove.
  • the diversion surface 91 of the diversion portion 900 is the opening of the groove, and the circular orifice 71 is connected to the opening of the groove, which is equivalent to a protrusion formed on the circular orifice 71, and the orifice 71 is connected to the opening.
  • the whole composition is no longer circular, so when the alignment liquid flows there, the flow direction will change and it will not flow around.
  • the additional pressure P2 increases, so the alignment film 800 easily flows into the first via hole 701.
  • the diversion portion 900 is formed on the inner side of the first via hole 701, and the diversion portion 900 is a solid structure.
  • the diversion surface 91 of the diversion portion 900 is the top surface of the solid structure, and the circular orifice 71 is connected to the top surface of the solid structure, which is equivalent to a depression formed on the circular orifice 71, and the orifice 71 is connected to the top surface of the solid structure.
  • the whole composed of the top surface is no longer circular, so when the alignment liquid flows there, the flow direction will change and it will not flow around.
  • the existence of the recess reduces the overall opening diameter, so the additional pressure P2 increases, and the alignment film 800 can flow into the first via hole 701 more easily.
  • the solid structure is integrally formed with the color resist layer 400, that is, when the first via 701 is prepared, protrusions are directly formed in the color resist layer 400, and the protrusions enter the first via 701 to form depressions.
  • the preparation is relatively simple and operability. Compared with arranging grooves on the outer side, the physical structure on the inner side occupies a smaller space on the array substrate, which helps to increase the pixel aperture ratio.
  • the solid structure and the color resist layer 400 are independent structures. After the first via 701 with a circular aperture is prepared, the sidewall of the first via 701 is modified to make the guide of the solid structure. Stream part 900.
  • the air guiding part 900 includes a first air guiding part formed outside the first via hole 701 and a second air guiding part formed inside the first via hole 701, and the first air guiding part is a groove.
  • the second diversion part is a solid structure.
  • the guide portion 900 is provided, and the guide surface 91 of the guide portion 900 is connected to the orifice 71 of the first via hole 701, so that the shape of the orifice 71 is changed, and when the subsequent alignment liquid flows through the first via hole 701, The flow direction will change, alleviating the phenomenon that the alignment liquid bypasses the first via 701, and the additional pressure of the alignment liquid increases, so it will not accumulate around the first via 701, so that the alignment film 800 on the array substrate The thickness is more uniform.
  • the shape of the flow guide surface 91 can have various shapes.
  • the shape of the port 71 is circular or approximately circular, as shown in b to e in FIG. 6, respectively showing the overall opening shape formed by the first via 701 and the flow guide portion 900
  • the diversion surface 91 is connected to a part of the edge of the orifice 71, and the shape of the diversion surface 91 is at least one of a triangle, an arc, a rectangle, or a trapezoid.
  • the air guide portion 900 when the air guide portion 900 is formed outside the first via hole 701, as shown in a in FIG. 7, it is a schematic diagram of the shape of the orifice 71 of the first via hole 701, and the shape of the orifice 71 is Circular or approximately circular, as shown in b to e in FIG. 7, respectively showing a schematic view of the overall opening shape formed by the first via 701 and the flow guide portion 900, the flow guide surface 91 and the portion of the orifice 71 The edges are connected, and the shape of the guide surface 91 is at least one of a triangle, an arc, a rectangle, or a trapezoid.
  • the air guiding part 900 when the air guiding part 900 includes a first air guiding part formed outside the first via hole 701 and a second air guiding part formed outside the first via hole 702, as shown in a in FIG. 8 As shown, it is a schematic diagram of the shape of the orifice 71 of the first via 701.
  • the shape of the orifice 71 is circular or approximately circular, as shown in b in FIG. 8, which is formed by the first via 701 and the diversion portion 900
  • a schematic diagram of the overall opening shape of the guide surface 91 is connected to a part of the edge of the orifice 71, and the shape of the guide surface 91 is at least one of a triangle, an arc, a rectangle, or a trapezoid.
  • the shape of a flow guide surface 911 and the shape of the second flow guide surface 912 of the second flow guide portion may be the same or different.
  • each first via 701 may be connected to one flow guiding part 900 or may be connected to multiple guiding parts 900.
  • one orifice 71 is connected to the four guide surfaces 91, that is, one orifice 71 corresponds to forming four protrusions.
  • one orifice 71 is connected to eight The guide surfaces 91 are connected, that is, one orifice 71 corresponds to forming eight protrusions.
  • the present application is not limited to this, and any number of guide portions 900 can be formed.
  • the plurality of air guiding parts 900 may be all arranged inside the first via hole 701, that is, they are all solid structures, or they may all be arranged outside the first via hole 701, that is, they are all grooves, or part of them may be arranged in the first via hole. Inside 701, the other part is arranged outside the first via 701, that is, the physical structure and the groove are used in conjunction.
  • Designers in the art can reasonably set the number and positions of the guide portions 900 according to factors such as the structure of the array substrate, the coating material and its concentration, and the manufacturing equipment, so as to achieve a better guide effect.
  • the cross-sectional shape of the guide portion 900 can be various.
  • FIG. 10 it is a comparative schematic diagram of the first cross-sectional structure without the diversion portion 900 and the diversion portion 900.
  • a in FIG. 10 is a cross-sectional structure diagram of the first via 901 when the flow guide 900 is not provided
  • the first via 701 includes a side wall 711
  • b and c in FIG. 10 are outside the first via 701
  • Two guide portions 900 are symmetrically arranged.
  • the cross section of the guide portion 900 includes a first side and a second side 901. The first side is connected to the side wall 711 of the first via 701, and the second side 901 is far away On the sidewall 711 of the first via 701, the second side 901 is a hypotenuse.
  • the depth of the guide portion 900 is less than or equal to the thickness of the color resist layer 400.
  • the structure is as shown in b in FIG. 10.
  • the second side 901 of the guide portion 900 is a hypotenuse, and the hypotenuse is directly connected to the color resist layer 400
  • the slope of the bottom can be set as required.
  • the depth of the guide portion 900 is less than the thickness of the color resist layer 400, and the structure is as shown in c in FIG. 10.
  • the second side 901 of the guide portion 900 is a hypotenuse, and the lower part of the hypotenuse is connected to the sidewall 711,
  • the size of the slope can also be set as required.
  • a gentle slope design is preferentially used, that is, the slope of the oblique side is small, so that the alignment film 800 can flow into the first via hole 701 more easily.
  • FIG. 11 it is a comparative schematic diagram of the second cross-sectional structure without the diversion portion 900 and the diversion portion 900.
  • a in FIG. 11 is a cross-sectional structure diagram of the first via 901 when the flow guide 900 is not provided
  • the first via 701 includes a side wall 711
  • b and c in FIG. 11 are outside the first via 701
  • Two guide portions 900 are symmetrically arranged.
  • the cross section of the guide portion 900 includes a first side and a second side 901. The first side is connected to the side wall 711 of the first via 701, and the second side 901 is far away
  • the sidewall 711 of the first via 701 and the second side 901 have a stepped structure.
  • the second side 901 adopts a one-stage stepped structure.
  • the guide portion 900 also includes a bottom side.
  • the lower part of the second side side 901 passes through the bottom side and the first via 701.
  • the side 711 is connected.
  • the second side 901 adopts a two-stage step structure, and the principle is similar to b in FIG. 11.
  • the number and depth of the steps can be designed according to the depth of the first via 701 in the array substrate. In an embodiment, the depth of each step is 0.3 to 0.6 microns. When the number of stages is large, the alignment film 800 is more likely to flow into the first via 701.
  • the present application also provides a liquid crystal display panel, including a first substrate and a second substrate arranged in a cell, and liquid crystal filled between the first substrate and the second substrate, wherein the first substrate is the one described in any of the above embodiments
  • the array substrate, the second substrate includes a stacked first substrate, a black matrix, and a common electrode layer. After the first substrate and the second substrate are aligned, liquid crystal is filled between the two to form a COA liquid crystal display panel.
  • the present application provides an array substrate and a liquid crystal display panel.
  • the array substrate includes a substrate, a driving circuit layer, a color resist layer, and a pixel electrode layer.
  • the driving circuit layer is formed on one side of the substrate; the color resist layer is formed on the driving circuit layer away from the liner.
  • a via hole is formed in the color resist layer; the pixel electrode layer is formed on the side of the color resist layer away from the driving circuit layer, and the pixel electrode layer is connected to the driving circuit layer through a via hole; wherein, the via hole includes an aperture greater than a threshold
  • the first via hole in the color resist layer is further formed with a flow guide portion connected to at least part of the first via hole and located on at least one of the inner side and the outer side of the first via hole, the first via hole includes Close to the orifice on one side of the pixel electrode layer, the diversion portion includes a diversion surface that is flush with the orifice, and the diversion surface is connected with a part of the edge of the orifice.
  • the diversion surface of the diversion part is connected with the orifice of the first via hole, so that the shape of the orifice is changed.
  • the flow direction will change, which relieves the alignment.
  • the phenomenon that the liquid bypasses the first via hole and the additional pressure of the alignment liquid increases, so it will not accumulate around the first via hole, so that the film thickness of the alignment film on the array substrate is relatively uniform.

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Abstract

一种阵列基板和液晶显示面板，阵列基板包括层叠设置的衬底（100）、驱动电路层（200）、色阻层（400）和像素电极层，色阻层（400）中包括导流部（900）和孔径大于阈值的第一过孔（701），导流部（900）与至少部分第一过孔（701）相连，且位于第一过孔（701）内侧和外侧中的至少一侧，导流部（900）的导流面（91）与第一过孔（701）孔口（71）的部分边缘连接。使得孔口（71）形状改变，配向液（800）流经时不会堆积。

Description

阵列基板和液晶显示面板 技术领域
本申请涉及显示技术领域，尤其涉及一种阵列基板和液晶显示面板。
 背景技术
在液晶显示面板中，配向膜层涂布通常采用喷墨打印制作，但由于涂布配向膜层前阵列基板已经刻蚀有线路，孔洞等，地形复杂，且喷墨打印的液滴与液滴间存在一定间距，需经扩散铺展，干燥固化等才能在阵列基板表面形成均一的膜层。阵列基板表面地形复杂，特别是存在较大孔洞时，由于液体受表面张力的作用，配向膜层铺展扩散遇到大孔时会绕流，无法流入孔内，而是在孔周围堆积，导致孔周围膜厚偏厚，出现显示不均(Mura)等异常。
因此，现有的液晶显示面板存在配向膜流动时易堆积在过孔周围的技术问题，需要改进。
 技术问题
本申请提供一种阵列基板和液晶显示面板，以缓解现有液晶显示面板中配向膜流动时易堆积在过孔周围的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请提供一种阵列基板，包括：
衬底；
驱动电路层，形成在所述衬底一侧；
色阻层，形成在所述驱动电路层远离所述衬底的一侧，所述色阻层中形成有过孔；
像素电极层，形成在所述色阻层远离所述驱动电路层的一侧，所述像素电极层通过所述过孔与所述驱动电路层连接；
其中，所述过孔包括孔径大于阈值的第一过孔，所述色阻层中还形成有导流部，所述导流部与至少部分第一过孔相连，且位于所述第一过孔的内侧和外侧中的至少一侧，所述第一过孔包括靠近所述像素电极层一侧的孔口，所述导流部包括与所述孔口平齐的导流面，所述导流面与所述孔口的部分边缘连接。
在本申请的阵列基板中，所述第一过孔与至少一个所述导流部连接。
在本申请的阵列基板中，所述导流部形成在所述第一过孔的外侧，所述导流部为凹槽。
在本申请的阵列基板中，所述导流部形成在所述第一过孔的内侧，所述导流部为实体结构。
在本申请的阵列基板中，所述实体结构与所述色阻层一体成型。
在本申请的阵列基板中，所述导流部包括形成在所述第一过孔外侧的第一导流部和形成在所述第一过孔内侧的第二导流部，所述第一导流部为凹槽，所述第二导流部为实体结构。
在本申请的阵列基板中，所述实体结构与所述色阻层一体成型。
在本申请的阵列基板中，所述导流面的形状为三角形、圆弧形、矩形或梯形中的至少一种。
在本申请的阵列基板中，所述导流部的深度小于或等于所述色阻层的厚度。
在本申请的阵列基板中，所述导流部的截面包括第一侧边和第二侧边，所述第一侧边与所述第一过孔的侧壁连接，所述第二侧边远离所述第一过孔的侧壁，所述第二侧边为斜边或台阶结构。
本申请还提供一种液晶显示面板，包括对盒设置的第一基板和第二基板和填充在所述第一基板和所述第二基板之间的液晶，所述第一基板包括：
衬底；
驱动电路层，形成在所述衬底一侧；
色阻层，形成在所述驱动电路层远离所述衬底的一侧，所述色阻层中形成有过孔；
像素电极层，形成在所述色阻层远离所述驱动电路层的一侧，所述像素电极层通过所述过孔与所述驱动电路层连接；
其中，所述过孔包括孔径大于阈值的第一过孔，所述色阻层中还形成有导流部，所述导流部与至少部分第一过孔相连，且位于所述第一过孔的内侧和外侧中的至少一侧，所述第一过孔包括靠近所述像素电极层一侧的孔口，所述导流部包括与所述孔口平齐的导流面，所述导流面与所述孔口的部分边缘连接。
在本申请的液晶显示面板中，所述第一过孔与至少一个所述导流部连接。
在本申请的液晶显示面板中，所述导流部形成在所述第一过孔的外侧，所述导流部为凹槽。
在本申请的液晶显示面板中，所述导流部形成在所述第一过孔的内侧，所述导流部为实体结构。
在本申请的液晶显示面板中，所述实体结构与所述色阻层一体成型。
在本申请的液晶显示面板中，所述导流部包括形成在所述第一过孔外侧的第一导流部和形成在所述第一过孔内侧的第二导流部，所述第一导流部为凹槽，所述第二导流部为实体结构。
在本申请的液晶显示面板中，所述实体结构与所述色阻层一体成型。
在本申请的液晶显示面板中，所述导流面的形状为三角形、圆弧形、矩形或梯形中的至少一种。
在本申请的液晶显示面板中，所述导流部的深度小于或等于所述色阻层的厚度。
在本申请的液晶显示面板中，所述导流部的截面包括第一侧边和第二侧边，所述第一侧边与所述第一过孔的侧壁连接，所述第二侧边远离所述第一过孔的侧壁，所述第二侧边为斜边或台阶结构。
 有益效果
本申请的有益效果：本申请提供一种阵列基板和液晶显示面板，阵列基板包括衬底、驱动电路层、色阻层和像素电极层，驱动电路层形成在衬底一侧；色阻层形成在驱动电路层远离衬底的一侧，色阻层中形成有过孔；像素电极层形成在色阻层远离驱动电路层的一侧，像素电极层通过过孔与驱动电路层连接；其中，过孔包括孔径大于阈值的第一过孔，色阻层中还形成有导流部，导流部与至少部分第一过孔相连，且位于第一过孔的内侧和外侧中的至少一侧，第一过孔包括靠近像素电极层一侧的孔口，导流部包括与孔口平齐的导流面，导流面与孔口的部分边缘连接。通过设置导流部，导流部的导流面与第一过孔的孔口连接，使得孔口的形状改变，后续配向液流经第一过孔时，流动方向会发生改变，缓解了配向液绕过第一过孔的现象，且配向液的附加压强增大，因此不会堆积在第一过孔周围，使得阵列基板上配向膜的膜厚较为均匀。
 附图说明
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1为本申请实施例提供的阵列基板的第一种结构示意图。
图2为现有技术中阵列基板的俯视结构示意图。
图3为现有技术中阵列基板中配向膜流经色阻层中过孔时的状态示意图。
图4为现有技术中配向膜流到第一过孔周围时配向膜的受力状况示意图。
图5为本申请实施例提供的阵列基板的俯视结构示意图。
图6为本申请实施例提供的阵列基板中未设置导流部和设置导流部的第一种俯视对比示意图。
图7为本申请实施例提供的阵列基板中未设置导流部和设置导流部的第二种俯视对比示意图。
图8为本申请实施例提供的阵列基板中未设置导流部和设置导流部的第三种俯视对比示意图。
图9为本申请实施例提供的阵列基板中导流部和第一过孔整体的俯视示意图。
图10为本申请实施例提供的阵列基板中未设置导流部和设置导流部的第一种截面对比示意图。
图11为本申请实施例提供的阵列基板中未设置导流部和设置导流部的第二种截面对比示意图。
本申请的实施方式
本申请提供一种液晶显示面板及其制备方法、制备系统，为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
本申请提供一种阵列基板和液晶显示面板，以缓解现有液晶显示面板中配向膜流动时易堆积在过孔周围的技术问题。
如图1所示，为本申请实施例提供的阵列基板的第一种结构示意图。阵列基板包括衬底100、驱动电路层200、色阻层400和像素电极层。驱动电路层200形成在衬底100一侧；色阻层400形成在驱动电路层200远离衬底100的一侧，色阻层400中形成有过孔700；像素电极层形成在色阻层400远离驱动电路层200的一侧，像素电极层通过过孔700与驱动电路层200连接；其中，过孔700包括孔径大于阈值的第一过孔701，色阻层700中还形成有导流部900，导流部900与至少部分第一过孔701相连，且位于第一过孔701的内侧和外侧中的至少一侧，第一过孔701包括靠近像素电极层一侧的孔口71，导流部900包括与孔口71平齐的导流面91，导流面91与孔口71的部分边缘连接。
衬底100可以是刚性衬底，如玻璃、透明树脂等，也可以是柔性衬底，如聚酰亚胺、聚碳酸酯、聚醚砜、聚对苯二甲酸乙二醇酯、聚萘二甲酸乙二醇酯、多芳基化合物或玻璃纤维增强塑料等，本申请对衬底100的材料不做限制。
驱动电路层200形成在衬底100一侧，包括多个薄膜晶体管，以底栅型薄膜晶体管为例，薄膜晶体管包括层叠设置在衬底100上的有源层201、第一栅极绝缘层202、第一金属层203、第二栅极绝缘层204、第二金属层205、层间介质层206、源漏极层。
在衬底100上通常还会形成缓冲层（图未示出），缓冲层的材料可为氧化硅、氮化硅等无机材料。
有源层201形成在缓冲层上，有源层201的材料为金属氧化物，例如铟镓锌氧化物(IGZO)，但不以此为限，还可以是铝锌氧化物(AZO)、铟锌氧化物(IZO)、氧化锌(ZnO)、氧化铟(In2O3)、硼掺杂氧化锌(BZO)、镁掺杂氧化锌(MZO)中的一种或多种。此外，有源层201还可以是多晶硅材料或其它材料。
第一栅极绝缘层202形成在有源层上，第一栅极绝缘层202的材料可为氧化硅、氮化硅等无机材料。
第一金属层203形成在第一栅极绝缘层202上，第一金属层203的材料可为钼、铝、铜，但不以此为限，还可以是铬、钨、钛、钽以及包含它们的合金等材料，在此不对其材料做特殊限定。第一金属层203经过蚀刻工艺图案化形成各薄膜晶体管的栅极、存储电容的第一极板和扫描线。
第二栅极绝缘层204形成在第一金属层203上，第二栅极绝缘层204的材料可为氧化硅、氮化硅等无机材料。
第二金属层205形成在第二栅极绝缘层204上，第二金属层205的材料可为钼、铝、铜，但不以此为限，还可以是铬、钨、钛、钽以及包含它们的合金等材料，在此不对其材料做特殊限定。第二金属层205图案化形成存储电容的第二极板。
层间介质层206形成在第二金属层205上，层间介质层206材料可为氧化硅或氮化硅等无机材料。
源漏极层形成在层间介质层206上，源漏极层的材料可为钼、铝、铜，但不以此为限，还可以是铬、钨、钛、钽以及包含它们的合金等材料，源漏极层经蚀刻工艺图案化形成各薄膜晶体管的源极207、漏极208和数据线。源极207和漏极208通过第三过孔与有源层201连接。
色阻层400形成在驱动电路层200上，色阻层400包括按序排列的红、绿、蓝三色色阻。色阻层400中形成有过孔700。在一种实施例中，在色阻层400的上下还分别形成有第一钝化层300和第二钝化层500，第一钝化层300和第二钝化层500的材料可以是氧化硅和氮化硅中的至少一种，此时过孔700童同样贯穿第一钝化层300和第二钝化层500。
对上述驱动电路层中各膜层结构的说明以底栅型薄膜晶体管为例，当然，驱动电路层200的结构不以此为限，还可以包括顶栅型薄膜晶体管。
在驱动电路层200上，形成有像素电极层，像素电极层包括阵列设置且相互独立的多个像素电极600，像素电极600通过过孔700与薄膜晶体管的漏极208连接。
过孔700中包括孔径大于阈值的第一过孔701和不大于阈值的第二过孔702，过孔700的形状为圆形或近似圆形。当然，过孔700也可以仅包括第一过孔701，其中孔径指过孔700的关键尺寸（CD，Critical Dimension），阈值可根据实际需要设计。
像素电极层制备完成后，采用喷墨打印方式在像素电极层上形成配向膜，配向膜的材料通常为聚酰亚胺，喷涂到阵列基板上时为球冠形的液滴，由于打印聚酰亚胺前阵列基板上已经刻蚀有线路、过孔等，地形复杂，且喷墨打印的聚酰亚胺液滴与液滴间存在一定间距(约50~200um)，需经扩散铺展，干燥固化等才能在阵列基板表面形成均一的配向膜。阵列基板表面地形复杂，尤其是色阻层400中存在大小不等的过孔700，由于聚酰亚胺液滴会受到表面张力的作用，在遇到孔径较大的过孔700时，会发生绕流，无法流入过孔700内，而是会在过孔700周围堆积，导致过孔700周围的配向膜膜厚偏厚，出现显示不均(Mura)等异常。
对于不同的涂布材料及其浓度，不同制程设备或参数等，相应的阈值均会有差异，材料的浓度越高，粘度越大，绕流风险越高。因此可以经过计算分析得出CD超过某个尺寸的过孔700会出现配向液绕流现象，将该尺寸作为阈值。
如图2所示，阵列基板中形成有扫描线11、数据线12和过孔700，其中过孔700包括孔径大于阈值的第一过孔701和不大于阈值的第二过孔702，配向液800喷涂在阵列基板上后，形成多个液滴。如图3中的a所示，在遇到第一过孔701时，配向膜800在孔周围绕流堆积，不能流入第一过孔701内，如图3中的b所示，在遇到第二过孔702时，配向膜800可以流入孔内，不会发生堆积。
如图4所示，为现有技术中配向膜800流到第一过孔701周围时配向膜800的受力状况示意图。配向膜800在遇到第一过孔701时，呈现凹形的液面，配向膜800的表面张力f沿第一过孔701的切线方向，因此倾向于绕第一过孔701流动。同时，空气对配向膜800的凹形液面会产生大气压强P1，而表面张力f会产生附加压强P2 , 其中P1由第一过孔701的圆心指向外侧，P2由第一过孔701的外侧指向圆心。
配向膜800不易流入第一过孔701的原因有多种。一方面，第一过孔701开口呈圆形，表面张力f沿第一过孔701的切线方向，因此更倾向于绕第一过孔701流动而不是直接流入；另一方面，附加压强P2过小，根据杨·拉普拉斯公式可知，当P1> P2 , 即空气侧的压强较大时，液体所受的总压强Ps= P2 -P1<0，总压强Ps的方向由圆心指向凹液面，配向膜800不易流入孔内。
影响附加压强P2的因素有两个。首先，表面张力f与附加压强P2 之间的夹角为θ，当θ越大时，附加压强P2 越小，配向膜800越不易流入第一过孔700内。其次，第一过孔700的孔径越大，表面张力f产生的附加压强P2越小，配向膜800也越不易流入第一过孔700内。因此，需要增大附加压强P2，在附加压强P2大于大气压强P1时，才能有利于配向膜800的流入。
基于上述原因，在本申请实施例中，如图1和图5中所示，在色阻层700中还形成有导流部900，导流部900与至少部分第一过孔701相连，且位于第一过孔701的内侧和外侧中的至少一侧，即阵列基板中所有的第一过孔701中，可以存在部分第一过孔701与导流部900连接，也可以所有的第一过孔701均与导流部900连接。
如图1所示，第一过孔701包括靠近像素电极层一侧的孔口71，导流部900包括与孔口71平齐的导流面91，导流面91与孔口71的部分边缘连接。
在一种实施例中，如图1中从左至右第二个第一过孔701所示，导流部900形成在第一过孔701的外侧，导流部900为凹槽。此时，导流部900的导流面91为凹槽的开口，圆形的孔口71与凹槽的开口连接，相当于圆形的孔口71上形成了凸起，孔口71与开口组成的整体，不再是圆形，因此配向液流动到该处时，流动方向会发生改变，不会绕流。此外，凸起的存在使得θ减小时，附加压强P2增大，因此配向膜800易流入第一过孔701内。
在一种实施例中，如图1中从左至右第一个第一过孔701所示，导流部900形成在第一过孔701的内侧，导流部900为实体结构。此时，导流部900的导流面91为实体结构的顶面，圆形的孔口71与实体结构的顶面连接，相当于圆形的孔口71上形成了凹陷，孔口71与顶面组成的整体，不再是圆形，因此配向液流动到该处时，流动方向会发生改变，不会绕流。同时，凹陷的存在使得整体开口的孔径减小，因此附加压强P2增大，配向膜800也更易流入第一过孔701内。
在一种实施例中，实体结构与色阻层400一体成型，即制备第一过孔701时，直接在色阻层400中形成凸起，凸起进入第一过孔701中形成凹陷，这样制备较为简单可操作性。与在外侧设置凹槽相比，在内侧设置该实体结构所占阵列基板的空间较小，有助于增大像素开口率。
在一种实施例中，实体结构与色阻层400为独立结构，在制备好圆形孔口的第一过孔701后，再在第一过孔701侧壁进行修饰，制作实体结构的导流部900。
在一种实施例中，导流部900包括形成在第一过孔701外侧的第一导流部和形成在第一过孔701内侧的第二导流部，第一导流部为凹槽，第二导流部为实体结构。通过组合的方式，使得第一过孔701与导流部900整体的开口形状改变更大，因此绕流现象得到进一步缓解，与此同时θ和孔径也都减小，附加压强P2增大更多，因此配向膜800也更易流入第一过孔701内。
本申请通过设置导流部900，导流部900的导流面91与第一过孔701的孔口71连接，使得孔口71的形状改变，后续配向液流经第一过孔701时，流动方向会发生改变，缓解了配向液绕过第一过孔701的现象，且配向液的附加压强增大，因此不会堆积在第一过孔701周围，使得阵列基板上配向膜800的膜厚较为均匀。
导流面91的形状可以有多种，在一种实施例中，当导流部900形成在第一过孔701外侧时，如图6中的a所示，为第一过孔701的孔口71形状示意图，孔口71的形状为圆形或近似圆形，如图6中的b至e所示，分别示出了第一过孔701和导流部900形成的整体的开口形状示意图，导流面91与孔口71的部分边缘连接，导流面91的形状为三角形、圆弧形、矩形或梯形中的至少一种。
在一种实施例中，当导流部900形成在第一过孔701外侧时，如图7中的a所示，为第一过孔701的孔口71形状示意图，孔口71的形状为圆形或近似圆形，如图7中的b至e所示，分别示出了第一过孔701和导流部900形成的整体的开口形状示意图，导流面91与孔口71的部分边缘连接，导流面91的形状为三角形、圆弧形、矩形或梯形中的至少一种。
在一种实施例中，当导流部900包括形成在第一过孔701外侧的第一导流部和形成在第一过孔702外侧的第二导流部时，如图8中的a所示，为第一过孔701的孔口71形状示意图，孔口71的形状为圆形或近似圆形，如图8中的b所示，为第一过孔701和导流部900形成的整体的开口形状示意图，导流面91与孔口71的部分边缘连接，导流面91的形状为三角形、圆弧形、矩形或梯形中的至少一种，其中第一导流部的第一导流面911的形状与第二导流部的第二导流面912的形状可以相同，也可以不同。
在上述实施例中，每个第一过孔701可以与一个导流部900连接，也可以与多个导流部900连接。如图9中的a所示，一个孔口71与四个导流面91连接，即一个孔口71对应形成四个凸起，如图9中的b所示，一个孔口71与八个导流面91连接，即一个孔口71对应形成八个凸起。当然，本申请不以此为限，可以形成任意数量的导流部900。多个导流部900可以都设置在第一过孔701内侧，即都是实体结构，也可以都设置在第一过孔701外侧，即都是凹槽，也可以一部分设置在第一过孔701内侧，另一部分设置在第一过孔701外侧，即实体结构和凹槽配合使用。本领域的设计人员可根据阵列基板的结构、涂布材料及其浓度，制程设备等因素合理设置导流部900的数量和位置，以达到较好的导流效果。
导流部900的截面形状可以有多种。在一种实施例中，如图10所示，为未设置导流部900和设置导流部900的第一种截面结构对比示意图。其中图10中的a为未设置导流部900时第一过孔901的截面结构图，第一过孔701包括侧壁711，图10中的b和c中在第一过孔701的外侧对称设置了两个导流部900，导流部900的截面包括第一侧边和第二侧边901，第一侧边与第一过孔701的侧壁711连接，第二侧边901远离第一过孔701的侧壁711，第二侧边901为斜边。
导流部900的深度小于或等于色阻层400的厚度。当导流部900的深度等于色阻层400的厚度，结构如图10中的b所示，此时导流部900的第二侧边901为斜边，斜边直接连接至色阻层400的底部，坡度大小可根据需要设置。导流部900的深度小于色阻层400的厚度，结构如图10中的c所示，此时导流部900的第二侧边901为斜边，斜边的下部与侧壁711连接，坡度大小也可根据需要设置。在本实施例中，优先使用缓坡设计，即斜边的坡度较小，这样配向膜800更易流入第一过孔701内。
在一种实施例中，如图11所示，为未设置导流部900和设置导流部900的第二种截面结构对比示意图。其中图11中的a为未设置导流部900时第一过孔901的截面结构图，第一过孔701包括侧壁711，图11中的b和c中在第一过孔701的外侧对称设置了两个导流部900，导流部900的截面包括第一侧边和第二侧边901，第一侧边与第一过孔701的侧壁711连接，第二侧边901远离第一过孔701的侧壁711，第二侧边901为台阶结构。
如图11中的b所示，第二侧边901采用一级台阶结构，截面图中导流部900还包括一底边，第二侧边901的下部通过底边与第一过孔701的侧边711连接。如图11中的c所示，第二侧边901采用二级台阶结构，原理与图11中的b类似。台阶的级数和深度可根据阵列基板中第一过孔701的深度来设计。在一种实施例中，每级台阶的深度为0.3~0.6微米。台阶级数较多时，配向膜800更易流入第一过孔701中。
本申请还提供一种液晶显示面板，包括对盒设置的第一基板和第二基板和填充在第一基板和第二基板之间的液晶，其中第一基板为上述任一实施例所述的阵列基板，第二基板包括层叠设置的第一衬底、黑矩阵、公共电极层，第一基板和第二基板对盒后，在两者之间填充液晶，形成COA型液晶显示面板。
根据上述实施例可知：
本申请提供一种阵列基板和液晶显示面板，阵列基板包括衬底、驱动电路层、色阻层和像素电极层，驱动电路层形成在衬底一侧；色阻层形成在驱动电路层远离衬底的一侧，色阻层中形成有过孔；像素电极层形成在色阻层远离驱动电路层的一侧，像素电极层通过过孔与驱动电路层连接；其中，过孔包括孔径大于阈值的第一过孔，色阻层中还形成有导流部，导流部与至少部分第一过孔相连，且位于第一过孔的内侧和外侧中的至少一侧，第一过孔包括靠近像素电极层一侧的孔口，导流部包括与孔口平齐的导流面，导流面与孔口的部分边缘连接。通过设置导流部，导流部的导流面与第一过孔的孔口连接，使得孔口的形状改变，后续配向液流经第一过孔时，流动方向会发生改变，缓解了配向液绕过第一过孔的现象，且配向液的附加压强增大，因此不会堆积在第一过孔周围，使得阵列基板上配向膜的膜厚较为均匀。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种阵列基板，其包括：
    衬底；
    驱动电路层，形成在所述衬底一侧；
    色阻层，形成在所述驱动电路层远离所述衬底的一侧，所述色阻层中形成有过孔；
    像素电极层，形成在所述色阻层远离所述驱动电路层的一侧，所述像素电极层通过所述过孔与所述驱动电路层连接；
    其中，所述过孔包括孔径大于阈值的第一过孔，所述色阻层中还形成有导流部，所述导流部与至少部分第一过孔相连，且位于所述第一过孔的内侧和外侧中的至少一侧，所述第一过孔包括靠近所述像素电极层一侧的孔口，所述导流部包括与所述孔口平齐的导流面，所述导流面与所述孔口的部分边缘连接。
  2. 如权利要求1所述的阵列基板，其中，所述第一过孔与至少一个所述导流部连接。
  3. 如权利要求1所述的阵列基板，其中，所述导流部形成在所述第一过孔的外侧，所述导流部为凹槽。
  4. 如权利要求1所述的阵列基板，其中，所述导流部形成在所述第一过孔的内侧，所述导流部为实体结构。
  5. 如权利要求4所述的阵列基板，其中，所述实体结构与所述色阻层一体成型。
  6. 如权利要求1所述的阵列基板，其中，所述导流部包括形成在所述第一过孔外侧的第一导流部和形成在所述第一过孔内侧的第二导流部，所述第一导流部为凹槽，所述第二导流部为实体结构。
  7. 如权利要求6所述的阵列基板，其中，所述实体结构与所述色阻层一体成型。
  8. 如权利要求1所述的阵列基板，其中，所述导流面的形状为三角形、圆弧形、矩形或梯形中的至少一种。
  9. 如权利要求1所述的阵列基板，其中，所述导流部的深度小于或等于所述色阻层的厚度。
  10. 如权利要求1所述的阵列基板，其中，所述导流部的截面包括第一侧边和第二侧边，所述第一侧边与所述第一过孔的侧壁连接，所述第二侧边远离所述第一过孔的侧壁，所述第二侧边为斜边或台阶结构。
  11. 一种液晶显示面板，其包括对盒设置的第一基板和第二基板和填充在所述第一基板和所述第二基板之间的液晶，所述第一基板包括：
    衬底；
    驱动电路层，形成在所述衬底一侧；
    色阻层，形成在所述驱动电路层远离所述衬底的一侧，所述色阻层中形成有过孔；
    像素电极层，形成在所述色阻层远离所述驱动电路层的一侧，所述像素电极层通过所述过孔与所述驱动电路层连接；
    其中，所述过孔包括孔径大于阈值的第一过孔，所述色阻层中还形成有导流部，所述导流部与至少部分第一过孔相连，且位于所述第一过孔的内侧和外侧中的至少一侧，所述第一过孔包括靠近所述像素电极层一侧的孔口，所述导流部包括与所述孔口平齐的导流面，所述导流面与所述孔口的部分边缘连接。
  12. 如权利要求1所述的液晶显示面板，其中，所述第一过孔与至少一个所述导流部连接。
  13. 如权利要求1所述的液晶显示面板，其中，所述导流部形成在所述第一过孔的外侧，所述导流部为凹槽。
  14. 如权利要求1所述的液晶显示面板，其中，所述导流部形成在所述第一过孔的内侧，所述导流部为实体结构。
  15. 如权利要求14所述的液晶显示面板，其中，所述实体结构与所述色阻层一体成型。
  16. 如权利要求1所述的液晶显示面板，其中，所述导流部包括形成在所述第一过孔外侧的第一导流部和形成在所述第一过孔内侧的第二导流部，所述第一导流部为凹槽，所述第二导流部为实体结构。
  17. 如权利要求16所述的液晶显示面板，其中，所述实体结构与所述色阻层一体成型。
  18. 如权利要求1所述的液晶显示面板，其中，所述导流面的形状为三角形、圆弧形、矩形或梯形中的至少一种。
  19. 如权利要求1所述的液晶显示面板，其中，所述导流部的深度小于或等于所述色阻层的厚度。
  20. 如权利要求1所述的液晶显示面板，其中，所述导流部的截面包括第一侧边和第二侧边，所述第一侧边与所述第一过孔的侧壁连接，所述第二侧边远离所述第一过孔的侧壁，所述第二侧边为斜边或台阶结构。
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