WO2021117098A1 - Dispositif de conversion d'énergie - Google Patents
Dispositif de conversion d'énergie Download PDFInfo
- Publication number
- WO2021117098A1 WO2021117098A1 PCT/JP2019/048119 JP2019048119W WO2021117098A1 WO 2021117098 A1 WO2021117098 A1 WO 2021117098A1 JP 2019048119 W JP2019048119 W JP 2019048119W WO 2021117098 A1 WO2021117098 A1 WO 2021117098A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- reactor
- circuit
- operation mode
- switching
- power
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Definitions
- This application relates to a power conversion device.
- This conventional power conversion device is an inverter having an impedance source booster circuit whose output voltage is a power supply voltage or a voltage obtained by boosting the power supply voltage, and a switching element capable of short-circuiting the high potential side and the low potential side of the output voltage.
- the circuit and a control unit capable of controlling the output voltage by charging / discharging the capacitor of the impedance source booster circuit by controlling the switching element are provided, and the control unit desires the output voltage.
- the output voltage command which is a command for setting the value of, is calculated as the product of the boost rate for specifying the voltage of the capacitor and the modulation factor used for modulating the control signal of the switching element, and the boost rate is calculated as described above. It is variably set when the output voltage command is less than the power supply voltage.
- the impedance source network is generally used for DC / AC inverter circuits, and is used for controlling the output voltage to an AC load such as a motor.
- an AC input power factor improving function is required. Therefore, when the voltage control of the prior art is simply substituted, the input power factor cannot be controlled, which is deteriorated, and a high peak value current flows through the switching element. As a result, there is a possibility of destruction due to a decrease in power conversion efficiency or a deterioration in loss of a specific component.
- the present application discloses a technique for solving the above-mentioned problems, and enables high power factor control of AC input while performing a wide range of output power control to a DC load, improving power conversion efficiency and improving power conversion efficiency.
- An object of the present invention is to provide a power conversion device capable of reducing the loss of a specific circuit component.
- the power converter disclosed in the present application is A power conversion device that converts power between an AC power supply and a DC load.
- An impedance source network consisting of a first rectifier circuit on the input side, a current-reducing reactor for improving the input power factor, and a smoothing capacitor for at least one constant power control, and two switching elements in series.
- a switching circuit in which a pair of connected legs are connected in parallel to each other, an isolation transformer in which the primary winding is connected to the switching circuit, and a second winding in which the primary winding is connected to the secondary winding of the isolation transformer.
- the control circuit controls the current output from the first rectifier circuit by adjusting the short-circuit period between the pair of legs of the switching circuit, and is a pair consisting of the two diagonal switching elements. By adjusting the mutual power transmission period, the output power to the DC load is controlled to be constant.
- the power conversion device disclosed in the present application it is possible to control a high power factor of AC input while performing a wide range of output power control to a DC load, and it is possible to improve power conversion efficiency and reduce loss of specific circuit components. Become.
- Embodiment 1 The power conversion device according to the first embodiment of the present application is applied to, for example, a power supply system centered on a charger of an electric vehicle, and will be described below with reference to the drawings.
- FIG. 1 is a circuit configuration diagram of the power conversion device according to the first embodiment of the present application.
- the power conversion device according to the first embodiment of the present application converts the AC power supplied from the AC power supply 1 into DC power while insulating it, and outputs the DC power to the DC load 8. It includes a rectifier circuit 2, an impedance source network 3, a switching circuit 4, an isolated transformer 5, a second rectifier circuit 6, an output smoothing circuit 7, and a control circuit 9.
- the AC power supply 1 is a commercial AC system, a private power generator, or the like.
- the DC load 8 may be composed of not only a pure resistance load but also, for example, a high-voltage battery for traveling a vehicle, a lead battery as a power source for electrical components for a vehicle, and an electric double layer capacitor (EDLC: Electric Double Layer Capacitor). Good. It is self-evident that the AC power supply 1 or the DC load 8 is not limited to the above.
- the first rectifier circuit 2 is used for full-wave rectification of the AC input supplied from the AC power supply 1, and in FIG. 1, it has a general configuration in which the diode element 2a is fully bridge-connected. Needless to say, an active element such as a MOSFET may be used instead of the passive element such as the diode element 2a.
- the impedance source network 3 is composed of at least one flow-reducing reactor for improving the input power factor and at least one smoothing capacitor for constant power control.
- it is composed of a first current reducing reactor 311, a second current reducing reactor 312, a first smoothing capacitor 321 and a second smoothing capacitor 322, and a reflux diode 33 as a reflux element. ..
- the impedance source network 3 having this configuration is defined here as "quasi-Z source network (Quasi Impedance Circuit Network) 3A".
- the positive electrode terminal of the output bus of the first rectifier circuit 2 and the first end of the first destreaming reactor 311 are connected to each other.
- the negative electrode terminal of the output bus of the first rectifier circuit 2 the first end of the first smoothing capacitor 321 and the negative electrode terminal of the input bus of the switching circuit 4 are connected to each other.
- the second end of the first current reducing reactor 311, the first end of the second smoothing capacitor 322, and the first end of the reflux diode 33 are connected to each other.
- the second end of the second smoothing capacitor 322, the first end of the second current reducing reactor 312, and the positive electrode terminal of the input bus of the switching circuit 4 are connected to each other.
- the second end of the freewheeling diode 33, the second end of the second current reducing reactor 312, and the second end of the first smoothing capacitor 321 are connected to each other.
- the first end of the first current reducing reactor 311 is connected to the positive electrode terminal of the output bus of the first rectifier circuit 2, and the second end of the first current reducing reactor 311 is connected to the first terminal. 2 It is connected to the intersection of the smoothing capacitor 322 and the freewheeling diode 33.
- the current input from the AC power supply 1 can be continuously passed to the switching circuit 4, so that the harmonic component on the input side can be reduced.
- the same operation as that of the current type converter can be performed.
- the voltage can be made constant by the first smoothing capacitor 321 and the second smoothing capacitor 322, and the first smoothing capacitor 321 and the second smoothing capacitor 322 are treated as simulated voltage sources in the same manner as the voltage converter. Operation is possible. That is, it has a feature that the voltage type converter and the current type converter can be operated at the same time by the control by the control circuit 9.
- the reflux diode 33 is not limited to the types of a fast recovery diode (Fast Recovery Diode) and a soft recovery diode (SBD: Soft Recovery Diode), as well as SiC (Silicon Carbide) or GaN (Gallium Nitride).
- a material such as Ga2O3 (gallium oxide) may be used.
- the switching circuit 4 constitutes a full bridge inverter by using four switching elements of a first switching element 411, a second switching element 412, a third switching element 413, and a fourth switching element 414.
- the first switching element 411 and the second switching element 412 are connected in series with each other to form the first leg.
- the third switching element 413 and the fourth switching element 414 are connected in series with each other to form the second leg.
- the first switching element 411 to the fourth switching element 414 are not limited to IGBT (Insulated Gate Bipolar Transistor), MOSFET (Metal Oxide Semiconductor Field Effect Transistor), etc. High Electron Mobility Transistor), Ga2O3-MOSFET, or the like may be used.
- the first end of the primary winding is connected to the connection point between the first switching element 411 and the second switching element 412, and the second end of the primary winding is the third switching element 413. Is connected to the connection point of the fourth switching element 414.
- a full bridge type second rectifier circuit 6 composed of four first rectifier diodes 61 to a fourth rectifier diode 64 is provided on the secondary winding of the isolation transformer 5. Then, the first end of the secondary winding of the insulating transformer 5 is connected to the connection point between the first rectifier diode 61 and the second rectifier diode 62, and the second end of the secondary winding is the third rectifier diode 63. Is connected to the connection point of the fourth rectifier diode 64.
- the first rectifier diode 61 to the fourth rectifier diode 64 are not limited to the types of fast recovery diode (Fast Recovery Diode) and soft recovery diode (SBD: Soft Recovery Diode), as well as SiC (Silicon Carbide) or GaN. , Ga2O3 (gallium oxide) and the like may be used.
- the output smoothing circuit 7 is provided with the first current reducing reactor 311 and the second current reducing reactor 312 as simulated current sources on the input side, a capacitor input type is used.
- the control circuit 9 switches each of the switching circuits 4 based on the detection output of the AC power supply voltage vac of the AC power supply 1, the current iL1 flowing through the first decurrent reactor 311 and the output voltage Vout and the output current Iout to the DC load 8. By outputting a gate signal for on / off control to the elements 411 to 414, the output power control to the DC load 8 and the high power rate control of the AC input are executed.
- the output power control to the DC load 8 and the high power rate control of the AC input can be performed by converting the input voltage from the AC power supply 1 to a desired DC output voltage in one step. Can be achieved.
- the impedance source network 3 described above is not limited to the configuration of the quasi-Z source network 3A shown in FIG. 1, and may have the configuration shown in FIG. 2 or 3, for example.
- the impedance source network 3 shown in FIG. 2 is composed of a first current reducing reactor 311, a second current reducing reactor 312, a first smoothing capacitor 321 and a second smoothing capacitor 322, and is a quasi-Z shown in FIG. This is a method that does not use the recirculation diode 33 as in the source network 3A.
- the impedance source network 3 having the configuration shown in FIG. 2 is defined here as "Full Impedance Circuit Network 3B".
- the positive electrode terminal of the output bus of the first rectifier circuit 2, the first end of the first destreaming reactor 311 and the first end of the first smoothing capacitor 321 are connected to each other. Further, the second end of the first current reducing reactor 311, the first end of the second smoothing capacitor 322, and the positive electrode terminal of the input bus of the switching circuit 4 are connected to each other. Further, the negative electrode terminal of the output bus of the first rectifier circuit 2, the second end of the second smoothing capacitor 322, and the first end of the second current reducing reactor 312 are connected to each other. Further, the second end of the first smoothing capacitor 321 and the second end of the second current reducing reactor 312, and the negative electrode terminal of the input bus of the switching circuit 4 are connected to each other.
- one end (first end or second end) of the first smoothing capacitor 321 and the second smoothing capacitor 322 is used to form the first current reducing reactor 311 and the second smoothing capacitor 311 and the second.
- the flow-reducing reactors 312 are arranged so as to sandwich each of them. Therefore, the current type converter and the voltage type converter are controlled by the control circuit 9 as in the quasi-Z source network 3A without requiring the return diode 33 as in the quasi-Z source network 3A shown in FIG. It is possible to operate with the characteristics of.
- the input from the AC power supply 1 becomes discontinuous. Therefore, as compared with the quasi-Z source network 3A, the number of parts can be reduced, but the harmonic component on the input side is somewhat increased.
- the impedance source network 3 shown in FIG. 3 is composed of a first decompression reactor 311, a second decompression reactor 312, a third decompression reactor 313, a first smoothing capacitor 321 and a second smoothing capacitor 322.
- the first declining reactor 311 is added to the positive electrode terminal side of the output bus of the first rectifier circuit 2 with respect to the full Z source network 3B shown in FIG.
- the impedance source network 3 having the configuration shown in FIG. 3 is defined here as “Multi Impedance Circuit Network 3C”.
- the positive electrode terminal of the output bus of the first rectifier circuit 2 and the first end of the first destreaming reactor 311 are connected to each other.
- the second end of the first decompression reactor 311, the first end of the second decompression reactor 312, and the first end of the first smoothing capacitor 321 are connected to each other.
- the second end of the second current reducing reactor 312, the first end of the second smoothing capacitor 322, and the positive electrode terminal of the input bus of the switching circuit 4 are connected to each other.
- the negative electrode terminal of the output bus of the first rectifier circuit 2, the second end of the second smoothing capacitor 322, and the first end of the third current reducing reactor 313 are connected to each other.
- the second end of the first smoothing capacitor 321 and the second end of the third current reducing reactor 313, and the negative electrode terminal of the input bus of the switching circuit 4 are connected to each other.
- the composite Z source network 3C shown in FIG. 3 is a current type under the control of the control circuit 9, similarly to the quasi-Z source network 3A shown in FIG. 1 or the full Z source network 3B shown in FIG. It enables operation that combines the characteristics of a converter and a voltage-type converter.
- the first decurrent current reducing reactor 311 is added to the positive electrode terminal side of the output bus of the first rectifier circuit 2 with respect to the component arrangement of the full Z source network 3B shown in FIG. Therefore, the current input from the AC power supply 1 can be continuously passed to the switching circuit 4 as in the case of the configuration of the quasi-Z source network 3A shown in FIG. It is possible to reduce the harmonic component on the side.
- the second rectifier circuit 6 is shown as a full-bridge type rectifier circuit in which four rectifier diodes 61 to 64 are combined, but the present invention is not limited to this, and for example, the diode 60A and the diode 60A shown in FIG. 4 and It may be a center tap diode rectifier circuit having 60B, or a voltage doubler diode rectifier circuit having diodes 61A and 61B and capacitors 62A and 62B shown in FIG. Further, the rectifier diodes 61 to 64 of the second rectifier circuit 6 may be replaced with switching elements 63A to 63D as shown in FIG. 6 to form a full bridge synchronous rectifier circuit, which is further shown in FIG.
- a center tap synchronous rectifier circuit having such switching elements 64A and 64B may be used. Furthermore, it may be a voltage doubler synchronous rectifier circuit having switching elements 65A and 65B and capacitors 66A and 66B as shown in FIG. 8, and it goes without saying that the circuit configuration is not limited to these.
- the output smoothing circuit 7 shows a capacitor input type, but in addition to this configuration, for example, as shown in FIG. 9, it has a filter configuration in which a capacitor 71 and a reactor 72 are combined. You may.
- the operation of the power conversion device having the configuration having the quasi-Z source network 3A shown in FIG. 1 will be described.
- the inductances of the first decompression reactor 311 and the second decompression reactor 312 are the same value, and the capacitances of the first smoothing capacitor 321 and the second smoothing capacitor 322 are the same value.
- FIG. 10 is a timing chart showing the operation of the power conversion device having the configuration shown in FIG.
- the vertical axis is, in order from the top, the gate signal of the switching elements 411 and 414, the gate signal of the switching elements 412 and 413, the voltage Vtr2 between the secondary winding terminals of the isolation transformer 5, and the first current reducing reactor.
- the current iL1 flowing through 311 is shown.
- the gate signals of the first switching element 411 and the fourth switching element 414 are synchronized, and the gate signals of the second switching element 412 and the third switching element 413 are synchronized. That is, the same gate signals are generated for the two diagonally located switching elements 411 and 414 and the two switching elements 412 and 413.
- four operation modes from the first operation mode to the fourth operation mode are changed during one switching cycle Tsw.
- the contents of each operation mode will be specifically described.
- the first operation mode starts.
- this first operation mode all the gate signals given to the first switching element 411 to the fourth switching element 414 are turned on.
- all of the first switching elements 411 to 414 are turned on, and both the first leg and the second leg are short-circuited.
- the first decompression reactor 311 and the second decompression reactor 312 are excited, and the current iL1 of the first decompression reactor 311 and the current iL2 of the second decompression reactor 312 increase with a positive inclination.
- the voltage Vdc across each leg is zero.
- no voltage is applied to the primary winding of the isolation transformer 5. Therefore, in this first operation mode, power is not supplied to the output, and the excitation period of each of the current reduction reactors 311 and 312 is set.
- FIG. 11 is an equivalent circuit diagram in the first operation mode. In this operation mode, 2 of the path through which the output terminal of the first rectifier circuit 2 passes through each leg and the path through which the first smoothing capacitor 321 and the second current reducing reactor 312 pass through each leg. Two current paths are constructed.
- the voltage vL1 applied to the first current-reducing reactor 311 in the first operation mode is represented by the following equation (1)
- the voltage vL2 applied to the second current-reducing reactor 312. Can be expressed by the following equation (2)
- the voltage Vdc across the legs can be expressed by the following equation (3).
- the gate signals of the second switching element 412 and the third switching element 413 are both turned off, so that the first operation mode ends and the second operation mode shifts to the second operation mode.
- this second operation mode only the gate signals of the first switching element 411 and the fourth switching element 414 are turned on. That is, when only the two diagonal switching elements 411 and 414 are turned on, the voltage Vdc across the leg is applied to the primary winding of the isolation transformer 5.
- the energies of the first decurrent reactor 311 and the second decurrent reactor 312 are discharged (degaussed) and descend with a negative electrode inclination. Further, a positive voltage is also induced in the secondary winding of the isolation transformer 5, and power is transmitted to the output side. Therefore, this second operation mode is the degaussing period and the power transmission period of the first current reducing reactor 311 and the second current reducing reactor 312.
- FIG. 12 is an equivalent circuit diagram in the second operation mode.
- the output terminal of the first rectifier circuit 2, the freewheeling diode 33, and the path passing through the first smoothing capacitor 321 in sequence, the freezing diode 33, the second current reducing reactor 312, and the second Two current paths are configured, one with a path passing through the two smoothing capacitors 322 in sequence.
- the voltage vL1 applied to the first current-reducing reactor 311 in the second operation mode is the voltage vL2 applied to the second current-reducing reactor 312 by the following equation (4).
- both the gate signals of the first switching element 411 and the fourth switching element 414 are turned off, so that the third operation mode ends and the process shifts to the fourth operation mode.
- this fourth operation mode only the gate signals of the second switching element 412 and the third switching element 413 are turned on. That is, when only the two diagonally located switching elements 412 and 413 are turned on, the negative electrode property ⁇ Vdc of the voltage across the leg is applied to the primary winding of the isolation transformer 5. As a result, the energies of the first decurrent reactor 311 and the second decurrent reactor 312 are discharged (degaussed) and descend with a negative electrode inclination.
- this fourth operation mode is the degaussing period and the power transmission period of the first decurrent reduction reactor 311 and the second current reduction reactor 312.
- FIG. 13 is an equivalent circuit diagram in the fourth operation mode. This is because the polarity of the voltage applied to the isolation transformer 5 is different from that in the second operation mode, and the other operations are the same as in the second operation mode. Therefore, detailed description thereof will be omitted here.
- the power conversion device having the quasi-Z source network 3A shown in FIG. 1 has been described here, the power conversion device having the full Z source network 3B shown in FIG. 2 has been described.
- the power conversion device having the configuration provided with the composite Z source network 3C shown in FIG. 3 also has the same basic operation as the power conversion device having the configuration having the quasi-Z source network 3A shown in FIG. , Detailed explanation is omitted here.
- the power conversion device is classified into four operation modes, of which two of the first operation mode and the third operation mode are the first flow reduction.
- the excitation period of the reactor 311 and the second decurrent reactor 312 (hereinafter referred to as the shoot-through period), and the other two of the second operation mode and the fourth operation mode are the first deductor reactor 311 and the second deductor.
- the shoot-through period is defined as Ds / Tsw
- the power transmission period is defined as Da / Tsw.
- Tsw is one switching cycle
- Ds is the duty ratio of the shoot-through period
- Da is the duty ratio of the power transmission period.
- the shoot-through period exists twice in one switching cycle Tsw
- the power transmission period exists twice in one switching cycle Tsw. That is, in one switching cycle Tsw, the total shoot-through period is 2Ds ⁇ Tsw, and the total power transmission period is 2Da ⁇ Tsw. From this, the following equation (7) can be obtained.
- the ratio (duty ratio) at which the gate signal of one switching element is turned on during one switching cycle Tsw is defined as D.
- the ON period of the switching element is D ⁇ Tsw, and can be expressed as the sum of one power transmission period Da ⁇ Tsw and two power transmission periods 2Ds ⁇ Tsw as shown in the following equation (8).
- the duty ratio Ds in the shoot-through period and the duty ratio Da in the power transmission period can be expressed by the following equations (9) and (10), respectively. it can.
- the voltage of the first smoothing capacitor 321 is obtained by using the duty ratio of each period of the above equations (9) and (10) and the voltage relational expressions of the above equations (1) to (6).
- the vc1, the voltage vc2 of the second smoothing capacitor 322, and the average values Vdc and avg of the voltages Vdc across the first leg and the second leg can be expressed by the following equations (11) to (13). ..
- Np is the number of turns of the primary winding of the isolation transformer 5
- Ns is the number of turns of the secondary winding of the isolation transformer 5
- Nps is the number of turns of the secondary winding. It is the ratio of the number of turns of the primary winding at that time.
- the power conversion device performs high power factor control and output power control under the condition of a duty ratio of less than 75% in the control circuit 9.
- the inductances of the deflowing reactors are the same, the currents can be treated as the same value. Therefore, only the current iL1 flowing through the first deflowing reactor 311 needs to be detected at the time of high power factor control. From this, the current iL1 of the first decurrent reactor 311 of the impedance source network 3 is adjusted to be in phase with the phase of the AC power supply voltage vac and in a sinusoidal shape based on the command value of an arbitrary input current.
- High power factor control can be achieved.
- the output power control can be achieved by adjusting the power transmission period so that the output power becomes constant while performing the high power factor control.
- FIG. 14 is a circuit configuration diagram of the power conversion device according to the second embodiment of the present application.
- the same or corresponding parts as those of the first embodiment shown in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted here.
- the power conversion device of the second embodiment When applying a power converter to a high-output application, a method of connecting two switching circuits in parallel is generally adopted in order to reduce the loss of the switching element.
- the power conversion device of the second embodiment the power conversion device can be made even smaller by changing the operation method instead of simply connecting the switching circuits in parallel. The contents will be described below.
- the switching circuit 4 includes the first switching circuit 41 and the second switching circuit 42 in total 2 on the premise of the configuration including the quasi-Z source network 3A described with reference to FIG. It consists of a phase full bridge inverter.
- the first switching circuit 41 and the second switching circuit 42 are connected in parallel to the quasi-Z source network 3A, and the first switching circuit 41 and the second switching circuit 42 are connected to the isolation transformer 5-1. The next winding is provided. Then, power is transmitted from the outputs of the first switching circuit 41 and the second switching circuit 42 via the isolation transformer 5.
- FIG. 14 assumes a configuration including the quasi-Z source network 3A shown in FIG. 1, but the configuration is not limited to this configuration, and the full Z source network 3B shown in FIG. 2 or FIG. 3 shows.
- the composite Z source network 3C and the like shown may be provided, and the configuration of the impedance source network 3 is not limited to the configuration of the quasi-Z source network 3A.
- the first switching circuit 41 is defined as the A phase
- the first switching element 411 of the first switching circuit 41 is A1
- the second switching element 412 is A2
- the third switching element. 413 is defined as A3,
- the fourth switching element 414 is defined as A4.
- the second switching circuit 42 is defined as the B phase
- the first switching element 421 of the second switching circuit 42 is B1
- the second switching element 422 is B2
- the third switching element 423 is B3
- the fourth switching element. 424 is defined as B4.
- A1 and A2 connected in series are defined as the first leg of the A phase
- A3 and A4 connected in series are defined as the second leg of the A phase
- B1 and B2 connected in series are defined as the first leg of the B phase
- B3 and B4 connected in series are defined as the second leg of the B phase.
- FIG. 15 is a timing chart showing the interleaving operation of the power conversion device according to the second embodiment of the present application.
- the gate signals to be applied to A1 to A4 and B1 to B4 are independently generated by shifting the timing so that the operations of the A phase and the B phase are alternately performed.
- 16 operation modes from the first operation mode to the 16th operation mode are changed during one switching cycle Tsw.
- Tsw switching cycle
- the first operation mode starts.
- the gate signals of A-phase A1 and A2 and B-phase B1 and B2 are turned on.
- A1 and A2 constituting the first leg of the A phase and B1 and B2 constituting the first leg of the B phase are both turned on, and the respective legs are short-circuited.
- the first deceleration reactor 311 and the second decompression reactor 312 are excited via the first leg of the A phase and the first leg of the B phase, and the current iL1 and the second deflection of the first decompression reactor 311 are excited.
- the current iL2 of the reactor 312 increases with a positive inclination.
- the gate signals of A2, B1, and B2 are turned off, and the gate signal of A4 is turned on, so that the first operation mode ends and the second operation mode is entered.
- this second operation mode only the A1 and A4 gate signals of the A phase are turned on.
- only A1 and A4 located diagonally to the A phase are turned on, so that the voltage Vdc across the A phase leg is applied to the primary winding of the isolation transformer 5.
- the energies of the first decurrent reactor 311 and the second decurrent reactor 312 are degaussed and descend with a negative electrode inclination. Further, a positive voltage is also induced in the secondary winding of the isolation transformer 5, and power is transmitted to the output side. Therefore, in this second operation mode, the degaussing period and the power transmission period of the first current reducing reactor 311 and the second current reducing reactor 312 are set.
- this third operation mode the gate signals for A1 to A4 of the A phase are turned on, and all of the A1 to A4 of the A phase are turned on.
- the first decompression reactor 311 and the second decompression reactor 312 are excited via the first leg and the second leg of the A phase, and the current iL1 of the first decompression reactor 311 and the second decompression reactor 312
- the current iL2 increases with a positive gradient. Therefore, this third operation mode, like the first operation mode, does not supply electric power to the output, and is an excitation period of the first decompression reactor 311 and the second decompression reactor 312.
- this sixth operation mode is the degaussing period and the power transmission period of the first decurrent reduction reactor 311 and the second current reduction reactor 312, as in the second operation mode and the fourth operation mode.
- the sixth operation mode ends and the process shifts to the seventh operation mode.
- this seventh operation mode the gate signals for B1 to B4 of B phase are turned on, and all of B1 to B4 of B phase are turned on.
- the first decompression reactor 311 and the second decompression reactor 312 are excited via the first leg and the second leg of the B phase, and the current iL1 of the first decompression reactor 311 and the second decompression reactor 312
- the current iL2 increases with a positive gradient. Therefore, this seventh operation mode, like the first operation mode, the third operation mode, and the fifth operation mode, does not supply power to the output, and the first decompression reactor 311 and the second decompression reactor 312 It becomes the excitation period.
- this eighth operation mode is the degaussing period and the power transmission period of the first degassing reactor 311 and the second decompression reactor 312, similarly to the second operation mode, the fourth operation mode, and the sixth operation mode. ..
- the gate signal of B2 is turned off and the gate signals of A3, A4 and B4 are turned on, so that the eighth operation mode ends and the process shifts to the ninth operation mode.
- the gate signals of A-phase A3 and A4 and B-phase B3 and B4 are turned on.
- A3 and A4 constituting the second leg of the A phase and B3 and B4 constituting the second leg of the B phase are turned on, and the respective legs are short-circuited.
- this ninth operation mode like the first operation mode, the third operation mode, the fifth operation mode, and the seventh operation mode, does not supply power to the output and does not supply power to the output, and the first deflow reactor 311 and the second operation mode. It is the excitation period of the decurrent reactor 312.
- the gate signals of A3, B3, and B4 are turned off, and the gate signal of A1 is turned on, so that the ninth operation mode ends and the mode shifts to the tenth operation mode.
- this tenth operation mode only the A1 and A4 gate signals of the A phase are turned on. Since this is the same operation as the second operation mode, the tenth operation mode is the first degaussing reactor as well as the second operation mode, the fourth operation mode, the sixth operation mode, and the eighth operation mode. It is the degaussing period and the power transmission period of the 311 and the second decurrent reactor 312.
- the tenth operation mode ends and the process shifts to the eleventh operation mode.
- the gate signals for A1 to A4 of the A phase are turned on, and all of the A1 to A4 of the A phase are turned on. Since this is the same operation as the third operation mode, the eleventh operation mode is the same as the first operation mode, the third operation mode, the fifth operation mode, the seventh operation mode, and the ninth operation mode. No power is supplied to the output, and the excitation period is set for the first decompression reactor 311 and the second decompression reactor 312.
- the eleventh operation mode ends and the system shifts to the twelfth operation mode.
- this twelfth operation mode only the A2 and A3 gate signals of the A phase are turned on. Since this is the same operation as the 4th operation mode, the 12th operation mode is the same as the 2nd operation mode, the 4th operation mode, the 6th operation mode, the 8th operation mode, and the 10th operation mode. It is the degaussing period and the power transmission period of the first current reducing reactor 311 and the second current reducing reactor 312.
- the gate signal of A3 is turned off and the gate signals of A1, B3, and B4 are turned on, so that the twelfth operation mode ends and the process shifts to the thirteenth operation mode.
- the gate signals of A-phase A1 and A2 and B-phase B3 and B4 are turned on.
- A1 and A2 constituting the first leg of the A phase and B3 and B4 constituting the second leg of the B phase are turned on, and the respective legs are short-circuited.
- the first deceleration reactor 311 and the second decompression reactor 312 are excited via the first leg of the A phase and the second leg of the B phase, and the current iL1 and the second deflection of the first decompression reactor 311.
- the current iL2 of the reactor 312 increases with a positive inclination. Therefore, this thirteenth operation mode does not supply power to the output like the first operation mode, the third operation mode, the fifth operation mode, the seventh operation mode, the ninth operation mode, and the eleventh operation mode. , The excitation period of the first decelerating reactor 311 and the second depleting reactor 312.
- the gate signals of A1, A2, and B3 are turned off, and the gate signal of B1 is turned on, so that the thirteenth operation mode ends and the mode shifts to the fourteenth operation mode.
- this 14th operation mode only the B-phase B1 and B4 gate signals are turned on. Since this is the same operation as the 6th operation mode, the 14th operation mode is the 2nd operation mode, the 4th operation mode, the 6th operation mode, the 8th operation mode, the 10th operation mode, and the 12th operation. Similar to the mode, the degaussing period and the power transmission period of the first degassing reactor 311 and the second decurrent reactor 312 are set.
- the 14th operation mode ends and the process shifts to the 15th operation mode.
- the gate signals for B1 to B4 of the B phase are turned on, and all of the B1 to B4 of the B phase are turned on. Since this is the same operation as the 7th operation mode, the 15th operation mode is the 1st operation mode, the 3rd operation mode, the 5th operation mode, the 7th operation mode, the 9th operation mode, and the 11th operation mode.
- the 15th operation mode is the 1st operation mode, the 3rd operation mode, the 5th operation mode, the 7th operation mode, the 9th operation mode, and the 11th operation mode.
- the gate signals of B1 and B4 are turned off, so that the fifteenth operation mode ends and the system shifts to the sixteenth operation mode.
- this 16th operation mode only the gate signals of the B phase B2 and B3 are turned on. Since this is the same operation as the 8th operation mode, the 16th operation mode is the 2nd operation mode, the 4th operation mode, the 6th operation mode, the 8th operation mode, the 10th operation mode, and the 12th operation mode.
- the 14th operation mode which is the degaussing period and the power transmission period of the first current reducing reactor 311 and the second current reducing reactor 312.
- the gate signal is turned on three times, the switching loss caused by the overlap of the voltage and current at the time of switching occurs only once for both on and off in principle. Therefore, the period of a total of 16 operation modes from t0 to Tsw can be treated as one switching cycle Tsw.
- a voltage is applied to the isolation transformer 5 at a frequency 2 fsw twice that of the switching frequency fsw, and excitation is performed on the first deducting reactor 311 and the second decurrent reactor 312 at a frequency 4 fsw four times that. Demagnetization is repeated. This makes it possible to reduce the size of each of the current reducing reactors 311 and 312 and the isolation transformer 5.
- the operation of the power conversion device having the configuration having the quasi-Z source network 3A has been described, but the full Z source network 3B shown in FIG. 2 is provided.
- the basic operation is the same as in the case of the configuration having the quasi-Z source network 3A of FIG. , Detailed explanation is omitted here.
- control block included in the control circuit 9 may be configured by hardware using an arithmetic circuit, but the present invention is not limited to this, and as shown in FIG. 16, for example,
- the control circuit 9 may be configured by software using a memory 91 for storing an arithmetic control program and a processor 92 for processing the program.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
Dispositif de conversion d'énergie destiné à convertir l'énergie entre une source d'alimentation en courant alternatif (1) et une charge en courant continu (8), le dispositif de conversion d'énergie étant équipé : d'un premier circuit de redressement côté entrée (2) ; d'un réseau de circuit de source d'impédance (3) équipé d'un ou plusieurs réacteurs de réduction de courant à amélioration du facteur d'énergie d'entrée (311, 312) et d'un ou plusieurs condensateurs de lissage à commande d'énergie constante (321, 322) ; d'un circuit de commutation de type à pont complet (4) équipé d'éléments de commutation (411-414) ; d'un transformateur d'isolation (5) ; d'un second circuit de redressement (6) ; et d'un circuit de commande (9). Le circuit de commande (9) commande le courant de sortie du premier circuit de redressement (2) par réglage de la période de court-circuit d'une paire de pattes (411 et 412, 413 et 414) du circuit de commutation (4), et commande l'énergie de sortie vers la charge CC (8) de manière à ce qu'elle soit constante par réglage de la période de transmission d'énergie mutuelle d'une paire comprenant deux éléments de commutation (411 et 414, 412 et 413) positionnés dans une relation diagonale l'un par rapport à l'autre.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2019/048119 WO2021117098A1 (fr) | 2019-12-09 | 2019-12-09 | Dispositif de conversion d'énergie |
JP2021563463A JP7118293B2 (ja) | 2019-12-09 | 2019-12-09 | 電力変換装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2019/048119 WO2021117098A1 (fr) | 2019-12-09 | 2019-12-09 | Dispositif de conversion d'énergie |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2021117098A1 true WO2021117098A1 (fr) | 2021-06-17 |
Family
ID=76328921
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2019/048119 WO2021117098A1 (fr) | 2019-12-09 | 2019-12-09 | Dispositif de conversion d'énergie |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP7118293B2 (fr) |
WO (1) | WO2021117098A1 (fr) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114389460A (zh) * | 2022-01-21 | 2022-04-22 | 中国石油大学(华东) | 一种基于准z源结构的混合桥式dc/dc变换器 |
CN114944262A (zh) * | 2022-07-25 | 2022-08-26 | 宁波兴隆磁性技术有限公司 | 一种直流恒压充退磁控制方法 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114784996A (zh) * | 2022-04-28 | 2022-07-22 | 中国科学院电工研究所 | 一种低压大电流无线充电系统及其协同控制方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015015623A1 (fr) * | 2013-08-01 | 2015-02-05 | 株式会社日立製作所 | Dispositif à semi-conducteurs et dispositif de conversion d'énergie |
JP2016052167A (ja) * | 2014-08-29 | 2016-04-11 | 東洋電機製造株式会社 | 電力変換装置 |
WO2018043480A1 (fr) * | 2016-09-01 | 2018-03-08 | 国立大学法人筑波大学 | Circuit d'entraînement de charge, système d'entraînement de charge et procédé d'entraînement de charge |
WO2019073904A1 (fr) * | 2017-10-13 | 2019-04-18 | ナブテスコ株式会社 | Circuit convertisseur ca-ca |
-
2019
- 2019-12-09 WO PCT/JP2019/048119 patent/WO2021117098A1/fr active Application Filing
- 2019-12-09 JP JP2021563463A patent/JP7118293B2/ja active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015015623A1 (fr) * | 2013-08-01 | 2015-02-05 | 株式会社日立製作所 | Dispositif à semi-conducteurs et dispositif de conversion d'énergie |
JP2016052167A (ja) * | 2014-08-29 | 2016-04-11 | 東洋電機製造株式会社 | 電力変換装置 |
WO2018043480A1 (fr) * | 2016-09-01 | 2018-03-08 | 国立大学法人筑波大学 | Circuit d'entraînement de charge, système d'entraînement de charge et procédé d'entraînement de charge |
WO2019073904A1 (fr) * | 2017-10-13 | 2019-04-18 | ナブテスコ株式会社 | Circuit convertisseur ca-ca |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114389460A (zh) * | 2022-01-21 | 2022-04-22 | 中国石油大学(华东) | 一种基于准z源结构的混合桥式dc/dc变换器 |
CN114944262A (zh) * | 2022-07-25 | 2022-08-26 | 宁波兴隆磁性技术有限公司 | 一种直流恒压充退磁控制方法 |
Also Published As
Publication number | Publication date |
---|---|
JP7118293B2 (ja) | 2022-08-15 |
JPWO2021117098A1 (fr) | 2021-06-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8861238B2 (en) | Isolated soft-switch single-stage AC-DC converter | |
US11451139B2 (en) | Three-phase single-stage soft-switching AC-DC converter with power factor correction | |
EP3734828B1 (fr) | Dispositif de conversion de puissance | |
JP6624729B2 (ja) | 絶縁型の双方向dc/dcコンバータおよびその制御方法 | |
WO2021117098A1 (fr) | Dispositif de conversion d'énergie | |
US20080094860A1 (en) | Bidirectional battery power inverter | |
Siwakoti et al. | Power electronics converters—An overview | |
US11296607B2 (en) | DC-DC converter | |
CN112436741B (zh) | 基于双开关电力电子移相变压器的精简型多脉波整流器 | |
US11303214B2 (en) | Power conversion device and power supply device | |
US20050141248A1 (en) | Novel efficient and reliable DC/AC converter for fuel cell power conditioning | |
WO2006027744A2 (fr) | Convertisseur continu-continu a pont integral triphase monte en parallele sur le cote primaire | |
CN109842182B (zh) | 供电系统 | |
Okutani et al. | Analysis and comparison of series resonant converter with embedded filters for high power density DCX of solid-state transformer | |
JP2002233150A (ja) | 共振型dc−dcコンバータ | |
Akbar et al. | Single-Phase Virtual-Ground Transformerless Buck–Boost Inverters | |
Chen et al. | A new hybrid Si/SiC CCM totem pole bridgeless PFC design towards optimal performance and cost tradeoff | |
Seragi et al. | Review on Z-Source Inverter | |
Jang et al. | Interleaved PFC boost converter with intrinsic voltage-doubler characteristic | |
Ahmed et al. | Three-Level Unipolar/Bipolar Buck-Boost AC-AC Converters with Less Active Switches and No Commutation Issues | |
Abbasi et al. | An interchangeable soft-switched voltage boosting circuit for a multi-mode LLC step-up converter module in medium voltage applications | |
Reddivari et al. | Differential mode gamma source inverter with reduced switching stresses | |
Esmaeili et al. | Dual winding magnetically coupled impedance-source inverters with DC-rail voltage clamping circuits | |
JP2009165272A (ja) | 制御装置、電力変換装置及び制御方法 | |
Parihar et al. | Optimal control path for dual active bridge based solid-state transformer |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 19955691 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2021563463 Country of ref document: JP Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 19955691 Country of ref document: EP Kind code of ref document: A1 |