WO2021117098A1

WO2021117098A1 - Power conversion device

Info

Publication number: WO2021117098A1
Application number: PCT/JP2019/048119
Authority: WO
Inventors: 大斗水谷; 貴昭 ▲高▼原; 亮太近藤; 森　修
Original assignee: 三菱電機株式会社
Priority date: 2019-12-09
Filing date: 2019-12-09
Publication date: 2021-06-17
Also published as: JP7118293B2; JPWO2021117098A1

Abstract

A power conversion device for converting power between an AC power source (1) and a DC load (8), the power conversion device being equipped with: an input-side first rectification circuit (2); an impedance source circuit network (3) equipped with one or more input power factor-improving current reduction reactors (311, 312) and one or more constant power control smoothing capacitors (321, 322); a full-bridge-type switching circuit (4) equipped with switching elements (411-414); an isolation transformer (5); a second rectification circuit (6); and a control circuit (9). Therein, the control circuit (9) controls the output current of the first rectification circuit (2) by adjusting the short circuit period of one pair of legs (411 and 412, 413 and 414) of the switching circuit (4), and controls the output power to the DC load (8) so as to be constant by adjusting the mutual power transmission period of a pair comprising two switching elements (411 and 414, 412 and 413) positioned in a diagonal relationship relative to one another.

Description

Power converter

This application relates to a power conversion device.

As a power conversion device of the prior art, a circuit method using an impedance source network (Z source network) has been studied in order to realize operation in a wide input / output voltage range (see, for example, Patent Document 1 below). ..

This conventional power conversion device is an inverter having an impedance source booster circuit whose output voltage is a power supply voltage or a voltage obtained by boosting the power supply voltage, and a switching element capable of short-circuiting the high potential side and the low potential side of the output voltage. The circuit and a control unit capable of controlling the output voltage by charging / discharging the capacitor of the impedance source booster circuit by controlling the switching element are provided, and the control unit desires the output voltage. The output voltage command, which is a command for setting the value of, is calculated as the product of the boost rate for specifying the voltage of the capacitor and the modulation factor used for modulating the control signal of the switching element, and the boost rate is calculated as described above. It is variably set when the output voltage command is less than the power supply voltage.

Japanese Unexamined Patent Publication No. 2016-52167

As described above, the impedance source network is generally used for DC / AC inverter circuits, and is used for controlling the output voltage to an AC load such as a motor. When this method is applied to an AC / DC converter circuit, an AC input power factor improving function is required. Therefore, when the voltage control of the prior art is simply substituted, the input power factor cannot be controlled, which is deteriorated, and a high peak value current flows through the switching element. As a result, there is a possibility of destruction due to a decrease in power conversion efficiency or a deterioration in loss of a specific component.

The present application discloses a technique for solving the above-mentioned problems, and enables high power factor control of AC input while performing a wide range of output power control to a DC load, improving power conversion efficiency and improving power conversion efficiency. An object of the present invention is to provide a power conversion device capable of reducing the loss of a specific circuit component.

The power converter disclosed in the present application is
A power conversion device that converts power between an AC power supply and a DC load.
An impedance source network consisting of a first rectifier circuit on the input side, a current-reducing reactor for improving the input power factor, and a smoothing capacitor for at least one constant power control, and two switching elements in series. A switching circuit in which a pair of connected legs are connected in parallel to each other, an isolation transformer in which the primary winding is connected to the switching circuit, and a second winding in which the primary winding is connected to the secondary winding of the isolation transformer. Equipped with a rectifier circuit and a control circuit,
The control circuit controls the current output from the first rectifier circuit by adjusting the short-circuit period between the pair of legs of the switching circuit, and is a pair consisting of the two diagonal switching elements. By adjusting the mutual power transmission period, the output power to the DC load is controlled to be constant.

According to the power conversion device disclosed in the present application, it is possible to control a high power factor of AC input while performing a wide range of output power control to a DC load, and it is possible to improve power conversion efficiency and reduce loss of specific circuit components. Become.

It is a circuit block diagram of the power conversion apparatus which concerns on Embodiment 1 of this application. It is another circuit block diagram of the power conversion apparatus which concerns on Embodiment 1 of this application. It is another circuit block diagram of the power conversion apparatus which concerns on Embodiment 1 of this application. It is a circuit block diagram of the secondary side of the isolation transformer of the power conversion apparatus which concerns on Embodiment 1 of this application. It is another circuit block diagram of the secondary side of the isolation transformer of the power conversion apparatus which concerns on Embodiment 1 of this application. It is another circuit block diagram of the secondary side of the isolation transformer of the power conversion apparatus which concerns on Embodiment 1 of this application. It is another circuit block diagram of the secondary side of the isolation transformer of the power conversion apparatus which concerns on Embodiment 1 of this application. It is another circuit block diagram of the secondary side of the isolation transformer of the power conversion apparatus which concerns on Embodiment 1 of this application. It is a block diagram of another smoothing circuit on the output side of the power conversion apparatus which concerns on Embodiment 1 of this application. It is a timing chart which shows the operation of the power conversion apparatus which concerns on Embodiment 1 of this application. It is an equivalent circuit diagram which provides the operation description of the power conversion apparatus which concerns on Embodiment 1 of this application. It is another equivalent circuit diagram provided for the operation description of the power conversion apparatus which concerns on Embodiment 1 of this application. It is another equivalent circuit diagram provided for the operation description of the power conversion apparatus which concerns on Embodiment 1 of this application. It is a circuit block diagram of the power conversion apparatus which concerns on Embodiment 2 of this application. It is a timing chart which shows the operation of the power conversion apparatus which concerns on Embodiment 2 of this application. It is a block diagram which shows an example of the structure of the control circuit of

Embodiments

1 and 2 of this application.

Embodiment 1.
The power conversion device according to the first embodiment of the present application is applied to, for example, a power supply system centered on a charger of an electric vehicle, and will be described below with reference to the drawings.

FIG. 1 is a circuit configuration diagram of the power conversion device according to the first embodiment of the present application.
The power conversion device according to the first embodiment of the present application converts the AC power supplied from the AC power supply 1 into DC power while insulating it, and outputs the DC power to the DC load 8. It includes a rectifier circuit 2, an impedance source network 3, a switching circuit 4, an isolated transformer 5, a second rectifier circuit 6, an output smoothing circuit 7, and a control circuit 9.

Here, the AC power supply 1 is a commercial AC system, a private power generator, or the like. The DC load 8 may be composed of not only a pure resistance load but also, for example, a high-voltage battery for traveling a vehicle, a lead battery as a power source for electrical components for a vehicle, and an electric double layer capacitor (EDLC: Electric Double Layer Capacitor). Good. It is self-evident that the AC power supply 1 or the DC load 8 is not limited to the above.

The first rectifier circuit 2 is used for full-wave rectification of the AC input supplied from the AC power supply 1, and in FIG. 1, it has a general configuration in which the diode element 2a is fully bridge-connected. Needless to say, an active element such as a MOSFET may be used instead of the passive element such as the diode element 2a.

The impedance source network 3 is composed of at least one flow-reducing reactor for improving the input power factor and at least one smoothing capacitor for constant power control. In particular, in the example shown in FIG. 1, it is composed of a first current reducing reactor 311, a second current reducing reactor 312, a first smoothing capacitor 321 and a second smoothing capacitor 322, and a reflux diode 33 as a reflux element. .. The impedance source network 3 having this configuration is defined here as "quasi-Z source network (Quasi Impedance Circuit Network) 3A".

In this quasi-Z source network 3A, the positive electrode terminal of the output bus of the first rectifier circuit 2 and the first end of the first destreaming reactor 311 are connected to each other. Further, the negative electrode terminal of the output bus of the first rectifier circuit 2, the first end of the first smoothing capacitor 321 and the negative electrode terminal of the input bus of the switching circuit 4 are connected to each other. Further, the second end of the first current reducing reactor 311, the first end of the second smoothing capacitor 322, and the first end of the reflux diode 33 are connected to each other. Further, the second end of the second smoothing capacitor 322, the first end of the second current reducing reactor 312, and the positive electrode terminal of the input bus of the switching circuit 4 are connected to each other. Further, the second end of the freewheeling diode 33, the second end of the second current reducing reactor 312, and the second end of the first smoothing capacitor 321 are connected to each other.

As described above, in this quasi-Z source network 3A, the first end of the first current reducing reactor 311 is connected to the positive electrode terminal of the output bus of the first rectifier circuit 2, and the second end of the first current reducing reactor 311 is connected to the first terminal. 2 It is connected to the intersection of the smoothing capacitor 322 and the freewheeling diode 33. By doing so, the current input from the AC power supply 1 can be continuously passed to the switching circuit 4, so that the harmonic component on the input side can be reduced. Further, by treating the first current reducing reactor 311 and the second current reducing reactor 312 as simulated current sources, the same operation as that of the current type converter can be performed. Further, the voltage can be made constant by the first smoothing capacitor 321 and the second smoothing capacitor 322, and the first smoothing capacitor 321 and the second smoothing capacitor 322 are treated as simulated voltage sources in the same manner as the voltage converter. Operation is possible. That is, it has a feature that the voltage type converter and the current type converter can be operated at the same time by the control by the control circuit 9.

Here, the reflux diode 33 is not limited to the types of a fast recovery diode (Fast Recovery Diode) and a soft recovery diode (SBD: Soft Recovery Diode), as well as SiC (Silicon Carbide) or GaN (Gallium Nitride). A material such as Ga2O3 (gallium oxide) may be used.

The switching circuit 4 constitutes a full bridge inverter by using four switching elements of a first switching element 411, a second switching element 412, a third switching element 413, and a fourth switching element 414. Here, the first switching element 411 and the second switching element 412 are connected in series with each other to form the first leg. Further, the third switching element 413 and the fourth switching element 414 are connected in series with each other to form the second leg.

Here, the first switching element 411 to the fourth switching element 414 are not limited to IGBT (Insulated Gate Bipolar Transistor), MOSFET (Metal Oxide Semiconductor Field Effect Transistor), etc. High Electron Mobility Transistor), Ga2O3-MOSFET, or the like may be used.

In the isolation transformer 5, the first end of the primary winding is connected to the connection point between the first switching element 411 and the second switching element 412, and the second end of the primary winding is the third switching element 413. Is connected to the connection point of the fourth switching element 414.

Further, a full bridge type second rectifier circuit 6 composed of four first rectifier diodes 61 to a fourth rectifier diode 64 is provided on the secondary winding of the isolation transformer 5. Then, the first end of the secondary winding of the insulating transformer 5 is connected to the connection point between the first rectifier diode 61 and the second rectifier diode 62, and the second end of the secondary winding is the third rectifier diode 63. Is connected to the connection point of the fourth rectifier diode 64.

Here, the first rectifier diode 61 to the fourth rectifier diode 64 are not limited to the types of fast recovery diode (Fast Recovery Diode) and soft recovery diode (SBD: Soft Recovery Diode), as well as SiC (Silicon Carbide) or GaN. , Ga2O3 (gallium oxide) and the like may be used.

Further, since the output smoothing circuit 7 is provided with the first current reducing reactor 311 and the second current reducing reactor 312 as simulated current sources on the input side, a capacitor input type is used.

The control circuit 9 switches each of the switching circuits 4 based on the detection output of the AC power supply voltage vac of the AC power supply 1, the current iL1 flowing through the first decurrent reactor 311 and the output voltage Vout and the output current Iout to the DC load 8. By outputting a gate signal for on / off control to the elements 411 to 414, the output power control to the DC load 8 and the high power rate control of the AC input are executed.

With such a configuration, conventionally, a two-stage conversion configuration of an AC / DC converter for improving the power factor and an isolated DC / DC converter for output control was required, whereas this embodiment 1 In the power conversion device of the above, as will be described in detail later, the output power control to the DC load 8 and the high power rate control of the AC input can be performed by converting the input voltage from the AC power supply 1 to a desired DC output voltage in one step. Can be achieved.

The impedance source network 3 described above is not limited to the configuration of the quasi-Z source network 3A shown in FIG. 1, and may have the configuration shown in FIG. 2 or 3, for example.

The impedance source network 3 shown in FIG. 2 is composed of a first current reducing reactor 311, a second current reducing reactor 312, a first smoothing capacitor 321 and a second smoothing capacitor 322, and is a quasi-Z shown in FIG. This is a method that does not use the recirculation diode 33 as in the source network 3A. The impedance source network 3 having the configuration shown in FIG. 2 is defined here as "Full Impedance Circuit Network 3B".

In this full Z source network 3B, the positive electrode terminal of the output bus of the first rectifier circuit 2, the first end of the first destreaming reactor 311 and the first end of the first smoothing capacitor 321 are connected to each other. Further, the second end of the first current reducing reactor 311, the first end of the second smoothing capacitor 322, and the positive electrode terminal of the input bus of the switching circuit 4 are connected to each other. Further, the negative electrode terminal of the output bus of the first rectifier circuit 2, the second end of the second smoothing capacitor 322, and the first end of the second current reducing reactor 312 are connected to each other. Further, the second end of the first smoothing capacitor 321 and the second end of the second current reducing reactor 312, and the negative electrode terminal of the input bus of the switching circuit 4 are connected to each other.

As described above, in the full Z source network 3B shown in FIG. 2, one end (first end or second end) of the first smoothing capacitor 321 and the second smoothing capacitor 322 is used to form the first current reducing reactor 311 and the second smoothing capacitor 311 and the second. The flow-reducing reactors 312 are arranged so as to sandwich each of them. Therefore, the current type converter and the voltage type converter are controlled by the control circuit 9 as in the quasi-Z source network 3A without requiring the return diode 33 as in the quasi-Z source network 3A shown in FIG. It is possible to operate with the characteristics of. However, since the first current reducing reactor 311 and the second current reducing reactor 312 are sandwiched between one ends of the two smoothing

capacitors

321 and 322, the input from the AC power supply 1 becomes discontinuous. Therefore, as compared with the quasi-Z source network 3A, the number of parts can be reduced, but the harmonic component on the input side is somewhat increased.

The impedance source network 3 shown in FIG. 3 is composed of a first decompression reactor 311, a second decompression reactor 312, a third decompression reactor 313, a first smoothing capacitor 321 and a second smoothing capacitor 322. The first declining reactor 311 is added to the positive electrode terminal side of the output bus of the first rectifier circuit 2 with respect to the full Z source network 3B shown in FIG. The impedance source network 3 having the configuration shown in FIG. 3 is defined here as “Multi Impedance Circuit Network 3C”.

In this composite Z source network 3C, the positive electrode terminal of the output bus of the first rectifier circuit 2 and the first end of the first destreaming reactor 311 are connected to each other. Further, the second end of the first decompression reactor 311, the first end of the second decompression reactor 312, and the first end of the first smoothing capacitor 321 are connected to each other. Further, the second end of the second current reducing reactor 312, the first end of the second smoothing capacitor 322, and the positive electrode terminal of the input bus of the switching circuit 4 are connected to each other. Further, the negative electrode terminal of the output bus of the first rectifier circuit 2, the second end of the second smoothing capacitor 322, and the first end of the third current reducing reactor 313 are connected to each other. Further, the second end of the first smoothing capacitor 321 and the second end of the third current reducing reactor 313, and the negative electrode terminal of the input bus of the switching circuit 4 are connected to each other.

The composite Z source network 3C shown in FIG. 3 is a current type under the control of the control circuit 9, similarly to the quasi-Z source network 3A shown in FIG. 1 or the full Z source network 3B shown in FIG. It enables operation that combines the characteristics of a converter and a voltage-type converter. Further, in this composite Z source network 3C, the first decurrent current reducing reactor 311 is added to the positive electrode terminal side of the output bus of the first rectifier circuit 2 with respect to the component arrangement of the full Z source network 3B shown in FIG. Therefore, the current input from the AC power supply 1 can be continuously passed to the switching circuit 4 as in the case of the configuration of the quasi-Z source network 3A shown in FIG. It is possible to reduce the harmonic component on the side.

In the configuration shown in FIG. 1, the second rectifier circuit 6 is shown as a full-bridge type rectifier circuit in which four rectifier diodes 61 to 64 are combined, but the present invention is not limited to this, and for example, the diode 60A and the diode 60A shown in FIG. 4 and It may be a center tap diode rectifier circuit having 60B, or a voltage doubler diode rectifier

circuit having diodes

61A and 61B and

capacitors

62A and 62B shown in FIG. Further, the rectifier diodes 61 to 64 of the second rectifier circuit 6 may be replaced with switching elements 63A to 63D as shown in FIG. 6 to form a full bridge synchronous rectifier circuit, which is further shown in FIG. A center tap synchronous rectifier circuit having

such switching elements

64A and 64B may be used. Furthermore, it may be a voltage doubler synchronous rectifier circuit having

switching elements

65A and 65B and

capacitors

66A and 66B as shown in FIG. 8, and it goes without saying that the circuit configuration is not limited to these.

Further, in FIG. 1, the output smoothing circuit 7 shows a capacitor input type, but in addition to this configuration, for example, as shown in FIG. 9, it has a filter configuration in which a capacitor 71 and a reactor 72 are combined. You may.

Next, the operation of the power conversion device having the configuration having the quasi-Z source network 3A shown in FIG. 1 will be described. Here, as a precondition, the inductances of the first decompression reactor 311 and the second decompression reactor 312 are the same value, and the capacitances of the first smoothing capacitor 321 and the second smoothing capacitor 322 are the same value.

FIG. 10 is a timing chart showing the operation of the power conversion device having the configuration shown in FIG. In FIG. 10, the vertical axis is, in order from the top, the gate signal of the switching

elements

411 and 414, the gate signal of the switching

elements

412 and 413, the voltage Vtr2 between the secondary winding terminals of the isolation transformer 5, and the first current reducing reactor. The current iL1 flowing through 311 is shown.

As shown in FIG. 10, the gate signals of the first switching element 411 and the fourth switching element 414 are synchronized, and the gate signals of the second switching element 412 and the third switching element 413 are synchronized. That is, the same gate signals are generated for the two diagonally located switching

elements

411 and 414 and the two switching

elements

412 and 413. As a result, four operation modes from the first operation mode to the fourth operation mode are changed during one switching cycle Tsw. Hereinafter, the contents of each operation mode will be specifically described.

[1] At the initial time t0, the first operation mode starts. In this first operation mode, all the gate signals given to the first switching element 411 to the fourth switching element 414 are turned on. At this time, all of the first switching elements 411 to 414 are turned on, and both the first leg and the second leg are short-circuited. As a result, the first decompression reactor 311 and the second decompression reactor 312 are excited, and the current iL1 of the first decompression reactor 311 and the current iL2 of the second decompression reactor 312 increase with a positive inclination. In this case, since the first leg and the second leg are in a short-circuited state, the voltage Vdc across each leg is zero. As a result, no voltage is applied to the primary winding of the isolation transformer 5. Therefore, in this first operation mode, power is not supplied to the output, and the excitation period of each of the

current reduction reactors

311 and 312 is set.

FIG. 11 is an equivalent circuit diagram in the first operation mode.
In this operation mode, 2 of the path through which the output terminal of the first rectifier circuit 2 passes through each leg and the path through which the first smoothing capacitor 321 and the second current reducing reactor 312 pass through each leg. Two current paths are constructed.

By using Kirchhoff's law, the voltage vL1 applied to the first current-reducing reactor 311 in the first operation mode is represented by the following equation (1), and the voltage vL2 applied to the second current-reducing reactor 312. Can be expressed by the following equation (2), and the voltage Vdc across the legs can be expressed by the following equation (3).

[2] Next, at time t1, the gate signals of the second switching element 412 and the third switching element 413 are both turned off, so that the first operation mode ends and the second operation mode shifts to the second operation mode. In this second operation mode, only the gate signals of the first switching element 411 and the fourth switching element 414 are turned on. That is, when only the two

diagonal switching elements

411 and 414 are turned on, the voltage Vdc across the leg is applied to the primary winding of the isolation transformer 5. As a result, the energies of the first decurrent reactor 311 and the second decurrent reactor 312 are discharged (degaussed) and descend with a negative electrode inclination. Further, a positive voltage is also induced in the secondary winding of the isolation transformer 5, and power is transmitted to the output side. Therefore, this second operation mode is the degaussing period and the power transmission period of the first current reducing reactor 311 and the second current reducing reactor 312.

FIG. 12 is an equivalent circuit diagram in the second operation mode.
In the second operation mode, the output terminal of the first rectifier circuit 2, the freewheeling diode 33, and the path passing through the first smoothing capacitor 321 in sequence, the freezing diode 33, the second current reducing reactor 312, and the second Two current paths are configured, one with a path passing through the two smoothing capacitors 322 in sequence.

Similarly, by using Kirchhoff's law, the voltage vL1 applied to the first current-reducing reactor 311 in the second operation mode is the voltage vL2 applied to the second current-reducing reactor 312 by the following equation (4). Can be expressed by the following equation (5), and the voltage Vdc across the legs can be expressed by the following equation (6).

[3] Next, at time t2, when both the gate signals of the second switching element 412 and the third switching element 413 are turned on, the second operation mode ends and the process shifts to the third operation mode. In this third operation mode, all the gate signals of the first switching element 411 to the fourth switching element 414 are turned on. Therefore, since this third operation mode is the same operation as the first operation mode, detailed description thereof will be omitted here.

[4] Next, at time t3, both the gate signals of the first switching element 411 and the fourth switching element 414 are turned off, so that the third operation mode ends and the process shifts to the fourth operation mode. In this fourth operation mode, only the gate signals of the second switching element 412 and the third switching element 413 are turned on. That is, when only the two diagonally located switching

elements

412 and 413 are turned on, the negative electrode property −Vdc of the voltage across the leg is applied to the primary winding of the isolation transformer 5. As a result, the energies of the first decurrent reactor 311 and the second decurrent reactor 312 are discharged (degaussed) and descend with a negative electrode inclination. Further, a negative voltage is also induced in the secondary winding of the isolation transformer 5, and power is transmitted to the output side. Therefore, this fourth operation mode is the degaussing period and the power transmission period of the first decurrent reduction reactor 311 and the second current reduction reactor 312.

FIG. 13 is an equivalent circuit diagram in the fourth operation mode. This is because the polarity of the voltage applied to the isolation transformer 5 is different from that in the second operation mode, and the other operations are the same as in the second operation mode. Therefore, detailed description thereof will be omitted here.

[5] Subsequently, at time Tsw, the gate signals of the first switching element 411 and the fourth switching element 414 are both turned on, so that the fourth operation mode ends and the process shifts to the first operation mode again. ..

The above is an explanation of the operation of the power conversion device having the configuration shown in FIG. 1 during one switching cycle Tsw. Therefore, in the first operation mode and the third operation mode, the first deducting reactor 311 and the second deducting reactor 312 are excited, and in the second operation mode and the fourth operation mode, the first deducting reactor 311 and the second depleting are performed. Since the discharge (degaussing) period of the flow reactor 312 is reached, a voltage is applied to the first current reducing reactor 311 and the second current reducing reactor 312 at twice the frequency (2 fsw) with respect to one switching frequency fsw. To. Therefore, it is possible to achieve more miniaturization as compared with a general power factor improving converter.

Although the operation of the power conversion device having the quasi-Z source network 3A shown in FIG. 1 has been described here, the power conversion device having the full Z source network 3B shown in FIG. 2 has been described. Alternatively, the power conversion device having the configuration provided with the composite Z source network 3C shown in FIG. 3 also has the same basic operation as the power conversion device having the configuration having the quasi-Z source network 3A shown in FIG. , Detailed explanation is omitted here.

By the way, in the power conversion device of the present application having such an impedance source network 3, it is necessary to suppress the on period of each gate signal given to the switching circuit 4 to less than 75% with respect to one switching cycle Tsw. The reason will be explained below.

As shown in FIG. 10, the power conversion device according to the first embodiment of the present application is classified into four operation modes, of which two of the first operation mode and the third operation mode are the first flow reduction. The excitation period of the reactor 311 and the second decurrent reactor 312 (hereinafter referred to as the shoot-through period), and the other two of the second operation mode and the fourth operation mode are the first deductor reactor 311 and the second deductor. This is the degaussing period and the power transmission period (hereinafter, simply referred to as the power transmission period) of the reactor 312.

Now, the shoot-through period is defined as Ds / Tsw, and the power transmission period is defined as Da / Tsw. Here, Tsw is one switching cycle, Ds is the duty ratio of the shoot-through period, and Da is the duty ratio of the power transmission period. The shoot-through period exists twice in one switching cycle Tsw, and the power transmission period exists twice in one switching cycle Tsw. That is, in one switching cycle Tsw, the total shoot-through period is 2Ds · Tsw, and the total power transmission period is 2Da · Tsw. From this, the following equation (7) can be obtained.

Of the four switching elements 411 to 414, the ratio (duty ratio) at which the gate signal of one switching element is turned on during one switching cycle Tsw is defined as D. At this time, the ON period of the switching element is D · Tsw, and can be expressed as the sum of one power transmission period Da · Tsw and two power transmission periods 2Ds · Tsw as shown in the following equation (8).

By arranging the above equations (7) and (8), the duty ratio Ds in the shoot-through period and the duty ratio Da in the power transmission period can be expressed by the following equations (9) and (10), respectively. it can.

The voltage of the first smoothing capacitor 321 is obtained by using the duty ratio of each period of the above equations (9) and (10) and the voltage relational expressions of the above equations (1) to (6). The vc1, the voltage vc2 of the second smoothing capacitor 322, and the average values Vdc and avg of the voltages Vdc across the first leg and the second leg can be expressed by the following equations (11) to (13). ..

When a certain constant voltage Vdc, peak is applied to the voltage across each leg in the shoot-through period Ds · Tsw, the voltage at that time is expressed by the following equation (14).

Further, the following equation (16) can be obtained from the principle equation of voltage conversion of the isolation transformer 5 represented by the following equation (15) and the above equation (14). Here, Np is the number of turns of the primary winding of the isolation transformer 5, Ns is the number of turns of the secondary winding of the isolation transformer 5, and Nps is the number of turns of the secondary winding. It is the ratio of the number of turns of the primary winding at that time.

From the formula (16), when the duty ratio D is less than 3/4 (that is, less than 75%) and (3-4D) is 1 or more, that is, when the duty ratio D is less than 0.5, the step-down operation is performed. .. Further, when the duty ratio D is less than 3/4 (that is, less than 75%) and (3-4D) is less than 1, that is, when the duty ratio D is larger than 0.5, the boosting operation is performed. On the other hand, when the duty ratio D is 3/4 or more (that is, 75% or more), the denominator of the equation (16) becomes zero or negative electrode, and in principle, it becomes inoperable.
From these facts, the power conversion device according to the first embodiment of the present application needs to operate with the duty ratio D suppressed to less than 3/4, that is, less than 75%.

As described above, the power conversion device according to the first embodiment of the present application performs high power factor control and output power control under the condition of a duty ratio of less than 75% in the control circuit 9. When the inductances of the deflowing reactors are the same, the currents can be treated as the same value. Therefore, only the current iL1 flowing through the first deflowing reactor 311 needs to be detected at the time of high power factor control. From this, the current iL1 of the first decurrent reactor 311 of the impedance source network 3 is adjusted to be in phase with the phase of the AC power supply voltage vac and in a sinusoidal shape based on the command value of an arbitrary input current. High power factor control can be achieved. Further, the output power control can be achieved by adjusting the power transmission period so that the output power becomes constant while performing the high power factor control.

Embodiment 2.
FIG. 14 is a circuit configuration diagram of the power conversion device according to the second embodiment of the present application. The same or corresponding parts as those of the first embodiment shown in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted here.

When applying a power converter to a high-output application, a method of connecting two switching circuits in parallel is generally adopted in order to reduce the loss of the switching element. In the power conversion device of the second embodiment, the power conversion device can be made even smaller by changing the operation method instead of simply connecting the switching circuits in parallel. The contents will be described below.

In the power conversion device according to the second embodiment, the switching circuit 4 includes the first switching circuit 41 and the second switching circuit 42 in total 2 on the premise of the configuration including the quasi-Z source network 3A described with reference to FIG. It consists of a phase full bridge inverter. The first switching circuit 41 and the second switching circuit 42 are connected in parallel to the quasi-Z source network 3A, and the first switching circuit 41 and the second switching circuit 42 are connected to the isolation transformer 5-1. The next winding is provided. Then, power is transmitted from the outputs of the first switching circuit 41 and the second switching circuit 42 via the isolation transformer 5.

Note that FIG. 14 assumes a configuration including the quasi-Z source network 3A shown in FIG. 1, but the configuration is not limited to this configuration, and the full Z source network 3B shown in FIG. 2 or FIG. 3 shows. The composite Z source network 3C and the like shown may be provided, and the configuration of the impedance source network 3 is not limited to the configuration of the quasi-Z source network 3A.

Here, for simplification of the description, the first switching circuit 41 is defined as the A phase, the first switching element 411 of the first switching circuit 41 is A1, the second switching element 412 is A2, and the third switching element. 413 is defined as A3, and the fourth switching element 414 is defined as A4. Similarly, the second switching circuit 42 is defined as the B phase, the first switching element 421 of the second switching circuit 42 is B1, the second switching element 422 is B2, the third switching element 423 is B3, and the fourth switching element. 424 is defined as B4. Further, in the A phase, A1 and A2 connected in series are defined as the first leg of the A phase, and A3 and A4 connected in series are defined as the second leg of the A phase. Similarly, in the B phase, B1 and B2 connected in series are defined as the first leg of the B phase, and B3 and B4 connected in series are defined as the second leg of the B phase.

When the A phase and the B phase are operated at the same timing, the operation is the same as when two switching elements are simply connected in parallel. On the other hand, by shifting the timing so that the A-phase and B-phase operations are alternately performed, the voltage is applied to the first current-reducing reactor 311 and the second current-reducing reactor 312, and the isolation transformer 5. The number of times of application, that is, the frequency can be increased, and the miniaturization of the device can be achieved. Such a control operation is defined as an interleave operation. The contents of this interleaving operation will be described below.

FIG. 15 is a timing chart showing the interleaving operation of the power conversion device according to the second embodiment of the present application.

In FIG. 15, the gate signals to be applied to A1 to A4 and B1 to B4 are independently generated by shifting the timing so that the operations of the A phase and the B phase are alternately performed. In this case, 16 operation modes from the first operation mode to the 16th operation mode are changed during one switching cycle Tsw. Hereinafter, the contents of each operation mode will be specifically described.

[1] At the initial time t0, the first operation mode starts. In this first operation mode, the gate signals of A-phase A1 and A2 and B-phase B1 and B2 are turned on. At this time, A1 and A2 constituting the first leg of the A phase and B1 and B2 constituting the first leg of the B phase are both turned on, and the respective legs are short-circuited. As a result, the first deceleration reactor 311 and the second decompression reactor 312 are excited via the first leg of the A phase and the first leg of the B phase, and the current iL1 and the second deflection of the first decompression reactor 311 are excited. The current iL2 of the reactor 312 increases with a positive inclination. At this time, since both the first legs of the A phase and the B phase are in a short-circuited state, the voltage Vdc across each leg is zero. As a result, no voltage is applied to the primary side of the isolation transformer 5. Therefore, in this first operation mode, power is not supplied to the output, and the excitation period of the first decompression reactor 311 and the second decompression reactor 312 is set.

[2] At time t1, the gate signals of A2, B1, and B2 are turned off, and the gate signal of A4 is turned on, so that the first operation mode ends and the second operation mode is entered. In this second operation mode, only the A1 and A4 gate signals of the A phase are turned on. At this time, only A1 and A4 located diagonally to the A phase are turned on, so that the voltage Vdc across the A phase leg is applied to the primary winding of the isolation transformer 5. As a result, the energies of the first decurrent reactor 311 and the second decurrent reactor 312 are degaussed and descend with a negative electrode inclination. Further, a positive voltage is also induced in the secondary winding of the isolation transformer 5, and power is transmitted to the output side. Therefore, in this second operation mode, the degaussing period and the power transmission period of the first current reducing reactor 311 and the second current reducing reactor 312 are set.

[3] At time t2, when the gate signals of A2 and A3 are turned on, the second operation mode ends and the process shifts to the third operation mode. In this third operation mode, the gate signals for A1 to A4 of the A phase are turned on, and all of the A1 to A4 of the A phase are turned on. At this time, the first decompression reactor 311 and the second decompression reactor 312 are excited via the first leg and the second leg of the A phase, and the current iL1 of the first decompression reactor 311 and the second decompression reactor 312 The current iL2 increases with a positive gradient. Therefore, this third operation mode, like the first operation mode, does not supply electric power to the output, and is an excitation period of the first decompression reactor 311 and the second decompression reactor 312.

[4] At time t3, when the gate signals of A1 and A4 are turned off, the third operation mode ends and the fourth operation mode is entered. In this fourth operation mode, only the gate signals of A2 and A3 are turned on. At this time, only A2 and A3 located diagonally to the A phase are turned on, so that the negative electrode voltage across the A phase leg −Vdc is applied to the primary winding of the isolation transformer 5. .. As a result, the energies of the first decurrent reactor 311 and the second decurrent reactor 312 are degaussed and descend with a negative electrode inclination. Further, a negative voltage is also induced in the secondary winding of the isolation transformer 5, and power is transmitted to the output side. Therefore, this fourth operation mode is the degaussing period and the power transmission period of the first degassing reactor 311 and the second decurrent reactor 312, as in the second operation mode.

[5] At time t4, the gate signal of A2 is turned off and the gate signals of A4, B1 and B2 are turned on, so that the fourth operation mode ends and the process shifts to the fifth operation mode. In this fifth operation mode, A3 and A4 constituting the second leg of the A phase and B1 and B2 constituting the first leg of the B phase are turned on, and the respective legs are short-circuited. At this time, the first deceleration reactor 311 and the second decompression reactor 312 are excited via the second leg of the A phase and the first leg of the B phase, and the current iL1 and the second deflection of the first decompression reactor 311. The current iL2 of the reactor 312 increases with a positive inclination. Therefore, this fifth operation mode, like the first operation mode and the third operation mode, does not supply electric power to the output, and is an excitation period of the first current reduction reactor 311 and the second current reduction reactor 312.

[6] At time t5, the gate signals of A3, A4, and B2 are turned off, and the gate signal of B4 is turned on, so that the fifth operation mode ends and the sixth operation mode is entered. In this sixth operation mode, only the B-phase B1 and B4 gate signals are turned on. At this time, only B1 and B4 located diagonally to the B phase are turned on, so that the voltage Vdc across the leg of the B phase is applied to the primary winding of the isolation transformer 5. Therefore, this sixth operation mode is the degaussing period and the power transmission period of the first decurrent reduction reactor 311 and the second current reduction reactor 312, as in the second operation mode and the fourth operation mode.

[7] At time t6, when the gate signals of B2 and B3 are turned on, the sixth operation mode ends and the process shifts to the seventh operation mode. In this seventh operation mode, the gate signals for B1 to B4 of B phase are turned on, and all of B1 to B4 of B phase are turned on. At this time, the first decompression reactor 311 and the second decompression reactor 312 are excited via the first leg and the second leg of the B phase, and the current iL1 of the first decompression reactor 311 and the second decompression reactor 312 The current iL2 increases with a positive gradient. Therefore, this seventh operation mode, like the first operation mode, the third operation mode, and the fifth operation mode, does not supply power to the output, and the first decompression reactor 311 and the second decompression reactor 312 It becomes the excitation period.

[8] At time t7, when the gate signals of B1 and B4 are turned off, the seventh operation mode ends and the process shifts to the eighth operation mode. In this eighth operation mode, only the B-phase B2 and B3 gate signals are turned on. At this time, only B2 and B3 located diagonally to the B phase are turned on, so that the negative electrode voltage across the B phase leg −Vdc is applied to the primary winding of the isolation transformer 5. .. Therefore, this eighth operation mode is the degaussing period and the power transmission period of the first degassing reactor 311 and the second decompression reactor 312, similarly to the second operation mode, the fourth operation mode, and the sixth operation mode. ..

[9] At time t8, the gate signal of B2 is turned off and the gate signals of A3, A4 and B4 are turned on, so that the eighth operation mode ends and the process shifts to the ninth operation mode. In this ninth operation mode, the gate signals of A-phase A3 and A4 and B-phase B3 and B4 are turned on. At this time, A3 and A4 constituting the second leg of the A phase and B3 and B4 constituting the second leg of the B phase are turned on, and the respective legs are short-circuited. At this time, the first deceleration reactor 311 and the second decompression reactor 312 are excited via the second leg of the A phase and the second leg of the B phase, and the current iL1 and the second deflection of the first decompression reactor 311. The current iL2 of the reactor 312 increases with a positive inclination. Therefore, this ninth operation mode, like the first operation mode, the third operation mode, the fifth operation mode, and the seventh operation mode, does not supply power to the output and does not supply power to the output, and the first deflow reactor 311 and the second operation mode. It is the excitation period of the decurrent reactor 312.

[10] At time t9, the gate signals of A3, B3, and B4 are turned off, and the gate signal of A1 is turned on, so that the ninth operation mode ends and the mode shifts to the tenth operation mode. In this tenth operation mode, only the A1 and A4 gate signals of the A phase are turned on. Since this is the same operation as the second operation mode, the tenth operation mode is the first degaussing reactor as well as the second operation mode, the fourth operation mode, the sixth operation mode, and the eighth operation mode. It is the degaussing period and the power transmission period of the 311 and the second decurrent reactor 312.

[11] At time t10, when the gate signals of A2 and A3 are turned on, the tenth operation mode ends and the process shifts to the eleventh operation mode. In this eleventh operation mode, the gate signals for A1 to A4 of the A phase are turned on, and all of the A1 to A4 of the A phase are turned on. Since this is the same operation as the third operation mode, the eleventh operation mode is the same as the first operation mode, the third operation mode, the fifth operation mode, the seventh operation mode, and the ninth operation mode. No power is supplied to the output, and the excitation period is set for the first decompression reactor 311 and the second decompression reactor 312.

[12] At time t11, when the gate signals of A1 and A4 are turned off, the eleventh operation mode ends and the system shifts to the twelfth operation mode. In this twelfth operation mode, only the A2 and A3 gate signals of the A phase are turned on. Since this is the same operation as the 4th operation mode, the 12th operation mode is the same as the 2nd operation mode, the 4th operation mode, the 6th operation mode, the 8th operation mode, and the 10th operation mode. It is the degaussing period and the power transmission period of the first current reducing reactor 311 and the second current reducing reactor 312.

[13] At time t12, the gate signal of A3 is turned off and the gate signals of A1, B3, and B4 are turned on, so that the twelfth operation mode ends and the process shifts to the thirteenth operation mode. In this thirteenth operation mode, the gate signals of A-phase A1 and A2 and B-phase B3 and B4 are turned on. At this time, A1 and A2 constituting the first leg of the A phase and B3 and B4 constituting the second leg of the B phase are turned on, and the respective legs are short-circuited. At this time, the first deceleration reactor 311 and the second decompression reactor 312 are excited via the first leg of the A phase and the second leg of the B phase, and the current iL1 and the second deflection of the first decompression reactor 311. The current iL2 of the reactor 312 increases with a positive inclination. Therefore, this thirteenth operation mode does not supply power to the output like the first operation mode, the third operation mode, the fifth operation mode, the seventh operation mode, the ninth operation mode, and the eleventh operation mode. , The excitation period of the first decelerating reactor 311 and the second depleting reactor 312.

[14] At time t13, the gate signals of A1, A2, and B3 are turned off, and the gate signal of B1 is turned on, so that the thirteenth operation mode ends and the mode shifts to the fourteenth operation mode. In this 14th operation mode, only the B-phase B1 and B4 gate signals are turned on. Since this is the same operation as the 6th operation mode, the 14th operation mode is the 2nd operation mode, the 4th operation mode, the 6th operation mode, the 8th operation mode, the 10th operation mode, and the 12th operation. Similar to the mode, the degaussing period and the power transmission period of the first degassing reactor 311 and the second decurrent reactor 312 are set.

[15] At time t14, when the gate signals of B2 and B3 are turned on, the 14th operation mode ends and the process shifts to the 15th operation mode. In the fifteenth operation mode, the gate signals for B1 to B4 of the B phase are turned on, and all of the B1 to B4 of the B phase are turned on. Since this is the same operation as the 7th operation mode, the 15th operation mode is the 1st operation mode, the 3rd operation mode, the 5th operation mode, the 7th operation mode, the 9th operation mode, and the 11th operation mode. , And, as in the thirteenth mode, no power is supplied to the output, and the excitation period of the first decompression reactor 311 and the second decompression reactor 312 is reached.

[16] At time t15, the gate signals of B1 and B4 are turned off, so that the fifteenth operation mode ends and the system shifts to the sixteenth operation mode. In this 16th operation mode, only the gate signals of the B phase B2 and B3 are turned on. Since this is the same operation as the 8th operation mode, the 16th operation mode is the 2nd operation mode, the 4th operation mode, the 6th operation mode, the 8th operation mode, the 10th operation mode, and the 12th operation mode. , And the 14th operation mode, which is the degaussing period and the power transmission period of the first current reducing reactor 311 and the second current reducing reactor 312.

[17] At time Tsw, the gate signal of B4 is turned off, and the gate signals of A1, A2, and B1 are turned off, so that the 16th operation mode ends and the process returns to the 1st operation mode.

From the above, during the period from the first operation mode to the 16th operation mode, by turning on the gate signals for A1 to A4 and B1 to B4 three times each, the positive and negative voltages for the isolation transformer 5 are 4 Each application is applied once, and excitation and demagnetization are repeated eight times for the first decompression reactor 311 and the second decompression reactor 312, respectively.

Although the gate signal is turned on three times, the switching loss caused by the overlap of the voltage and current at the time of switching occurs only once for both on and off in principle. Therefore, the period of a total of 16 operation modes from t0 to Tsw can be treated as one switching cycle Tsw. As a result, with respect to the switching frequency fsw, a voltage is applied to the isolation transformer 5 at a frequency 2 fsw twice that of the switching frequency fsw, and excitation is performed on the first deducting reactor 311 and the second decurrent reactor 312 at a frequency 4 fsw four times that. Demagnetization is repeated. This makes it possible to reduce the size of each of the current reducing

reactors

311 and 312 and the isolation transformer 5.

In the second embodiment, as shown in FIG. 14, the operation of the power conversion device having the configuration having the quasi-Z source network 3A has been described, but the full Z source network 3B shown in FIG. 2 is provided. In the case of the above configuration, or in the case of the configuration including the composite Z source network 3C shown in FIG. 3, the basic operation is the same as in the case of the configuration having the quasi-Z source network 3A of FIG. , Detailed explanation is omitted here.

In the above-described first and second embodiments, the control block included in the control circuit 9 may be configured by hardware using an arithmetic circuit, but the present invention is not limited to this, and as shown in FIG. 16, for example, The control circuit 9 may be configured by software using a memory 91 for storing an arithmetic control program and a processor 92 for processing the program.

In the present application, the various features, aspects, and functions described in the

respective embodiments

1 and 2 are not limited to the application of the specific embodiment, and may be performed alone or in various combinations. It is applicable to the form of.

Therefore, a myriad of variants not illustrated are envisioned within the scope of the technology disclosed in this application. For example, it includes the case of transforming, adding, or omitting at least one component, and further, the case of extracting at least one component and combining it with the component of another embodiment. ..

1 AC power supply, 2 1st rectifier circuit, 3 Impedance source circuit network, 3A quasi-Z source circuit network, 3B full Z source circuit network, 3C composite Z source circuit network, 311 1st current deceleration reactor, 312 2nd current decompression reactor , 313 3rd current reduction reactor, 321 1st smoothing capacitor, 322 2nd smoothing capacitor, 33 freewheeling diode, 4 switching circuit, 41 1st switching circuit, 42 2nd switching circuit, 5 isolation transformer, 6 2nd rectifier circuit , 7 Output smoothing circuit, 8 DC load, 9 Control circuit.

Claims

A power conversion device that converts power between an AC power supply and a DC load.
An impedance source network consisting of a first rectifier circuit on the input side, a current-reducing reactor for improving the input power factor, and a smoothing capacitor for at least one constant power control, and two switching elements in series. A switching circuit in which a pair of connected legs are connected in parallel to each other, an isolation transformer in which the primary winding is connected to the switching circuit, and a second winding in which the primary winding is connected to the secondary winding of the isolation transformer. Equipped with a rectifier circuit and a control circuit,
The control circuit controls the current output from the first rectifier circuit by adjusting the short-circuit period between the pair of legs of the switching circuit, and is a pair of the two switching elements that are diagonally related to each other. A power conversion device that controls the output power to the DC load to be constant by adjusting the mutual power transmission period.
The power conversion device according to claim 1, wherein the duty ratio that the switching element turns on in one switching cycle is a sum of the duty ratio of the short-circuit period and the duty ratio of the power transmission period of less than 0.75.
The power conversion device according to claim 1 or 2, wherein the control circuit controls the operation of the voltage type converter and the current type converter in parallel.
The control circuit controls the operation of the current converter that excites the energy of the current-reducing reactor during the short-circuit period, and the smoothing capacitor keeps the input bus voltage of the switching circuit constant during the power transmission period. The power conversion device according to claim 3, which controls the operation of the type converter.
The impedance source network includes a reflux element, a first decompression reactor, a second decompression reactor, a first smoothing capacitor, and a second smoothing capacitor.
The positive electrode terminal of the output bus of the first rectifier circuit and the first end of the first current reducing reactor are connected to each other.
The negative electrode terminal of the output bus of the first rectifier circuit, the first end of the first smoothing capacitor, and the negative electrode terminal of the input bus of the switching circuit are connected to each other.
The second end of the first current reducing reactor, the first end of the second smoothing capacitor, and the first end of the reflux element are connected to each other.
The second end of the second smoothing capacitor, the first end of the second decurrent reactor, and the positive electrode terminal of the input bus of the switching circuit are connected.
The second end of the reflux element, the second end of the second decurrent current reactor, and the second end of the first smoothing capacitor are connected to each other, according to any one of claims 1 to 4. The power converter described.
The impedance source network includes a first decompression reactor, a second decompression reactor, a first smoothing capacitor, and a second smoothing capacitor.
The positive electrode terminal of the output bus of the first rectifier circuit, the first end of the first decurrent reactor, and the first end of the first smoothing capacitor are connected to each other.
The second end of the first decurrent reactor, the first end of the second smoothing capacitor, and the positive electrode terminal of the input bus of the switching circuit are connected to each other.
The negative electrode terminal of the output bus of the first rectifier circuit, the second end of the second smoothing capacitor, and the first end of the second current reducing reactor are connected to each other.
Any one of claims 1 to 4, wherein the second end of the first smoothing capacitor, the second end of the second decurrent reactor, and the negative electrode terminal of the input bus of the switching circuit are connected to each other. The power converter described in.
The impedance source network includes a first decompression reactor, a second decompression reactor, a third decompression reactor, a first smoothing capacitor, and a second smoothing capacitor.
The positive electrode terminal of the output bus of the first rectifier circuit and the first end of the first current reducing reactor are connected to each other.
The second end of the first decompression reactor, the first end of the second decompression reactor, and the first end of the first smoothing capacitor are connected to each other.
The second end of the second decurrent reactor, the first end of the second smoothing capacitor, and the positive electrode terminal of the input bus of the switching circuit are connected to each other.
The negative electrode terminal of the output bus of the first rectifier circuit, the second end of the second smoothing capacitor, and the first end of the third current reducing reactor are connected to each other.
Any one of claims 1 to 4, wherein the second end of the first smoothing capacitor, the second end of the third decurrent reactor, and the negative electrode terminal of the input bus of the switching circuit are connected to each other. The power converter described in.
The switching circuit is configured by connecting a first switching circuit and a second switching circuit in parallel.
The control circuit controls the current output from the first rectifier circuit and controls the output power to the DC load to be constant while alternately interleaving the first switching circuit and the second switching circuit. The power conversion device according to any one of claims 1 to 7.
The interleave operation is
A first operation mode in which the two switching elements connected in series constituting at least one leg of the first switching circuit and the second switching circuit are turned on, and
A second operation mode in which power is transmitted to the load side when one pair of the two diagonal switching elements of the first switching circuit is turned on.
A third operation mode in which all the switching elements of the first switching circuit are turned on, and
A fourth operation mode in which power is transmitted to the load side when the other pair of the two diagonal switching elements of the first switching circuit is turned on.
A fifth operation mode in which the two switching elements connected in series constituting at least one leg of the first switching circuit and the second switching circuit are turned on, and a fifth operation mode.
A sixth operation mode in which power is transmitted to the load side by turning on one pair of two switching elements diagonally related to the second switching circuit.
The seventh operation mode in which all the switching elements of the second switching circuit are turned on, and
An eighth operation mode in which power is transmitted to the load side when the other pair of the two diagonal switching elements of the second switching circuit is turned on.
The power conversion device according to claim 8, wherein the power conversion device is sequentially selected and operated.
In the first operation mode, the two switching elements connected in series forming one leg of the first switching circuit are turned on, and the two connected in series forming one leg of the second switching circuit are turned on. When one of the switching elements is turned on, in the fifth operation mode, the two series-connected switching elements constituting the other switching leg of the first switching circuit are turned on, and the second switching circuit of the second switching circuit is turned on. The power conversion device according to claim 9, wherein the two switching elements connected in series constituting the other switching leg are turned on.