WO2021107114A1 - 配線基体、半導体素子収納用パッケージ、および半導体装置 - Google Patents

配線基体、半導体素子収納用パッケージ、および半導体装置 Download PDF

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Publication number
WO2021107114A1
WO2021107114A1 PCT/JP2020/044276 JP2020044276W WO2021107114A1 WO 2021107114 A1 WO2021107114 A1 WO 2021107114A1 JP 2020044276 W JP2020044276 W JP 2020044276W WO 2021107114 A1 WO2021107114 A1 WO 2021107114A1
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Prior art keywords
lead terminal
metal layer
wiring substrate
conductor
view
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PCT/JP2020/044276
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English (en)
French (fr)
Japanese (ja)
Inventor
山本　誠
純一 皆越
Original Assignee
京セラ株式会社
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Publication date
Application filed by 京セラ株式会社 filed Critical 京セラ株式会社
Priority to CN202080080364.9A priority Critical patent/CN114730741A/zh
Priority to US17/780,681 priority patent/US20230009571A1/en
Priority to JP2021561560A priority patent/JP7206418B2/ja
Publication of WO2021107114A1 publication Critical patent/WO2021107114A1/ja

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/02002—Arrangements for conducting electric current to or from the device in operations
    • H01L31/02005—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier
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    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/047—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01S3/00—Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
    • H01S3/10—Controlling the intensity, frequency, phase, polarisation or direction of the emitted radiation, e.g. switching, gating, modulating or demodulating
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Definitions

  • the present disclosure relates to a wiring substrate, a semiconductor element storage package, and a semiconductor device.
  • Japanese Patent Publication No. 7-49732 discloses a lead terminal whose side surface is inclined in order to make it difficult for the bonding material pressed by the lead terminal to spread when the lead terminal is joined to a signal conductor or a ground conductor. ..
  • the wiring substrate according to the embodiment of the present disclosure includes a substrate having a first surface, at least one metal layer located on the first surface, at least one reed terminal located on the metal layer, and a metal layer. It is located in, and is provided with a bonding material for connecting the lead terminal and the metal layer.
  • the lead terminal has a first portion in contact with the bonding material and a second portion continuous with the first portion.
  • the first part has two concave curved surfaces on the metal layer side with a vertical straight line passing through the center in a cross-sectional view orthogonal to the longitudinal direction of the lead terminal.
  • the semiconductor element storage package includes a wiring substrate having the above-described configuration, a substrate having a mounting surface, and a frame body located so as to surround the mounting surface.
  • the frame has a fitting portion that penetrates inside and outside in the direction along the mounting surface.
  • the wiring substrate is positioned so as to be fitted with the fitting portion.
  • the semiconductor device includes a semiconductor device storage package having the above-described configuration, and a semiconductor device located in a mounting portion and electrically connected to a signal conductor and a ground conductor.
  • FIG. It is a top perspective view of the semiconductor element accommodating package which concerns on one Embodiment of this disclosure. It is a bottom perspective view of the semiconductor element accommodating package shown in FIG. It is a bottom view of the semiconductor element accommodating package shown in FIG. It is a top perspective view of the main part of the wiring substrate which concerns on one Embodiment of this disclosure. It is a top view of FIG. It is a side view of the lead terminal of the wiring substrate which concerns on one Embodiment of this disclosure. It is a side view of the lead terminal of the wiring substrate which concerns on one Embodiment of this disclosure. It is a side view of the lead terminal of the wiring substrate which concerns on one Embodiment of this disclosure. It is a side view of the lead terminal of the wiring substrate which concerns on one Embodiment of this disclosure. It is a side view of the lead terminal of the wiring substrate which concerns on one Embodiment of this disclosure.
  • FIG. 5 is an enlarged cross-sectional view showing a cross section of the wiring substrate shown in FIG. 7 in IX-IX. It is sectional drawing of the main part of the wiring substrate which concerns on one Embodiment of this disclosure.
  • 6A to 6D are examples of cross-sectional views taken along the line XX of the lead terminals shown in FIGS. 6A to 6D.
  • 6A to 6D are examples of cross-sectional views taken along the line XX of the lead terminals shown in FIGS. 6A to 6D.
  • 6A to 6D are examples of cross-sectional views taken along the line XX of the lead terminals shown in FIGS. 6A to 6D.
  • 6A to 6D are examples of cross-sectional views taken along the line XX of the lead terminals shown in FIGS. 6A to 6D.
  • FIG. 1 is a perspective view of the semiconductor element storage package 100 according to the embodiment of the present disclosure, and is a top perspective view of the wiring substrate 1 as viewed from the first surface 11 side.
  • FIG. 2 is a bottom perspective view of the semiconductor element storage package 100 shown in FIG.
  • FIG. 3 is a bottom view of the semiconductor element storage package 100 shown in FIG.
  • FIG. 4 is a top perspective view of a main part of the wiring substrate 1 according to the embodiment of the present disclosure.
  • FIG. 5 is a top view of FIG. 7 and 8 are side views of a main part of the wiring substrate 1 according to the embodiment of the present disclosure.
  • the metal layer 20 dots are shaded in order to make it easier to visually distinguish the substrate 10, the metal layer 20, the bonding material 30, and the lead terminal 40. doing.
  • the wiring substrate 1 includes a substrate 10, a metal layer 20, a bonding material 30, and a lead terminal 40.
  • the substrate 10 may be made of a dielectric material.
  • the dielectric material includes, for example, a ceramic material such as an aluminum oxide sintered body, a mulite sintered body, a silicon carbide sintered body, an aluminum nitride material sintered body or a silicon nitride material sintered body, or a glass ceramic. Materials can be used.
  • the substrate 10 may be a laminate of dielectric materials.
  • the layer of the dielectric material constituting the substrate 10 may be referred to as an insulating layer.
  • the substrate 10 has a first surface 11.
  • the shape of the substrate 10 is, for example, rectangular or U-shaped in a plan view toward the first surface 11, the size thereof is 2 mm ⁇ 2 mm to 25 mm ⁇ 50 mm, and the height is in the range of 1 mm to 10 mm. May be good.
  • the sizes of the substrate 10 and the first surface 11 can be appropriately set.
  • At least one metal layer 20 is located on the first surface 11, and the metal layer 20 may be either a signal conductor 21 or a ground conductor 22.
  • the metal layer 20 may be either a signal conductor 21 or a ground conductor 22.
  • the signal conductor 21 extends toward the outside of the substrate 10 starting from the inside of the first surface 11 in a plan view with respect to the first surface 11.
  • the direction in which the signal conductor 21 extends is defined as the first direction in the present specification.
  • the signal conductor 21 in the present disclosure is a transmission line through which a high frequency signal (for example, 10 to 100 GHz) is transmitted.
  • the lead terminal 40 connected to the signal conductor 21 is a first lead terminal 401, and the first lead terminal 401 functions as a signal terminal.
  • the shape of the signal conductor 21 is, for example, a rectangle, the width orthogonal to the first direction is 0.05 mm to 2 mm, the length along the first direction is 0.5 mm to 20 mm, and the thickness is 0.01 mm to 0. It may be 1 mm.
  • the shape of the signal conductor 21 is not limited to a rectangle, and can be appropriately set together with the width, length, and thickness.
  • the ground conductor 22 connected to the ground potential may be located on the first surface 11.
  • the ground conductor 22 may have a first region 221 that is a portion along the signal conductor 21.
  • the lead terminal 40 connected to the ground conductor 22 is a second lead terminal 402, and the second lead terminal 402 functions as a ground terminal.
  • the first region 221 may have a width of 0.05 mm to 3 mm, a length of 0.5 mm to 20 mm, and a thickness of 0.01 mm to 0.1 mm.
  • the shape of the first region 221 of the ground conductor 22 is not limited to a rectangle, and can be appropriately set together with the width, length, and thickness.
  • the gap between the signal conductor 21 and the ground conductor 22 can be widened, and the effective dielectric constant can be lowered.
  • a plurality of signal conductors 21 and ground conductors 22 may be provided, and may be arranged alternately or so as to be differential.
  • the differential means that the ground conductor 22, the signal conductor 21, the signal conductor 21, and the ground conductor 22 are arranged in this order in a plan view.
  • the wiring substrate 1 having a configuration in which the signal conductor 21 and the ground conductor 22 are arranged so as to be differential has high noise resistance.
  • the ground conductor 22 may further have a second region 222 that is connected to the first region 221 along the signal conductor 21 and includes the first region 221 and surrounds the signal conductor 21.
  • the wiring substrate 1 having the second region 222 has a wide region that functions as a ground, and therefore has high high frequency characteristics.
  • the signal conductor 21 and the ground conductor 22 may be a metallized layer formed on the first surface 11.
  • the metallized layer is made of a metal material such as tungsten, molybdenum and manganese, and may be further nickel-plated or gold-plated.
  • the signal conductor 21 or the ground conductor 22 and the lead terminal 40 may be connected by a joining material 30.
  • the bonding material 30 is, for example, a solder or a brazing material, and an AgCu alloy or an AuSn alloy can be used.
  • the recess 12 may be located between the signal conductors 21, or the recess 13 may be located between the signal conductor 21 and the ground conductor 22.
  • the space formed by the recesses 12 and 13 is air or the like having a smaller relative permittivity than the dielectric material of the substrate 10, and the effective permittivity in the vicinity of the signal conductor 21 is lowered, so that impedance matching can be easily performed. Therefore, the wiring substrate 1 having the configurations of the recesses 12 and 13 has high frequency characteristics of the high frequency signal.
  • the shapes of the recesses 12 and 13 are not particularly limited, but in order to increase the area, the inner wall may be tapered or reversely tapered in a cross-sectional view orthogonal to the first direction.
  • the shapes of the recesses 12 and 13 are tapered or reversely tapered, the effective permittivity in the vicinity of the wiring conductors (signal conductor 21 and ground conductor 22) is further lowered, so that impedance matching can be easily performed. Therefore, the wiring substrate 1 having such a configuration has a high frequency characteristic of a high frequency signal.
  • the recesses 12 and 13 may have a rectangular shape in a plan view toward the first surface 11. Further, the recesses 12 and 13 may have a semicircular shape or a semicircular shape. In the wiring substrate 1 in which the recesses 12 and 13 have a semicircular shape or a semicircular shape, stress is unlikely to be concentrated on the ends of the recesses 12 and 13, so that there is little possibility that cracks will occur at the ends. Further, as shown in FIG. 5, the recesses 14 may be further provided at the ends of the recesses 12 and 13 in a plan view toward the first surface 11. When the recess 14 is further provided, the effective dielectric constant in the vicinity of the signal conductor 21 is further lowered, so that impedance matching can be easily performed. Therefore, the wiring substrate 1 having such a configuration has a high frequency characteristic of a high frequency signal.
  • the recess 14 may have a rectangular shape in a plan view toward the first surface 11. Further, the recess 14 may have a semicircular shape or a semicircular shape. When the recess 14 has a semicircular shape or a semicircular shape, the wiring substrate 1 is less likely to have cracks at the end of the recess 14.
  • FIGS. 6A to 6D are side views of the lead terminal 40.
  • the metal layer 20 and the base 10 are shown by alternate long and short dash lines so that the positional relationship between the lead terminal 40 and the metal layer 20 of the wiring base 1 can be easily understood.
  • FIG. 9A is an enlarged cross-sectional view of the wiring substrate 1 shown in FIG. 7 along the IX-IX line.
  • FIG. 9B is an enlarged cross-sectional view showing a cross section of the wiring substrate 1 similar to that of FIG. 9A.
  • 10A to 10D are examples of cross-sectional views taken along line XX of the lead terminals shown in FIGS. 6A to 6D.
  • 11A to 11D are examples of cross-sectional views of the lead terminals shown in FIGS.
  • FIGS. 6A to 6D on the XI-XI line. 12A and 12B are examples of cross-sectional views taken along the line XII-XII of the lead terminals shown in FIGS. 6A to 6D.
  • FIG. 13 is an enlarged cross-sectional view showing a cross section of the wiring substrate 1 similar to that of FIG. 9A. The connection portion between the first lead terminal 401 and the signal conductor 21 is shown above, and the connection portion between the second lead terminal 402 and the ground conductor 22 is shown below.
  • the lead terminal 40 is a member for electrically connecting to an external electric circuit board or the like.
  • the lead terminal 40 may be connected to the signal conductor 21 or the ground conductor 22 along the first direction via the bonding material 30.
  • the adjacent signal conductors 21 or ground conductors 22 can be electrically insulated from each other, and electromagnetic coupling can be suppressed.
  • the adjacent lead terminals 40 are electrically insulated from each other, and external electricity is suppressed in a state where electromagnetic coupling is suppressed. It can be electrically connected to the circuit board.
  • the lead terminal 40 of the wiring substrate 1 is continuous with the first part 41 in contact with the bonding material 30 and the first part 41. It has a second part 42 and the like.
  • the first portion 41 leads to the metal layer 20 side in a cross-sectional view orthogonal to the longitudinal direction of the lead terminal 40. It has two concave curved surfaces 411 with the center of the terminal 40 in the lateral direction (width direction) interposed therebetween.
  • a virtual center line L passing through the center of the width of the lead terminal 40 is shown by a chain double-dashed line.
  • This center line L is also a vertical straight line perpendicular to the metal layer 20.
  • the concave curved surface 411 is convex toward the center of the lead terminal 40.
  • the concave curved surface 411 is an inner surface of a notched portion cut out from the middle (side surface) of the lead terminal 40 in the thickness direction to the surface facing the metal layer 20.
  • the contact area (bonding area) between the lead terminal 40 and the bonding material 30 becomes large, so that the bonding strength between the lead terminal 40 and the metal layer 20 increases. Further, since the joining surface between the lead terminal 40 and the joining material 30 is not flat and the joining material 30 is joined in a form of biting into the lead terminal 40, the joining strength between the lead terminal 40 and the joining material 30 is high. It becomes.
  • the concave curved surface 411 is a curved surface, the fillet of the joining material 30 is likely to be formed in the first portion 41. Then, the formed fillet tends to have a shape that is thick and difficult to spread outward. As a result, the bonding material 30 is less likely to spread on the metal layer 20, so that the thermal stress generated between the lead 41 and the metal layer 20 via the bonding material 30 is reduced. Therefore, the wiring substrate 1 having the concave curved surface 411 has few cracks.
  • the concave curved surface 411 can be formed by, for example, an etching process described later.
  • the joint surface with the joint material is a portion where the joint material 30 rises on the side surface.
  • the concave curved surface 411 is a quarter arc.
  • the area of the concave curved surface 411 is 1 of the joint surface when the cross section is rectangular. It will be more than 5.5 times. That is, when the joining material 30 is joined to the entire surface of the concave curved surface 411 as shown in FIG.
  • the joining area of the concave curved surface 411 is 1.5 times or more that of the rectangular curved surface 411. Further, as shown in FIG. 9B, the joining material 30 does not have to be joined to the entire surface of the concave curved surface 411. Even in this case, if the joining material 30 is joined with 2/3 or more of the arc length of the concave curved surface 411, the joining area is larger than the joining area when the cross-sectional shape is rectangular. Then, as described above, when the joining material 30 is joined to the curved surface, the joining strength between the lead terminal 40 and the joining material 30 becomes high, and the joining material 30 becomes more difficult to spread on the metal layer 20.
  • the lead terminal 40 may extend with the first direction as the longitudinal direction.
  • the first part 41 and the second part 42 are continuously located in the longitudinal direction of the lead terminal 40.
  • the size of the lead terminal 40 may be, for example, a length of 0.5 mm to 10 mm in the longitudinal direction, a length of 0.05 mm to 2 mm in the lateral direction, and a height of 0.05 mm to 1 mm.
  • the length of the first part 41 can be about the same as the length of the first region 221 of the signal conductor 21 and the ground conductor 22 to which the lead terminal 40 is joined.
  • the concave curved surface 411 may have a constant radius of curvature as in the example shown in FIG. 10A, or may not have a constant radius of curvature as in the example shown in FIG.
  • the radius of curvature can be, for example, 0.02 mm to 0.6 mm.
  • the maximum depth of the lead terminal 40 of the concave curved surface 411 from the surface facing the metal layer 20 can be 60% or less of the height of the lead terminal 40.
  • the curvatures of the two concave curved surfaces 411 of the lead terminal 40 may be the same as each other, or may be different within the range of variation in processing accuracy. Further, the two concave curved surfaces 411 may be located on the line target with the center line L passing through the center in the lateral direction (width direction). When the two concave curved surfaces 411 have a configuration in which they are located in line with each other, the fillet shape of the joining member 30 located sandwiched in the width direction of the lead terminal 40 becomes stable and about the same.
  • the bonding strength between the lead terminal 40 and the metal layer 20 becomes about the same on both sides in the width direction of the lead terminal 40, and for example, peeling of the bonding material 30 starting from the one having the smaller strength is less likely to occur. .. Therefore, the wiring substrate 1 is less likely to have functional defects such as peeling of the bonding material 30 and pseudo contact.
  • the two concave curved surfaces 411 may be deviated from the line target with the vertical straight line in between, within the range of variation in the processing accuracy of the lead terminal 40.
  • the shape of the second part 42 in a cross-sectional view orthogonal to the longitudinal direction of the lead terminal 40 may be the same as the shape of the first part 41. Further, as shown in FIGS. 12A and 12B, the shape of the second part 42 in the cross-sectional view orthogonal to the longitudinal direction of the lead terminal 40 may be different from the shape of the first part 41. Specifically, it may have a rectangular shape, a circular shape, or an elliptical shape. In other words, the lead terminal 40 may have the same cross-sectional shape as the lead terminal 40 before the concave curved surface 411 is formed by etching or the like.
  • the cross-sectional shape of the second part 42 may be a shape that does not have the concave curved surface 411 of the first part 41.
  • the cross-sectional shape of the first part 41 may be the shape shown in FIG. 10A
  • the cross-sectional shape of the second part 42 may be the shape shown in FIG. 12A.
  • the cross-sectional shape of the first part 41 may be the shape shown in FIG. 10C
  • the cross-sectional shape of the second part 42 may be the shape shown in FIG. 12B.
  • the cross-sectional shape of the second part 42 has a structure different from the cross-sectional shape of the first part 41 as described above, it becomes difficult for the joining member 30 located on the concave curved surface 411 to enter the second part 42. As a result, the fillet shape of the bonding material 30 is stabilized. Therefore, the wiring substrate 1 having such a configuration has few functional defects such as peeling of the bonding material 30 and pseudo contact.
  • the wiring substrate 1 having such a configuration has a small transmission loss of high frequency signals.
  • the first part 41 may further have a portion A414 on the second part 42 side, which is located at an angle with respect to the first surface 11.
  • the portion A is tilted so that the second portion 42 side is separated from the first surface 11 (metal layer 20).
  • the portion A414 may be tilted at an angle of 1 ° to 45 ° with respect to the first surface 11.
  • the lead terminal 40 has the portion A414, when the semiconductor element storage package 100 is mounted on a printed board or the like, the stress generated between the semiconductor element storage package 100 and the printed board is applied to the portion of the lead terminal 40. It can be alleviated by A414. Further, at least one portion of the portion A414 may be positioned so as to overlap the metal layer 20 in a plan view toward the first surface 11, and the bonding material 30 may connect the portion A414 and the metal layer 20. As a result, the bonding material 30 is also located between the metal layer 20 and the portion A414, so that the fillet of the bonding material 30 is easily formed in the first portion 41 in this portion as well, and the bonding material 30 is made of metal. It becomes more difficult to spread on the layer 20. As a result, the occurrence of cracks due to the thermal stress of the expanded bonding material 30 is reduced. Therefore, the wiring substrate 1 having such a configuration has few cracks.
  • the first part 41 may be composed of only the part A414 as in the example shown in FIGS. 6B and 6C.
  • the inclination angle of the portion A414 with respect to the first surface may be constant in the length direction as shown in FIG. 6B, or may be changed in the middle of the length direction as shown in FIG. 6C.
  • the inclination angle with respect to the first surface 11 is larger on the second part 42 side than on the opposite side, but on the second part 42 side is smaller than the opposite side. There may be.
  • the first part 41 may further have a first side 412 on the metal layer 20 side in a cross-sectional view orthogonal to the longitudinal direction of the lead terminal 40.
  • the lead terminal 40 can stand on the metal layer 20 independently. In other words, the lead terminal 40 can be stably placed on the metal layer 20. Therefore, the lead terminal 40 is positioned at a predetermined position, and the metal layer 20 and the lead terminal 40 can be easily joined by the joining material 30.
  • the wiring base 1 having such a configuration has a small transmission loss of high frequency signals due to the misalignment of the lead terminals 40 on the wiring base 1.
  • the first side 41 is a surface of the lead terminal 40 facing the metal layer 20 in the first portion 41.
  • first side 41 it can also be said to be a surface located between two concave curved surfaces 411. If this surface (first side 41) is not provided, for example, if two concave curved surfaces 411 are connected to form a convex angle, the two concave curved surfaces are viewed in cross section orthogonal to the longitudinal direction of the lead terminal. It has a cross-sectional shape with vertices (corners) formed by connecting 411s. In such a case, when the lead terminal 40 is placed on the metal layer 20, it tends to roll in the lateral direction of the lead terminal 40, and the position of the lead terminal 40 tends to shift.
  • the first side 412 may be continuous with the concave curved surface 411. Further, the first side 412 may have a linear shape or a curved shape. In other words, if the lead terminal 40 before forming the concave curved surface 411 by etching or the like has a rectangular parallelepiped shape, for example, the first side 412 may be a straight line. Further, if the lead terminal 40 before forming the concave curved surface 411 by etching or the like has a cylindrical shape, the first side 412 may be curved. The length of the first side 412 may be 1 mm or less.
  • the length of the first side 412 becomes the length of the first side 412 toward the longitudinal direction.
  • the length may be set to be short.
  • the first part 41 may further have a wide part 413 located over the first side 412, as shown in FIGS. 10B, 10D, 11B, and 11D, for example.
  • the wide portion 413 When the wide portion 413 is provided, the strength of the lead terminal 40 can be increased, so that the wiring substrate 1 can reduce functional defects such as breakage of the lead terminal 40, for example. Further, when the wide portion 413 is provided, it is possible to reduce excessive deformation when the lead terminal 40 is bent, so that the variation in the shape of the lead terminal 40 in the wiring substrate 1 can be reduced. Therefore, the wiring substrate 1 having the wide portion 413 has a small transmission loss of high frequency signals due to variations in shape.
  • the wide portion 413 is a portion located between the two concave curved surfaces 411, and is a portion in which the width increases from the inside of the lead terminal 40 to the first side 412. In other words, the wide portion 413 is a portion where the distance between the two concave curved surfaces 411 increases toward the first side 412.
  • the width W1 of the first side 412 of the first lead terminal 401 connected to the signal conductor 21 is the width of the first side 412 of the second lead terminal 402 connected to the ground conductor 22. It may be shorter than the length of W2. As a result, when the width of the signal conductor 21 is narrowed in order to lower the effective dielectric constant, the bonding material 30 does not easily flow into the recesses 12 and 13. Therefore, the wiring substrate 1 having such a configuration has few cracks.
  • the width of the first side 412 of the first lead terminal 401 is defined as W1. Also. In the present specification, the width of the first side 412 of the second lead terminal 402 is defined as W2. Further, the difference in width between W1 and W2 may be set according to the difference in width between the signal conductor 21 and the ground conductor 22.
  • the first part 41 does not have to have the first side 412. In other words, it may have an apex formed by connecting two concave curved surfaces 411 in a cross-sectional view orthogonal to the longitudinal direction of the lead terminal 40.
  • the amount of the bonding material 30 located in the first portion 41 increases, so that the bonding strength increases.
  • the joining material 30 can sufficiently penetrate the concave curved surface 411, the shape of the fillet of the joining material 30 is stabilized. Therefore, the wiring substrate 1 having the apex of the first portion 41 has few functional defects such as peeling of the bonding material 30 and pseudo contact.
  • the vertices may be located on the vertical line. The apex may be deviated from the vertical line to the left or right within the range of variation in the processing accuracy of the lead terminal 40.
  • the lead terminal 40 may have a linear shape (columnar shape) extending linearly with the first direction as the longitudinal direction.
  • the wiring substrate 1 can be formed with a short length of the lead terminal 40, so that the high frequency characteristic is high. Further, since the lead terminal 40 has a low profile, the wiring substrate 1 also has a low profile.
  • the internal grounding conductor may be located inside the substrate 10 or between the insulating layers.
  • the internal ground conductor may be located parallel to the metal layer 20.
  • the internal ground conductor has a ground potential and may be electrically connected to the ground conductor 22.
  • the wiring substrate 1 having such a configuration has a wide region that functions as a ground, and therefore has high high frequency characteristics.
  • the penetrating conductor for example, a metal material such as tungsten, molybdenum and manganese can be used.
  • the internal ground conductor may be a metallized layer formed on the insulating layer.
  • the metallized layer is made of, for example, a metal material such as tungsten, molybdenum, and manganese, and the surface of the metallized layer located on the surface of the substrate 10 may be nickel-plated or gold-plated.
  • the length of the penetrating conductor may be 0.1 mm to 0.5 mm. With this length, the resistance value of the through conductor can be suppressed.
  • the wiring substrate 1 having such a configuration has a small transmission loss of high frequency signals.
  • the metal layer 20 may be located on another surface facing the side opposite to the first surface 11.
  • the metal layer 20 may be a plurality of connecting conductors 23 that are electrically connected to the semiconductor element 70.
  • Each of the plurality of connecting conductors 23 may be electrically connected to the signal conductor 21 or the grounding conductor 22 via a wiring conductor located inside the substrate 10.
  • the connecting conductor 23 may be a metallized layer similar to the signal conductor 21 or the like, and the surface thereof may be nickel-plated or gold-plated.
  • the wiring substrate 1 includes a substrate 10, a metal layer 20, a bonding material 30, and a lead terminal 40.
  • a method for producing the substrate 10 will be described.
  • the substrate 10 is made of, for example, a plurality of insulating layers made of an aluminum oxide-like sintered body
  • the substrate 10 is manufactured as follows. First, an appropriate organic binder, solvent, etc. are added and mixed with raw material powders such as aluminum oxide and silicon oxide to prepare a slurry. Next, a plurality of ceramic green sheets are produced by molding the slurry into a sheet by a molding method such as a doctor blade method. At this time, cutouts to be recesses 12, 13 and 14 may be formed in a part of the green sheet.
  • the metal layer 20 that is, the signal conductor 21, the grounding conductor 22, the internal grounding conductor, and the connecting conductor 23 is made of a metallized layer made of a metal having a high melting point such as tungsten, molybdenum, or manganese
  • the following is performed.
  • the ceramic green sheets on which these metal pastes are printed are laminated and pressure-bonded, and simultaneously fired.
  • the metallized layer is adhered to the first surface 11 of the substrate 10, the inner layer of the substrate 10 and other surfaces as the signal conductor 21, the grounding conductor 22, the internal grounding conductor and the connecting conductor 23.
  • the metallized layer can also be formed on the inner surface and the bottom surface of the recess 12, 13 or the recess 14.
  • each conductor may be provided with nickel plating or gold plating on the surface.
  • a through hole is provided in a ceramic green sheet to be a plurality of insulating layers, and the through hole is filled with the same metal paste as for forming each conductor, and each ceramic green sheet is formed. It can be provided by laminating, crimping, and firing at the same time.
  • the through hole can be formed by, for example, a mechanical punching process using a metal pin or a drilling process such as a process using a laser beam.
  • a means such as vacuum suction may be used in combination to facilitate the filling of the metal paste.
  • the lead terminal 40 can be formed into a desired shape by etching or die pressing. Etching is a processing method that removes parts other than the masked corrosion prevention part with a corrosive liquid, and by corroding a part of the lead terminal, a concave curved surface 411, a first side 412, a wide part 413, etc. are formed. , The lead terminal 40 is processed into a desired shape. When the first part 41 has the portion A414, a lead is obtained by performing a bending process after etching.
  • the curvature of the concave curved surface 411 can be set by adjusting the etching time and the amount of the chemical applied when performing the etching process.
  • the lead terminal 40 is punched out, and then the die is used for machining.
  • the concave curved surface 411, the first side 412, the wide portion 413, and the like are formed by laser processing, and the lead terminal 40 is processed into a desired shape. Further, in the case of die press processing, the order of bending processing and laser processing may be reversed. It is also possible to process a concave curved surface 411 or the like by mold processing.
  • a metal layer 20 is formed on the base 10, and the lead terminal 40 is joined to the metal layer 20 (signal conductor 21 and ground conductor 22) by the bonding material 30 to become the wiring base 1.
  • the bonding material 30 For example, by arranging a paste or foil-like preform of solder or brazing material to be the bonding material 30 between the metal layer 20 and the lead terminal 40 and heating at a predetermined temperature, the metal layer 20 and the lead terminal are heated. 40 can be joined with the joining material 30.
  • the semiconductor element accommodating package 100 shown in FIGS. 1 to 3 includes a wiring substrate 1, a substrate 50, and a frame body 60.
  • the substrate 50 has a mounting surface 51.
  • the substrate 50 may have, for example, a rectangular shape in a plan view. Further, in the case of a rectangular shape, the size in a plan view may be 5 mm ⁇ 10 mm to 50 mm ⁇ 50 mm, and the height (thickness) may be 0.3 mm to 20 mm.
  • the mounting surface has, for example, the same shape as the substrate 50, and may have a rectangular shape in a plan view. Further, in the case of a rectangular shape, the size in a plan view may be 5 mm ⁇ 10 mm to 50 mm ⁇ 50 mm.
  • the size of the substrate 50 and the size of the mounting surface 51 can be appropriately set.
  • the substrate 50 is made of, for example, a metal such as iron, copper, nickel, chromium, cobalt, molybdenum or tungsten, or an alloy of these metals, for example, a copper-tungsten alloy, a copper-molybdenum alloy, an iron-nickel-cobalt alloy, or the like. Can be used. By subjecting such a metal material ingot to a metal processing method such as a rolling process or a punching process, a metal member constituting the substrate 50 can be produced.
  • a metal such as iron, copper, nickel, chromium, cobalt, molybdenum or tungsten
  • an alloy of these metals for example, a copper-tungsten alloy, a copper-molybdenum alloy, an iron-nickel-cobalt alloy, or the like.
  • the frame body 60 is located so as to surround the mounting surface 51.
  • the frame body 60 may have, for example, a rectangular shape or a U-shape in a plan view toward the mounting surface 51, a size of 5 mm ⁇ 10 mm to 50 mm ⁇ 50 mm, and a height in the range of 2 mm to 15 mm. .. Further, the thickness (width between the outer peripheral surface and the inner peripheral surface in a plan view) may be 0.5 mm to 2 mm.
  • the size of the frame body 60 can be set as appropriate.
  • the frame 60 is made of, for example, a metal such as iron, copper, nickel, chromium, cobalt, molybdenum or tungsten, or an alloy of these metals, for example, a copper-tungsten alloy, a copper-molybdenum alloy, an iron-nickel-cobalt alloy. Etc. can be used.
  • a metal processing method such as a rolling processing method or a punching processing method to such an ingot of a metal material, a metal member constituting the frame body 60 can be manufactured.
  • a fitting portion 61 into which the wiring base 1 is fitted is located on the side wall of the frame body 60.
  • the fitting portion 61 penetrates the inside and outside of the frame body 60 in the direction along the mounting surface 51. If the frame body 60 has a rectangular shape when viewed in a plan view toward the mounting surface 51, the fitting portion 61 may be positioned by cutting out a part of the frame body 60 in the height direction.
  • the part in the height direction means that, for example, 0.5 mm to 10 mm in the height direction may be cut out.
  • the shape of the fitting portion 61 in a plan view is U-shaped.
  • the frame body 60 is U-shaped when viewed in a plan view toward the mounting surface 51, a portion where the member forming the frame body 60 does not exist may be used as the joining portion 61.
  • the fitting portion 61 may have a shape in which the entire portion in the height direction is cut out with respect to one side of the frame body 60 which was rectangular when viewed in a plan view toward the mounting surface 51. ..
  • An insulating terminal made of an aluminum oxide sintered body that electrically connects the inside and the outside of the wiring substrate 1 and the semiconductor element storage package 100 described above is inserted and fixed in the fitting portion 61 and fitted. It is positioned so as to be fitted with the portion 61. That is, in the semiconductor element storage package 100, the wiring substrate 1 serves as an electrical input / output terminal.
  • the wiring substrate 1 has a U-shape in a plan view, overlaps with the fitting portion 61 in a plan view, and has an outer edge portion on three side surfaces of the frame body 60. It may protrude from.
  • the frame body 60 and the wiring base 1 may be joined by a joining material such as a brazing material.
  • the substrate 50 may be bonded to the frame body 60 and the wiring substrate 1 with a bonding material such as a brazing material.
  • One opening of the frame body 60 may be closed by the wiring substrate 1 and the substrate 50 to form a box-shaped semiconductor element accommodating package 100 capable of accommodating the semiconductor element 70.
  • the semiconductor device 1000 shown in FIG. 14 includes a semiconductor element accommodating package 100 and a semiconductor element 70.
  • the semiconductor element 70 is located on the mounting surface 51 of the substrate 50 and is electrically connected to the signal conductor 21 and the ground conductor 22.
  • the semiconductor element 70 may be fixed to the mounting surface 51 with a joining member such as a solder or a brazing material. Then, by connecting the semiconductor element 70 (electrode) and the connecting conductor 23 of the wiring substrate 1 with a connecting member 90 such as a bonding wire, the semiconductor element 70, the signal conductor 21, and the grounding conductor 22 are electrically connected. You may.
  • the semiconductor element 70 may be, for example, a laser diode (LD: laser diode). Further, the semiconductor element 70 may be a photodiode (PD: Photodiode) or the like. When the semiconductor element 70 is an LD, a through hole 62 may be provided in the side wall of the frame body 60 to attach an optical fiber.
  • LD laser diode
  • PD photodiode
  • the lid 80 may be located at the upper end of the frame 60 and cover the semiconductor element storage package 100. At this time, the lid 80 may be joined to the frame 60 by a joining material such as a brazing material, or welded to the frame 60 to seal the semiconductor element storage package 100.
  • the lid 80 has a rectangular shape in a plan view, has a size of 5 mm ⁇ 10 mm to 50 mm ⁇ 50 mm, and has a thickness of 0.5 mm to 2 mm.
  • the lid 80 is a metal such as, for example, iron, copper, nickel, chromium, cobalt, molybdenum or tungsten, or an alloy of these metals, for example, a copper-tungsten alloy, a copper-molybdenum alloy, an iron-nickel-cobalt alloy. Etc. can be used.
  • the semiconductor device 1000 can be manufactured by mounting the semiconductor element 70 on the mounting surface 51 of the semiconductor element storage package 100 and electrically connecting the semiconductor element 70 and the wiring substrate 1 with, for example, a bonding wire or the like. it can.
  • Wiring base 10 Base 11: First surface 12: Recess 13: Recess 14: Recess 20: Metal layer 21: Signal conductor 22: Ground conductor 221: First region 222: Second region 23: Connection conductor 30: Join Material 40: Lead terminal 401: First lead terminal 402: Second lead terminal 41: First part 411: Concave curved surface 412: First side 413: Wide part 414: Part A 42: Part 2 50: Substrate 51: Mounting surface 60: Frame body 61: Fitting part 62: Through hole 70: Semiconductor element 80: Lid body 100: Semiconductor element storage package 1000: Semiconductor device

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
PCT/JP2020/044276 2019-11-28 2020-11-27 配線基体、半導体素子収納用パッケージ、および半導体装置 WO2021107114A1 (ja)

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CN202080080364.9A CN114730741A (zh) 2019-11-28 2020-11-27 布线基体、半导体元件容纳用封装件及半导体装置
US17/780,681 US20230009571A1 (en) 2019-11-28 2020-11-27 Wiring base, package for storing semiconductor element, and semiconductor device
JP2021561560A JP7206418B2 (ja) 2019-11-28 2020-11-27 配線基体、半導体素子収納用パッケージ、および半導体装置

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01164673U (US07652168-20100126-C00068.png) * 1988-05-07 1989-11-16
JP2003017609A (ja) * 2001-06-29 2003-01-17 Kyocera Corp 半導体素子収納用パッケージおよび半導体装置
JP2015060815A (ja) * 2013-09-20 2015-03-30 第一精工株式会社 電気コネクタの接合部材およびその製造方法

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JP4174823B2 (ja) * 2003-03-27 2008-11-05 サンケン電気株式会社 半導体発光装置
US7622796B2 (en) * 2005-09-13 2009-11-24 Alpha And Omega Semiconductor Limited Semiconductor package having a bridged plate interconnection
EP3477693A4 (en) * 2016-06-27 2019-06-12 NGK Electronics Devices, Inc. HIGH FREQUENCY CERAMIC SUBSTRATE AND HIGH FREQUENCY SEMICONDUCTOR ELEMENT HOUSING HOUSING
US20180166369A1 (en) * 2016-12-14 2018-06-14 Texas Instruments Incorporated Bi-Layer Nanoparticle Adhesion Film

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
JPH01164673U (US07652168-20100126-C00068.png) * 1988-05-07 1989-11-16
JP2003017609A (ja) * 2001-06-29 2003-01-17 Kyocera Corp 半導体素子収納用パッケージおよび半導体装置
JP2015060815A (ja) * 2013-09-20 2015-03-30 第一精工株式会社 電気コネクタの接合部材およびその製造方法

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US20230009571A1 (en) 2023-01-12

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