WO2021068671A1 - 一种滤波电路及提高滤波电路性能的方法和信号处理设备 - Google Patents

一种滤波电路及提高滤波电路性能的方法和信号处理设备 Download PDF

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WO2021068671A1
WO2021068671A1 PCT/CN2020/111343 CN2020111343W WO2021068671A1 WO 2021068671 A1 WO2021068671 A1 WO 2021068671A1 CN 2020111343 W CN2020111343 W CN 2020111343W WO 2021068671 A1 WO2021068671 A1 WO 2021068671A1
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resonators
resonator
series
filter circuit
circuit
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PCT/CN2020/111343
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English (en)
French (fr)
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庞慰
蔡华林
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天津大学
诺思(天津)微系统有限责任公司
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Publication of WO2021068671A1 publication Critical patent/WO2021068671A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46—Filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details

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  • This application relates to the technical field of circuit elements, and in particular to a filter circuit and a method and signal processing equipment for improving the performance of the filter circuit.
  • the transition band between various frequency bands is getting narrower and narrower.
  • the roll-off requirements of the filter are getting higher and higher.
  • the filter has the characteristics of high Q value, it has better roll-off and insertion loss advantages than LC (resonant circuit) and SAW (surface acoustic wave, surface acoustic wave filter), but with further performance requirements
  • LC resonant circuit
  • SAW surface acoustic wave, surface acoustic wave filter
  • the present application provides a filter circuit, a method for improving the performance of the filter circuit, and a signal processing device to improve the performance of the filter circuit.
  • an embodiment of the present application provides a filter circuit
  • the filter circuit includes: a plurality of resonators, the plurality of resonators include a first number of series resonators and a second number of parallel resonators, And the input end of the circuit is connected with a first inductance, the output end of the circuit is connected with a second inductance, and the ground end of the circuit is connected with a third inductance;
  • the first number of series resonators include at least A designated series resonator, the attribute parameters of the designated series resonator are different from those of other series resonators, and the structural parameters of the resonators split by the designated series resonator are different;
  • the attribute parameter includes: the frequency of the resonator.
  • the input end and the output end of the designated series resonator are respectively connected to the parallel resonator.
  • the designated series resonator is connected in series with a series resonator, it is connected to the parallel resonator respectively.
  • the two resonators split by the designated series resonator have a frequency difference and have unequal areas and/or shapes.
  • an embodiment of the present application provides a signal processing device, including: a signal input circuit, a signal output circuit, and the filter circuit as described in the first aspect; the signal input circuit is connected to the filter circuit, The filter circuit is connected to the signal output circuit.
  • inventions of the present application provide a method for improving the performance of a filter circuit.
  • the filter circuit includes a plurality of resonators, the plurality of resonators including a first number of series resonators and a second number of parallel resonances.
  • the input terminal of the circuit is connected with a first inductor
  • the output terminal of the circuit is connected with a second inductor
  • the ground terminal of the circuit is connected with a third inductor
  • At least one designated series resonator is set in the first number of series resonators, the attribute parameters of the designated series resonator are different from those of other series resonators, and the designated series resonator is split The structural parameters between the resonators are different;
  • the attribute parameter includes: the frequency of the resonator.
  • the method further includes: respectively connecting the input end and the output end of the designated series resonator to the parallel resonator.
  • the method further includes: connecting the designated series resonator with a series resonator in series, and then respectively connecting with the parallel resonator.
  • the method further includes: setting the two resonators split by the designated series resonator to have a frequency difference and have unequal areas and/or shapes.
  • the filter circuit, the method for improving the performance of the filter circuit, and the signal processing device provided by the embodiments of the present application are arranged such that the first number of series resonators include at least one designated series resonator, and the frequency of the designated series resonator is equal to The frequencies of other series resonators are different to achieve a significant improvement in the insertion loss and roll-off of the frequency wave circuit, thereby obtaining better performance than the filter circuit in the prior art.
  • FIG. 1 is a schematic diagram of the structure of a filter circuit in the prior art.
  • Fig. 2a is a schematic structural diagram of a first filter circuit shown in an exemplary embodiment of the present application
  • Fig. 2b is a schematic diagram of the impedance of the first filter circuit shown in an exemplary embodiment of the present application
  • Fig. 3 is a schematic structural diagram of a second filter circuit shown in an exemplary embodiment of the present application.
  • Fig. 4a is a schematic diagram showing the comparison result of the overall curves before and after the serial splitting shown in an exemplary embodiment of the present application;
  • FIG. 4b is a schematic diagram showing the comparison result of Rp at the Fp frequency before and after the series splitting according to an exemplary embodiment of the present application;
  • FIG. 4c is a schematic diagram showing a comparison result of Rs at Fs before and after serial splitting according to an exemplary embodiment of the present application
  • FIG. 4d is a schematic diagram showing the effect of adopting tandem splitting according to an exemplary embodiment of the present application.
  • Figure 5 is a schematic diagram of the resonator split.
  • FIG. 1 is a schematic diagram of the structure of a filter circuit in the prior art.
  • the filter circuit in the prior art includes a plurality of resonators, the plurality of resonators include a first number of series resonators 20 and a second number of parallel resonators 40, the figure includes 5
  • the series resonator 20 and the four parallel resonators 40 Take the series resonator 20 and the four parallel resonators 40 as an example, and the input end of the filter circuit is connected to the first inductor 10, the output end of the filter circuit is connected to the second inductor 30, and the ground end of the filter circuit is respectively connected to the third inductor.
  • Inductors 50, one end of each third inductance 50 is connected to the parallel resonator, and the other end is grounded.
  • Fig. 2a is a schematic structural diagram of a first filter circuit shown in an exemplary embodiment of the present application; referring to Fig. 2a, in a filter circuit provided in an embodiment of the present application, a designated series resonator 70 is provided. The input terminal and the output terminal of the designated series resonator 70 are respectively connected to the parallel resonator, and the frequency of the designated series resonator 70 is different from the frequencies of other series resonators.
  • FIG. 2b is a schematic diagram of the impedance of the first filter circuit shown in an exemplary embodiment of the present application.
  • FIG. 2b shows the relationship between the frequency and impedance of the combined resonator in Figure 2a.
  • the dashed line is the impedance diagram of the resonator in the prior art, and the solid line is the one proposed in this embodiment.
  • the impedance diagram of the combined structure For the series resonator, two high impedances are formed as zeros for out-of-band suppression. The position of the out-of-band zeros is earlier than the original prior art, which can improve the roll-off on the right side.
  • FIG. 3 is a schematic structural diagram of a second type of filter circuit shown in an exemplary embodiment of the present application; referring to FIG. 3, in this embodiment, the first number of series resonators includes a designated series resonator 70, which The frequency of the designated series resonator 70 is different from the frequencies of the other series resonators 20. And the two ends of the designated resonator 70 are respectively connected to the series resonator and the parallel resonator.
  • one end of the designated series resonator 70 is connected to a parallel resonator and a series resonator, and the other end of the designated series resonator is connected to only one series resonator.
  • the designated series resonator 70 (in bold) can be split by itself, or it can form a split structure together with the ordinary resonator on the right. That is, the two adjacent resonators are formed after splitting. There are two shown in the figure, but it can actually be divided into more than one.
  • the left side of the upper figure in the figure is a single resonator, the two upper ones on the right represent series splitting, and the lower one represents parallel splitting.
  • the area and frequency of the two resonators split in series and parallel are the same.
  • the area, frequency and even structure of the two resonators split in series and parallel can be different.
  • the number of splits is not limited to two, but can also be three or more than three.
  • the above-mentioned frequency difference between series resonators can be realized by adding additional metal layers or other mass load materials to the upper electrode of the split resonator.
  • the upper electrode of the designated series resonator electrode is provided with a second An additional metal layer or other mass load material.
  • the series splitting adjusts the frequency by changing the convex structure, the concave structure, the suspended wing structure or the mass load, and the frequency characteristics are changed by the other methods of adjusting the frequency.
  • This embodiment has the following positive effects: ensuring process manufacturing reliability; nonlinear splitting ensures better nonlinear performance of the device: power splitting, in high-power applications, multiple resonators will be used for splitting to reduce Power distribution; the layout layout is more flexible, which is conducive to making full use of the die area, reducing diesize, which can achieve a better filling of the chip space through the flexible design of the area, which is conducive to tighter arrangement, so it can make full use of the chip area. Help reduce chip costs.
  • the Q value distribution is affected by series splitting.
  • the specific effects can be seen in Figure 4a to Figure 4d, as follows:
  • Figure 4a is a schematic diagram of the comparison results of the overall curves before and after the series split. Except for the impedances at the Fs and Fp points, the remaining impedances are basically unchanged. Therefore, the actual splitting has no effect on the other performance of the filter.
  • the solid line is after splitting, the dashed line is before splitting, and most of the solid and dashed lines are overlapped.
  • Figure 4b is a schematic diagram of the comparison results of Rp at the Fp frequency before and after the series split. It can be seen from Figure 4b that after the series split, the Rp value is significantly improved, and the right side of the filter is also significantly improved. The solid line is after splitting, and the dashed line is before splitting.
  • Figure 4c is a schematic diagram of the comparison results of Rs at Fs before and after the series split. It can be seen from Figure 4c that after the series split, Rs also has a significant increase, and the increase of Rs has a certain deterioration on the left side of the passband.
  • the solid line is after splitting, and the dashed line is before splitting.
  • FIG. 4d is a schematic diagram of the effect of adopting tandem splitting. Tandem splitting improves Rp, and the increase of Rp improves the right side of the passband. When there is a higher index requirement on the right side of the filter, the required performance can be obtained by splitting in series.
  • An embodiment of the present invention also provides a signal processing device, including: a signal input circuit, a signal output circuit, and the filter circuit described in any of the above embodiments; the signal input circuit is connected to the filter circuit, and The filter circuit is connected to the signal output circuit.
  • the signal processing device provided in this embodiment has better roll-off and insertion loss performance, so the signal processing effect is better.
  • the filter circuit includes a plurality of resonators, and the plurality of resonators includes a first number of series resonators and a second number of parallel resonators.
  • a resonator, and the input terminal of the circuit is connected with a first inductor, the output terminal of the circuit is connected with a second inductor, and the ground terminal of the circuit is connected with a third inductor; the method includes:
  • the attribute parameter of the designated series resonator is different from the attribute parameters of the other series resonators;
  • the attribute parameter includes: the frequency of the resonator.
  • the first number of series resonators include at least one designated series resonator by setting the frequency of the designated series resonator to be different from the frequencies of other series resonators, so as to achieve a significant improvement in the frequency wave circuit
  • the insertion loss and the roll-off of the filter circuit are reduced, thereby obtaining better performance than the filter circuit in the prior art.
  • the method further includes: respectively connecting the input end and the output end of the designated series resonator to the parallel resonator.
  • the method further includes: connecting the designated series resonator with a series resonator in series, and then respectively connecting with the parallel resonator.
  • the method further includes: setting the designated series resonator and the adjacent series resonator to be connected in a series split mode of difference frequency unequal area.
  • the area of the electrode of the designated series resonator by setting the area of the electrode of the designated series resonator to be different from the area of the electrode of the series resonator connected in series, it is possible to better fill the space of the chip through the flexible design of the area, which is conducive to tighter arrangement. Therefore, the chip area can be fully utilized, which helps to reduce the chip cost.
  • the method further includes: providing a first additional metal layer on the upper electrode of the designated series resonator electrode.
  • a first additional metal layer is provided on the electrode of the designated series resonator to realize that the frequency of the designated series resonator is different from the frequencies of other series resonators in the existing filter circuit.

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  • Acoustics & Sound (AREA)
  • Filters And Equalizers (AREA)

Abstract

本申请提供一种滤波电路及提高滤波电路性能的方法和信号处理设备。其中，滤波电路包括：多个谐振器，所述多个谐振器包括第一数量的串联谐振器和第二数量的并联谐振器，并且所述电路的输入端连接有第一电感，所述电路的输出端连接有第二电感，所述电路的接地端连接有第三电感；所述滤波电路的第一数量的串联谐振器中包含有至少一个指定串联谐振器，所述指定串联谐振器的属性参数与其他所述串联谐振器的属性参数不同；所述属性参数包括：谐振器的频率。如此，可以改善滤波电路的插损和滚降。

Description

一种滤波电路及提高滤波电路性能的方法和信号处理设备 技术领域
本申请涉及电路元件技术领域，具体而言，涉及一种滤波电路及提高滤波电路性能的方法和信号处理设备。
背景技术
在无线通信系统中，由于对频段的利用率越来越高，各个频段之间的过渡带越来越窄。为了保证滤波器的插损以及对相邻频段的抑制，对滤波器的滚降要求越来越高。滤波器由于具有高Q值的特点，相比LC(谐振电路)和SAW((surface acoustic wave，声表面波滤波器)等有更好的滚降和插损优势，但是随着性能需求的进一步提高，仅仅依靠滤波器的高Q值优势难以获得更好的性能。因此，需要在电路拓扑结构上来改善滤波器的性能。
发明内容
有鉴于此，本申请提供一种滤波电路及提高滤波电路性能的方法和信号处理设备，以改善滤波电路的性能。
具体地，本申请是通过如下技术方案实现的：
第一方面，本申请实施例中提供了一种滤波电路，所述滤波电路包括：多个谐振器，所述多个谐振器包括第一数量的串联谐振器和第二数量的并联谐振器，并且所述电路的输入端连接有第一电感，所述电路的输出端连接有第二电感，所述电路的接地端连接有第三电感；所述第一数量的串联谐振器中包含有至少一个指定串联谐振器，所述指定串联谐振器的属性参数与其他所述串联谐振器的属性参数不同，以及所述指定串联谐振器拆分的谐振器之间的结构参数不同；
所述属性参数包括：谐振器的频率。
可选地，所述指定串联谐振器的输入端和输出端分别与并联谐振器相连接。
可选地，所述指定串联谐振器与一串联谐振器串联以后，再分别与并联谐振器 连接。
可选地，所述指定串联谐振器拆分的两个谐振器具有频率差且有不等的面积和/或形状。
第二方面，本申请实施例中提供了一种信号处理设备，包括：信号输入电路、信号输出电路和如第一方面所述的滤波电路；所述信号输入电路与所述滤波电路相连接，所述滤波电路与所述信号输出电路相连接。
第三方面本申请实施例提供了一种提高滤波电路性能的方法，所述滤波电路包括：多个谐振器，所述多个谐振器包括第一数量的串联谐振器和第二数量的并联谐振器，并且所述电路的输入端连接有第一电感，所述电路的输出端连接有第二电感，所述电路的接地端连接有第三电感；所述方法包括：
在所述第一数量的串联谐振器中设置至少一个指定串联谐振器，所述指定串联谐振器的属性参数与其他所述串联谐振器的属性参数不同，以及所述指定串联谐振器拆分的谐振器之间的结构参数不同；
所述属性参数包括：谐振器的频率。
可选地，所述方法还包括：将所述指定串联谐振器的输入端和输出端分别与并联谐振器相连接。
可选地，所述方法还包括：将所述指定串联谐振器与一串联谐振器串联以后，再分别与并联谐振器连接。
可选地，所述方法还包括：设置所述指定串联谐振器拆分的两个谐振器具有频率差且有不等的面积和/或形状。
本申请实施例所提供的一种滤波电路及提高滤波电路性能的方法和信号处理设备，设置使第一数量的串联谐振器中包含有至少一个指定串联谐振器，该指定串联谐振器的频率与其他串联谐振器的频率不同，以实现显著的改善率波电路的插损和滚降，进而得到相对于现有技术中的滤波电路更优的性能。
附图说明
图1是现有技术中的一种滤波电路的结构示意图。
图2a是本申请一示例性实施例示出的第一种滤波电路的结构示意图；
图2b是本申请一示例性实施例示出的第一种滤波电路的阻抗示意图；
图3是本申请一示例性实施例示出的第二种滤波电路的结构示意图；。
图4a是本申请一示例性实施例示出的串联拆分前后整体曲线的对比结果示意图；
图4b是本申请一示例性实施例示出的串联拆分前后Fp频率处的Rp的对比结果示意图；
图4c是本申请一示例性实施例示出的串联拆分前后Fs处的Rs对比结果示意图；
图4d是本申请一示例性实施例示出的采用串联拆分的效果示意图；
图5是谐振器拆分的示意图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。
图1是现有技术中的一种滤波电路的结构示意图。参照图1所示，现有技术中的滤波电路包括多个谐振器，该多个谐振器包括第一数量的串联谐振器20和第二数量的并联谐振器40，图中以包含有5个串联谐振器20和4个并联谐振器40为例，并且该滤波电路的输入端连接有第一电感10，滤波电路的输出端连接有第二电感30，滤波电路的接地端分别连接有第三电感50，每个第三电感50一端与并联谐振器连接，另一端接地。
图2a是本申请一示例性实施例示出的第一种滤波电路的结构示意图；参照图2a所示，在本申请实施例中提供的一种滤波电路中，设置一指定串联谐振器70，该指定串联谐振器70的输入端和输出端分别与并联谐振器连接，该指定串联谐振器70的频率与其他串联谐振器的频率不同。
进而本实施例中，通过设置第一数量的串联谐振器中包含有一个或多个具有不同频率的指定串联谐振器70来改善插损和滚降。以下结合图2b加以说明，图2b 是本申请一示例性实施例示出的第一种滤波电路的阻抗示意图。
参照图2b所示，该图2b示出的是图2a中的组合谐振器的频率和阻抗之间的关系，虚线是现有技术中的谐振器的阻抗图，实线是本实施例提出的组合结构的阻抗示意图，其中对于串联谐振器来说，形成的两个高阻抗作为带外抑制的零点，带外零点的位置相比原来现有技术提前，从而能够改善右侧滚降。
图3是本申请一示例性实施例示出的第二种滤波电路的结构示意图；参照图3所示，本实施例中，第一数量的串联谐振器中包含有一个指定串联谐振器70，该指定串联谐振器70的频率与其他串联谐振器20的频率不同。并且该指定谐振器70的两端点分别连接串联谐振器和并联谐振器。
具体的，参照图3所示，该指定串联谐振器70的一端连接并联谐振器和串联谐振器，该指定串联谐振器的另一端只连接一串联谐振器。
图3中，指定串联谐振器70(加粗的)可以是自己拆分，也可以和右边的普通谐振器共同组成一个拆分结构。即这两个挨着的谐振器是拆分后形成的。图上示出是两个，实际可以是拆成的多个。
参照图5所示，图中上图左边是单个谐振器，右边两个上面表示串联拆分，下面表示并联拆分。一般串联和并联拆分的两个谐振器的面积和频率是相同的，本申请中串联和并联拆分的两个谐振器的面积和频率甚至结构都是可以不同的。拆分的数量不限于2个，也可以是三个甚至三个以上。
上述串联谐振器之间的频率的差异可以是通过拆分的谐振器的上电极加入额外的金属层或者其他质量负载材料来实现，示例性的，在指定串联谐振器电极的上电极设有第一附加金属层或者其他质量负载材料。
可选的，串联拆分通过改变凸起结构，凹陷结构，悬翼结构或者质量负载来调节频率，包含其余的调节频率的方式改变频率特性。
本实施例具有以下积极效果：保证工艺制造可靠性；非线性拆分保证器件非线性性能较好：功率拆分，在高功率应用的时候，会使用多个谐振器来进行拆分来减小功率分布；版图布局更加灵活，有利于充分利用die面积，减小diesize，可以实现通过面积的灵活设计更好的填充芯片的空间，有利于更加紧密的排布，因此可以充分利用芯片面积，有助于降低芯片成本。
本申请实施例中通过串联拆分影响Q值分布，具体效果可以参见图4a-图4d所示，如下：
图4a是串联拆分前后整体曲线的对比结果示意图，除了Fs和Fp点的阻抗以外，其余的阻抗基本没有变化，因此实际拆分的时候，对滤波器其他性能没有影响。实线是拆分后，虚线是拆分前，其中实线与虚线大部分为重叠部分。
图4b是串联拆分前后Fp频率处的Rp的对比结果示意图，从图4b可以看出，串联拆分后，Rp值有显著的提高，对滤波器右侧也有较明显的改善。实线是拆分后，虚线是拆分前。
图4c是串联拆分前后Fs处的Rs对比结果示意图，从图4c可以看出，串联拆分后，Rs也有明显的提高，Rs的提高对通带左侧有一定的恶化。实线是拆分后，虚线是拆分前。
图4d是采用串联拆分的效果示意图，串联拆分改善了Rp，Rp的提高对通带右侧有改善。当滤波器右侧有较高的指标需求的时候，可以通过串联拆分来获得需要的性能。
本发明一实施例中还提供了一种信号处理设备，包括：信号输入电路、信号输出电路和上述任一实施例所述的滤波电路；所述信号输入电路与所述滤波电路相连接，所述滤波电路与所述信号输出电路相连接。
本实施例中提供的信号处理设备，由于具有更好滚降和插损性能，因此信号处理效果更佳。
本发明另一实施例中还提供了一种提高滤波电路性能的方法，所述滤波电路包括：多个谐振器，所述多个谐振器包括第一数量的串联谐振器和第二数量的并联谐振器，并且所述电路的输入端连接有第一电感，所述电路的输出端连接有第二电感，所述电路的接地端连接有第三电感；所述方法包括：
在所述第一数量的串联谐振器中设置至少一个指定串联谐振器，所述指定串联谐振器的属性参数与其他所述串联谐振器的属性参数不同；
所述属性参数包括：谐振器的频率。
本方法实施例中，通过设置使第一数量的串联谐振器中包含有至少一个指定串联谐振器，该指定串联谐振器的频率与其他串联谐振器的频率不同，以实现显著的 改善率波电路的插损和滚降，进而得到相对于现有技术中的滤波电路更优的性能。
可选地，所述方法还包括：将所述指定串联谐振器的输入端和输出端分别与并联谐振器相连接。
可选地，所述方法还包括：将所述指定串联谐振器与一串联谐振器串联以后，再分别与并联谐振器连接。
需要说明的是，本申请对上述指定串联谐振器的数量和位置关系不作限定。
可选地，所述方法还包括：设置所述指定串联谐振器与相邻串联谐振器采用差频不等面积串联拆分的方式连接。
本实施例中，通过设置指定串联谐振器的电极面积和与其串联的串联谐振器的电极的面积不同，可以实现通过面积的灵活设计更好的填充芯片的空间，有利于更加紧密的排布，因此可以充分利用芯片面积，有助于降低芯片成本。
可选地，所述方法还包括：在所述指定串联谐振器电极的上电极设有第一附加金属层。
本实施例中，通过在指定串联谐振器的电极上设置第一附加金属层，以实现使该指定串联谐振器的频率与现有滤波电路中的其他串联谐振器的频率不同。
以上所述仅为本申请的较佳实施例而已，并不用以限制本申请，凡在本申请的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本申请保护的范围之内。

Claims (9)

  1. 一种滤波电路，所述滤波电路包括：多个谐振器，所述多个谐振器包括第一数量的串联谐振器和第二数量的并联谐振器，并且所述电路的输入端连接有第一电感，所述电路的输出端连接有第二电感，所述电路的接地端连接有第三电感；其特征在于，所述第一数量的串联谐振器中包含有至少一个指定串联谐振器，所述指定串联谐振器的属性参数与其他所述串联谐振器的属性参数不同，以及所述指定串联谐振器拆分的谐振器之间的结构参数不同；
    所述属性参数包括：谐振器的频率。
  2. 根据权利要求1所述的滤波电路，其特征在于，所述指定串联谐振器的输入端和输出端分别与并联谐振器相连接。
  3. 根据权利要求1所述的滤波电路，其特征在于，所述指定串联谐振器与一串联谐振器串联以后，再分别与并联谐振器连接。
  4. 根据权利要求3所述的滤波电路，其特征在于，所述指定串联谐振器拆分的两个谐振器具有频率差且有不等的面积和/或形状。
  5. 一种信号处理设备，其特征在于，包括：信号输入电路、信号输出电路和如权利要求1-4任一所述的滤波电路；所述信号输入电路与所述滤波电路相连接，所述滤波电路与所述信号输出电路相连接。
  6. 一种提高滤波电路性能的方法，所述滤波电路包括：多个谐振器，所述多个谐振器包括第一数量的串联谐振器和第二数量的并联谐振器，并且所述电路的输入端连接有第一电感，所述电路的输出端连接有第二电感，所述电路的接地端连接有第三电感；其特征在于，所述方法包括：
    在所述第一数量的串联谐振器中设置至少一个指定串联谐振器，所述指定串联谐振器的属性参数与其他所述串联谐振器的属性参数不同，以及所述指定串联谐振器拆分的谐振器之间的结构参数不同；
    所述属性参数包括：谐振器的频率。
  7. 根据权利要求6所述的方法，其特征在于，所述方法还包括：将所述指定 串联谐振器的输入端和输出端分别与并联谐振器相连接。
  8. 根据权利要求6所述的方法，其特征在于，所述方法还包括：将所述指定串联谐振器与一串联谐振器串联以后，再分别与并联谐振器连接。
  9. 根据权利要求8所述的方法，其特征在于，所述方法还包括：设置所述指定串联谐振器拆分的两个谐振器具有频率差且有不等的面积和/或形状。
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