WO2021035516A1 - Structure semi-conductrice de capteur d'image et puce, et appareil électronique - Google Patents

Structure semi-conductrice de capteur d'image et puce, et appareil électronique Download PDF

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Publication number
WO2021035516A1
WO2021035516A1 PCT/CN2019/102744 CN2019102744W WO2021035516A1 WO 2021035516 A1 WO2021035516 A1 WO 2021035516A1 CN 2019102744 W CN2019102744 W CN 2019102744W WO 2021035516 A1 WO2021035516 A1 WO 2021035516A1
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WIPO (PCT)
Prior art keywords
pixel
image sensor
transistor
semiconductor structure
color filter
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PCT/CN2019/102744
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English (en)
Chinese (zh)
Inventor
陈经纬
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深圳市汇顶科技股份有限公司
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Priority to CN201980001729.1A priority Critical patent/CN110709992A/zh
Priority to PCT/CN2019/102744 priority patent/WO2021035516A1/fr
Publication of WO2021035516A1 publication Critical patent/WO2021035516A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14632—Wafer-level processed structures

Definitions

  • the present application relates to a semiconductor structure of an image sensor and related chips and electronic devices, and more particularly to a semiconductor structure of an image sensor that can increase the channel length of a source follower transistor, and related chips and electronic devices.
  • CMOS image sensors have been produced and applied on a large scale. With the improvement of image quality requirements, the number of pixels has become larger and larger. In order to increase the number of pixels in a limited area as much as possible, the size of the unit pixel should be reduced as much as possible. In other words, the size of the photosensitive sensor and the output circuit in the unit pixel will be reduced accordingly.
  • One of the objectives of the present application is to disclose a semiconductor structure of an image sensor and related chips and electronic devices to solve the above-mentioned problems.
  • An embodiment of the present application discloses a semiconductor structure of an image sensor.
  • the semiconductor structure of the image sensor includes a semiconductor substrate and a plurality of pixels arranged on the semiconductor substrate, wherein the plurality of pixels includes: A pixel and a second pixel. Both the first pixel and the second pixel include: at least one photosensitive sensor for converting light into electric charge; and an output circuit for generating pixel output according to the electric charge, the output
  • the circuit includes a source follower transistor and a row selection transistor.
  • a source/drain of the source follower transistor is electrically connected to a source/drain of the row selection transistor; Both the row selection transistor and the row selection transistor of the second pixel are located between the source follower transistor of the first pixel and the source follower transistor of the second pixel.
  • An embodiment of the present application discloses a chip including the semiconductor structure of the above-mentioned image sensor.
  • An embodiment of the present application discloses an electronic device including the semiconductor structure of the above-mentioned image sensor.
  • the embodiments of the present application improve the configuration of the output circuit of the semiconductor structure of the image sensor, which can reduce the area and improve the performance of the output circuit.
  • FIG. 1 is a top view of the first embodiment of the semiconductor structure of the image sensor of this application.
  • FIG. 2 is a top view of the second embodiment of the semiconductor structure of the image sensor of the application.
  • FIG. 3 is a circuit diagram of a pixel of the image sensor of FIG. 1 and FIG. 2.
  • Fig. 4 is a Bayer pixel group based on the semiconductor structure of the image sensor of Fig. 1.
  • FIG. 5 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 2.
  • FIG. 6 is a top view of the third embodiment of the semiconductor structure of the image sensor of this application.
  • FIG. 7 is a top view of the fourth embodiment of the semiconductor structure of the image sensor of this application.
  • Fig. 8 is a circuit diagram of a pixel of the image sensor of Figs. 6 and 7.
  • FIG. 9 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 6.
  • FIG. 10 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 7.
  • FIG. 11 is a schematic diagram of an embodiment in which the image sensor of this application is applied to an electronic device.
  • first and second features are in direct contact with each other; and may also include additional components are formed between the above-mentioned first and second features, so that the first and second features may not be in direct contact.
  • content of the present invention may reuse component symbols and/or labels in multiple embodiments. Such repeated use is based on the purpose of brevity and clarity, and does not in itself represent the relationship between the different embodiments and/or configurations discussed.
  • spatially relative terms here such as “below”, “below”, “below”, “above”, “above” and similar, may be used to facilitate the description of the drawing in the figure
  • the relationship between one component or feature relative to another component or feature is shown.
  • the original meaning of these spatially-relative vocabulary covers a variety of different orientations of the device in use or operation, in addition to the orientation shown in the figure.
  • the device may be placed in other orientations (for example, rotated 90 degrees or in other orientations), and these spatially-relative description vocabulary should be explained accordingly.
  • the application and demand of high-resolution and even ultra-high-resolution CMOS image sensors are becoming more and more extensive, and the size of the unit pixel must be reduced accordingly. That is to say, the size of the photosensitive sensor and the output circuit in the unit pixel must be reduced accordingly, and the output circuit
  • the effectiveness of the inevitably will encounter some impact. For example, when the channel length of the source follower transistor in the output circuit is reduced, the random telegraph signal noise will increase.
  • the semiconductor structure of the image sensor of the present application can reduce the area of the pixel and increase the output by changing the configuration of the output circuit. The source in the circuit follows the channel length of the transistor, thereby reducing random telegraph signal noise.
  • this application can also make the green pixels (Gr and Gb) in the same pixel group with the Bayer arrangement use the same reading circuit, so as to prevent the green pixels (Gr and Gb) from being caused by the reading circuit.
  • the difference between the green pixels (Gr and Gb) caused the image misalignment problem.
  • FIG. 1 is a top view of the first embodiment of the semiconductor structure of the image sensor of this application.
  • the image sensor 100 in FIG. 1 includes a pixel P1 and a pixel P2, and the pixel P1 and the pixel P2 together form a unit pixel group. It should be noted that although the image sensor 100 in FIG. 1 only shows the pixel P1 and the pixel P2, the image sensor 100 may include a plurality of the unit pixel groups.
  • FIG. 3 is a circuit diagram of the pixel P1 or the pixel P2 of the image sensor of FIG. 1. In this embodiment, the circuit diagram of the pixel P1 and the pixel P2 are the same.
  • the image sensor 100 includes a semiconductor substrate 101, and the pixel P1 and the pixel P2 are disposed on the semiconductor substrate 101.
  • the semiconductor substrate 101 may be a bulk semiconductor substrate, such as a silicon substrate or a silicon-on-insulator (SOI) substrate.
  • the pixel P1 and the pixel P2 include a photosensitive sensor 102 and an output circuit 116, respectively.
  • the anode of the photosensitive sensor 102 is electrically connected to the first voltage VSS, and the photosensitive sensor 102 is used to convert light into electric charges.
  • FIG. 1 does not indicate the scope of the output circuit 116 for the sake of brevity, and the output circuit 116 is only shown in FIG. 3.
  • the output circuit 116 is used to generate the pixel output according to the charge generated by the photosensitive sensor 102.
  • the output circuit 116 includes a transmission gate 104, a reset transistor 106, a source follower transistor 108, and a row selection transistor 110.
  • the transmission gate 104 includes a gate and two sources/drains. The gate of the transmission gate 104 determines whether the transmission gate 104 is turned on or off according to the transmission gate control signal TX. The two sources/drains of the transmission gate 104 are respectively electrically connected to the photosensitive The sensor 102 and the floating diffusion FD.
  • the source follower transistor 108 is disposed between the reset transistor 106 and the row selection transistor 110.
  • the gate of the source follower transistor 108 and a source/drain of the reset transistor 106 are electrically connected to the floating diffusion FD,
  • the other source/drain of the reset transistor 106 is electrically connected to the second voltage VDD, and the second voltage VDD may be the same or different from the first voltage VSS.
  • the gate of the reset transistor 106 determines whether it is turned on according to the control of the reset signal RST.
  • the source follower transistor 108 is connected in series to the row selection transistor 110, and a source/drain of the source follower transistor 108 is electrically connected to one of the row selection transistors 110. Source/drain, the other source/drain of the source follower transistor 108 is electrically connected to the second voltage VDD.
  • the other source/drain of the row selection transistor 110 is used as the output terminal POUT of the pixel output and is electrically connected to the bit line BL.
  • the gate of the row selection transistor 110 is controlled by the row selection signal RSEL on the word line WL to determine whether to turn on And output the pixel output from the output terminal POUT to the bit line BL.
  • the row selection transistor 110 of the pixel P1 and the row selection transistor 110 of the pixel P2 are located between the source follower transistor 108 of the pixel P1 and the source follower transistor 108 of the pixel P2. Then, the positions of the other source/drain of the row selection transistor 110 of the pixel P1 and the other source/drain of the row selection transistor 110 of the pixel P2 can overlap or be close to each other.
  • the position of the other source/drain of the row selection transistor 110 of the pixel P1 overlaps with the position of the other source/drain of the row selection transistor 110 of the pixel P2, specifically ,
  • the other source/drain of the row selection transistor 110 of the pixel P1 and the other source/drain of the row selection transistor 110 of the pixel P2 share a region of the semiconductor substrate 101, that is, the row selection transistor of the pixel P1
  • the other source/drain of the pixel P2 and the other source/drain of the row selection transistor 110 are shared with each other, so the area of one source/drain can be saved.
  • the pixel P1 and The pixel P2 shares the output terminal POUT, and the pixel P1 and the pixel P2 are electrically connected to the bit line BL through the through hole provided in the area.
  • more than one through hole may be provided in the area to electrically connect the pixel P1 and the pixel P2 to the bit line BL.
  • the positions of the other source/drain of the row selection transistor 110 of the pixel P1 and the other source/drain of the row selection transistor 110 of the pixel P2 may also be close but not overlapped.
  • the present application configures the pixel P1 and the pixel P2 as a group, and integrates the output circuit 116 of the pixel P1 and the pixel P2, which can save area and increase Part or all of the extra area is used to increase the channel length L of the source follower transistor 108 of the pixel P1 and the pixel P2, so as to reduce the area of the pixel P1 and the pixel P2 and reduce the noise of the random telegraph signal.
  • the source follower transistor 108 and the row select transistor 110 of the pixel P1 are configured symmetrically to the source follower transistor 108 and the pixel P2.
  • the configuration of the row selection transistor 110 is that the source follower transistor 108 and the row selection transistor 110 of the pixel P1 correspond to the source follower transistor 108 and the row selection transistor 110 of the pixel P2.
  • the output circuit 116 of the pixel P1 and the output circuit 116 of the pixel P2 may be arranged opposite to each other, that is, the output circuit 116 of the pixel P1 is opposite to the output circuit 116 of the pixel P2.
  • the configuration of the photosensitive sensor 102 and the output circuit 116 of the pixel P1 may be symmetrical to the configuration of the photosensitive sensor 102 and the output circuit 116 of the pixel P2, that is, the photosensitive sensor 102 and the output circuit of the pixel P1 116 is opposed to the photosensitive sensor 102 and the output circuit 116 of the pixel P2.
  • the source follower transistor 108, the row select transistor 110 of the pixel P1, and the row select transistor 110 and the source follower transistor 108 of the pixel P2 are arranged in sequence.
  • One column forms a transistor column.
  • the reset transistor 106, the source follower transistor 108, the row select transistor 110 of the pixel P1, and the row select transistor 110, the source follower transistor 108, and the reset transistor 106 of the pixel P2 are arranged in order
  • One column forms a transistor column.
  • the photosensitive sensor 102 of the pixel P1 and the photosensitive sensor 102 of the pixel P2 are arranged on the same side of the transistor column (106, 108, 110, 110, 108, 106 from top to bottom).
  • color filters may be arranged above the pixels P1 and P2, and are arranged into pixel groups according to the Bayer array, as shown in FIG. 4, which is a Bayer based on the semiconductor structure of the image sensor in FIG. Pixel group.
  • the Bayer pixel group 300 in FIG. 4 includes two unit pixel groups shown in FIG. 1, that is, a unit pixel group formed by pixels P1 and P2 and a unit pixel group formed by pixels P3 and P4.
  • a blue (B) color filter is arranged above the photosensitive sensor 102 of the pixel P1
  • a green (Gr) color filter is arranged above the photosensitive sensor 102 of the pixel P2
  • a green (Gb) filter is arranged above the photosensitive sensor 102 of the pixel P3.
  • the color chip and the red (R) color filter are arranged above the photosensitive sensor 102 of the pixel P4.
  • the blue (B) color filter overlaps the pixel P1
  • the green (Gr) color filter overlaps the pixel P2
  • the green (Gb) color filter overlaps the pixel P2.
  • the red (R) color filter overlaps the pixel P4.
  • FIG. 2 is a top view of the second embodiment of the semiconductor structure of the image sensor of the application.
  • the image sensor 200 in FIG. 2 includes a pixel P1' and a pixel P2, and the pixel P1' and the pixel P2 together form a unit pixel group.
  • the circuit of the image sensor 100 in FIG. 1 and the image sensor 200 in FIG. 2 has not actually changed. The difference from the image sensor 100 in FIG.
  • FIG. 3 is also a circuit diagram of the pixel P1' or the pixel P2 of the image sensor of FIG. 2, In this embodiment, the circuit diagrams of the pixel P1' or the pixel P2 are the same.
  • the pixel P1' and the pixel P2 may be provided with color filters and arranged into pixel groups according to Bayer, as shown in FIG. 5, which is a Bayer based on the semiconductor structure of the image sensor in FIG. Pixel group.
  • the Bayer pixel group 400 in FIG. 5 includes two unit pixel groups shown in FIG. 2, namely, a unit pixel group formed by pixels P1' and P2 and a unit pixel group formed by pixels P3' and P4.
  • a green (Gb) color filter is arranged above the photosensitive sensor 102 of the pixel P1', a green (Gr) color filter is arranged above the photosensitive sensor 102 of the pixel P2, and a blue (Gr) color filter is arranged above the photosensitive sensor 102 of the pixel P3'.
  • B) A color filter, and a red (R) color filter is arranged above the photosensitive sensor 102 of the pixel P4.
  • the green (Gb) color filter overlaps the pixel P1'
  • the green (Gr) color filter overlaps the pixel P2
  • the blue (B) color filter overlaps
  • the red (R) color filter overlaps the pixel P4.
  • the green (Gb and Gr) color filters are set above the pixel P1' and the pixel P2, and the pixel P1' and the pixel P2 share the output terminal POUT, that is, the pixel P1' and the pixel P2 will enter the same read circuit through the same bit line BL.
  • the advantage is to avoid the image misalignment between the green pixels (Gr and Gb) caused by the green pixels (Gr and Gb) entering different read circuits. It should be noted Yes, in fact, there are unavoidable deviations between the reading circuits.
  • the Bayer pixel group 400 of FIG. 5 can improve the aforementioned image misalignment problem.
  • FIG. 6 is a top view of the third embodiment of the semiconductor structure of the image sensor of this application.
  • the image sensor 500 of FIG. 6 includes a 2 ⁇ 2 based shared pixel P5 and a 2 ⁇ 2 based shared pixel P6.
  • the pixel P5 and the pixel P6 respectively include four sub-pixels to form a 2 ⁇ 2 based shared pixel.
  • the pixels P5 and P6, and the pixel P5 and the pixel P6 together form a unit pixel group.
  • FIG. 1 is that the pixels P5 and P6 of FIG. 6 respectively include four photosensitive sensors 502, 504, 506, and 508 corresponding to the first pixel P5 and the second pixel P6. Of the four sub-pixels. It should be noted that although the image sensor 500 in FIG. 6 only shows the pixel P5 and the pixel P6, the image sensor 500 may include a plurality of the unit pixel groups.
  • FIG. 8 is a circuit diagram of the pixel P5 or the pixel P6 of the image sensor of FIG. 6. In this embodiment, the circuit diagram of the pixel P5 or the pixel P6 is the same.
  • the output circuit 518 of the pixel P5 and the pixel P6 of FIG. 6 is substantially the same as the output circuit 116 of the pixel P1 and the pixel P2 of FIG. 1, except that the pixel P5 or the pixel P6 respectively have four transmission gates 510, 512, 514, and 516 to correspond to Four photosensitive sensors 502, 504, 506, and 508.
  • the pixel P5 or the pixel P6 in FIG. 6 retains all the advantages of the pixel P1 or the pixel P2 in FIG. 1.
  • FIG. 7 is a top view of the fourth embodiment of the semiconductor structure of the image sensor of this application.
  • the image sensor 600 of FIG. 7 includes a 2 ⁇ 2 based shared pixel P5' and a 2 ⁇ 2 based shared pixel P6, and the pixel P5' and the pixel P6 together form a unit pixel group.
  • the circuit of the image sensor 600 of FIG. 7 and the image sensor 500 of FIG. 6 has not actually changed.
  • the difference from the image sensor 500 of FIG. 6 is that the pixels P5 and P6 of the image sensor 500 of FIG.
  • the transistor column (from top to bottom is 106, 108, 110, 110, 108, 106) on the same side, but the pixel P5' and pixel P6 of the image sensor 600 in FIG.
  • the hole is electrically connected to the bit line BL.
  • FIG. 7 only shows the pixel P5' and the pixel P6
  • the image sensor 600 may include a plurality of the unit pixel groups. Since the circuit of the image sensor 500 of FIG. 6 and the image sensor 600 of FIG. 7 has not changed in fact, only the configuration of the semiconductor structure is changed, FIG. 8 is also a circuit diagram of the pixel P5' or the pixel P6 of the image sensor of FIG. 7, In this embodiment, the circuit diagrams of the pixel P5' or the pixel P6 are the same.
  • FIG. 9 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 6.
  • FIG. 10 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 7. Similar to FIGS. 4 and 5 in FIGS. 1 and 2, FIGS. 9 and 10 are also embodiments of the arrangement of Bayer pixel groups after adding color filters, and the details will not be repeated.
  • the application also provides a chip, which includes an image sensor 100/200/300/400/500/600/700/800.
  • This application also provides an electronic device.
  • FIG. 11 is a schematic diagram of an embodiment in which the image sensor of this application is applied to the electronic device 1100.
  • the electronic device 1100 includes a display screen assembly 1104 and an image sensor 100/200. /300/400/500/600/700/800.
  • the electronic device 1100 may be any electronic device such as a smart phone, a personal digital assistant, a handheld computer system, a tablet computer, or a digital camera.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

L'invention concerne une structure semi-conductrice d'un capteur d'image et une puce associée, et un appareil électronique. La structure semi-conductrice (600) d'un capteur d'image comprend un substrat semi-conducteur (101) et une pluralité de pixels agencés sur le substrat semi-conducteur, la pluralité de pixels comprenant : un premier pixel (P5 ') et un second pixel (P6) ; le premier pixel et le second pixel comprennent chacun : au moins un capteur photosensible (502, 504, 506, 508) pour convertir la lumière en charges électriques, et un circuit de sortie pour générer une sortie de pixel selon les charges électriques ; le circuit de sortie comprend un transistor à source suiveuse (108) et un transistor de sélection de rangée (110) ; et dans une vue de dessus, le transistor de sélection de rangée du premier pixel et le transistor de sélection de rangée du second pixel sont situés entre le transistor à source suiveuse du premier pixel et le transistor à source suiveuse du second pixel. La présente invention améliore un circuit de sortie d'une structure semi-conductrice d'un capteur d'image de façon à réduire une zone et à améliorer l'efficacité.
PCT/CN2019/102744 2019-08-27 2019-08-27 Structure semi-conductrice de capteur d'image et puce, et appareil électronique WO2021035516A1 (fr)

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CN201980001729.1A CN110709992A (zh) 2019-08-27 2019-08-27 图像传感器的半导体结构、芯片及电子装置
PCT/CN2019/102744 WO2021035516A1 (fr) 2019-08-27 2019-08-27 Structure semi-conductrice de capteur d'image et puce, et appareil électronique

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PCT/CN2019/102744 WO2021035516A1 (fr) 2019-08-27 2019-08-27 Structure semi-conductrice de capteur d'image et puce, et appareil électronique

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JP2007074630A (ja) * 2005-09-09 2007-03-22 Konica Minolta Holdings Inc 固体撮像素子
US7964929B2 (en) * 2007-08-23 2011-06-21 Aptina Imaging Corporation Method and apparatus providing imager pixels with shared pixel components
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US10141458B2 (en) * 2016-07-21 2018-11-27 Omnivision Technologies, Inc. Vertical gate guard ring for single photon avalanche diode pitch minimization
CN108242449A (zh) * 2016-12-27 2018-07-03 三星电子株式会社 图像传感器及包括其的电子装置
CN110098206A (zh) * 2018-01-29 2019-08-06 爱思开海力士有限公司 包括具有8共享像素结构的像素块的图像传感器

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