WO2021035516A1

WO2021035516A1 - Semiconductor structure of image sensor, and chip and electronic apparatus

Info

Publication number: WO2021035516A1
Application number: PCT/CN2019/102744
Authority: WO
Inventors: 陈经纬
Original assignee: 深圳市汇顶科技股份有限公司
Priority date: 2019-08-27
Filing date: 2019-08-27
Publication date: 2021-03-04
Also published as: CN110709992A

Abstract

Disclosed are a semiconductor structure of an image sensor, and a related chip and an electronic apparatus. The semiconductor structure (600) of an image sensor comprises a semiconductor substrate (101) and a plurality of pixels arranged on the semiconductor substrate, wherein the plurality of pixels comprise: a first pixel (P5') and a second pixel (P6); the first pixel and the second pixel each comprise: at least one photosensitive sensor (502, 504, 506, 508) for converting light into electric charges, and an output circuit for generating a pixel output according to the electric charges; the output circuit comprises a source follower transistor (108) and a row selection transistor (110); and in a top view, the row selection transistor of the first pixel and the row selection transistor of the second pixel are located between the source follower transistor of the first pixel and the source follower transistor of the second pixel. The present application improves an output circuit of a semiconductor structure of an image sensor so as to reduce an area and improve efficiency.

Description

Semiconductor structure, chip and electronic device of image sensor

Technical field

The present application relates to a semiconductor structure of an image sensor and related chips and electronic devices, and more particularly to a semiconductor structure of an image sensor that can increase the channel length of a source follower transistor, and related chips and electronic devices.

Background technique

CMOS image sensors have been produced and applied on a large scale. With the improvement of image quality requirements, the number of pixels has become larger and larger. In order to increase the number of pixels in a limited area as much as possible, the size of the unit pixel should be reduced as much as possible. In other words, the size of the photosensitive sensor and the output circuit in the unit pixel will be reduced accordingly.

However, reducing the size of the output circuit often affects the performance of the output circuit. Therefore, how to balance the area and performance has become an important work item in this field.

Summary of the invention

One of the objectives of the present application is to disclose a semiconductor structure of an image sensor and related chips and electronic devices to solve the above-mentioned problems.

An embodiment of the present application discloses a semiconductor structure of an image sensor. The semiconductor structure of the image sensor includes a semiconductor substrate and a plurality of pixels arranged on the semiconductor substrate, wherein the plurality of pixels includes: A pixel and a second pixel. Both the first pixel and the second pixel include: at least one photosensitive sensor for converting light into electric charge; and an output circuit for generating pixel output according to the electric charge, the output The circuit includes a source follower transistor and a row selection transistor. A source/drain of the source follower transistor is electrically connected to a source/drain of the row selection transistor; Both the row selection transistor and the row selection transistor of the second pixel are located between the source follower transistor of the first pixel and the source follower transistor of the second pixel.

An embodiment of the present application discloses a chip including the semiconductor structure of the above-mentioned image sensor.

An embodiment of the present application discloses an electronic device including the semiconductor structure of the above-mentioned image sensor.

The embodiments of the present application improve the configuration of the output circuit of the semiconductor structure of the image sensor, which can reduce the area and improve the performance of the output circuit.

Description of the drawings

FIG. 1 is a top view of the first embodiment of the semiconductor structure of the image sensor of this application.

FIG. 2 is a top view of the second embodiment of the semiconductor structure of the image sensor of the application.

FIG. 3 is a circuit diagram of a pixel of the image sensor of FIG. 1 and FIG. 2.

Fig. 4 is a Bayer pixel group based on the semiconductor structure of the image sensor of Fig. 1.

FIG. 5 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 2.

FIG. 6 is a top view of the third embodiment of the semiconductor structure of the image sensor of this application.

FIG. 7 is a top view of the fourth embodiment of the semiconductor structure of the image sensor of this application.

Fig. 8 is a circuit diagram of a pixel of the image sensor of Figs. 6 and 7.

FIG. 9 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 6.

FIG. 10 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 7.

FIG. 11 is a schematic diagram of an embodiment in which the image sensor of this application is applied to an electronic device.

Wherein, the reference signs are explained as follows:

100, 200, 500, 600 Image sensor

101 Semiconductor substrate

102, 502, 504, 506, 508 Photosensitive sensor

104, 510, 512, 514, 516 Transmission gate

106 Reset transistor

108 Source follower transistor

110 Row selection transistor

116, 518 Output circuit

300, 400, 700, 800 Bayer pixel group

1100 Electronic device

1104 Display assembly

P1, P1', P2, P3, P3', P4, pixels

P5, P5', P6, P7, P7', P8

L Channel length

TX, TX1, TX2, TX3, TX4 Transmission gate control signal

RST Reset signal

RSEL Row selection signal

POUT Output terminal

WL Word line

BL Position line

VSS First voltage

VDD Second voltage

FD Floating diffusion zone

B Blue

Gr, Gb Green

R Red

detailed description

The following disclosure provides various implementations or examples, which can be used to implement different features of the present invention. The specific examples of components and configurations described below are used to simplify the content of the present invention. When it is conceivable, these descriptions are only examples, and they are not intended to limit the content of the present invention. For example, in the following description, forming a first feature on or on a second feature may include some embodiments where the first and second features are in direct contact with each other; and may also include In some embodiments, additional components are formed between the above-mentioned first and second features, so that the first and second features may not be in direct contact. In addition, the content of the present invention may reuse component symbols and/or labels in multiple embodiments. Such repeated use is based on the purpose of brevity and clarity, and does not in itself represent the relationship between the different embodiments and/or configurations discussed.

Furthermore, the use of spatially relative terms here, such as "below", "below", "below", "above", "above" and similar, may be used to facilitate the description of the drawing in the figure The relationship between one component or feature relative to another component or feature is shown. The original meaning of these spatially-relative vocabulary covers a variety of different orientations of the device in use or operation, in addition to the orientation shown in the figure. The device may be placed in other orientations (for example, rotated 90 degrees or in other orientations), and these spatially-relative description vocabulary should be explained accordingly.

Although the numerical ranges and parameters used to define the broader scope of the present application are approximate numerical values, the relevant numerical values in the specific embodiments have been presented here as accurately as possible. However, any value inherently inevitably contains standard deviations due to individual test methods. Here, "about" usually means that the actual value is within plus or minus 10%, 5%, 1%, or 0.5% of a specific value or range. Or, the term "about" means that the actual value falls within the acceptable standard error of the average value, depending on the consideration of a person with ordinary knowledge in the technical field to which this application belongs. It should be understood that all ranges, quantities, values and percentages used herein (for example, used to describe the amount of material, time length, temperature, operating conditions, quantity ratio and other Similar ones) have been modified by "about". Therefore, unless otherwise stated to the contrary, the numerical parameters disclosed in this specification and the accompanying patent scope are approximate values and can be changed according to requirements. At least these numerical parameters should be understood as the indicated effective number of digits and the value obtained by applying the general carry method. Here, the numerical range is expressed from one end point to the other end point or between the two end points; unless otherwise specified, the numerical range described here includes the end points.

The application and demand of high-resolution and even ultra-high-resolution CMOS image sensors are becoming more and more extensive, and the size of the unit pixel must be reduced accordingly. That is to say, the size of the photosensitive sensor and the output circuit in the unit pixel must be reduced accordingly, and the output circuit The effectiveness of the inevitably will encounter some impact. For example, when the channel length of the source follower transistor in the output circuit is reduced, the random telegraph signal noise will increase. The semiconductor structure of the image sensor of the present application can reduce the area of the pixel and increase the output by changing the configuration of the output circuit. The source in the circuit follows the channel length of the transistor, thereby reducing random telegraph signal noise. In addition, by changing the configuration of the output circuit, this application can also make the green pixels (Gr and Gb) in the same pixel group with the Bayer arrangement use the same reading circuit, so as to prevent the green pixels (Gr and Gb) from being caused by the reading circuit. The difference between the green pixels (Gr and Gb) caused the image misalignment problem.

FIG. 1 is a top view of the first embodiment of the semiconductor structure of the image sensor of this application. The image sensor 100 in FIG. 1 includes a pixel P1 and a pixel P2, and the pixel P1 and the pixel P2 together form a unit pixel group. It should be noted that although the image sensor 100 in FIG. 1 only shows the pixel P1 and the pixel P2, the image sensor 100 may include a plurality of the unit pixel groups. FIG. 3 is a circuit diagram of the pixel P1 or the pixel P2 of the image sensor of FIG. 1. In this embodiment, the circuit diagram of the pixel P1 and the pixel P2 are the same.

Please refer to Figure 1 and Figure 3 at the same time. The image sensor 100 includes a semiconductor substrate 101, and the pixel P1 and the pixel P2 are disposed on the semiconductor substrate 101. The semiconductor substrate 101 may be a bulk semiconductor substrate, such as a silicon substrate or a silicon-on-insulator (SOI) substrate. The pixel P1 and the pixel P2 include a photosensitive sensor 102 and an output circuit 116, respectively. The anode of the photosensitive sensor 102 is electrically connected to the first voltage VSS, and the photosensitive sensor 102 is used to convert light into electric charges. Please note that FIG. 1 does not indicate the scope of the output circuit 116 for the sake of brevity, and the output circuit 116 is only shown in FIG. 3.

The output circuit 116 is used to generate the pixel output according to the charge generated by the photosensitive sensor 102. The output circuit 116 includes a transmission gate 104, a reset transistor 106, a source follower transistor 108, and a row selection transistor 110. The transmission gate 104 includes a gate and two sources/drains. The gate of the transmission gate 104 determines whether the transmission gate 104 is turned on or off according to the transmission gate control signal TX. The two sources/drains of the transmission gate 104 are respectively electrically connected to the photosensitive The sensor 102 and the floating diffusion FD. The source follower transistor 108 is disposed between the reset transistor 106 and the row selection transistor 110. Specifically, the gate of the source follower transistor 108 and a source/drain of the reset transistor 106 are electrically connected to the floating diffusion FD, The other source/drain of the reset transistor 106 is electrically connected to the second voltage VDD, and the second voltage VDD may be the same or different from the first voltage VSS. The gate of the reset transistor 106 determines whether it is turned on according to the control of the reset signal RST. The source follower transistor 108 is connected in series to the row selection transistor 110, and a source/drain of the source follower transistor 108 is electrically connected to one of the row selection transistors 110. Source/drain, the other source/drain of the source follower transistor 108 is electrically connected to the second voltage VDD. The other source/drain of the row selection transistor 110 is used as the output terminal POUT of the pixel output and is electrically connected to the bit line BL. The gate of the row selection transistor 110 is controlled by the row selection signal RSEL on the word line WL to determine whether to turn on And output the pixel output from the output terminal POUT to the bit line BL.

From the top view of the semiconductor structure of the pixel P1 and the pixel P2, the row selection transistor 110 of the pixel P1 and the row selection transistor 110 of the pixel P2 are located between the source follower transistor 108 of the pixel P1 and the source follower transistor 108 of the pixel P2. Then, the positions of the other source/drain of the row selection transistor 110 of the pixel P1 and the other source/drain of the row selection transistor 110 of the pixel P2 can overlap or be close to each other. For example, in this embodiment, the position of the other source/drain of the row selection transistor 110 of the pixel P1 overlaps with the position of the other source/drain of the row selection transistor 110 of the pixel P2, specifically , The other source/drain of the row selection transistor 110 of the pixel P1 and the other source/drain of the row selection transistor 110 of the pixel P2 share a region of the semiconductor substrate 101, that is, the row selection transistor of the pixel P1 The other source/drain of the pixel P2 and the other source/drain of the row selection transistor 110 are shared with each other, so the area of one source/drain can be saved. In other words, the pixel P1 and The pixel P2 shares the output terminal POUT, and the pixel P1 and the pixel P2 are electrically connected to the bit line BL through the through hole provided in the area. However, in some embodiments, more than one through hole may be provided in the area to electrically connect the pixel P1 and the pixel P2 to the bit line BL. In some embodiments, the positions of the other source/drain of the row selection transistor 110 of the pixel P1 and the other source/drain of the row selection transistor 110 of the pixel P2 may also be close but not overlapped.

Compared with the traditional pixel P1 and pixel P2 with their respective output circuits 116 completely separate, the present application configures the pixel P1 and the pixel P2 as a group, and integrates the output circuit 116 of the pixel P1 and the pixel P2, which can save area and increase Part or all of the extra area is used to increase the channel length L of the source follower transistor 108 of the pixel P1 and the pixel P2, so as to reduce the area of the pixel P1 and the pixel P2 and reduce the noise of the random telegraph signal.

Further, from the top view of the semiconductor structure of the pixel P1 and the pixel P2, in some embodiments, the source follower transistor 108 and the row select transistor 110 of the pixel P1 are configured symmetrically to the source follower transistor 108 and the pixel P2. The configuration of the row selection transistor 110 is that the source follower transistor 108 and the row selection transistor 110 of the pixel P1 correspond to the source follower transistor 108 and the row selection transistor 110 of the pixel P2. Or, in some embodiments, the output circuit 116 of the pixel P1 and the output circuit 116 of the pixel P2 may be arranged opposite to each other, that is, the output circuit 116 of the pixel P1 is opposite to the output circuit 116 of the pixel P2. Or, in some embodiments, the configuration of the photosensitive sensor 102 and the output circuit 116 of the pixel P1 may be symmetrical to the configuration of the photosensitive sensor 102 and the output circuit 116 of the pixel P2, that is, the photosensitive sensor 102 and the output circuit of the pixel P1 116 is opposed to the photosensitive sensor 102 and the output circuit 116 of the pixel P2.

From the top view of the semiconductor structure of the pixel P1 and the pixel P2, in some embodiments, the source follower transistor 108, the row select transistor 110 of the pixel P1, and the row select transistor 110 and the source follower transistor 108 of the pixel P2 are arranged in sequence. One column forms a transistor column. Furthermore, in some embodiments, the reset transistor 106, the source follower transistor 108, the row select transistor 110 of the pixel P1, and the row select transistor 110, the source follower transistor 108, and the reset transistor 106 of the pixel P2 are arranged in order One column forms a transistor column. The photosensitive sensor 102 of the pixel P1 and the photosensitive sensor 102 of the pixel P2 are arranged on the same side of the transistor column (106, 108, 110, 110, 108, 106 from top to bottom).

In some embodiments, color filters may be arranged above the pixels P1 and P2, and are arranged into pixel groups according to the Bayer array, as shown in FIG. 4, which is a Bayer based on the semiconductor structure of the image sensor in FIG. Pixel group. The Bayer pixel group 300 in FIG. 4 includes two unit pixel groups shown in FIG. 1, that is, a unit pixel group formed by pixels P1 and P2 and a unit pixel group formed by pixels P3 and P4. A blue (B) color filter is arranged above the photosensitive sensor 102 of the pixel P1, a green (Gr) color filter is arranged above the photosensitive sensor 102 of the pixel P2, and a green (Gb) filter is arranged above the photosensitive sensor 102 of the pixel P3. The color chip and the red (R) color filter are arranged above the photosensitive sensor 102 of the pixel P4. In other words, from a top view, the blue (B) color filter overlaps the pixel P1, the green (Gr) color filter overlaps the pixel P2, and the green (Gb) color filter overlaps the pixel P2. For the pixel P3, the red (R) color filter overlaps the pixel P4.

In some embodiments, from the top view of the semiconductor structure of the pixel P1 and the pixel P2, the photosensitive sensor 102 of the pixel P1 and the photosensitive sensor 102 of the pixel P2 are arranged in the transistor column (106, 108, 108 from top to bottom). 110, 110, 108, 106) on opposite sides. FIG. 2 is a top view of the second embodiment of the semiconductor structure of the image sensor of the application. The image sensor 200 in FIG. 2 includes a pixel P1' and a pixel P2, and the pixel P1' and the pixel P2 together form a unit pixel group. The circuit of the image sensor 100 in FIG. 1 and the image sensor 200 in FIG. 2 has not actually changed. The difference from the image sensor 100 in FIG. 1 is that the pixels P1 and P2 of the image sensor 100 in FIG. The transistor column (from top to bottom is 106, 108, 110, 110, 108, 106) on the same side, but the pixel P1' and pixel P2 of the image sensor 200 in FIG. 2 are arranged on the transistor column (from top to bottom) 106, 108, 110, 110, 108, 106), and the pixel P1' and the pixel P2 of the image sensor 200 still share the output terminal POUT, that is, the output terminal POUT of the pixel P1' and the output terminal POUT of the pixel P2 share the same The hole is electrically connected to the bit line BL.

It should be noted that although the image sensor 200 in FIG. 2 only illustrates the pixel P1 ′ and the pixel P2, the image sensor 200 may include a plurality of the unit pixel groups. Since the circuits of the image sensor 100 of FIG. 1 and the image sensor 200 of FIG. 2 have not actually changed, only the configuration of the semiconductor structure is changed, FIG. 3 is also a circuit diagram of the pixel P1' or the pixel P2 of the image sensor of FIG. 2, In this embodiment, the circuit diagrams of the pixel P1' or the pixel P2 are the same.

In some embodiments, the pixel P1' and the pixel P2 may be provided with color filters and arranged into pixel groups according to Bayer, as shown in FIG. 5, which is a Bayer based on the semiconductor structure of the image sensor in FIG. Pixel group. The Bayer pixel group 400 in FIG. 5 includes two unit pixel groups shown in FIG. 2, namely, a unit pixel group formed by pixels P1' and P2 and a unit pixel group formed by pixels P3' and P4. A green (Gb) color filter is arranged above the photosensitive sensor 102 of the pixel P1', a green (Gr) color filter is arranged above the photosensitive sensor 102 of the pixel P2, and a blue (Gr) color filter is arranged above the photosensitive sensor 102 of the pixel P3'. B) A color filter, and a red (R) color filter is arranged above the photosensitive sensor 102 of the pixel P4. In other words, if viewed from a top view, the green (Gb) color filter overlaps the pixel P1', the green (Gr) color filter overlaps the pixel P2, and the blue (B) color filter overlaps In the pixel P3', the red (R) color filter overlaps the pixel P4.

In the Bayer pixel group 400 of FIG. 5, the green (Gb and Gr) color filters are set above the pixel P1' and the pixel P2, and the pixel P1' and the pixel P2 share the output terminal POUT, that is, the pixel P1' and the pixel P2 will enter the same read circuit through the same bit line BL. The advantage is to avoid the image misalignment between the green pixels (Gr and Gb) caused by the green pixels (Gr and Gb) entering different read circuits. It should be noted Yes, in fact, there are unavoidable deviations between the reading circuits. Therefore, if the green pixels (Gr and Gb) in the same Bayer pixel group are read by different reading circuits, the above-mentioned image misalignment problem will be caused. Therefore, compared with the Bayer pixel group 300 of FIG. 4 in the Bayer pixel group 400 of FIG. 5, the Bayer pixel group 400 of FIG. 5 can improve the aforementioned image misalignment problem.

In some embodiments, the pixel P1 and the pixel P2 in FIG. 1 may be changed into a plurality of shared pixels, for example, shared pixels on a 2×2 basis. FIG. 6 is a top view of the third embodiment of the semiconductor structure of the image sensor of this application. The image sensor 500 of FIG. 6 includes a 2×2 based shared pixel P5 and a 2×2 based shared pixel P6. Specifically, the pixel P5 and the pixel P6 respectively include four sub-pixels to form a 2×2 based shared pixel. The pixels P5 and P6, and the pixel P5 and the pixel P6 together form a unit pixel group. The difference between the image sensor 500 of FIG. 6 and the image sensor 100 of FIG. 1 is that the pixels P5 and P6 of FIG. 6 respectively include four

photosensitive sensors

502, 504, 506, and 508 corresponding to the first pixel P5 and the second pixel P6. Of the four sub-pixels. It should be noted that although the image sensor 500 in FIG. 6 only shows the pixel P5 and the pixel P6, the image sensor 500 may include a plurality of the unit pixel groups. FIG. 8 is a circuit diagram of the pixel P5 or the pixel P6 of the image sensor of FIG. 6. In this embodiment, the circuit diagram of the pixel P5 or the pixel P6 is the same.

The output circuit 518 of the pixel P5 and the pixel P6 of FIG. 6 is substantially the same as the output circuit 116 of the pixel P1 and the pixel P2 of FIG. 1, except that the pixel P5 or the pixel P6 respectively have four

transmission gates

510, 512, 514, and 516 to correspond to Four

photosensitive sensors

502, 504, 506, and 508. In addition, the pixel P5 or the pixel P6 in FIG. 6 retains all the advantages of the pixel P1 or the pixel P2 in FIG. 1.

FIG. 7 is a top view of the fourth embodiment of the semiconductor structure of the image sensor of this application. The image sensor 600 of FIG. 7 includes a 2×2 based shared pixel P5' and a 2×2 based shared pixel P6, and the pixel P5' and the pixel P6 together form a unit pixel group. The circuit of the image sensor 600 of FIG. 7 and the image sensor 500 of FIG. 6 has not actually changed. The difference from the image sensor 500 of FIG. 6 is that the pixels P5 and P6 of the image sensor 500 of FIG. The transistor column (from top to bottom is 106, 108, 110, 110, 108, 106) on the same side, but the pixel P5' and pixel P6 of the image sensor 600 in FIG. 7 are arranged on the transistor column (from top to bottom) 106, 108, 110, 110, 108, 106), and the pixel P5' and the pixel P6 of the image sensor 600 still share the output terminal POUT, that is, the output terminal POUT of the pixel P5' and the output terminal POUT of the pixel P6 share the same The hole is electrically connected to the bit line BL.

It should be noted that although the image sensor 600 in FIG. 7 only shows the pixel P5' and the pixel P6, the image sensor 600 may include a plurality of the unit pixel groups. Since the circuit of the image sensor 500 of FIG. 6 and the image sensor 600 of FIG. 7 has not changed in fact, only the configuration of the semiconductor structure is changed, FIG. 8 is also a circuit diagram of the pixel P5' or the pixel P6 of the image sensor of FIG. 7, In this embodiment, the circuit diagrams of the pixel P5' or the pixel P6 are the same.

FIG. 9 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 6. FIG. 10 is a Bayer pixel group based on the semiconductor structure of the image sensor of FIG. 7. Similar to FIGS. 4 and 5 in FIGS. 1 and 2, FIGS. 9 and 10 are also embodiments of the arrangement of Bayer pixel groups after adding color filters, and the details will not be repeated.

The application also provides a chip, which includes an image sensor 100/200/300/400/500/600/700/800. This application also provides an electronic device. FIG. 11 is a schematic diagram of an embodiment in which the image sensor of this application is applied to the electronic device 1100. As shown in FIG. 11, the electronic device 1100 includes a display screen assembly 1104 and an image sensor 100/200. /300/400/500/600/700/800. The electronic device 1100 may be any electronic device such as a smart phone, a personal digital assistant, a handheld computer system, a tablet computer, or a digital camera.

The foregoing description briefly presents the features of certain embodiments of the present application, so that those with ordinary knowledge in the technical field to which the present application belongs can have a more comprehensive understanding of the various aspects of the content of the present invention. Those with ordinary knowledge in the technical field to which this application belongs should understand that they can easily use the content of the present invention as a basis to design or modify other processes and structures to achieve the same purpose and/or as the embodiments described herein. To achieve the same advantages. Those with ordinary knowledge in the technical field to which this application belongs should understand that these equivalent implementations still belong to the spirit and scope of the content of the present invention, and various changes, substitutions and alterations can be made without departing from the spirit of the content of the present invention With scope.

Claims

A semiconductor structure of an image sensor, characterized in that the semiconductor structure of the image sensor includes a semiconductor substrate and a plurality of pixels arranged on the semiconductor substrate, wherein the plurality of pixels includes:

The first pixel and the second pixel, both the first pixel and the second pixel include:

At least one photosensitive sensor for converting light into electric charge; and

An output circuit for generating pixel output according to the charge. The output circuit includes a source follower transistor and a row selection transistor. A source/drain of the source follower transistor is electrically connected to a source/drain of the row selection transistor. pole;

Wherein, from a top view, the row selection transistor of the first pixel and the row selection transistor of the second pixel are both located in the source follower transistor of the first pixel and the second pixel. The source follows between the transistors.
The semiconductor structure of the image sensor according to claim 1, wherein from a top view, the arrangement of the source follower transistor of the first pixel and the row selection transistor of the first pixel is symmetrical to that of the first pixel. The configuration of the source follower transistor of the two pixels and the row selection transistor of the second pixel.
The semiconductor structure of the image sensor according to claim 1 or 2, further comprising a bit line, and the semiconductor substrate is provided with a pass for electrically connecting the row selection transistors of the first pixel and the second pixel to the bit line. Hole, wherein the output circuit of the first pixel outputs the pixel output by using the other source/drain of the row selection transistor as an output terminal; the output of the second pixel A circuit for outputting the pixel output by using the other source/drain of the row selection transistor as an output terminal, and the output terminal of the first pixel and the output of the second pixel The terminals share a via to be electrically connected to the bit line.
The semiconductor structure of the image sensor according to claim 3, wherein the output circuit of the first pixel further comprises a reset transistor electrically connected to the source follower transistor of the first pixel; The output circuit further includes a reset transistor electrically connected to the source follower transistor of the second pixel.
The semiconductor structure of the image sensor according to claim 4, wherein, in the first pixel, the source follower transistor is provided between the reset transistor and the row selection transistor when viewed from a top view; and In the second pixel, the source follower transistor is provided between the reset transistor and the row selection transistor.
The semiconductor structure of the image sensor according to claim 3, wherein the output circuit of the first pixel further comprises at least one transmission gate electrically connected to the at least one photosensitive sensor and the first pixel of the first pixel. Between the source-following transistors of the pixel; the second pixel further includes at least one transmission gate electrically connected between the at least one photosensitive sensor of the second pixel and the source-following transistor of the second pixel .
The semiconductor structure of the image sensor according to claim 1, wherein the first pixel and the second pixel respectively include four sub-pixels to form a 2×2 shared pixel, and the first pixel and the second pixel Each pixel includes four photosensitive sensors corresponding to the four sub-pixels of each of the first pixel and the second pixel.
The semiconductor structure of the image sensor according to claim 3, wherein the source follower transistor of the first pixel, the row selection transistor of the first pixel, and all of the second pixel are viewed from a top view. The source follower transistor and the row selection transistor of the second pixel are arranged in a row to form a transistor column.
The semiconductor structure of the image sensor according to claim 8, wherein from a top view, the at least one photosensitive sensor of the first pixel and the at least one photosensitive sensor of the second pixel are arranged in the transistor column On the same side.
The semiconductor structure of the image sensor according to claim 9, further comprising a blue color filter and a green color filter respectively disposed on the first pixel and the second pixel. From a top view, the The blue color filter overlaps the first pixel, and the green color filter overlaps the second pixel.
The semiconductor structure of the image sensor according to claim 9, further comprising a green color filter and a red color filter respectively disposed on the first pixel and the second pixel. From a top view, the green color filter The color filter overlaps the first pixel, and the red color filter overlaps the second pixel.
The semiconductor structure of the image sensor according to claim 8, wherein when viewed from a top view, the at least one photosensitive sensor of the first pixel and the at least one photosensitive sensor of the second pixel are respectively disposed on the transistor Opposite sides of the column.
The semiconductor structure of the image sensor according to claim 12, further comprising a green color filter disposed on the first pixel and the second pixel. From a top view, the green color filter overlaps all the pixels. The first pixel and the second pixel.
The semiconductor structure of the image sensor according to claim 12, further comprising a blue color filter and a red color filter respectively disposed on the first pixel and the second pixel. From a top view, the The blue color filter overlaps the first pixel, and the red color filter overlaps the second pixel.
A chip, characterized in that it comprises:

The semiconductor structure of an image sensor according to any one of claims 1-14.
An electronic device, characterized in that it comprises:

The semiconductor structure of an image sensor according to any one of claims 1-14.