WO2021032189A1 - 集成封装电子器件结构 - Google Patents
集成封装电子器件结构 Download PDFInfo
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- WO2021032189A1 WO2021032189A1 PCT/CN2020/110470 CN2020110470W WO2021032189A1 WO 2021032189 A1 WO2021032189 A1 WO 2021032189A1 CN 2020110470 W CN2020110470 W CN 2020110470W WO 2021032189 A1 WO2021032189 A1 WO 2021032189A1
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- integrated
- circuit module
- package
- electronic device
- electrically connected
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- 238000004806 packaging method and process Methods 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 239000003990 capacitor Substances 0.000 claims description 34
- 230000010354 integration Effects 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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Definitions
- the invention belongs to the field of integrated electronic devices, and particularly relates to a novel integrated packaging electronic device structure.
- the power amplifier is an important part of the wireless communication system.
- the power amplifier is used to amplify the input signal and output it.
- the power amplifier converts DC energy into radio frequency energy.
- the embodiment of the present invention provides an integrated packaged electronic device structure, which realizes the grounding function setting on the packaged electronic device structure, which not only avoids setting a long bias line on the printed circuit board and mounting a larger Capacitors realize the grounding function and cause the problem of occupying a large area in the application of integrated electronic devices, which is also conducive to reducing the size of the power amplifier module and improving the integration of the power amplifier application circuit.
- the integrated package device structure of the invention can be widely used in the application of radio frequency grounding circuits, improve the traditional surface mount circuit, greatly improve the application integration level of the current radio frequency power amplifier, and it is for the miniaturization of portable intelligent electronic products. Lightweight lays a solid foundation.
- the present invention provides an integrated packaging electronic device structure, including: packaging components, including a packaging frame and a packaging substrate; and at least two circuit modules, which are packaged on one side of the packaging substrate in the packaging frame; and the packaging The frame includes a junction point of the at least two circuit modules.
- the integrated packaged electronic device structure further includes: an integrated passive device area, which is packaged on one side of the package substrate in the package frame; and the at least two circuit modules are located in the integrated passive device Area; the integrated passive device area and the package frame form at least two connection circuits.
- the at least two circuit modules include a matching circuit module and a grounding circuit module, the matching circuit module and the grounding circuit module are respectively electrically connected to the packaging frame, wherein one end of the grounding circuit passes through the resonance inductance Ls and the packaging The frame is electrically connected, and one end of the matching circuit module is electrically connected to the packaging frame through a radio frequency choke coil RFC.
- the ground circuit module includes an integrated capacitor Cs, and the integrated capacitor Cs and the resonant inductor Ls are electrically connected to form a series resonant circuit.
- ground circuit module is at the same potential as the package substrate.
- the grounding circuit module further includes a tuning inductor L 2 , the tuning inductor L 2 and the integrated capacitor Cs are connected in series, and the integrated capacitor Cs, the tuning inductor Ls2 and the resonance inductor Ls form a series resonance circuit.
- the inductance value of the radio frequency choke coil RFC is greater than the inductance value of the resonant inductor Ls.
- the integrated packaged electronic device structure further includes an active device area encapsulated in the packaging frame, and the active device area is electrically connected to the integrated passive device area.
- the other end of the matching circuit module is connected to a load circuit.
- the package frame includes at least one pad, and the matching circuit module and the ground circuit module are electrically connected to the pads respectively; the pad electrically connected to the matching circuit module and the ground circuit module are electrically connected to each other.
- the electrical connection pads of the module are connected to the same fixed voltage.
- the other end of the radio frequency choke RFC electrically connected to the matching circuit module is electrically connected to the other end of the resonant inductor Ls electrically connected to the grounding circuit module.
- the junction points of at least two circuits encapsulated in the packaging frame are arranged on the packaging frame, thereby avoiding the application of integrated electronic devices caused by setting junction points on the packaging substrate.
- the problem of occupying a large area increases the utilization rate of integrated electronic devices, which is beneficial to the integration and industrialization of electronic devices.
- the matching circuit module and the grounding circuit module are electrically connected to the package frame at the same time, and pass
- the radio frequency choke coil RFC and the resonant inductance Ls are connected to the same external voltage respectively, and the other end of the grounding circuit module is at the same potential as the package substrate, and the direct grounding function is set on the integrated package electronic device, thereby avoiding the printed circuit board Setting a longer bias line and attaching a larger capacitor to realize the grounding function causes the problem of occupying a larger area in the application of integrated electronic devices.
- the integrated capacitor Cs and the debugging inductance Ls2 are also set inside the grounding circuit module, and the two ends of the integrated capacitor Cs of the grounding circuit are connected with an inductor to realize the circuit adjustment flexibility of the packaged device structure, so that the grounding circuit can be debugged according to different frequencies. , Improve the utilization of integrated devices, reduce development time and cost.
- FIG. 1 is a schematic structural diagram of an integrated package electronic device provided by an embodiment of the present invention
- FIG. 2 is a schematic structural diagram of another integrated package electronic device provided by an embodiment of the present invention.
- FIG. 3 is a schematic structural diagram of another integrated package electronic device provided by an embodiment of the present invention.
- FIG. 4 is a schematic structural diagram of another integrated package electronic device provided by an embodiment of the present invention.
- the embodiment of the present invention provides an integrated packaging electronic device structure, including: a packaging component, including a packaging frame and a packaging substrate; and at least two circuit modules, which are packaged on one side of the packaging substrate in the packaging frame;
- the packaging frame includes a junction point of the at least two circuit modules.
- the integrated package electronic device structure provided by the embodiment of the present invention further includes: an integrated passive device area, which is packaged on one side of the package substrate in the package frame; and the at least two circuit modules are located in the integrated circuit module.
- Source device area; the integrated passive device area and the package frame form at least two connection circuits.
- the junction points of at least two circuits encapsulated in the packaging frame are arranged on the packaging frame, thereby avoiding the application of integrated electronic devices caused by setting junction points on the packaging substrate.
- the problem of occupying a large area increases the utilization rate of integrated electronic devices, which is beneficial to the integration and industrialization of electronic devices.
- an integrated passive device area including a matching circuit module and a grounding circuit module is packaged in a package component, and the integrated passive device area and the package frame form at least two connection circuits
- the matching circuit module and the grounding circuit module are electrically connected to the package frame respectively to realize the direct grounding function setting on the integrated packaged electronic device, thereby avoiding the setting of long bias lines and mounting larger capacitors on the printed circuit board
- the realization of the grounding function causes the problem of occupying a large area in the application of integrated electronic devices.
- the circuit adjustment flexibility of the packaged device structure is also realized by setting the integrated capacitor Cs and the debugging inductance Ls2 inside the grounding circuit module, so that the grounding circuit can be debugged according to different frequencies, which improves the utilization of integrated devices and reduces development time and cost. .
- FIG. 1 is a schematic structural diagram of an integrated package electronic device provided by an embodiment of the present invention.
- the integrated packaged electronic device structure includes a package component, the package component includes a package frame 1 and a package substrate 2, and the junction point of at least two circuit modules on the side of the package substrate packaged in the package frame is located On the package frame, that is, the package frame 2 includes at least one junction point to connect with the circuit inside the package frame 1.
- an integrated passive device area 3 is packaged on one side of the package substrate 2 within the range of the package frame 1, and the integrated passive device area 3 and the package frame 1 form at least two connection circuits, that is, the combined circuit of the package frame 1.
- the integrated passive device area 3 includes at least two circuit modules, such as a matching circuit module 5 and a grounding circuit module 4.
- the matching circuit module 5 and the grounding circuit module 4 in this embodiment are respectively electrically connected to the pad 6 of the packaging frame 1, that is, the junction point of the matching circuit module 5 and the grounding circuit module 4 is formed on a pad 6 of the packaging frame 1. .
- the package frame 1 includes at least one pad 6, the integrated passive device area 3 packaged inside the device is electrically connected to the pad 6, and the integrated passive device area 3 and the package frame 1 form at least two connections Circuit; wherein the matching circuit module 5 and the grounding circuit module 4 are electrically connected to the pad 6 respectively.
- one end of the matching circuit module 5 is electrically connected to the pad 6 through a radio frequency choke coil RFC, and one end of the grounding circuit module 4 It is electrically connected to the pad 6 through the resonant inductor Ls.
- the pad connected to the matching circuit module 5 and the pad connected to the ground circuit module 4 are connected to the same fixed voltage to obtain the same external DC voltage U to ensure stable power supply for the integrated passive device area 3.
- the matching circuit module 5 and the grounding circuit module 4 can be electrically connected to the same pad 6 at the same time, or can be electrically connected to different pads 6; as shown in Figure 2, when the matching circuit module 5 and the grounding circuit module 4 are When the different pads 6 are electrically connected, the two pads must be electrically connected. There are no restrictions on the electrical connection position and the electrical connection form to ensure that the other end of the radio frequency choke RFC of the matching circuit module 5 is connected The electrical connection with the other end of the resonance inductance Ls connected to the ground circuit module 4 is sufficient. In this case, the junction point of the matching circuit module 5 and the ground circuit module 4 is also formed in the package frame 1. It should be noted that FIGS.
- the electrical connection can be achieved by arranging a metal bonding wire or a microstrip line between the pad 6 and the matching circuit module 5 and the grounding circuit module 4 to realize the functions of the radio frequency choke RFC and the resonance inductor Ls, respectively.
- the number, length, and height of the bonding wires or microstrip wires can be adjusted according to the frequency of the actual circuit. Preferably, it is ensured that the inductance value of the radio frequency choke coil RFC is greater than the inductance value of the resonant inductor Ls.
- the inductance value of the radio frequency choke coil RFC is greater than the inductance value of the resonance inductance Ls, so that the ground setting circuit can isolate AC signals, and the DC bias signal prevents the signal of the matching circuit module from passing through the ground circuit module.
- One end of the matching circuit module 5 is electrically connected to the packaging frame 1 through a radio frequency choke coil RFC, and the other end is connected to a load circuit to achieve matching adjustment of the load impedance.
- the device structure of this embodiment realizes the direct grounding function setting on the level of the integrated packaged electronic device, thereby avoiding the application of integrated electronic devices caused by setting a long bias line on the printed circuit board and mounting a larger capacitor to achieve the grounding function.
- this structure can be used for radio frequency integrated packaging electronic devices of power amplifiers.
- the integrated passive device area 3 On the side of the packaging substrate 2 within the range of the packaging frame 1, that is, the integrated passive device area 3 is packaged.
- an active device area 7 is also packaged, and the active device area 7 is electrically connected to the integrated passive device area 3.
- the active device area 7 includes a power amplifier chip Die, which is used to amplify the input signal and output it to convert DC energy into radio frequency energy.
- the power amplifier chip Die may include gallium nitride GaN, gallium arsenide GaAs High electron mobility transistors, LDMOS, GeSi and other semiconductor chips.
- the active device area 7 is electrically connected to the integrated passive device area 3.
- the active device area 7 is electrically connected to the matching circuit module 5, and the matching circuit module 5 of the integrated passive device area 3 is the active device area 3. Input a stable working voltage.
- the matching circuit module 5 can also match the load impedance of the load circuit to the output impedance of the active device area 3.
- the power amplifier chip Die obtains the gate bias voltage through the integrated passive device area 3 during actual work, and the matching circuit module 5 provides a drain bias circuit for the power amplifier chip Die. It is also possible to match the load impedance to the output impedance for the power amplifier chip Die through the matching circuit module 5, so as to ensure that the power amplifier Die has better power amplifier power, efficiency and linearity characteristics.
- the packaged device structure greatly reduces the size of the current power amplifier module and improves the integration level of the power amplifier application circuit.
- one end of the ground circuit 4 is electrically connected to the resonant inductor Ls, and the other end is electrically connected to a fixed voltage terminal.
- the ground circuit module 4 includes an integrated capacitor Cs.
- One end of the ground circuit module 4 is connected to the resonant inductor Ls, and the other end is equal to the potential of the package substrate 2.
- one end of the integrated capacitor Cs is connected to the resonant inductor Ls. It is electrically connected, and the other end is at the same potential as the package substrate 2, for example, the package substrate 2 is grounded.
- one end of the integrated capacitor Cs and one end of the resonant inductor Ls are electrically connected to form a series resonant circuit.
- the other end of the resonant inductor Ls is electrically connected to the pad 6, and at the same time, a fixed voltage V is connected to the device structure
- the signal grounding function is set at the level, and the series resonance circuit resonates at the circuit operating frequency f 0 .
- the inductance value of the resonant inductor Ls is Ls
- the capacitance value of the integrated capacitor Cs is Cs
- the resonant frequency of the series resonant circuit is f 0.
- the resonant frequency f 0 satisfies:
- the resonant frequency of the series resonant circuit set to realize the signal grounding function in this embodiment is
- the pad 6 electrically connected to the resonant inductor Ls is not only connected to the fixed voltage V, but also electrically connected to the pad 6 connected to the radio frequency choke coil RFC at the same time to realize the matching circuit module 5 and
- the ground circuit module 4 has the same stable voltage outside the integrated passive device area 3 at the same time.
- the active device chip is electrically connected to the integrated passive device area 3 inside the package structure, so as to realize the use of the integrated passive device inside the integrated package electronic device.
- Zone 3 provides operating bias voltage for active device chips.
- the ground circuit module 4 includes an integrated capacitor Cs and a tuning inductor Ls2; in this embodiment, the integrated capacitor Cs and the tuning inductor Ls2 are connected in series, that is, one end of the integrated capacitor Cs is connected to the resonance
- the inductor Ls is electrically connected, and the other end is electrically connected to one end of the debugging inductor Ls2.
- the other end of the debugging inductor Ls2 is at the same potential as the package substrate 2. For example, the package substrate 2 is grounded, and the other end of the debugging inductor Ls2 is grounded.
- the integrated packaging electronic device is repeatedly used in a certain frequency range, which increases the flexibility of integrated circuit adjustment and greatly reduces the cost of current radio frequency circuit applications.
- one end of the integrated capacitor Cs is electrically connected to one end of the resonant inductor Ls
- the other end of the integrated capacitor Cs is electrically connected to one end of the debug inductor Ls2
- the integrated capacitor Cs, the debug inductor Ls2 and the resonant inductor Ls constitutes a series resonant circuit
- the other end of the resonant inductor Ls is electrically connected to the pad 6 and at the same time connected to a fixed voltage V
- the other end of the debugging inductor Ls2 is grounded to realize the signal grounding function setting at the device structure level.
- the series resonant circuit Resonance is at frequency f 0 .
- the resonance frequency f 0 satisfies:
- the resonant frequency of the series resonant circuit set by adding the debugging inductance Ls2 to realize the signal grounding function is
- an integrated capacitor Cs and a debugging inductance Ls2 are provided inside the grounding circuit module to achieve circuit adjustment flexibility of the packaged device structure.
- the integrated capacitor Cs, the debugging inductance Ls2 and the resonant inductance Ls form a series resonance circuit, so that the grounding
- the circuit can be debugged according to different frequencies, which increases the flexibility of integrated circuit adjustment, improves the utilization of integrated devices, and reduces development time and cost.
- the present invention can set the package component as a QFN package component.
- the QFN (Quad Flat No-lead package) package component is one of the surface mount packages, and the QFN package is a leadless package.
- Sub-assembly, QFN package components are square or rectangular.
- a large exposed pad is provided at the center of the bottom of the package for heat conduction, and conductive pads for electrical connection are provided around the periphery of the large pad, which is the above implementation Example mentioned pad 3.
- the package component can also be set as a DFN package component.
- DFN Double Flat No-lead package
- QFN Quadrature No-lead package
- the difference between a DFN (Dual Flat No-lead package) package component and a QFN package component is that the DFN package component is only provided on both sides of the package component to achieve electrical
- the connected conductive pads and packaging components may also adopt other packaging forms, which are not limited in the embodiment of the present invention.
- the integrated passive device area including the matching circuit module and the grounding circuit module is encapsulated in the package component, and the matching circuit module and the grounding circuit module are electrically connected to the package frame at the same time, and through separate radio frequency
- the choke coil RFC and the resonant inductance Ls are connected to the same external voltage, and the other end of the grounding circuit module is at the same potential as the package substrate.
- the direct grounding function is implemented on the integrated packaged electronic device, thereby avoiding the need to set up on the printed circuit board.
- the long bias line and the large capacitor attached to achieve the grounding function cause the problem of occupying a large area in the application of integrated electronic devices.
- the integrated capacitor Cs and the debugging inductance Ls2 are also set inside the grounding circuit module, and the two ends of the integrated capacitor Cs of the grounding circuit are connected with an inductor to realize the circuit adjustment flexibility of the packaged device structure, so that the grounding circuit can be debugged according to different frequencies. , Improve the utilization of integrated devices, reduce development time and cost.
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Abstract
一种集成封装电子器件结构,包括:封装部件,包括封装框架(1)和封装基底(2);和至少两个电路模块,被封装于封装框架(1)内的封装基底(2)的一侧;封装框架(1)包括至少两个电路模块的合路点。避免在封装基板(2)上设置合路点而导致的集成电子器件应用时占用较大面积的问题,提高了集成电子器件的利用率,有利于电子器件的集成化和工业化。
Description
本发明属于集成电子器件领域,尤涉及一种新型集成封装电子器件结构。
功率放大器是无线通信系统中重要的组成部分,功率放大器用于将输入信号进行放大后输出,在功率放大器执行放大功能的过程中,功率放大器将直流能量转化为射频能量。
目前,功率放大器模块难以与其它模块集成,绝大部分的功率放大器模块以单独模块的形式接入整机系统中,这使得功率放大器模块会占用无线通信系统整机的较大尺寸,不利于无线通信系统整机的小型化。另外,传统的表面贴装供电电路接地需要在PCB板上实现,引入较长的偏置线接直流电源,在PCB板上滤波电路通过贴片电容等才能接地。这种方式不仅会占用较大的PCB面积,造成资源和空间浪费,使得集成电路应用时的集成度降低,还极大地限制了功率放大器的应用领域。
发明内容
有鉴于此,本发明实施例提供了一种集成封装电子器件结构,在封装电子器件结构上实现接地功能设置,不仅避免了在印刷电路板上设置较长的偏置线、贴装较大的电容实现接地功能而导致的集 成电子器件应用时占用较大面积的问题,还有利于减小功率放大器模块的尺寸,提高功率放大器应用电路的集成度。该发明的集成封装器件结构可广泛用于射频接地电路的应用,改善传统的表面贴装电路,极大地提高了目前射频功率放大器的应用集成度,更是为便携式智能化电子产品的小型化、轻量化打下坚实的基础。
本发明提供一种集成封装电子器件结构,包括:封装部件,包括封装框架和封装基底;和至少两个电路模块,被封装于所述封装框架内的所述封装基底的一侧;所述封装框架包括所述至少两个电路模块的合路点。
进一步地,所述集成封装电子器件结构还包括:集成无源器件区,被封装于所述封装框架内的所述封装基底的一侧;所述至少两个电路模块位于所述集成无源器件区;所述集成无源器件区与所述封装框架形成至少两路连接电路。
进一步地,所述至少两个电路模块包括匹配电路模块和接地电路模块,所述匹配电路模块和接地电路模块分别与所述封装框架电连接,其中所述接地电路的一端通过谐振电感Ls和封装框架电连接,所述匹配电路模块的一端通过射频扼流圈RFC和封装框架电连接。
进一步地,所述接地电路模块包括集成电容Cs,所述集成电容Cs和所述谐振电感Ls电连接,且构成串联谐振电路。
进一步地,所述接地电路模块的另一端与所述封装基底电位相等。
进一步地,所述接地电路模块还包括调试电感L
2,所述调试电感L
2和所述集成电容Cs串联,且所述集成电容Cs、调试电感Ls2 和所述谐振电感Ls构成串联谐振电路。
进一步地,所述射频扼流圈RFC的电感值大于谐振电感Ls的电感值。
进一步地,所述集成封装电子器件结构还包括被封装于所述封装框架内的有源器件区,所述有源器件区与所述集成无源器件区电连接。
进一步地,所述匹配电路模块的另一端连接负载电路。
进一步地,所述封装框架包括至少一个焊盘,所述匹配电路模块和所述接地电路模块分别与所述焊盘电连接;与所述匹配电路模块电连接的焊盘和与所述接地电路模块电连接的焊盘连接于相同固定电压。
进一步地,与所述匹配电路模块电连接的射频扼流圈RFC的另一端和与所述接地电路模块电连接的谐振电感Ls的另一端电连接。
本发明实施例提供的集成封装电子器件结构,通过封装框架内封装的至少两个电路的合路点设置在封装框架上,从而避免在封装基板上设置合路点而导致的集成电子器件应用时占用较大面积的问题,提高了集成电子器件的利用率,有利于电子器件的集成化和工业化。
进而,本发明实施例提供的集成封装电子器件,通过在封装部件内封装包括匹配电路模块和接地电路模块的集成无源器件区,匹配电路模块和接地电路模块同时和封装框架电连接,并通过分别射频扼流圈RFC和谐振电感Ls和相同的外部电压连接,接地电路模块的另一端与所述封装基底电位相等,在集成封装电子器件上实现直接接地功能设置,从而避免在印刷电路板上设置较长的偏置线、 贴装较大的电容实现接地功能而导致的集成电子器件应用时占用较大面积的问题。还通过在接地电路模块内部设置集成电容Cs以及调试电感Ls2,接地电路的集成电容Cs两端各连接一个电感,实现该封装器件结构的电路调节灵活性,使得该接地电路可以根据不同频率需要调试,提高集成器件的利用率,减少开发时间和成本。
为了更清楚地说明本发明实施例或背景技术中的技术方案,下面将对实施例或背景技术描述中所需要使用的附图做一简单地介绍,显而易见地,下面描述中的附图是本发明的一些实施例的示意图,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的方案。
图1为本发明实施例提供的一种集成封装电子器件结构示意图;
图2为本发明实施例提供的另一种集成封装电子器件结构示意图;
图3为本发明实施例提供的另一种集成封装电子器件结构示意图;
图4为本发明实施例提供的另一种集成封装电子器件结构示意图;
下面结合附图和实施例对本发明作进一步的详细说明。可以理解的是,此处所描述的具体实施例仅仅用于解释本发明,而非对本 发明的限定。另外还需要说明的是,为了便于描述,附图中仅示出了与本发明相关的部分而非全部结构。贯穿本说明书中,相同或相似的附图标号代表相同或相似的结构、元件或流程。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。
本发明实施例提供了一种集成封装电子器件结构,包括:封装部件,包括封装框架和封装基底;和至少两个电路模块,被封装于所述封装框架内的所述封装基底的一侧;所述封装框架包括所述至少两个电路模块的合路点。
本发明实施例提供的集成封装电子器件结构,还包括:集成无源器件区,被封装于所述封装框架内的所述封装基底的一侧;所述至少两个电路模块位于所述集成无源器件区;所述集成无源器件区与所述封装框架形成至少两路连接电路。
本发明实施例提供的集成封装电子器件结构,通过封装框架内封装的至少两个电路的合路点设置在封装框架上,从而避免在封装基板上设置合路点而导致的集成电子器件应用时占用较大面积的问题,提高了集成电子器件的利用率,有利于电子器件的集成化和工业化。
进而,本发明实施例提供的集成封装电子器件结构,通过在封装部件内封装包括匹配电路模块和接地电路模块的集成无源器件区,且集成无源器件区与封装框架形成至少两路连接电路,如通过匹配电路模块和接地电路模块分别与封装框架电连接,在集成封装电子器件上实现直接接地功能设置,从而避免在印刷电路板上设置较长的偏置线、贴装较大的电容实现接地功能而导致的集成电子器 件应用时占用较大面积的问题。还通过在接地电路模块内部设置集成电容Cs以及调试电感Ls2来实现该封装器件结构的电路调节灵活性,使得该接地电路可以根据不同频率需要调试,提高集成器件的利用率,减少开发时间和成本。
以上是本发明的核心思想,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下,所获得的所有其他实施例,都属于本发明保护的范围。
图1为本发明实施例提供的一种集成封装电子器件结构示意图。如图1,集成封装电子器件结构包括封装部件,封装部件包括封装框架1和封装基底2,被封装于所述封装框架内的所述封装基底一侧的至少两个电路模块的合路点位于封装框架上,即封装框架2包括至少一个合路点与封装框架1内部的电路连接。详细地,在封装框架1范围内的封装基底2的一侧封装有集成无源器件区3,且集成无源器件区3与封装框架1形成至少两路连接电路,即封装框架1的合路点至少与两路电路连接;集成无源器件区3至少包括两个电路模块,例如匹配电路模块5和接地电路模块4。本实施例中的匹配电路模块5和接地电路模块4分别与封装框架1的焊盘6电连接,即匹配电路模块5和接地电路模块4的合路点形成于封装框架1的一个焊盘6。
具体地,接地电路模块4的一端通过谐振电感Ls和封装框架1电连接,匹配电路模块5的一端通过射频扼流圈RFC和封装框架1电连接。在本实施例中,封装框架1包括至少一个焊盘6,封装在器件内部的集成无源器件区3与焊盘6电连接,且集成无源器件区 3与封装框架1形成至少两路连接电路;其中匹配电路模块5和接地电路模块4分别与焊盘6形成一路电连接,具体地,匹配电路模块5的一端通过射频扼流圈RFC与焊盘6电连接,接地电路模块4的一端通过谐振电感Ls与焊盘6电连接。在本实施例中,匹配电路模块5连接的焊盘和接地电路模块4连接的焊盘接入相同固定电压,以获得相同的外接直流电压U,保证集成无源器件区3的稳定供电。
可选地,匹配电路模块5和接地电路模块4可以同时与同一个焊盘6电连接,也可以与不同的焊盘6电连接;如图2,当匹配电路模块5和接地电路模块4与不同的焊盘6电连接时,但这两个焊盘之间必须实现电连接,对于电连接位置以及电连接形式不做限制,以保证连接匹配电路模块5的射频扼流圈RFC的另一端和连接接地电路模块4的谐振电感Ls的另一端实现电连接即可,这种情况下,匹配电路模块5和接地电路模块4的合路点也形成于封装框架1。需要说明的是,图1和2只是示例性地示出了匹配电路模块5和接地电路模块4与封装框架1的某一侧部分焊盘6的连接方式,本发明实施例对与匹配电路模块5和接地电路模块4电连接的封装框架1的具体哪部分焊盘6所在区域设置不作限定。
可选地,可以通过在焊盘6与匹配电路模块5和接地电路模块4之间设置金属键合线或微带线实现电连接,分别实现射频扼流圈RFC和谐振电感Ls的功能。其中键合线或微带线的根数、长度、高度可以根据实际电路的频率等调整,优选地,保证射频扼流圈RFC的电感值大于谐振电感Ls的电感值。本实施例中,射频扼流圈RFC的电感值大于谐振电感Ls的电感值,可以使得该接地设置电路隔 绝交流信号,而通过直流偏置信号,防止匹配电路模块的信号通过接地电路模块。
匹配电路模块5的一端通过射频扼流圈RFC和封装框架1电连接,另一端连接负载电路,以实现对负载阻抗的匹配调节。
本实施例的器件结构在集成封装电子器件层面上实现直接接地功能设置,从而避免在印刷电路板上设置较长的偏置线、贴装较大电容实现接地功能而导致的集成电子器件应用时占用较大面积的问题。
在射频电路应用中,该结构可用于功率放大器的射频集成封装电子器件,具体如图2所示,在封装框架1范围内的封装基底2的一侧,即封装有集成无源器件区3的同一侧,还封装有有源器件区7,所述有源器件区7与所述集成无源器件区3电连接。示例性地,所述有源器件区7包括功率放大器芯片Die,用于将输入信号进行放大后输出,将直流能量转化为射频能量,功率放大器芯片Die可以包括氮化镓GaN、砷化镓GaAs高电子迁移率晶体管,LDMOS,GeSi等半导体芯片。有源器件区7与集成无源器件区3形成电连接,具体地,有源器件区7与匹配电路模块电连接5,通过集成无源器件区3的匹配电路模块5为有源器件区3输入稳定工作电压,另外,匹配电路模块5还可以将负载电路的负载阻抗匹配到有源器件区3的输出阻抗。例如,功率放大器芯片Die在实际工作时通过集成无源器件区3获得栅极偏置电压,匹配电路模块5为功率放大器芯片Die提供漏极偏置电路。还可以通过匹配电路模块5为功率放大器芯片Die将负载阻抗匹配到输出阻抗,以保证功率放大器Die具有较好的功放功率、效率以及线性度特性。该封装器件结构极大地减 小了目前功率放大器模块的尺寸,提高功率放大器应用电路的集成度。
在一种实施方式中,如图3所示,接地电路4的一端电连接谐振电感Ls,另一端电连接固定电压端。示例性地,接地电路模块4包括集成电容Cs,接地电路模块4的一端连接谐振电感Ls,另一端与所述封装基底2电位相等;在本实施例中,集成电容Cs的一端与谐振电感Ls电连接,另一端与封装基底2电位相等,例如封装基底2接地电位。在本实施例中,集成电容Cs的一端和谐振电感Ls的一端电连接,且构成串联谐振电路,谐振电感Ls的另一端与焊盘6电连接,且同时连接固定电压V,以在器件结构层面实现信号接地功能设置,并且串联谐振电路谐振在电路工作频率f
0。
在串联谐振电路中,谐振电感Ls的电感值为Ls,集成电容Cs的电容值为Cs,通过串联谐振电路的谐振频率为f
0,根据该串联谐振电路的工作条件,谐振频率f
0满足:
可选地,如图3所示,与谐振电感Ls电连接的焊盘6不仅连接固定电压V,还要同时和连接射频扼流圈RFC的焊盘6电连接,以实现匹配电路模块5和接地电路模块4在集成无源器件区3外同时具有相同的稳定电压。另外,当该集成封装电子器件结构内部封装有有源器件芯片时,该有源器件芯片在封装结构内部与集成无源器件区3电连接,以实现在集成封装电子器件内部利用集成无源器 件区3为有源器件芯片提供工作偏置电压。
由于目前集成无源器件成本较高,导致该集成封装电子器件的成本也较高,因此,如何实现在封装器件层面根据不同频率要求调试该集成封装器件内部的电路,以匹配不同的有源器件工频率,成为该集成封装结构进一步需要解决的问题。
在另一种实施方式中,如图4所示,接地电路模块4包括集成电容Cs和调试电感Ls2;在本实施例中,集成电容Cs和调试电感Ls2串联,即集成电容Cs的一端与谐振电感Ls电连接,另一端与调试电感Ls2的一端电连接,调试电感Ls2的另一端与封装基底2电位相等,例如封装基底2接地电位,则调试电感Ls2的另一端接地。在接地电路的集成电容Cs两端各连接一个电感,尤其是调试电感Ls2连接集成电容Cs和接地端之间,不仅可以减小整个接地电路的电容,还可以实现接地电路的修改调试,可实现该集成封装电子器件在一定的频率范围重复使用,增加了集成电路调节灵活性,极大地减少了目前射频电路应用的成本。在本实施例中,集成电容Cs的一端和谐振电感Ls的一端电连接,集成电容Cs的另一端与调试电感Ls2的一端电连接,且所述集成电容Cs、调试电感Ls2和所述谐振电感Ls构成串联谐振电路,谐振电感Ls的另一端与焊盘6电连接,且同时连接固定电压V,调试电感Ls2的另一端接地,以在器件结构层面实现信号接地功能设置,所述串联谐振电路谐振在频率f
0。
在串联谐振电路中,谐振电感Ls的电感值为Ls,集成电容Cs的电容值为Cs,调试电感Ls2的电感值为Ls2,通过串联谐振电路的谐振频率为f
0,根据该串联谐振电路的工作条件,谐振频率f
0满 足:
本实施例通过在接地电路模块内部设置集成电容Cs以及调试电感Ls2来实现该封装器件结构的电路调节灵活性,集成电容Cs、调试电感Ls2和所述谐振电感Ls构成串联谐振电路,使得该接地电路可以根据不同频率需要调试,增加了集成电路调节灵活性,提高集成器件的利用率,减少开发时间和成本。
可选地,本发明可以设置封装部件为QFN封装部件,QFN(Quad Flat No-lead package,方形扁平无引脚封装)封装部件属于表面贴装型封装之一,QFN封装是一种无引脚分装,QFN封装部件呈正方形或矩形,封装部件底部中央位置设置有一个大面积裸露的焊盘用来导热,围绕大焊盘的外围四周均设置有实现电气连接的导电焊盘,即上述实施例提到的焊盘3。也可以设置封装部件为DFN封装部件,DFN(Dual Flat No-lead package,双边扁平无引脚分装)封装部件与QFN封装部件的区别在于,DFN封装部件仅在封装部件的两侧设置实现电气连接的导电焊盘,封装部件也可以采用其它封装形式,本发明实施例对此不作限定。
需要说明的是,本发明实施例示附图只是示例性的表示区域以及各元件,并不代表显示该集成封装电子器件结构中各元件的实际尺寸。
本发明实施例提供的集成封装电子器件,通过在封装部件内封 装包括匹配电路模块和接地电路模块的集成无源器件区,匹配电路模块和接地电路模块同时和封装框架电连接,并通过分别射频扼流圈RFC和谐振电感Ls和相同的外部电压连接,接地电路模块的另一端与所述封装基底电位相等,在集成封装电子器件上实现直接接地功能设置,从而避免在印刷电路板上设置较长的偏置线、贴装较大的电容实现接地功能而导致的集成电子器件应用时占用较大面积的问题。还通过在接地电路模块内部设置集成电容Cs以及调试电感Ls2,接地电路的集成电容Cs两端各连接一个电感,实现该封装器件结构的电路调节灵活性,使得该接地电路可以根据不同频率需要调试,提高集成器件的利用率,减少开发时间和成本。
注意,上述仅为本发明的较佳实施例及所运用技术原理。本领域技术人员会理解,本发明不限于这里的特定实施例,对本领域技术人员来说能够进行各种明显的变化、重新调整和替代而不会脱离本发明的保护范围。因此,虽然通过以上实施例对本发明进行了较为详细的说明,但是本发明不仅仅限于以上实施例,在不脱离本发明构思的情况下,还可以包括更多其他等效实施例,而本发明的范围由所附的权利要求范围决定。
Claims (11)
- 一种集成封装电子器件结构,其特征在于,包括:封装部件,包括封装框架和封装基底;和至少两个电路模块,被封装于所述封装框架内的所述封装基底的一侧;所述封装框架包括所述至少两个电路模块的合路点。
- 根据权利要求1所述的集成封装电子器件结构,其特征在于,还包括:集成无源器件区,被封装于所述封装框架内的所述封装基底的一侧;所述至少两个电路模块位于所述集成无源器件区;所述集成无源器件区与所述封装框架形成至少两路连接电路。
- 根据权利要求2所述的集成封装电子器件结构,其特征在于,所述至少两个电路模块包括匹配电路模块和接地电路模块,所述匹配电路模块和接地电路模块分别与所述封装框架电连接,其中所述接地电路模块的一端通过谐振电感Ls与所述封装框架电连接,所述匹配电路模块的一端通过射频扼流圈RFC与所述封装框架电连接。
- 根据权利要求3所述的集成封装电子器件结构,其特征在于,所述接地电路模块包括集成电容Cs,所述集成电容Cs和所述谐振电感Ls电连接,且构成串联谐振电路。
- 根据权利要求4所述的集成封装电子器件结构,其特征在 于,所述接地电路模块的另一端与所述封装基底电位相等。
- 根据权利要求4所述的集成封装电子器件结构,其特征在于,所述接地电路模块还包括调试电感Ls2,所述调试电感Ls2与所述集成电容Cs串联,且所述集成电容Cs、调试电感Ls2和所述谐振电感Ls构成串联谐振电路。
- 根据权利要求3所述的集成封装电子器件结构,其特征在于,所述射频扼流圈RFC的电感值大于所述谐振电感Ls的电感值。
- 根据权利要求2所述的集成封装电子器件结构,其特征在于,还包括被封装于所述封装框架内的有源器件区,所述有源器件区与所述集成无源器件区电连接。
- 根据权利要求2所述的集成封装电子器件结构,其特征在于,所述匹配电路模块的另一端连接负载电路。
- 根据权利要求2-8任一项所述的集成封装电子器件结构,其特征在于,所述封装框架包括至少一个焊盘,所述匹配电路模块和所述接地电路模块分别与所述焊盘电连接;与所述匹配电路模块电连接的焊盘和与所述接地电路模块电连接的焊盘连接于相同固定电压。
- 根据权利要求10所述的集成封装电子器件结构,其特征在于,与所述匹配电路模块电连接的射频扼流圈RFC的另一端和与所述接地电路模块电连接的谐振电感Ls的另一端电连接。
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