WO2021022786A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2021022786A1
WO2021022786A1 PCT/CN2020/071042 CN2020071042W WO2021022786A1 WO 2021022786 A1 WO2021022786 A1 WO 2021022786A1 CN 2020071042 W CN2020071042 W CN 2020071042W WO 2021022786 A1 WO2021022786 A1 WO 2021022786A1
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WO
WIPO (PCT)
Prior art keywords
area
display panel
fan
display
out area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2020/071042
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English (en)
French (fr)
Inventor
胡泉
李松杉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Application filed by Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to US16/964,208 priority Critical patent/US11435792B2/en
Publication of WO2021022786A1 publication Critical patent/WO2021022786A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/189—Power distribution
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks

Definitions

  • This application relates to the display field, and in particular to a display panel and a display device.
  • the non-display area occupies a large part of the area of the display panel, and this area cannot display pictures, hindering the realization of the narrow frame of the display device.
  • the existing display panel has the problem that the non-display area is too large, which needs to be solved.
  • the present application provides a display panel and a display device to alleviate the problem that the non-display area of the existing display panel is too large.
  • the application provides a display panel, which includes:
  • the fan-out area and the display area at least partially overlap.
  • the display panel further includes a driving circuit, and the driving circuit is arranged in a display area that does not overlap the fan-out area.
  • the display panel includes a pixel definition layer, and the light-emitting area defined by the pixel definition layer at least partially overlaps the fan-out area.
  • the light-emitting area corresponding to at least one row of pixels is at least partially located in the fan-out area.
  • the light-emitting area corresponding to the last row of pixels is at least partially located in the fan-out area.
  • the light-emitting area corresponding to the last row of pixels is located in the fan-out area.
  • the display panel further includes a pixel electrode, and the pixel electrode is at least partially located in the fan-out area.
  • pixel electrodes corresponding to at least one row of pixels are at least partially located in the fan-out area.
  • the pixel electrode corresponding to the last row of pixels is at least partially located in the fan-out area.
  • the pixel electrode corresponding to the last row of pixels includes a first part and a second part, the first part is located in the fan-out area, and the second part is located in the area that does not overlap the fan-out area. Display area.
  • the pixel electrode corresponding to the last row of pixels is located in the fan-out area.
  • the display panel further includes a transition electrode, and the tail transition electrode is connected to the tail row pixel electrode and the drain corresponding to the tail row pixel.
  • the size of the transition electrode in the trailing row is larger than the size of the drain electrode connected to it.
  • transition electrodes which are respectively connected to their corresponding pixel electrodes and drains.
  • the area of the transition electrode in the trailing row is larger than the area of the remaining transition electrodes.
  • the size of the remaining transition electrodes is the same as the size of the drain connected to it.
  • the remaining transition electrode is located directly above the drain electrode connected to it.
  • the material of the transition electrode is the same as the material of the drain electrode.
  • the display panel includes a conversion via hole and a conversion line located in a fan-out area, the conversion line is provided in the same layer as the drain in the driving circuit, and a part of the conversion line passes through the The conversion via is connected to the gate drive circuit.
  • the present application provides a display device including a display panel including a display area and a fan-out area, and the fan-out area and the display area at least partially overlap.
  • the present application provides a display panel and a display device.
  • the display panel includes a display area and a fan-out area, the fan-out area and the display area at least partially overlap; by arranging at least part of the fan-out area in the display area,
  • the display area of the display panel is expanded to the fan-out area, which increases the area of the display area of the display panel and reduces the area of the non-display area occupied by the fan-out area, which alleviates the problem of excessively large non-display area of the display panel. Realize narrow border, full screen technology.
  • FIG. 1 is a schematic top view of a display panel provided by this application.
  • FIG. 2 is a schematic diagram of the first structure of a display panel provided by an embodiment of the application.
  • FIG. 3 is a schematic diagram of a second structure of a display panel provided by an embodiment of the application.
  • FIG. 4 is a schematic diagram of a third structure of a display panel provided by an embodiment of the application.
  • FIG. 5 is a schematic diagram of a fourth structure of a display panel provided by an embodiment of the application.
  • FIG. 6 is a schematic diagram of a fifth structure of a display panel provided by an embodiment of the application.
  • FIG. 7 is a schematic diagram of a sixth structure of a display panel provided by an embodiment of the application.
  • the present application provides a display panel to alleviate this problem.
  • the display panel 10 provided in the present application includes:
  • the fan-out area 102 and the display area 101 at least partially overlap.
  • This embodiment provides a display panel, which expands the display area of the display panel to the fan-out area by arranging at least part of the fan-out area in the display area, thereby increasing the area of the display area of the display panel and reducing
  • the area of the non-display area occupied by the fan-out area is to alleviate the problem of the excessively large area of the non-display area of the display panel, and further realize the narrow bezel and full-screen technology.
  • the display panel 10 provided by the present application is an OLED display panel. As shown in FIGS. 2 and 3, the OLED display panel 10 includes:
  • the substrate 110 includes a glass substrate and a flexible substrate.
  • the glass substrate is made of rigid glass material and is located at the bottom of the display panel; the flexible substrate is generally polyimide or polyethylene terephthalate. Other organic polymer materials are formed on a glass substrate.
  • the buffer layer 120 is used to block water and oxygen from entering the display panel 10 to avoid reducing the service life of the display panel; at the same time, it prevents impurity particles from diffusing into the thin film transistor to avoid reducing leakage current.
  • the buffer layer generally adopts a laminated structure of silicon nitride (SiN x ) and silicon oxide (SiO x ). Silicon nitride has a strong ion barrier and a good water and oxygen barrier. The interface between silicon oxide and polysilicon is wetted It has better performance and can be better used as the base material for forming the active layer.
  • the thin-film crystal optical layer 130 includes an active layer, which is patterned to form an active region 131.
  • the active region 131 is doped to form a channel region and a doped region.
  • the material of the active layer is generally amorphous silicon or polysilicon;
  • a gate insulating layer 132 covering the buffer layer 120 and the active layer.
  • the material of the first gate insulating layer 132 is silicon oxide.
  • the surface of the silicon oxide and polysilicon has good grain boundary matching, stress matching and good step coverage;
  • the first gate layer is formed on the first gate insulating layer 132, and is patterned with a first gate 1331 located in the display area not overlapping the fan-out area and a gate lead 1333 located in the fan-out area 102 ,
  • the material of the first gate layer is generally molybdenum (Mo);
  • the second gate insulating layer 134 covers the first gate insulating layer 132 and the first gate layer, and its material is silicon nitride;
  • the interlayer insulating layer 135 covers the second gate insulating layer 134 and the second gate layer are generally a laminated structure of silicon nitride (SiN x ) and silicon oxide (SiO x );
  • the source and drain layer 136 is generally a metal titanium/aluminum/titanium (Ti/Al/Ti) laminated structure;
  • the chemical layer 137 which covers the interlayer insulating layer 135 and the source/drain layer 136, also functions as an insulation, and its material is generally silicon nitride.
  • the active layer, the first gate layer, the second gate layer, and the source and drain layers together constitute the drive circuit of the display panel, and part of the conversion line 1363 passes through the conversion via hole. It is connected to the gate lead 1333, and then to the gate driving circuit.
  • the planarization layer 140 is formed on the passivation layer and is used to planarize the thin film transistor layer 130 to provide a planar substrate for subsequent preparation of the pixel electrode, and its material is organic.
  • the pixel electrode layer is formed on the planarization layer 140.
  • the pixel electrode 150 is patterned and formed.
  • the pixel electrode 150 includes the last row pixel electrode 151 corresponding to the last row of pixels, and the pixel electrode 152 corresponding to the other rows of pixels; as shown in FIGS. 2 and 3 As shown, the pixel electrode 151 of the last row extends in the direction of the fan-out region 102, and the size of the pixel electrode 151 of the last row is larger than the size of the pixel electrodes 152 of the other rows; connection.
  • the pixel defining layer 160 is formed on the planarization layer 140 and the pixel electrode layer, and the light-emitting area 161 formed by patterning is used to define the pixel area.
  • the OLED display panel in this embodiment can be a top-gate structure as shown in FIG. 1, or a bottom-gate structure; it can be a double-gate structure as shown in FIG. 3, or a single-gate structure; the pixel electrode can be Connecting to the drain can also be connected to the source, which is not limited here.
  • the light-emitting area defined by the pixel definition layer and the fan-out area at least partially overlap. It may be that the light-emitting areas corresponding to multiple rows of pixels all overlap with the fan-out area, or only the light-emitting areas corresponding to one row of pixels overlap the fan-out area. However, there is at least a row of pixels corresponding to the light-emitting area, at least part of which is located in the fan-out area.
  • the row of pixels is a row of pixels close to the lower border of the display panel, that is, the last row of pixels.
  • the light-emitting area corresponding to the last row of pixels may be partly located in the fan-out area, or may be all located in the fan-out area.
  • the light-emitting area corresponding to the last row of pixels is located in the fan-out area 102, and the corresponding tail row pixel electrode 151 includes a first part and a second part, and the first part is located in the fan-out area 102. , The second part is located in the display area that does not overlap the fan-out area.
  • the area of the overlapping portion of the display area 101 and the fan-out area 102 is the sum of the area occupied by the part of the light-emitting area in the fan-out area 102 and the display area on the right side; compared with the prior art, the embodiment of the present application is increased
  • the area of the display area is enlarged, and the enlarged area is the area where the display area and the fan-out area overlap as shown in the figure, and the area of the non-display area is reduced, and the reduced area is the display area and the fan-out area overlap as shown in the figure.
  • the area of the part of the display panel has alleviated the problem of too large non-display area of the display panel, and further realized the narrow bezel and full screen technology.
  • the light-emitting areas corresponding to the last row of pixels are all located in the fan-out area 102, and the corresponding tail row pixel electrode 151 includes a first part and a second part, and the first part is located in the fan-out area 102. Inside, the second part is located in the display area that does not overlap the fan-out area.
  • the embodiment of the present application increases the area of the display area. The increased area is the area where the display area and the fan-out area overlap as shown in the figure, and the area of the non-display area is reduced.
  • the reduced area is As shown in the figure, the area of the overlapping part of the display area and the fan-out area alleviates the problem of excessively large non-display area of the display panel, and further realizes the narrow bezel and full screen technology.
  • this embodiment further expands the area of the overlapped portion of the display area and the fan-out area, that is, further expands the area of the display area of the display panel, and reduces the size of the non-display area. Area, and further realize the narrow frame, full screen technology.
  • the OLED display panel 10 includes the one shown in FIG. In addition to the structure, it also includes a transition electrode layer, which is formed on the first planarization layer 140, and is patterned to form a transition electrode 170.
  • the transition electrode 170 includes a tail transition electrode 171 corresponding to a tail row pixel, and a second tail row pixel (ie The second last row transition electrode 172 corresponding to the second row of pixels adjacent to the last row of pixels, and the remaining row transition electrodes 173 corresponding to the remaining rows of pixels, wherein the second trailing row transition electrode 172 and the remaining row transition electrodes 173 are located at the drain 1362
  • the size of the second tail row transition electrode 172 and the remaining row transition electrodes 173 are the same as that of the drain 1362.
  • the size of the tail row transition electrode 171 is larger than the size of the second tail row transition electrode 172.
  • the size of the transition electrode 170 The material is the same as that of the source and drain layers; the second planarization layer 180 covers the transition electrode layer and the first planarization layer 140. The material and function of the second planarization layer 180 are the same as those of the first planarization layer 140. The functions are the same; the transition electrode is connected to its corresponding pixel electrode and drain.
  • the pixel electrode 150 includes the last row pixel electrode 151 corresponding to the last row pixel, the pixel electrode 151 corresponding to the second last row pixel, and the pixel electrode 153 corresponding to the remaining rows of pixels.
  • the light-emitting area defined by the pixel definition layer and the fan-out area at least partially overlap. It may be that the light-emitting areas corresponding to multiple rows of pixels all overlap with the fan-out area, or only the light-emitting areas corresponding to one row of pixels overlap the fan-out area. However, there is at least a row of pixels corresponding to the light-emitting area, at least part of which is located in the fan-out area, and the row of pixels is a row of pixels close to the lower border of the display panel, that is, the last row of pixels.
  • the light-emitting area corresponding to the last row of pixels may be partly located in the fan-out area, or may be all located in the fan-out area.
  • the light-emitting area corresponding to the last row of pixels is partly located in the fan-out area 102, and the corresponding tail-row pixel electrode 151 is also partly located in the fan-out area 102, and the corresponding tail-row transition electrode 171 Located in the display area 101.
  • the trailing transition electrode 171 can also extend to a part of the fan-out area 102, which is not limited here.
  • the area of the overlapping part of the display area 101 and the fan-out area 102 at this time is the area occupied by the part of the light-emitting area in the fan-out area 102 and the display area on the right
  • the embodiment of the present application increases the area of the display area, and the increased area is the area of the overlapped part of the display area and the fan-out area as shown in the figure, which reduces the area of the non-display area and reduces
  • the area of is the area of the part where the display area and the fan-out area overlap as shown in the figure, which alleviates the problem of excessively large non-display area of the display panel, and further realizes the narrow bezel and full screen technology.
  • a transition electrode is added. Without changing the size of the pixel electrode, through the transition of the transition electrode, the last row of pixels is shifted and placed in the fan-out area, thereby increasing the area of the display area and reducing the size of the non-display area. area.
  • the light-emitting areas corresponding to the last row of pixels are all located in the fan-out area 102, and the corresponding tail row pixel electrodes 151 are also all located in the fan-out area 102, and the corresponding tail row transition electrode 171 includes a first part and a second part.
  • the first part is located in the fan-out area 102
  • the second part is located in a display area that does not overlap the fan-out area.
  • the embodiment of the present application increases the area of the display area.
  • the increased area is the area where the display area and the fan-out area overlap as shown in the figure, and the area of the non-display area is reduced.
  • the reduced area is As shown in the figure, the area of the overlapping part of the display area and the fan-out area alleviates the problem of excessively large non-display area of the display panel, and further realizes the narrow bezel and full screen technology.
  • this embodiment further enlarges the area of the overlapping part of the display area and the fan-out area, that is, further enlarges the area of the display area of the display panel, and reduces the size of the non-display area. Area, and further realize the narrow frame, full screen technology.
  • the light-emitting areas corresponding to the last row of pixels are all located in the fan-out area 102, and the corresponding tail row pixel electrodes 151 are all located in the fan-out area 102.
  • the corresponding tail row transition electrode It includes a first part and a second part. The first part is located in the fan-out area 102, and the second part is located in the display area that does not overlap the fan-out area.
  • the portion of the light-emitting area corresponding to the second tail row of pixels is located in the fan-out area 102, and the corresponding second tail row of pixel electrode 152 includes a first portion and a second portion.
  • the first portion is located in the fan-out area 102, and the second portion is located in the fan-out area 102.
  • the corresponding second trailing row transition electrode 172 is located in the display area that does not overlap the fan-out area 102.
  • the embodiment of the present application increases the area of the display area.
  • the increased area is the area where the display area and the fan-out area overlap as shown in the figure, and the area of the non-display area is reduced.
  • the reduced area is As shown in the figure, the area of the overlapping part of the display area and the fan-out area alleviates the problem of excessively large non-display area of the display panel, and further realizes the narrow bezel and full screen technology.
  • this embodiment uses the extension of the last row of pixel electrodes to arrange all the light-emitting areas corresponding to the last row of pixels in the fan-out area, and at the same time through the extension of the second last row of transition electrodes , Arranging the part of the light-emitting area corresponding to the second last row of pixels in the fan-out area further enlarges the area of the overlapping part of the display area and the fan-out area, that is, further enlarges the area of the display area of the display panel and reduces the non-display area
  • the area of the narrow frame, full screen technology has been further realized.
  • the light-emitting areas corresponding to the last row of pixels are all located in the fan-out area 102, and the corresponding tail row pixel electrodes 151 are all located in the fan-out area 102.
  • the corresponding tail row transition electrode 171 includes a first part and a second part. The first part is located in the fan-out area 102, and the second part is located in a display area that does not overlap the fan-out area.
  • the light-emitting areas corresponding to the second tail row pixels are all located in the fan-out area 102.
  • the corresponding second tail row pixel electrode 152 includes a first part and a second part.
  • the first part is located in the fan-out area 102, and the second part is located in the fan-out area 102.
  • the corresponding second trailing row transition electrode 172 is located in the display area that does not overlap the fan-out area 102.
  • the embodiment of the present application increases the area of the display area.
  • the increased area is the area where the display area and the fan-out area overlap as shown in the figure, and the area of the non-display area is reduced.
  • the reduced area is As shown in the figure, the area of the overlapping part of the display area and the fan-out area alleviates the problem of excessively large non-display area of the display panel, and further realizes the narrow bezel and full screen technology.
  • this embodiment uses the extension of the second tail row transition electrode to set all the light-emitting areas corresponding to the second tail row pixels in the fan-out area, which further expands the display
  • the area of the overlapped part of the fan-out area and the fan-out area further expands the area of the display area of the display panel, reduces the area of the non-display area, and further realizes the narrow bezel and full-screen technology.
  • an embodiment of the present application provides a display device that includes the display panel as described in any of the above embodiments, the display panel includes a display area and a fan-out area, and the fan-out area and the display area at least partially overlap.
  • This embodiment provides a display device, which includes a display panel.
  • the display panel expands the display area of the display panel to the fan-out area by arranging at least part of the fan-out area in the display area, thereby increasing the display area of the display panel. Area, reducing the area of the non-display area occupied by the fan-out area, that is, alleviating the problem of excessively large non-display area of the display panel, and further realizing the narrow bezel and full-screen technology.
  • the display panel further includes a driving circuit, and the driving circuit is arranged in a display area that does not overlap the fan-out area.
  • the display panel further includes a pixel definition layer, and the light-emitting area defined by the pixel definition layer and the fan-out area at least partially overlap.
  • the light-emitting area corresponding to at least one row of pixels is at least partially located in the fan-out area.
  • the light-emitting area corresponding to the last row of pixels is at least partially located in the fan-out area.
  • the light-emitting area corresponding to the last row of pixels is located in the fan-out area.
  • the display panel further includes a pixel electrode, and the pixel electrode is at least partially located in the fan-out area.
  • the pixel electrodes corresponding to at least one row of pixels are at least partially located in the fan-out area.
  • the pixel electrode corresponding to the last row of pixels is at least partially located in the fan-out area.
  • the pixel electrode corresponding to the last row of pixels includes a first part and a second part, the first part is located in the fan-out area, and the second part is located in the display area that does not overlap the fan-out area.
  • the pixel electrode corresponding to the last row of pixels is located in the fan-out area.
  • the display panel further includes a transition electrode, and the tail transition electrode is connected to the tail pixel electrode and the drain corresponding to the tail pixel.
  • the size of the transition electrode in the trailing row is larger than the size of the drain connected to it.
  • transition electrodes which are connected to their corresponding pixel electrodes and drains respectively.
  • the area of the transition electrode in the trailing row is larger than the area of the remaining transition electrodes.
  • the size of the remaining transition electrodes is the same as the size of the drain connected to it.
  • the remaining transition electrode is located directly above the drain connected to it.
  • the material of the transition electrode and the material of the drain are the same.
  • the display panel includes a conversion via hole and a conversion line located in the fan-out area, the conversion line and the drain in the driving circuit are arranged in the same layer, and some conversion lines are connected to the gate driving circuit through the conversion via.
  • the present application provides a display panel and a display device.
  • the display panel includes a display area and a fan-out area, and the fan-out area and the display area at least partially overlap.
  • the fan-out area By migrating part of the light-emitting area of at least part of the pixel to above the fan-out area circuit, at least part of the fan-out area is arranged in the display area, so that the display area of the display panel is expanded to the fan-out area, and the display area of the display panel is increased.
  • Area reducing the area of the non-display area occupied by the fan-out area, that is, alleviating the problem of excessively large non-display area of the display panel, and further realizing the narrow bezel and full-screen technology.

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Abstract

本申请提供一种显示面板及显示装置，其显示面板包括显示区和扇出区，所述扇出区和所述显示区至少部分重合；通过将至少部分扇出区设置于显示区内，使显示面板的显示区扩大到扇出区，增大了显示面板显示区的面积，减小了扇出区所占非显示区的面积，即缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。

Description

显示面板及显示装置
本申请要求于2019年8月2日提交中国专利局、申请号为201910710037.6、发明名称为“显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示领域，尤其涉及一种显示面板及显示装置。
 背景技术
随着显示技术的逐渐发展，全面屏和窄边框已经成为未来显示领域的主流趋势。
在传统的面板设计中，由于显示面板显示区下方非显示区内电路的设计，使得非显示区占据了显示面板极大一部分的面积，该面积无法显示画面，阻碍了显示器件窄边框的实现。
因此，现有显示面板存在非显示区面积过大的问题，需要解决。
 技术问题
本申请提供一种显示面板及显示装置，以缓解现有显示面板存在非显示区面积过大的问题。
 技术解决方案
本申请提供一种显示面板，其包括：
显示区；
扇出区；
所述扇出区和所述显示区至少部分重合。
在本申请提供的显示面板中，所述显示面板还包括驱动电路，所述驱动电路设置在未与扇出区重合的显示区内。
在本申请提供的显示面板中，所述显示面板包括像素定义层，所述像素定义层定义的发光区与所述扇出区至少部分重合。
在本申请提供的显示面板中，至少一行像素对应的发光区，至少部分位于所述扇出区内。
在本申请提供的显示面板中，尾行像素对应的发光区，至少部分位于所述扇出区内。
在本申请提供的显示面板中，尾行像素对应的发光区位于所述扇出区内。
在本申请提供的显示面板中，所述显示面板还包括像素电极，所述像素电极至少部分位于所述扇出区内。
在本申请提供的显示面板中，至少一行像素对应的像素电极，至少部分位于所述扇出区内。
在本申请提供的显示面板中，尾行像素对应的像素电极，至少部分位于所述扇出区内。
在本申请提供的显示面板中，所述尾行像素对应的像素电极包括第一部分和第二部分，所述第一部分位于所述扇出区内，所述第二部分位于未与扇出区重合的显示区内。
在本申请提供的显示面板中，所述尾行像素对应的像素电极位于所述扇出区内。
在本申请提供的显示面板中，所述显示面板还包括过渡电极，尾行过渡电极连接所述尾行像素电极和所述尾行像素对应的漏极。
在本申请提供的显示面板中，所述尾行过渡电极的尺寸，大于与之相连的所述漏极的尺寸。
在本申请提供的显示面板中，存在其余过渡电极，分别连接其对应的像素电极和漏极。
在本申请提供的显示面板中，所述尾行过渡电极的面积，大于所述其余过渡电极的面积。
在本申请提供的显示面板中，所述其余过渡电极的尺寸，和与之相连的所述漏极的尺寸相同。
在本申请提供的显示面板中，所述其余过渡电极位于与之相连的所述漏极的正上方。
在本申请提供的显示面板中，所述过渡电极的材料和所述漏极的材料形同。
在本申请提供的显示面板中，所述显示面板包括位于扇出区内的转换过孔和转换线，所述转换线与所述驱动电路内的漏极同层设置，部分转换线通过所述转换过孔与栅极驱动电路连接。
同时，本申请提供一种显示装置，其包括显示面板，所述显示面板包括显示区和扇出区，所述扇出区和所述显示区至少部分重合。
 有益效果
本申请提供一种显示面板和显示装置，其显示面板包括显示区和扇出区，所述扇出区和所述显示区至少部分重合；通过将至少部分扇出区设置于显示区内，使显示面板的显示区扩大到扇出区，增大了显示面板显示区的面积，减小了扇出区所占非显示区的面积，即缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。
 附图说明
图1为本申请提供的显示面板的俯视示意图。
图2为本申请实施例提供的显示面板的第一种结构示意图。
图3为本申请实施例提供的显示面板的第二种结构示意图。
图4为本申请实施例提供的显示面板的第三种结构示意图。
图5为本申请实施例提供的显示面板的第四种结构示意图。
图6为本申请实施例提供的显示面板的第五种结构示意图。
图7为本申请实施例提供的显示面板的第六种结构示意图。
 本发明的实施方式
针对现有显示面板存在非显示区面积过大的问题，本申请提供一种显示面板可以缓解这个问题。
在一种实施例中，如图1所示，本申请提供显示面板10包括：
显示区101；
扇出区102；
扇出区102和显示区101至少部分重合。
本实施例提供一种显示面板，该显示面板通过将至少部分扇出区设置于显示区内，使显示面板的显示区扩大到扇出区，增大了显示面板显示区的面积，减小了扇出区所占非显示区的面积，即缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。
在一种实施例中，本申请提供的显示面板10为OLED显示面板，如图2和图3所示，所述OLED显示面板10包括：
衬底110，包括玻璃衬底和柔性衬底，玻璃衬底为刚性的玻璃材料制成，在于显示面板的最下方；柔性衬底一般为聚酰亚胺、聚对苯二甲酸乙二醇酯等有机聚合物材料，形成于玻璃衬底上。
缓冲层120，用于阻隔水氧进入显示面板10，避免降低显示面板的使用寿命；同时防止杂质粒子扩散到薄膜晶体管中，避免降低漏电流。缓冲层一般采用氮化硅（SiN x）和氧化硅（SiO x）的叠层结构，氮化硅具有较强的离子阻隔能力和很好的水氧隔绝能力，氧化硅与多晶硅的界面润湿性较好，能更好的作为形成有源层的基底材料。
薄膜晶体光层130，包括：有源层，图案化形成有源区131，有源区131掺杂形成有沟道区和掺杂区，有源层的材料一般为非晶硅或多晶硅；第一栅极绝缘层132，覆盖缓冲层120和有源层，第一栅极绝缘层132的材料为氧化硅，氧化硅与多晶硅表面具有良好的晶界匹配、应力匹配和良好的台阶覆盖性；第一栅极层，形成于第一栅极绝缘层132上，图案化形成有位于未与扇出区重合的显示区内的第一栅极1331和位于扇出区102内的栅极引线1333，第一栅极层的材料一般为金属钼（Mo）；第二栅极绝缘层134，覆盖第一栅极绝缘层132和第一栅极层，其材料为氮化硅；第二栅极层，形成于第二栅极绝缘层134上，图案形成有第二栅极1332, 第二栅极层的材料一般为金属钼（Mo）；层间绝缘层135，覆盖第二栅极绝缘层134和第二栅极层，一般为氮化硅（SiN x）和氧化硅（SiO x）的叠层结构；源漏极层136，形成于层间绝缘层135上，图案化形成有位于显示区101内的源极1361、漏极1362，以及位于扇出区102内的转换线1363，源漏极层136一般为金属钛/铝/钛（Ti/Al/Ti）的叠层结构；钝化层137，覆盖层间绝缘层135和源漏极层136，同样起到绝缘的作用，其材料一般为氮化硅。未与扇出区重合的显示区内，有源层、第一栅极层、第二栅极层、源漏极层共同构成了显示面板的驱动电路，部分转换线1363通过所述转换过孔与栅极引线1333连接，进而与栅极驱动电路连接。
平坦化层140，形成于钝化层之上，用于平坦化薄膜晶体管层130，为后续像素电极的制备提供平坦的基底，其材料为有机物。
像素电极层，形成于平坦化层140上，图案化形成有像素电极150，像素电极150包括尾行像素对应的尾行像素电极151，以及其他行像素对应的像素电极152；如图2和图3所示，尾行像素电极151往扇出区102的方向延伸，尾行像素电极151的尺寸大于其他行像素电极152的尺寸；像素电极150通过平坦化层140和钝化层137内的过孔与漏极连接。
像素定义层160，形成于平坦化层140和像素电极层上，图案化形成有的发光区161，发光区161用于限定像素区域。
以及形成于发光区161内的材料层，和形成于像素定义层上的支撑柱、公共电极层和封装层。（未画出）
本实施例中的OLED显示面板可以是如图1所示的顶栅结构，也可以是底栅结构；可以是如图3所示的双栅结构，也可以是单栅结构；像素电极可以是连接漏极，也可以是连接源极，在此不做限定。
在一种实施例中，像素定义层定义的发光区与扇出区至少部分重合。可以是多行像素对应的发光区均与扇出区重合，也可以只有一行像素对应的发光区域扇出区重合。但至少存在一行像素对应的发光区，至少部分位于扇出区内，该行像素为靠近显示面板下边框的一行像素，即尾行像素。尾行像素对应的发光区可以部分位于扇出区内，也可以全部位于扇出区内。
在一种实施例中，如图2所示，尾行像素对应的发光区部分位于扇出区102内，相对应的尾行像素电极151包括第一部分和第二部分，第一部分位于扇出区102内，第二部分位于未与扇出区重合的显示区内。此时显示区101与扇出区102重合部分的面积，即为位于扇出区102内的部分发光区及其右侧显示区所占面积的总和；相对于现有技术，本申请实施例增大了显示区的面积，增大的面积为如图所示显示区与扇出区重合部分的面积，缩小了非显示区的面积，缩小的面积为如图所示显示区与扇出区重合的部分的面积，缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。
在另一种实施例中，如图3所示，尾行像素对应的发光区全部位于扇出区102内，相对应的尾行像素电极151包括第一部分和第二部分，第一部分位于扇出区102内，第二部分位于未与扇出区重合的显示区内。相对于现有技术，本申请实施例增大了显示区的面积，增大的面积为如图所示显示区与扇出区重合部分的面积，缩小了非显示区的面积，缩小的面积为如图所示显示区与扇出区重合的部分的面积，缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。相比与如图2中（a）所示的实施例，本实施例进一步扩大了显示区与扇出区重合部分的面积，即进一步扩大了显示面板显示区的面积，缩小了非显示区的面积，进一步实现了窄边框、全面屏技术。
在另一种实施例中，如图4至图7所示，为本申请提供的OLED显示面板的另一种结构示意图，在本实施例中，OLED显示面板10除包括如图2所示的结构之外，还包括：过渡电极层，过渡电极层形成于第一平坦化层140上，图案化形成过渡电极170，过渡电极170包括尾行像素对应的尾行过渡电极171、第二尾行像素（即与尾行像素相邻的倒数第二行像素）对应的第二尾行过渡电极172、以及其余行像素对应的其余行过渡电极173，其中第二尾行过渡电极172和其余行过渡电极173位于漏极1362的正上方，且第二尾行过渡电极172、其余行过渡电极173的尺寸相同，并与漏极1362的尺寸相同，尾行过渡电极171的尺寸大于第二尾行过渡电极172的尺寸，过渡电极170的材料与源漏极层的材料相同；第二平坦化层180，覆盖过渡电极层和第一平坦化层140，第二平坦化层180的材料和作用，与第一平坦化层140的材料和作用均相同；过渡电极连接其对应的像素电极和漏极。在本实施例中，像素电极150包括尾行像素对应的尾行像素电极151、第二尾行像素对应的像素电极151、以及其余行像素对应的像素电极153。
在一种实施例中，像素定义层定义的发光区与扇出区至少部分重合。可以是多行像素对应的发光区均与扇出区重合，也可以只有一行像素对应的发光区域扇出区重合。但至少存在一行像素对应的发光区，至少部分位于扇出区内，该行像素为靠近显示面板下边框的一行像素，即尾行像素。尾行像素对应的发光区可以部分位于扇出区内，也可以全部位于扇出区内。
在一种实施例中，如图4所示，尾行像素对应的发光区部分位于扇出区102内，相对应的尾行像素电极151同样部分位于扇出区102内，相对应的尾行过渡电极171位于显示区101内。在本实施例中，尾行过渡电极171也可以延伸至部分位于扇出区102内，在此不做限制。与如图2中（a）对应的实施例类似，此时显示区101与扇出区102重合部分的面积，即为位于扇出区102内的部分发光区及其右侧显示区所占面积的总和；相对于现有技术，本申请实施例增大了显示区的面积，增大的面积为如图所示显示区与扇出区重合部分的面积，缩小了非显示区的面积，缩小的面积为如图所示显示区与扇出区重合的部分的面积，缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。本实施例增加了过渡电极，在不改变像素电极设置大小的情况下，通过过渡电极的过渡，将尾行像素部分迁移设置于扇出区内，进而增大显示区的面积，缩小非显示区的面积。
在另一种实施例中，如图5所示，尾行像素对应的发光区全部位于扇出区102内，相对应的尾行像素电极151也全部位于扇出区102内，相对应的尾行过渡电极171包括第一部分和第二部分，第一部分位于扇出区102内，第二部分位于未与扇出区重合的显示区内。相对于现有技术，本申请实施例增大了显示区的面积，增大的面积为如图所示显示区与扇出区重合部分的面积，缩小了非显示区的面积，缩小的面积为如图所示显示区与扇出区重合的部分的面积，缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。相比与如图3中（a）所示的实施例，本实施例进一步扩大了显示区与扇出区重合部分的面积，即进一步扩大了显示面板显示区的面积，缩小了非显示区的面积，进一步实现了窄边框、全面屏技术。
在又一种实施例中，如图6所示，尾行像素对应的发光区全部位于扇出区102内，相对应的尾行像素电极151也全部位于扇出区102内，相对应的尾行过渡电极包括第一部分和第二部分，第一部分位于扇出区102内，第二部分位于未与扇出区重合的显示区内。第二尾行像素对应的发光区部分位于扇出区102内，相对应的第二尾行像素电极152包括第一部分和第二部分，第一部分位于扇出区102内，第二部分位于未与扇出区重合的显示区内，相对应的第二尾行过渡电极172位于未与扇出区102重合的显示区内。相对于现有技术，本申请实施例增大了显示区的面积，增大的面积为如图所示显示区与扇出区重合部分的面积，缩小了非显示区的面积，缩小的面积为如图所示显示区与扇出区重合的部分的面积，缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。相比与如图3中（b）所示的实施例，本实施例通过尾行像素电极的延伸，将尾行像素对应的发光区全部设置于扇出区内，同时通过第二尾行过渡电极的延伸，将第二尾行像素对应的发光区部分设置于扇出区内，更进一步扩大了显示区与扇出区重合部分的面积，即更进一步扩大了显示面板显示区的面积，缩小了非显示区的面积，更进一步实现了窄边框、全面屏技术。
在还一种实施例中，如图7所示，尾行像素对应的发光区全部位于扇出区102内，相对应的尾行像素电极151也全部位于扇出区102内，相对应的尾行过渡电极171包括第一部分和第二部分，第一部分位于扇出区102内，第二部分位于未与扇出区重合的显示区内。第二尾行像素对应的发光区全部位于扇出区102内，相对应的第二尾行像素电极152包括第一部分和第二部分，第一部分位于扇出区102内，第二部分位于未与扇出区重合的显示区内，相对应的第二尾行过渡电极172位于未与扇出区102重合的显示区内。相对于现有技术，本申请实施例增大了显示区的面积，增大的面积为如图所示显示区与扇出区重合部分的面积，缩小了非显示区的面积，缩小的面积为如图所示显示区与扇出区重合的部分的面积，缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。相比与如图3中（c）所示的实施例，本实施例通过第二尾行过渡电极的延伸，将第二尾行像素对应的发光区全部设置于扇出区内，再次进一步扩大了显示区与扇出区重合部分的面积，即再次进一步扩大了显示面板显示区的面积，缩小了非显示区的面积，更进一步实现了窄边框、全面屏技术。
同时，本申请实施例提供一种显示装置，该显示装置包括如上述任意实施例中所述的显示面板，所述显示面板包括显示区和扇出区，扇出区和显示区至少部分重合。
本实施例提供一种显示装置，其包括显示面板，该显示面板通过将至少部分扇出区设置于显示区内，使显示面板的显示区扩大到扇出区，增大了显示面板显示区的面积，减小了扇出区所占非显示区的面积，即缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。
在一种实施例中，显示面板还包括驱动电路，驱动电路设置在未与扇出区重合的显示区内。
在一种实施例中，显示面板还包括像素定义层，像素定义层定义的发光区与扇出区至少部分重合。
在一种实施例中，至少一行像素对应的发光区，至少部分位于扇出区内。
在一种实施例中，尾行像素对应的发光区，至少部分位于扇出区内。
在一种实施例中，尾行像素对应的发光区位于扇出区内。
在一种实施例中，显示面板还包括像素电极，像素电极至少部分位于扇出区内。
在一种实施例中，至少一行像素对应的像素电极，至少部分位于扇出区内。
在一种实施例中，尾行像素对应的像素电极，至少部分位于扇出区内。
在一种实施例中，尾行像素对应的像素电极包括第一部分和第二部分，第一部分位于所述扇出区内，第二部分位于未与扇出区重合的显示区内。
在一种实施例中，尾行像素对应的像素电极位于扇出区内。
在一种实施例中，显示面板还包括过渡电极，尾行过渡电极连接尾行像素电极和尾行像素对应的漏极。
在一种实施例中，尾行过渡电极的尺寸，大于与之相连的所述漏极的尺寸。
在一种实施例中，存在其余过渡电极，分别连接其对应的像素电极和漏极。
在一种实施例中，尾行过渡电极的面积，大于其余过渡电极的面积。
在一种实施例中，其余过渡电极的尺寸，和与之相连的漏极的尺寸相同。
在一种实施例中，其余过渡电极位于与之相连的漏极的正上方。
在一种实施例中，过渡电极的材料和漏极的材料形同。
在一种实施例中，显示面板包括位于扇出区内的转换过孔和转换线，转换线与驱动电路内的漏极同层设置，部分转换线通过转换过孔与栅极驱动电路连接。
根据上述实施例可知：
本申请提供一种显示面板及显示装置，其显示面板，该显示面板包括显示区和扇出区，扇出区和显示区至少部分重合。通过将至少部分像素的部分发光区迁移至扇出区电路的上方，将至少部分扇出区设置于显示区内，使显示面板的显示区扩大到扇出区，增大了显示面板显示区的面积，减小了扇出区所占非显示区的面积，即缓解了显示面板非显示区面积过大的问题，进一步实现了窄边框、全面屏技术。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板，其包括：
    显示区；
    扇出区；
    所述扇出区和所述显示区至少部分重合。
  2. 如权利要求1所述的显示面板，其中，所述显示面板还包括驱动电路，所述驱动电路设置在未与扇出区重合的显示区内。
  3. 如权利要求2所述的显示面板，其中，所述显示面板包括像素定义层，所述像素定义层定义的发光区与所述扇出区至少部分重合。
  4. 如权利要求3所述的显示面板，其中，至少一行像素对应的发光区，至少部分位于所述扇出区内。
  5. 如权利要求4所述的显示面板，其中，尾行像素对应的发光区，至少部分位于所述扇出区内。
  6. 如权利要求5所述的显示面板，其中，尾行像素对应的发光区位于所述扇出区内。
  7. 如权利要求3所述的显示面板，其中，所述显示面板还包括像素电极，所述像素电极至少部分位于所述扇出区内。
  8. 如权利要求7所述的显示面板，其中，至少一行像素对应的像素电极，至少部分位于所述扇出区内。
  9. 如权利要求8所述的显示面板，其中，尾行像素对应的像素电极，至少部分位于所述扇出区内。
  10. 如权利要求9所述的显示面板，其中，所述尾行像素对应的像素电极包括第一部分和第二部分，所述第一部分位于所述扇出区内，所述第二部分位于未与扇出区重合的显示区内。
  11. 如权利要求9所述的显示面板，其中，所述尾行像素对应的像素电极位于所述扇出区内。
  12. 如权利要求11所述的显示面板，其中，所述显示面板还包括过渡电极，尾行过渡电极连接所述尾行像素电极和所述尾行像素对应的漏极。
  13. 如权利要求12所述的显示面板，其中，所述尾行过渡电极的尺寸，大于与之相连的所述漏极的尺寸。
  14. 如权利要求12所述的显示面板，其中，存在其余过渡电极，分别连接其对应的像素电极和漏极。
  15. 如权利要求14所述的显示面板，其中，所述尾行过渡电极的面积，大于所述其余过渡电极的面积。
  16. 如权利要求14所述的显示面板，其中，所述其余过渡电极的尺寸，和与之相连的所述漏极的尺寸相同。
  17. 如权利要求14所述的显示面板，其中，所述其余过渡电极位于与之相连的所述漏极的正上方。
  18. 如权利要求12所述的显示面板，其中，所述过渡电极的材料和所述漏极的材料形同。
  19. 如权利要求2所述的显示面板，其中，所述显示面板包括位于扇出区内的转换过孔和转换线，所述转换线与所述驱动电路内的漏极同层设置，部分转换线通过所述转换过孔与栅极驱动电路连接。
  20. 一种显示装置，包括显示面板，所述显示面板包括显示区和扇出区，所述扇出区和所述显示区至少部分重合。
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