WO2021012071A1 - Capteur d'image, puce associée et appareil électronique - Google Patents

Capteur d'image, puce associée et appareil électronique Download PDF

Info

Publication number
WO2021012071A1
WO2021012071A1 PCT/CN2019/096658 CN2019096658W WO2021012071A1 WO 2021012071 A1 WO2021012071 A1 WO 2021012071A1 CN 2019096658 W CN2019096658 W CN 2019096658W WO 2021012071 A1 WO2021012071 A1 WO 2021012071A1
Authority
WO
WIPO (PCT)
Prior art keywords
analog
image sensor
sensing signal
gain
signal
Prior art date
Application number
PCT/CN2019/096658
Other languages
English (en)
Chinese (zh)
Inventor
徐荣贵
Original Assignee
深圳市汇顶科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2019/096658 priority Critical patent/WO2021012071A1/fr
Priority to CN201980001152.4A priority patent/CN110972518B/zh
Publication of WO2021012071A1 publication Critical patent/WO2021012071A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/616—Noise processing, e.g. detecting, correcting, reducing or removing noise involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/772—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising A/D, V/T, V/F, I/T or I/F converters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/618—Noise processing, e.g. detecting, correcting, reducing or removing noise for random or high-frequency noise
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array

Definitions

  • This application relates to a pixel sensing technology, and in particular to an image sensor and related chips and electronic devices.
  • CMOS image sensors have been mass-produced and applied.
  • a CMOS image sensor includes a pixel array, which is composed of a plurality of pixels arranged in an array, and the pixel includes a photosensitive component and a conversion circuit.
  • the photosensitive element includes, for example, a photosensitive diode (photodiode) or a photosensitive transistor (phototransistor).
  • the photosensitive component will generate electric charge after receiving light and store the generated electric charge.
  • the conversion circuit converts the charge stored in the photosensitive component into a potential signal, where the potential signal is the pixel value corresponding to the photosensitive component.
  • the analog-to-digital converter samples the potential signal, and performs analog-to-digital conversion on the sampled potential signal to obtain the analog-to-digital conversion result.
  • the practice of the analog-to-digital converter often directly affects the noise level generated by the analog-to-digital converter, but in pursuit of speed, the complexity of the analog-to-digital converter cannot be increased without limit.
  • One of the objectives of the present application is to disclose a pixel sensing technology, especially an image sensor and related chips and electronic devices, to solve the above problems.
  • An embodiment of the present application discloses an image sensor.
  • the image sensor includes: a pixel for sensing light and generating an analog sensing signal; a gain amplifier, coupled to the pixel, for generating an analog sensing signal according to the light Intensity adjusts the gain value, and amplifies the analog sensing signal based on the gain value to generate a post-gain analog sensing signal; and an analog-to-digital converter, coupled to the gain amplifier, for sensing the post-gain analog
  • the measurement signal is sampled using the correlated multi-sampling technique, and the gain-enhanced analog sensing signal is converted into a digital sensing signal, wherein the number of sampling is changed in real time according to the analog sensing signal.
  • An embodiment of the present application discloses a chip including the aforementioned image sensor.
  • An embodiment of the present application discloses an electronic device including the aforementioned image sensor.
  • the ramp generator of the image sensor disclosed in the present application can generate different ramp signals based on the different intensities of light, thereby changing the sampling method and the analog-to-digital conversion method, thereby alleviating the negative impact caused by quantization noise or high-frequency noise, thereby improving The accuracy of image sensing results.
  • FIG. 1 is a schematic block diagram of an embodiment of the chip of the application.
  • FIG. 2A is a schematic diagram illustrating the operation of the image sensor shown in FIG. 1 when light is at the first intensity.
  • FIG. 2B is a signal timing diagram of the ramp signal generated by the ramp generator of FIG. 2A.
  • FIG. 3A is a schematic diagram illustrating the operation of the image sensor shown in FIG. 1 when light is at the second intensity.
  • 3B is a signal timing diagram of the ramp signal generated by the ramp generator of FIG. 3A.
  • FIG. 4 is a schematic diagram of an embodiment in which the image sensor shown in FIG. 1 is applied to an electronic device.
  • first and second features are in direct contact with each other; and may also include
  • additional components are formed between the above-mentioned first and second features, so that the first and second features may not be in direct contact.
  • present disclosure may reuse component symbols and/or labels in multiple embodiments. Such repeated use is based on the purpose of brevity and clarity, and does not in itself represent the relationship between the different embodiments and/or configurations discussed.
  • spatially relative terms here such as “below”, “below”, “below”, “above”, “above” and similar, may be used to facilitate the description of the drawing
  • the relationship between one component or feature relative to another component or feature is shown.
  • these spatially relative terms also cover a variety of different orientations in which the device is in use or operation.
  • the device may be placed in other orientations (for example, rotated by 90 degrees or in other orientations), and these spatially-relative description words should be explained accordingly.
  • a pixel includes a photosensitive component and a conversion circuit.
  • the photosensitive component generates electric charge after receiving light and stores the generated electric charge.
  • the conversion circuit converts the charge stored in the photosensitive component into a potential signal, the potential signal is an analog electric signal, and the analog electric signal generally has noise added to it.
  • the analog electrical signal is amplified, the noise will also be amplified.
  • the analog-to-digital converter uses quantization technology to convert analog electrical signals into digital signals, and quantization noise is generated during the conversion process. Because there are at least the above two noise sources, to improve the accuracy of the image sensing result of the image sensor, the above two noises can be eliminated.
  • the image sensor disclosed in this application can allow the analog-to-digital converter to adjust the conversion mode in real time and adaptively under different light intensities, so as to optimally reduce the negative effects caused by the above two kinds of noises and improve image transmission.
  • the details of the accuracy of the sensory results are as follows.
  • FIG. 1 is a schematic block diagram of an embodiment of an image sensor 10 of this application.
  • FIG. 1 includes an image sensor 10 and a digital signal processor 18.
  • the image sensor 10 is used for sensing light and generating a digital sensing signal SD accordingly.
  • the digital signal processor 18 is used to process an image based on the digital sensing signal SD, and output an image processing signal Sout.
  • the image sensor 10 and the digital signal processor 18 may be located on different chips. However, this disclosure is not limited to this. In some embodiments, the image sensor 10 and the digital signal processor 18 are integrated into a single chip.
  • the image sensor 10 includes a pixel array.
  • the pixel array includes a plurality of pixels 12 arranged in rows and columns. For the convenience of description and the simplicity of the drawing, FIG. 1 only shows a single pixel 12.
  • the pixel 12 is used for sensing light and generating an analog sensing signal SA.
  • the pixel 12 includes a photosensitive element and a conversion circuit.
  • the photosensitive element receives light to form a photocharge or photocurrent.
  • the photosensitive component stores the charge corresponding to the photoelectron or photocurrent.
  • the conversion circuit converts the charge stored in the photosensitive component into a potential signal, and the potential signal is an analog sensing signal SA.
  • the photosensitive component may include a photodiode.
  • the light may be generated by a laser diode (LD), a light emitting diode (LED), or other light emitting unit that can generate light, or it may be natural light.
  • LD laser diode
  • LED light emitting diode
  • the pixel array may be an active pixel (active pixel) array, or a dark pixel (dark pixel) array.
  • the pixels 12 may include effective pixels and/or dark pixels.
  • the image sensor 10 also includes a gain amplifier 14 and an analog-to-digital converter 16.
  • the gain amplifier 14 is coupled between the pixel 12 and the analog-to-digital converter 16, for adjusting the gain value GL according to the intensity of the light sensed by the photosensitive element of the pixel 12, and amplifying the analog sensing signal SA based on the gain value GL to After generating the gain, the sensing signal SG is simulated. It should be noted that the gain value GL is negatively related to the intensity of the light sensed by the photosensitive element of the pixel 12.
  • the gain amplifier 14 is an adjustable gain amplifier with a limited number of stages, and has more than two different gain values for selection to provide analog sensing signals SA of different strengths. In some embodiments, the gain amplifier 14 may also have an infinite number of segments.
  • the analog-to-digital converter 16 is coupled between the gain amplifier 14 and the digital signal processor 18 for converting the gain analog sensing signal SG into a digital sensing signal SD.
  • the analog-to-digital converter 16 uses correlated multiple sampling (CMS) technology to sample the gain analog sensing signal SG.
  • the analog-to-digital converter 16 uses the correlated double sampling (CDS) technique to sample the gain analog sensing signal SG.
  • the analog-to-digital converter 16 includes a ramp generator 160, a comparator 162, and a counter 164.
  • the ramp generator 160 is used to generate the ramp signal S_RAMP to the comparator 162.
  • the ramp generator 160 can change the ramp signal S_RAMP in real time and adaptively under different light intensities.
  • the ramp generator 160 can change the waveform of the ramp signal S_RAMP, including the bit resolution and the number of ramps, in real time and adaptively according to the gain value GL, so that the analog-to-digital converter 16 can adjust in real time and adaptively.
  • the conversion method is used for the purpose of optimally reducing noise.
  • the bit resolution is a power of two. For example, when the power is a value of 10, the bit resolution is 1024; and when the power is a value of 11, the bit resolution is 2048, and so on.
  • the bit resolution of the ramp signal S_RAMP is related to the quantization noise.
  • the greater the bit resolution of the ramp signal S_RAMP the smaller the quantization noise.
  • the quantization noise when the bit resolution is 2048 is smaller than the quantization noise when the bit resolution is 1024.
  • the number of ramps of the ramp signal S_RAMP is related to the high frequency part of the noise on the analog sensing signal SG after gain.
  • the slope of the ramp signal S_RAMP is used as the sampling reference of the analog-to-digital converter 16
  • the more the number of ramps of the ramp signal S_RAMP the more sampling times.
  • the high frequency part (for example, thermal noise) of the noise on the analog sensing signal SG after gain will be more suppressed.
  • the number of sampling times is 4
  • the degree of suppression of the high frequency part of the noise on the analog sensing signal SG after gain is higher than that when the number of sampling times is 2 times. The degree to which the high-frequency part of the noise on the measurement signal SG is suppressed.
  • the analog-to-digital converter 16 can select the partial quantization noise or the noise on the analog sensing signal SG after gain.
  • the high frequency part is suppressed, the details of which will be described in the embodiment in FIGS. 2A and 2B and FIGS. 3A and 3B.
  • the analog to digital converter 16 has an equivalent number of bits, that is, the number of bits of the digital sensing signal SD.
  • the equivalent of the analog-to-digital converter 16 is The number of bits actually remains constant. The details will be described in the embodiments of FIGS. 2A and 2B and FIGS. 3A and 3B.
  • the comparator 162 is used to compare the gain analog sensing signal SG and the ramp signal S_RAMP, and generate a digital comparison signal S_com.
  • the positive terminal of the comparator 162 receives the ramp signal S_RAMP, and the negative terminal receives the gain analog sensing signal SG.
  • the voltage value of the ramp signal S_RAMP is smaller than the analog sensing signal SG after the comparison gain, and the digital comparison signal S_com generated by the comparator 162 is at a low level at this time. After that, the voltage value of the ramp signal S_RAMP gradually rises.
  • the voltage value of the ramp signal S_RAMP begins to be greater than the analog sensing signal SG after the comparison gain, and the digital comparison signal S_com generated by the comparator 162 changes from a low level to a high level. This level of change is called transition. In other words, the transition from a logic low state to a logic high state is called a transition, and vice versa.
  • the comparator 162 includes an operational amplifier.
  • the counter 164 is used for generating a digital sensing signal SD according to the digital comparison signal S_com.
  • the counter 164 marks the time point when the digital comparison signal S_com transitions by counting the number of times.
  • the number of bits of the counter 164 is not limited to any value, as long as the number of bits of the counter 164 is greater than or equal to the equivalent number of bits of the analog-to-digital converter 16 is a feasible implementation manner.
  • FIG. 2A illustrates the operation of the image sensor 10 shown in FIG. 1 when the light is the first intensity L1; the schematic diagram of FIG. 3A illustrates the image sensor shown in FIG. 1 when the light is the second intensity L2 10 operations.
  • 2B is a signal timing diagram of the ramp signal S_RAMP generated by the ramp generator 160 of FIG. 2A
  • FIG. 3B is a signal timing diagram of the ramp signal S_RAMP generated by the ramp generator 160 of FIG. 3A, wherein the horizontal axis represents time T, and The axis represents the voltage V.
  • the pixel 12 is illuminated by light with a first intensity L1
  • the pixel 12 is illuminated by light with a second intensity L2, where the first intensity L1 is higher than the first intensity L1.
  • the second intensity L2 makes the voltage swing of the analog sensing signal SA in FIG. 2A greater than the voltage swing of the analog sensing signal SA in FIG. 3A.
  • the gain value GL (first gain value G1) of the gain amplifier 14 in FIG. 2A will be smaller than the gain value GL (second gain value G2) of the gain amplifier 14 in FIG. 3A.
  • the ramp generator 160 generates different ramp signals S_RAMP according to the first gain value G1 and the second gain value G2. The details are described below.
  • the signal-to-noise ratio of the analog sensing signal SA in FIG. 3A is greater than that of the analog sensing signal SA in FIG. 2A
  • the signal-to-noise ratio is poor, and since the analog sensing signal SA of FIGS. 2A and 3A will pass through the gain amplifier 14 to adjust the gain before entering the analog-to-digital converter 16, the degree of quantization noise generated in FIGS. 2A and 3A Are the same or similar.
  • the quantization noise will have a greater degree of influence than the noise of the analog sensing signal SA; on the contrary, in Figure 3A, the noise of the analog sensing signal SA will be more affected than the quantization noise. The impact is greater.
  • the ramp generator 160 sets the bit resolution of the ramp signal S_RAMP to be higher than that of FIG. 3A, for example, 2 11 , that is, 2048. In the 3A embodiment, the ramp generator 160 sets the bit resolution of the ramp signal S_RAMP to be lower than that in FIG. 2A, for example, 2 10 , which is 1024.
  • the equivalent bit number of the analog-to-digital converter 16 is related to the bit resolution of the ramp signal S_RAMP and the number of samplings.
  • the order of the equivalent bit number is the product of the bit resolution and the number of samples.
  • the ramp generator 160 sets the number of sampling times to 2, so that the bit resolution (2048 ) And the number of samples (2) are kept at 4096; in the embodiment of FIG. 3A, the ramp generator 160 sets the number of samples to 4, so that the bit resolution (1024) and the number of samples (4) The product of is maintained at 4096, and the high frequency part of the noise on the analog sensing signal SG after gain can be further suppressed.
  • the ramp signal S_RAMP generated by the ramp generator 160 includes a continuous first segment S1 and a second segment S2, wherein the slope of the first segment S1
  • the absolute value of is equal to the absolute value of the slope of the second segment S2, and the polarity of the slope of the first segment S1 is opposite to the polarity of the slope of the second segment S2.
  • the first segment S1 is increasing, and the second segment S2 is decreasing.
  • the ramp signal S_RAMP generated by the ramp generator 160 includes consecutive first segment S1, second segment S2, third segment S3, and fourth segment S_RAMP.
  • Segment S4 where the absolute values of the slopes of the first segment S1, the second segment S2, the third segment S3, and the fourth segment S4 are equal, and the polarity of the slopes of the first segment S1 and the third segment S3 is the same as that of the second segment S2 And the polarity of the slope of the fourth segment S4 is opposite.
  • the first section S1 and the third section S3 are increasing, and the second section S2 and the fourth section S4 are decreasing.
  • FIGS. 2A and 2B and FIGS. 3A and 3B are summarized in Table 1 below.
  • the relative adjectives used in Table 1 below all refer to the relative degree between FIGS. 2A and 2B and FIGS. 3A and 3B.
  • FIG. 4 is a schematic diagram of an embodiment in which the image sensor 10 shown in FIG. 1 is applied to an electronic device 20.
  • the electronic device 20 includes an image sensor 10, which can be used to perform pixel sensing technology for image sensing or under-screen fingerprint sensing.
  • the electronic device 20 can be, for example, a smart phone, a personal digital assistant, or a handheld computer system. Or any handheld electronic device such as a tablet computer.
  • a chip includes the image sensor 10, for example, the chip may be a semiconductor chip implemented by a different process.
  • the pixel 12 and other circuits of the image sensor 10 are arranged in the same chip, for example, the pixel 12, the gain amplifier 14, and the analog-to-digital amplifier are arranged in the same chip.
  • the gain amplifier 14 and the analog-to-digital amplifier are provided in one chip, and the pixel 12 is separately provided in another chip.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

La présente invention concerne un capteur d'image (10), une puce associée et un appareil électronique (20). Le capteur d'image comprend : un pixel (12) pour détecter la lumière et générer un signal de détection analogique ; un amplificateur de gain (14) couplé au pixel et utilisé pour ajuster une valeur de gain en fonction de l'intensité de la lumière, et pour amplifier, sur la base de la valeur de gain, le signal de détection analogique pour générer un signal de détection analogique obtenu ; et un convertisseur analogique-numérique (16) couplé à l'amplificateur de gain et utilisé pour échantillonner le signal de détection analogique obtenu au moyen d'une technique d'échantillonnage multiple correspondante, et pour convertir le signal de détection analogique obtenu en un signal de détection numérique, le nombre de temps d'échantillonnage variant en temps réel selon le signal de détection analogique.
PCT/CN2019/096658 2019-07-19 2019-07-19 Capteur d'image, puce associée et appareil électronique WO2021012071A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/CN2019/096658 WO2021012071A1 (fr) 2019-07-19 2019-07-19 Capteur d'image, puce associée et appareil électronique
CN201980001152.4A CN110972518B (zh) 2019-07-19 2019-07-19 图像传感器以及相关芯片及电子装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2019/096658 WO2021012071A1 (fr) 2019-07-19 2019-07-19 Capteur d'image, puce associée et appareil électronique

Publications (1)

Publication Number Publication Date
WO2021012071A1 true WO2021012071A1 (fr) 2021-01-28

Family

ID=70038307

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/096658 WO2021012071A1 (fr) 2019-07-19 2019-07-19 Capteur d'image, puce associée et appareil électronique

Country Status (2)

Country Link
CN (1) CN110972518B (fr)
WO (1) WO2021012071A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114374364A (zh) * 2021-12-21 2022-04-19 深圳市汇顶科技股份有限公司 D类放大器及相关芯片和电子装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113794467B (zh) * 2021-09-17 2023-06-09 成都微光集电科技有限公司 斜坡发生器

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070052564A1 (en) * 2005-09-07 2007-03-08 Fujitsu Limited Image sensor capable of cancelling offset voltage of semiconductor device included therein
CN103036533A (zh) * 2011-10-07 2013-04-10 佳能株式会社 斜坡信号输出电路、模数转换电路、成像设备及驱动方法
CN103066964A (zh) * 2011-10-21 2013-04-24 索尼公司 比较器、ad转换器、固态成像装置以及相机系统
CN103297719A (zh) * 2012-03-01 2013-09-11 佳能株式会社 图像拾取设备、图像拾取系统、及这两者的驱动方法
CN106454158A (zh) * 2012-04-12 2017-02-22 佳能株式会社 成像装置和成像系统

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4311482B2 (ja) * 2007-05-17 2009-08-12 ソニー株式会社 撮像回路、ｃｍｏｓセンサ、および撮像装置
JP4978795B2 (ja) * 2007-09-28 2012-07-18 ソニー株式会社 固体撮像装置、駆動制御方法、および撮像装置
JP4831146B2 (ja) * 2008-09-01 2011-12-07 ソニー株式会社 デジタル−アナログ変換回路、固体撮像素子及び撮像装置
US8854244B2 (en) * 2012-09-19 2014-10-07 Aptina Imaging Corporation Imagers with improved analog-to-digital converters
KR20140067408A (ko) * 2012-11-26 2014-06-05 삼성전자주식회사 고체 촬상소자 및 그에 따른 동작 제어방법
CN103051848B (zh) * 2013-01-21 2015-12-09 长春长光辰芯光电技术有限公司 图像数据模数转换方法及图像传感器
US8816893B1 (en) * 2013-02-12 2014-08-26 Omnivision Technologies, Inc. Adaptive multiple conversion ramp analog-to-digital converter
JP6413235B2 (ja) * 2013-12-06 2018-10-31 株式会社ニコン 撮像素子および撮像装置
US9876978B2 (en) * 2014-04-16 2018-01-23 Sony Corporation Imaging element, gain control method, program, and electronic device
WO2017076747A1 (fr) * 2015-11-06 2017-05-11 Cmosis Bvba Conversion analogique-numérique et procédé de conversion analogique-numérique
KR102446723B1 (ko) * 2016-01-29 2022-09-27 에스케이하이닉스 주식회사 이미지 센싱 장치 및 그의 구동 방법
JP6799385B2 (ja) * 2016-04-28 2020-12-16 キヤノン株式会社 撮像装置およびその制御方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070052564A1 (en) * 2005-09-07 2007-03-08 Fujitsu Limited Image sensor capable of cancelling offset voltage of semiconductor device included therein
CN103036533A (zh) * 2011-10-07 2013-04-10 佳能株式会社 斜坡信号输出电路、模数转换电路、成像设备及驱动方法
CN103066964A (zh) * 2011-10-21 2013-04-24 索尼公司 比较器、ad转换器、固态成像装置以及相机系统
CN103297719A (zh) * 2012-03-01 2013-09-11 佳能株式会社 图像拾取设备、图像拾取系统、及这两者的驱动方法
CN106454158A (zh) * 2012-04-12 2017-02-22 佳能株式会社 成像装置和成像系统

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114374364A (zh) * 2021-12-21 2022-04-19 深圳市汇顶科技股份有限公司 D类放大器及相关芯片和电子装置
CN114374364B (zh) * 2021-12-21 2023-09-05 深圳市汇顶科技股份有限公司 D类放大器及相关芯片和电子装置

Also Published As

Publication number Publication date
CN110972518B (zh) 2022-12-16
CN110972518A (zh) 2020-04-07

Similar Documents

Publication Publication Date Title
US10986296B2 (en) Solid-state image pickup device and control method thereof
KR100498594B1 (ko) 씨모스 이미지 센서
CN111629161B (zh) 比较器及包括该比较器的图像感测装置
TW200810543A (en) Solid-state image-pickup device, camera system, and method for driving same
US10432211B1 (en) Imaging systems with sub-radix-2 charge sharing successive approximation register (SAR) analog-to-digital converters
WO2012001838A1 (fr) Dispositif d'imagerie à semi-conducteurs
US10728483B2 (en) Comparator with correlated double sampling scheme, CMOS image sensor including the same, and operating method thereof
US11323639B2 (en) Image sensor and operation method thereof
WO2021012071A1 (fr) Capteur d'image, puce associée et appareil électronique
TWI768647B (zh) 影像感測裝置
US20150097596A1 (en) Cascoded comparator with dynamic biasing for column parallel single slope adcs
JP2018117350A (ja) イメージセンサー
JP2013175936A (ja) 半導体装置、及び、撮像装置
US7990452B2 (en) Apparatus, methods and systems for amplifier
CN107534748A (zh) 固态成像装置和固态成像装置的驱动方法
CN114845074A (zh) 模数转换电路、图像感测装置及其操作方法
JP2003087664A (ja) 半導体装置
US9716841B2 (en) Adaptive gain adjustment in an imaging system
TW201304534A (zh) 半導體裝置及其驅動方法
KR20200118657A (ko) 이미지 센서 및 이의 구동방법
US20070035648A1 (en) Solid-state imaging apparatus
US20100073539A1 (en) Solid-state imaging device
KR101969878B1 (ko) 아날로그 디지털 변환회로, 아날로그 디지털 변환방법 및 이미지 센서
TWI575229B (zh) 訊號處理方法及其感測裝置
Kłosowski et al. A high-efficient measurement system with optimization feature for prototype CMOS image sensors

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19938550

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19938550

Country of ref document: EP

Kind code of ref document: A1