WO2020210260A1 - High step coverage tungsten deposition - Google Patents
High step coverage tungsten deposition Download PDFInfo
- Publication number
- WO2020210260A1 WO2020210260A1 PCT/US2020/027107 US2020027107W WO2020210260A1 WO 2020210260 A1 WO2020210260 A1 WO 2020210260A1 US 2020027107 W US2020027107 W US 2020027107W WO 2020210260 A1 WO2020210260 A1 WO 2020210260A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- chamber
- tungsten
- pulse
- reducing agent
- boron
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/418—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials the conductive layers comprising transition metals
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
- C23C16/14—Deposition of only one other metal element
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
- H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
- H10P14/432—Chemical deposition, e.g. chemical vapour deposition [CVD] using selective deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
- H10W20/045—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for deposition from the gaseous phase, e.g. for chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
- H10W20/057—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by selectively depositing, e.g. by using selective CVD or plating
Definitions
- Tungsten (W) film deposition using chemical vapor deposition (CVD) techniques is an integral part of semiconductor fabrication processes. For example, tungsten films
- Tungsten films may also be used in various memory applications, including in formation of buried wordline (bWL) architectures for dynamic random access memory (DRAM), word lines for 3D NAND, and logic applications.
- bWL buried wordline
- DRAM dynamic random access memory
- 3D NAND 3D NAND
- One aspect of the disclosure relates to a method including providing a substrate including a feature having an opening in a top surface, a sidewall and a bottom in a 25 chamber; and depositing a tungsten nucleation layer in the feature by performing multiple cycles of: flowing a boron-containing reducing agent pulse in the chamber, wherein the boron-containing reducing agent is adsorbed to the feature sidewall and feature bottom, purging the chamber, flowing a tungsten-containing precursor pulse in the chamber to react with the adsorbed boron-containing reducing agent, and purging the chamber, 30 wherein hydrogen (H 2 ) is flowed during the boron-containing reducing agent pulse and no H 2 is flowed during the tungsten-containing precursor pulse and wherein H 2 suppresses thermal decomposition of the boron-containing reducing agent.
- H 2 hydrogen
- the tungsten nucleation layer is at least 10 Angstroms thick and step coverage throughout the feature is at least 90%, step coverage being the 5 ratio of the thickness of the tungsten nucleation layer at any point in the feature to the thickness of the tungsten nucleation layer at the top surface.
- depositing the nucleation layer further includes at least one cycle of flowing a silane pulse in the chamber; purging the chamber; flowing a tungsten-containing precursor pulse in the chamber; and purging the chamber, wherein 10 no hydrogen is flowed during the tungsten-containing precursor pulse.
- no hydrogen is flowed during the silane pulse. In some embodiments, hydrogen is flowed during the silane pulse. In some embodiments, the tungsten nucleation layer is between 10 Angstroms and 50 Angstroms thick. In some embodiments, the substrate temperature is below 350°C. In some embodiments, the
- substrate temperature is between about 250°C and 300°C.
- hydrogen reacts with decomposition byproducts of the boron-containing reducing agent.
- the boron-containing reducing agent pulse in the chamber is flowed into the chamber with an inert carrier gas.
- the volumetric flow ratio of the H 2 to the boron- 20 containing reducing agent is between 20:1 and 400:1.
- the boron- containing reducing agent is diborane.
- Another aspect of the disclosure relates to a method including providing a substrate including a feature having an opening in a top surface, a sidewall and a bottom in a chamber; depositing a tungsten nucleation layer in the feature by performing multiple 25 cycles of: flowing a boron-containing reducing agent pulse in the chamber; purging the chamber; flowing a tungsten-containing precursor pulse in the chamber; and purging the chamber, wherein hydrogen is flowed during the boron-containing reducing agent pulse and no hydrogen is flowed during the tungsten-containing precursor pulse.
- the tungsten nucleation layer is at least 10 Angstroms 30 thick and step coverage throughout the feature is at least 90%, step coverage being the ratio of the thickness of the tungsten nucleation layer at any point in the feature to the thickness of the tungsten nucleation layer at the top surface.
- depositing the nucleation layer further includes at least one cycle of flowing a silane pulse in the chamber; purging the chamber; flowing a 5 tungsten-containing precursor pulse in the chamber; and purging the chamber, wherein no hydrogen is flowed during the tungsten-containing precursor pulse.
- no hydrogen is flowed during the silane pulse. In some embodiments, hydrogen is flowed during the silane pulse. In some embodiments, the tungsten nucleation layer is between 10 Angstroms and 50 Angstroms thick. In some 10 embodiments, the substrate temperature is below 350°C. In some embodiments, the substrate temperature is between about 250°C and 300°C. In some embodiments, hydrogen reacts with decomposition byproducts of the boron-containing reducing agent.
- the boron-containing reducing agent pulse in the chamber is flowed into the chamber with an inert carrier gas.
- the volumetric flow ratio of the H2 to the boron- containing reducing agent is between 20:1 and 400:1.
- the boron- containing reducing agent is diborane.
- Another aspect of the disclosure relates to an apparatus including: (a) a process chamber including at least one station having a pedestal configured to hold a substrate;
- the controller includes instructions for maintaining a pedestal temperature less than 350°C. In some embodiments, the controller includes instructions for maintaining a pedestal temperature between 175°C to 300°C. In some
- the controller includes instructions for flowing a silane pulse in the chamber; purging the chamber; flowing a tungsten-containing precursor pulse in the chamber; and purging the chamber, wherein no hydrogen is flowed during the tungsten- containing precursor pulse.
- Figures 1A-1H show examples of a features that may be filled with tungsten in accordance with embodiments disclosed herein.
- Figure 2 shows a timing sequence diagram showing example cycles of a method for depositing a tungsten nucleation layer using diborane.
- Figure 3 illustrates a schematic representation of an example of a feature provided in a partially manufactured semiconductor substrate with a tungsten nucleation layer formed with the feature.
- Figure 4 is a schematic of an example of a process system suitable for conducting deposition processes in accordance with embodiments.
- Figure 5 is a schematic of an example of a deposition station depicted suitable for conducting deposition processes in accordance with embodiments.
- Figure 6 is a schematic of an example of a manifold system that may be used in accordance with various embodiments.
- Described herein are methods of filling features with tungsten and related systems and apparatus. Examples of application include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate/wordline fill, and 3-D integration with through-silicon vias (TSVs).
- TSVs through-silicon vias
- the methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines, and The methods may be used for conformal and bottom-up or 5 inside-out fill.
- the features can be characterized by one or more of narrow and/or re-entrant openings, constrictions within the feature, and high aspect ratios. Examples of features that can be filled are depicted in Figures 1A-1C.
- Figure 1A shows an example of a cross-sectional depiction of a vertical feature 101 to be filled 10 with tungsten.
- the feature can include a feature hole 105 in a substrate 103.
- the substrate may be a silicon wafer, e.g., 200-mm wafer, 300-mm wafer, 450-mm wafer, including wafers having one or more layers of material such as dielectric, conducting, or semi- conducting material deposited thereon.
- the feature hole 105 may have an aspect ratio of at least about 2:1, at least about 4:1, at least about 6:1 or higher. 15
- the feature hole 105 may also have a dimension near the opening, e.g., an opening diameter or line width, of between about 10 nm to 500 nm, for example between about 25 nm to 300 nm.
- the feature hole 105 can be referred to as an unfilled feature or simply a feature.
- the feature, and any feature may be characterized in part by an axis 118 that extends through the length of the feature, with vertically-oriented features having vertical 20 axes and horizontally-oriented features having horizontal axes.
- Figure IB shows an example of a feature 101 that has a re-entrant profile.
- a re-entrant profile is a profile that narrows from a bottom, closed end, or interior of the feature to the feature opening. According to various embodiments, the profile may narrow gradually and/or include an overhang at the feature opening.
- Figure IB shows an 25 example of the latter, with an under-layer 113 lining the sidewall or interior surfaces of the feature hole 105.
- the under-layer 113 can be for example, a diffusion barrier layer, an adhesion layer, a nucleation layer, a combination of thereof, or any other applicable material.
- the under-layer 113 forms an overhang 115 such that the under-layer 113 is thicker near the opening of the feature 101 than inside the feature 101.
- FIG. 1C shows examples of views of various filled features having constrictions.
- Each of the examples (a), (b) and (c) in Figure 1C includes a constriction 109 at a midpoint within the feature.
- the constriction 109 can be, for example, between about 15 nm-20 nm wide.
- Constrictions can cause pinch off during deposition of tungsten in the feature using conventional techniques, with deposited tungsten blocking further 5 deposition past the constriction before that portion of the feature is filled, resulting in voids in the feature.
- Example (b) further includes a liner/barrier overhang 115 at the feature opening.
- Example (c) includes a constriction 112 further away from the field region than the overhang 115 in example (b). As described further below, methods described herein allow void-free fill as 10 depicted in Figure 1C.
- Figure ID shows an example of a word line 150 in a VNAND structure 148 that includes a constriction 151.
- the constrictions can be due to the presence of pillars in a VNAND or other structure.
- Figure IE shows a plan view of pillars
- Figure IE shows a simplified schematic of a cross- sectional depiction of the pillars 125.
- Arrows in Figure IE represent deposition material; as pillars 125 are disposed between an area 127 and a gas inlet or other deposition source, adjacent pillars can result in constrictions that present challenges in void free fill of an area 127.
- Figure 1G provides another example of a view horizontal feature, for example, of a VNAND or other structure including pillar constrictions 151.
- the example in Figure 1G is open-ended, with material to be deposited able to enter laterally from two sides as indicated by the arrows.
- 3-D structures can be characterized with the area to be filled extending along three dimensions (e.g., in the X, Y and Z-directions in the example of Figure IF), and can present more challenges for fill than filling holes or trenches that extend along one or 30 two dimensions. For example, controlling fill of a 3-D structure can be challenging as deposition gasses may enter a feature from multiple dimensions.
- interconnect features 170 may be filled with tungsten to connect to the tungsten wordlines 172.
- Examples of feature fill for horizontally-oriented and vertically-oriented features are described below. It should be noted that in most cases, the examples 5 applicable to both horizontally-oriented or vertically-oriented features.
- Distribution of a material within a feature may be characterized by its step coverage.
- step coverage is defined as a ratio of two thicknesses, e.g., the thickness of the material inside the feature divided by the thickness of the material near the opening.
- inside the 10 feature represents a middle portion of the feature located about the middle point of the feature along the feature's axis, e.g., an area between about 25% and 75% of the distance or, in certain embodiments, between about 40% and 60% of the distance along the feature's depth measured from the feature's opening, or an end portion of the feature located between about 75% and 95% of the distance along the feature's axis as measured 15 from the opening.
- near the opening of the feature or “near the feature's opening” represents a top portion of the feature located within 25% or, more specifically, within 10% of the opening's edge or other element representative of the opening's edge. Step coverage of over 100% can be achieved, for example, by filling a feature wider in the middle or near the bottom of the feature than at the feature opening or where a thicker 20 film is deposited within the feature than on or near the opening.
- a nucleation layer is typically a thin conformal layer that facilitates subsequent deposition of bulk tungsten-containing material thereon.
- a nucleation layer may be deposited prior to any fill of 25 the feature and/or at subsequent points during fill of the feature with tungsten or a tungsten-containing material.
- the nucleation layer is deposited sequentially injecting pulses of a reducing agent, optional purge gases, and tungsten-containing precursor from the reaction chamber. The process is repeated in a cyclical fashion until 30 the desired thickness is achieved.
- Nucleation layer thickness can depend on the nucleation layer deposition method as well as the desired quality of bulk deposition. In general, nucleation layer thickness is sufficient to support high quality, uniform bulk deposition. Examples may range from 5 ⁇ -100 ⁇ ,or 12 ⁇ -50 ⁇ .
- ALD techniques differ from chemical vapor deposition (CVD) techniques in which reactants are introduced together.
- the nucleation layer is 5 deposited using a pulsed nucleation layer (PNL) technique.
- PNL pulsed nucleation layer
- pulses of a reducing agent, optional purge gases, and tungsten-containing precursor are sequentially injected into and purged from the reaction chamber. The process is repeated in a cyclical fashion until the desired thickness is achieved.
- PNL broadly embodies any cyclical process of sequentially adding reactants for reaction on a semiconductor substrate, including ALD 10 techniques.
- tungsten nucleation layer Described herein are methods of depositing a tungsten nucleation layer that achieve very good step coverage.
- the methods involve a sequence of alternating pulses of a tungsten-containing precursor and a boron-containing reducing agent, while co- flowing hydrogen (H 2 ) with the boron-containing reducing agent. The H 2 flow is stopped
- ALD tungsten processes may use two half-reactions enabled by the sequential 20 delivery of two or more co-reactants.
- One co-reactant acts to functionalize the surface and permit the adsorption of tungsten-containing species to the substrate.
- Subsequent cycles result in the deposition of a conformal thin film.
- Flowing hydrogen in the background or as a carrier gas during the tungsten-containing precursor dose results in a higher deposition rate, thicker nucleation layer, and reduced conformality. This is due to part of 25 the tungsten-containing precursor being consumed by a parasitic CVD reaction with the hydrogen.
- co-flowing H 2 with B 2 H 6 improves conformality.
- B 2 H 6 can decompose during the ALD cycle (e.g., B 2 H 6 2/3 B 3 + 3H 2 ) which in turn results in parasitic reactions that contribute to the CVD reaction.
- the parasitic CVD contribution degrades the step coverage of the process.
- the 30 decomposition of B 2 H 6 is suppressed. While some B 2 H 6 may decompose, the presence of H 2 can significantly reduce the amount.
- the H 2 may react with B 2 H 6 decomposition products or other reaction byproducts to form diborane (e.g., 2B 3 + 9H 2 -> 3B 2 H 6 ).
- the parasitic CVD contribution to the deposition is thus reduced or minimized. This shifts the thin film deposition process closer to a pure ALD process and improves the step coverage and conformality.
- Substrate temperatures may be below about 350°C, for example between about 175°C and 300°C, or between about 250°C and 300°C. Lower temperatures result in less
- chamber pressure are between 10 torr and 60 torr, or 10 torr and 40 torr. In some embodiments, it is above 10 torr. It may also be below 10 torr to reduce fluorine incorporation, for example.
- Example growth rates may be 2A-20A per cycle, or 4A-12A per cycle, with the 15 growth rates lower as more hydrogen is used to suppress the parasitic CVD reaction and increase step coverage.
- the hydrogemdiborane volumetric flow ratio may be tuned to provide the desired effect for a particular structure. Too high, and the physisorption or chemisorption of the diborane may be unnecessarily slow. Too low, and the diborane may decompose, 20 causing the parasitic CVD effect described above. Examples of ranges of H 2 :B 2 H 6 are 20:1- 400:1.
- the diborane (or other reducing agent) is delivered with an inert gas.
- B 2 H 6 may be mixed with nitrogen (N 2 ) in a 20:1 N 2 :B 2 H 6 ratio.
- the H 2 to diborane/inert gas mixture may be 1:1-20:1 to obtain 20:1-400:1 H 2 :B 2 H 6 in that 25 example.
- Nitrogen is an example of gas that may be mixed with diborane or other reducing agent; any inert gas that is chemically compatible with the reducing agent and does not react with it may be used, with helium (He) another example.
- Figure 2 shows an example of a timing sequence diagram showing example cycles of a method for depositing a tungsten nucleation layer using diborane.
- hydrogen is flowed only during the diborane pulse.
- the tungsten nucleation layers may be deposited using a silicon-based precursor (e.g., silane, SiH4) in addition to diborane.
- silane pulses are added as part of the sequence: e.g., B/W/B/W/S/W, where B represents a diborane pulse, W a tungsten-containing precursor pulses, and S a silicon-containing precursors pulse;
- silane or other silicon- containing precursor may be pulsed without hydrogen.
- the tungsten-containing precursor may be a tungsten halide that can be reduced by a boron-containing reducing agent including tungsten fluorides (e.g., WF6) and tungsten chlorides (e.g., WCI5 and WCI6).
- a boron-containing reducing agent including tungsten fluorides (e.g., WF6) and tungsten chlorides (e.g., WCI5 and WCI6).
- WF6 tungsten fluorides
- WCI5 and WCI6 tungsten chlorides
- the method may 10 be implemented with any reducing agent that is susceptible to decomposition at ALD processing temperatures. Examples include hexaborane and triborane.
- Figure 3 illustrates a schematic representation of a feature 301 provided in a partially manufactured semiconductor substrate 303 with a tungsten nucleation layer 305 formed 15 with the feature 301.
- the figure also specifies different points of measurements of the layer thickness, including at the top of the feature, the bottom of the feature, and at various sidewall depths, as measured as % of feature depth.
- Step coverage is measured as the ratio of the thickness at a bottom or sidewall position to the top position, unless otherwise indicated.
- pulsing hydrogen with a co-reactant may be performed to improve conformality during ALD deposition of other materials and other co-reactants, when the co-reactants are susceptible to decomposition and are hydrides.
- examples of other metals that may be deposited include molybdenum (Mo) and ruthenium (Ru).
- ALD of tungsten nucleation layers was performed in features using Processes A and B on structures of the same dimensions:
- Process A multiple cycles of (B 2 H 6 - Ar purge - WF 6 - Ar purge) with H2 flow constant
- Process B multiple cycles of (B 2 H 6 - Ar purge - WF 6 - Ar purge) with H2 flow constant only during B 2 H 6 pulses.
- Step coverage was measured at the top sidewall, middle sidewall and bottom sidewall with respect to the film deposited on the top horizontal surface.
- the top sidewall refers to a point about 5% of feature depth, middle about 50%, and bottom about 95% of 5 feature depth.
- Process C multiple cycles of (B 2 H 6 - Ar purge - WF 6 - Ar purge) with no H 2 at all:
- the feature may be filled with a bulk tungsten layer.
- tungsten bulk deposition can occur by a CVD process in which a reducing agent and a tungsten-containing precursor are flowed into a deposition chamber to deposit a bulk fill layer in the feature.
- tungsten bulk deposition can occur by an ALD process in which a reducing agent and a tungsten- 15 containing precursor are sequentially introduced into a deposition chamber to deposit a bulk fill layer in the feature. If CVD is used, this operation can involve flowing the reactants continuously until the desired amount is deposited. In certain implementations, the CVD operation may take place in multiple stages, with multiple periods of continuous and simultaneous flow of reactants separated by periods of one or more reactant flows 20 diverted. Still further, inhibition of tungsten growth and/or etching may be performed during feature fill.
- tungsten containing gases including, but not limited to, WF6, WCI6, and W(CO)6 can be used as the tungsten-containing precursor.
- the tungsten-containing precursor is a halogen-containing compound, such as WF6.
- the reducing agent is hydrogen gas, though other reducing agents may be used including silane (Sim), disilane (Si 2 H 6 ) hydrazine (N 2 H 4 ), diborane (B 2 H 6 ) and germane (GeH 4 ).
- hydrogen gas is used as the reducing agent in the CVD process.
- a tungsten precursor that can decompose to form a bulk tungsten layer can be used. Bulk deposition may also 10 occur using other types of processes including ALD processes.
- Deposition may proceed according to various implementations until a certain feature profile is achieved and/or a certain amount of tungsten is deposited.
- the deposition time and other relevant parameters may be determined by modeling and/or trial and error. For example, for an initial deposition for an inside out
- a process chamber may be equipped with various sensors to perform in- situ metrology measurements for end-point detection of a deposition operation.
- Examples of in-situ metrology include optical microscopy and X-Ray Fluorescence (XRF) for determining thickness of deposited films.
- XRF X-Ray Fluorescence
- the tungsten films described herein may include some amount of other compounds, dopants and/or impurities such as nitrogen, carbon, oxygen, boron, phosphorous, sulfur, silicon, germanium and the like, depending on the 25 particular precursors and processes used.
- the tungsten content in the film may range from
- the films are tungsten-rich, having at least 50% (atomic) tungsten, or even at least about 60%, 75%, 90%, or 99% (atomic) tungsten.
- the films may be a mixture of metallic or elemental tungsten (W) and other tungsten-containing compounds such as tungsten 30 carbide (WC), tungsten nitride (WN), etc.
- CVD and ALD deposition of these materials can include using any appropriate precursors.
- CVD and ALD deposition of tungsten nitride can include using halogen-containing and halogen-free tungsten-containing and nitrogen-containing compounds.
- Example deposition apparatuses include various systems, e.g., ALTUS ® and ALTUS ® Max, available from Lam Research Corp., of Fremont, California, or any of a variety of other commercially available processing systems.
- ALD atomic layer deposition
- a diborane (B 2 H 6 )/hydrogen (H2) co-flow and tungsten hexafluoride (WF6) may be introduced in alternating pulses to the surface of the semiconductor substrate, at the first station, using an individual gas supply system that creates a localized atmosphere at the substrate surface.
- Another station may be used for tungsten bulk layer deposition. Two 15 or more stations may be used to deposit tungsten in parallel processing. Alternatively a wafer may be indexed to have operations performed over two or more stations sequentially.
- FIG. 4 is a schematic of a process system suitable for conducting deposition processes in accordance with embodiments.
- the system 400 includes a transfer module 20 403.
- the transfer module 403 provides a clean, pressurized environment to minimize risk of contamination of substrates being processed as they are moved between various reactor modules.
- Mounted on the transfer module 403 is a multi-station reactor 409 capable of performing ALD and CVD according to various embodiments.
- Multi-station reactor 409 may include multiple stations 411, 413, 415, and 417 that may sequentially 25 perform operations in accordance with disclosed embodiments.
- multi- station reactor 409 may be configured such that station 411 performs a tungsten nucleation layer deposition using a chlorine-containing tungsten precursor or a fluorine- containing precursor, and station 413 performs an ALD tungsten deposition operation according to various embodiments.
- station 415 may also form an 30 ALD tungsten deposition operation, and station 417 may perform a CVD operation.
- Stations may include a heated pedestal or substrate support, one or more gas inlets or showerhead or dispersion plate.
- An example of a deposition station 500 is depicted in Figure 5, including substrate support 502 and showerhead 503.
- a heater may be provided in pedestal portion 501.
- the transfer module 403 may be one or 5 more single or multi-station modules 407 capable of performing plasma or chemical (nonplasma) pre-cleans, other deposition operations, or etch operations.
- the module may also be used for various treatments to, for example, prepare a substrate for a deposition process.
- the system 400 also includes one or more wafer source modules 401, where wafers are stored before and after processing.
- An atmospheric robot (not shown) in the 10 atmospheric transfer chamber 419 may first remove wafers from the source modules 401 to loadlocks 421.
- a wafer transfer device (generally a robot arm unit) in the transfer module 403 moves the wafers from loadlocks 421 to and among the modules mounted on the transfer module 403.
- a system controller 429 is employed to control process 15 conditions during deposition.
- the controller 429 will typically include one or more memory devices and one or more processors.
- a processor may include a CPU or computer, analog and/or digital input/output connections, stepper motor controller boards, etc.
- the controller 429 may control all of the activities of the deposition apparatus.
- the system controller 429 executes system control software, including sets of instructions 20 for controlling the timing, mixture of gases, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters of a particular process.
- RF radio frequency
- Other computer programs stored on memory devices associated with the controller 429 may be employed in some embodiments.
- the user interface may include a display screen, graphical software displays of the apparatus and/or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.
- System control logic may be configured in any suitable way. In general, the logic
- the instructions for controlling the drive circuitry may be hard coded or provided as software.
- the instructions may be provided by "programming.” Such programming is understood to include logic of any form, including hard coded logic in digital signal processors, application-specific integrated circuits, and other devices which have specific algorithms implemented as 5 hardware. Programming is also understood to include software or firmware instructions that may be executed on a general purpose processor. System control software may be coded in any suitable computer readable programming language.
- the computer program code for controlling the germanium-containing reducing agent pulses, hydrogen flow, and tungsten-containing precursor pulses, and other 10 processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as indicated, the program code may be hard coded.
- controller parameters relate to process conditions, such as, for example,
- process gas composition and flow rates temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe, and may be entered utilizing the user interface.
- Signals for monitoring the process may be provided by analog and/or digital input connections of the system controller 429.
- the signals for controlling the process are 20 output on the analog and digital output connections of the deposition apparatus 400.
- the system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to carry out the deposition processes in accordance with the disclosed embodiments. Examples of programs or 25 sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.
- a controller 429 is part of a system, which may be part of the above-described examples.
- Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or 30 platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.).
- These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate.
- the electronics may be referred to as the "controller,” which may control various components or subparts of the system or systems.
- the controller 429 may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation 10 settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.
- temperature settings e.g., heating and/or cooling
- RF radio frequency
- the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint 15 measurements, and the like.
- the integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software).
- Program instructions may be instructions communicated to the controller in the form of various individual 20 settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system.
- the operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.
- the controller 429 may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof.
- the controller 429 may be in the "cloud" or all or a part of a fab host computer system, which can allow for remote access of the wafer processing.
- the computer may enable remote access to the system to monitor 30 current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process.
- a remote computer e.g.
- a server can provide process recipes to a system over a network, which may include a local network or the Internet.
- the remote computer may include a user interface that 5 enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer.
- the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type 10 of tool that the controller is configured to interface with or control.
- the controller may be distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein.
- An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication 15 with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.
- example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a
- PVD physical vapor deposition
- ALD atomic layer etch
- ALE atomic layer etch
- ion implantation chamber or module a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.
- the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or 30 load ports in a semiconductor manufacturing factory.
- the controller 429 may include various programs.
- a substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and other parts of the chamber such as a gas inlet and/or target.
- a process gas control program may include code for controlling gas composition, flow rates, pulse times, 5 and optionally for flowing gas into the chamber prior to deposition in order to stabilize the pressure in the chamber.
- a pressure control program may include code for controlling the pressure in the chamber by regulating, e.g., a throttle valve in the exhaust system of the chamber.
- a heater control program may include code for controlling the current to a heating unit that is used to heat the substrate. Alternatively, the heater control program 10 may control delivery of a heat transfer gas such as helium to the wafer chuck.
- the apparatus may include a gas manifold system, which provides line charges to the various gas distribution lines as shown schematically in Figure 6.
- Manifold 604 has inputs from a source 601 of a tungsten-containing precursor gas, which may include an accumulator (not shown),, which can also be referred to as a charge volume.
- Manifold 611 has an input from a source 609 of hydrogen (H2) and a source 610 of diborane-containing 20 mixture or other reducing gas (not shown). Both of these sources may include an accumulator (not shown).
- Manifold 621 has an input from a source 619 of purge gas, which also may include an accumulator.
- the manifolds 604, 611 and 6521 provide tungsten- containing precursor gas, co-reactant gas, and purge gas to the deposition chamber through valved distribution lines, 605, 613 and 625 respectively.
- the various valves may 25 be opened or closed to provide a line charge, i.e., to pressurize the distribution lines.
- valve 606 is closed to vacuum and valve 608 is closed.
- valve 608 is opened and the co-flow gas is delivered to the chamber.
- valve 608 is closed.
- the chamber can then be purged to a vacuum by opening of valve 606 to vacuum.
- Similar processes can be used to deliver the reducing gas.
- distribution line 613 is charged by closing valve 615 and closing valve 617 to vacuum. Opening of valve 615 allows for delivery of the reducing gas to the chamber.
- valve 627 is charged by closing valve 627 and closing valve 623 to vacuum. Opening of valve 627 allows for delivery of the 5 argon or other inert purge gas to the chamber.
- the diborane or other reducing gas can be mixed with hydrogen at any point in the process and is not limited to the arrangement of Figure 6.
- a hydrogen/diborane mixture as stored may be used.
- it may be obtained from separate sources but mixed during the process at some point before delivery to the 10 chamber or may be delivered separately to the chamber with mixing occurring in the chamber.
- Figure 6 also shows vacuum pumps in which valves 606, 617 and 623, respectively, can be opened to purge the system.
- the supply of gas through the various distribution lines is controlled by a controller, such as a mass flow controller which is 15 controlled by a microprocessor, a digital signal processor or the like, that is programmed with the flow rates, duration of the flow, and the sequencing of the processes.
- a controller such as a mass flow controller which is 15 controlled by a microprocessor, a digital signal processor or the like, that is programmed with the flow rates, duration of the flow, and the sequencing of the processes.
- valve and MFC commands are 20 delivered to embedded digital input-output controllers (IOC) in discrete packets of information containing instructions for all time-critical commands for all or a part of a deposition sequence.
- IOC embedded digital input-output controllers
- the ALTUS systems of Lam Research provide at least one IOC sequence.
- the lOCs can be physically located at various points in the apparatus; e.g., within the process module or on a stand-alone power rack standing some distance away from the 25 process module. There may be multiple lOCs in each module (e.g., 3 per module).
- all commands for controlling valves and setting flow for MFCs may be included in a single IOC sequence. This assures that the timing of all the devices is tightly controlled from an absolute standpoint and also relative to each other.
- IOC 30 sequences running at any given time. This allows for, say, ALD to run at station 1-2 with all timing controlled for all the hardware components needed to deposit a ALD nucleation layer at those stations.
- a second sequence might be running concurrently to deposit a bulk metal at other deposition stations in the same module.
- the relative timing of the devices controlling the delivery of reagents to stations 3-4 is important within that group of devices, but the relative timing of the ALD process at stations 1-2 can be offset from the 5 relative timing of stations 3-4.
- An IOC translates the information in a packetized sequence and delivers digital or analog command signals directly to MFC or pneumatic solenoid banks controlling the valves.
- a pulse of tungsten-containing precursor gas may be generated as follows. Initially, the system diverts WF6 to a vacuum pump for a period of time while the MFC or
- the system pressurizes the tungsten gas delivery manifold by closing both the valve 606 to vacuum and the valve 608 to the deposition chamber. This may be done for a period of between about 0.1 and 5 seconds, for example, to create an initial burst of reagent when the valve to the deposition chamber is opened.
- valve 508 This is accomplished by opening valve 508 for between about 0.1 and 10 seconds in one example.
- the tungsten-containing gas is purged from the deposition chamber using a suitable purge gas. Similar to above, the system may pressurize the purge gas delivery manifold by closing valve 623 and valve 627. Valves to an accumulator (not shown)
- valve 20 are also closed to permit the accumulator to pressurize. This may be done for a period of between about .1 and 5 seconds, for example, to rapidly flush reagent from the deposition chamber when the valve to the deposition chamber is opened.
- valve 527 is opened to the deposition chamber, an accumulator outlet valve is opened simultaneously or shortly thereafter to increase the mass flow of purge gas into the deposition chamber.
- Multiple accumulators may be used sequentially flow pressurized the same reactant or purge gas into the chamber during a single pulse operation. This can increases the overall mass flow rate.
- Lithographic patterning of a film typically includes some or all of the following steps, each step provided with a number of possible tools: (1) application of photoresist on a workpiece, i.e., 5 substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) 10 removing the resist using a tool such as an RF or microwave plasma resist stripper
Landscapes
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Chemical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
- Crystallography & Structural Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SG11202111277UA SG11202111277UA (en) | 2019-04-11 | 2020-04-07 | High step coverage tungsten deposition |
| US17/601,918 US12002679B2 (en) | 2019-04-11 | 2020-04-07 | High step coverage tungsten deposition |
| JP2021559713A JP2022522226A (en) | 2019-04-11 | 2020-04-07 | Tungsten deposits with high step coverage |
| CN202080027971.9A CN113710830A (en) | 2019-04-11 | 2020-04-07 | High step coverage tungsten deposition |
| KR1020217036832A KR20210141762A (en) | 2019-04-11 | 2020-04-07 | High step coverage tungsten deposition |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201962832291P | 2019-04-11 | 2019-04-11 | |
| US62/832,291 | 2019-04-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2020210260A1 true WO2020210260A1 (en) | 2020-10-15 |
Family
ID=72751976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2020/027107 Ceased WO2020210260A1 (en) | 2019-04-11 | 2020-04-07 | High step coverage tungsten deposition |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US12002679B2 (en) |
| JP (1) | JP2022522226A (en) |
| KR (1) | KR20210141762A (en) |
| CN (1) | CN113710830A (en) |
| SG (1) | SG11202111277UA (en) |
| TW (1) | TW202104638A (en) |
| WO (1) | WO2020210260A1 (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2021523292A (en) | 2018-05-03 | 2021-09-02 | ラム リサーチ コーポレーションLam Research Corporation | How to deposit tungsten and other metals in a 3D NAND structure |
| US11972952B2 (en) | 2018-12-14 | 2024-04-30 | Lam Research Corporation | Atomic layer deposition on 3D NAND structures |
| KR20210158419A (en) | 2019-05-22 | 2021-12-30 | 램 리써치 코포레이션 | Nucleation-Free Tungsten Deposition |
| US12077858B2 (en) | 2019-08-12 | 2024-09-03 | Lam Research Corporation | Tungsten deposition |
| JP7295749B2 (en) * | 2019-09-13 | 2023-06-21 | キオクシア株式会社 | Semiconductor device manufacturing method |
| US20230317458A1 (en) * | 2022-04-05 | 2023-10-05 | Applied Materials, Inc. | Gap fill enhancement with thermal etch |
| WO2024097068A1 (en) * | 2022-11-02 | 2024-05-10 | Lam Research Corporation | Dual nitrogen flow capability for low fluorine tungsten deposition |
| US20250391666A1 (en) * | 2024-06-21 | 2025-12-25 | Applied Materials, Inc. | Residue removal after etch processes using a boron-containing etchant |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020048938A1 (en) * | 1998-12-18 | 2002-04-25 | Hotaka Ishizuka | Tungsten film forming method |
| US20060040052A1 (en) * | 2001-10-10 | 2006-02-23 | Hongbin Fang | Methods for depositing tungsten layers employing atomic layer deposition techniques |
| US20080317954A1 (en) * | 2001-07-13 | 2008-12-25 | Xinliang Lu | Pulsed deposition process for tungsten nucleation |
| US20120199887A1 (en) * | 2011-02-03 | 2012-08-09 | Lana Chan | Methods of controlling tungsten film properties |
| WO2019036292A1 (en) * | 2017-08-14 | 2019-02-21 | Lam Research Corporation | Metal fill process for three-dimensional vertical nand wordline |
Family Cites Families (309)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FI117944B (en) | 1999-10-15 | 2007-04-30 | Asm Int | Process for making transition metal nitride thin films |
| JPS5629648A (en) | 1979-08-16 | 1981-03-25 | Toshiba Tungaloy Co Ltd | High hardness sintered body |
| JPS62216224A (en) | 1986-03-17 | 1987-09-22 | Fujitsu Ltd | Selectively growing method for tungsten |
| JPS62260340A (en) | 1986-05-06 | 1987-11-12 | Toshiba Corp | Manufacture of semiconductor device |
| JP2560028B2 (en) | 1987-05-07 | 1996-12-04 | 新技術事業団 | Method for producing titanium boride |
| US4746375A (en) | 1987-05-08 | 1988-05-24 | General Electric Company | Activation of refractory metal surfaces for electroless plating |
| JPH0266399A (en) | 1988-08-30 | 1990-03-06 | Semiconductor Energy Lab Co Ltd | Gas charging vessel and manufacture thereof |
| US4962063A (en) | 1988-11-10 | 1990-10-09 | Applied Materials, Inc. | Multistep planarized chemical vapor deposition process with the use of low melting inorganic material for flowing while depositing |
| JPH02187031A (en) | 1989-01-14 | 1990-07-23 | Sharp Corp | Semiconductor device |
| US5250329A (en) | 1989-04-06 | 1993-10-05 | Microelectronics And Computer Technology Corporation | Method of depositing conductive lines on a dielectric |
| GB8907898D0 (en) | 1989-04-07 | 1989-05-24 | Inmos Ltd | Semiconductor devices and fabrication thereof |
| US5028565A (en) | 1989-08-25 | 1991-07-02 | Applied Materials, Inc. | Process for CVD deposition of tungsten layer on semiconductor wafer |
| DE69033760T2 (en) | 1990-01-08 | 2001-10-25 | Lsi Logic Corp | Structure for filtering process gases for use in a chemical vapor deposition chamber |
| KR100209856B1 (en) | 1990-08-31 | 1999-07-15 | 가나이 쓰도무 | Method of manufacturing semiconductor device |
| JPH04142061A (en) | 1990-10-02 | 1992-05-15 | Sony Corp | Formation of tungsten plug |
| JP3040177B2 (en) | 1990-12-17 | 2000-05-08 | 沖電気工業株式会社 | Semiconductor element wiring forming method |
| US5250467A (en) | 1991-03-29 | 1993-10-05 | Applied Materials, Inc. | Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer |
| US5308655A (en) | 1991-08-16 | 1994-05-03 | Materials Research Corporation | Processing for forming low resistivity titanium nitride films |
| US5567583A (en) | 1991-12-16 | 1996-10-22 | Biotronics Corporation | Methods for reducing non-specific priming in DNA detection |
| JPH05226280A (en) | 1992-02-14 | 1993-09-03 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
| US5370739A (en) | 1992-06-15 | 1994-12-06 | Materials Research Corporation | Rotating susceptor semiconductor wafer processing cluster tool module useful for tungsten CVD |
| US5326723A (en) | 1992-09-09 | 1994-07-05 | Intel Corporation | Method for improving stability of tungsten chemical vapor deposition |
| KR950012738B1 (en) | 1992-12-10 | 1995-10-20 | 현대전자산업주식회사 | Tungsten contact plug manufacturing method of semiconductor device |
| JP3014019B2 (en) | 1993-11-26 | 2000-02-28 | 日本電気株式会社 | Method for manufacturing semiconductor device |
| KR970009867B1 (en) | 1993-12-17 | 1997-06-18 | 현대전자산업 주식회사 | Forming method of tungsten silicide in the semiconductor device |
| JP3291889B2 (en) | 1994-02-15 | 2002-06-17 | ソニー株式会社 | Dry etching method |
| DE69518710T2 (en) | 1994-09-27 | 2001-05-23 | Applied Materials Inc | Process for treating a substrate in a vacuum treatment chamber |
| JPH08115984A (en) | 1994-10-17 | 1996-05-07 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
| US5545581A (en) | 1994-12-06 | 1996-08-13 | International Business Machines Corporation | Plug strap process utilizing selective nitride and oxide etches |
| US6001729A (en) | 1995-01-10 | 1999-12-14 | Kawasaki Steel Corporation | Method of forming wiring structure for semiconductor device |
| JP2737764B2 (en) | 1995-03-03 | 1998-04-08 | 日本電気株式会社 | Semiconductor device and manufacturing method thereof |
| JP3422345B2 (en) | 1995-05-31 | 2003-06-30 | 日本電信電話株式会社 | Method of forming tungsten film |
| JPH0922896A (en) | 1995-07-07 | 1997-01-21 | Toshiba Corp | Selective metal film formation method |
| JPH0927596A (en) | 1995-07-11 | 1997-01-28 | Sanyo Electric Co Ltd | Manufacture of semiconductor device |
| US5863819A (en) | 1995-10-25 | 1999-01-26 | Micron Technology, Inc. | Method of fabricating a DRAM access transistor with dual gate oxide technique |
| TW310461B (en) | 1995-11-10 | 1997-07-11 | Matsushita Electric Industrial Co Ltd | |
| US6017818A (en) | 1996-01-22 | 2000-01-25 | Texas Instruments Incorporated | Process for fabricating conformal Ti-Si-N and Ti-B-N based barrier films with low defect density |
| US5833817A (en) | 1996-04-22 | 1998-11-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for improving conformity and contact bottom coverage of sputtered titanium nitride barrier layers |
| US5633200A (en) | 1996-05-24 | 1997-05-27 | Micron Technology, Inc. | Process for manufacturing a large grain tungsten nitride film and process for manufacturing a lightly nitrided titanium salicide diffusion barrier with a large grain tungsten nitride cover layer |
| US5963833A (en) | 1996-07-03 | 1999-10-05 | Micron Technology, Inc. | Method for cleaning semiconductor wafers and |
| US5916634A (en) | 1996-10-01 | 1999-06-29 | Sandia Corporation | Chemical vapor deposition of W-Si-N and W-B-N |
| KR100214852B1 (en) | 1996-11-02 | 1999-08-02 | 김영환 | Metal wiring formation method of semiconductor device |
| US6310300B1 (en) | 1996-11-08 | 2001-10-30 | International Business Machines Corporation | Fluorine-free barrier layer between conductor and insulator for degradation prevention |
| KR100255516B1 (en) | 1996-11-28 | 2000-05-01 | 김영환 | A metal wire of semiconductor device and forming method thereof |
| US6297152B1 (en) | 1996-12-12 | 2001-10-02 | Applied Materials, Inc. | CVD process for DCS-based tungsten silicide |
| JP3090074B2 (en) | 1997-01-20 | 2000-09-18 | 日本電気株式会社 | Semiconductor device and manufacturing method thereof |
| US5804249A (en) | 1997-02-07 | 1998-09-08 | Lsi Logic Corporation | Multistep tungsten CVD process with amorphization step |
| US6156382A (en) | 1997-05-16 | 2000-12-05 | Applied Materials, Inc. | Chemical vapor deposition process for depositing tungsten |
| US6037248A (en) | 1997-06-13 | 2000-03-14 | Micron Technology, Inc. | Method of fabricating integrated circuit wiring with low RC time delay |
| US6287965B1 (en) | 1997-07-28 | 2001-09-11 | Samsung Electronics Co, Ltd. | Method of forming metal layer using atomic layer deposition and semiconductor device having the metal layer as barrier metal layer or upper or lower electrode of capacitor |
| US5956609A (en) | 1997-08-11 | 1999-09-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for reducing stress and improving step-coverage of tungsten interconnects and plugs |
| US5795824A (en) | 1997-08-28 | 1998-08-18 | Novellus Systems, Inc. | Method for nucleation of CVD tungsten films |
| US5913145A (en) | 1997-08-28 | 1999-06-15 | Texas Instruments Incorporated | Method for fabricating thermally stable contacts with a diffusion barrier formed at high temperatures |
| US5926720A (en) | 1997-09-08 | 1999-07-20 | Lsi Logic Corporation | Consistent alignment mark profiles on semiconductor wafers using PVD shadowing |
| US7829144B2 (en) | 1997-11-05 | 2010-11-09 | Tokyo Electron Limited | Method of forming a metal film for electrode |
| US6861356B2 (en) | 1997-11-05 | 2005-03-01 | Tokyo Electron Limited | Method of forming a barrier film and method of forming wiring structure and electrodes of semiconductor device having a barrier film |
| US6099904A (en) | 1997-12-02 | 2000-08-08 | Applied Materials, Inc. | Low resistivity W using B2 H6 nucleation step |
| KR100272523B1 (en) | 1998-01-26 | 2000-12-01 | 김영환 | Method for forming metallization of semiconductor device |
| US6284316B1 (en) | 1998-02-25 | 2001-09-04 | Micron Technology, Inc. | Chemical vapor deposition of titanium |
| JPH11260759A (en) | 1998-03-12 | 1999-09-24 | Fujitsu Ltd | Method for manufacturing semiconductor device |
| US6452276B1 (en) | 1998-04-30 | 2002-09-17 | International Business Machines Corporation | Ultra thin, single phase, diffusion barrier for metal conductors |
| US6066366A (en) | 1998-07-22 | 2000-05-23 | Applied Materials, Inc. | Method for depositing uniform tungsten layers by CVD |
| US6143082A (en) | 1998-10-08 | 2000-11-07 | Novellus Systems, Inc. | Isolation of incompatible processes in a multi-station processing chamber |
| KR100273767B1 (en) | 1998-10-28 | 2001-01-15 | 윤종용 | Tungsten film manufacturing method of semiconductor device and semiconductor device manufactured accordingly |
| US6037263A (en) | 1998-11-05 | 2000-03-14 | Vanguard International Semiconductor Corporation | Plasma enhanced CVD deposition of tungsten and tungsten compounds |
| KR100296126B1 (en) | 1998-12-22 | 2001-08-07 | 박종섭 | Gate electrode formation method of highly integrated memory device |
| US20010014533A1 (en) | 1999-01-08 | 2001-08-16 | Shih-Wei Sun | Method of fabricating salicide |
| JP3206578B2 (en) | 1999-01-11 | 2001-09-10 | 日本電気株式会社 | Method of manufacturing semiconductor device having multilayer wiring structure |
| JP4570704B2 (en) | 1999-02-17 | 2010-10-27 | 株式会社アルバック | Barrier film manufacturing method |
| US6306211B1 (en) | 1999-03-23 | 2001-10-23 | Matsushita Electric Industrial Co., Ltd. | Method for growing semiconductor film and method for fabricating semiconductor device |
| TW452607B (en) | 1999-03-26 | 2001-09-01 | Nat Science Council | Production of a refractory metal by chemical vapor deposition of a bilayer-stacked tungsten metal |
| US6245654B1 (en) | 1999-03-31 | 2001-06-12 | Taiwan Semiconductor Manufacturing Company, Ltd | Method for preventing tungsten contact/via plug loss after a backside pressure fault |
| US6294468B1 (en) | 1999-05-24 | 2001-09-25 | Agere Systems Guardian Corp. | Method of chemical vapor depositing tungsten films |
| US6720261B1 (en) | 1999-06-02 | 2004-04-13 | Agere Systems Inc. | Method and system for eliminating extrusions in semiconductor vias |
| US6174812B1 (en) | 1999-06-08 | 2001-01-16 | United Microelectronics Corp. | Copper damascene technology for ultra large scale integration circuits |
| US6355558B1 (en) | 1999-06-10 | 2002-03-12 | Texas Instruments Incorporated | Metallization structure, and associated method, to improve crystallographic texture and cavity fill for CVD aluminum/PVD aluminum alloy films |
| US6309964B1 (en) | 1999-07-08 | 2001-10-30 | Taiwan Semiconductor Manufacturing Company | Method for forming a copper damascene structure over tungsten plugs with improved adhesion, oxidation resistance, and diffusion barrier properties using nitridation of the tungsten plug |
| US6265312B1 (en) | 1999-08-02 | 2001-07-24 | Stmicroelectronics, Inc. | Method for depositing an integrated circuit tungsten film stack that includes a post-nucleation pump down step |
| US6391785B1 (en) | 1999-08-24 | 2002-05-21 | Interuniversitair Microelektronica Centrum (Imec) | Method for bottomless deposition of barrier layers in integrated circuit metallization schemes |
| US6309966B1 (en) | 1999-09-03 | 2001-10-30 | Motorola, Inc. | Apparatus and method of a low pressure, two-step nucleation tungsten deposition |
| US6303480B1 (en) | 1999-09-13 | 2001-10-16 | Applied Materials, Inc. | Silicon layer to improve plug filling by CVD |
| US6610151B1 (en) | 1999-10-02 | 2003-08-26 | Uri Cohen | Seed layers for interconnects and methods and apparatus for their fabrication |
| US6924226B2 (en) | 1999-10-02 | 2005-08-02 | Uri Cohen | Methods for making multiple seed layers for metallic interconnects |
| US6475276B1 (en) | 1999-10-15 | 2002-11-05 | Asm Microchemistry Oy | Production of elemental thin films using a boron-containing reducing agent |
| AU1208201A (en) | 1999-10-15 | 2001-04-30 | Asm America, Inc. | Method for depositing nanolaminate thin films on sensitive surfaces |
| KR100330163B1 (en) | 2000-01-06 | 2002-03-28 | 윤종용 | A Method of Forming Tungsten Contact Plug in A Semiconductor Devices |
| FI20000099A0 (en) | 2000-01-18 | 2000-01-18 | Asm Microchemistry Ltd | Process for making metal thin films |
| US6277744B1 (en) | 2000-01-21 | 2001-08-21 | Advanced Micro Devices, Inc. | Two-level silane nucleation for blanket tungsten deposition |
| US6777331B2 (en) | 2000-03-07 | 2004-08-17 | Simplus Systems Corporation | Multilayered copper structure for improving adhesion property |
| US6429126B1 (en) | 2000-03-29 | 2002-08-06 | Applied Materials, Inc. | Reduced fluorine contamination for tungsten CVD |
| WO2001089017A1 (en) | 2000-05-18 | 2001-11-22 | Corning Incorporated | High performance solid electrolyte fuel cells |
| JP3651360B2 (en) | 2000-05-19 | 2005-05-25 | 株式会社村田製作所 | Method for forming electrode film |
| US20030008070A1 (en) | 2001-06-12 | 2003-01-09 | Applied Materials,Inc | Low-resistivity tungsten from high-pressure chemical vapor deposition using metal-organic precursor |
| US7253076B1 (en) | 2000-06-08 | 2007-08-07 | Micron Technologies, Inc. | Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers |
| JP2002016066A (en) | 2000-06-27 | 2002-01-18 | Mitsubishi Electric Corp | Semiconductor device and method of manufacturing the same |
| US6620723B1 (en) | 2000-06-27 | 2003-09-16 | Applied Materials, Inc. | Formation of boride barrier layers using chemisorption techniques |
| US7964505B2 (en) | 2005-01-19 | 2011-06-21 | Applied Materials, Inc. | Atomic layer deposition of tungsten materials |
| US6551929B1 (en) | 2000-06-28 | 2003-04-22 | Applied Materials, Inc. | Bifurcated deposition process for depositing refractory metal layers employing atomic layer deposition and chemical vapor deposition techniques |
| US7101795B1 (en) | 2000-06-28 | 2006-09-05 | Applied Materials, Inc. | Method and apparatus for depositing refractory metal layers employing sequential deposition techniques to form a nucleation layer |
| US7405158B2 (en) | 2000-06-28 | 2008-07-29 | Applied Materials, Inc. | Methods for depositing tungsten layers employing atomic layer deposition techniques |
| US6936538B2 (en) | 2001-07-16 | 2005-08-30 | Applied Materials, Inc. | Method and apparatus for depositing tungsten after surface treatment to improve film characteristics |
| US7732327B2 (en) | 2000-06-28 | 2010-06-08 | Applied Materials, Inc. | Vapor deposition of tungsten materials |
| US6585823B1 (en) | 2000-07-07 | 2003-07-01 | Asm International, N.V. | Atomic layer deposition |
| US6491978B1 (en) | 2000-07-10 | 2002-12-10 | Applied Materials, Inc. | Deposition of CVD layers for copper metallization using novel metal organic chemical vapor deposition (MOCVD) precursors |
| US6218301B1 (en) | 2000-07-31 | 2001-04-17 | Applied Materials, Inc. | Deposition of tungsten films from W(CO)6 |
| US6740591B1 (en) | 2000-11-16 | 2004-05-25 | Intel Corporation | Slurry and method for chemical mechanical polishing of copper |
| CN1295756C (en) | 2000-11-17 | 2007-01-17 | 东京毅力科创株式会社 | Method for forming tungsten film on barrier film |
| KR100375230B1 (en) | 2000-12-20 | 2003-03-08 | 삼성전자주식회사 | Method for forming an interconnection of semiconductor device having a smooth surface |
| US6908848B2 (en) | 2000-12-20 | 2005-06-21 | Samsung Electronics, Co., Ltd. | Method for forming an electrical interconnection providing improved surface morphology of tungsten |
| US6613656B2 (en) | 2001-02-13 | 2003-09-02 | Micron Technology, Inc. | Sequential pulse deposition |
| US20020117399A1 (en) | 2001-02-23 | 2002-08-29 | Applied Materials, Inc. | Atomically thin highly resistive barrier layer in a copper via |
| US20020190379A1 (en) | 2001-03-28 | 2002-12-19 | Applied Materials, Inc. | W-CVD with fluorine-free tungsten nucleation |
| US20020168840A1 (en) | 2001-05-11 | 2002-11-14 | Applied Materials, Inc. | Deposition of tungsten silicide films |
| US7262125B2 (en) | 2001-05-22 | 2007-08-28 | Novellus Systems, Inc. | Method of forming low-resistivity tungsten interconnects |
| US6635965B1 (en) | 2001-05-22 | 2003-10-21 | Novellus Systems, Inc. | Method for producing ultra-thin tungsten layers with improved step coverage |
| US7955972B2 (en) | 2001-05-22 | 2011-06-07 | Novellus Systems, Inc. | Methods for growing low-resistivity tungsten for high aspect ratio and small features |
| US7141494B2 (en) | 2001-05-22 | 2006-11-28 | Novellus Systems, Inc. | Method for reducing tungsten film roughness and improving step coverage |
| US7005372B2 (en) | 2003-01-21 | 2006-02-28 | Novellus Systems, Inc. | Deposition of tungsten nitride |
| US9076843B2 (en) | 2001-05-22 | 2015-07-07 | Novellus Systems, Inc. | Method for producing ultra-thin tungsten layers with improved step coverage |
| US7589017B2 (en) | 2001-05-22 | 2009-09-15 | Novellus Systems, Inc. | Methods for growing low-resistivity tungsten film |
| US6686278B2 (en) | 2001-06-19 | 2004-02-03 | United Microelectronics Corp. | Method for forming a plug metal layer |
| US20070009658A1 (en) | 2001-07-13 | 2007-01-11 | Yoo Jong H | Pulse nucleation enhanced nucleation technique for improved step coverage and better gap fill for WCVD process |
| TW581822B (en) | 2001-07-16 | 2004-04-01 | Applied Materials Inc | Formation of composite tungsten films |
| JP2005504885A (en) | 2001-07-25 | 2005-02-17 | アプライド マテリアルズ インコーポレイテッド | Barrier formation using a novel sputter deposition method |
| US20030029715A1 (en) | 2001-07-25 | 2003-02-13 | Applied Materials, Inc. | An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems |
| JP4032872B2 (en) | 2001-08-14 | 2008-01-16 | 東京エレクトロン株式会社 | Method for forming tungsten film |
| JP4595989B2 (en) | 2001-08-24 | 2010-12-08 | 東京エレクトロン株式会社 | Deposition method |
| AU2002333601A1 (en) | 2001-09-14 | 2003-04-01 | Asm America, Inc. | Metal nitride deposition by ald using gettering reactant |
| US6607976B2 (en) | 2001-09-25 | 2003-08-19 | Applied Materials, Inc. | Copper interconnect barrier layer structure and formation method |
| JP2003142484A (en) | 2001-10-31 | 2003-05-16 | Mitsubishi Electric Corp | Method for manufacturing semiconductor device |
| US6566262B1 (en) | 2001-11-01 | 2003-05-20 | Lsi Logic Corporation | Method for creating self-aligned alloy capping layers for copper interconnect structures |
| TWI253478B (en) | 2001-11-14 | 2006-04-21 | Mitsubishi Heavy Ind Ltd | Barrier metal film production apparatus, barrier metal film production method, metal film production method, and metal film production apparatus |
| US20030091870A1 (en) | 2001-11-15 | 2003-05-15 | Siddhartha Bhowmik | Method of forming a liner for tungsten plugs |
| KR20030050652A (en) | 2001-12-19 | 2003-06-25 | 주식회사 하이닉스반도체 | Method for forming tungsten layer |
| US20030123216A1 (en) | 2001-12-27 | 2003-07-03 | Yoon Hyungsuk A. | Deposition of tungsten for the formation of conformal tungsten silicide |
| US6911092B2 (en) | 2002-01-17 | 2005-06-28 | Sundew Technologies, Llc | ALD apparatus and method |
| US6833161B2 (en) | 2002-02-26 | 2004-12-21 | Applied Materials, Inc. | Cyclical deposition of tungsten nitride for metal oxide gate electrode |
| US6566250B1 (en) | 2002-03-18 | 2003-05-20 | Taiwant Semiconductor Manufacturing Co., Ltd | Method for forming a self aligned capping layer |
| US20030224217A1 (en) | 2002-05-31 | 2003-12-04 | Applied Materials, Inc. | Metal nitride formation |
| US6905543B1 (en) | 2002-06-19 | 2005-06-14 | Novellus Systems, Inc | Methods of forming tungsten nucleation layer |
| TWI287559B (en) | 2002-08-22 | 2007-10-01 | Konica Corp | Organic-inorganic hybrid film, its manufacturing method, optical film, and polarizing film |
| US6790773B1 (en) | 2002-08-28 | 2004-09-14 | Novellus Systems, Inc. | Process for forming barrier/seed structures for integrated circuits |
| US6706625B1 (en) | 2002-12-06 | 2004-03-16 | Chartered Semiconductor Manufacturing Ltd. | Copper recess formation using chemical process for fabricating barrier cap for lines and vias |
| US6962873B1 (en) | 2002-12-10 | 2005-11-08 | Novellus Systems, Inc. | Nitridation of electrolessly deposited cobalt |
| WO2005003033A2 (en) | 2002-12-23 | 2005-01-13 | Applied Thin Films, Inc. | Aluminum phosphate coatings |
| AU2003289005A1 (en) | 2002-12-27 | 2004-07-29 | Ulvac Inc. | Method for forming tungsten nitride film |
| JP2004235456A (en) | 2003-01-30 | 2004-08-19 | Seiko Epson Corp | Film forming apparatus, film forming method, and semiconductor device manufacturing method |
| US7713592B2 (en) | 2003-02-04 | 2010-05-11 | Tegal Corporation | Nanolayer deposition process |
| JP3956049B2 (en) | 2003-03-07 | 2007-08-08 | 東京エレクトロン株式会社 | Method for forming tungsten film |
| US6844258B1 (en) | 2003-05-09 | 2005-01-18 | Novellus Systems, Inc. | Selective refractory metal and nitride capping |
| CN1241251C (en) | 2003-05-15 | 2006-02-08 | 上海集成电路研发中心有限公司 | Process flow of improved tungsten plug structure |
| US7211508B2 (en) | 2003-06-18 | 2007-05-01 | Applied Materials, Inc. | Atomic layer deposition of tantalum based barrier materials |
| JP2005029821A (en) | 2003-07-09 | 2005-02-03 | Tokyo Electron Ltd | Deposition method |
| US7754604B2 (en) | 2003-08-26 | 2010-07-13 | Novellus Systems, Inc. | Reducing silicon attack and improving resistivity of tungsten nitride film |
| JP4606006B2 (en) | 2003-09-11 | 2011-01-05 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
| US7078341B2 (en) | 2003-09-30 | 2006-07-18 | Tokyo Electron Limited | Method of depositing metal layers from metal-carbonyl precursors |
| US6924223B2 (en) | 2003-09-30 | 2005-08-02 | Tokyo Electron Limited | Method of forming a metal layer using an intermittent precursor gas flow process |
| KR20050054122A (en) | 2003-12-04 | 2005-06-10 | 성명모 | Method of fabricating thin film using uv-enhanced atomic layer deposition |
| KR100557626B1 (en) | 2003-12-23 | 2006-03-10 | 주식회사 하이닉스반도체 | Bit line formation method of semiconductor device |
| US20050139838A1 (en) | 2003-12-26 | 2005-06-30 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
| KR100528030B1 (en) | 2003-12-30 | 2005-11-15 | 주식회사 아이피에스 | A method of plating a thin film |
| KR101108304B1 (en) | 2004-02-26 | 2012-01-25 | 노벨러스 시스템즈, 인코포레이티드 | Deposition of tungsten nitride |
| KR101178743B1 (en) | 2004-04-12 | 2012-09-07 | 가부시키가이샤 알박 | Method for forming barrier film, and method for forming electrode film |
| EP1741119B1 (en) | 2004-04-21 | 2019-04-03 | Lumileds Holding B.V. | Method for the thermal treatment of tungsten electrodes free from thorium oxide for high-pressure discharge lamps |
| US7605469B2 (en) | 2004-06-30 | 2009-10-20 | Intel Corporation | Atomic layer deposited tantalum containing adhesion layer |
| US7429402B2 (en) | 2004-12-10 | 2008-09-30 | Applied Materials, Inc. | Ruthenium as an underlayer for tungsten film deposition |
| US20060145190A1 (en) | 2004-12-31 | 2006-07-06 | Salzman David B | Surface passivation for III-V compound semiconductors |
| KR100642750B1 (en) | 2005-01-31 | 2006-11-10 | 삼성전자주식회사 | Semiconductor device and manufacturing method thereof |
| US7344983B2 (en) | 2005-03-18 | 2008-03-18 | International Business Machines Corporation | Clustered surface preparation for silicide and metal contacts |
| US7220671B2 (en) | 2005-03-31 | 2007-05-22 | Intel Corporation | Organometallic precursors for the chemical phase deposition of metal films in interconnect applications |
| JP4738178B2 (en) | 2005-06-17 | 2011-08-03 | 富士通セミコンダクター株式会社 | Manufacturing method of semiconductor device |
| JP4945937B2 (en) | 2005-07-01 | 2012-06-06 | 東京エレクトロン株式会社 | Tungsten film forming method, film forming apparatus, and storage medium |
| JP4864368B2 (en) | 2005-07-21 | 2012-02-01 | シャープ株式会社 | Vapor deposition method |
| US7517798B2 (en) | 2005-09-01 | 2009-04-14 | Micron Technology, Inc. | Methods for forming through-wafer interconnects and structures resulting therefrom |
| US7235485B2 (en) | 2005-10-14 | 2007-06-26 | Samsung Electronics Co., Ltd. | Method of manufacturing semiconductor device |
| US8993055B2 (en) | 2005-10-27 | 2015-03-31 | Asm International N.V. | Enhanced thin film deposition |
| US7524765B2 (en) | 2005-11-02 | 2009-04-28 | Intel Corporation | Direct tailoring of the composition and density of ALD films |
| US7368394B2 (en) | 2006-02-27 | 2008-05-06 | Applied Materials, Inc. | Etch methods to form anisotropic features for high aspect ratio applications |
| US7276796B1 (en) | 2006-03-15 | 2007-10-02 | International Business Machines Corporation | Formation of oxidation-resistant seed layer for interconnect applications |
| JP2007250907A (en) | 2006-03-16 | 2007-09-27 | Renesas Technology Corp | Semiconductor device and manufacturing method therefor |
| US8258057B2 (en) | 2006-03-30 | 2012-09-04 | Intel Corporation | Copper-filled trench contact for transistor performance improvement |
| TW200746268A (en) | 2006-04-11 | 2007-12-16 | Applied Materials Inc | Process for forming cobalt-containing materials |
| US7956465B2 (en) | 2006-05-08 | 2011-06-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reducing resistivity in interconnect structures of integrated circuits |
| US7828504B2 (en) | 2006-05-12 | 2010-11-09 | Axcellis Technologies, Inc. | Combination load lock for handling workpieces |
| US7557047B2 (en) | 2006-06-09 | 2009-07-07 | Micron Technology, Inc. | Method of forming a layer of material using an atomic layer deposition process |
| KR100884339B1 (en) | 2006-06-29 | 2009-02-18 | 주식회사 하이닉스반도체 | Tungsten film formation method of semiconductor device and tungsten wiring layer formation method using same |
| US7355254B2 (en) | 2006-06-30 | 2008-04-08 | Intel Corporation | Pinning layer for low resistivity N-type source drain ohmic contacts |
| KR100705936B1 (en) | 2006-06-30 | 2007-04-13 | 주식회사 하이닉스반도체 | Bit line formation method of semiconductor device |
| US8153831B2 (en) | 2006-09-28 | 2012-04-10 | Praxair Technology, Inc. | Organometallic compounds, processes for the preparation thereof and methods of use thereof |
| KR100881391B1 (en) | 2006-09-29 | 2009-02-05 | 주식회사 하이닉스반도체 | Gate Forming Method of Semiconductor Device |
| US7939455B2 (en) | 2006-09-29 | 2011-05-10 | Tokyo Electron Limited | Method for forming strained silicon nitride films and a device containing such films |
| KR100894769B1 (en) | 2006-09-29 | 2009-04-24 | 주식회사 하이닉스반도체 | Metal wiring formation method of semiconductor device |
| KR20080036679A (en) | 2006-10-24 | 2008-04-29 | 삼성전자주식회사 | Method for forming nonvolatile memory device |
| US7675119B2 (en) | 2006-12-25 | 2010-03-09 | Elpida Memory, Inc. | Semiconductor device and manufacturing method thereof |
| KR100874829B1 (en) | 2006-12-26 | 2008-12-19 | 동부일렉트로닉스 주식회사 | Metal wiring formation method of semiconductor device |
| KR20080061978A (en) | 2006-12-28 | 2008-07-03 | 주식회사 하이닉스반도체 | Wiring Formation Method of Semiconductor Device |
| US8435898B2 (en) | 2007-04-05 | 2013-05-07 | Freescale Semiconductor, Inc. | First inter-layer dielectric stack for non-volatile memory |
| US20080254619A1 (en) | 2007-04-14 | 2008-10-16 | Tsang-Jung Lin | Method of fabricating a semiconductor device |
| WO2008129508A2 (en) | 2007-04-20 | 2008-10-30 | L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude | Deposition of transition metal carbide containing films |
| JP5277696B2 (en) | 2008-04-07 | 2013-08-28 | パナソニック株式会社 | Method for manufacturing piezoelectric device |
| TWI493058B (en) | 2007-05-15 | 2015-07-21 | 應用材料股份有限公司 | Atomic layer deposition method of tungsten material |
| JP2008288289A (en) | 2007-05-16 | 2008-11-27 | Oki Electric Ind Co Ltd | Field effect transistor and manufacturing method thereof |
| US8017182B2 (en) | 2007-06-21 | 2011-09-13 | Asm International N.V. | Method for depositing thin films by mixed pulsed CVD and ALD |
| US7655567B1 (en) | 2007-07-24 | 2010-02-02 | Novellus Systems, Inc. | Methods for improving uniformity and resistivity of thin tungsten films |
| KR101225642B1 (en) | 2007-11-15 | 2013-01-24 | 삼성전자주식회사 | Method for formation of contact plug of semiconductor device using H2 remote plasma treatment |
| WO2009073361A1 (en) | 2007-11-29 | 2009-06-11 | Lam Research Corporation | Pulsed bias plasma process to control microloading |
| KR100939777B1 (en) | 2007-11-30 | 2010-01-29 | 주식회사 하이닉스반도체 | Tungsten film formation method and wiring formation method of semiconductor device using same |
| US8080324B2 (en) | 2007-12-03 | 2011-12-20 | Kobe Steel, Ltd. | Hard coating excellent in sliding property and method for forming same |
| US7772114B2 (en) | 2007-12-05 | 2010-08-10 | Novellus Systems, Inc. | Method for improving uniformity and adhesion of low resistivity tungsten film |
| US20090162681A1 (en) | 2007-12-21 | 2009-06-25 | Artur Kolics | Activation solution for electroless plating on dielectric layers |
| US8053365B2 (en) | 2007-12-21 | 2011-11-08 | Novellus Systems, Inc. | Methods for forming all tungsten contacts and lines |
| KR100919808B1 (en) | 2008-01-02 | 2009-10-01 | 주식회사 하이닉스반도체 | Method of fabricating tungsten layer in semiconductor device |
| US8062977B1 (en) | 2008-01-31 | 2011-11-22 | Novellus Systems, Inc. | Ternary tungsten-containing resistive thin films |
| KR101015125B1 (en) | 2008-03-21 | 2011-02-16 | 주식회사 하이닉스반도체 | Method for manufacturing semiconductor device with interfacial reaction barrier |
| KR101163825B1 (en) | 2008-03-28 | 2012-07-09 | 도쿄엘렉트론가부시키가이샤 | Electrostatic chuck and manufacturing method thereof |
| US8058170B2 (en) | 2008-06-12 | 2011-11-15 | Novellus Systems, Inc. | Method for depositing thin tungsten film with low resistivity and robust micro-adhesion characteristics |
| US8385644B2 (en) | 2008-07-08 | 2013-02-26 | Zeitera, Llc | Digital video fingerprinting based on resultant weighted gradient orientation computation |
| US7968460B2 (en) | 2008-06-19 | 2011-06-28 | Micron Technology, Inc. | Semiconductor with through-substrate interconnect |
| US7830016B2 (en) | 2008-06-30 | 2010-11-09 | Intel Corporation | Seed layer for reduced resistance tungsten film |
| US8551885B2 (en) | 2008-08-29 | 2013-10-08 | Novellus Systems, Inc. | Method for reducing tungsten roughness and improving reflectivity |
| US20100062149A1 (en) | 2008-09-08 | 2010-03-11 | Applied Materials, Inc. | Method for tuning a deposition rate during an atomic layer deposition process |
| KR20100029952A (en) | 2008-09-09 | 2010-03-18 | 주식회사 하이닉스반도체 | Phase change random access memory device with the metallic capping layer and manufacturing of the same |
| US20100072623A1 (en) | 2008-09-19 | 2010-03-25 | Advanced Micro Devices, Inc. | Semiconductor device with improved contact plugs, and related fabrication methods |
| JP2010093116A (en) | 2008-10-09 | 2010-04-22 | Panasonic Corp | Semiconductor device and method for manufacturing the same |
| US20100120245A1 (en) | 2008-11-07 | 2010-05-13 | Agus Sofian Tjandra | Plasma and thermal anneal treatment to improve oxidation resistance of metal-containing films |
| US7825024B2 (en) | 2008-11-25 | 2010-11-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming through-silicon vias |
| US7964502B2 (en) | 2008-11-25 | 2011-06-21 | Freescale Semiconductor, Inc. | Multilayered through via |
| US8129270B1 (en) | 2008-12-10 | 2012-03-06 | Novellus Systems, Inc. | Method for depositing tungsten film having low resistivity, low roughness and high reflectivity |
| US20100144140A1 (en) | 2008-12-10 | 2010-06-10 | Novellus Systems, Inc. | Methods for depositing tungsten films having low resistivity for gapfill applications |
| US8110877B2 (en) | 2008-12-19 | 2012-02-07 | Intel Corporation | Metal-insulator-semiconductor tunneling contacts having an insulative layer disposed between source/drain contacts and source/drain regions |
| US8236691B2 (en) | 2008-12-31 | 2012-08-07 | Micron Technology, Inc. | Method of high aspect ratio plug fill |
| KR101263856B1 (en) | 2008-12-31 | 2013-05-13 | 어플라이드 머티어리얼스, 인코포레이티드 | Method of depositing tungsten film with reduced resistivity and improved surface morphology |
| DE102009015747B4 (en) | 2009-03-31 | 2013-08-08 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | A method of fabricating transistors having metal gate electrode structures and high-k gate dielectric and an intermediate etch stop layer |
| US9159571B2 (en) | 2009-04-16 | 2015-10-13 | Lam Research Corporation | Tungsten deposition process using germanium-containing reducing agent |
| US20100267230A1 (en) | 2009-04-16 | 2010-10-21 | Anand Chandrashekar | Method for forming tungsten contacts and interconnects with small critical dimensions |
| US20110020546A1 (en) | 2009-05-15 | 2011-01-27 | Asm International N.V. | Low Temperature ALD of Noble Metals |
| CN101572291B (en) | 2009-06-12 | 2010-09-15 | 中国科学院上海微系统与信息技术研究所 | A memory cell structure for realizing multi-level storage and its manufacturing method |
| US8039394B2 (en) | 2009-06-26 | 2011-10-18 | Seagate Technology Llc | Methods of forming layers of alpha-tantalum |
| US9034768B2 (en) | 2010-07-09 | 2015-05-19 | Novellus Systems, Inc. | Depositing tungsten into high aspect ratio features |
| US9653353B2 (en) | 2009-08-04 | 2017-05-16 | Novellus Systems, Inc. | Tungsten feature fill |
| US8119527B1 (en) | 2009-08-04 | 2012-02-21 | Novellus Systems, Inc. | Depositing tungsten into high aspect ratio features |
| US8207062B2 (en) | 2009-09-09 | 2012-06-26 | Novellus Systems, Inc. | Method for improving adhesion of low resistivity tungsten/tungsten nitride layers |
| US8278224B1 (en) | 2009-09-24 | 2012-10-02 | Novellus Systems, Inc. | Flowable oxide deposition using rapid delivery of process gases |
| CN102812043A (en) | 2009-11-19 | 2012-12-05 | 新加坡国立大学 | Method For Producing T Cell Receptor-like Monoclonal Antibodies And Uses Thereof |
| DE102009055392B4 (en) | 2009-12-30 | 2014-05-22 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Semiconductor component and method for producing the semiconductor device |
| CN101789369A (en) | 2010-01-28 | 2010-07-28 | 上海宏力半导体制造有限公司 | Etching method of polymetallic tungsten gate |
| JP5729911B2 (en) | 2010-03-11 | 2015-06-03 | ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated | Tungsten film manufacturing method and tungsten film deposition apparatus |
| US8709948B2 (en) | 2010-03-12 | 2014-04-29 | Novellus Systems, Inc. | Tungsten barrier and seed for copper filled TSV |
| KR101356332B1 (en) | 2010-03-19 | 2014-02-04 | 노벨러스 시스템즈, 인코포레이티드 | Method for depositing thin tungsten film with low resistivity and robust micro-adhesion characteristics |
| US9129945B2 (en) | 2010-03-24 | 2015-09-08 | Applied Materials, Inc. | Formation of liner and barrier for tungsten as gate electrode and as contact plug to reduce resistance and enhance device performance |
| US8741394B2 (en) | 2010-03-25 | 2014-06-03 | Novellus Systems, Inc. | In-situ deposition of film stacks |
| KR101340793B1 (en) | 2010-07-09 | 2013-12-11 | 노벨러스 시스템즈, 인코포레이티드 | Depositing tungsten into high aspect ratio features |
| US8778797B2 (en) | 2010-09-27 | 2014-07-15 | Novellus Systems, Inc. | Systems and methods for selective tungsten deposition in vias |
| US20120225191A1 (en) | 2011-03-01 | 2012-09-06 | Applied Materials, Inc. | Apparatus and Process for Atomic Layer Deposition |
| US8865594B2 (en) | 2011-03-10 | 2014-10-21 | Applied Materials, Inc. | Formation of liner and barrier for tungsten as gate electrode and as contact plug to reduce resistance and enhance device performance |
| US8546250B2 (en) | 2011-08-18 | 2013-10-01 | Wafertech Llc | Method of fabricating vertical integrated semiconductor device with multiple continuous single crystal silicon layers vertically separated from one another |
| US8916435B2 (en) | 2011-09-09 | 2014-12-23 | International Business Machines Corporation | Self-aligned bottom plate for metal high-K dielectric metal insulator metal (MIM) embedded dynamic random access memory |
| JP5710529B2 (en) | 2011-09-22 | 2015-04-30 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
| US8617985B2 (en) | 2011-10-28 | 2013-12-31 | Applied Materials, Inc. | High temperature tungsten metallization process |
| JP5959991B2 (en) | 2011-11-25 | 2016-08-02 | 東京エレクトロン株式会社 | Method for forming tungsten film |
| US9112003B2 (en) | 2011-12-09 | 2015-08-18 | Asm International N.V. | Selective formation of metallic films on metallic surfaces |
| US8728955B2 (en) | 2012-02-14 | 2014-05-20 | Novellus Systems, Inc. | Method of plasma activated deposition of a conformal film on a substrate surface |
| US10381266B2 (en) | 2012-03-27 | 2019-08-13 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
| US9034760B2 (en) | 2012-06-29 | 2015-05-19 | Novellus Systems, Inc. | Methods of forming tensile tungsten films and compressive tungsten films |
| CN102867953B (en) | 2012-07-24 | 2015-01-21 | 龙能科技(苏州)有限公司 | Method for producing lithium ion battery cathode material by using hydroxide or hydroxyl oxide |
| US9969622B2 (en) | 2012-07-26 | 2018-05-15 | Lam Research Corporation | Ternary tungsten boride nitride films and methods for forming same |
| US8975184B2 (en) | 2012-07-27 | 2015-03-10 | Novellus Systems, Inc. | Methods of improving tungsten contact resistance in small critical dimension features |
| KR101990051B1 (en) | 2012-08-31 | 2019-10-01 | 에스케이하이닉스 주식회사 | Semiconductor device with fluorine free tungsten barrier layer and method for fabricating the same |
| KR20140028992A (en) | 2012-08-31 | 2014-03-10 | 에스케이하이닉스 주식회사 | Semiconductor device with tungsten gate electrode and method for fabricating the same |
| US8853080B2 (en) | 2012-09-09 | 2014-10-07 | Novellus Systems, Inc. | Method for depositing tungsten film with low roughness and low resistivity |
| US9169556B2 (en) | 2012-10-11 | 2015-10-27 | Applied Materials, Inc. | Tungsten growth modulation by controlling surface composition |
| US9153486B2 (en) | 2013-04-12 | 2015-10-06 | Lam Research Corporation | CVD based metal/semiconductor OHMIC contact for high volume manufacturing applications |
| US8975142B2 (en) | 2013-04-25 | 2015-03-10 | Globalfoundries Inc. | FinFET channel stress using tungsten contacts in raised epitaxial source and drain |
| JP6494940B2 (en) | 2013-07-25 | 2019-04-03 | ラム リサーチ コーポレーションLam Research Corporation | Void-free tungsten filling to different size features |
| US9362163B2 (en) | 2013-07-30 | 2016-06-07 | Lam Research Corporation | Methods and apparatuses for atomic layer cleaning of contacts and vias |
| JP5864503B2 (en) | 2013-09-30 | 2016-02-17 | 株式会社日立国際電気 | Semiconductor device manufacturing method, substrate processing apparatus, program, and recording medium |
| JP6594304B2 (en) | 2013-10-18 | 2019-10-23 | ブルックス オートメーション インコーポレイテッド | Processing equipment |
| US9589808B2 (en) | 2013-12-19 | 2017-03-07 | Lam Research Corporation | Method for depositing extremely low resistivity tungsten |
| TWI672737B (en) | 2013-12-27 | 2019-09-21 | Lam Research Corporation | Tungsten nucleation process to enable low resistivity tungsten feature fill |
| US10683571B2 (en) | 2014-02-25 | 2020-06-16 | Asm Ip Holding B.V. | Gas supply manifold and method of supplying gases to chamber using same |
| US9595470B2 (en) | 2014-05-09 | 2017-03-14 | Lam Research Corporation | Methods of preparing tungsten and tungsten nitride thin films using tungsten chloride precursor |
| US9997405B2 (en) | 2014-09-30 | 2018-06-12 | Lam Research Corporation | Feature fill with nucleation inhibition |
| US9953984B2 (en) | 2015-02-11 | 2018-04-24 | Lam Research Corporation | Tungsten for wordline applications |
| TW201700761A (en) | 2015-05-13 | 2017-01-01 | 應用材料股份有限公司 | A tungsten film modified by pretreatment of an organic metal or germane through a substrate |
| US9754824B2 (en) | 2015-05-27 | 2017-09-05 | Lam Research Corporation | Tungsten films having low fluorine content |
| KR102397797B1 (en) | 2015-05-27 | 2022-05-12 | 램 리써치 코포레이션 | Deposition of low fluorine tungsten by sequential cvd process |
| US9613818B2 (en) | 2015-05-27 | 2017-04-04 | Lam Research Corporation | Deposition of low fluorine tungsten by sequential CVD process |
| US9978605B2 (en) | 2015-05-27 | 2018-05-22 | Lam Research Corporation | Method of forming low resistivity fluorine free tungsten film without nucleation |
| JP6541438B2 (en) | 2015-05-28 | 2019-07-10 | 東京エレクトロン株式会社 | Method of reducing stress of metal film and method of forming metal film |
| US9972504B2 (en) | 2015-08-07 | 2018-05-15 | Lam Research Corporation | Atomic layer etching of tungsten for enhanced tungsten deposition fill |
| TWI720106B (en) | 2016-01-16 | 2021-03-01 | 美商應用材料股份有限公司 | Pecvd tungsten containing hardmask films and methods of making |
| US10229837B2 (en) | 2016-02-04 | 2019-03-12 | Lam Research Corporation | Control of directionality in atomic layer etching |
| US10865475B2 (en) | 2016-04-21 | 2020-12-15 | Asm Ip Holding B.V. | Deposition of metal borides and silicides |
| TWI732846B (en) | 2016-04-25 | 2021-07-11 | 美商應用材料股份有限公司 | Enhanced spatial ald of metals through controlled precursor mixing |
| US10573522B2 (en) | 2016-08-16 | 2020-02-25 | Lam Research Corporation | Method for preventing line bending during metal fill process |
| CN109643639B (en) | 2016-09-13 | 2023-08-11 | 应用材料公司 | Borane-mediated dehydrogenation of silane and alkylsilane species for spacer and hard mask applications |
| KR101923301B1 (en) | 2017-03-06 | 2018-11-28 | 한국전력공사 | Floating tower body raising equipment and method thereof |
| US10269559B2 (en) | 2017-09-13 | 2019-04-23 | Lam Research Corporation | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
| KR20200079339A (en) | 2017-11-20 | 2020-07-02 | 램 리써치 코포레이션 | Self limiting growth |
| JP2021523292A (en) | 2018-05-03 | 2021-09-02 | ラム リサーチ コーポレーションLam Research Corporation | How to deposit tungsten and other metals in a 3D NAND structure |
| US11972952B2 (en) | 2018-12-14 | 2024-04-30 | Lam Research Corporation | Atomic layer deposition on 3D NAND structures |
| WO2020185618A1 (en) | 2019-03-11 | 2020-09-17 | Lam Research Corporation | Precursors for deposition of molybdenum-containing films |
| KR20210158419A (en) | 2019-05-22 | 2021-12-30 | 램 리써치 코포레이션 | Nucleation-Free Tungsten Deposition |
| US12077858B2 (en) | 2019-08-12 | 2024-09-03 | Lam Research Corporation | Tungsten deposition |
| US20230130557A1 (en) | 2020-03-04 | 2023-04-27 | Lam Research Corporation | Reactant gas pulse delivery |
| JP7728778B2 (en) | 2020-03-06 | 2025-08-25 | ラム リサーチ コーポレーション | Atomic layer etching of molybdenum |
| KR20210137395A (en) | 2020-05-07 | 2021-11-17 | 에이에스엠 아이피 홀딩 비.브이. | Apparatus and methods for performing an in-situ etch of reaction chambers with fluorine-based radicals |
| KR20230043796A (en) | 2020-07-29 | 2023-03-31 | 램 리써치 코포레이션 | Low Resistance Gate Oxide Metallization Liner |
| US11282711B2 (en) | 2020-07-31 | 2022-03-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Plasma-assisted etching of metal oxides |
-
2020
- 2020-04-07 JP JP2021559713A patent/JP2022522226A/en active Pending
- 2020-04-07 SG SG11202111277UA patent/SG11202111277UA/en unknown
- 2020-04-07 KR KR1020217036832A patent/KR20210141762A/en not_active Ceased
- 2020-04-07 CN CN202080027971.9A patent/CN113710830A/en active Pending
- 2020-04-07 WO PCT/US2020/027107 patent/WO2020210260A1/en not_active Ceased
- 2020-04-07 US US17/601,918 patent/US12002679B2/en active Active
- 2020-04-09 TW TW109111977A patent/TW202104638A/en unknown
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020048938A1 (en) * | 1998-12-18 | 2002-04-25 | Hotaka Ishizuka | Tungsten film forming method |
| US20080317954A1 (en) * | 2001-07-13 | 2008-12-25 | Xinliang Lu | Pulsed deposition process for tungsten nucleation |
| US20060040052A1 (en) * | 2001-10-10 | 2006-02-23 | Hongbin Fang | Methods for depositing tungsten layers employing atomic layer deposition techniques |
| US20120199887A1 (en) * | 2011-02-03 | 2012-08-09 | Lana Chan | Methods of controlling tungsten film properties |
| WO2019036292A1 (en) * | 2017-08-14 | 2019-02-21 | Lam Research Corporation | Metal fill process for three-dimensional vertical nand wordline |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2022522226A (en) | 2022-04-14 |
| SG11202111277UA (en) | 2021-11-29 |
| TW202104638A (en) | 2021-02-01 |
| CN113710830A (en) | 2021-11-26 |
| US20220181158A1 (en) | 2022-06-09 |
| US12002679B2 (en) | 2024-06-04 |
| KR20210141762A (en) | 2021-11-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20250285920A1 (en) | Molybdenum fill | |
| US20230290680A1 (en) | Self-limiting growth | |
| US12002679B2 (en) | High step coverage tungsten deposition | |
| US20240266177A1 (en) | Atomic layer deposition on 3d nand structures | |
| US10546751B2 (en) | Forming low resistivity fluorine free tungsten film without nucleation | |
| US9754824B2 (en) | Tungsten films having low fluorine content | |
| US9613818B2 (en) | Deposition of low fluorine tungsten by sequential CVD process | |
| US12077858B2 (en) | Tungsten deposition | |
| US10199267B2 (en) | Tungsten nitride barrier layer deposition | |
| US20240249949A1 (en) | Tungsten wordline fill in high aspect ratio 3d nand architecture | |
| US20250038050A1 (en) | Feature fill with nucleation inhibition | |
| US20260022459A1 (en) | Reducing line bending during metal fill process | |
| US20240376598A1 (en) | Process gas ramp during semiconductor processing | |
| US20260026324A1 (en) | Tungsten wordline fill in high aspect ratio 3d nand architecture | |
| WO2024196766A1 (en) | Sequence for tungsten nitride deposition |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 20787025 Country of ref document: EP Kind code of ref document: A1 |
|
| ENP | Entry into the national phase |
Ref document number: 2021559713 Country of ref document: JP Kind code of ref document: A |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| ENP | Entry into the national phase |
Ref document number: 20217036832 Country of ref document: KR Kind code of ref document: A |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 20787025 Country of ref document: EP Kind code of ref document: A1 |
|
| WWR | Wipo information: refused in national office |
Ref document number: 1020217036832 Country of ref document: KR |

