WO2020191995A1 - 一种电极制备方法和发光二极管 - Google Patents

一种电极制备方法和发光二极管 Download PDF

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Publication number
WO2020191995A1
WO2020191995A1 PCT/CN2019/100914 CN2019100914W WO2020191995A1 WO 2020191995 A1 WO2020191995 A1 WO 2020191995A1 CN 2019100914 W CN2019100914 W CN 2019100914W WO 2020191995 A1 WO2020191995 A1 WO 2020191995A1
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target sample
substrate
wire
mask
mask layer
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PCT/CN2019/100914
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English (en)
French (fr)
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刘召军
王河深
容沃铖
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深圳市思坦科技有限公司
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Publication of WO2020191995A1 publication Critical patent/WO2020191995A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape

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  • the embodiments of the present application relate to the field of micro-nano processing technology, such as an electrode preparation method and a light emitting diode.
  • Electrode plating on the target sample is a necessary step to study the electrical characteristics of the target sample, and the preparation method of the electrode is a key technology.
  • electrode preparation methods mainly include photolithography, electron beam exposure technology and metal mask technology.
  • the photolithography process is to apply a layer of photosensitive material to the target sample, and then selectively expose and develop the photosensitive material area to obtain the required electrode pattern.
  • the photolithography process is complicated and the solution used may cause damage to the target sample. Pollution, thereby affecting the properties of the target sample;
  • electron beam exposure technology is a more refined photolithography process, the process is more complicated, and may also affect the properties of the target sample;
  • metal mask technology refers to the metal mask Engrave the required electrode pattern, and then directly transfer the electrode pattern on the metal mask to the target sample.
  • the method is simple. However, since the metal mask must be kept at a certain distance from the target sample, the lateral effect is large and not It is suitable for the transfer of electrode patterns on the order of micrometers, and the production cost of the metal mask is high.
  • the application provides an electrode preparation method and a light emitting diode.
  • an embodiment of the present application provides an electrode preparation method, including: providing a substrate; setting a target sample on the upper side of the substrate; placing a wire on the target sample; placing a mask on the target sample The film layer; the mask layer is provided with a hollow pattern that exposes part of the silk thread and part of the target sample on both sides of the silk thread; using the mask layer and the exposed part of the silk thread as a mask in An electrode pattern is formed on the target sample.
  • the embodiments of the present application also provide a light-emitting diode, and the electrode of the light-emitting diode is formed using the electrode preparation method of the first aspect.
  • FIG. 1 is a flowchart of an electrode preparation method provided by an embodiment of the application
  • FIGS. 2A-2D are schematic diagrams of processes in the steps of an electrode preparation method provided by an embodiment of this application.
  • FIG. 3 is a schematic diagram of the structure of an electrode provided by an embodiment of the application.
  • FIG. 4 is a schematic diagram of a process of setting a first adhesive layer in steps of an electrode preparation method provided by an embodiment of the application;
  • FIG. 5 is a schematic diagram of a process of setting a second adhesive layer in steps of an electrode preparation method provided by an embodiment of the application;
  • FIG. 6 is a schematic diagram of a process of forming a target sample in steps of an electrode preparation method provided by an embodiment of the application.
  • FIG. 1 is a flowchart of an electrode preparation method according to an embodiment of the application. As shown in FIG. 1, the electrode preparation method includes steps S110 to S150.
  • step S110 a substrate is provided.
  • the substrate 10 may include, for example, a rigid substrate or a flexible substrate, and the flexible substrate may include, for example, a transparent glass substrate or a flexible polymer substrate.
  • the substrate 10 includes, but is not limited to, a rigid substrate or a flexible substrate, and the flexible substrate is not limited to the above examples.
  • the flexible substrate is not limited to the above examples.
  • Those skilled in the art can select a substrate according to product requirements, which is not limited in this application.
  • step S120 a target sample is set on the upper side of the substrate.
  • a target sample 20 is set on the upper side of the substrate 10. It should be noted that the target sample 20 is a sample that needs to be used as an electrode. Those skilled in the art can select the target sample type according to the product requirements. There is no restriction in it.
  • step S130 a silk thread is placed on the target sample.
  • the wire 30 is gently placed on the side of the target sample 20 away from the substrate 10.
  • special tweezers can be used to press both ends of the wire 30 to fix the position of the wire 30 on the substrate 10.
  • the number of the thread 30 may be one or more, and FIG. 2B only uses the number of the thread 30 as an example for illustration.
  • step S140 a mask layer is placed on the target sample; the mask layer is provided with a hollow pattern, and the hollow pattern exposes part of the wire and part of the target sample on both sides of the wire.
  • the mask layer 40 is provided with a hollow pattern to expose part of the wire 30 and part of the target sample 20 on both sides of the wire 30.
  • step S150 an electrode pattern is formed on the target sample using the mask layer and the exposed part of the wire as a mask.
  • FIG. 2D exemplarily, the mask layer 40 and the wire 30 as the mask are displayed in a dashed frame, and an electrode pattern is formed on the portion of the target sample 20, which is a dashed frame.
  • FIG. 3 is a schematic diagram of the structure of an electrode provided by this embodiment.
  • the electrode pattern 50 is formed on the target sample 20 by using the mask layer 40 and the wire 30 as a mask.
  • the wire and the mask layer are used as a mask to form an electrode pattern on the target sample.
  • the width of the wire is used to define the distance between the electrodes.
  • the layer is used to define the electrode area, avoiding the complicated photolithography process, the pollution of the target sample during the preparation process, the large lateral effect of metal mask technology, the unsuitable for the transfer of micron-level electrode patterns, and the high cost.
  • the process is simple, the process cycle is short, cost saving, no pollution, high precision, and the electrode pattern and area can be customized.
  • FIG. 4 is a schematic diagram of the process of setting the first adhesive layer in the steps of an electrode preparation method provided by an embodiment of the application.
  • a first adhesive layer 60 on the upper side of the substrate 10; wherein, the position where the target sample 20 is disposed on the substrate 10 overlaps the first adhesive layer 60, and the side of the target sample 20 facing the substrate 10 and the first adhesive layer The adhesive layer 60 is bonded.
  • the substrate 10 and the target sample 20 are bonded together through the first adhesive layer 60.
  • the first adhesive layer 60 includes silver glue, low temperature glue or double-sided adhesive.
  • the first adhesive layer 60 includes but is not limited to the above examples. Those skilled in the art can select the first adhesive layer by themselves according to product requirements, which is not limited in this application.
  • FIG. 5 is a schematic diagram of the process of setting the second adhesive layer in the steps of an electrode preparation method provided by an embodiment of the application.
  • the method before setting the target sample 20 on the upper side of the substrate 10 Or later, the method further includes: disposing a second adhesive layer 70 on the upper side of the substrate 10, wherein the target sample 20 and the second adhesive layer 70 do not overlap; wherein the two ends of the wire 30 placed on the target sample 20 are respectively connected to The second adhesive layer 70 is bonded; the edge of the mask layer 40 placed on the target sample 20 is bonded with the second adhesive layer 70.
  • the second adhesive layer 70 is disposed at the frame of the substrate 10 on the same side as the target sample 20, but does not overlap the target sample 20.
  • the silk thread 30 is gently set on the target sample 20.
  • special tweezers can be used to press the two ends of the silk thread 30 to make the two ends of the silk thread 30 adhere to the second adhesive layer 70 tightly to fix the position of the silk thread 30 on the substrate 10.
  • the method further includes: peeling off the second adhesive layer 70, the thread 30 and the mask layer 40.
  • the second adhesive layer 70, the thread 30 and the mask layer 40 are peeled off, and the electrode pattern 50 is formed on the target sample 20.
  • forming the electrode pattern on the target sample 20 by using the mask layer 40 and the wire 30 as a mask includes: using the mask layer 40 and the wire 30 as a mask by a sputtering process, a molecular beam epitaxy process, or an evaporation process.
  • the film forms an electrode pattern 50 on the target sample 20.
  • the electrode pattern 50 can be formed on the target sample 20 through a sputtering process, a molecular beam epitaxy process or an evaporation process using the mask layer 40 and the wire 30 as a mask. It should be noted that the process of forming the electrode pattern 50 includes However, it is not limited to the above examples, and those skilled in the art can select the process of forming the electrode pattern 50 according to the product requirements, which is not limited in this application.
  • the wire includes a wire-like metal wire or a wire-like polymer wire.
  • the line width of the wire is L, and 5 ⁇ m ⁇ L ⁇ 10 ⁇ m.
  • the line width of the wire is L, 5 ⁇ m ⁇ L ⁇ 10 ⁇ m, and the mask layer 40 and the wire 30 provided in the embodiment of the present application can be used to make the distance between the two electrodes reach the order of microns.
  • the hollow pattern in the mask layer 40 includes a square, a rectangle or a circle.
  • the hollow patterns in the mask layer 40 include squares, rectangles, or circles. It should be noted that the hollow patterns include but are not limited to the above examples. Those skilled in the art can set the hollow patterns by themselves according to product requirements. There is no restriction in it.
  • FIG. 6 is a schematic diagram of a process of forming a target sample in steps of an electrode preparation method provided by an embodiment of the application. As shown in FIG. 6, before setting the target sample 20 on the upper side of the substrate 10, the method further includes: The target thin film 90 is prepared on the substrate 80 through a growth process or a transfer process to form a target sample 20.
  • the target film may include a two-dimensional film, for example, and the thickness of the two-dimensional film may include a thickness of a single atom or several atomic layers, for example.
  • the material of the mask layer 40 includes metal or polymer film.
  • the material of the mask layer 40 may include metal foil, for example.
  • An embodiment of the present application also provides a light-emitting diode, and the electrode of the light-emitting diode is formed using the electrode preparation method in the foregoing embodiment.
  • the preparation process of the electrode of the light-emitting diode the process is simple, the process cycle is short, the cost is saved, there is no pollution, and the precision is high.
  • the above product can perform the method provided in any embodiment of this application.

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Abstract

本申请公开了一种电极制备方法及发光二极管。该电极制备方法包括：提供一基板；在基板的上侧设置目标样品；在目标样品上放置丝线；在目标样品上放置掩膜层；掩膜层设置有镂空图形，镂空图形露出部分丝线以及丝线两侧的部分目标样品；以掩膜层以及露出的部分丝线为掩膜，在目标样品上形成电极图案。

Description

一种电极制备方法和发光二极管
本申请要求在2019年3月27日提交中国专利局、申请号为201910237618.2的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及微纳加工技术领域，例如一种电极制备方法和发光二极管。
背景技术
对目标样品镀上电极，是研究目标样品电学特性的必要步骤，而电极的制备方法更是关键技术。
目前，电极的制备方法主要有光刻工艺、电子束曝光技术和金属掩膜板技术。光刻工艺是对目标样品涂上一层光敏材料，然后对光敏材料区域选择性曝光和显影，得到所需要的电极图形，然而光刻工艺过程复杂，且所用到的溶液可能会对目标样品造成污染，从而影响目标样品的性质；电子束曝光技术是更加精细化的光刻工艺，工艺过程更复杂，且也可能会影响目标样品的性质；金属掩膜板技术，是指在金属掩膜板上刻好所需要的电极图形，然后直接把金属掩膜板上的电极图形转移至目标样品上，方法简单，但是由于金属掩膜板要与目标样品保持一定的距离，因此横向效应大，不适合微米量级的电极图案的转移，而且金属掩膜板制备成本高昂。
发明内容
本申请提供一种电极制备方法及发光二极管。
第一方面，本申请实施例提供了一种电极制备方法，包括：提供一基板；在所述基板的上侧设置目标样品；在所述目标样品上放置丝线；在所述目标样品上放置掩膜层；所述掩膜层设置有镂空图形，所述镂空图形露出部分所述丝线以及所述丝线两侧的部分目标样品；以所述掩膜层以及露出的部分所述丝线为掩膜在所述目标样品上形成电极图案。
第二方面，本申请实施例还提供了发光二极管，该发光二极管的电极采用第一方面的电极制备方法形成。
附图说明
图1为本申请一实施例提供的一种电极制备方法的流程图；
图2A-图2D为本申请一实施例提供的一种电极制备方法步骤中的过程示意图；
图3为本申请一实施例提供的一种电极的结构示意图；
图4为本申请一实施例提供的一种电极制备方法步骤中设置第一胶黏层的过程示意图；
图5为本申请一实施例提供的一种电极制备方法步骤中设置第二胶黏层的过程示意图；
图6为本申请一实施例提供的一种电极制备方法步骤中形成目标样品的过程示意图。
具体实施方式
图1为本申请一实施例提供的一种电极制备方法的流程图，如图1所示，电极制备方法包括步骤S110至步骤S150。
在步骤S110中，提供一基板。
其中，如图2A所示，基板10例如可以包括刚性基板或者柔性基板，柔性基板例如可以包括透明玻璃基板或柔性高分子聚合物基板。本领域技术人员可以理解，基板10包括但不限于刚性基板或者柔性基板，以及柔性基板也不限于上述示例，本领域技术人员可以根据产品所需自行选取基板，在本申请中不进行限制。
在步骤S120中，在基板的上侧设置目标样品。
其中，参见2A，在基板10的上侧设置目标样品20，需要说明的是，目标样品20为需要做电极的样品，本领域技术人员可以根据产品所需自行选取目标样品的类型，在本申请中不进行限制。
在步骤S130中，在目标样品上放置丝线。
其中，如图2B所示，将丝线30轻轻放置于目标样品20远离基板10的一侧，例如可以采用专用镊子按压丝线30的两端，以固定丝线30在基板10的位置。其中，丝线30的数量可以为一条，也可以为多条，图2B仅以丝线30的数量为一条进行示例性说明。
在步骤S140中，在目标样品上放置掩膜层；掩膜层设置有镂空图形，镂空图形露出部分丝线以及丝线两侧的部分目标样品。
其中，如图2C所示，掩膜层40设置有镂空图形以露出部分丝线30以及丝线30两侧的部分目标样品20。
在步骤S150中，以掩膜层以及露出的部分丝线为掩膜在目标样品上形成电极图案。
其中，如图2D所示，图2D中示例性的将掩膜层40以及丝线30为掩膜的部分用虚框框出展示，在目标样品20虚框框出的部分上形成电极图案。如图3所示，图3为本实施例提供的一种电极的结构示意图，以掩膜层40以及丝线30为掩膜在目标样品20上形成电极图案50。
本实施例的技术方案，通过在目标样品上放置丝线和掩膜层，以丝线和掩膜层为掩膜在目标样品上形成电极图案，其中，丝线的宽度用来定义电极的间距，掩膜层用来限定电极的区域，避免了光刻工艺过程复杂、在制备过程中对目标样品造成污染、金属掩膜板技术横向效应大、不适合微米量级的电极图案的转移、成本高昂的情况，工艺简单，工序周期短，节约成本，无污染，精度高，且可以自定义电极图案和区域。
在一实施例中，图4为本申请一实施例提供的一种电极制备方法步骤中设置第一胶黏层的过程示意图，如图4所示，在基板10的上侧设置目标样品20之前还包括：在基板10的上侧设置第一胶黏层60；其中，基板10上设置目标样品20的位置与第一胶黏层60交叠，目标样品20朝向基板10的一面与第一胶黏层60粘结。
其中，通过第一胶黏层60将基板10与目标样品20粘合在一起，第一胶黏层60包括银胶、低温胶或者双面胶，第一胶黏层60包括但不限于上述示例，本领域技术人员可以根据产品所需自行选取第一胶黏层，在本申请中不进行限制。
在一实施例中，图5为本申请一实施例提供的一种电极制备方法步骤中设置第二胶黏层的过程示意图，如图5所示，在基板10的上侧设置目标样品20之前或之后还包括：在基板10的上侧设置第二胶黏层70，其中目标样品20与第二胶黏层70不交叠；其中，在目标样品20上放置的丝线30的两端分别与第二胶黏层70粘结；在目标样品20上放置的掩膜层40的边缘与第二胶黏层70粘结。
其中，将第二胶黏层70设置于基板10的边框处，与目标样品20同侧，但不与目标样品20交叠。将丝线30轻轻设置于目标样品20上，例如可以利用专用镊子按压丝线30的两端，使丝线30的两端与第二胶黏层70贴紧，以固定丝线30在基板10的位置。
在一实施例中，以掩膜层40以及露出的部分丝线30为掩膜在目标样品20上形成电极图案之后还包括：剥离第二胶黏层70、丝线30以及掩膜层40。
其中，参见图3，剥离第二胶黏层70、丝线30以及掩膜层40，在目标样品20上形成电极图案50。
在一实施例中，以掩膜层40以及丝线30为掩膜在目标样品20上形成电极图案包括：通过溅射工艺、分子束外延工艺或者蒸镀工艺以掩膜层40以及丝线30为掩膜在目标样品20上形成电极图案50。
其中，例如可以通过溅射工艺、分子束外延工艺或者蒸镀工艺以掩膜层40以及丝线30为掩膜在目标样品20上形成电极图案50，需要说明的是，形成电极图案50的工艺包括但不限于上述示例，本领域技术人员可以根据产品所需自行选取形成电极图案50的工艺，在本申请中不进行限制。
在上述技术方案的基础上，在一实施例中，丝线包括丝状金属线或者丝状高分子线。
在上述技术方案的基础上，在一实施例中，丝线的线宽为L，5μm≤L≤10μm。
其中，丝线的线宽为L，5μm≤L≤10μm，本申请实施例提供的以掩膜层40以及丝线30为掩膜可以使两两电极距离达到微米量级。
在一实施例中，掩膜层40中的镂空图案包括正方形、长方形或者圆形。
其中，掩膜层40中的镂空图案包括正方形、长方形或者圆形，需要说明的是，镂空图案包括但不限于上述示例，本领域技术人员可以根据产品所需自行设定镂空图案，在本申请中不进行限制。
在一实施例中，图6为本申请一实施例提供的一种电极制备方法步骤中形成目标样品的过程示意图，如图6所示，在基板10的上侧设置目标样品20之前还包括：通过生长工艺或转移工艺在衬底80上制备目标薄膜90，以形成目标样品20。
其中，目标薄膜例如可以包括二维薄膜，二维薄膜的厚度例如可以包括单原子或几个原子层的厚度。
在一实施例中，掩膜层40的材料包括金属或者高分子薄膜。
其中，掩膜层40的材料例如可以包括金属箔。
本申请一实施例还提供一种发光二极管，此发光二极管的电极采用上述实施例中的电极制备方法形成。此发光二极管的电极在制备过程中，工艺简单，工序周期短，节约成本，且无污染，精度高。
上述产品可执行本申请任意实施例所提供的方法。

Claims (11)

  1. 一种电极制备方法，包括：
    提供一基板；
    在所述基板的上侧设置目标样品；
    在所述目标样品上放置丝线；
    在所述目标样品上放置掩膜层；所述掩膜层设置有镂空图形，所述镂空图形露出部分所述丝线以及所述丝线两侧的部分目标样品；
    以所述掩膜层以及露出的部分所述丝线为掩膜，在所述目标样品上形成电极图案。
  2. 根据权利要求1所述的方法，在所述基板的上侧设置目标样品之前，还包括：
    在所述基板的上侧设置第一胶黏层；
    其中，所述基板上设置所述目标样品的位置与所述第一胶黏层交叠，所述目标样品朝向所述基板的一面与所述第一胶黏层粘结。
  3. 根据权利要求1所述的方法，在所述基板的上侧设置目标样品之前或之后，还包括：
    在所述基板的上侧设置第二胶黏层，其中，所述目标样品与所述第二胶黏层不交叠；
    其中，在所述目标样品上放置的所述丝线的两端分别与所述第二胶黏层粘结；在所述目标样品上放置的掩膜层的边缘与所述第二胶黏层粘结。
  4. 根据权利要求3所述的方法，以所述掩膜层以及露出的部分所述丝线为掩膜，在所述目标样品上形成电极图案之后，还包括：
    剥离所述第二胶黏层、所述丝线，以及所述掩膜层。
  5. 根据权利要求1所述的方法，其中，以所述掩膜层以及露出的部分所述丝线为掩膜，在所述目标样品上形成电极图案，包括：
    通过溅射工艺、分子束外延工艺或者蒸镀工艺以所述掩膜层以及露出的部分所述丝线为掩膜，在所述目标样品上形成电极图案。
  6. 根据权利要求1所述的方法，其中，所述丝线包括丝状金属线或者丝状高分子线。
  7. 根据权利要求1所述的方法，其中，所述丝线的线宽为L，5μm≤L≤10μm。
  8. 根据权利要求1所述的方法，其中，所述掩膜层中的镂空图案包括正方 形、长方形或者圆形。
  9. 根据权利要求1所述的方法，在所述基板的上侧设置目标样品之前，还包括：
    通过生长工艺或转移工艺在衬底上制备目标薄膜，以形成目标样品。
  10. 根据权利要求1所述的方法，其中，所述掩膜层的材料包括金属或者高分子薄膜。
  11. 一种发光二极管，其中，所述发光二极管的电极采用权利要求1-10中任一项所述的电极制备方法形成。
PCT/CN2019/100914 2019-03-27 2019-08-16 一种电极制备方法和发光二极管 WO2020191995A1 (zh)

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