WO2020186992A1 - 显示补偿电路、显示基板、显示装置及驱动方法 - Google Patents

显示补偿电路、显示基板、显示装置及驱动方法 Download PDF

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Publication number
WO2020186992A1
WO2020186992A1 PCT/CN2020/077028 CN2020077028W WO2020186992A1 WO 2020186992 A1 WO2020186992 A1 WO 2020186992A1 CN 2020077028 W CN2020077028 W CN 2020077028W WO 2020186992 A1 WO2020186992 A1 WO 2020186992A1
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Prior art keywords
common electrode
display
circuit
compensation
switch sub
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PCT/CN2020/077028
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English (en)
French (fr)
Inventor
张文龙
于亚楠
徐敬义
姜瑞泽
石天雷
吴治涌
Original Assignee
京东方科技集团股份有限公司
鄂尔多斯市源盛光电有限责任公司
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Publication of WO2020186992A1 publication Critical patent/WO2020186992A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Definitions

  • the present disclosure relates to a display compensation circuit, a display substrate, a display device and a driving method.
  • the screen-to-body ratio of mobile terminals is increasing.
  • a slot or hole needs to be opened on the screen of the mobile terminal to set a front camera.
  • the special-shaped common electrode Compared with the normal common electrode, the special-shaped common electrode has a smaller area and a smaller load. In the display stage, due to the load difference between the irregular common electrode and the normal common electrode, it is easy to cause the uniformity problem of the display screen.
  • the embodiments of the present disclosure provide a display compensation circuit, a display substrate, a display device, and a driving method.
  • At least one embodiment of the present disclosure provides a display compensation circuit applied to a display substrate, the display substrate has a plurality of common electrodes, the plurality of common electrodes include a first common electrode and a second common electrode, the first The common electrode and the second common electrode have different areas;
  • the display compensation circuit includes: at least one switch sub-circuit; the switch sub-circuit has an input terminal, an output terminal and a control terminal;
  • the output terminal of the switch sub-circuit is electrically connected to the first common electrode
  • the switch sub-circuit is configured to be turned on under the control of the control signal received by the control terminal, and when turned on, provides the compensation voltage signal received at the input terminal to the connected first common electrode.
  • the display compensation circuit further includes a connecting wire; one end of the connecting wire is electrically connected to the output terminal of the switch sub-circuit, and the other end of the connecting wire passes through the first The via hole is electrically connected to the first common electrode.
  • the connecting line is arranged along a first direction, and the connecting line is located between two adjacent rows of pixel regions of the display substrate, and the first direction is the Display one of the row direction and column direction of the substrate.
  • the number of the first via holes is positively correlated with the area difference between the first common electrode and the second common electrode.
  • the first via and at least one second via are located on a straight line extending in the second direction, and the second via is used to connect the first common The electrode and the via hole of the driving integrated circuit, the second direction is perpendicular to the first direction.
  • an invalid line is also connected to the common electrode, the invalid line is connected to the common electrode through a third via, and the invalid line is arranged in parallel with the connecting line
  • Each of the third vias corresponds to one of the second vias, and the direction of the connection line between each of the third vias and the corresponding second via is the second direction.
  • the display compensation circuit further includes a compensation line, the input end of the switch sub-circuit is electrically connected to the compensation line, and the compensation line is configured to provide the Compensation voltage signal.
  • the display compensation circuit further includes a control line, and the control end of the switch sub-circuit is electrically connected to a controller through the control line; the controller is configured to In the display stage, the control signal is output to control the switch sub-circuit to conduct.
  • the voltage of the compensation voltage signal is the same as the voltage of the common voltage signal.
  • the voltage range of the compensation voltage signal is -0.3V to -0.2V.
  • At least one embodiment of the present disclosure provides a display substrate including the display compensation circuit described in any one of the preceding items.
  • both the first common electrode and the second common electrode are multiplexed as touch electrodes.
  • the area of the first common electrode is smaller than the area of the second common electrode.
  • an embodiment of the present disclosure also provides a display device, which includes the display substrate as described above.
  • At least one embodiment of the present disclosure provides a method for driving a display device, the method including:
  • a compensation voltage signal is provided to the input terminal of the switch sub-circuit, and the compensation voltage signal is used to be provided to the first common electrode connected to the switch sub-circuit when the switch sub-circuit is turned on.
  • FIG. 1 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of a display compensation circuit provided by an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of an enlarged structure of a common electrode provided by an embodiment of the present disclosure.
  • FIG. 4 is a flowchart of a driving method of a display device according to an embodiment of the present disclosure.
  • the display compensation circuit provided by the embodiments of the present disclosure can be applied to a display substrate provided with structures such as grooves, holes, or rounded corners, and these structures can be used to house electronic devices, such as cameras, sensors, and the like. To facilitate understanding, the following briefly introduces the application scenario of the embodiment of the present disclosure in conjunction with FIG. 1.
  • FIG. 1 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure.
  • a U-shaped groove 20 is provided on the display substrate 10, and the U-shaped groove 20 can be used to set a front camera in a mobile terminal.
  • the display substrate includes a display area 11 and a peripheral area 12.
  • a plurality of common electrodes 30 are arranged in an array in the display area 11, and these common electrodes 30 include a first common electrode 31 and a second common electrode 32.
  • the first common electrode 31 is located around the U-shaped groove 20. Due to the influence of the shape of the U-shaped groove 20, the common electrode around the U-shaped groove 20 cannot be designed as the second common electrode 32, and can only be designed to be the same as the U-shaped groove 20.
  • the first common electrode 31 with matching shape.
  • the area of the first common electrode 31 is different from the area of the second common electrode 32.
  • the area of the first common electrode 31 is smaller than the area of the second common electrode 32.
  • one second common electrode 32 usually corresponds to A ⁇ B pixel areas on the display substrate (the pixel areas on the display substrate are arranged in an array), for example, one second common electrode 32 corresponds to 60 ⁇ B pixel areas on the display substrate. There are 60 pixel regions. Accordingly, the number of pixel regions corresponding to the first common electrode 31 is less than 60 ⁇ 60.
  • the pixel area refers to an area on the display substrate corresponding to a pixel unit on the display panel.
  • the numbers of the first common electrodes 31 and the second common electrodes 32 are different.
  • the number of the first common electrodes 31 is less than the number of the second common electrodes 32.
  • the shape of each first common electrode 31 may be the same or different.
  • the shapes of the respective second common electrodes 32 are the same.
  • the second common electrode 32 is a normal common electrode, and the shape is usually a regular polygon, such as a rectangle.
  • the second common electrode 32 is a special-shaped common electrode, for example, a rectangular shape with a missing corner.
  • the shape of 20 is set correspondingly, such as an arc.
  • the common electrode near the round hole or round corner on the display substrate also needs to be designed as the first common electrode.
  • the pixel electrode and the common electrode of the display substrate constitute a parallel plate capacitor.
  • the common electrode is loaded with a common voltage (DC signal), and the pixel electrode is loaded with a pixel voltage (AC signal).
  • the pixel electrode will have a pull-up effect on the voltage of the common electrode (that is, the pixel electrode will charge the common electrode). For example, when the pixel voltage is positive, the voltage of the common electrode is pulled up, and when the pixel voltage is negative, the voltage of the common electrode is pulled down.
  • the second common electrode 32 and the first common electrode 31 are present at the same time, because the area of the second common electrode 32 and the first common electrode 31 are different, the load of the two is different, and the pixel electrode interacts with the second common electrode 32 and the first common electrode 31.
  • the electrode 31 is pulled up to different degrees (the charging speed is different), which causes the voltages of the second common electrode 32 and the first common electrode 31 to be different at the same time, which in turn causes the difference between the second common electrode 32 and the first common electrode 31 under the same pixel voltage.
  • Display substrates that display heavy-duty images usually refer to high-power display substrates. For example, a display substrate in dot inversion mode that is inverted twice per frame (the pixel voltage is inverted). Because of its high power consumption, the first The characteristics of the different charging speeds of the first common electrode 31 and the second common electrode 32 have a greater impact on it, and the unevenness is more obvious.
  • the technical solution provided by the present application is applied to a display substrate with multiple common electrodes.
  • the common electrodes are usually multiplexed as electrodes with other functions such as touch electrodes. Refers to at least two.
  • the common electrode is a surface electrode, the above-mentioned problem does not exist.
  • FIG. 2 is a schematic structural diagram of a display compensation circuit provided by an embodiment of the present disclosure.
  • the display compensation circuit 40 includes: at least one switch sub-circuit 41.
  • the switch sub-circuit 41 has an input terminal T1, an output terminal T2 and a control terminal T3.
  • the switch sub-circuit 41 is electrically connected to the first common electrode 31 through the output terminal T2.
  • the switch sub-circuit 41 is configured to be turned on under the control of the control signal received by the control terminal T3, and when turned on, the compensation voltage signal received by the input terminal T1 is provided to the connected first common electrode 31.
  • the output end of the switch sub-circuit is electrically connected to the first common electrode, the input end of the switch sub-circuit receives the compensation voltage signal, and the control end is controlled by the control signal.
  • the control signal controls these switch sub-circuits to turn on, so that the received compensation voltage signal is written to the first common electrode, thereby adjusting the load of the first common electrode, and avoiding the first common electrode and the second common electrode.
  • the load difference of the two common electrodes causes the uniformity problem of the display picture, which improves the display quality.
  • compensation for the plurality of first common electrodes 31 can be realized by arranging a plurality of display compensation circuits 40.
  • Each first common electrode 31 is connected to a display compensation circuit 40.
  • the two first common electrodes 31 are respectively provided with display compensation circuits 40, and each display compensation circuit 40 includes a switch sub-circuit 41, that is, each first common electrode 31 is connected to a switch sub-circuit 41. , Perform voltage signal compensation.
  • one display compensation circuit 40 is arranged, and the display compensation circuit 40 includes a plurality of switch sub-circuits 41, and each first common electrode 31 is connected to one switch sub-circuit 41.
  • the first common electrode 31 can be the first common electrode at any position on the display substrate, for example, around the U-shaped groove, or around the circular hole, or at the rounded corners of the display substrate, as long as it is
  • the first common electrode 31 can be electrically connected to the display compensation circuit in the above-mentioned manner.
  • the display compensation circuit 40 may further include a compensation line 42. At least one switch sub-circuit 41 is electrically connected to the compensation line 42 through the input terminal T1.
  • the compensation line 42 is configured to provide the aforementioned compensation voltage signal.
  • the display compensation circuit 40 may further include a control line S, and the control terminal T3 of the switch sub-circuit 41 is electrically connected to the controller 43 through the control line S, so as to realize the control of the switch sub-circuit 41 by the controller 43.
  • the controller 43 is configured to output a control signal during the display phase to control the switch sub-circuit 41 to be turned on.
  • control terminals T3 of all the switch sub-circuits 41 can be connected to the same controller 43, so as to realize the simultaneous control of the switch sub-circuits 41 of all the display compensation circuits 40 and save the controller. , Simplifies the circuit design.
  • the controller 43 may be implemented by an integrated circuit.
  • the integrated circuit can be any integrated circuit on the display substrate, such as a gate drive integrated circuit.
  • FIG. 3 is a schematic diagram of an enlarged structure of a common electrode provided by an embodiment of the present disclosure.
  • the display compensation circuit 40 may further include a connecting line L.
  • One end of the connecting wire L is electrically connected to the output terminal T2 of the switch sub-circuit 41, and the other end of the connecting wire L is electrically connected to the first common electrode 31 through the first via 51.
  • the switch sub-circuit 41 and the first common electrode 31 are connected by a connecting line L.
  • the connecting line L here is not arranged on the same layer of the first common electrode 31, but arranged on the same layer as the first common electrode 31.
  • the other layers of the electrode 31 are insulated. This design can avoid occupying the space of the layer where the first common electrode layer 31 is located, and ensure that the area of the common electrode is large enough to fully form an electric field with the pixel electrode to control the deflection of the liquid crystal. Since the first common electrode 31 and the layer where the connection line L is located are insulated, it is necessary to provide a via to realize the electrical connection between the connection line L and the first common electrode 31.
  • the display substrate may be an array substrate.
  • the compensation line 42, the switch sub-circuit 41, the control line S, and the connecting line L can all be arranged on the array substrate.
  • the array substrate may include a substrate and a gate layer, a gate insulating layer, an active layer, a source and drain layer, a planarization layer, a common electrode layer, a pixel electrode insulating layer, and a pixel electrode layer sequentially stacked on the substrate. And protective layer.
  • the switch sub-circuit 41 may be a thin film transistor (TFT), and the thin film transistor may be arranged in the peripheral area of the array substrate, and its film structure is the same as that of the thin film transistor in the display area of the array substrate.
  • TFT thin film transistor
  • the switch sub-circuit 41 is a thin film transistor; in other implementation manners, the switch sub-circuit 41 may also be multiple thin film transistors connected in series or in parallel. Do restrictions.
  • the control end of the switch sub-circuit 41 is the gate of the thin film transistor
  • the input end of the switch sub-circuit 41 is the source of the thin film transistor
  • the output end of the switch sub-circuit 41 is the thin film transistor. Drain.
  • the switch sub-circuit 41 may be an N-type thin film transistor or a P-type thin film transistor.
  • the controller 43 When the switch sub-circuit 41 is a P-type thin film transistor, the controller 43 outputs a gate high level VGH (for example, 8V) during the display stage, and transmits it to the gate of each P-type thin film transistor through the control line S, and controls each P The thin film transistor is turned on.
  • VGH for example, 8V
  • the controller 43 outputs a gate low level VGL during the display stage, which is transmitted to the gate of each N-type thin film transistor through the control line S, and controls the conduction of each N-type thin film transistor. through.
  • both the control line S and the compensation line 42 may be provided on the gate layer of the array substrate.
  • the compensation line 42 may be electrically connected to the source of the thin film transistor through a via hole, and the control line S may be directly electrically connected to the gate of the thin film transistor.
  • the connection line L may be disposed on the source and drain layers of the array substrate, and is electrically connected to the first common electrode 31 of the common electrode layer through the first via 51 on the planarization layer.
  • each of the second common electrode 32 and the first common electrode 31 needs to be electrically connected to the driving integrated circuit 60, which is configured to connect the second common electrode 32 and the first common electrode 31 during the display phase.
  • the driving integrated circuit 60 which is configured to connect the second common electrode 32 and the first common electrode 31 during the display phase.
  • Write a common voltage signal
  • the driving integrated circuit 60 and the aforementioned controller 43 may be implemented by the same integrated circuit. In another implementation manner of the present disclosure, the driving integrated circuit 60 and the aforementioned controller 43 can also be implemented using two different integrated circuits.
  • the second common electrode 32 and the first common electrode 31 are both connected to the driving integrated circuit 60 through a wiring Z, the wiring Z is arranged along the first direction, and the wiring Z is located between two adjacent rows of pixel regions of the display substrate 10 (The pixel area is not shown in the figure, usually one common electrode corresponds to multiple rows of pixel areas), the first direction is one of the row direction and the column direction of the display substrate 10, wherein the column direction is the direction of a column of pixel areas in the display substrate The extension direction, the row direction is the extension direction of a row of pixel regions in the display substrate.
  • an invalid line W is also connected to the common electrode 30, and the invalid line W, the connecting line L and the wiring Z are arranged in parallel, and the invalid line W and the connecting line L are arranged between any adjacent pixel areas of the display substrate 10. Or route Z.
  • the invalid line W is not electrically connected to the driving integrated circuit 60, just to reduce the difference in the structure of each pixel area, thereby improving the uniformity of display of each pixel.
  • the invalid line W may be a segmented design, that is, each second common electrode 32 and the invalid line W corresponding to the first common electrode 31 are not connected to each other.
  • both the wiring Z and the invalid line W may be located in the source and drain layers of the array substrate.
  • the wiring Z is connected to the second common electrode 32 or the first common electrode 31 through the second via hole 52; the invalid line W is connected to the second common electrode 32 or the first common electrode 31 through the third via hole 53.
  • Each third via hole 53 corresponds to a second via hole 52, the connection direction between each third via hole 53 and the corresponding second via hole 52 is the second direction, and the second direction is perpendicular to the first direction
  • a second via 52 on the trace Z connected to the second common electrode 32 is located between adjacent pixel regions of the pixel regions of the first, third, fifth, seventh, and ninth rows, then the second The third via hole 53 on the invalid line W connected to the common electrode 32 should also be arranged between adjacent pixel regions of the pixel regions of the first, third, fifth, seventh, and ninth rows.
  • the connecting line L occupies the position of the original invalid line W for arrangement. There is usually only one connecting line L between two adjacent rows of pixel regions, and the connecting line L is electrically connected to the first common electrode 31.
  • the connecting line L is located between the pixel regions of two adjacent columns of the display substrate.
  • the number of connecting lines L that can be arranged can also meet the requirement of the display substrate for the number of connecting lines L.
  • the number of connecting lines L that can be arranged is equal to the number of columns of the pixel area corresponding to a piece of first common electrode 31 minus the number of one column of common electrodes, and then minus one.
  • a piece of first common electrode 31 corresponds to 60 columns of pixel areas, and a piece of first common electrode 31 corresponds to 59 positions (between two columns of pixel areas) that can be used to set lines (wiring Z, connecting line L, and invalid line) W);
  • the number of common electrodes in a column is 40, then 40 of the 59 positions need to be set with wiring Z to connect 40 common electrodes and the driving integrated circuit, and the remaining 19 positions can be used to set the connecting line L; Only the first common electrode 31 needs to be connected to the connection line L, but the number of the first common electrode 31 in a column of common electrodes is much smaller than this. Then, except for the extra positions of the wiring Z and the connection line L, the aforementioned invalid line W can be set.
  • connection line L, the wiring Z, and the invalid line W are arranged in the column direction as an example for description.
  • the advantage of this arrangement is that the drive integrated circuit and the controller are usually It is arranged above or below the display substrate for easy wiring connection.
  • the connecting lines L, the routing lines Z, and the invalid lines W can also be arranged along the row direction, which is not limited in this application.
  • the number of the first via 51 is positively correlated with the area difference between the first common electrode 31 and the second common electrode 32. The greater the area difference between the first common electrode 31 and the second common electrode 32 is, the greater the number of first via holes 51 is.
  • the number of the first vias 51 is not necessarily the same as the number of the corresponding second vias 52 on the wiring Z, but is related to the area of the first common electrode 31. This is because the number of the first vias 51 will affect the speed at which the compensation line 42 writes the compensation voltage signal to the first common electrode 31.
  • the compensation voltage signal is a negative voltage.
  • more first vias 51 are used to write the compensation voltage signal, which can speed up By compensating for the speed at which the voltage signal pulls down the potential, it offsets the excessive rise/fall of the potential during charging caused by the small area (the pixel voltage rises when it is positive, and it drops when the pixel voltage is negative).
  • the number of vias to control the speed at which the compensation voltage signal pulls down the potential, there is no need to set compensation voltage signals of different sizes for the first common electrodes of different areas, and the circuit is simpler.
  • the number of the first vias 51 corresponding to the first common electrodes 31 of various sizes can be determined in advance through experiments. During production, according to the relationship between the area size and the number of the first vias 51, A via hole is arranged for each first common electrode 31.
  • the at least three first via holes 51 are evenly spaced.
  • the first vias 51 are evenly spaced to avoid messy distribution.
  • the display is not uniform.
  • the second vias 52 on the trace Z are distributed in the first, third, fifth, seventh, and ninth rows, and the three first vias 51 may be arranged in the first, fifth, and ninth rows.
  • the voltage range of the compensation voltage signal may be -0.3 ⁇ -0.2V. Since the common voltage applied to the common electrode 30 by the driving integrated circuit 60 is usually a DC negative voltage signal, the voltage of the first common electrode 31 The area is usually smaller than the area of the second common electrode 32. In this case, the compensation voltage signal can effectively increase the load of the first common electrode 31, thereby offsetting the rapid rise/drop of the potential during charging due to the small area.
  • the voltage of the compensation voltage signal may be the same as the voltage of the common voltage signal.
  • the voltage of the compensation voltage signal may also be -0.2V.
  • it can save one signal.
  • it can ensure that the voltage clock of the first common electrode 31 is on or near the common voltage signal, that is, the final voltage of the first common electrode 31 is changed to follow the common voltage. Compared with the display effect when the signal is only pulled up or down by the pixel voltage, the display uniformity is improved.
  • the compensation line 42 may be electrically connected to the negative voltage signal line of the display substrate.
  • the negative voltage signal line is provided in the peripheral area of the display substrate and can be used to provide the aforementioned common voltage signal.
  • the negative pressure signal line is arranged in a circle around the display area, so it is convenient to connect the compensation line 42 to the negative pressure signal line. Among them, the negative voltage signal line is used to provide a negative voltage signal, such as -0.2V.
  • the area of the first common electrode 31 may be larger than the area of the second common electrode 32, for example
  • the first common electrode 31 is a special-shaped common electrode
  • the second common electrode 32 is a normal common electrode.
  • the area of the special-shaped common electrode is larger than that of a normal common electrode, or the first common electrode 31 is a normal common electrode, and the second common electrode 32 is a normal common electrode.
  • the common electrode 32 is a special-shaped common electrode, and the area of the normal common electrode is larger than that of the special-shaped common electrode.
  • the compensation voltage signal is a positive voltage, which is equivalent to providing a negative compensation voltage signal to the second common electrode 32.
  • the compensation voltage signal may be 0.05-0.1V.
  • the compensation line 42, control line S, connection line L, wiring Z, and invalid line W can all be made of the same conductive material as the gate line or data line of the array substrate, such as a metal material.
  • the common electrode can be made of a transparent conductive material, which not only ensures the function of the electrode, but also ensures the transmittance of the entire display panel.
  • the embodiments of the present disclosure also provide a display substrate, which includes the above-mentioned display compensation circuit.
  • the display substrate provided by the embodiment of the present disclosure has the same technical features as any of the above-mentioned display compensation circuits, it can also solve the same technical problems and produce the same technical effects.
  • both the first common electrode and the second common electrode can be multiplexed as touch electrodes.
  • the common electrode is multiplexed as a touch electrode
  • the driving integrated circuit writes a touch signal to the common electrode
  • the driving integrated circuit writes a common voltage signal to the common electrode.
  • the area of the first common electrode is smaller than the area of the second common electrode. Because in a general display substrate, the area of the irregular common electrode is small and the number of the irregular common electrode is small, when a compensation circuit is used for compensation, the number of compensation circuits required is small.
  • the embodiment of the present disclosure also provides a display device, which includes the above-mentioned display substrate.
  • the display device may be: electronic paper, Organic Light Emitting Diode (OLED) panels, mobile phones, tablet computers, televisions, monitors, laptops, digital photo frames, navigators and other products or components with display functions.
  • OLED Organic Light Emitting Diode
  • the display device provided by the embodiments of the present disclosure has the same technical features as any of the above-mentioned display compensation circuits, it can also solve the same technical problems and produce the same technical effects.
  • FIG. 4 is a flowchart of a driving method of a display device according to an embodiment of the present disclosure. The method is used to drive the display device as described above, referring to FIG. 4, the method includes the following steps:
  • Step 401 Provide a control signal to the control terminal of the switch sub-circuit to control the switch sub-circuit to conduct.
  • the switch sub-circuit can be an N-type thin film transistor or a P-type thin film transistor.
  • the switch sub-circuit When the switch sub-circuit is a P-type thin film transistor, it outputs a gate high level VGH (for example, 8V) during the display stage, and transmits it to the gate of each P-type thin film transistor through a control line, and controls each P-type thin film transistor to turn on .
  • VGH gate high level
  • the switch sub-circuit is an N-type thin film transistor
  • a low-level gate VGL is output during the display stage, which is transmitted to the gate of each N-type thin film transistor through a control line to control each N-type thin film transistor to be turned on.
  • the control signal controls the switch sub-circuit to turn off during the touch phase.
  • Step 402 Provide a compensation voltage signal to the input terminal of the switch sub-circuit, so that when the switch sub-circuit is turned on, the compensation voltage signal is provided to the first common electrode connected to the switch sub-circuit.
  • the voltage range of the compensation voltage signal may be -0.3 ⁇ -0.2V. Since the common voltage applied to the common electrode by the driving integrated circuit is usually a DC negative voltage signal, the area of the first common electrode is usually smaller than The area of the second common electrode. In this case, the compensation voltage signal can effectively increase the load of the first common electrode, thereby offsetting the excessive rise/drop of the potential during charging caused by the small area.
  • the voltage of the compensation voltage signal may be the same as the voltage of the common voltage signal.
  • the compensation voltage signal may be -0.2V.
  • the compensation voltage signal may be provided by a negative voltage signal line of the display substrate.
  • the negative voltage signal line is arranged in the peripheral area of the display substrate.
  • the negative voltage signal line is arranged in a circle around the display area, so that the compensation voltage signal is It's easy to get.

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Abstract

一种显示补偿电路（40）、显示基板（10）、显示装置及驱动方法。显示补偿电路（40）包括：开关子电路（41）；开关子电路（41）均具有输入端（T1）、输出端（T2）和控制端（T3）；开关子电路（41）的输出端（T2）与一个第一公共电极（31）电连接；开关子电路（41）被配置为在控制端（T3）接收到的控制信号的控制下导通，在导通时将输入端（T1）接收到的补偿电压信号提供给相连的第一公共电极（31）。解决由于第一公共电极（31）与第二公共电极（32）的负载差异带来的显示均一性问题。

Description

显示补偿电路、显示基板、显示装置及驱动方法
本申请要求于2019年3月21日提交的申请号为201910216691.1、发明名称为“显示补偿电路、显示基板、显示装置及驱动方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及一种显示补偿电路、显示基板、显示装置及驱动方法。
背景技术
随着移动终端的技术发展，移动终端的屏占比越来越大。当移动终端的屏占比达到一定大小时，需要在移动终端的屏幕上开设槽或者孔来设置前置摄像头。
对于触摸屏等将公共电极划分为多个公共电极进行功能复用的屏幕而言，由于屏幕上设置前置摄像头的槽或者孔多数为U型或者圆形，导致屏幕制作时，位于槽或者孔的附近的公共电极需要采用异形设计，以与槽或者孔的形状匹配。
异形公共电极相比于正常公共电极面积小，负载也更小。在显示阶段，由于异形公共电极与正常公共电极的负载差异，容易造成显示画面存在均一性问题。
发明内容
本公开实施例提供了一种显示补偿电路、显示基板、显示装置及驱动方法。
本公开至少一个实施例提供了一种显示补偿电路，应用于显示基板，所述显示基板具有多个公共电极，所述多个公共电极包括第一公共电极和第二公共电极，所述第一公共电极和所述第二公共电极的面积不同；
所述显示补偿电路包括：至少一个开关子电路；所述开关子电路具有输入端、输出端和控制端；
所述开关子电路的输出端与所述第一公共电极电连接；
所述开关子电路被配置为在所述控制端接收到的控制信号的控制下导通，在导通时将输入端接收到的补偿电压信号提供给相连的所述第一公共电极。
在本公开实施例的一种实现方式中，所述显示补偿电路还包括连接线；所述连接线的一端与所述开关子电路的输出端电连接，所述连接线的另一端通过第一过孔与所述第一公共电极电连接。
在本公开实施例的一种实现方式中，所述连接线沿第一方向布置，且所述连接线位于所述显示基板的相邻两排像素区域之间，所述第一方向为所述显示基板的行方向和列方向中的一种。
在本公开实施例的一种实现方式中，所述第一过孔的数量与所述第一公共电极和所述第二公共电极的面积差正相关。
在本公开实施例的一种实现方式中，所述第一过孔与至少一个第二过孔位于沿第二方向延伸的直线上，所述第二过孔为用于连接所述第一公共电极与驱动集成电路的过孔，所述第二方向与所述第一方向垂直。
在本公开实施例的一种实现方式中，所述公共电极上还连接有无效线，所述无效线通过第三过孔与所述公共电极连接，所述无效线与所述连接线平行布置，每个所述第三过孔均与一个所述第二过孔对应，且每个所述第三过孔与对应的第二过孔的连线所在方向为所述第二方向。
在本公开实施例的一种实现方式中，所述显示补偿电路还包括补偿线，所述开关子电路的所述输入端与所述补偿线电连接，所述补偿线被配置为提供所述补偿电压信号。
在本公开实施例的一种实现方式中，所述显示补偿电路还包括控制线，所述开关子电路的所述控制端通过所述控制线与控制器电连接；所述控制器被配置为在显示阶段输出所述控制信号，控制所述开关子电路导通。
在本公开实施例的一种实现方式中，所述补偿电压信号的电压与公共电压信号的电压相同。
在本公开实施例的一种实现方式中，所述补偿电压信号的电压范围为-0.3V～-0.2V。
本公开至少一个实施例提供了一种显示基板，所述显示基板包括如前任一项所述的显示补偿电路。
在本公开实施例的一种实现方式中，所述第一公共电极和所述第二公共电极均复用为触控电极。
在本公开实施例的一种实现方式中，所述第一公共电极的面积小于所述第二公共电极的面积。
另一方面，本公开实施例还提供了一种显示装置，所述显示装置包括如前所述的显示基板。
本公开至少一个实施例提供了一种显示装置的驱动方法，所述方法包括：
向开关子电路的控制端提供控制信号，以控制所述开关子电路导通；
向开关子电路的输入端提供补偿电压信号，所述补偿电压信号用于在所述开关子电路导通时，被提供给所述开关子电路所连接的第一公共电极。
附图说明
图1是本公开实施例提供的一种显示基板的结构示意图；
图2是本公开实施例提供的一种显示补偿电路的结构示意图；
图3是本公开实施例提供的一种公共电极的放大结构示意图；
图4是本公开实施例提供的一种显示装置的驱动方法的流程图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开实施方式作进一步地详细描述。
本公开实施例提供的显示补偿电路可以应用于设置有槽、孔或者圆角等结构的显示基板中，这些结构可以用于容置电子器件，例如摄像头、传感器等。为了便于理解，下面结合图1对本公开实施例的应用场景进行简单介绍。
图1是本公开实施例提供的一种显示基板的结构示意图。参见图1，该显示基板10上设置有U型槽20，该U型槽20处可以用于设置移动终端内的前置摄像头。该显示基板包括显示区域11和外围区域12，显示区域11内阵列排布有多个公共电极30，这些公共电极30包括第一公共电极31和第二公共电极32。第一公共电极31处于U型槽20周围，由于受到U型槽20的形状的影响，U型槽20周围的公共电极无法设计成第二公共电极32，只能设计成与U型槽20的形状匹配的第一公共电极31。其中，第一公共电极31的面积与第二公共电极32的面积不同。
示例性地，第一公共电极31面积小于第二公共电极32的面积。在显示基板中，一个第二公共电极32通常对应显示基板上的A×B个像素区域(显示基板上的像素区域是阵列布置的)，例如一个第二公共电极32对应显示基板上的60×60个像素区域，相应地，第一公共电极31对应的像素区域的数量少于60 ×60个。其中，像素区域是指显示基板上与显示面板上的一个像素单元对应的区域。
如图1所示，第一公共电极31和第二公共电极32的数量不同，例如第一公共电极31的数量少于第二公共电极32的数量，这种情况下，在进行后续显示补偿时，只需要对数量少的第一公共电极31进行补偿即可。各个第一公共电极31的形状可以相同，也可以不同。各个第二公共电极32的形状相同。第二公共电极32为正常的公共电极，形状通常为规则多边形，例如可以为矩形，第二公共电极32为异形的公共电极，例如形状为有缺角的矩形，该缺角通常与U型槽20的形状对应设置，如弧形。
除了图1所示的U型槽20周围的公共电极需要设计成第一公共电极外，对于显示基板上的圆孔或者圆角附近的公共电极也需要设计成第一公共电极。
显示基板的像素电极和公共电极构成一平行板电容。显示基板在显示阶段，公共电极加载公共电压(直流信号)，像素电极加载像素电压(交流信号)，像素电极会对公共电极的电压有拉升作用(也即像素电极会对公共电极充电)，如，像素电压为正时，拉高公共电极的电压，像素电压为负时，拉低公共电极的电压。当同时存在第二公共电极32和第一公共电极31时，由于第二公共电极32和第一公共电极31的面积不同，二者的负载不同，像素电极对第二公共电极32和第一公共电极31拉升程度不同(充电的速度不同)，造成相同时间内第二公共电极32和第一公共电极31的电压不同，进而造成在相同像素电压下，在第二公共电极32和第一公共电极31对应的区域形成的电场大小不同，进而造成在第二公共电极32和第一公共电极31对应的区域的液晶偏转不同，进而导致第二公共电极32和第一公共电极31对应的区域显示不均一。尤其是对于显示重载画面的显示基板而言，这种不均一更为明显。显示重载画面的显示基板通常是指高功耗显示基板，例如每帧均进行两次反转的点反转模式的显示基板(反转的是像素电压)，由于其功耗高，因而第一公共电极31和第二公共电极32充电速度不同的特点对其影响更大，不均一也更明显。
需要说明的是，本申请提供的技术方案应用于具有多个公共电极的显示基板，在这种显示基板中，公共电极通常被复用为触控电极等其他功能的电极，其中，多个是指至少2个。对于公共电极为面电极的显示基板，则不存在上述问题。
图2是本公开实施例提供的一种显示补偿电路的结构示意图。参见图2，显示补偿电路40包括：至少一个开关子电路41。开关子电路41具有输入端T1、输出端T2和控制端T3。
该开关子电路41通过输出端T2与第一公共电极31电连接。
其中，开关子电路41被配置为在控制端T3接收到的控制信号的控制下导通，在导通时将输入端T1接收到的补偿电压信号提供给相连的第一公共电极31。
在该显示补偿电路中，开关子电路的输出端与第一公共电极电连接，开关子电路的输入端接收补偿电压信号，控制端通过控制信号控制。在显示基板显示时，控制信号控制这些开关子电路导通，从而接收到的补偿电压信号写入到第一公共电极，从而调节了第一公共电极的负载，避免了由于第一公共电极与第二公共电极的负载差异，造成显示画面存在均一性的问题，提高了显示质量。
在本公开实施例中，可以通过布置多个显示补偿电路40来实现对多个第一公共电极31的补偿。每个第一公共电极31电极连接一个显示补偿电路40。如图2所示，两个第一公共电极31分别对应设置有显示补偿电路40，每个显示补偿电路40包括一个开关子电路41，也即每个第一公共电极31连接一个开关子电路41，进行电压信号补偿。
或者，布置一个显示补偿电路40，显示补偿电路40包括多个开关子电路41，每个第一公共电极31连接一个开关子电路41。
在本公开实施例中，第一公共电极31可以为显示基板上任意位置的第一公共电极，例如是U型槽周围，或者是圆孔周围，再或是显示基板的圆角处，只要是第一公共电极31皆可按照上述方式与显示补偿电路电连接。
如图1所示，该显示补偿电路40还可以包括补偿线42，至少一个开关子电路41均通过输入端T1与补偿线42电连接，补偿线42被配置为提供前述补偿电压信号。
该显示补偿电路40还可以包括控制线S，开关子电路41的控制端T3通过控制线S与控制器43电连接，从而实现控制器43对开关子电路41的控制。控制器43被配置为在显示阶段输出控制信号，控制开关子电路41导通。
进一步地，在本公开实施例中，所有的开关子电路41的控制端T3可以连接到同一控制器43，从而实现对所有显示补偿电路40的开关子电路41的同时控制，同时节省了控制器，简化了电路设计。
在本公开实施例中，该控制器43可以采用集成电路实现。该集成电路可以为显示基板上任意集成电路，例如栅极驱动集成电路。
图3是本公开实施例提供的一种公共电极的放大结构示意图。参见图3，显示补偿电路40还可以包括连接线L。其中，连接线L的一端与开关子电路41的输出端T2电连接，连接线L的另一端通过第一过孔51与第一公共电极31电连接。
在该实现方式中，开关子电路41和第一公共电极31之间是通过连接线L连接的，这里的连接线L并非设置在第一公共电极31同层，而是设置在与第一公共电极31绝缘的其他层，这样设计可以避免占用第一公共电极层31所在层的空间，保证公共电极面积足够大，以与像素电极之间充分形成电场来控制液晶的偏转。由于第一公共电极31与连接线L所在层是绝缘设置的，所以需要通过设置过孔来实现连接线L和第一公共电极31的电连接。
示例性地，该显示基板可以为阵列基板。补偿线42、开关子电路41、控制线S、连接线L均可以设置在该阵列基板上。
示例性地，阵列基板可以包括基板和依次层叠在基板上的栅极层、栅极绝缘层、有源层、源漏极层、平坦化层、公共电极层、像素电极绝缘层、像素电极层和保护层等。
其中，开关子电路41可以为薄膜晶体管(Thin Film Transistor，TFT)，该薄膜晶体管可以设置在阵列基板的外围区域，其膜层结构与阵列基板的显示区域内的薄膜晶体管的膜层结构相同。
在本公开实施例的一种实现方式中，开关子电路41为一个薄膜晶体管；在其他实现方式中，开关子电路41也可以为多个串联或并联的薄膜晶体管，本公开实施例对此不做限制。
在采用薄膜晶体管作为开关子电路41时，开关子电路41的控制端为薄膜晶体管的栅极，开关子电路41的输入端为薄膜晶体管的源极，开关子电路41的输出端为薄膜晶体管的漏极。
该开关子电路41可以为N型薄膜晶体管或者P型薄膜晶体管。当该开关子电路41为P型薄膜晶体管时，控制器43在显示阶段输出一栅极高电平VGH(例如8V)，通过控制线S传输给各个P型薄膜晶体管的栅极，控制各个P型薄膜晶体管导通。当该开关子电路41为N型薄膜晶体管时，控制器43在显示阶段输出一栅极低电平VGL，通过控制线S传输给各个N型薄膜晶体管的栅极，控 制各个N型薄膜晶体管导通。
示例性地，控制线S和补偿线42均可以设置在阵列基板的栅极层。补偿线42可以通过过孔与薄膜晶体管的源极电连接，控制线S可以直接与薄膜晶体管的栅极电连接。连接线L可以设置在阵列基板的源漏极层，通过平坦化层上的第一过孔51与公共电极层的第一公共电极31电连接。
参见图3，每个第二公共电极32和第一公共电极31都需要与驱动集成电路60电连接，该驱动集成电路60被配置为在显示阶段向第二公共电极32和第一公共电极31写入公共电压信号。
在本公开的一种实现方式中，该驱动集成电路60可以与前述控制器43采用同一集成电路实现。在本公开的另一种实现方式中，该驱动集成电路60也可以与前述控制器43采用两个不同的集成电路实现。
第二公共电极32和第一公共电极31均通过走线Z与驱动集成电路60连接的，走线Z沿第一方向布置，且走线Z位于显示基板10的相邻两排像素区域之间(图中未示出像素区域，通常一个公共电极对应多排像素区域)，第一方向为显示基板10的行方向和列方向中的一种，其中，列方向为显示基板中一列像素区域的延伸方向，行方向为显示基板中一行像素区域的延伸方向。相邻两排像素区域之间通常只有一根走线Z，每根走线Z只与一排公共电极中的一个公共电极电连接，与其他公共电极不连接。如图3所示，两根走线Z分别连接2个公共电极。
可选地，公共电极30上还连接有无效线W，无效线W、连接线L以及走线Z平行设置，显示基板10的任意相邻的像素区域之间设置有无效线W、连接线L或者走线Z。无效线W不与驱动集成电路60电连接，仅仅是为了减小各个像素区域的结构的差异，从而提高各个像素显示的均一性。如图3所示，无效线W可以为分段式设计，也即各个第二公共电极32和第一公共电极31对应的无效线W不互相连接。
需要说明的是，走线Z和无效线W均可以位于阵列基板的源漏极层。走线Z通过第二过孔52与第二公共电极32或第一公共电极31连接；无效线W通过第三过孔53与第二公共电极32或第一公共电极31连接。每个第三过孔53均与一个第二过孔52对应，每个第三过孔53与对应的第二过孔52的连线所在方向为第二方向，第二方向与第一方向垂直，通过在无效线W上设置过孔，从而进一步减小各个像素区域的结构的差异，提高显示均一性。例如图3所示，一 个第二公共电极32连接的走线Z上的第二过孔52位于第1、3、5、7、9行像素区域的相邻像素区域之间，则该第二公共电极32连接的无效线W上的第三过孔53也应该设置在第1、3、5、7、9行像素区域的相邻像素区域之间。
在本公开实施例中，连接线L占用了原本无效线W的位置进行布置，相邻两排像素区域之间通常只有一根连接线L，连接线L与第一公共电极31电连接。
示例性地，连接线L位于显示基板相邻两列像素区域之间。
在相邻两排像素区域之间只设置一根连接线L的情况下，能够布置的连接线L的数量也能够满足显示基板对于连接线L的数量要求。其中，能够布置的连接线L的数量等于一块第一公共电极31对应的像素区域的列数减去一列公共电极的数量，再减1。例如，一块第一公共电极31对应60列像素区域，则一块第一公共电极31对应有59个位置(两列像素区域之间)可以用来设置线(走线Z、连接线L和无效线W)；一列公共电极的数量为40个，则59个位置中的40个位置需要设置走线Z，连接40个公共电极和驱动集成电路，剩余19个位置可以用来设置连接线L；由于只有第一公共电极31需要连接连接线L，但一列公共电极中第一公共电极31的数量远小于此，那么除去设置走线Z和连接线L多出的位置，可以设置前述无效线W。
在本公开附图2和图3中，均是以连接线L、走线Z、无效线W沿列方向排列为例进行说明的，这样布置的好处是，驱动集成电路和控制器等器件通常是布置在显示基板的上方或下方，便于走线连接。当然，在其他实施例中，连接线L、走线Z、无效线W也可以沿着行方向布置，本申请对此不做限制。
在本公开实施例中，第一过孔51的数量与第一公共电极31和第二公共电极32的面积差正相关。第一公共电极31和第二公共电极32的面积差越大，第一过孔51的数量越多。
这里第一过孔51的数量不一定与走线Z上对应的第二过孔52数量相同，而是和第一公共电极31的面积相关。因为第一过孔51数量的多少会影响补偿线42向第一公共电极31写入补偿电压信号的速度。
在第一公共电极31的面积小于第二公共电极32的面积的情况下，补偿电压信号为负电压。第一公共电极31的面积越小，第一公共电极31的面积与第二公共电极32的面积相差越大，此时采用更多的第一过孔51进行补偿电压信号的写入，可以加快通过补偿电压信号拉低电位的速度，从而抵消了因为面积小而造成的充电时电位上涨/下降过快(像素电压为正时上涨，像素电压为负时 下降)。另外，通过设置过孔数量来控制补偿电压信号拉低电位的速度，无需为不同面积的第一公共电极设置不同大小的补偿电压信号，电路更简单。
进一步地，可以预先通过实验确定出各种面积大小的第一公共电极31分别对应的第一过孔51的数量，在制作时，按照面积大小与第一过孔51的数量的大小关系，分别为各个第一公共电极31布置过孔。
在本公开实施例中，当第一公共电极31上的第一过孔51的数量为至少3个时，至少3个第一过孔51均匀间隔分布。在该实现方式中，在保证连接线L上的第一过孔51与走线Z上的第二过孔52同行设置的前提下，将第一过孔51均匀间隔分布，避免杂乱分布造成的显示不均一。例如图3所示，走线Z上的第二过孔52分布在第1、3、5、7、9行，3个第一过孔51可以设置在第1、5、9行。
在本公开实施例中，补偿电压信号的电压范围可以为-0.3～-0.2V，由于通过驱动集成电路60加载给公共电极30的公共电压通常为一直流负电压信号，第一公共电极31的面积通常小于第二公共电极32的面积，在这种情况下，该补偿电压信号可以有效增加第一公共电极31的负载，从而抵消了因为面积小而造成的充电时电位上涨/下降过快。
示例性地，补偿电压信号的电压可以与公共电压信号的电压相同。例如，公共电压信号的电压为-0.2V，该补偿电压信号的电压也可以为-0.2V。这样做一方面，可以节省一路信号，另一方面，可以保证第一公共电极31的电压时钟在公共电压信号上或者附近，也即最终的第一公共电极31的电压中高低变换是跟随公共电压信号的，相比于仅仅被像素电压拉高或拉低时的显示效果，提高了显示均一性。
在本公开实施例中，补偿线42可以与显示基板的负压信号线电连接，该负压信号线设置在显示基板的外围区域，可以用于提供前述公共电压信号。该负压信号线围绕显示区域设置一圈，因此补偿线42与负压信号线连接很方便。其中，负电压信号线用于提供一负电压信号，例如-0.2V。
除了图1所示的第一公共电极31的面积小于第二公共电极32的面积的情况外，在其他实现方式中，还可以第一公共电极31的面积大于第二公共电极32的面积，例如第一公共电极31为异形的公共电极，第二公共电极32为正常的公共电极，异形的公共电极的面积大于正常的公共电极的面积，或者第一公共电极31为正常的公共电极，第二公共电极32为异形的公共电极，正常的公共 电极的面积大于异形的公共电极的面积。在第一公共电极31的面积大于第二公共电极32的面积的情况下，补偿电压信号为正电压，相当于给第二公共电极32提供了一负的补偿电压信号。示例性地，补偿电压信号可以为0.05～0.1V。
在本公开实施例，上述补偿线42、控制线S、连接线L、走线Z和无效线W等均可以采用与阵列基板的栅线或者数据线相同的导电材料制成，例如金属材料。
在本公开实施例中，公共电极可以采用透明导电材料制成，即保证了其电极的功能，又保证了整个显示面板的透过率。
本公开实施例还提供了一种显示基板，该显示基板包括上述显示补偿电路。
由于本公开实施例提供的显示基板与上述任一种显示补偿电路具有相同的技术特征，所以也能解决同样的技术问题，产生相同的技术效果。
在本公开实施例的一种实现方式中，第一公共电极和第二公共电极均可以复用为触控电极。当公共电极复用为触控电极时，在触控阶段，驱动集成电路向公共电极写入触控信号；在显示阶段，驱动集成电路向公共电极写入公共电压信号。
在本公开实施例的一种实现方式中，第一公共电极的面积小于第二公共电极的面积。因为在一般的显示基板中，异形的公共电极的面积较小，且异形的公共电极数量少，采用补偿电路进行补偿时，需要的补偿电路的数量少。
本公开实施例还提供了一种显示装置，该显示装置包括上述显示基板。该显示装置可以为：电子纸、有机发光二极管(Organic Light Emitting Diode，OLED)面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
由于本公开实施例提供的显示装置与上述任一种显示补偿电路具有相同的技术特征，所以也能解决同样的技术问题，产生相同的技术效果。
图4是本公开实施例提供的一种显示装置的驱动方法的流程图。该方法用于驱动如前所述的显示装置，参见图4，该方法包括如下步骤：
步骤401：向开关子电路的控制端提供控制信号，以控制开关子电路导通。
该开关子电路可以为N型薄膜晶体管或者P型薄膜晶体管。当该开关子电 路为P型薄膜晶体管时，在显示阶段输出一栅极高电平VGH(例如8V)，通过控制线传输给各个P型薄膜晶体管的栅极，控制各个P型薄膜晶体管导通。当该开关子电路为N型薄膜晶体管时，在显示阶段输出一栅极低电平VGL，通过控制线传输给各个N型薄膜晶体管的栅极，控制各个N型薄膜晶体管导通。
如果该显示装置的屏幕为触摸屏，公共电极复用为触控电极，在触控阶段，该控制信号控制该开关子电路断开。
步骤402：向开关子电路的输入端提供补偿电压信号，使得在开关子电路导通时，将补偿电压信号提供给开关子电路所连接的第一公共电极。
在本公开实施例中，补偿电压信号的电压范围可以为-0.3～-0.2V，由于通过驱动集成电路加载给公共电极的公共电压通常为一直流负电压信号，第一公共电极的面积通常小于第二公共电极的面积，在这种情况下，该补偿电压信号可以有效增加第一公共电极的负载，从而抵消了因为面积小而造成的充电时电位上涨/下降过快。
示例性地，补偿电压信号的电压可以与公共电压信号的电压相同。例如，该补偿电压信号可以为-0.2V。
在本公开实施例中，补偿电压信号可以由显示基板的负压信号线提供，该负压信号线设置在显示基板的外围区域，负压信号线围绕显示区域设置一圈，使得补偿电压信号的获取很方便。
以上所述仅为本公开的可选实施例，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (15)

  1. 一种显示补偿电路，应用于显示基板(10)，所述显示基板(10)具有多个公共电极(30)，所述多个公共电极(30)包括第一公共电极(31)和第二公共电极(32)，所述第一公共电极(31)和所述第二公共电极(32)的面积不同；
    所述显示补偿电路(40)包括：至少一个开关子电路(41)；所述开关子电路(41)具有输入端(T1)、输出端(T2)和控制端(T3)；
    所述开关子电路(41)的输出端(T2)与所述第一公共电极(31)电连接；
    所述开关子电路(41)被配置为在所述控制端(T3)接收到的控制信号的控制下导通，在导通时将所述输入端(T1)接收到的补偿电压信号提供给相连的所述第一公共电极(31)。
  2. 根据权利要求1所述的显示补偿电路，其中，所述显示补偿电路(40)还包括连接线(L)；
    所述连接线(L)的一端与所述开关子电路(41)的输出端(T2)电连接，所述连接线(L)的另一端通过第一过孔(51)与所述第一公共电极(31)电连接。
  3. 根据权利要求2所述的显示补偿电路，其中，所述连接线(L)沿第一方向布置，所述连接线(L)位于所述显示基板(10)的相邻两排像素区域之间，所述第一方向为所述显示基板(10)的行方向和列方向中的一种。
  4. 根据权利要求3所述的显示补偿电路，其中，所述第一过孔(51)的数量与所述第一公共电极(31)和所述第二公共电极(32)的面积差正相关。
  5. 根据权利要求4所述的显示补偿电路，其中，所述第一过孔(51)与至少一个第二过孔(52)位于沿第二方向延伸的直线上，所述第二过孔(52)为用于连接所述第一公共电极(31)与驱动集成电路(60)的过孔，所述第二方向与所述第一方向垂直。
  6. 根据权利要求5所述的显示补偿电路，其中，所述公共电极(30)上还连接有无效线(W)，所述无效线(W)通过第三过孔(53)与所述公共电极(30)连接，所述无效线(W)与所述连接线(L)平行布置，每个所述第三过孔(53)均与一个所述第二过孔(52)对应，且每个所述第三过孔(53)与对应的第二过孔(52)的连线所在方向为所述第二方向。
  7. 根据权利要求1至6任一项所述的显示补偿电路，其中，所述显示补偿电路(40)还包括补偿线(42)，所述开关子电路(41)的所述输入端(T1)与所述补偿线(42)电连接，所述补偿线(42)被配置为提供所述补偿电压信号。
  8. 根据权利要求1至7任一项所述的显示补偿电路，其中，所述显示补偿电路(40)还包括控制线(S)，所述开关子电路(41)的所述控制端(T3)通过所述控制线(S)与控制器(43)电连接；所述控制器(43)被配置为在显示阶段输出所述控制信号，控制所述开关子电路(41)导通。
  9. 根据权利要求1至8任一项所述的显示补偿电路，其中，所述补偿电压信号的电压与公共电压信号的电压相同。
  10. 根据权利要求9所述的显示补偿电路，其中，所述补偿电压信号的电压范围为-0.3V～-0.2V。
  11. 一种显示基板，所述显示基板包括如权利要求1至10任一项所述的显示补偿电路。
  12. 根据权利要求11所述的显示基板，其中，所述第一公共电极和所述第二公共电极均复用为触控电极。
  13. 根据权利要求11或12所述的显示基板，其中，所述第一公共电极的面积小于所述第二公共电极的面积。
  14. 一种显示装置，所述显示装置包括如权利要求11至13任一项所述的显示基板。
  15. 一种显示装置的驱动方法，所述方法包括：
    向开关子电路的控制端提供控制信号，以控制所述开关子电路导通；
    向所述开关子电路的输入端提供补偿电压信号，所述补偿电压信号用于在所述开关子电路导通时，被提供给所述开关子电路所连接的第一公共电极。
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